Gallardo7761/riscv-ac
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2 Commits

Author SHA1 Message Date
Jose
534cb00c42 fixed: uart module and simulation-only signals handling 2026-03-07 21:53:09 +01:00
Jose
d7e166ca6f refactor: renamed top.v to riscv.v 2026-03-03 04:05:49 +01:00