refactor: renamed all signals for consistency

2026-03-02 23:34:31 +01:00
parent e7cd451e7e
commit 98f948ab18
36 changed files with 58 additions and 58 deletions
--- a/riscv-ac.sim/sim_1/behav/xsim/xsim.dir/tb_top_behav/obj/xsim_0.lnx64.o
+++ b/riscv-ac.sim/sim_1/behav/xsim/xsim.dir/tb_top_behav/obj/xsim_0.lnx64.o
--- a/riscv-ac.sim/sim_1/behav/xsim/xsim.dir/tb_top_behav/xsim.dbg
+++ b/riscv-ac.sim/sim_1/behav/xsim/xsim.dir/tb_top_behav/xsim.dbg
--- a/riscv-ac.sim/sim_1/behav/xsim/xsim.dir/tb_top_behav/xsim.mem
+++ b/riscv-ac.sim/sim_1/behav/xsim/xsim.dir/tb_top_behav/xsim.mem
--- a/riscv-ac.sim/sim_1/behav/xsim/xsim.dir/tb_top_behav/xsim.rlx
+++ b/riscv-ac.sim/sim_1/behav/xsim/xsim.dir/tb_top_behav/xsim.rlx
@@ -1,6 +1,6 @@

 { 
-    crc :  1048859293793588504  , 
+    crc :  5732162227090726530  , 
    ccp_crc :  0  , 
    cmdline : " --incr --debug typical --relax --mt 8 -L xil_defaultlib -L unisims_ver -L unimacro_ver -L secureip --snapshot tb_top_behav xil_defaultlib.tb_top xil_defaultlib.glbl" , 
    buildDate : "Nov 14 2025" , 
--- a/riscv-ac.sim/sim_1/behav/xsim/xsim.dir/tb_top_behav/xsim.rtti
+++ b/riscv-ac.sim/sim_1/behav/xsim/xsim.dir/tb_top_behav/xsim.rtti
--- a/riscv-ac.sim/sim_1/behav/xsim/xsim.dir/tb_top_behav/xsim.xdbg
+++ b/riscv-ac.sim/sim_1/behav/xsim/xsim.dir/tb_top_behav/xsim.xdbg
--- a/riscv-ac.sim/sim_1/behav/xsim/xsim.dir/tb_top_behav/xsimk
+++ b/riscv-ac.sim/sim_1/behav/xsim/xsim.dir/tb_top_behav/xsimk