Jose 98f948ab18 refactor: renamed all signals for consistency

2026-03-02 23:34:31 +01:00

..

alu.v

refactor: renamed all signals for consistency

2026-03-02 23:34:31 +01:00

control.v

prototype works

2026-03-02 23:20:54 +01:00

dmem.v

refactor: renamed all signals for consistency

2026-03-02 23:34:31 +01:00

ex_me.v

prototype works

2026-03-02 23:20:54 +01:00

forwarding.v

prototype works

2026-03-02 23:20:54 +01:00

hazard.v

prototype works

2026-03-02 23:20:54 +01:00

id_ex.v

refactor: renamed all signals for consistency

2026-03-02 23:34:31 +01:00

if_id.v

refactor: renamed all signals for consistency

2026-03-02 23:34:31 +01:00

imem.v

refactor: renamed all signals for consistency

2026-03-02 23:34:31 +01:00

imm_gen.v

refactor: renamed all signals for consistency

2026-03-02 23:34:31 +01:00

me_wb.v

prototype works

2026-03-02 23:20:54 +01:00

pc.v

refactor: renamed all signals for consistency

2026-03-02 23:34:31 +01:00

regfile.v

prototype works

2026-03-02 23:20:54 +01:00

top.v

refactor: renamed all signals for consistency

2026-03-02 23:34:31 +01:00