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riscv-ac
/
riscv-ac.srcs
History
Jose
534cb00c42
fixed: uart module and simulation-only signals handling
2026-03-07 21:53:09 +01:00
..
constrs_1
/new
add: uart_tx module
2026-03-03 03:41:56 +01:00
sim_1
/new
refactor: renamed top.v to riscv.v
2026-03-03 04:05:49 +01:00
sources_1
/new
fixed: uart module and simulation-only signals handling
2026-03-07 21:53:09 +01:00
