Gallardo7761/riscv-ac
1
1
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

add: dual port imem and uart

Browse Source
This commit is contained in:
Jose
2026-03-03 01:44:27 +01:00
parent 98f948ab18
commit a890b031a7
36 changed files with 97 additions and 50 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
riscv-ac.sim/sim_1/behav/xsim/simulate.sh
View File

@@ -6,7 +6,7 @@
# Simulator : AMD Vivado Simulator
# Description : Script for simulating the design by launching the simulator
#
# Generated by Vivado on Mon Mar 02 23:30:42 CET 2026
# Generated by Vivado on Tue Mar 03 01:04:08 CET 2026
# SW Build 6299465 on Fri Nov 14 12:34:56 MST 2025
#
# Copyright 1986-2022 Xilinx, Inc. All Rights Reserved.