505 lines
14 KiB
C
505 lines
14 KiB
C
/**
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******************************************************************************
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* @file cs42l51.c
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* @author MCD Application Team
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* @brief This file provides the CS42L51 Audio Codec driver.
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******************************************************************************
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* @attention
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*
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* <h2><center>© Copyright (c) 2017 STMicroelectronics.
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* All rights reserved.</center></h2>
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*
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* This software component is licensed by ST under BSD 3-Clause license,
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* the "License"; You may not use this file except in compliance with the
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* License. You may obtain a copy of the License at:
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* opensource.org/licenses/BSD-3-Clause
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*
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******************************************************************************
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*/
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/* Includes ------------------------------------------------------------------*/
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#include "cs42l51.h"
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/** @addtogroup BSP
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* @{
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*/
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/** @addtogroup Components
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* @{
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*/
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/** @addtogroup CS42L51
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* @brief This file provides a set of functions needed to drive the
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* CS42L51 audio codec.
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* @{
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*/
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/** @defgroup CS42L51_Exported_Variables
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* @{
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*/
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/* Audio codec driver structure initialization */
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AUDIO_DrvTypeDef cs42l51_drv =
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{
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cs42l51_Init,
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cs42l51_DeInit,
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cs42l51_ReadID,
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cs42l51_Play,
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cs42l51_Pause,
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cs42l51_Resume,
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cs42l51_Stop,
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cs42l51_SetFrequency,
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cs42l51_SetVolume,
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cs42l51_SetMute,
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cs42l51_SetOutputMode,
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cs42l51_Reset,
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};
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/**
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* @}
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*/
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/** @defgroup CS42L51_Private_Types
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* @{
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*/
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/**
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* @}
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*/
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/** @defgroup CS42L51_Private_Defines
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* @{
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*/
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/* Uncomment this line to enable verifying data sent to codec after each write
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operation (for debug purpose) */
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#if !defined (VERIFY_WRITTENDATA)
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#define VERIFY_WRITTENDATA
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#endif /* VERIFY_WRITTENDATA */
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/**
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* @}
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*/
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/** @defgroup CS42L51_Private_Macros
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* @{
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*/
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/**
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* @}
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*/
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/** @defgroup CS42L51_Private_Variables
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* @{
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*/
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static uint8_t Is_CS42L51_Initialized = 0;
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static uint8_t Is_CS42L51_Stop = 1;
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static uint16_t CS42L51_Device = OUTPUT_DEVICE_HEADPHONE;
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/**
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* @}
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*/
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/** @defgroup CS42L51_Private_Functions
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* @{
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*/
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static uint8_t CODEC_IO_Write(uint8_t Addr, uint8_t Reg, uint8_t Value);
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/**
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* @}
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*/
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/** @addtogroup CS42L51_Exported_Functions
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* @{
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*/
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/**
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* @brief Initialize the audio codec and the control interface.
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* @param DeviceAddr: Device address on communication bus.
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* @param Device: Can be combination values of OUTPUT_DEVICE_HEADPHONE and
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* INPUT_DEVICE_MIC1.
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* @param Volume: Initial output volume level (from 0 (-100dB) to 100 (0dB)).
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* @param AudioFreq: Initial audio frequency (currently not used).
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* @retval 0 if correct communication, else wrong communication.
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*/
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uint32_t cs42l51_Init(uint16_t DeviceAddr, uint16_t Device, uint8_t Volume, uint32_t AudioFreq)
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{
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uint32_t counter = 0;
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uint8_t Value;
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/* Check if codec is already initialized */
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if(Is_CS42L51_Initialized == 0)
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{
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/* Initialize the Control interface of the Audio Codec */
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AUDIO_IO_Init();
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Is_CS42L51_Initialized = 1;
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}
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else
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{
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/* Set all power down bits to 1 exept PDN to mute ADCs and DACs*/
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counter += CODEC_IO_Write(DeviceAddr, 0x02, 0x7E);
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Value = AUDIO_IO_Read(DeviceAddr, 0x03);
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counter += CODEC_IO_Write(DeviceAddr, 0x03, (Value | 0x0E));
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/* Disable zero cross and soft ramp */
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Value = AUDIO_IO_Read(DeviceAddr, 0x09);
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counter += CODEC_IO_Write(DeviceAddr, 0x09, (Value & 0xFC));
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/* Power control : Enter standby (PDN = 1) */
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Value = AUDIO_IO_Read(DeviceAddr, 0x02);
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counter += CODEC_IO_Write(DeviceAddr, 0x02, (Value | 0x01));
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}
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/* Mic Power and Speed Control : Auto detect on, Speed mode SSM, tri state off, MCLK divide by 2 off */
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Value = AUDIO_IO_Read(DeviceAddr, 0x03);
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counter += CODEC_IO_Write(DeviceAddr, 0x03, ((Value & 0x0E) | 0xA0));
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/* Interface control : Loopback off, Slave, I2S (SDIN and SOUT), Digital mix off, Mic mix off */
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counter += CODEC_IO_Write(DeviceAddr, 0x04, 0x0C);
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/* Mic control : ADC single volume off, ADCB boost off, ADCA boost off, MicBias on AIN3B/MICIN2 pin, MicBias level 0.8xVA, MICB boost 16db, MICA boost 16dB */
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counter += CODEC_IO_Write(DeviceAddr, 0x05, 0x00);
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/* ADC control : ADCB HPF off, ADCB HPF freeze off, ADCA HPF off, ADCA HPF freeze off, Soft ramp B off, Zero cross B off, Soft ramp A off, Zero cross A off */
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counter += CODEC_IO_Write(DeviceAddr, 0x06, 0x00);
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/* ADC Input Select, Invert and Mute : AIN1B to PGAB, AIN3A to PreAmp to PGAA, ADCB invert off, ADCA invert off, ADCB mute on, ADCA mute off */
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counter += CODEC_IO_Write(DeviceAddr, 0x07, 0x32);
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/* DAC output control : HP Gain to 1, Single volume control off, PCM invert signals polarity off, DAC channels mute on */
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counter += CODEC_IO_Write(DeviceAddr, 0x08, 0xC3);
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/* DAC control : Signal processing to DAC, Freeze off, De-emphasis off, Analog output auto mute off, DAC soft ramp */
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counter += CODEC_IO_Write(DeviceAddr, 0x09, 0x42);
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/* ALCA and PGAA Control : ALCA soft ramp disable on, ALCA zero cross disable on, PGA A Gain 0dB */
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counter += CODEC_IO_Write(DeviceAddr, 0x0A, 0xC0);
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/* ALCB and PGAB Control : ALCB soft ramp disable on, ALCB zero cross disable on, PGA B Gain 0dB */
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counter += CODEC_IO_Write(DeviceAddr, 0x0B, 0xC0);
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/* ADCA Attenuator : 0dB */
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counter += CODEC_IO_Write(DeviceAddr, 0x0C, 0x00);
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/* ADCB Attenuator : 0dB */
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counter += CODEC_IO_Write(DeviceAddr, 0x0D, 0x00);
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/* ADCA mixer volume control : ADCA mixer channel mute on, ADCA mixer volume 0dB */
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counter += CODEC_IO_Write(DeviceAddr, 0x0E, 0x80);
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/* ADCB mixer volume control : ADCB mixer channel mute on, ADCB mixer volume 0dB */
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counter += CODEC_IO_Write(DeviceAddr, 0x0F, 0x80);
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/* PCMA mixer volume control : PCMA mixer channel mute off, PCMA mixer volume 0dB */
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counter += CODEC_IO_Write(DeviceAddr, 0x10, 0x00);
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/* PCMB mixer volume control : PCMB mixer channel mute off, PCMB mixer volume 0dB */
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counter += CODEC_IO_Write(DeviceAddr, 0x11, 0x00);
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/* PCM channel mixer : AOUTA Left, AOUTB Right */
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counter += CODEC_IO_Write(DeviceAddr, 0x18, 0x00);
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if(Device & OUTPUT_DEVICE_HEADPHONE)
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{
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Value = VOLUME_CONVERT(Volume);
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/* AOUTA volume control : AOUTA volume */
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counter += CODEC_IO_Write(DeviceAddr, 0x16, Value);
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/* AOUTB volume control : AOUTB volume */
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counter += CODEC_IO_Write(DeviceAddr, 0x17, Value);
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}
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/* Store device */
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CS42L51_Device = Device;
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/* Return communication control value */
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return counter;
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}
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/**
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* @brief Deinitialize the audio codec.
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* @param None
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* @retval None
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*/
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void cs42l51_DeInit(void)
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{
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/* Deinitialize Audio Codec interface */
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AUDIO_IO_DeInit();
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Is_CS42L51_Initialized = 0;
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}
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/**
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* @brief Get the CS42L51 ID.
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* @param DeviceAddr: Device address on communication Bus.
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* @retval The CS42L51 ID
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*/
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uint32_t cs42l51_ReadID(uint16_t DeviceAddr)
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{
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uint8_t Value;
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if(Is_CS42L51_Initialized == 0)
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{
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/* Initialize the Control interface of the Audio Codec */
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AUDIO_IO_Init();
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Value = AUDIO_IO_Read(DeviceAddr, CS42L51_CHIPID_ADDR);
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Value = (Value & CS42L51_ID_MASK);
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/* Deinitialize Audio Codec interface */
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AUDIO_IO_DeInit();
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}
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else
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{
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Value = AUDIO_IO_Read(DeviceAddr, CS42L51_CHIPID_ADDR);
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Value = (Value & CS42L51_ID_MASK);
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}
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return((uint32_t) Value);
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}
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/**
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* @brief Start the audio Codec play feature.
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* @note For this codec no Play options are required.
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* @param DeviceAddr: Device address on communication Bus.
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* @retval 0 if correct communication, else wrong communication
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*/
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uint32_t cs42l51_Play(uint16_t DeviceAddr, uint16_t* pBuffer, uint16_t Size)
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{
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uint32_t counter = 0;
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uint8_t Value;
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if(Is_CS42L51_Stop == 1)
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{
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/* Unmute output device */
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counter += cs42l51_SetMute(DeviceAddr, AUDIO_MUTE_OFF);
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if(CS42L51_Device & OUTPUT_DEVICE_HEADPHONE)
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{
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/* DAC control : Signal processing to DAC, Freeze off, De-emphasis off, Analog output auto mute off, DAC soft ramp */
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counter += CODEC_IO_Write(DeviceAddr, 0x09, 0x42);
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/* Power control 1 : PDN_DACA, PDN_DACB disable. */
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Value = AUDIO_IO_Read(DeviceAddr, 0x02);
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counter += CODEC_IO_Write(DeviceAddr, 0x02, (Value & 0x9F));
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}
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if(CS42L51_Device & INPUT_DEVICE_MIC1)
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{
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/* Power control 1 : PDN_PGAA, PDN_ADCA disable. */
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Value = AUDIO_IO_Read(DeviceAddr, 0x02);
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counter += CODEC_IO_Write(DeviceAddr, 0x02, (Value & 0xF5));
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/* Mic Power and Speed Control : PDN_MICA, PDN_MIC_BIAS disable. */
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Value = AUDIO_IO_Read(DeviceAddr, 0x03);
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counter += CODEC_IO_Write(DeviceAddr, 0x03, (Value & 0xF9));
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}
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/* Power control : Exit standby (PDN = 0) */
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Value = AUDIO_IO_Read(DeviceAddr, 0x02);
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counter += CODEC_IO_Write(DeviceAddr, 0x02, (Value & 0xFE));
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Is_CS42L51_Stop = 0;
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}
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/* Return communication control value */
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return counter;
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}
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/**
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* @brief Pause playing on the audio codec.
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* @param DeviceAddr: Device address on communication Bus.
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* @retval 0 if correct communication, else wrong communication
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*/
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uint32_t cs42l51_Pause(uint16_t DeviceAddr)
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{
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uint32_t counter = 0;
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/* Pause the audio file playing */
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/* Mute the output first */
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counter += cs42l51_SetMute(DeviceAddr, AUDIO_MUTE_ON);
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return counter;
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}
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/**
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* @brief Resume playing on the audio codec.
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* @param DeviceAddr: Device address on communication Bus.
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* @retval 0 if correct communication, else wrong communication
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*/
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uint32_t cs42l51_Resume(uint16_t DeviceAddr)
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{
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uint32_t counter = 0;
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/* Unmute the output */
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counter += cs42l51_SetMute(DeviceAddr, AUDIO_MUTE_OFF);
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return counter;
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}
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/**
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* @brief Stop audio Codec playing. It powers down the codec.
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* @param DeviceAddr: Device address on communication Bus.
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* @param CodecPdwnMode: selects the power down mode (currently not used).
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* @retval 0 if correct communication, else wrong communication
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*/
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uint32_t cs42l51_Stop(uint16_t DeviceAddr, uint32_t CodecPdwnMode)
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{
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uint32_t counter = 0;
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uint8_t Value;
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/* Set all power down bits to 1 exept PDN to mute ADCs and DACs*/
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counter += CODEC_IO_Write(DeviceAddr, 0x02, 0x7E);
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Value = AUDIO_IO_Read(DeviceAddr, 0x03);
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counter += CODEC_IO_Write(DeviceAddr, 0x03, (Value | 0x0E));
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/* Disable zero cross and soft ramp */
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Value = AUDIO_IO_Read(DeviceAddr, 0x09);
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counter += CODEC_IO_Write(DeviceAddr, 0x09, (Value & 0xFC));
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/* Power control : Enter standby (PDN = 1) */
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Value = AUDIO_IO_Read(DeviceAddr, 0x02);
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counter += CODEC_IO_Write(DeviceAddr, 0x02, (Value | 0x01));
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Is_CS42L51_Stop = 1;
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return counter;
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}
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/**
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* @brief Set higher or lower the codec volume level.
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* @param DeviceAddr: Device address on communication Bus.
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* @param Volume: output volume level (from 0 (-100dB) to 100 (0dB)).
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* @retval 0 if correct communication, else wrong communication
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*/
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uint32_t cs42l51_SetVolume(uint16_t DeviceAddr, uint8_t Volume)
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{
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uint32_t counter = 0;
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uint8_t convertedvol = VOLUME_CONVERT(Volume);
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/* AOUTA volume control : AOUTA volume */
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counter += CODEC_IO_Write(DeviceAddr, 0x16, convertedvol);
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/* AOUTB volume control : AOUTB volume */
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counter += CODEC_IO_Write(DeviceAddr, 0x17, convertedvol);
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return counter;
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}
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/**
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* @brief Set new frequency.
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* @param DeviceAddr: Device address on communication Bus.
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* @param AudioFreq: Audio frequency used to play the audio stream.
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* @retval 0 if correct communication, else wrong communication
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*/
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uint32_t cs42l51_SetFrequency(uint16_t DeviceAddr, uint32_t AudioFreq)
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{
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return 0;
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}
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/**
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* @brief Enable or disable the mute feature on the audio codec.
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* @param DeviceAddr: Device address on communication Bus.
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* @param Cmd: AUDIO_MUTE_ON to enable the mute or AUDIO_MUTE_OFF to disable the
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* mute mode.
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* @retval 0 if correct communication, else wrong communication
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*/
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uint32_t cs42l51_SetMute(uint16_t DeviceAddr, uint32_t Cmd)
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{
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uint32_t counter = 0;
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uint8_t Value;
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/* Read DAC output control register */
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Value = AUDIO_IO_Read(DeviceAddr, 0x08);
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/* Set the Mute mode */
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if(Cmd == AUDIO_MUTE_ON)
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{
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/* Mute DAC channels */
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counter += CODEC_IO_Write(DeviceAddr, 0x08, (Value | 0x03));
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}
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else /* AUDIO_MUTE_OFF Disable the Mute */
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{
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/* Unmute DAC channels */
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counter += CODEC_IO_Write(DeviceAddr, 0x08, (Value & 0xFC));
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}
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return counter;
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}
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/**
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* @brief Switch dynamically (while audio file is played) the output target
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* (speaker, headphone, etc).
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* @note This function is currently not used (only headphone output device).
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* @param DeviceAddr: Device address on communication Bus.
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* @param Output: specifies the audio output device target.
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* @retval 0 if correct communication, else wrong communication
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*/
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uint32_t cs42l51_SetOutputMode(uint16_t DeviceAddr, uint8_t Output)
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{
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return 0;
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}
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/**
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* @brief Reset CS42L51 registers.
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* @param DeviceAddr: Device address on communication Bus.
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* @retval 0 if correct communication, else wrong communication
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*/
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uint32_t cs42l51_Reset(uint16_t DeviceAddr)
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{
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if(Is_CS42L51_Initialized == 1)
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{
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/* Deinitialize Audio Codec interface */
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AUDIO_IO_DeInit();
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/* Initialize the Control interface of the Audio Codec */
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AUDIO_IO_Init();
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}
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return 0;
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}
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/**
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* @}
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*/
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/** @addtogroup CS42L51_Private_Functions
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* @{
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*/
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/**
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* @brief Write and optionally read back a single data.
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* @param Addr: I2C address
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* @param Reg: Reg address
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* @param Value: Data to be written
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* @retval None
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*/
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static uint8_t CODEC_IO_Write(uint8_t Addr, uint8_t Reg, uint8_t Value)
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{
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uint32_t result = 0;
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AUDIO_IO_Write(Addr, Reg, Value);
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#ifdef VERIFY_WRITTENDATA
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/* Verify that the data has been correctly written */
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result = (AUDIO_IO_Read(Addr, Reg) == Value)? 0:1;
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#endif /* VERIFY_WRITTENDATA */
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return result;
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}
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/**
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* @}
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*/
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/**
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* @}
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*/
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/**
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* @}
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*/
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/**
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* @}
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*/
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/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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