P5_SETR2.elf: file format elf32-littlearm Sections: Idx Name Size VMA LMA File off Algn 0 .isr_vector 00000188 08000000 08000000 00001000 2**0 CONTENTS, ALLOC, LOAD, READONLY, DATA 1 .text 0001431c 08000190 08000190 00001190 2**4 CONTENTS, ALLOC, LOAD, READONLY, CODE 2 .rodata 00000ef4 080144b0 080144b0 000154b0 2**3 CONTENTS, ALLOC, LOAD, READONLY, DATA 3 .ARM.extab 00000000 080153a4 080153a4 0001729c 2**0 CONTENTS, READONLY 4 .ARM 00000008 080153a4 080153a4 000163a4 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA 5 .preinit_array 00000000 080153ac 080153ac 0001729c 2**0 CONTENTS, ALLOC, LOAD, DATA 6 .init_array 00000004 080153ac 080153ac 000163ac 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA 7 .fini_array 00000004 080153b0 080153b0 000163b0 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA 8 .data 0000029c 20000000 080153b4 00017000 2**2 CONTENTS, ALLOC, LOAD, DATA 9 .bss 00003414 2000029c 08015650 0001729c 2**2 ALLOC 10 ._user_heap_stack 00000600 200036b0 08015650 000176b0 2**0 ALLOC 11 .ARM.attributes 00000030 00000000 00000000 0001729c 2**0 CONTENTS, READONLY 12 .debug_info 0003267a 00000000 00000000 000172cc 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 13 .debug_abbrev 000073ae 00000000 00000000 00049946 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 14 .debug_aranges 00002cf0 00000000 00000000 00050cf8 2**3 CONTENTS, READONLY, DEBUGGING, OCTETS 15 .debug_rnglists 000022a2 00000000 00000000 000539e8 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 16 .debug_macro 000302c4 00000000 00000000 00055c8a 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 17 .debug_line 00035512 00000000 00000000 00085f4e 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 18 .debug_str 00112e77 00000000 00000000 000bb460 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 19 .comment 00000043 00000000 00000000 001ce2d7 2**0 CONTENTS, READONLY 20 .debug_frame 0000d628 00000000 00000000 001ce31c 2**2 CONTENTS, READONLY, DEBUGGING, OCTETS 21 .debug_line_str 00000061 00000000 00000000 001db944 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS Disassembly of section .text: 08000190 <__do_global_dtors_aux>: 8000190: b510 push {r4, lr} 8000192: 4c05 ldr r4, [pc, #20] @ (80001a8 <__do_global_dtors_aux+0x18>) 8000194: 7823 ldrb r3, [r4, #0] 8000196: b933 cbnz r3, 80001a6 <__do_global_dtors_aux+0x16> 8000198: 4b04 ldr r3, [pc, #16] @ (80001ac <__do_global_dtors_aux+0x1c>) 800019a: b113 cbz r3, 80001a2 <__do_global_dtors_aux+0x12> 800019c: 4804 ldr r0, [pc, #16] @ (80001b0 <__do_global_dtors_aux+0x20>) 800019e: f3af 8000 nop.w 80001a2: 2301 movs r3, #1 80001a4: 7023 strb r3, [r4, #0] 80001a6: bd10 pop {r4, pc} 80001a8: 2000029c .word 0x2000029c 80001ac: 00000000 .word 0x00000000 80001b0: 08014494 .word 0x08014494 080001b4 : 80001b4: b508 push {r3, lr} 80001b6: 4b03 ldr r3, [pc, #12] @ (80001c4 ) 80001b8: b11b cbz r3, 80001c2 80001ba: 4903 ldr r1, [pc, #12] @ (80001c8 ) 80001bc: 4803 ldr r0, [pc, #12] @ (80001cc ) 80001be: f3af 8000 nop.w 80001c2: bd08 pop {r3, pc} 80001c4: 00000000 .word 0x00000000 80001c8: 200002a0 .word 0x200002a0 80001cc: 08014494 .word 0x08014494 080001d0 : 80001d0: f810 2b01 ldrb.w r2, [r0], #1 80001d4: f811 3b01 ldrb.w r3, [r1], #1 80001d8: 2a01 cmp r2, #1 80001da: bf28 it cs 80001dc: 429a cmpcs r2, r3 80001de: d0f7 beq.n 80001d0 80001e0: 1ad0 subs r0, r2, r3 80001e2: 4770 bx lr ... 080001f0 : 80001f0: f001 01ff and.w r1, r1, #255 @ 0xff 80001f4: 2a10 cmp r2, #16 80001f6: db2b blt.n 8000250 80001f8: f010 0f07 tst.w r0, #7 80001fc: d008 beq.n 8000210 80001fe: f810 3b01 ldrb.w r3, [r0], #1 8000202: 3a01 subs r2, #1 8000204: 428b cmp r3, r1 8000206: d02d beq.n 8000264 8000208: f010 0f07 tst.w r0, #7 800020c: b342 cbz r2, 8000260 800020e: d1f6 bne.n 80001fe 8000210: b4f0 push {r4, r5, r6, r7} 8000212: ea41 2101 orr.w r1, r1, r1, lsl #8 8000216: ea41 4101 orr.w r1, r1, r1, lsl #16 800021a: f022 0407 bic.w r4, r2, #7 800021e: f07f 0700 mvns.w r7, #0 8000222: 2300 movs r3, #0 8000224: e8f0 5602 ldrd r5, r6, [r0], #8 8000228: 3c08 subs r4, #8 800022a: ea85 0501 eor.w r5, r5, r1 800022e: ea86 0601 eor.w r6, r6, r1 8000232: fa85 f547 uadd8 r5, r5, r7 8000236: faa3 f587 sel r5, r3, r7 800023a: fa86 f647 uadd8 r6, r6, r7 800023e: faa5 f687 sel r6, r5, r7 8000242: b98e cbnz r6, 8000268 8000244: d1ee bne.n 8000224 8000246: bcf0 pop {r4, r5, r6, r7} 8000248: f001 01ff and.w r1, r1, #255 @ 0xff 800024c: f002 0207 and.w r2, r2, #7 8000250: b132 cbz r2, 8000260 8000252: f810 3b01 ldrb.w r3, [r0], #1 8000256: 3a01 subs r2, #1 8000258: ea83 0301 eor.w r3, r3, r1 800025c: b113 cbz r3, 8000264 800025e: d1f8 bne.n 8000252 8000260: 2000 movs r0, #0 8000262: 4770 bx lr 8000264: 3801 subs r0, #1 8000266: 4770 bx lr 8000268: 2d00 cmp r5, #0 800026a: bf06 itte eq 800026c: 4635 moveq r5, r6 800026e: 3803 subeq r0, #3 8000270: 3807 subne r0, #7 8000272: f015 0f01 tst.w r5, #1 8000276: d107 bne.n 8000288 8000278: 3001 adds r0, #1 800027a: f415 7f80 tst.w r5, #256 @ 0x100 800027e: bf02 ittt eq 8000280: 3001 addeq r0, #1 8000282: f415 3fc0 tsteq.w r5, #98304 @ 0x18000 8000286: 3001 addeq r0, #1 8000288: bcf0 pop {r4, r5, r6, r7} 800028a: 3801 subs r0, #1 800028c: 4770 bx lr 800028e: bf00 nop 08000290 : 8000290: 4603 mov r3, r0 8000292: f813 2b01 ldrb.w r2, [r3], #1 8000296: 2a00 cmp r2, #0 8000298: d1fb bne.n 8000292 800029a: 1a18 subs r0, r3, r0 800029c: 3801 subs r0, #1 800029e: 4770 bx lr 080002a0 <__aeabi_drsub>: 80002a0: f081 4100 eor.w r1, r1, #2147483648 @ 0x80000000 80002a4: e002 b.n 80002ac <__adddf3> 80002a6: bf00 nop 080002a8 <__aeabi_dsub>: 80002a8: f083 4300 eor.w r3, r3, #2147483648 @ 0x80000000 080002ac <__adddf3>: 80002ac: b530 push {r4, r5, lr} 80002ae: ea4f 0441 mov.w r4, r1, lsl #1 80002b2: ea4f 0543 mov.w r5, r3, lsl #1 80002b6: ea94 0f05 teq r4, r5 80002ba: bf08 it eq 80002bc: ea90 0f02 teqeq r0, r2 80002c0: bf1f itttt ne 80002c2: ea54 0c00 orrsne.w ip, r4, r0 80002c6: ea55 0c02 orrsne.w ip, r5, r2 80002ca: ea7f 5c64 mvnsne.w ip, r4, asr #21 80002ce: ea7f 5c65 mvnsne.w ip, r5, asr #21 80002d2: f000 80e2 beq.w 800049a <__adddf3+0x1ee> 80002d6: ea4f 5454 mov.w r4, r4, lsr #21 80002da: ebd4 5555 rsbs r5, r4, r5, lsr #21 80002de: bfb8 it lt 80002e0: 426d neglt r5, r5 80002e2: dd0c ble.n 80002fe <__adddf3+0x52> 80002e4: 442c add r4, r5 80002e6: ea80 0202 eor.w r2, r0, r2 80002ea: ea81 0303 eor.w r3, r1, r3 80002ee: ea82 0000 eor.w r0, r2, r0 80002f2: ea83 0101 eor.w r1, r3, r1 80002f6: ea80 0202 eor.w r2, r0, r2 80002fa: ea81 0303 eor.w r3, r1, r3 80002fe: 2d36 cmp r5, #54 @ 0x36 8000300: bf88 it hi 8000302: bd30 pophi {r4, r5, pc} 8000304: f011 4f00 tst.w r1, #2147483648 @ 0x80000000 8000308: ea4f 3101 mov.w r1, r1, lsl #12 800030c: f44f 1c80 mov.w ip, #1048576 @ 0x100000 8000310: ea4c 3111 orr.w r1, ip, r1, lsr #12 8000314: d002 beq.n 800031c <__adddf3+0x70> 8000316: 4240 negs r0, r0 8000318: eb61 0141 sbc.w r1, r1, r1, lsl #1 800031c: f013 4f00 tst.w r3, #2147483648 @ 0x80000000 8000320: ea4f 3303 mov.w r3, r3, lsl #12 8000324: ea4c 3313 orr.w r3, ip, r3, lsr #12 8000328: d002 beq.n 8000330 <__adddf3+0x84> 800032a: 4252 negs r2, r2 800032c: eb63 0343 sbc.w r3, r3, r3, lsl #1 8000330: ea94 0f05 teq r4, r5 8000334: f000 80a7 beq.w 8000486 <__adddf3+0x1da> 8000338: f1a4 0401 sub.w r4, r4, #1 800033c: f1d5 0e20 rsbs lr, r5, #32 8000340: db0d blt.n 800035e <__adddf3+0xb2> 8000342: fa02 fc0e lsl.w ip, r2, lr 8000346: fa22 f205 lsr.w r2, r2, r5 800034a: 1880 adds r0, r0, r2 800034c: f141 0100 adc.w r1, r1, #0 8000350: fa03 f20e lsl.w r2, r3, lr 8000354: 1880 adds r0, r0, r2 8000356: fa43 f305 asr.w r3, r3, r5 800035a: 4159 adcs r1, r3 800035c: e00e b.n 800037c <__adddf3+0xd0> 800035e: f1a5 0520 sub.w r5, r5, #32 8000362: f10e 0e20 add.w lr, lr, #32 8000366: 2a01 cmp r2, #1 8000368: fa03 fc0e lsl.w ip, r3, lr 800036c: bf28 it cs 800036e: f04c 0c02 orrcs.w ip, ip, #2 8000372: fa43 f305 asr.w r3, r3, r5 8000376: 18c0 adds r0, r0, r3 8000378: eb51 71e3 adcs.w r1, r1, r3, asr #31 800037c: f001 4500 and.w r5, r1, #2147483648 @ 0x80000000 8000380: d507 bpl.n 8000392 <__adddf3+0xe6> 8000382: f04f 0e00 mov.w lr, #0 8000386: f1dc 0c00 rsbs ip, ip, #0 800038a: eb7e 0000 sbcs.w r0, lr, r0 800038e: eb6e 0101 sbc.w r1, lr, r1 8000392: f5b1 1f80 cmp.w r1, #1048576 @ 0x100000 8000396: d31b bcc.n 80003d0 <__adddf3+0x124> 8000398: f5b1 1f00 cmp.w r1, #2097152 @ 0x200000 800039c: d30c bcc.n 80003b8 <__adddf3+0x10c> 800039e: 0849 lsrs r1, r1, #1 80003a0: ea5f 0030 movs.w r0, r0, rrx 80003a4: ea4f 0c3c mov.w ip, ip, rrx 80003a8: f104 0401 add.w r4, r4, #1 80003ac: ea4f 5244 mov.w r2, r4, lsl #21 80003b0: f512 0f80 cmn.w r2, #4194304 @ 0x400000 80003b4: f080 809a bcs.w 80004ec <__adddf3+0x240> 80003b8: f1bc 4f00 cmp.w ip, #2147483648 @ 0x80000000 80003bc: bf08 it eq 80003be: ea5f 0c50 movseq.w ip, r0, lsr #1 80003c2: f150 0000 adcs.w r0, r0, #0 80003c6: eb41 5104 adc.w r1, r1, r4, lsl #20 80003ca: ea41 0105 orr.w r1, r1, r5 80003ce: bd30 pop {r4, r5, pc} 80003d0: ea5f 0c4c movs.w ip, ip, lsl #1 80003d4: 4140 adcs r0, r0 80003d6: eb41 0101 adc.w r1, r1, r1 80003da: 3c01 subs r4, #1 80003dc: bf28 it cs 80003de: f5b1 1f80 cmpcs.w r1, #1048576 @ 0x100000 80003e2: d2e9 bcs.n 80003b8 <__adddf3+0x10c> 80003e4: f091 0f00 teq r1, #0 80003e8: bf04 itt eq 80003ea: 4601 moveq r1, r0 80003ec: 2000 moveq r0, #0 80003ee: fab1 f381 clz r3, r1 80003f2: bf08 it eq 80003f4: 3320 addeq r3, #32 80003f6: f1a3 030b sub.w r3, r3, #11 80003fa: f1b3 0220 subs.w r2, r3, #32 80003fe: da0c bge.n 800041a <__adddf3+0x16e> 8000400: 320c adds r2, #12 8000402: dd08 ble.n 8000416 <__adddf3+0x16a> 8000404: f102 0c14 add.w ip, r2, #20 8000408: f1c2 020c rsb r2, r2, #12 800040c: fa01 f00c lsl.w r0, r1, ip 8000410: fa21 f102 lsr.w r1, r1, r2 8000414: e00c b.n 8000430 <__adddf3+0x184> 8000416: f102 0214 add.w r2, r2, #20 800041a: bfd8 it le 800041c: f1c2 0c20 rsble ip, r2, #32 8000420: fa01 f102 lsl.w r1, r1, r2 8000424: fa20 fc0c lsr.w ip, r0, ip 8000428: bfdc itt le 800042a: ea41 010c orrle.w r1, r1, ip 800042e: 4090 lslle r0, r2 8000430: 1ae4 subs r4, r4, r3 8000432: bfa2 ittt ge 8000434: eb01 5104 addge.w r1, r1, r4, lsl #20 8000438: 4329 orrge r1, r5 800043a: bd30 popge {r4, r5, pc} 800043c: ea6f 0404 mvn.w r4, r4 8000440: 3c1f subs r4, #31 8000442: da1c bge.n 800047e <__adddf3+0x1d2> 8000444: 340c adds r4, #12 8000446: dc0e bgt.n 8000466 <__adddf3+0x1ba> 8000448: f104 0414 add.w r4, r4, #20 800044c: f1c4 0220 rsb r2, r4, #32 8000450: fa20 f004 lsr.w r0, r0, r4 8000454: fa01 f302 lsl.w r3, r1, r2 8000458: ea40 0003 orr.w r0, r0, r3 800045c: fa21 f304 lsr.w r3, r1, r4 8000460: ea45 0103 orr.w r1, r5, r3 8000464: bd30 pop {r4, r5, pc} 8000466: f1c4 040c rsb r4, r4, #12 800046a: f1c4 0220 rsb r2, r4, #32 800046e: fa20 f002 lsr.w r0, r0, r2 8000472: fa01 f304 lsl.w r3, r1, r4 8000476: ea40 0003 orr.w r0, r0, r3 800047a: 4629 mov r1, r5 800047c: bd30 pop {r4, r5, pc} 800047e: fa21 f004 lsr.w r0, r1, r4 8000482: 4629 mov r1, r5 8000484: bd30 pop {r4, r5, pc} 8000486: f094 0f00 teq r4, #0 800048a: f483 1380 eor.w r3, r3, #1048576 @ 0x100000 800048e: bf06 itte eq 8000490: f481 1180 eoreq.w r1, r1, #1048576 @ 0x100000 8000494: 3401 addeq r4, #1 8000496: 3d01 subne r5, #1 8000498: e74e b.n 8000338 <__adddf3+0x8c> 800049a: ea7f 5c64 mvns.w ip, r4, asr #21 800049e: bf18 it ne 80004a0: ea7f 5c65 mvnsne.w ip, r5, asr #21 80004a4: d029 beq.n 80004fa <__adddf3+0x24e> 80004a6: ea94 0f05 teq r4, r5 80004aa: bf08 it eq 80004ac: ea90 0f02 teqeq r0, r2 80004b0: d005 beq.n 80004be <__adddf3+0x212> 80004b2: ea54 0c00 orrs.w ip, r4, r0 80004b6: bf04 itt eq 80004b8: 4619 moveq r1, r3 80004ba: 4610 moveq r0, r2 80004bc: bd30 pop {r4, r5, pc} 80004be: ea91 0f03 teq r1, r3 80004c2: bf1e ittt ne 80004c4: 2100 movne r1, #0 80004c6: 2000 movne r0, #0 80004c8: bd30 popne {r4, r5, pc} 80004ca: ea5f 5c54 movs.w ip, r4, lsr #21 80004ce: d105 bne.n 80004dc <__adddf3+0x230> 80004d0: 0040 lsls r0, r0, #1 80004d2: 4149 adcs r1, r1 80004d4: bf28 it cs 80004d6: f041 4100 orrcs.w r1, r1, #2147483648 @ 0x80000000 80004da: bd30 pop {r4, r5, pc} 80004dc: f514 0480 adds.w r4, r4, #4194304 @ 0x400000 80004e0: bf3c itt cc 80004e2: f501 1180 addcc.w r1, r1, #1048576 @ 0x100000 80004e6: bd30 popcc {r4, r5, pc} 80004e8: f001 4500 and.w r5, r1, #2147483648 @ 0x80000000 80004ec: f045 41fe orr.w r1, r5, #2130706432 @ 0x7f000000 80004f0: f441 0170 orr.w r1, r1, #15728640 @ 0xf00000 80004f4: f04f 0000 mov.w r0, #0 80004f8: bd30 pop {r4, r5, pc} 80004fa: ea7f 5c64 mvns.w ip, r4, asr #21 80004fe: bf1a itte ne 8000500: 4619 movne r1, r3 8000502: 4610 movne r0, r2 8000504: ea7f 5c65 mvnseq.w ip, r5, asr #21 8000508: bf1c itt ne 800050a: 460b movne r3, r1 800050c: 4602 movne r2, r0 800050e: ea50 3401 orrs.w r4, r0, r1, lsl #12 8000512: bf06 itte eq 8000514: ea52 3503 orrseq.w r5, r2, r3, lsl #12 8000518: ea91 0f03 teqeq r1, r3 800051c: f441 2100 orrne.w r1, r1, #524288 @ 0x80000 8000520: bd30 pop {r4, r5, pc} 8000522: bf00 nop 08000524 <__aeabi_ui2d>: 8000524: f090 0f00 teq r0, #0 8000528: bf04 itt eq 800052a: 2100 moveq r1, #0 800052c: 4770 bxeq lr 800052e: b530 push {r4, r5, lr} 8000530: f44f 6480 mov.w r4, #1024 @ 0x400 8000534: f104 0432 add.w r4, r4, #50 @ 0x32 8000538: f04f 0500 mov.w r5, #0 800053c: f04f 0100 mov.w r1, #0 8000540: e750 b.n 80003e4 <__adddf3+0x138> 8000542: bf00 nop 08000544 <__aeabi_i2d>: 8000544: f090 0f00 teq r0, #0 8000548: bf04 itt eq 800054a: 2100 moveq r1, #0 800054c: 4770 bxeq lr 800054e: b530 push {r4, r5, lr} 8000550: f44f 6480 mov.w r4, #1024 @ 0x400 8000554: f104 0432 add.w r4, r4, #50 @ 0x32 8000558: f010 4500 ands.w r5, r0, #2147483648 @ 0x80000000 800055c: bf48 it mi 800055e: 4240 negmi r0, r0 8000560: f04f 0100 mov.w r1, #0 8000564: e73e b.n 80003e4 <__adddf3+0x138> 8000566: bf00 nop 08000568 <__aeabi_f2d>: 8000568: 0042 lsls r2, r0, #1 800056a: ea4f 01e2 mov.w r1, r2, asr #3 800056e: ea4f 0131 mov.w r1, r1, rrx 8000572: ea4f 7002 mov.w r0, r2, lsl #28 8000576: bf1f itttt ne 8000578: f012 437f andsne.w r3, r2, #4278190080 @ 0xff000000 800057c: f093 4f7f teqne r3, #4278190080 @ 0xff000000 8000580: f081 5160 eorne.w r1, r1, #939524096 @ 0x38000000 8000584: 4770 bxne lr 8000586: f032 427f bics.w r2, r2, #4278190080 @ 0xff000000 800058a: bf08 it eq 800058c: 4770 bxeq lr 800058e: f093 4f7f teq r3, #4278190080 @ 0xff000000 8000592: bf04 itt eq 8000594: f441 2100 orreq.w r1, r1, #524288 @ 0x80000 8000598: 4770 bxeq lr 800059a: b530 push {r4, r5, lr} 800059c: f44f 7460 mov.w r4, #896 @ 0x380 80005a0: f001 4500 and.w r5, r1, #2147483648 @ 0x80000000 80005a4: f021 4100 bic.w r1, r1, #2147483648 @ 0x80000000 80005a8: e71c b.n 80003e4 <__adddf3+0x138> 80005aa: bf00 nop 080005ac <__aeabi_ul2d>: 80005ac: ea50 0201 orrs.w r2, r0, r1 80005b0: bf08 it eq 80005b2: 4770 bxeq lr 80005b4: b530 push {r4, r5, lr} 80005b6: f04f 0500 mov.w r5, #0 80005ba: e00a b.n 80005d2 <__aeabi_l2d+0x16> 080005bc <__aeabi_l2d>: 80005bc: ea50 0201 orrs.w r2, r0, r1 80005c0: bf08 it eq 80005c2: 4770 bxeq lr 80005c4: b530 push {r4, r5, lr} 80005c6: f011 4500 ands.w r5, r1, #2147483648 @ 0x80000000 80005ca: d502 bpl.n 80005d2 <__aeabi_l2d+0x16> 80005cc: 4240 negs r0, r0 80005ce: eb61 0141 sbc.w r1, r1, r1, lsl #1 80005d2: f44f 6480 mov.w r4, #1024 @ 0x400 80005d6: f104 0432 add.w r4, r4, #50 @ 0x32 80005da: ea5f 5c91 movs.w ip, r1, lsr #22 80005de: f43f aed8 beq.w 8000392 <__adddf3+0xe6> 80005e2: f04f 0203 mov.w r2, #3 80005e6: ea5f 0cdc movs.w ip, ip, lsr #3 80005ea: bf18 it ne 80005ec: 3203 addne r2, #3 80005ee: ea5f 0cdc movs.w ip, ip, lsr #3 80005f2: bf18 it ne 80005f4: 3203 addne r2, #3 80005f6: eb02 02dc add.w r2, r2, ip, lsr #3 80005fa: f1c2 0320 rsb r3, r2, #32 80005fe: fa00 fc03 lsl.w ip, r0, r3 8000602: fa20 f002 lsr.w r0, r0, r2 8000606: fa01 fe03 lsl.w lr, r1, r3 800060a: ea40 000e orr.w r0, r0, lr 800060e: fa21 f102 lsr.w r1, r1, r2 8000612: 4414 add r4, r2 8000614: e6bd b.n 8000392 <__adddf3+0xe6> 8000616: bf00 nop 08000618 <__aeabi_dmul>: 8000618: b570 push {r4, r5, r6, lr} 800061a: f04f 0cff mov.w ip, #255 @ 0xff 800061e: f44c 6ce0 orr.w ip, ip, #1792 @ 0x700 8000622: ea1c 5411 ands.w r4, ip, r1, lsr #20 8000626: bf1d ittte ne 8000628: ea1c 5513 andsne.w r5, ip, r3, lsr #20 800062c: ea94 0f0c teqne r4, ip 8000630: ea95 0f0c teqne r5, ip 8000634: f000 f8de bleq 80007f4 <__aeabi_dmul+0x1dc> 8000638: 442c add r4, r5 800063a: ea81 0603 eor.w r6, r1, r3 800063e: ea21 514c bic.w r1, r1, ip, lsl #21 8000642: ea23 534c bic.w r3, r3, ip, lsl #21 8000646: ea50 3501 orrs.w r5, r0, r1, lsl #12 800064a: bf18 it ne 800064c: ea52 3503 orrsne.w r5, r2, r3, lsl #12 8000650: f441 1180 orr.w r1, r1, #1048576 @ 0x100000 8000654: f443 1380 orr.w r3, r3, #1048576 @ 0x100000 8000658: d038 beq.n 80006cc <__aeabi_dmul+0xb4> 800065a: fba0 ce02 umull ip, lr, r0, r2 800065e: f04f 0500 mov.w r5, #0 8000662: fbe1 e502 umlal lr, r5, r1, r2 8000666: f006 4200 and.w r2, r6, #2147483648 @ 0x80000000 800066a: fbe0 e503 umlal lr, r5, r0, r3 800066e: f04f 0600 mov.w r6, #0 8000672: fbe1 5603 umlal r5, r6, r1, r3 8000676: f09c 0f00 teq ip, #0 800067a: bf18 it ne 800067c: f04e 0e01 orrne.w lr, lr, #1 8000680: f1a4 04ff sub.w r4, r4, #255 @ 0xff 8000684: f5b6 7f00 cmp.w r6, #512 @ 0x200 8000688: f564 7440 sbc.w r4, r4, #768 @ 0x300 800068c: d204 bcs.n 8000698 <__aeabi_dmul+0x80> 800068e: ea5f 0e4e movs.w lr, lr, lsl #1 8000692: 416d adcs r5, r5 8000694: eb46 0606 adc.w r6, r6, r6 8000698: ea42 21c6 orr.w r1, r2, r6, lsl #11 800069c: ea41 5155 orr.w r1, r1, r5, lsr #21 80006a0: ea4f 20c5 mov.w r0, r5, lsl #11 80006a4: ea40 505e orr.w r0, r0, lr, lsr #21 80006a8: ea4f 2ece mov.w lr, lr, lsl #11 80006ac: f1b4 0cfd subs.w ip, r4, #253 @ 0xfd 80006b0: bf88 it hi 80006b2: f5bc 6fe0 cmphi.w ip, #1792 @ 0x700 80006b6: d81e bhi.n 80006f6 <__aeabi_dmul+0xde> 80006b8: f1be 4f00 cmp.w lr, #2147483648 @ 0x80000000 80006bc: bf08 it eq 80006be: ea5f 0e50 movseq.w lr, r0, lsr #1 80006c2: f150 0000 adcs.w r0, r0, #0 80006c6: eb41 5104 adc.w r1, r1, r4, lsl #20 80006ca: bd70 pop {r4, r5, r6, pc} 80006cc: f006 4600 and.w r6, r6, #2147483648 @ 0x80000000 80006d0: ea46 0101 orr.w r1, r6, r1 80006d4: ea40 0002 orr.w r0, r0, r2 80006d8: ea81 0103 eor.w r1, r1, r3 80006dc: ebb4 045c subs.w r4, r4, ip, lsr #1 80006e0: bfc2 ittt gt 80006e2: ebd4 050c rsbsgt r5, r4, ip 80006e6: ea41 5104 orrgt.w r1, r1, r4, lsl #20 80006ea: bd70 popgt {r4, r5, r6, pc} 80006ec: f441 1180 orr.w r1, r1, #1048576 @ 0x100000 80006f0: f04f 0e00 mov.w lr, #0 80006f4: 3c01 subs r4, #1 80006f6: f300 80ab bgt.w 8000850 <__aeabi_dmul+0x238> 80006fa: f114 0f36 cmn.w r4, #54 @ 0x36 80006fe: bfde ittt le 8000700: 2000 movle r0, #0 8000702: f001 4100 andle.w r1, r1, #2147483648 @ 0x80000000 8000706: bd70 pople {r4, r5, r6, pc} 8000708: f1c4 0400 rsb r4, r4, #0 800070c: 3c20 subs r4, #32 800070e: da35 bge.n 800077c <__aeabi_dmul+0x164> 8000710: 340c adds r4, #12 8000712: dc1b bgt.n 800074c <__aeabi_dmul+0x134> 8000714: f104 0414 add.w r4, r4, #20 8000718: f1c4 0520 rsb r5, r4, #32 800071c: fa00 f305 lsl.w r3, r0, r5 8000720: fa20 f004 lsr.w r0, r0, r4 8000724: fa01 f205 lsl.w r2, r1, r5 8000728: ea40 0002 orr.w r0, r0, r2 800072c: f001 4200 and.w r2, r1, #2147483648 @ 0x80000000 8000730: f021 4100 bic.w r1, r1, #2147483648 @ 0x80000000 8000734: eb10 70d3 adds.w r0, r0, r3, lsr #31 8000738: fa21 f604 lsr.w r6, r1, r4 800073c: eb42 0106 adc.w r1, r2, r6 8000740: ea5e 0e43 orrs.w lr, lr, r3, lsl #1 8000744: bf08 it eq 8000746: ea20 70d3 biceq.w r0, r0, r3, lsr #31 800074a: bd70 pop {r4, r5, r6, pc} 800074c: f1c4 040c rsb r4, r4, #12 8000750: f1c4 0520 rsb r5, r4, #32 8000754: fa00 f304 lsl.w r3, r0, r4 8000758: fa20 f005 lsr.w r0, r0, r5 800075c: fa01 f204 lsl.w r2, r1, r4 8000760: ea40 0002 orr.w r0, r0, r2 8000764: f001 4100 and.w r1, r1, #2147483648 @ 0x80000000 8000768: eb10 70d3 adds.w r0, r0, r3, lsr #31 800076c: f141 0100 adc.w r1, r1, #0 8000770: ea5e 0e43 orrs.w lr, lr, r3, lsl #1 8000774: bf08 it eq 8000776: ea20 70d3 biceq.w r0, r0, r3, lsr #31 800077a: bd70 pop {r4, r5, r6, pc} 800077c: f1c4 0520 rsb r5, r4, #32 8000780: fa00 f205 lsl.w r2, r0, r5 8000784: ea4e 0e02 orr.w lr, lr, r2 8000788: fa20 f304 lsr.w r3, r0, r4 800078c: fa01 f205 lsl.w r2, r1, r5 8000790: ea43 0302 orr.w r3, r3, r2 8000794: fa21 f004 lsr.w r0, r1, r4 8000798: f001 4100 and.w r1, r1, #2147483648 @ 0x80000000 800079c: fa21 f204 lsr.w r2, r1, r4 80007a0: ea20 0002 bic.w r0, r0, r2 80007a4: eb00 70d3 add.w r0, r0, r3, lsr #31 80007a8: ea5e 0e43 orrs.w lr, lr, r3, lsl #1 80007ac: bf08 it eq 80007ae: ea20 70d3 biceq.w r0, r0, r3, lsr #31 80007b2: bd70 pop {r4, r5, r6, pc} 80007b4: f094 0f00 teq r4, #0 80007b8: d10f bne.n 80007da <__aeabi_dmul+0x1c2> 80007ba: f001 4600 and.w r6, r1, #2147483648 @ 0x80000000 80007be: 0040 lsls r0, r0, #1 80007c0: eb41 0101 adc.w r1, r1, r1 80007c4: f411 1f80 tst.w r1, #1048576 @ 0x100000 80007c8: bf08 it eq 80007ca: 3c01 subeq r4, #1 80007cc: d0f7 beq.n 80007be <__aeabi_dmul+0x1a6> 80007ce: ea41 0106 orr.w r1, r1, r6 80007d2: f095 0f00 teq r5, #0 80007d6: bf18 it ne 80007d8: 4770 bxne lr 80007da: f003 4600 and.w r6, r3, #2147483648 @ 0x80000000 80007de: 0052 lsls r2, r2, #1 80007e0: eb43 0303 adc.w r3, r3, r3 80007e4: f413 1f80 tst.w r3, #1048576 @ 0x100000 80007e8: bf08 it eq 80007ea: 3d01 subeq r5, #1 80007ec: d0f7 beq.n 80007de <__aeabi_dmul+0x1c6> 80007ee: ea43 0306 orr.w r3, r3, r6 80007f2: 4770 bx lr 80007f4: ea94 0f0c teq r4, ip 80007f8: ea0c 5513 and.w r5, ip, r3, lsr #20 80007fc: bf18 it ne 80007fe: ea95 0f0c teqne r5, ip 8000802: d00c beq.n 800081e <__aeabi_dmul+0x206> 8000804: ea50 0641 orrs.w r6, r0, r1, lsl #1 8000808: bf18 it ne 800080a: ea52 0643 orrsne.w r6, r2, r3, lsl #1 800080e: d1d1 bne.n 80007b4 <__aeabi_dmul+0x19c> 8000810: ea81 0103 eor.w r1, r1, r3 8000814: f001 4100 and.w r1, r1, #2147483648 @ 0x80000000 8000818: f04f 0000 mov.w r0, #0 800081c: bd70 pop {r4, r5, r6, pc} 800081e: ea50 0641 orrs.w r6, r0, r1, lsl #1 8000822: bf06 itte eq 8000824: 4610 moveq r0, r2 8000826: 4619 moveq r1, r3 8000828: ea52 0643 orrsne.w r6, r2, r3, lsl #1 800082c: d019 beq.n 8000862 <__aeabi_dmul+0x24a> 800082e: ea94 0f0c teq r4, ip 8000832: d102 bne.n 800083a <__aeabi_dmul+0x222> 8000834: ea50 3601 orrs.w r6, r0, r1, lsl #12 8000838: d113 bne.n 8000862 <__aeabi_dmul+0x24a> 800083a: ea95 0f0c teq r5, ip 800083e: d105 bne.n 800084c <__aeabi_dmul+0x234> 8000840: ea52 3603 orrs.w r6, r2, r3, lsl #12 8000844: bf1c itt ne 8000846: 4610 movne r0, r2 8000848: 4619 movne r1, r3 800084a: d10a bne.n 8000862 <__aeabi_dmul+0x24a> 800084c: ea81 0103 eor.w r1, r1, r3 8000850: f001 4100 and.w r1, r1, #2147483648 @ 0x80000000 8000854: f041 41fe orr.w r1, r1, #2130706432 @ 0x7f000000 8000858: f441 0170 orr.w r1, r1, #15728640 @ 0xf00000 800085c: f04f 0000 mov.w r0, #0 8000860: bd70 pop {r4, r5, r6, pc} 8000862: f041 41fe orr.w r1, r1, #2130706432 @ 0x7f000000 8000866: f441 0178 orr.w r1, r1, #16252928 @ 0xf80000 800086a: bd70 pop {r4, r5, r6, pc} 0800086c <__aeabi_ddiv>: 800086c: b570 push {r4, r5, r6, lr} 800086e: f04f 0cff mov.w ip, #255 @ 0xff 8000872: f44c 6ce0 orr.w ip, ip, #1792 @ 0x700 8000876: ea1c 5411 ands.w r4, ip, r1, lsr #20 800087a: bf1d ittte ne 800087c: ea1c 5513 andsne.w r5, ip, r3, lsr #20 8000880: ea94 0f0c teqne r4, ip 8000884: ea95 0f0c teqne r5, ip 8000888: f000 f8a7 bleq 80009da <__aeabi_ddiv+0x16e> 800088c: eba4 0405 sub.w r4, r4, r5 8000890: ea81 0e03 eor.w lr, r1, r3 8000894: ea52 3503 orrs.w r5, r2, r3, lsl #12 8000898: ea4f 3101 mov.w r1, r1, lsl #12 800089c: f000 8088 beq.w 80009b0 <__aeabi_ddiv+0x144> 80008a0: ea4f 3303 mov.w r3, r3, lsl #12 80008a4: f04f 5580 mov.w r5, #268435456 @ 0x10000000 80008a8: ea45 1313 orr.w r3, r5, r3, lsr #4 80008ac: ea43 6312 orr.w r3, r3, r2, lsr #24 80008b0: ea4f 2202 mov.w r2, r2, lsl #8 80008b4: ea45 1511 orr.w r5, r5, r1, lsr #4 80008b8: ea45 6510 orr.w r5, r5, r0, lsr #24 80008bc: ea4f 2600 mov.w r6, r0, lsl #8 80008c0: f00e 4100 and.w r1, lr, #2147483648 @ 0x80000000 80008c4: 429d cmp r5, r3 80008c6: bf08 it eq 80008c8: 4296 cmpeq r6, r2 80008ca: f144 04fd adc.w r4, r4, #253 @ 0xfd 80008ce: f504 7440 add.w r4, r4, #768 @ 0x300 80008d2: d202 bcs.n 80008da <__aeabi_ddiv+0x6e> 80008d4: 085b lsrs r3, r3, #1 80008d6: ea4f 0232 mov.w r2, r2, rrx 80008da: 1ab6 subs r6, r6, r2 80008dc: eb65 0503 sbc.w r5, r5, r3 80008e0: 085b lsrs r3, r3, #1 80008e2: ea4f 0232 mov.w r2, r2, rrx 80008e6: f44f 1080 mov.w r0, #1048576 @ 0x100000 80008ea: f44f 2c00 mov.w ip, #524288 @ 0x80000 80008ee: ebb6 0e02 subs.w lr, r6, r2 80008f2: eb75 0e03 sbcs.w lr, r5, r3 80008f6: bf22 ittt cs 80008f8: 1ab6 subcs r6, r6, r2 80008fa: 4675 movcs r5, lr 80008fc: ea40 000c orrcs.w r0, r0, ip 8000900: 085b lsrs r3, r3, #1 8000902: ea4f 0232 mov.w r2, r2, rrx 8000906: ebb6 0e02 subs.w lr, r6, r2 800090a: eb75 0e03 sbcs.w lr, r5, r3 800090e: bf22 ittt cs 8000910: 1ab6 subcs r6, r6, r2 8000912: 4675 movcs r5, lr 8000914: ea40 005c orrcs.w r0, r0, ip, lsr #1 8000918: 085b lsrs r3, r3, #1 800091a: ea4f 0232 mov.w r2, r2, rrx 800091e: ebb6 0e02 subs.w lr, r6, r2 8000922: eb75 0e03 sbcs.w lr, r5, r3 8000926: bf22 ittt cs 8000928: 1ab6 subcs r6, r6, r2 800092a: 4675 movcs r5, lr 800092c: ea40 009c orrcs.w r0, r0, ip, lsr #2 8000930: 085b lsrs r3, r3, #1 8000932: ea4f 0232 mov.w r2, r2, rrx 8000936: ebb6 0e02 subs.w lr, r6, r2 800093a: eb75 0e03 sbcs.w lr, r5, r3 800093e: bf22 ittt cs 8000940: 1ab6 subcs r6, r6, r2 8000942: 4675 movcs r5, lr 8000944: ea40 00dc orrcs.w r0, r0, ip, lsr #3 8000948: ea55 0e06 orrs.w lr, r5, r6 800094c: d018 beq.n 8000980 <__aeabi_ddiv+0x114> 800094e: ea4f 1505 mov.w r5, r5, lsl #4 8000952: ea45 7516 orr.w r5, r5, r6, lsr #28 8000956: ea4f 1606 mov.w r6, r6, lsl #4 800095a: ea4f 03c3 mov.w r3, r3, lsl #3 800095e: ea43 7352 orr.w r3, r3, r2, lsr #29 8000962: ea4f 02c2 mov.w r2, r2, lsl #3 8000966: ea5f 1c1c movs.w ip, ip, lsr #4 800096a: d1c0 bne.n 80008ee <__aeabi_ddiv+0x82> 800096c: f411 1f80 tst.w r1, #1048576 @ 0x100000 8000970: d10b bne.n 800098a <__aeabi_ddiv+0x11e> 8000972: ea41 0100 orr.w r1, r1, r0 8000976: f04f 0000 mov.w r0, #0 800097a: f04f 4c00 mov.w ip, #2147483648 @ 0x80000000 800097e: e7b6 b.n 80008ee <__aeabi_ddiv+0x82> 8000980: f411 1f80 tst.w r1, #1048576 @ 0x100000 8000984: bf04 itt eq 8000986: 4301 orreq r1, r0 8000988: 2000 moveq r0, #0 800098a: f1b4 0cfd subs.w ip, r4, #253 @ 0xfd 800098e: bf88 it hi 8000990: f5bc 6fe0 cmphi.w ip, #1792 @ 0x700 8000994: f63f aeaf bhi.w 80006f6 <__aeabi_dmul+0xde> 8000998: ebb5 0c03 subs.w ip, r5, r3 800099c: bf04 itt eq 800099e: ebb6 0c02 subseq.w ip, r6, r2 80009a2: ea5f 0c50 movseq.w ip, r0, lsr #1 80009a6: f150 0000 adcs.w r0, r0, #0 80009aa: eb41 5104 adc.w r1, r1, r4, lsl #20 80009ae: bd70 pop {r4, r5, r6, pc} 80009b0: f00e 4e00 and.w lr, lr, #2147483648 @ 0x80000000 80009b4: ea4e 3111 orr.w r1, lr, r1, lsr #12 80009b8: eb14 045c adds.w r4, r4, ip, lsr #1 80009bc: bfc2 ittt gt 80009be: ebd4 050c rsbsgt r5, r4, ip 80009c2: ea41 5104 orrgt.w r1, r1, r4, lsl #20 80009c6: bd70 popgt {r4, r5, r6, pc} 80009c8: f441 1180 orr.w r1, r1, #1048576 @ 0x100000 80009cc: f04f 0e00 mov.w lr, #0 80009d0: 3c01 subs r4, #1 80009d2: e690 b.n 80006f6 <__aeabi_dmul+0xde> 80009d4: ea45 0e06 orr.w lr, r5, r6 80009d8: e68d b.n 80006f6 <__aeabi_dmul+0xde> 80009da: ea0c 5513 and.w r5, ip, r3, lsr #20 80009de: ea94 0f0c teq r4, ip 80009e2: bf08 it eq 80009e4: ea95 0f0c teqeq r5, ip 80009e8: f43f af3b beq.w 8000862 <__aeabi_dmul+0x24a> 80009ec: ea94 0f0c teq r4, ip 80009f0: d10a bne.n 8000a08 <__aeabi_ddiv+0x19c> 80009f2: ea50 3401 orrs.w r4, r0, r1, lsl #12 80009f6: f47f af34 bne.w 8000862 <__aeabi_dmul+0x24a> 80009fa: ea95 0f0c teq r5, ip 80009fe: f47f af25 bne.w 800084c <__aeabi_dmul+0x234> 8000a02: 4610 mov r0, r2 8000a04: 4619 mov r1, r3 8000a06: e72c b.n 8000862 <__aeabi_dmul+0x24a> 8000a08: ea95 0f0c teq r5, ip 8000a0c: d106 bne.n 8000a1c <__aeabi_ddiv+0x1b0> 8000a0e: ea52 3503 orrs.w r5, r2, r3, lsl #12 8000a12: f43f aefd beq.w 8000810 <__aeabi_dmul+0x1f8> 8000a16: 4610 mov r0, r2 8000a18: 4619 mov r1, r3 8000a1a: e722 b.n 8000862 <__aeabi_dmul+0x24a> 8000a1c: ea50 0641 orrs.w r6, r0, r1, lsl #1 8000a20: bf18 it ne 8000a22: ea52 0643 orrsne.w r6, r2, r3, lsl #1 8000a26: f47f aec5 bne.w 80007b4 <__aeabi_dmul+0x19c> 8000a2a: ea50 0441 orrs.w r4, r0, r1, lsl #1 8000a2e: f47f af0d bne.w 800084c <__aeabi_dmul+0x234> 8000a32: ea52 0543 orrs.w r5, r2, r3, lsl #1 8000a36: f47f aeeb bne.w 8000810 <__aeabi_dmul+0x1f8> 8000a3a: e712 b.n 8000862 <__aeabi_dmul+0x24a> 08000a3c <__gedf2>: 8000a3c: f04f 3cff mov.w ip, #4294967295 @ 0xffffffff 8000a40: e006 b.n 8000a50 <__cmpdf2+0x4> 8000a42: bf00 nop 08000a44 <__ledf2>: 8000a44: f04f 0c01 mov.w ip, #1 8000a48: e002 b.n 8000a50 <__cmpdf2+0x4> 8000a4a: bf00 nop 08000a4c <__cmpdf2>: 8000a4c: f04f 0c01 mov.w ip, #1 8000a50: f84d cd04 str.w ip, [sp, #-4]! 8000a54: ea4f 0c41 mov.w ip, r1, lsl #1 8000a58: ea7f 5c6c mvns.w ip, ip, asr #21 8000a5c: ea4f 0c43 mov.w ip, r3, lsl #1 8000a60: bf18 it ne 8000a62: ea7f 5c6c mvnsne.w ip, ip, asr #21 8000a66: d01b beq.n 8000aa0 <__cmpdf2+0x54> 8000a68: b001 add sp, #4 8000a6a: ea50 0c41 orrs.w ip, r0, r1, lsl #1 8000a6e: bf0c ite eq 8000a70: ea52 0c43 orrseq.w ip, r2, r3, lsl #1 8000a74: ea91 0f03 teqne r1, r3 8000a78: bf02 ittt eq 8000a7a: ea90 0f02 teqeq r0, r2 8000a7e: 2000 moveq r0, #0 8000a80: 4770 bxeq lr 8000a82: f110 0f00 cmn.w r0, #0 8000a86: ea91 0f03 teq r1, r3 8000a8a: bf58 it pl 8000a8c: 4299 cmppl r1, r3 8000a8e: bf08 it eq 8000a90: 4290 cmpeq r0, r2 8000a92: bf2c ite cs 8000a94: 17d8 asrcs r0, r3, #31 8000a96: ea6f 70e3 mvncc.w r0, r3, asr #31 8000a9a: f040 0001 orr.w r0, r0, #1 8000a9e: 4770 bx lr 8000aa0: ea4f 0c41 mov.w ip, r1, lsl #1 8000aa4: ea7f 5c6c mvns.w ip, ip, asr #21 8000aa8: d102 bne.n 8000ab0 <__cmpdf2+0x64> 8000aaa: ea50 3c01 orrs.w ip, r0, r1, lsl #12 8000aae: d107 bne.n 8000ac0 <__cmpdf2+0x74> 8000ab0: ea4f 0c43 mov.w ip, r3, lsl #1 8000ab4: ea7f 5c6c mvns.w ip, ip, asr #21 8000ab8: d1d6 bne.n 8000a68 <__cmpdf2+0x1c> 8000aba: ea52 3c03 orrs.w ip, r2, r3, lsl #12 8000abe: d0d3 beq.n 8000a68 <__cmpdf2+0x1c> 8000ac0: f85d 0b04 ldr.w r0, [sp], #4 8000ac4: 4770 bx lr 8000ac6: bf00 nop 08000ac8 <__aeabi_cdrcmple>: 8000ac8: 4684 mov ip, r0 8000aca: 4610 mov r0, r2 8000acc: 4662 mov r2, ip 8000ace: 468c mov ip, r1 8000ad0: 4619 mov r1, r3 8000ad2: 4663 mov r3, ip 8000ad4: e000 b.n 8000ad8 <__aeabi_cdcmpeq> 8000ad6: bf00 nop 08000ad8 <__aeabi_cdcmpeq>: 8000ad8: b501 push {r0, lr} 8000ada: f7ff ffb7 bl 8000a4c <__cmpdf2> 8000ade: 2800 cmp r0, #0 8000ae0: bf48 it mi 8000ae2: f110 0f00 cmnmi.w r0, #0 8000ae6: bd01 pop {r0, pc} 08000ae8 <__aeabi_dcmpeq>: 8000ae8: f84d ed08 str.w lr, [sp, #-8]! 8000aec: f7ff fff4 bl 8000ad8 <__aeabi_cdcmpeq> 8000af0: bf0c ite eq 8000af2: 2001 moveq r0, #1 8000af4: 2000 movne r0, #0 8000af6: f85d fb08 ldr.w pc, [sp], #8 8000afa: bf00 nop 08000afc <__aeabi_dcmplt>: 8000afc: f84d ed08 str.w lr, [sp, #-8]! 8000b00: f7ff ffea bl 8000ad8 <__aeabi_cdcmpeq> 8000b04: bf34 ite cc 8000b06: 2001 movcc r0, #1 8000b08: 2000 movcs r0, #0 8000b0a: f85d fb08 ldr.w pc, [sp], #8 8000b0e: bf00 nop 08000b10 <__aeabi_dcmple>: 8000b10: f84d ed08 str.w lr, [sp, #-8]! 8000b14: f7ff ffe0 bl 8000ad8 <__aeabi_cdcmpeq> 8000b18: bf94 ite ls 8000b1a: 2001 movls r0, #1 8000b1c: 2000 movhi r0, #0 8000b1e: f85d fb08 ldr.w pc, [sp], #8 8000b22: bf00 nop 08000b24 <__aeabi_dcmpge>: 8000b24: f84d ed08 str.w lr, [sp, #-8]! 8000b28: f7ff ffce bl 8000ac8 <__aeabi_cdrcmple> 8000b2c: bf94 ite ls 8000b2e: 2001 movls r0, #1 8000b30: 2000 movhi r0, #0 8000b32: f85d fb08 ldr.w pc, [sp], #8 8000b36: bf00 nop 08000b38 <__aeabi_dcmpgt>: 8000b38: f84d ed08 str.w lr, [sp, #-8]! 8000b3c: f7ff ffc4 bl 8000ac8 <__aeabi_cdrcmple> 8000b40: bf34 ite cc 8000b42: 2001 movcc r0, #1 8000b44: 2000 movcs r0, #0 8000b46: f85d fb08 ldr.w pc, [sp], #8 8000b4a: bf00 nop 08000b4c <__aeabi_dcmpun>: 8000b4c: ea4f 0c41 mov.w ip, r1, lsl #1 8000b50: ea7f 5c6c mvns.w ip, ip, asr #21 8000b54: d102 bne.n 8000b5c <__aeabi_dcmpun+0x10> 8000b56: ea50 3c01 orrs.w ip, r0, r1, lsl #12 8000b5a: d10a bne.n 8000b72 <__aeabi_dcmpun+0x26> 8000b5c: ea4f 0c43 mov.w ip, r3, lsl #1 8000b60: ea7f 5c6c mvns.w ip, ip, asr #21 8000b64: d102 bne.n 8000b6c <__aeabi_dcmpun+0x20> 8000b66: ea52 3c03 orrs.w ip, r2, r3, lsl #12 8000b6a: d102 bne.n 8000b72 <__aeabi_dcmpun+0x26> 8000b6c: f04f 0000 mov.w r0, #0 8000b70: 4770 bx lr 8000b72: f04f 0001 mov.w r0, #1 8000b76: 4770 bx lr 08000b78 <__aeabi_d2iz>: 8000b78: ea4f 0241 mov.w r2, r1, lsl #1 8000b7c: f512 1200 adds.w r2, r2, #2097152 @ 0x200000 8000b80: d215 bcs.n 8000bae <__aeabi_d2iz+0x36> 8000b82: d511 bpl.n 8000ba8 <__aeabi_d2iz+0x30> 8000b84: f46f 7378 mvn.w r3, #992 @ 0x3e0 8000b88: ebb3 5262 subs.w r2, r3, r2, asr #21 8000b8c: d912 bls.n 8000bb4 <__aeabi_d2iz+0x3c> 8000b8e: ea4f 23c1 mov.w r3, r1, lsl #11 8000b92: f043 4300 orr.w r3, r3, #2147483648 @ 0x80000000 8000b96: ea43 5350 orr.w r3, r3, r0, lsr #21 8000b9a: f011 4f00 tst.w r1, #2147483648 @ 0x80000000 8000b9e: fa23 f002 lsr.w r0, r3, r2 8000ba2: bf18 it ne 8000ba4: 4240 negne r0, r0 8000ba6: 4770 bx lr 8000ba8: f04f 0000 mov.w r0, #0 8000bac: 4770 bx lr 8000bae: ea50 3001 orrs.w r0, r0, r1, lsl #12 8000bb2: d105 bne.n 8000bc0 <__aeabi_d2iz+0x48> 8000bb4: f011 4000 ands.w r0, r1, #2147483648 @ 0x80000000 8000bb8: bf08 it eq 8000bba: f06f 4000 mvneq.w r0, #2147483648 @ 0x80000000 8000bbe: 4770 bx lr 8000bc0: f04f 0000 mov.w r0, #0 8000bc4: 4770 bx lr 8000bc6: bf00 nop 08000bc8 <__aeabi_d2uiz>: 8000bc8: 004a lsls r2, r1, #1 8000bca: d211 bcs.n 8000bf0 <__aeabi_d2uiz+0x28> 8000bcc: f512 1200 adds.w r2, r2, #2097152 @ 0x200000 8000bd0: d211 bcs.n 8000bf6 <__aeabi_d2uiz+0x2e> 8000bd2: d50d bpl.n 8000bf0 <__aeabi_d2uiz+0x28> 8000bd4: f46f 7378 mvn.w r3, #992 @ 0x3e0 8000bd8: ebb3 5262 subs.w r2, r3, r2, asr #21 8000bdc: d40e bmi.n 8000bfc <__aeabi_d2uiz+0x34> 8000bde: ea4f 23c1 mov.w r3, r1, lsl #11 8000be2: f043 4300 orr.w r3, r3, #2147483648 @ 0x80000000 8000be6: ea43 5350 orr.w r3, r3, r0, lsr #21 8000bea: fa23 f002 lsr.w r0, r3, r2 8000bee: 4770 bx lr 8000bf0: f04f 0000 mov.w r0, #0 8000bf4: 4770 bx lr 8000bf6: ea50 3001 orrs.w r0, r0, r1, lsl #12 8000bfa: d102 bne.n 8000c02 <__aeabi_d2uiz+0x3a> 8000bfc: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff 8000c00: 4770 bx lr 8000c02: f04f 0000 mov.w r0, #0 8000c06: 4770 bx lr 08000c08 <__aeabi_d2f>: 8000c08: ea4f 0241 mov.w r2, r1, lsl #1 8000c0c: f1b2 43e0 subs.w r3, r2, #1879048192 @ 0x70000000 8000c10: bf24 itt cs 8000c12: f5b3 1c00 subscs.w ip, r3, #2097152 @ 0x200000 8000c16: f1dc 5cfe rsbscs ip, ip, #532676608 @ 0x1fc00000 8000c1a: d90d bls.n 8000c38 <__aeabi_d2f+0x30> 8000c1c: f001 4c00 and.w ip, r1, #2147483648 @ 0x80000000 8000c20: ea4f 02c0 mov.w r2, r0, lsl #3 8000c24: ea4c 7050 orr.w r0, ip, r0, lsr #29 8000c28: f1b2 4f00 cmp.w r2, #2147483648 @ 0x80000000 8000c2c: eb40 0083 adc.w r0, r0, r3, lsl #2 8000c30: bf08 it eq 8000c32: f020 0001 biceq.w r0, r0, #1 8000c36: 4770 bx lr 8000c38: f011 4f80 tst.w r1, #1073741824 @ 0x40000000 8000c3c: d121 bne.n 8000c82 <__aeabi_d2f+0x7a> 8000c3e: f113 7238 adds.w r2, r3, #48234496 @ 0x2e00000 8000c42: bfbc itt lt 8000c44: f001 4000 andlt.w r0, r1, #2147483648 @ 0x80000000 8000c48: 4770 bxlt lr 8000c4a: f441 1180 orr.w r1, r1, #1048576 @ 0x100000 8000c4e: ea4f 5252 mov.w r2, r2, lsr #21 8000c52: f1c2 0218 rsb r2, r2, #24 8000c56: f1c2 0c20 rsb ip, r2, #32 8000c5a: fa10 f30c lsls.w r3, r0, ip 8000c5e: fa20 f002 lsr.w r0, r0, r2 8000c62: bf18 it ne 8000c64: f040 0001 orrne.w r0, r0, #1 8000c68: ea4f 23c1 mov.w r3, r1, lsl #11 8000c6c: ea4f 23d3 mov.w r3, r3, lsr #11 8000c70: fa03 fc0c lsl.w ip, r3, ip 8000c74: ea40 000c orr.w r0, r0, ip 8000c78: fa23 f302 lsr.w r3, r3, r2 8000c7c: ea4f 0343 mov.w r3, r3, lsl #1 8000c80: e7cc b.n 8000c1c <__aeabi_d2f+0x14> 8000c82: ea7f 5362 mvns.w r3, r2, asr #21 8000c86: d107 bne.n 8000c98 <__aeabi_d2f+0x90> 8000c88: ea50 3301 orrs.w r3, r0, r1, lsl #12 8000c8c: bf1e ittt ne 8000c8e: f04f 40fe movne.w r0, #2130706432 @ 0x7f000000 8000c92: f440 0040 orrne.w r0, r0, #12582912 @ 0xc00000 8000c96: 4770 bxne lr 8000c98: f001 4000 and.w r0, r1, #2147483648 @ 0x80000000 8000c9c: f040 40fe orr.w r0, r0, #2130706432 @ 0x7f000000 8000ca0: f440 0000 orr.w r0, r0, #8388608 @ 0x800000 8000ca4: 4770 bx lr 8000ca6: bf00 nop 08000ca8 <__aeabi_uldivmod>: 8000ca8: b953 cbnz r3, 8000cc0 <__aeabi_uldivmod+0x18> 8000caa: b94a cbnz r2, 8000cc0 <__aeabi_uldivmod+0x18> 8000cac: 2900 cmp r1, #0 8000cae: bf08 it eq 8000cb0: 2800 cmpeq r0, #0 8000cb2: bf1c itt ne 8000cb4: f04f 31ff movne.w r1, #4294967295 @ 0xffffffff 8000cb8: f04f 30ff movne.w r0, #4294967295 @ 0xffffffff 8000cbc: f000 b9be b.w 800103c <__aeabi_idiv0> 8000cc0: f1ad 0c08 sub.w ip, sp, #8 8000cc4: e96d ce04 strd ip, lr, [sp, #-16]! 8000cc8: f000 f83c bl 8000d44 <__udivmoddi4> 8000ccc: f8dd e004 ldr.w lr, [sp, #4] 8000cd0: e9dd 2302 ldrd r2, r3, [sp, #8] 8000cd4: b004 add sp, #16 8000cd6: 4770 bx lr 08000cd8 <__aeabi_d2lz>: 8000cd8: b538 push {r3, r4, r5, lr} 8000cda: 2200 movs r2, #0 8000cdc: 2300 movs r3, #0 8000cde: 4604 mov r4, r0 8000ce0: 460d mov r5, r1 8000ce2: f7ff ff0b bl 8000afc <__aeabi_dcmplt> 8000ce6: b928 cbnz r0, 8000cf4 <__aeabi_d2lz+0x1c> 8000ce8: 4620 mov r0, r4 8000cea: 4629 mov r1, r5 8000cec: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr} 8000cf0: f000 b80a b.w 8000d08 <__aeabi_d2ulz> 8000cf4: 4620 mov r0, r4 8000cf6: f105 4100 add.w r1, r5, #2147483648 @ 0x80000000 8000cfa: f000 f805 bl 8000d08 <__aeabi_d2ulz> 8000cfe: 4240 negs r0, r0 8000d00: eb61 0141 sbc.w r1, r1, r1, lsl #1 8000d04: bd38 pop {r3, r4, r5, pc} 8000d06: bf00 nop 08000d08 <__aeabi_d2ulz>: 8000d08: b5d0 push {r4, r6, r7, lr} 8000d0a: 4b0c ldr r3, [pc, #48] @ (8000d3c <__aeabi_d2ulz+0x34>) 8000d0c: 2200 movs r2, #0 8000d0e: 4606 mov r6, r0 8000d10: 460f mov r7, r1 8000d12: f7ff fc81 bl 8000618 <__aeabi_dmul> 8000d16: f7ff ff57 bl 8000bc8 <__aeabi_d2uiz> 8000d1a: 4604 mov r4, r0 8000d1c: f7ff fc02 bl 8000524 <__aeabi_ui2d> 8000d20: 4b07 ldr r3, [pc, #28] @ (8000d40 <__aeabi_d2ulz+0x38>) 8000d22: 2200 movs r2, #0 8000d24: f7ff fc78 bl 8000618 <__aeabi_dmul> 8000d28: 4602 mov r2, r0 8000d2a: 460b mov r3, r1 8000d2c: 4630 mov r0, r6 8000d2e: 4639 mov r1, r7 8000d30: f7ff faba bl 80002a8 <__aeabi_dsub> 8000d34: f7ff ff48 bl 8000bc8 <__aeabi_d2uiz> 8000d38: 4621 mov r1, r4 8000d3a: bdd0 pop {r4, r6, r7, pc} 8000d3c: 3df00000 .word 0x3df00000 8000d40: 41f00000 .word 0x41f00000 08000d44 <__udivmoddi4>: 8000d44: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} 8000d48: 9d08 ldr r5, [sp, #32] 8000d4a: 468e mov lr, r1 8000d4c: 4604 mov r4, r0 8000d4e: 4688 mov r8, r1 8000d50: 2b00 cmp r3, #0 8000d52: d14a bne.n 8000dea <__udivmoddi4+0xa6> 8000d54: 428a cmp r2, r1 8000d56: 4617 mov r7, r2 8000d58: d962 bls.n 8000e20 <__udivmoddi4+0xdc> 8000d5a: fab2 f682 clz r6, r2 8000d5e: b14e cbz r6, 8000d74 <__udivmoddi4+0x30> 8000d60: f1c6 0320 rsb r3, r6, #32 8000d64: fa01 f806 lsl.w r8, r1, r6 8000d68: fa20 f303 lsr.w r3, r0, r3 8000d6c: 40b7 lsls r7, r6 8000d6e: ea43 0808 orr.w r8, r3, r8 8000d72: 40b4 lsls r4, r6 8000d74: ea4f 4e17 mov.w lr, r7, lsr #16 8000d78: fa1f fc87 uxth.w ip, r7 8000d7c: fbb8 f1fe udiv r1, r8, lr 8000d80: 0c23 lsrs r3, r4, #16 8000d82: fb0e 8811 mls r8, lr, r1, r8 8000d86: ea43 4308 orr.w r3, r3, r8, lsl #16 8000d8a: fb01 f20c mul.w r2, r1, ip 8000d8e: 429a cmp r2, r3 8000d90: d909 bls.n 8000da6 <__udivmoddi4+0x62> 8000d92: 18fb adds r3, r7, r3 8000d94: f101 30ff add.w r0, r1, #4294967295 @ 0xffffffff 8000d98: f080 80ea bcs.w 8000f70 <__udivmoddi4+0x22c> 8000d9c: 429a cmp r2, r3 8000d9e: f240 80e7 bls.w 8000f70 <__udivmoddi4+0x22c> 8000da2: 3902 subs r1, #2 8000da4: 443b add r3, r7 8000da6: 1a9a subs r2, r3, r2 8000da8: b2a3 uxth r3, r4 8000daa: fbb2 f0fe udiv r0, r2, lr 8000dae: fb0e 2210 mls r2, lr, r0, r2 8000db2: ea43 4302 orr.w r3, r3, r2, lsl #16 8000db6: fb00 fc0c mul.w ip, r0, ip 8000dba: 459c cmp ip, r3 8000dbc: d909 bls.n 8000dd2 <__udivmoddi4+0x8e> 8000dbe: 18fb adds r3, r7, r3 8000dc0: f100 32ff add.w r2, r0, #4294967295 @ 0xffffffff 8000dc4: f080 80d6 bcs.w 8000f74 <__udivmoddi4+0x230> 8000dc8: 459c cmp ip, r3 8000dca: f240 80d3 bls.w 8000f74 <__udivmoddi4+0x230> 8000dce: 443b add r3, r7 8000dd0: 3802 subs r0, #2 8000dd2: ea40 4001 orr.w r0, r0, r1, lsl #16 8000dd6: eba3 030c sub.w r3, r3, ip 8000dda: 2100 movs r1, #0 8000ddc: b11d cbz r5, 8000de6 <__udivmoddi4+0xa2> 8000dde: 40f3 lsrs r3, r6 8000de0: 2200 movs r2, #0 8000de2: e9c5 3200 strd r3, r2, [r5] 8000de6: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 8000dea: 428b cmp r3, r1 8000dec: d905 bls.n 8000dfa <__udivmoddi4+0xb6> 8000dee: b10d cbz r5, 8000df4 <__udivmoddi4+0xb0> 8000df0: e9c5 0100 strd r0, r1, [r5] 8000df4: 2100 movs r1, #0 8000df6: 4608 mov r0, r1 8000df8: e7f5 b.n 8000de6 <__udivmoddi4+0xa2> 8000dfa: fab3 f183 clz r1, r3 8000dfe: 2900 cmp r1, #0 8000e00: d146 bne.n 8000e90 <__udivmoddi4+0x14c> 8000e02: 4573 cmp r3, lr 8000e04: d302 bcc.n 8000e0c <__udivmoddi4+0xc8> 8000e06: 4282 cmp r2, r0 8000e08: f200 8105 bhi.w 8001016 <__udivmoddi4+0x2d2> 8000e0c: 1a84 subs r4, r0, r2 8000e0e: eb6e 0203 sbc.w r2, lr, r3 8000e12: 2001 movs r0, #1 8000e14: 4690 mov r8, r2 8000e16: 2d00 cmp r5, #0 8000e18: d0e5 beq.n 8000de6 <__udivmoddi4+0xa2> 8000e1a: e9c5 4800 strd r4, r8, [r5] 8000e1e: e7e2 b.n 8000de6 <__udivmoddi4+0xa2> 8000e20: 2a00 cmp r2, #0 8000e22: f000 8090 beq.w 8000f46 <__udivmoddi4+0x202> 8000e26: fab2 f682 clz r6, r2 8000e2a: 2e00 cmp r6, #0 8000e2c: f040 80a4 bne.w 8000f78 <__udivmoddi4+0x234> 8000e30: 1a8a subs r2, r1, r2 8000e32: 0c03 lsrs r3, r0, #16 8000e34: ea4f 4e17 mov.w lr, r7, lsr #16 8000e38: b280 uxth r0, r0 8000e3a: b2bc uxth r4, r7 8000e3c: 2101 movs r1, #1 8000e3e: fbb2 fcfe udiv ip, r2, lr 8000e42: fb0e 221c mls r2, lr, ip, r2 8000e46: ea43 4302 orr.w r3, r3, r2, lsl #16 8000e4a: fb04 f20c mul.w r2, r4, ip 8000e4e: 429a cmp r2, r3 8000e50: d907 bls.n 8000e62 <__udivmoddi4+0x11e> 8000e52: 18fb adds r3, r7, r3 8000e54: f10c 38ff add.w r8, ip, #4294967295 @ 0xffffffff 8000e58: d202 bcs.n 8000e60 <__udivmoddi4+0x11c> 8000e5a: 429a cmp r2, r3 8000e5c: f200 80e0 bhi.w 8001020 <__udivmoddi4+0x2dc> 8000e60: 46c4 mov ip, r8 8000e62: 1a9b subs r3, r3, r2 8000e64: fbb3 f2fe udiv r2, r3, lr 8000e68: fb0e 3312 mls r3, lr, r2, r3 8000e6c: ea40 4303 orr.w r3, r0, r3, lsl #16 8000e70: fb02 f404 mul.w r4, r2, r4 8000e74: 429c cmp r4, r3 8000e76: d907 bls.n 8000e88 <__udivmoddi4+0x144> 8000e78: 18fb adds r3, r7, r3 8000e7a: f102 30ff add.w r0, r2, #4294967295 @ 0xffffffff 8000e7e: d202 bcs.n 8000e86 <__udivmoddi4+0x142> 8000e80: 429c cmp r4, r3 8000e82: f200 80ca bhi.w 800101a <__udivmoddi4+0x2d6> 8000e86: 4602 mov r2, r0 8000e88: 1b1b subs r3, r3, r4 8000e8a: ea42 400c orr.w r0, r2, ip, lsl #16 8000e8e: e7a5 b.n 8000ddc <__udivmoddi4+0x98> 8000e90: f1c1 0620 rsb r6, r1, #32 8000e94: 408b lsls r3, r1 8000e96: fa22 f706 lsr.w r7, r2, r6 8000e9a: 431f orrs r7, r3 8000e9c: fa0e f401 lsl.w r4, lr, r1 8000ea0: fa20 f306 lsr.w r3, r0, r6 8000ea4: fa2e fe06 lsr.w lr, lr, r6 8000ea8: ea4f 4917 mov.w r9, r7, lsr #16 8000eac: 4323 orrs r3, r4 8000eae: fa00 f801 lsl.w r8, r0, r1 8000eb2: fa1f fc87 uxth.w ip, r7 8000eb6: fbbe f0f9 udiv r0, lr, r9 8000eba: 0c1c lsrs r4, r3, #16 8000ebc: fb09 ee10 mls lr, r9, r0, lr 8000ec0: ea44 440e orr.w r4, r4, lr, lsl #16 8000ec4: fb00 fe0c mul.w lr, r0, ip 8000ec8: 45a6 cmp lr, r4 8000eca: fa02 f201 lsl.w r2, r2, r1 8000ece: d909 bls.n 8000ee4 <__udivmoddi4+0x1a0> 8000ed0: 193c adds r4, r7, r4 8000ed2: f100 3aff add.w sl, r0, #4294967295 @ 0xffffffff 8000ed6: f080 809c bcs.w 8001012 <__udivmoddi4+0x2ce> 8000eda: 45a6 cmp lr, r4 8000edc: f240 8099 bls.w 8001012 <__udivmoddi4+0x2ce> 8000ee0: 3802 subs r0, #2 8000ee2: 443c add r4, r7 8000ee4: eba4 040e sub.w r4, r4, lr 8000ee8: fa1f fe83 uxth.w lr, r3 8000eec: fbb4 f3f9 udiv r3, r4, r9 8000ef0: fb09 4413 mls r4, r9, r3, r4 8000ef4: ea4e 4404 orr.w r4, lr, r4, lsl #16 8000ef8: fb03 fc0c mul.w ip, r3, ip 8000efc: 45a4 cmp ip, r4 8000efe: d908 bls.n 8000f12 <__udivmoddi4+0x1ce> 8000f00: 193c adds r4, r7, r4 8000f02: f103 3eff add.w lr, r3, #4294967295 @ 0xffffffff 8000f06: f080 8082 bcs.w 800100e <__udivmoddi4+0x2ca> 8000f0a: 45a4 cmp ip, r4 8000f0c: d97f bls.n 800100e <__udivmoddi4+0x2ca> 8000f0e: 3b02 subs r3, #2 8000f10: 443c add r4, r7 8000f12: ea43 4000 orr.w r0, r3, r0, lsl #16 8000f16: eba4 040c sub.w r4, r4, ip 8000f1a: fba0 ec02 umull lr, ip, r0, r2 8000f1e: 4564 cmp r4, ip 8000f20: 4673 mov r3, lr 8000f22: 46e1 mov r9, ip 8000f24: d362 bcc.n 8000fec <__udivmoddi4+0x2a8> 8000f26: d05f beq.n 8000fe8 <__udivmoddi4+0x2a4> 8000f28: b15d cbz r5, 8000f42 <__udivmoddi4+0x1fe> 8000f2a: ebb8 0203 subs.w r2, r8, r3 8000f2e: eb64 0409 sbc.w r4, r4, r9 8000f32: fa04 f606 lsl.w r6, r4, r6 8000f36: fa22 f301 lsr.w r3, r2, r1 8000f3a: 431e orrs r6, r3 8000f3c: 40cc lsrs r4, r1 8000f3e: e9c5 6400 strd r6, r4, [r5] 8000f42: 2100 movs r1, #0 8000f44: e74f b.n 8000de6 <__udivmoddi4+0xa2> 8000f46: fbb1 fcf2 udiv ip, r1, r2 8000f4a: 0c01 lsrs r1, r0, #16 8000f4c: ea41 410e orr.w r1, r1, lr, lsl #16 8000f50: b280 uxth r0, r0 8000f52: ea40 4201 orr.w r2, r0, r1, lsl #16 8000f56: 463b mov r3, r7 8000f58: 4638 mov r0, r7 8000f5a: 463c mov r4, r7 8000f5c: 46b8 mov r8, r7 8000f5e: 46be mov lr, r7 8000f60: 2620 movs r6, #32 8000f62: fbb1 f1f7 udiv r1, r1, r7 8000f66: eba2 0208 sub.w r2, r2, r8 8000f6a: ea41 410c orr.w r1, r1, ip, lsl #16 8000f6e: e766 b.n 8000e3e <__udivmoddi4+0xfa> 8000f70: 4601 mov r1, r0 8000f72: e718 b.n 8000da6 <__udivmoddi4+0x62> 8000f74: 4610 mov r0, r2 8000f76: e72c b.n 8000dd2 <__udivmoddi4+0x8e> 8000f78: f1c6 0220 rsb r2, r6, #32 8000f7c: fa2e f302 lsr.w r3, lr, r2 8000f80: 40b7 lsls r7, r6 8000f82: 40b1 lsls r1, r6 8000f84: fa20 f202 lsr.w r2, r0, r2 8000f88: ea4f 4e17 mov.w lr, r7, lsr #16 8000f8c: 430a orrs r2, r1 8000f8e: fbb3 f8fe udiv r8, r3, lr 8000f92: b2bc uxth r4, r7 8000f94: fb0e 3318 mls r3, lr, r8, r3 8000f98: 0c11 lsrs r1, r2, #16 8000f9a: ea41 4103 orr.w r1, r1, r3, lsl #16 8000f9e: fb08 f904 mul.w r9, r8, r4 8000fa2: 40b0 lsls r0, r6 8000fa4: 4589 cmp r9, r1 8000fa6: ea4f 4310 mov.w r3, r0, lsr #16 8000faa: b280 uxth r0, r0 8000fac: d93e bls.n 800102c <__udivmoddi4+0x2e8> 8000fae: 1879 adds r1, r7, r1 8000fb0: f108 3cff add.w ip, r8, #4294967295 @ 0xffffffff 8000fb4: d201 bcs.n 8000fba <__udivmoddi4+0x276> 8000fb6: 4589 cmp r9, r1 8000fb8: d81f bhi.n 8000ffa <__udivmoddi4+0x2b6> 8000fba: eba1 0109 sub.w r1, r1, r9 8000fbe: fbb1 f9fe udiv r9, r1, lr 8000fc2: fb09 f804 mul.w r8, r9, r4 8000fc6: fb0e 1119 mls r1, lr, r9, r1 8000fca: b292 uxth r2, r2 8000fcc: ea42 4201 orr.w r2, r2, r1, lsl #16 8000fd0: 4542 cmp r2, r8 8000fd2: d229 bcs.n 8001028 <__udivmoddi4+0x2e4> 8000fd4: 18ba adds r2, r7, r2 8000fd6: f109 31ff add.w r1, r9, #4294967295 @ 0xffffffff 8000fda: d2c4 bcs.n 8000f66 <__udivmoddi4+0x222> 8000fdc: 4542 cmp r2, r8 8000fde: d2c2 bcs.n 8000f66 <__udivmoddi4+0x222> 8000fe0: f1a9 0102 sub.w r1, r9, #2 8000fe4: 443a add r2, r7 8000fe6: e7be b.n 8000f66 <__udivmoddi4+0x222> 8000fe8: 45f0 cmp r8, lr 8000fea: d29d bcs.n 8000f28 <__udivmoddi4+0x1e4> 8000fec: ebbe 0302 subs.w r3, lr, r2 8000ff0: eb6c 0c07 sbc.w ip, ip, r7 8000ff4: 3801 subs r0, #1 8000ff6: 46e1 mov r9, ip 8000ff8: e796 b.n 8000f28 <__udivmoddi4+0x1e4> 8000ffa: eba7 0909 sub.w r9, r7, r9 8000ffe: 4449 add r1, r9 8001000: f1a8 0c02 sub.w ip, r8, #2 8001004: fbb1 f9fe udiv r9, r1, lr 8001008: fb09 f804 mul.w r8, r9, r4 800100c: e7db b.n 8000fc6 <__udivmoddi4+0x282> 800100e: 4673 mov r3, lr 8001010: e77f b.n 8000f12 <__udivmoddi4+0x1ce> 8001012: 4650 mov r0, sl 8001014: e766 b.n 8000ee4 <__udivmoddi4+0x1a0> 8001016: 4608 mov r0, r1 8001018: e6fd b.n 8000e16 <__udivmoddi4+0xd2> 800101a: 443b add r3, r7 800101c: 3a02 subs r2, #2 800101e: e733 b.n 8000e88 <__udivmoddi4+0x144> 8001020: f1ac 0c02 sub.w ip, ip, #2 8001024: 443b add r3, r7 8001026: e71c b.n 8000e62 <__udivmoddi4+0x11e> 8001028: 4649 mov r1, r9 800102a: e79c b.n 8000f66 <__udivmoddi4+0x222> 800102c: eba1 0109 sub.w r1, r1, r9 8001030: 46c4 mov ip, r8 8001032: fbb1 f9fe udiv r9, r1, lr 8001036: fb09 f804 mul.w r8, r9, r4 800103a: e7c4 b.n 8000fc6 <__udivmoddi4+0x282> 0800103c <__aeabi_idiv0>: 800103c: 4770 bx lr 800103e: bf00 nop 08001040 : * @brief Initializes I2C MSP. * @param i2c_handler I2C handler * @retval None */ static void I2Cx_MspInit(I2C_HandleTypeDef *i2c_handler) { 8001040: b580 push {r7, lr} 8001042: b08a sub sp, #40 @ 0x28 8001044: af00 add r7, sp, #0 8001046: 6078 str r0, [r7, #4] GPIO_InitTypeDef gpio_init_structure; /*** Configure the GPIOs ***/ /* Enable GPIO clock */ DISCOVERY_I2Cx_SCL_SDA_GPIO_CLK_ENABLE(); 8001048: 4b27 ldr r3, [pc, #156] @ (80010e8 ) 800104a: 6cdb ldr r3, [r3, #76] @ 0x4c 800104c: 4a26 ldr r2, [pc, #152] @ (80010e8 ) 800104e: f043 0302 orr.w r3, r3, #2 8001052: 64d3 str r3, [r2, #76] @ 0x4c 8001054: 4b24 ldr r3, [pc, #144] @ (80010e8 ) 8001056: 6cdb ldr r3, [r3, #76] @ 0x4c 8001058: f003 0302 and.w r3, r3, #2 800105c: 613b str r3, [r7, #16] 800105e: 693b ldr r3, [r7, #16] /* Configure I2C Tx, Rx as alternate function */ gpio_init_structure.Pin = DISCOVERY_I2Cx_SCL_PIN | DISCOVERY_I2Cx_SDA_PIN; 8001060: f44f 6340 mov.w r3, #3072 @ 0xc00 8001064: 617b str r3, [r7, #20] gpio_init_structure.Mode = GPIO_MODE_AF_OD; 8001066: 2312 movs r3, #18 8001068: 61bb str r3, [r7, #24] gpio_init_structure.Pull = GPIO_PULLUP; 800106a: 2301 movs r3, #1 800106c: 61fb str r3, [r7, #28] gpio_init_structure.Speed = GPIO_SPEED_FREQ_VERY_HIGH; 800106e: 2303 movs r3, #3 8001070: 623b str r3, [r7, #32] gpio_init_structure.Alternate = DISCOVERY_I2Cx_SCL_SDA_AF; 8001072: 2304 movs r3, #4 8001074: 627b str r3, [r7, #36] @ 0x24 HAL_GPIO_Init(DISCOVERY_I2Cx_SCL_SDA_GPIO_PORT, &gpio_init_structure); 8001076: f107 0314 add.w r3, r7, #20 800107a: 4619 mov r1, r3 800107c: 481b ldr r0, [pc, #108] @ (80010ec ) 800107e: f003 f889 bl 8004194 HAL_GPIO_Init(DISCOVERY_I2Cx_SCL_SDA_GPIO_PORT, &gpio_init_structure); 8001082: f107 0314 add.w r3, r7, #20 8001086: 4619 mov r1, r3 8001088: 4818 ldr r0, [pc, #96] @ (80010ec ) 800108a: f003 f883 bl 8004194 /*** Configure the I2C peripheral ***/ /* Enable I2C clock */ DISCOVERY_I2Cx_CLK_ENABLE(); 800108e: 4b16 ldr r3, [pc, #88] @ (80010e8 ) 8001090: 6d9b ldr r3, [r3, #88] @ 0x58 8001092: 4a15 ldr r2, [pc, #84] @ (80010e8 ) 8001094: f443 0380 orr.w r3, r3, #4194304 @ 0x400000 8001098: 6593 str r3, [r2, #88] @ 0x58 800109a: 4b13 ldr r3, [pc, #76] @ (80010e8 ) 800109c: 6d9b ldr r3, [r3, #88] @ 0x58 800109e: f403 0380 and.w r3, r3, #4194304 @ 0x400000 80010a2: 60fb str r3, [r7, #12] 80010a4: 68fb ldr r3, [r7, #12] /* Force the I2C peripheral clock reset */ DISCOVERY_I2Cx_FORCE_RESET(); 80010a6: 4b10 ldr r3, [pc, #64] @ (80010e8 ) 80010a8: 6b9b ldr r3, [r3, #56] @ 0x38 80010aa: 4a0f ldr r2, [pc, #60] @ (80010e8 ) 80010ac: f443 0380 orr.w r3, r3, #4194304 @ 0x400000 80010b0: 6393 str r3, [r2, #56] @ 0x38 /* Release the I2C peripheral clock reset */ DISCOVERY_I2Cx_RELEASE_RESET(); 80010b2: 4b0d ldr r3, [pc, #52] @ (80010e8 ) 80010b4: 6b9b ldr r3, [r3, #56] @ 0x38 80010b6: 4a0c ldr r2, [pc, #48] @ (80010e8 ) 80010b8: f423 0380 bic.w r3, r3, #4194304 @ 0x400000 80010bc: 6393 str r3, [r2, #56] @ 0x38 /* Enable and set I2Cx Interrupt to a lower priority */ HAL_NVIC_SetPriority(DISCOVERY_I2Cx_EV_IRQn, 0x0F, 0); 80010be: 2200 movs r2, #0 80010c0: 210f movs r1, #15 80010c2: 2021 movs r0, #33 @ 0x21 80010c4: f002 feb0 bl 8003e28 HAL_NVIC_EnableIRQ(DISCOVERY_I2Cx_EV_IRQn); 80010c8: 2021 movs r0, #33 @ 0x21 80010ca: f002 fec9 bl 8003e60 /* Enable and set I2Cx Interrupt to a lower priority */ HAL_NVIC_SetPriority(DISCOVERY_I2Cx_ER_IRQn, 0x0F, 0); 80010ce: 2200 movs r2, #0 80010d0: 210f movs r1, #15 80010d2: 2022 movs r0, #34 @ 0x22 80010d4: f002 fea8 bl 8003e28 HAL_NVIC_EnableIRQ(DISCOVERY_I2Cx_ER_IRQn); 80010d8: 2022 movs r0, #34 @ 0x22 80010da: f002 fec1 bl 8003e60 } 80010de: bf00 nop 80010e0: 3728 adds r7, #40 @ 0x28 80010e2: 46bd mov sp, r7 80010e4: bd80 pop {r7, pc} 80010e6: bf00 nop 80010e8: 40021000 .word 0x40021000 80010ec: 48000400 .word 0x48000400 080010f0 : * @brief Initializes I2C HAL. * @param i2c_handler I2C handler * @retval None */ static void I2Cx_Init(I2C_HandleTypeDef *i2c_handler) { 80010f0: b580 push {r7, lr} 80010f2: b082 sub sp, #8 80010f4: af00 add r7, sp, #0 80010f6: 6078 str r0, [r7, #4] /* I2C configuration */ i2c_handler->Instance = DISCOVERY_I2Cx; 80010f8: 687b ldr r3, [r7, #4] 80010fa: 4a12 ldr r2, [pc, #72] @ (8001144 ) 80010fc: 601a str r2, [r3, #0] i2c_handler->Init.Timing = DISCOVERY_I2Cx_TIMING; 80010fe: 687b ldr r3, [r7, #4] 8001100: 4a11 ldr r2, [pc, #68] @ (8001148 ) 8001102: 605a str r2, [r3, #4] i2c_handler->Init.OwnAddress1 = 0; 8001104: 687b ldr r3, [r7, #4] 8001106: 2200 movs r2, #0 8001108: 609a str r2, [r3, #8] i2c_handler->Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT; 800110a: 687b ldr r3, [r7, #4] 800110c: 2201 movs r2, #1 800110e: 60da str r2, [r3, #12] i2c_handler->Init.DualAddressMode = I2C_DUALADDRESS_DISABLE; 8001110: 687b ldr r3, [r7, #4] 8001112: 2200 movs r2, #0 8001114: 611a str r2, [r3, #16] i2c_handler->Init.OwnAddress2 = 0; 8001116: 687b ldr r3, [r7, #4] 8001118: 2200 movs r2, #0 800111a: 615a str r2, [r3, #20] i2c_handler->Init.GeneralCallMode = I2C_GENERALCALL_DISABLE; 800111c: 687b ldr r3, [r7, #4] 800111e: 2200 movs r2, #0 8001120: 61da str r2, [r3, #28] i2c_handler->Init.NoStretchMode = I2C_NOSTRETCH_DISABLE; 8001122: 687b ldr r3, [r7, #4] 8001124: 2200 movs r2, #0 8001126: 621a str r2, [r3, #32] /* Init the I2C */ I2Cx_MspInit(i2c_handler); 8001128: 6878 ldr r0, [r7, #4] 800112a: f7ff ff89 bl 8001040 HAL_I2C_Init(i2c_handler); 800112e: 6878 ldr r0, [r7, #4] 8001130: f003 fb16 bl 8004760 /**Configure Analogue filter */ HAL_I2CEx_ConfigAnalogFilter(i2c_handler, I2C_ANALOGFILTER_ENABLE); 8001134: 2100 movs r1, #0 8001136: 6878 ldr r0, [r7, #4] 8001138: f004 f8cc bl 80052d4 } 800113c: bf00 nop 800113e: 3708 adds r7, #8 8001140: 46bd mov sp, r7 8001142: bd80 pop {r7, pc} 8001144: 40005800 .word 0x40005800 8001148: 00702681 .word 0x00702681 0800114c : * @param Buffer Pointer to data buffer * @param Length Length of the data * @retval HAL status */ static HAL_StatusTypeDef I2Cx_ReadMultiple(I2C_HandleTypeDef *i2c_handler, uint8_t Addr, uint16_t Reg, uint16_t MemAddress, uint8_t *Buffer, uint16_t Length) { 800114c: b580 push {r7, lr} 800114e: b08a sub sp, #40 @ 0x28 8001150: af04 add r7, sp, #16 8001152: 60f8 str r0, [r7, #12] 8001154: 4608 mov r0, r1 8001156: 4611 mov r1, r2 8001158: 461a mov r2, r3 800115a: 4603 mov r3, r0 800115c: 72fb strb r3, [r7, #11] 800115e: 460b mov r3, r1 8001160: 813b strh r3, [r7, #8] 8001162: 4613 mov r3, r2 8001164: 80fb strh r3, [r7, #6] HAL_StatusTypeDef status = HAL_OK; 8001166: 2300 movs r3, #0 8001168: 75fb strb r3, [r7, #23] status = HAL_I2C_Mem_Read(i2c_handler, Addr, (uint16_t)Reg, MemAddress, Buffer, Length, 1000); 800116a: 7afb ldrb r3, [r7, #11] 800116c: b299 uxth r1, r3 800116e: 88f8 ldrh r0, [r7, #6] 8001170: 893a ldrh r2, [r7, #8] 8001172: f44f 737a mov.w r3, #1000 @ 0x3e8 8001176: 9302 str r3, [sp, #8] 8001178: 8cbb ldrh r3, [r7, #36] @ 0x24 800117a: 9301 str r3, [sp, #4] 800117c: 6a3b ldr r3, [r7, #32] 800117e: 9300 str r3, [sp, #0] 8001180: 4603 mov r3, r0 8001182: 68f8 ldr r0, [r7, #12] 8001184: f003 fcca bl 8004b1c 8001188: 4603 mov r3, r0 800118a: 75fb strb r3, [r7, #23] /* Check the communication status */ if(status != HAL_OK) 800118c: 7dfb ldrb r3, [r7, #23] 800118e: 2b00 cmp r3, #0 8001190: d004 beq.n 800119c { /* I2C error occured */ I2Cx_Error(i2c_handler, Addr); 8001192: 7afb ldrb r3, [r7, #11] 8001194: 4619 mov r1, r3 8001196: 68f8 ldr r0, [r7, #12] 8001198: f000 f832 bl 8001200 } return status; 800119c: 7dfb ldrb r3, [r7, #23] } 800119e: 4618 mov r0, r3 80011a0: 3718 adds r7, #24 80011a2: 46bd mov sp, r7 80011a4: bd80 pop {r7, pc} 080011a6 : * @param Buffer The target register value to be written * @param Length buffer size to be written * @retval HAL status */ static HAL_StatusTypeDef I2Cx_WriteMultiple(I2C_HandleTypeDef *i2c_handler, uint8_t Addr, uint16_t Reg, uint16_t MemAddress, uint8_t *Buffer, uint16_t Length) { 80011a6: b580 push {r7, lr} 80011a8: b08a sub sp, #40 @ 0x28 80011aa: af04 add r7, sp, #16 80011ac: 60f8 str r0, [r7, #12] 80011ae: 4608 mov r0, r1 80011b0: 4611 mov r1, r2 80011b2: 461a mov r2, r3 80011b4: 4603 mov r3, r0 80011b6: 72fb strb r3, [r7, #11] 80011b8: 460b mov r3, r1 80011ba: 813b strh r3, [r7, #8] 80011bc: 4613 mov r3, r2 80011be: 80fb strh r3, [r7, #6] HAL_StatusTypeDef status = HAL_OK; 80011c0: 2300 movs r3, #0 80011c2: 75fb strb r3, [r7, #23] status = HAL_I2C_Mem_Write(i2c_handler, Addr, (uint16_t)Reg, MemAddress, Buffer, Length, 1000); 80011c4: 7afb ldrb r3, [r7, #11] 80011c6: b299 uxth r1, r3 80011c8: 88f8 ldrh r0, [r7, #6] 80011ca: 893a ldrh r2, [r7, #8] 80011cc: f44f 737a mov.w r3, #1000 @ 0x3e8 80011d0: 9302 str r3, [sp, #8] 80011d2: 8cbb ldrh r3, [r7, #36] @ 0x24 80011d4: 9301 str r3, [sp, #4] 80011d6: 6a3b ldr r3, [r7, #32] 80011d8: 9300 str r3, [sp, #0] 80011da: 4603 mov r3, r0 80011dc: 68f8 ldr r0, [r7, #12] 80011de: f003 fb89 bl 80048f4 80011e2: 4603 mov r3, r0 80011e4: 75fb strb r3, [r7, #23] /* Check the communication status */ if(status != HAL_OK) 80011e6: 7dfb ldrb r3, [r7, #23] 80011e8: 2b00 cmp r3, #0 80011ea: d004 beq.n 80011f6 { /* Re-Initiaize the I2C Bus */ I2Cx_Error(i2c_handler, Addr); 80011ec: 7afb ldrb r3, [r7, #11] 80011ee: 4619 mov r1, r3 80011f0: 68f8 ldr r0, [r7, #12] 80011f2: f000 f805 bl 8001200 } return status; 80011f6: 7dfb ldrb r3, [r7, #23] } 80011f8: 4618 mov r0, r3 80011fa: 3718 adds r7, #24 80011fc: 46bd mov sp, r7 80011fe: bd80 pop {r7, pc} 08001200 : * @param i2c_handler I2C handler * @param Addr I2C Address * @retval None */ static void I2Cx_Error(I2C_HandleTypeDef *i2c_handler, uint8_t Addr) { 8001200: b580 push {r7, lr} 8001202: b082 sub sp, #8 8001204: af00 add r7, sp, #0 8001206: 6078 str r0, [r7, #4] 8001208: 460b mov r3, r1 800120a: 70fb strb r3, [r7, #3] /* De-initialize the I2C communication bus */ HAL_I2C_DeInit(i2c_handler); 800120c: 6878 ldr r0, [r7, #4] 800120e: f003 fb42 bl 8004896 /* Re-Initialize the I2C communication bus */ I2Cx_Init(i2c_handler); 8001212: 6878 ldr r0, [r7, #4] 8001214: f7ff ff6c bl 80010f0 } 8001218: bf00 nop 800121a: 3708 adds r7, #8 800121c: 46bd mov sp, r7 800121e: bd80 pop {r7, pc} 08001220 : /** * @brief Initializes Sensors low level. * @retval None */ void SENSOR_IO_Init(void) { 8001220: b580 push {r7, lr} 8001222: af00 add r7, sp, #0 I2Cx_Init(&hI2cHandler); 8001224: 4802 ldr r0, [pc, #8] @ (8001230 ) 8001226: f7ff ff63 bl 80010f0 } 800122a: bf00 nop 800122c: bd80 pop {r7, pc} 800122e: bf00 nop 8001230: 200002b8 .word 0x200002b8 08001234 : * @param Reg Reg address * @param Value Data to be written * @retval None */ void SENSOR_IO_Write(uint8_t Addr, uint8_t Reg, uint8_t Value) { 8001234: b580 push {r7, lr} 8001236: b084 sub sp, #16 8001238: af02 add r7, sp, #8 800123a: 4603 mov r3, r0 800123c: 71fb strb r3, [r7, #7] 800123e: 460b mov r3, r1 8001240: 71bb strb r3, [r7, #6] 8001242: 4613 mov r3, r2 8001244: 717b strb r3, [r7, #5] I2Cx_WriteMultiple(&hI2cHandler, Addr, (uint16_t)Reg, I2C_MEMADD_SIZE_8BIT,(uint8_t*)&Value, 1); 8001246: 79bb ldrb r3, [r7, #6] 8001248: b29a uxth r2, r3 800124a: 79f9 ldrb r1, [r7, #7] 800124c: 2301 movs r3, #1 800124e: 9301 str r3, [sp, #4] 8001250: 1d7b adds r3, r7, #5 8001252: 9300 str r3, [sp, #0] 8001254: 2301 movs r3, #1 8001256: 4803 ldr r0, [pc, #12] @ (8001264 ) 8001258: f7ff ffa5 bl 80011a6 } 800125c: bf00 nop 800125e: 3708 adds r7, #8 8001260: 46bd mov sp, r7 8001262: bd80 pop {r7, pc} 8001264: 200002b8 .word 0x200002b8 08001268 : * @param Addr I2C address * @param Reg Reg address * @retval Data to be read */ uint8_t SENSOR_IO_Read(uint8_t Addr, uint8_t Reg) { 8001268: b580 push {r7, lr} 800126a: b086 sub sp, #24 800126c: af02 add r7, sp, #8 800126e: 4603 mov r3, r0 8001270: 460a mov r2, r1 8001272: 71fb strb r3, [r7, #7] 8001274: 4613 mov r3, r2 8001276: 71bb strb r3, [r7, #6] uint8_t read_value = 0; 8001278: 2300 movs r3, #0 800127a: 73fb strb r3, [r7, #15] I2Cx_ReadMultiple(&hI2cHandler, Addr, Reg, I2C_MEMADD_SIZE_8BIT, (uint8_t*)&read_value, 1); 800127c: 79bb ldrb r3, [r7, #6] 800127e: b29a uxth r2, r3 8001280: 79f9 ldrb r1, [r7, #7] 8001282: 2301 movs r3, #1 8001284: 9301 str r3, [sp, #4] 8001286: f107 030f add.w r3, r7, #15 800128a: 9300 str r3, [sp, #0] 800128c: 2301 movs r3, #1 800128e: 4804 ldr r0, [pc, #16] @ (80012a0 ) 8001290: f7ff ff5c bl 800114c return read_value; 8001294: 7bfb ldrb r3, [r7, #15] } 8001296: 4618 mov r0, r3 8001298: 3710 adds r7, #16 800129a: 46bd mov sp, r7 800129c: bd80 pop {r7, pc} 800129e: bf00 nop 80012a0: 200002b8 .word 0x200002b8 080012a4 : * @param Buffer Pointer to data buffer * @param Length Length of the data * @retval HAL status */ uint16_t SENSOR_IO_ReadMultiple(uint8_t Addr, uint8_t Reg, uint8_t *Buffer, uint16_t Length) { 80012a4: b580 push {r7, lr} 80012a6: b084 sub sp, #16 80012a8: af02 add r7, sp, #8 80012aa: 603a str r2, [r7, #0] 80012ac: 461a mov r2, r3 80012ae: 4603 mov r3, r0 80012b0: 71fb strb r3, [r7, #7] 80012b2: 460b mov r3, r1 80012b4: 71bb strb r3, [r7, #6] 80012b6: 4613 mov r3, r2 80012b8: 80bb strh r3, [r7, #4] return I2Cx_ReadMultiple(&hI2cHandler, Addr, (uint16_t)Reg, I2C_MEMADD_SIZE_8BIT, Buffer, Length); 80012ba: 79bb ldrb r3, [r7, #6] 80012bc: b29a uxth r2, r3 80012be: 79f9 ldrb r1, [r7, #7] 80012c0: 88bb ldrh r3, [r7, #4] 80012c2: 9301 str r3, [sp, #4] 80012c4: 683b ldr r3, [r7, #0] 80012c6: 9300 str r3, [sp, #0] 80012c8: 2301 movs r3, #1 80012ca: 4804 ldr r0, [pc, #16] @ (80012dc ) 80012cc: f7ff ff3e bl 800114c 80012d0: 4603 mov r3, r0 } 80012d2: 4618 mov r0, r3 80012d4: 3708 adds r7, #8 80012d6: 46bd mov sp, r7 80012d8: bd80 pop {r7, pc} 80012da: bf00 nop 80012dc: 200002b8 .word 0x200002b8 080012e0 : /** * @brief Initialize the ACCELERO. * @retval ACCELERO_OK or ACCELERO_ERROR */ ACCELERO_StatusTypeDef BSP_ACCELERO_Init(void) { 80012e0: b580 push {r7, lr} 80012e2: b084 sub sp, #16 80012e4: af00 add r7, sp, #0 ACCELERO_StatusTypeDef ret = ACCELERO_OK; 80012e6: 2300 movs r3, #0 80012e8: 73fb strb r3, [r7, #15] uint16_t ctrl = 0x0000; 80012ea: 2300 movs r3, #0 80012ec: 81bb strh r3, [r7, #12] ACCELERO_InitTypeDef LSM6DSL_InitStructure; if(Lsm6dslAccDrv.ReadID() != LSM6DSL_ACC_GYRO_WHO_AM_I) 80012ee: 4b1a ldr r3, [pc, #104] @ (8001358 ) 80012f0: 689b ldr r3, [r3, #8] 80012f2: 4798 blx r3 80012f4: 4603 mov r3, r0 80012f6: 2b6a cmp r3, #106 @ 0x6a 80012f8: d002 beq.n 8001300 { ret = ACCELERO_ERROR; 80012fa: 2301 movs r3, #1 80012fc: 73fb strb r3, [r7, #15] 80012fe: e025 b.n 800134c } else { /* Initialize the ACCELERO accelerometer driver structure */ AccelerometerDrv = &Lsm6dslAccDrv; 8001300: 4b16 ldr r3, [pc, #88] @ (800135c ) 8001302: 4a15 ldr r2, [pc, #84] @ (8001358 ) 8001304: 601a str r2, [r3, #0] /* MEMS configuration ------------------------------------------------------*/ /* Fill the ACCELERO accelerometer structure */ LSM6DSL_InitStructure.AccOutput_DataRate = LSM6DSL_ODR_52Hz; 8001306: 2330 movs r3, #48 @ 0x30 8001308: 717b strb r3, [r7, #5] LSM6DSL_InitStructure.Axes_Enable = 0; 800130a: 2300 movs r3, #0 800130c: 71bb strb r3, [r7, #6] LSM6DSL_InitStructure.AccFull_Scale = LSM6DSL_ACC_FULLSCALE_2G; 800130e: 2300 movs r3, #0 8001310: 72bb strb r3, [r7, #10] LSM6DSL_InitStructure.BlockData_Update = LSM6DSL_BDU_BLOCK_UPDATE; 8001312: 2340 movs r3, #64 @ 0x40 8001314: 723b strb r3, [r7, #8] LSM6DSL_InitStructure.High_Resolution = 0; 8001316: 2300 movs r3, #0 8001318: 71fb strb r3, [r7, #7] LSM6DSL_InitStructure.Communication_Mode = 0; 800131a: 2300 movs r3, #0 800131c: 72fb strb r3, [r7, #11] /* Configure MEMS: data rate, full scale */ ctrl = (LSM6DSL_InitStructure.AccOutput_DataRate | LSM6DSL_InitStructure.AccFull_Scale); 800131e: 797a ldrb r2, [r7, #5] 8001320: 7abb ldrb r3, [r7, #10] 8001322: 4313 orrs r3, r2 8001324: b2db uxtb r3, r3 8001326: 81bb strh r3, [r7, #12] /* Configure MEMS: BDU and Auto-increment for multi read/write */ ctrl |= ((LSM6DSL_InitStructure.BlockData_Update | LSM6DSL_ACC_GYRO_IF_INC_ENABLED) << 8); 8001328: 7a3b ldrb r3, [r7, #8] 800132a: f043 0304 orr.w r3, r3, #4 800132e: b2db uxtb r3, r3 8001330: b21b sxth r3, r3 8001332: 021b lsls r3, r3, #8 8001334: b21a sxth r2, r3 8001336: f9b7 300c ldrsh.w r3, [r7, #12] 800133a: 4313 orrs r3, r2 800133c: b21b sxth r3, r3 800133e: 81bb strh r3, [r7, #12] /* Configure the ACCELERO accelerometer main parameters */ AccelerometerDrv->Init(ctrl); 8001340: 4b06 ldr r3, [pc, #24] @ (800135c ) 8001342: 681b ldr r3, [r3, #0] 8001344: 681b ldr r3, [r3, #0] 8001346: 89ba ldrh r2, [r7, #12] 8001348: 4610 mov r0, r2 800134a: 4798 blx r3 } return ret; 800134c: 7bfb ldrb r3, [r7, #15] } 800134e: 4618 mov r0, r3 8001350: 3710 adds r7, #16 8001352: 46bd mov sp, r7 8001354: bd80 pop {r7, pc} 8001356: bf00 nop 8001358: 2000005c .word 0x2000005c 800135c: 2000030c .word 0x2000030c 08001360 : * @param pDataXYZ Pointer on 3 angular accelerations table with * pDataXYZ[0] = X axis, pDataXYZ[1] = Y axis, pDataXYZ[2] = Z axis * @retval None */ void BSP_ACCELERO_AccGetXYZ(int16_t *pDataXYZ) { 8001360: b580 push {r7, lr} 8001362: b082 sub sp, #8 8001364: af00 add r7, sp, #0 8001366: 6078 str r0, [r7, #4] if(AccelerometerDrv != NULL) 8001368: 4b08 ldr r3, [pc, #32] @ (800138c ) 800136a: 681b ldr r3, [r3, #0] 800136c: 2b00 cmp r3, #0 800136e: d009 beq.n 8001384 { if(AccelerometerDrv->GetXYZ != NULL) 8001370: 4b06 ldr r3, [pc, #24] @ (800138c ) 8001372: 681b ldr r3, [r3, #0] 8001374: 6b1b ldr r3, [r3, #48] @ 0x30 8001376: 2b00 cmp r3, #0 8001378: d004 beq.n 8001384 { AccelerometerDrv->GetXYZ(pDataXYZ); 800137a: 4b04 ldr r3, [pc, #16] @ (800138c ) 800137c: 681b ldr r3, [r3, #0] 800137e: 6b1b ldr r3, [r3, #48] @ 0x30 8001380: 6878 ldr r0, [r7, #4] 8001382: 4798 blx r3 } } } 8001384: bf00 nop 8001386: 3708 adds r7, #8 8001388: 46bd mov sp, r7 800138a: bd80 pop {r7, pc} 800138c: 2000030c .word 0x2000030c 08001390 : /** * @brief Initialize Gyroscope. * @retval GYRO_OK or GYRO_ERROR */ uint8_t BSP_GYRO_Init(void) { 8001390: b580 push {r7, lr} 8001392: b084 sub sp, #16 8001394: af00 add r7, sp, #0 uint8_t ret = GYRO_ERROR; 8001396: 2301 movs r3, #1 8001398: 73fb strb r3, [r7, #15] uint16_t ctrl = 0x0000; 800139a: 2300 movs r3, #0 800139c: 81bb strh r3, [r7, #12] GYRO_InitTypeDef LSM6DSL_InitStructure; if(Lsm6dslGyroDrv.ReadID() != LSM6DSL_ACC_GYRO_WHO_AM_I) 800139e: 4b1c ldr r3, [pc, #112] @ (8001410 ) 80013a0: 689b ldr r3, [r3, #8] 80013a2: 4798 blx r3 80013a4: 4603 mov r3, r0 80013a6: 2b6a cmp r3, #106 @ 0x6a 80013a8: d002 beq.n 80013b0 { ret = GYRO_ERROR; 80013aa: 2301 movs r3, #1 80013ac: 73fb strb r3, [r7, #15] 80013ae: e029 b.n 8001404 } else { /* Initialize the gyroscope driver structure */ GyroscopeDrv = &Lsm6dslGyroDrv; 80013b0: 4b18 ldr r3, [pc, #96] @ (8001414 ) 80013b2: 4a17 ldr r2, [pc, #92] @ (8001410 ) 80013b4: 601a str r2, [r3, #0] /* Configure Mems : data rate, power mode, full scale and axes */ LSM6DSL_InitStructure.Power_Mode = 0; 80013b6: 2300 movs r3, #0 80013b8: 713b strb r3, [r7, #4] LSM6DSL_InitStructure.Output_DataRate = LSM6DSL_ODR_52Hz; 80013ba: 2330 movs r3, #48 @ 0x30 80013bc: 717b strb r3, [r7, #5] LSM6DSL_InitStructure.Axes_Enable = 0; 80013be: 2300 movs r3, #0 80013c0: 71bb strb r3, [r7, #6] LSM6DSL_InitStructure.Band_Width = 0; 80013c2: 2300 movs r3, #0 80013c4: 71fb strb r3, [r7, #7] LSM6DSL_InitStructure.BlockData_Update = LSM6DSL_BDU_BLOCK_UPDATE; 80013c6: 2340 movs r3, #64 @ 0x40 80013c8: 723b strb r3, [r7, #8] LSM6DSL_InitStructure.Endianness = 0; 80013ca: 2300 movs r3, #0 80013cc: 727b strb r3, [r7, #9] LSM6DSL_InitStructure.Full_Scale = LSM6DSL_GYRO_FS_2000; 80013ce: 230c movs r3, #12 80013d0: 72bb strb r3, [r7, #10] /* Configure MEMS: data rate, full scale */ ctrl = (LSM6DSL_InitStructure.Full_Scale | LSM6DSL_InitStructure.Output_DataRate); 80013d2: 7aba ldrb r2, [r7, #10] 80013d4: 797b ldrb r3, [r7, #5] 80013d6: 4313 orrs r3, r2 80013d8: b2db uxtb r3, r3 80013da: 81bb strh r3, [r7, #12] /* Configure MEMS: BDU and Auto-increment for multi read/write */ ctrl |= ((LSM6DSL_InitStructure.BlockData_Update | LSM6DSL_ACC_GYRO_IF_INC_ENABLED) << 8); 80013dc: 7a3b ldrb r3, [r7, #8] 80013de: f043 0304 orr.w r3, r3, #4 80013e2: b2db uxtb r3, r3 80013e4: b21b sxth r3, r3 80013e6: 021b lsls r3, r3, #8 80013e8: b21a sxth r2, r3 80013ea: f9b7 300c ldrsh.w r3, [r7, #12] 80013ee: 4313 orrs r3, r2 80013f0: b21b sxth r3, r3 80013f2: 81bb strh r3, [r7, #12] /* Initialize component */ GyroscopeDrv->Init(ctrl); 80013f4: 4b07 ldr r3, [pc, #28] @ (8001414 ) 80013f6: 681b ldr r3, [r3, #0] 80013f8: 681b ldr r3, [r3, #0] 80013fa: 89ba ldrh r2, [r7, #12] 80013fc: 4610 mov r0, r2 80013fe: 4798 blx r3 ret = GYRO_OK; 8001400: 2300 movs r3, #0 8001402: 73fb strb r3, [r7, #15] } return ret; 8001404: 7bfb ldrb r3, [r7, #15] } 8001406: 4618 mov r0, r3 8001408: 3710 adds r7, #16 800140a: 46bd mov sp, r7 800140c: bd80 pop {r7, pc} 800140e: bf00 nop 8001410: 20000090 .word 0x20000090 8001414: 20000310 .word 0x20000310 08001418 : /** * @brief Get XYZ angular acceleration from the Gyroscope. * @param pfData: pointer on floating array */ void BSP_GYRO_GetXYZ(float* pfData) { 8001418: b580 push {r7, lr} 800141a: b082 sub sp, #8 800141c: af00 add r7, sp, #0 800141e: 6078 str r0, [r7, #4] if(GyroscopeDrv != NULL) 8001420: 4b08 ldr r3, [pc, #32] @ (8001444 ) 8001422: 681b ldr r3, [r3, #0] 8001424: 2b00 cmp r3, #0 8001426: d009 beq.n 800143c { if(GyroscopeDrv->GetXYZ!= NULL) 8001428: 4b06 ldr r3, [pc, #24] @ (8001444 ) 800142a: 681b ldr r3, [r3, #0] 800142c: 6b1b ldr r3, [r3, #48] @ 0x30 800142e: 2b00 cmp r3, #0 8001430: d004 beq.n 800143c { GyroscopeDrv->GetXYZ(pfData); 8001432: 4b04 ldr r3, [pc, #16] @ (8001444 ) 8001434: 681b ldr r3, [r3, #0] 8001436: 6b1b ldr r3, [r3, #48] @ 0x30 8001438: 6878 ldr r0, [r7, #4] 800143a: 4798 blx r3 } } } 800143c: bf00 nop 800143e: 3708 adds r7, #8 8001440: 46bd mov sp, r7 8001442: bd80 pop {r7, pc} 8001444: 20000310 .word 0x20000310 08001448 : /** * @brief Initializes peripherals used by the I2C Humidity Sensor driver. * @retval HSENSOR status */ uint32_t BSP_HSENSOR_Init(void) { 8001448: b580 push {r7, lr} 800144a: b082 sub sp, #8 800144c: af00 add r7, sp, #0 uint32_t ret; if(HTS221_H_Drv.ReadID(HTS221_I2C_ADDRESS) != HTS221_WHO_AM_I_VAL) 800144e: 4b0c ldr r3, [pc, #48] @ (8001480 ) 8001450: 685b ldr r3, [r3, #4] 8001452: 20be movs r0, #190 @ 0xbe 8001454: 4798 blx r3 8001456: 4603 mov r3, r0 8001458: 2bbc cmp r3, #188 @ 0xbc 800145a: d002 beq.n 8001462 { ret = HSENSOR_ERROR; 800145c: 2301 movs r3, #1 800145e: 607b str r3, [r7, #4] 8001460: e009 b.n 8001476 } else { Hsensor_drv = &HTS221_H_Drv; 8001462: 4b08 ldr r3, [pc, #32] @ (8001484 ) 8001464: 4a06 ldr r2, [pc, #24] @ (8001480 ) 8001466: 601a str r2, [r3, #0] /* HSENSOR Init */ Hsensor_drv->Init(HTS221_I2C_ADDRESS); 8001468: 4b06 ldr r3, [pc, #24] @ (8001484 ) 800146a: 681b ldr r3, [r3, #0] 800146c: 681b ldr r3, [r3, #0] 800146e: 20be movs r0, #190 @ 0xbe 8001470: 4798 blx r3 ret = HSENSOR_OK; 8001472: 2300 movs r3, #0 8001474: 607b str r3, [r7, #4] } return ret; 8001476: 687b ldr r3, [r7, #4] } 8001478: 4618 mov r0, r3 800147a: 3708 adds r7, #8 800147c: 46bd mov sp, r7 800147e: bd80 pop {r7, pc} 8001480: 20000000 .word 0x20000000 8001484: 20000314 .word 0x20000314 08001488 : /** * @brief Read Humidity register of HTS221. * @retval HTS221 measured humidity value. */ float BSP_HSENSOR_ReadHumidity(void) { 8001488: b580 push {r7, lr} 800148a: af00 add r7, sp, #0 return Hsensor_drv->ReadHumidity(HTS221_I2C_ADDRESS); 800148c: 4b04 ldr r3, [pc, #16] @ (80014a0 ) 800148e: 681b ldr r3, [r3, #0] 8001490: 689b ldr r3, [r3, #8] 8001492: 20be movs r0, #190 @ 0xbe 8001494: 4798 blx r3 8001496: eef0 7a40 vmov.f32 s15, s0 } 800149a: eeb0 0a67 vmov.f32 s0, s15 800149e: bd80 pop {r7, pc} 80014a0: 20000314 .word 0x20000314 080014a4 : /** * @brief Initialize a magnetometer sensor * @retval COMPONENT_ERROR in case of failure */ MAGNETO_StatusTypeDef BSP_MAGNETO_Init(void) { 80014a4: b580 push {r7, lr} 80014a6: b082 sub sp, #8 80014a8: af00 add r7, sp, #0 MAGNETO_StatusTypeDef ret = MAGNETO_OK; 80014aa: 2300 movs r3, #0 80014ac: 71fb strb r3, [r7, #7] MAGNETO_InitTypeDef LIS3MDL_InitStructureMag; if(Lis3mdlMagDrv.ReadID() != I_AM_LIS3MDL) 80014ae: 4b11 ldr r3, [pc, #68] @ (80014f4 ) 80014b0: 689b ldr r3, [r3, #8] 80014b2: 4798 blx r3 80014b4: 4603 mov r3, r0 80014b6: 2b3d cmp r3, #61 @ 0x3d 80014b8: d002 beq.n 80014c0 { ret = MAGNETO_ERROR; 80014ba: 2301 movs r3, #1 80014bc: 71fb strb r3, [r7, #7] 80014be: e013 b.n 80014e8 } else { /* Initialize the MAGNETO magnetometer driver structure */ MagnetoDrv = &Lis3mdlMagDrv; 80014c0: 4b0d ldr r3, [pc, #52] @ (80014f8 ) 80014c2: 4a0c ldr r2, [pc, #48] @ (80014f4 ) 80014c4: 601a str r2, [r3, #0] /* MEMS configuration ------------------------------------------------------*/ /* Fill the MAGNETO magnetometer structure */ LIS3MDL_InitStructureMag.Register1 = LIS3MDL_MAG_TEMPSENSOR_DISABLE | LIS3MDL_MAG_OM_XY_HIGH | LIS3MDL_MAG_ODR_40_HZ; 80014c6: 2358 movs r3, #88 @ 0x58 80014c8: 703b strb r3, [r7, #0] LIS3MDL_InitStructureMag.Register2 = LIS3MDL_MAG_FS_4_GA | LIS3MDL_MAG_REBOOT_DEFAULT | LIS3MDL_MAG_SOFT_RESET_DEFAULT; 80014ca: 2300 movs r3, #0 80014cc: 707b strb r3, [r7, #1] LIS3MDL_InitStructureMag.Register3 = LIS3MDL_MAG_CONFIG_NORMAL_MODE | LIS3MDL_MAG_CONTINUOUS_MODE; 80014ce: 2300 movs r3, #0 80014d0: 70bb strb r3, [r7, #2] LIS3MDL_InitStructureMag.Register4 = LIS3MDL_MAG_OM_Z_HIGH | LIS3MDL_MAG_BLE_LSB; 80014d2: 2308 movs r3, #8 80014d4: 70fb strb r3, [r7, #3] LIS3MDL_InitStructureMag.Register5 = LIS3MDL_MAG_BDU_MSBLSB; 80014d6: 2340 movs r3, #64 @ 0x40 80014d8: 713b strb r3, [r7, #4] /* Configure the MAGNETO magnetometer main parameters */ MagnetoDrv->Init(LIS3MDL_InitStructureMag); 80014da: 4b07 ldr r3, [pc, #28] @ (80014f8 ) 80014dc: 681b ldr r3, [r3, #0] 80014de: 681b ldr r3, [r3, #0] 80014e0: 463a mov r2, r7 80014e2: e892 0003 ldmia.w r2, {r0, r1} 80014e6: 4798 blx r3 } return ret; 80014e8: 79fb ldrb r3, [r7, #7] } 80014ea: 4618 mov r0, r3 80014ec: 3708 adds r7, #8 80014ee: 46bd mov sp, r7 80014f0: bd80 pop {r7, pc} 80014f2: bf00 nop 80014f4: 2000001c .word 0x2000001c 80014f8: 20000318 .word 0x20000318 080014fc : * @brief Get XYZ magnetometer values. * @param pDataXYZ Pointer on 3 magnetometer values table with * pDataXYZ[0] = X axis, pDataXYZ[1] = Y axis, pDataXYZ[2] = Z axis */ void BSP_MAGNETO_GetXYZ(int16_t *pDataXYZ) { 80014fc: b580 push {r7, lr} 80014fe: b082 sub sp, #8 8001500: af00 add r7, sp, #0 8001502: 6078 str r0, [r7, #4] if(MagnetoDrv != NULL) 8001504: 4b08 ldr r3, [pc, #32] @ (8001528 ) 8001506: 681b ldr r3, [r3, #0] 8001508: 2b00 cmp r3, #0 800150a: d009 beq.n 8001520 { if(MagnetoDrv->GetXYZ != NULL) 800150c: 4b06 ldr r3, [pc, #24] @ (8001528 ) 800150e: 681b ldr r3, [r3, #0] 8001510: 6b1b ldr r3, [r3, #48] @ 0x30 8001512: 2b00 cmp r3, #0 8001514: d004 beq.n 8001520 { MagnetoDrv->GetXYZ(pDataXYZ); 8001516: 4b04 ldr r3, [pc, #16] @ (8001528 ) 8001518: 681b ldr r3, [r3, #0] 800151a: 6b1b ldr r3, [r3, #48] @ 0x30 800151c: 6878 ldr r0, [r7, #4] 800151e: 4798 blx r3 } } } 8001520: bf00 nop 8001522: 3708 adds r7, #8 8001524: 46bd mov sp, r7 8001526: bd80 pop {r7, pc} 8001528: 20000318 .word 0x20000318 0800152c : /** * @brief Initializes peripherals used by the I2C Pressure Sensor driver. * @retval PSENSOR status */ uint32_t BSP_PSENSOR_Init(void) { 800152c: b580 push {r7, lr} 800152e: b082 sub sp, #8 8001530: af00 add r7, sp, #0 uint32_t ret; if(LPS22HB_P_Drv.ReadID(LPS22HB_I2C_ADDRESS) != LPS22HB_WHO_AM_I_VAL) 8001532: 4b0c ldr r3, [pc, #48] @ (8001564 ) 8001534: 685b ldr r3, [r3, #4] 8001536: 20ba movs r0, #186 @ 0xba 8001538: 4798 blx r3 800153a: 4603 mov r3, r0 800153c: 2bb1 cmp r3, #177 @ 0xb1 800153e: d002 beq.n 8001546 { ret = PSENSOR_ERROR; 8001540: 2301 movs r3, #1 8001542: 607b str r3, [r7, #4] 8001544: e009 b.n 800155a } else { Psensor_drv = &LPS22HB_P_Drv; 8001546: 4b08 ldr r3, [pc, #32] @ (8001568 ) 8001548: 4a06 ldr r2, [pc, #24] @ (8001564 ) 800154a: 601a str r2, [r3, #0] /* PSENSOR Init */ Psensor_drv->Init(LPS22HB_I2C_ADDRESS); 800154c: 4b06 ldr r3, [pc, #24] @ (8001568 ) 800154e: 681b ldr r3, [r3, #0] 8001550: 681b ldr r3, [r3, #0] 8001552: 20ba movs r0, #186 @ 0xba 8001554: 4798 blx r3 ret = PSENSOR_OK; 8001556: 2300 movs r3, #0 8001558: 607b str r3, [r7, #4] } return ret; 800155a: 687b ldr r3, [r7, #4] } 800155c: 4618 mov r0, r3 800155e: 3708 adds r7, #8 8001560: 46bd mov sp, r7 8001562: bd80 pop {r7, pc} 8001564: 20000050 .word 0x20000050 8001568: 2000031c .word 0x2000031c 0800156c : /** * @brief Read Pressure register of LPS22HB. * @retval LPS22HB measured pressure value. */ float BSP_PSENSOR_ReadPressure(void) { 800156c: b580 push {r7, lr} 800156e: af00 add r7, sp, #0 return Psensor_drv->ReadPressure(LPS22HB_I2C_ADDRESS); 8001570: 4b04 ldr r3, [pc, #16] @ (8001584 ) 8001572: 681b ldr r3, [r3, #0] 8001574: 689b ldr r3, [r3, #8] 8001576: 20ba movs r0, #186 @ 0xba 8001578: 4798 blx r3 800157a: eef0 7a40 vmov.f32 s15, s0 } 800157e: eeb0 0a67 vmov.f32 s0, s15 8001582: bd80 pop {r7, pc} 8001584: 2000031c .word 0x2000031c 08001588 : /** * @brief Initializes peripherals used by the I2C Temperature Sensor driver. * @retval TSENSOR status */ uint32_t BSP_TSENSOR_Init(void) { 8001588: b580 push {r7, lr} 800158a: b082 sub sp, #8 800158c: af00 add r7, sp, #0 uint8_t ret = TSENSOR_ERROR; 800158e: 2301 movs r3, #1 8001590: 71fb strb r3, [r7, #7] #ifdef USE_LPS22HB_TEMP tsensor_drv = &LPS22HB_T_Drv; #else /* USE_HTS221_TEMP */ tsensor_drv = &HTS221_T_Drv; 8001592: 4b09 ldr r3, [pc, #36] @ (80015b8 ) 8001594: 4a09 ldr r2, [pc, #36] @ (80015bc ) 8001596: 601a str r2, [r3, #0] #endif /* Low level init */ SENSOR_IO_Init(); 8001598: f7ff fe42 bl 8001220 /* TSENSOR Init */ tsensor_drv->Init(TSENSOR_I2C_ADDRESS, NULL); 800159c: 4b06 ldr r3, [pc, #24] @ (80015b8 ) 800159e: 681b ldr r3, [r3, #0] 80015a0: 681b ldr r3, [r3, #0] 80015a2: 2100 movs r1, #0 80015a4: 20be movs r0, #190 @ 0xbe 80015a6: 4798 blx r3 ret = TSENSOR_OK; 80015a8: 2300 movs r3, #0 80015aa: 71fb strb r3, [r7, #7] return ret; 80015ac: 79fb ldrb r3, [r7, #7] } 80015ae: 4618 mov r0, r3 80015b0: 3708 adds r7, #8 80015b2: 46bd mov sp, r7 80015b4: bd80 pop {r7, pc} 80015b6: bf00 nop 80015b8: 20000320 .word 0x20000320 80015bc: 2000000c .word 0x2000000c 080015c0 : /** * @brief Read Temperature register of TS751. * @retval STTS751 measured temperature value. */ float BSP_TSENSOR_ReadTemp(void) { 80015c0: b580 push {r7, lr} 80015c2: af00 add r7, sp, #0 return tsensor_drv->ReadTemp(TSENSOR_I2C_ADDRESS); 80015c4: 4b04 ldr r3, [pc, #16] @ (80015d8 ) 80015c6: 681b ldr r3, [r3, #0] 80015c8: 68db ldr r3, [r3, #12] 80015ca: 20be movs r0, #190 @ 0xbe 80015cc: 4798 blx r3 80015ce: eef0 7a40 vmov.f32 s15, s0 } 80015d2: eeb0 0a67 vmov.f32 s0, s15 80015d6: bd80 pop {r7, pc} 80015d8: 20000320 .word 0x20000320 080015dc : */ /** * @brief Set HTS221 humidity sensor Initialization. */ void HTS221_H_Init(uint16_t DeviceAddr) { 80015dc: b580 push {r7, lr} 80015de: b084 sub sp, #16 80015e0: af00 add r7, sp, #0 80015e2: 4603 mov r3, r0 80015e4: 80fb strh r3, [r7, #6] uint8_t tmp; /* Read CTRL_REG1 */ tmp = SENSOR_IO_Read(DeviceAddr, HTS221_CTRL_REG1); 80015e6: 88fb ldrh r3, [r7, #6] 80015e8: b2db uxtb r3, r3 80015ea: 2120 movs r1, #32 80015ec: 4618 mov r0, r3 80015ee: f7ff fe3b bl 8001268 80015f2: 4603 mov r3, r0 80015f4: 73fb strb r3, [r7, #15] /* Enable BDU */ tmp &= ~HTS221_BDU_MASK; 80015f6: 7bfb ldrb r3, [r7, #15] 80015f8: f023 0304 bic.w r3, r3, #4 80015fc: 73fb strb r3, [r7, #15] tmp |= (1 << HTS221_BDU_BIT); 80015fe: 7bfb ldrb r3, [r7, #15] 8001600: f043 0304 orr.w r3, r3, #4 8001604: 73fb strb r3, [r7, #15] /* Set default ODR */ tmp &= ~HTS221_ODR_MASK; 8001606: 7bfb ldrb r3, [r7, #15] 8001608: f023 0303 bic.w r3, r3, #3 800160c: 73fb strb r3, [r7, #15] tmp |= (uint8_t)0x01; /* Set ODR to 1Hz */ 800160e: 7bfb ldrb r3, [r7, #15] 8001610: f043 0301 orr.w r3, r3, #1 8001614: 73fb strb r3, [r7, #15] /* Activate the device */ tmp |= HTS221_PD_MASK; 8001616: 7bfb ldrb r3, [r7, #15] 8001618: f063 037f orn r3, r3, #127 @ 0x7f 800161c: 73fb strb r3, [r7, #15] /* Apply settings to CTRL_REG1 */ SENSOR_IO_Write(DeviceAddr, HTS221_CTRL_REG1, tmp); 800161e: 88fb ldrh r3, [r7, #6] 8001620: b2db uxtb r3, r3 8001622: 7bfa ldrb r2, [r7, #15] 8001624: 2120 movs r1, #32 8001626: 4618 mov r0, r3 8001628: f7ff fe04 bl 8001234 } 800162c: bf00 nop 800162e: 3710 adds r7, #16 8001630: 46bd mov sp, r7 8001632: bd80 pop {r7, pc} 08001634 : /** * @brief Read HTS221 ID. * @retval ID */ uint8_t HTS221_H_ReadID(uint16_t DeviceAddr) { 8001634: b580 push {r7, lr} 8001636: b084 sub sp, #16 8001638: af00 add r7, sp, #0 800163a: 4603 mov r3, r0 800163c: 80fb strh r3, [r7, #6] uint8_t ctrl = 0x00; 800163e: 2300 movs r3, #0 8001640: 73fb strb r3, [r7, #15] /* IO interface initialization */ SENSOR_IO_Init(); 8001642: f7ff fded bl 8001220 /* Read value at Who am I register address */ ctrl = SENSOR_IO_Read(DeviceAddr, HTS221_WHO_AM_I_REG); 8001646: 88fb ldrh r3, [r7, #6] 8001648: b2db uxtb r3, r3 800164a: 210f movs r1, #15 800164c: 4618 mov r0, r3 800164e: f7ff fe0b bl 8001268 8001652: 4603 mov r3, r0 8001654: 73fb strb r3, [r7, #15] return ctrl; 8001656: 7bfb ldrb r3, [r7, #15] } 8001658: 4618 mov r0, r3 800165a: 3710 adds r7, #16 800165c: 46bd mov sp, r7 800165e: bd80 pop {r7, pc} 08001660 : /** * @brief Read humidity value of HTS221 * @retval humidity value; */ float HTS221_H_ReadHumidity(uint16_t DeviceAddr) { 8001660: b580 push {r7, lr} 8001662: b088 sub sp, #32 8001664: af00 add r7, sp, #0 8001666: 4603 mov r3, r0 8001668: 80fb strh r3, [r7, #6] int16_t H0_T0_out, H1_T0_out, H_T_out; int16_t H0_rh, H1_rh; uint8_t buffer[2]; float tmp_f; SENSOR_IO_ReadMultiple(DeviceAddr, (HTS221_H0_RH_X2 | 0x80), buffer, 2); 800166a: 88fb ldrh r3, [r7, #6] 800166c: b2d8 uxtb r0, r3 800166e: f107 020c add.w r2, r7, #12 8001672: 2302 movs r3, #2 8001674: 21b0 movs r1, #176 @ 0xb0 8001676: f7ff fe15 bl 80012a4 H0_rh = buffer[0] >> 1; 800167a: 7b3b ldrb r3, [r7, #12] 800167c: 085b lsrs r3, r3, #1 800167e: b2db uxtb r3, r3 8001680: 83fb strh r3, [r7, #30] H1_rh = buffer[1] >> 1; 8001682: 7b7b ldrb r3, [r7, #13] 8001684: 085b lsrs r3, r3, #1 8001686: b2db uxtb r3, r3 8001688: 83bb strh r3, [r7, #28] SENSOR_IO_ReadMultiple(DeviceAddr, (HTS221_H0_T0_OUT_L | 0x80), buffer, 2); 800168a: 88fb ldrh r3, [r7, #6] 800168c: b2d8 uxtb r0, r3 800168e: f107 020c add.w r2, r7, #12 8001692: 2302 movs r3, #2 8001694: 21b6 movs r1, #182 @ 0xb6 8001696: f7ff fe05 bl 80012a4 H0_T0_out = (((uint16_t)buffer[1]) << 8) | (uint16_t)buffer[0]; 800169a: 7b7b ldrb r3, [r7, #13] 800169c: b21b sxth r3, r3 800169e: 021b lsls r3, r3, #8 80016a0: b21a sxth r2, r3 80016a2: 7b3b ldrb r3, [r7, #12] 80016a4: b21b sxth r3, r3 80016a6: 4313 orrs r3, r2 80016a8: 837b strh r3, [r7, #26] SENSOR_IO_ReadMultiple(DeviceAddr, (HTS221_H1_T0_OUT_L | 0x80), buffer, 2); 80016aa: 88fb ldrh r3, [r7, #6] 80016ac: b2d8 uxtb r0, r3 80016ae: f107 020c add.w r2, r7, #12 80016b2: 2302 movs r3, #2 80016b4: 21ba movs r1, #186 @ 0xba 80016b6: f7ff fdf5 bl 80012a4 H1_T0_out = (((uint16_t)buffer[1]) << 8) | (uint16_t)buffer[0]; 80016ba: 7b7b ldrb r3, [r7, #13] 80016bc: b21b sxth r3, r3 80016be: 021b lsls r3, r3, #8 80016c0: b21a sxth r2, r3 80016c2: 7b3b ldrb r3, [r7, #12] 80016c4: b21b sxth r3, r3 80016c6: 4313 orrs r3, r2 80016c8: 833b strh r3, [r7, #24] SENSOR_IO_ReadMultiple(DeviceAddr, (HTS221_HR_OUT_L_REG | 0x80), buffer, 2); 80016ca: 88fb ldrh r3, [r7, #6] 80016cc: b2d8 uxtb r0, r3 80016ce: f107 020c add.w r2, r7, #12 80016d2: 2302 movs r3, #2 80016d4: 21a8 movs r1, #168 @ 0xa8 80016d6: f7ff fde5 bl 80012a4 H_T_out = (((uint16_t)buffer[1]) << 8) | (uint16_t)buffer[0]; 80016da: 7b7b ldrb r3, [r7, #13] 80016dc: b21b sxth r3, r3 80016de: 021b lsls r3, r3, #8 80016e0: b21a sxth r2, r3 80016e2: 7b3b ldrb r3, [r7, #12] 80016e4: b21b sxth r3, r3 80016e6: 4313 orrs r3, r2 80016e8: 82fb strh r3, [r7, #22] tmp_f = (float)(H_T_out - H0_T0_out) * (float)(H1_rh - H0_rh) / (float)(H1_T0_out - H0_T0_out) + H0_rh; 80016ea: f9b7 2016 ldrsh.w r2, [r7, #22] 80016ee: f9b7 301a ldrsh.w r3, [r7, #26] 80016f2: 1ad3 subs r3, r2, r3 80016f4: ee07 3a90 vmov s15, r3 80016f8: eeb8 7ae7 vcvt.f32.s32 s14, s15 80016fc: f9b7 201c ldrsh.w r2, [r7, #28] 8001700: f9b7 301e ldrsh.w r3, [r7, #30] 8001704: 1ad3 subs r3, r2, r3 8001706: ee07 3a90 vmov s15, r3 800170a: eef8 7ae7 vcvt.f32.s32 s15, s15 800170e: ee67 6a27 vmul.f32 s13, s14, s15 8001712: f9b7 2018 ldrsh.w r2, [r7, #24] 8001716: f9b7 301a ldrsh.w r3, [r7, #26] 800171a: 1ad3 subs r3, r2, r3 800171c: ee07 3a90 vmov s15, r3 8001720: eef8 7ae7 vcvt.f32.s32 s15, s15 8001724: ee86 7aa7 vdiv.f32 s14, s13, s15 8001728: f9b7 301e ldrsh.w r3, [r7, #30] 800172c: ee07 3a90 vmov s15, r3 8001730: eef8 7ae7 vcvt.f32.s32 s15, s15 8001734: ee77 7a27 vadd.f32 s15, s14, s15 8001738: edc7 7a04 vstr s15, [r7, #16] tmp_f *= 10.0f; 800173c: edd7 7a04 vldr s15, [r7, #16] 8001740: eeb2 7a04 vmov.f32 s14, #36 @ 0x41200000 10.0 8001744: ee67 7a87 vmul.f32 s15, s15, s14 8001748: edc7 7a04 vstr s15, [r7, #16] tmp_f = ( tmp_f > 1000.0f ) ? 1000.0f : ( tmp_f < 0.0f ) ? 0.0f 800174c: edd7 7a04 vldr s15, [r7, #16] 8001750: ed9f 7a10 vldr s14, [pc, #64] @ 8001794 8001754: eef4 7ac7 vcmpe.f32 s15, s14 8001758: eef1 fa10 vmrs APSR_nzcv, fpscr 800175c: dd01 ble.n 8001762 800175e: 4b0e ldr r3, [pc, #56] @ (8001798 ) 8001760: e00a b.n 8001778 : tmp_f; 8001762: edd7 7a04 vldr s15, [r7, #16] 8001766: eef5 7ac0 vcmpe.f32 s15, #0.0 800176a: eef1 fa10 vmrs APSR_nzcv, fpscr 800176e: d502 bpl.n 8001776 8001770: f04f 0300 mov.w r3, #0 8001774: e000 b.n 8001778 8001776: 693b ldr r3, [r7, #16] tmp_f = ( tmp_f > 1000.0f ) ? 1000.0f 8001778: 613b str r3, [r7, #16] return (tmp_f / 10.0f); 800177a: edd7 7a04 vldr s15, [r7, #16] 800177e: eeb2 7a04 vmov.f32 s14, #36 @ 0x41200000 10.0 8001782: eec7 6a87 vdiv.f32 s13, s15, s14 8001786: eef0 7a66 vmov.f32 s15, s13 } 800178a: eeb0 0a67 vmov.f32 s0, s15 800178e: 3720 adds r7, #32 8001790: 46bd mov sp, r7 8001792: bd80 pop {r7, pc} 8001794: 447a0000 .word 0x447a0000 8001798: 447a0000 .word 0x447a0000 0800179c : * @param DeviceAddr: I2C device address * @param InitStruct: pointer to a TSENSOR_InitTypeDef structure * that contains the configuration setting for the HTS221. */ void HTS221_T_Init(uint16_t DeviceAddr, TSENSOR_InitTypeDef *pInitStruct) { 800179c: b580 push {r7, lr} 800179e: b084 sub sp, #16 80017a0: af00 add r7, sp, #0 80017a2: 4603 mov r3, r0 80017a4: 6039 str r1, [r7, #0] 80017a6: 80fb strh r3, [r7, #6] uint8_t tmp; /* Read CTRL_REG1 */ tmp = SENSOR_IO_Read(DeviceAddr, HTS221_CTRL_REG1); 80017a8: 88fb ldrh r3, [r7, #6] 80017aa: b2db uxtb r3, r3 80017ac: 2120 movs r1, #32 80017ae: 4618 mov r0, r3 80017b0: f7ff fd5a bl 8001268 80017b4: 4603 mov r3, r0 80017b6: 73fb strb r3, [r7, #15] /* Enable BDU */ tmp &= ~HTS221_BDU_MASK; 80017b8: 7bfb ldrb r3, [r7, #15] 80017ba: f023 0304 bic.w r3, r3, #4 80017be: 73fb strb r3, [r7, #15] tmp |= (1 << HTS221_BDU_BIT); 80017c0: 7bfb ldrb r3, [r7, #15] 80017c2: f043 0304 orr.w r3, r3, #4 80017c6: 73fb strb r3, [r7, #15] /* Set default ODR */ tmp &= ~HTS221_ODR_MASK; 80017c8: 7bfb ldrb r3, [r7, #15] 80017ca: f023 0303 bic.w r3, r3, #3 80017ce: 73fb strb r3, [r7, #15] tmp |= (uint8_t)0x01; /* Set ODR to 1Hz */ 80017d0: 7bfb ldrb r3, [r7, #15] 80017d2: f043 0301 orr.w r3, r3, #1 80017d6: 73fb strb r3, [r7, #15] /* Activate the device */ tmp |= HTS221_PD_MASK; 80017d8: 7bfb ldrb r3, [r7, #15] 80017da: f063 037f orn r3, r3, #127 @ 0x7f 80017de: 73fb strb r3, [r7, #15] /* Apply settings to CTRL_REG1 */ SENSOR_IO_Write(DeviceAddr, HTS221_CTRL_REG1, tmp); 80017e0: 88fb ldrh r3, [r7, #6] 80017e2: b2db uxtb r3, r3 80017e4: 7bfa ldrb r2, [r7, #15] 80017e6: 2120 movs r1, #32 80017e8: 4618 mov r0, r3 80017ea: f7ff fd23 bl 8001234 } 80017ee: bf00 nop 80017f0: 3710 adds r7, #16 80017f2: 46bd mov sp, r7 80017f4: bd80 pop {r7, pc} 080017f6 : * @brief Read temperature value of HTS221 * @param DeviceAddr: I2C device address * @retval temperature value */ float HTS221_T_ReadTemp(uint16_t DeviceAddr) { 80017f6: b580 push {r7, lr} 80017f8: b088 sub sp, #32 80017fa: af00 add r7, sp, #0 80017fc: 4603 mov r3, r0 80017fe: 80fb strh r3, [r7, #6] int16_t T0_out, T1_out, T_out, T0_degC_x8_u16, T1_degC_x8_u16; int16_t T0_degC, T1_degC; uint8_t buffer[4], tmp; float tmp_f; SENSOR_IO_ReadMultiple(DeviceAddr, (HTS221_T0_DEGC_X8 | 0x80), buffer, 2); 8001800: 88fb ldrh r3, [r7, #6] 8001802: b2d8 uxtb r0, r3 8001804: f107 0208 add.w r2, r7, #8 8001808: 2302 movs r3, #2 800180a: 21b2 movs r1, #178 @ 0xb2 800180c: f7ff fd4a bl 80012a4 tmp = SENSOR_IO_Read(DeviceAddr, HTS221_T0_T1_DEGC_H2); 8001810: 88fb ldrh r3, [r7, #6] 8001812: b2db uxtb r3, r3 8001814: 2135 movs r1, #53 @ 0x35 8001816: 4618 mov r0, r3 8001818: f7ff fd26 bl 8001268 800181c: 4603 mov r3, r0 800181e: 77fb strb r3, [r7, #31] T0_degC_x8_u16 = (((uint16_t)(tmp & 0x03)) << 8) | ((uint16_t)buffer[0]); 8001820: 7ffb ldrb r3, [r7, #31] 8001822: b21b sxth r3, r3 8001824: 021b lsls r3, r3, #8 8001826: b21b sxth r3, r3 8001828: f403 7340 and.w r3, r3, #768 @ 0x300 800182c: b21a sxth r2, r3 800182e: 7a3b ldrb r3, [r7, #8] 8001830: b21b sxth r3, r3 8001832: 4313 orrs r3, r2 8001834: 83bb strh r3, [r7, #28] T1_degC_x8_u16 = (((uint16_t)(tmp & 0x0C)) << 6) | ((uint16_t)buffer[1]); 8001836: 7ffb ldrb r3, [r7, #31] 8001838: b21b sxth r3, r3 800183a: 019b lsls r3, r3, #6 800183c: b21b sxth r3, r3 800183e: f403 7340 and.w r3, r3, #768 @ 0x300 8001842: b21a sxth r2, r3 8001844: 7a7b ldrb r3, [r7, #9] 8001846: b21b sxth r3, r3 8001848: 4313 orrs r3, r2 800184a: 837b strh r3, [r7, #26] T0_degC = T0_degC_x8_u16 >> 3; 800184c: f9b7 301c ldrsh.w r3, [r7, #28] 8001850: 10db asrs r3, r3, #3 8001852: 833b strh r3, [r7, #24] T1_degC = T1_degC_x8_u16 >> 3; 8001854: f9b7 301a ldrsh.w r3, [r7, #26] 8001858: 10db asrs r3, r3, #3 800185a: 82fb strh r3, [r7, #22] SENSOR_IO_ReadMultiple(DeviceAddr, (HTS221_T0_OUT_L | 0x80), buffer, 4); 800185c: 88fb ldrh r3, [r7, #6] 800185e: b2d8 uxtb r0, r3 8001860: f107 0208 add.w r2, r7, #8 8001864: 2304 movs r3, #4 8001866: 21bc movs r1, #188 @ 0xbc 8001868: f7ff fd1c bl 80012a4 T0_out = (((uint16_t)buffer[1]) << 8) | (uint16_t)buffer[0]; 800186c: 7a7b ldrb r3, [r7, #9] 800186e: b21b sxth r3, r3 8001870: 021b lsls r3, r3, #8 8001872: b21a sxth r2, r3 8001874: 7a3b ldrb r3, [r7, #8] 8001876: b21b sxth r3, r3 8001878: 4313 orrs r3, r2 800187a: 82bb strh r3, [r7, #20] T1_out = (((uint16_t)buffer[3]) << 8) | (uint16_t)buffer[2]; 800187c: 7afb ldrb r3, [r7, #11] 800187e: b21b sxth r3, r3 8001880: 021b lsls r3, r3, #8 8001882: b21a sxth r2, r3 8001884: 7abb ldrb r3, [r7, #10] 8001886: b21b sxth r3, r3 8001888: 4313 orrs r3, r2 800188a: 827b strh r3, [r7, #18] SENSOR_IO_ReadMultiple(DeviceAddr, (HTS221_TEMP_OUT_L_REG | 0x80), buffer, 2); 800188c: 88fb ldrh r3, [r7, #6] 800188e: b2d8 uxtb r0, r3 8001890: f107 0208 add.w r2, r7, #8 8001894: 2302 movs r3, #2 8001896: 21aa movs r1, #170 @ 0xaa 8001898: f7ff fd04 bl 80012a4 T_out = (((uint16_t)buffer[1]) << 8) | (uint16_t)buffer[0]; 800189c: 7a7b ldrb r3, [r7, #9] 800189e: b21b sxth r3, r3 80018a0: 021b lsls r3, r3, #8 80018a2: b21a sxth r2, r3 80018a4: 7a3b ldrb r3, [r7, #8] 80018a6: b21b sxth r3, r3 80018a8: 4313 orrs r3, r2 80018aa: 823b strh r3, [r7, #16] tmp_f = (float)(T_out - T0_out) * (float)(T1_degC - T0_degC) / (float)(T1_out - T0_out) + T0_degC; 80018ac: f9b7 2010 ldrsh.w r2, [r7, #16] 80018b0: f9b7 3014 ldrsh.w r3, [r7, #20] 80018b4: 1ad3 subs r3, r2, r3 80018b6: ee07 3a90 vmov s15, r3 80018ba: eeb8 7ae7 vcvt.f32.s32 s14, s15 80018be: f9b7 2016 ldrsh.w r2, [r7, #22] 80018c2: f9b7 3018 ldrsh.w r3, [r7, #24] 80018c6: 1ad3 subs r3, r2, r3 80018c8: ee07 3a90 vmov s15, r3 80018cc: eef8 7ae7 vcvt.f32.s32 s15, s15 80018d0: ee67 6a27 vmul.f32 s13, s14, s15 80018d4: f9b7 2012 ldrsh.w r2, [r7, #18] 80018d8: f9b7 3014 ldrsh.w r3, [r7, #20] 80018dc: 1ad3 subs r3, r2, r3 80018de: ee07 3a90 vmov s15, r3 80018e2: eef8 7ae7 vcvt.f32.s32 s15, s15 80018e6: ee86 7aa7 vdiv.f32 s14, s13, s15 80018ea: f9b7 3018 ldrsh.w r3, [r7, #24] 80018ee: ee07 3a90 vmov s15, r3 80018f2: eef8 7ae7 vcvt.f32.s32 s15, s15 80018f6: ee77 7a27 vadd.f32 s15, s14, s15 80018fa: edc7 7a03 vstr s15, [r7, #12] return tmp_f; 80018fe: 68fb ldr r3, [r7, #12] 8001900: ee07 3a90 vmov s15, r3 } 8001904: eeb0 0a67 vmov.f32 s0, s15 8001908: 3720 adds r7, #32 800190a: 46bd mov sp, r7 800190c: bd80 pop {r7, pc} 0800190e : * @brief Set LIS3MDL Magnetometer Initialization. * @param LIS3MDL_InitStruct: pointer to a LIS3MDL_MagInitTypeDef structure * that contains the configuration setting for the LIS3MDL. */ void LIS3MDL_MagInit(MAGNETO_InitTypeDef LIS3MDL_InitStruct) { 800190e: b580 push {r7, lr} 8001910: b082 sub sp, #8 8001912: af00 add r7, sp, #0 8001914: 463b mov r3, r7 8001916: e883 0003 stmia.w r3, {r0, r1} SENSOR_IO_Write(LIS3MDL_MAG_I2C_ADDRESS_HIGH, LIS3MDL_MAG_CTRL_REG1, LIS3MDL_InitStruct.Register1); 800191a: 783b ldrb r3, [r7, #0] 800191c: 461a mov r2, r3 800191e: 2120 movs r1, #32 8001920: 203c movs r0, #60 @ 0x3c 8001922: f7ff fc87 bl 8001234 SENSOR_IO_Write(LIS3MDL_MAG_I2C_ADDRESS_HIGH, LIS3MDL_MAG_CTRL_REG2, LIS3MDL_InitStruct.Register2); 8001926: 787b ldrb r3, [r7, #1] 8001928: 461a mov r2, r3 800192a: 2121 movs r1, #33 @ 0x21 800192c: 203c movs r0, #60 @ 0x3c 800192e: f7ff fc81 bl 8001234 SENSOR_IO_Write(LIS3MDL_MAG_I2C_ADDRESS_HIGH, LIS3MDL_MAG_CTRL_REG3, LIS3MDL_InitStruct.Register3); 8001932: 78bb ldrb r3, [r7, #2] 8001934: 461a mov r2, r3 8001936: 2122 movs r1, #34 @ 0x22 8001938: 203c movs r0, #60 @ 0x3c 800193a: f7ff fc7b bl 8001234 SENSOR_IO_Write(LIS3MDL_MAG_I2C_ADDRESS_HIGH, LIS3MDL_MAG_CTRL_REG4, LIS3MDL_InitStruct.Register4); 800193e: 78fb ldrb r3, [r7, #3] 8001940: 461a mov r2, r3 8001942: 2123 movs r1, #35 @ 0x23 8001944: 203c movs r0, #60 @ 0x3c 8001946: f7ff fc75 bl 8001234 SENSOR_IO_Write(LIS3MDL_MAG_I2C_ADDRESS_HIGH, LIS3MDL_MAG_CTRL_REG5, LIS3MDL_InitStruct.Register5); 800194a: 793b ldrb r3, [r7, #4] 800194c: 461a mov r2, r3 800194e: 2124 movs r1, #36 @ 0x24 8001950: 203c movs r0, #60 @ 0x3c 8001952: f7ff fc6f bl 8001234 } 8001956: bf00 nop 8001958: 3708 adds r7, #8 800195a: 46bd mov sp, r7 800195c: bd80 pop {r7, pc} 0800195e : /** * @brief LIS3MDL Magnetometer De-initialization. */ void LIS3MDL_MagDeInit(void) { 800195e: b580 push {r7, lr} 8001960: b082 sub sp, #8 8001962: af00 add r7, sp, #0 uint8_t ctrl = 0x00; 8001964: 2300 movs r3, #0 8001966: 71fb strb r3, [r7, #7] /* Read control register 1 value */ ctrl = SENSOR_IO_Read(LIS3MDL_MAG_I2C_ADDRESS_HIGH, LIS3MDL_MAG_CTRL_REG3); 8001968: 2122 movs r1, #34 @ 0x22 800196a: 203c movs r0, #60 @ 0x3c 800196c: f7ff fc7c bl 8001268 8001970: 4603 mov r3, r0 8001972: 71fb strb r3, [r7, #7] /* Clear Selection Mode bits */ ctrl &= ~(LIS3MDL_MAG_SELECTION_MODE); 8001974: 79fb ldrb r3, [r7, #7] 8001976: f023 0303 bic.w r3, r3, #3 800197a: 71fb strb r3, [r7, #7] /* Set Power down */ ctrl |= LIS3MDL_MAG_POWERDOWN2_MODE; 800197c: 79fb ldrb r3, [r7, #7] 800197e: f043 0303 orr.w r3, r3, #3 8001982: 71fb strb r3, [r7, #7] /* write back control register */ SENSOR_IO_Write(LIS3MDL_MAG_I2C_ADDRESS_HIGH, LIS3MDL_MAG_CTRL_REG3, ctrl); 8001984: 79fb ldrb r3, [r7, #7] 8001986: 461a mov r2, r3 8001988: 2122 movs r1, #34 @ 0x22 800198a: 203c movs r0, #60 @ 0x3c 800198c: f7ff fc52 bl 8001234 } 8001990: bf00 nop 8001992: 3708 adds r7, #8 8001994: 46bd mov sp, r7 8001996: bd80 pop {r7, pc} 08001998 : /** * @brief Read LIS3MDL ID. * @retval ID */ uint8_t LIS3MDL_MagReadID(void) { 8001998: b580 push {r7, lr} 800199a: af00 add r7, sp, #0 /* IO interface initialization */ SENSOR_IO_Init(); 800199c: f7ff fc40 bl 8001220 /* Read value at Who am I register address */ return (SENSOR_IO_Read(LIS3MDL_MAG_I2C_ADDRESS_HIGH, LIS3MDL_MAG_WHO_AM_I_REG)); 80019a0: 210f movs r1, #15 80019a2: 203c movs r0, #60 @ 0x3c 80019a4: f7ff fc60 bl 8001268 80019a8: 4603 mov r3, r0 } 80019aa: 4618 mov r0, r3 80019ac: bd80 pop {r7, pc} 080019ae : /** * @brief Set/Unset Magnetometer in low power mode. * @param status 0 means disable Low Power Mode, otherwise Low Power Mode is enabled */ void LIS3MDL_MagLowPower(uint16_t status) { 80019ae: b580 push {r7, lr} 80019b0: b084 sub sp, #16 80019b2: af00 add r7, sp, #0 80019b4: 4603 mov r3, r0 80019b6: 80fb strh r3, [r7, #6] uint8_t ctrl = 0; 80019b8: 2300 movs r3, #0 80019ba: 73fb strb r3, [r7, #15] /* Read control register 1 value */ ctrl = SENSOR_IO_Read(LIS3MDL_MAG_I2C_ADDRESS_HIGH, LIS3MDL_MAG_CTRL_REG3); 80019bc: 2122 movs r1, #34 @ 0x22 80019be: 203c movs r0, #60 @ 0x3c 80019c0: f7ff fc52 bl 8001268 80019c4: 4603 mov r3, r0 80019c6: 73fb strb r3, [r7, #15] /* Clear Low Power Mode bit */ ctrl &= ~(0x20); 80019c8: 7bfb ldrb r3, [r7, #15] 80019ca: f023 0320 bic.w r3, r3, #32 80019ce: 73fb strb r3, [r7, #15] /* Set Low Power Mode */ if(status) 80019d0: 88fb ldrh r3, [r7, #6] 80019d2: 2b00 cmp r3, #0 80019d4: d003 beq.n 80019de { ctrl |= LIS3MDL_MAG_CONFIG_LOWPOWER_MODE; 80019d6: 7bfb ldrb r3, [r7, #15] 80019d8: f043 0320 orr.w r3, r3, #32 80019dc: 73fb strb r3, [r7, #15] { ctrl |= LIS3MDL_MAG_CONFIG_NORMAL_MODE; } /* write back control register */ SENSOR_IO_Write(LIS3MDL_MAG_I2C_ADDRESS_HIGH, LIS3MDL_MAG_CTRL_REG3, ctrl); 80019de: 7bfb ldrb r3, [r7, #15] 80019e0: 461a mov r2, r3 80019e2: 2122 movs r1, #34 @ 0x22 80019e4: 203c movs r0, #60 @ 0x3c 80019e6: f7ff fc25 bl 8001234 } 80019ea: bf00 nop 80019ec: 3710 adds r7, #16 80019ee: 46bd mov sp, r7 80019f0: bd80 pop {r7, pc} ... 080019f4 : /** * @brief Read X, Y & Z Magnetometer values * @param pData: Data out pointer */ void LIS3MDL_MagReadXYZ(int16_t* pData) { 80019f4: b580 push {r7, lr} 80019f6: b088 sub sp, #32 80019f8: af00 add r7, sp, #0 80019fa: 6078 str r0, [r7, #4] int16_t pnRawData[3]; uint8_t ctrlm= 0; 80019fc: 2300 movs r3, #0 80019fe: 75fb strb r3, [r7, #23] uint8_t buffer[6]; uint8_t i = 0; 8001a00: 2300 movs r3, #0 8001a02: 77fb strb r3, [r7, #31] float sensitivity = 0; 8001a04: f04f 0300 mov.w r3, #0 8001a08: 61bb str r3, [r7, #24] /* Read the magnetometer control register content */ ctrlm = SENSOR_IO_Read(LIS3MDL_MAG_I2C_ADDRESS_HIGH, LIS3MDL_MAG_CTRL_REG2); 8001a0a: 2121 movs r1, #33 @ 0x21 8001a0c: 203c movs r0, #60 @ 0x3c 8001a0e: f7ff fc2b bl 8001268 8001a12: 4603 mov r3, r0 8001a14: 75fb strb r3, [r7, #23] /* Read output register X, Y & Z acceleration */ SENSOR_IO_ReadMultiple(LIS3MDL_MAG_I2C_ADDRESS_HIGH, (LIS3MDL_MAG_OUTX_L | 0x80), buffer, 6); 8001a16: f107 0208 add.w r2, r7, #8 8001a1a: 2306 movs r3, #6 8001a1c: 21a8 movs r1, #168 @ 0xa8 8001a1e: 203c movs r0, #60 @ 0x3c 8001a20: f7ff fc40 bl 80012a4 for(i=0; i<3; i++) 8001a24: 2300 movs r3, #0 8001a26: 77fb strb r3, [r7, #31] 8001a28: e01a b.n 8001a60 { pnRawData[i]=((((uint16_t)buffer[2*i+1]) << 8) + (uint16_t)buffer[2*i]); 8001a2a: 7ffb ldrb r3, [r7, #31] 8001a2c: 005b lsls r3, r3, #1 8001a2e: 3301 adds r3, #1 8001a30: 3320 adds r3, #32 8001a32: 443b add r3, r7 8001a34: f813 3c18 ldrb.w r3, [r3, #-24] 8001a38: 021b lsls r3, r3, #8 8001a3a: b29b uxth r3, r3 8001a3c: 7ffa ldrb r2, [r7, #31] 8001a3e: 0052 lsls r2, r2, #1 8001a40: 3220 adds r2, #32 8001a42: 443a add r2, r7 8001a44: f812 2c18 ldrb.w r2, [r2, #-24] 8001a48: 4413 add r3, r2 8001a4a: b29a uxth r2, r3 8001a4c: 7ffb ldrb r3, [r7, #31] 8001a4e: b212 sxth r2, r2 8001a50: 005b lsls r3, r3, #1 8001a52: 3320 adds r3, #32 8001a54: 443b add r3, r7 8001a56: f823 2c10 strh.w r2, [r3, #-16] for(i=0; i<3; i++) 8001a5a: 7ffb ldrb r3, [r7, #31] 8001a5c: 3301 adds r3, #1 8001a5e: 77fb strb r3, [r7, #31] 8001a60: 7ffb ldrb r3, [r7, #31] 8001a62: 2b02 cmp r3, #2 8001a64: d9e1 bls.n 8001a2a } /* Normal mode */ /* Switch the sensitivity value set in the CRTL_REG2 */ switch(ctrlm & 0x60) 8001a66: 7dfb ldrb r3, [r7, #23] 8001a68: f003 0360 and.w r3, r3, #96 @ 0x60 8001a6c: 2b60 cmp r3, #96 @ 0x60 8001a6e: d013 beq.n 8001a98 8001a70: 2b60 cmp r3, #96 @ 0x60 8001a72: dc14 bgt.n 8001a9e 8001a74: 2b40 cmp r3, #64 @ 0x40 8001a76: d00c beq.n 8001a92 8001a78: 2b40 cmp r3, #64 @ 0x40 8001a7a: dc10 bgt.n 8001a9e 8001a7c: 2b00 cmp r3, #0 8001a7e: d002 beq.n 8001a86 8001a80: 2b20 cmp r3, #32 8001a82: d003 beq.n 8001a8c 8001a84: e00b b.n 8001a9e { case LIS3MDL_MAG_FS_4_GA: sensitivity = LIS3MDL_MAG_SENSITIVITY_FOR_FS_4GA; 8001a86: 4b19 ldr r3, [pc, #100] @ (8001aec ) 8001a88: 61bb str r3, [r7, #24] break; 8001a8a: e008 b.n 8001a9e case LIS3MDL_MAG_FS_8_GA: sensitivity = LIS3MDL_MAG_SENSITIVITY_FOR_FS_8GA; 8001a8c: 4b18 ldr r3, [pc, #96] @ (8001af0 ) 8001a8e: 61bb str r3, [r7, #24] break; 8001a90: e005 b.n 8001a9e case LIS3MDL_MAG_FS_12_GA: sensitivity = LIS3MDL_MAG_SENSITIVITY_FOR_FS_12GA; 8001a92: 4b18 ldr r3, [pc, #96] @ (8001af4 ) 8001a94: 61bb str r3, [r7, #24] break; 8001a96: e002 b.n 8001a9e case LIS3MDL_MAG_FS_16_GA: sensitivity = LIS3MDL_MAG_SENSITIVITY_FOR_FS_16GA; 8001a98: 4b17 ldr r3, [pc, #92] @ (8001af8 ) 8001a9a: 61bb str r3, [r7, #24] break; 8001a9c: bf00 nop } /* Obtain the mGauss value for the three axis */ for(i=0; i<3; i++) 8001a9e: 2300 movs r3, #0 8001aa0: 77fb strb r3, [r7, #31] 8001aa2: e01a b.n 8001ada { pData[i]=( int16_t )(pnRawData[i] * sensitivity); 8001aa4: 7ffb ldrb r3, [r7, #31] 8001aa6: 005b lsls r3, r3, #1 8001aa8: 3320 adds r3, #32 8001aaa: 443b add r3, r7 8001aac: f933 3c10 ldrsh.w r3, [r3, #-16] 8001ab0: ee07 3a90 vmov s15, r3 8001ab4: eeb8 7ae7 vcvt.f32.s32 s14, s15 8001ab8: edd7 7a06 vldr s15, [r7, #24] 8001abc: ee67 7a27 vmul.f32 s15, s14, s15 8001ac0: 7ffb ldrb r3, [r7, #31] 8001ac2: 005b lsls r3, r3, #1 8001ac4: 687a ldr r2, [r7, #4] 8001ac6: 4413 add r3, r2 8001ac8: eefd 7ae7 vcvt.s32.f32 s15, s15 8001acc: ee17 2a90 vmov r2, s15 8001ad0: b212 sxth r2, r2 8001ad2: 801a strh r2, [r3, #0] for(i=0; i<3; i++) 8001ad4: 7ffb ldrb r3, [r7, #31] 8001ad6: 3301 adds r3, #1 8001ad8: 77fb strb r3, [r7, #31] 8001ada: 7ffb ldrb r3, [r7, #31] 8001adc: 2b02 cmp r3, #2 8001ade: d9e1 bls.n 8001aa4 } } 8001ae0: bf00 nop 8001ae2: bf00 nop 8001ae4: 3720 adds r7, #32 8001ae6: 46bd mov sp, r7 8001ae8: bd80 pop {r7, pc} 8001aea: bf00 nop 8001aec: 3e0f5c29 .word 0x3e0f5c29 8001af0: 3e947ae1 .word 0x3e947ae1 8001af4: 3edc28f6 .word 0x3edc28f6 8001af8: 3f147ae1 .word 0x3f147ae1 08001afc : */ /** * @brief Set LPS22HB pressure sensor Initialization. */ void LPS22HB_P_Init(uint16_t DeviceAddr) { 8001afc: b580 push {r7, lr} 8001afe: b082 sub sp, #8 8001b00: af00 add r7, sp, #0 8001b02: 4603 mov r3, r0 8001b04: 80fb strh r3, [r7, #6] LPS22HB_Init(DeviceAddr); 8001b06: 88fb ldrh r3, [r7, #6] 8001b08: 4618 mov r0, r3 8001b0a: f000 f879 bl 8001c00 } 8001b0e: bf00 nop 8001b10: 3708 adds r7, #8 8001b12: 46bd mov sp, r7 8001b14: bd80 pop {r7, pc} 08001b16 : /** * @brief Read LPS22HB ID. * @retval ID */ uint8_t LPS22HB_P_ReadID(uint16_t DeviceAddr) { 8001b16: b580 push {r7, lr} 8001b18: b084 sub sp, #16 8001b1a: af00 add r7, sp, #0 8001b1c: 4603 mov r3, r0 8001b1e: 80fb strh r3, [r7, #6] uint8_t ctrl = 0x00; 8001b20: 2300 movs r3, #0 8001b22: 73fb strb r3, [r7, #15] /* IO interface initialization */ SENSOR_IO_Init(); 8001b24: f7ff fb7c bl 8001220 /* Read value at Who am I register address */ ctrl = SENSOR_IO_Read(DeviceAddr, LPS22HB_WHO_AM_I_REG); 8001b28: 88fb ldrh r3, [r7, #6] 8001b2a: b2db uxtb r3, r3 8001b2c: 210f movs r1, #15 8001b2e: 4618 mov r0, r3 8001b30: f7ff fb9a bl 8001268 8001b34: 4603 mov r3, r0 8001b36: 73fb strb r3, [r7, #15] return ctrl; 8001b38: 7bfb ldrb r3, [r7, #15] } 8001b3a: 4618 mov r0, r3 8001b3c: 3710 adds r7, #16 8001b3e: 46bd mov sp, r7 8001b40: bd80 pop {r7, pc} ... 08001b44 : /** * @brief Read pressure value of LPS22HB * @retval pressure value */ float LPS22HB_P_ReadPressure(uint16_t DeviceAddr) { 8001b44: b590 push {r4, r7, lr} 8001b46: b087 sub sp, #28 8001b48: af00 add r7, sp, #0 8001b4a: 4603 mov r3, r0 8001b4c: 80fb strh r3, [r7, #6] int32_t raw_press; uint8_t buffer[3]; uint32_t tmp = 0; 8001b4e: 2300 movs r3, #0 8001b50: 617b str r3, [r7, #20] uint8_t i; for(i = 0; i < 3; i++) 8001b52: 2300 movs r3, #0 8001b54: 74fb strb r3, [r7, #19] 8001b56: e013 b.n 8001b80 { buffer[i] = SENSOR_IO_Read(DeviceAddr, (LPS22HB_PRESS_OUT_XL_REG + i)); 8001b58: 88fb ldrh r3, [r7, #6] 8001b5a: b2da uxtb r2, r3 8001b5c: 7cfb ldrb r3, [r7, #19] 8001b5e: 3328 adds r3, #40 @ 0x28 8001b60: b2db uxtb r3, r3 8001b62: 7cfc ldrb r4, [r7, #19] 8001b64: 4619 mov r1, r3 8001b66: 4610 mov r0, r2 8001b68: f7ff fb7e bl 8001268 8001b6c: 4603 mov r3, r0 8001b6e: 461a mov r2, r3 8001b70: f104 0318 add.w r3, r4, #24 8001b74: 443b add r3, r7 8001b76: f803 2c10 strb.w r2, [r3, #-16] for(i = 0; i < 3; i++) 8001b7a: 7cfb ldrb r3, [r7, #19] 8001b7c: 3301 adds r3, #1 8001b7e: 74fb strb r3, [r7, #19] 8001b80: 7cfb ldrb r3, [r7, #19] 8001b82: 2b02 cmp r3, #2 8001b84: d9e8 bls.n 8001b58 } /* Build the raw data */ for(i = 0; i < 3; i++) 8001b86: 2300 movs r3, #0 8001b88: 74fb strb r3, [r7, #19] 8001b8a: e00f b.n 8001bac tmp |= (((uint32_t)buffer[i]) << (8 * i)); 8001b8c: 7cfb ldrb r3, [r7, #19] 8001b8e: 3318 adds r3, #24 8001b90: 443b add r3, r7 8001b92: f813 3c10 ldrb.w r3, [r3, #-16] 8001b96: 461a mov r2, r3 8001b98: 7cfb ldrb r3, [r7, #19] 8001b9a: 00db lsls r3, r3, #3 8001b9c: fa02 f303 lsl.w r3, r2, r3 8001ba0: 697a ldr r2, [r7, #20] 8001ba2: 4313 orrs r3, r2 8001ba4: 617b str r3, [r7, #20] for(i = 0; i < 3; i++) 8001ba6: 7cfb ldrb r3, [r7, #19] 8001ba8: 3301 adds r3, #1 8001baa: 74fb strb r3, [r7, #19] 8001bac: 7cfb ldrb r3, [r7, #19] 8001bae: 2b02 cmp r3, #2 8001bb0: d9ec bls.n 8001b8c /* convert the 2's complement 24 bit to 2's complement 32 bit */ if(tmp & 0x00800000) 8001bb2: 697b ldr r3, [r7, #20] 8001bb4: f403 0300 and.w r3, r3, #8388608 @ 0x800000 8001bb8: 2b00 cmp r3, #0 8001bba: d003 beq.n 8001bc4 tmp |= 0xFF000000; 8001bbc: 697b ldr r3, [r7, #20] 8001bbe: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000 8001bc2: 617b str r3, [r7, #20] raw_press = ((int32_t)tmp); 8001bc4: 697b ldr r3, [r7, #20] 8001bc6: 60fb str r3, [r7, #12] raw_press = (raw_press * 100) / 4096; 8001bc8: 68fb ldr r3, [r7, #12] 8001bca: 2264 movs r2, #100 @ 0x64 8001bcc: fb02 f303 mul.w r3, r2, r3 8001bd0: 2b00 cmp r3, #0 8001bd2: da01 bge.n 8001bd8 8001bd4: f603 73ff addw r3, r3, #4095 @ 0xfff 8001bd8: 131b asrs r3, r3, #12 8001bda: 60fb str r3, [r7, #12] return (float)((float)raw_press / 100.0f); 8001bdc: 68fb ldr r3, [r7, #12] 8001bde: ee07 3a90 vmov s15, r3 8001be2: eef8 7ae7 vcvt.f32.s32 s15, s15 8001be6: ed9f 7a05 vldr s14, [pc, #20] @ 8001bfc 8001bea: eec7 6a87 vdiv.f32 s13, s15, s14 8001bee: eef0 7a66 vmov.f32 s15, s13 } 8001bf2: eeb0 0a67 vmov.f32 s0, s15 8001bf6: 371c adds r7, #28 8001bf8: 46bd mov sp, r7 8001bfa: bd90 pop {r4, r7, pc} 8001bfc: 42c80000 .word 0x42c80000 08001c00 : * @brief Set LPS22HB Initialization. * @param DeviceAddr: I2C device address * @retval None */ static void LPS22HB_Init(uint16_t DeviceAddr) { 8001c00: b580 push {r7, lr} 8001c02: b084 sub sp, #16 8001c04: af00 add r7, sp, #0 8001c06: 4603 mov r3, r0 8001c08: 80fb strh r3, [r7, #6] uint8_t tmp; /* Set Power mode */ tmp = SENSOR_IO_Read(DeviceAddr, LPS22HB_RES_CONF_REG); 8001c0a: 88fb ldrh r3, [r7, #6] 8001c0c: b2db uxtb r3, r3 8001c0e: 211a movs r1, #26 8001c10: 4618 mov r0, r3 8001c12: f7ff fb29 bl 8001268 8001c16: 4603 mov r3, r0 8001c18: 73fb strb r3, [r7, #15] tmp &= ~LPS22HB_LCEN_MASK; 8001c1a: 7bfb ldrb r3, [r7, #15] 8001c1c: f023 0301 bic.w r3, r3, #1 8001c20: 73fb strb r3, [r7, #15] tmp |= (uint8_t)0x01; /* Set low current mode */ 8001c22: 7bfb ldrb r3, [r7, #15] 8001c24: f043 0301 orr.w r3, r3, #1 8001c28: 73fb strb r3, [r7, #15] SENSOR_IO_Write(DeviceAddr, LPS22HB_RES_CONF_REG, tmp); 8001c2a: 88fb ldrh r3, [r7, #6] 8001c2c: b2db uxtb r3, r3 8001c2e: 7bfa ldrb r2, [r7, #15] 8001c30: 211a movs r1, #26 8001c32: 4618 mov r0, r3 8001c34: f7ff fafe bl 8001234 /* Read CTRL_REG1 */ tmp = SENSOR_IO_Read(DeviceAddr, LPS22HB_CTRL_REG1); 8001c38: 88fb ldrh r3, [r7, #6] 8001c3a: b2db uxtb r3, r3 8001c3c: 2110 movs r1, #16 8001c3e: 4618 mov r0, r3 8001c40: f7ff fb12 bl 8001268 8001c44: 4603 mov r3, r0 8001c46: 73fb strb r3, [r7, #15] /* Set default ODR */ tmp &= ~LPS22HB_ODR_MASK; 8001c48: 7bfb ldrb r3, [r7, #15] 8001c4a: f023 0370 bic.w r3, r3, #112 @ 0x70 8001c4e: 73fb strb r3, [r7, #15] tmp |= (uint8_t)0x30; /* Set ODR to 25Hz */ 8001c50: 7bfb ldrb r3, [r7, #15] 8001c52: f043 0330 orr.w r3, r3, #48 @ 0x30 8001c56: 73fb strb r3, [r7, #15] /* Enable BDU */ tmp &= ~LPS22HB_BDU_MASK; 8001c58: 7bfb ldrb r3, [r7, #15] 8001c5a: f023 0302 bic.w r3, r3, #2 8001c5e: 73fb strb r3, [r7, #15] tmp |= ((uint8_t)0x02); 8001c60: 7bfb ldrb r3, [r7, #15] 8001c62: f043 0302 orr.w r3, r3, #2 8001c66: 73fb strb r3, [r7, #15] /* Apply settings to CTRL_REG1 */ SENSOR_IO_Write(DeviceAddr, LPS22HB_CTRL_REG1, tmp); 8001c68: 88fb ldrh r3, [r7, #6] 8001c6a: b2db uxtb r3, r3 8001c6c: 7bfa ldrb r2, [r7, #15] 8001c6e: 2110 movs r1, #16 8001c70: 4618 mov r0, r3 8001c72: f7ff fadf bl 8001234 } 8001c76: bf00 nop 8001c78: 3710 adds r7, #16 8001c7a: 46bd mov sp, r7 8001c7c: bd80 pop {r7, pc} 08001c7e : /** * @brief Set LSM6DSL Accelerometer Initialization. * @param InitStruct: Init parameters */ void LSM6DSL_AccInit(uint16_t InitStruct) { 8001c7e: b580 push {r7, lr} 8001c80: b084 sub sp, #16 8001c82: af00 add r7, sp, #0 8001c84: 4603 mov r3, r0 8001c86: 80fb strh r3, [r7, #6] uint8_t ctrl = 0x00; 8001c88: 2300 movs r3, #0 8001c8a: 73fb strb r3, [r7, #15] uint8_t tmp; /* Read CTRL1_XL */ tmp = SENSOR_IO_Read(LSM6DSL_ACC_GYRO_I2C_ADDRESS_LOW, LSM6DSL_ACC_GYRO_CTRL1_XL); 8001c8c: 2110 movs r1, #16 8001c8e: 20d4 movs r0, #212 @ 0xd4 8001c90: f7ff faea bl 8001268 8001c94: 4603 mov r3, r0 8001c96: 73bb strb r3, [r7, #14] /* Write value to ACC MEMS CTRL1_XL register: FS and Data Rate */ ctrl = (uint8_t) InitStruct; 8001c98: 88fb ldrh r3, [r7, #6] 8001c9a: 73fb strb r3, [r7, #15] tmp &= ~(0xFC); 8001c9c: 7bbb ldrb r3, [r7, #14] 8001c9e: f003 0303 and.w r3, r3, #3 8001ca2: 73bb strb r3, [r7, #14] tmp |= ctrl; 8001ca4: 7bba ldrb r2, [r7, #14] 8001ca6: 7bfb ldrb r3, [r7, #15] 8001ca8: 4313 orrs r3, r2 8001caa: 73bb strb r3, [r7, #14] SENSOR_IO_Write(LSM6DSL_ACC_GYRO_I2C_ADDRESS_LOW, LSM6DSL_ACC_GYRO_CTRL1_XL, tmp); 8001cac: 7bbb ldrb r3, [r7, #14] 8001cae: 461a mov r2, r3 8001cb0: 2110 movs r1, #16 8001cb2: 20d4 movs r0, #212 @ 0xd4 8001cb4: f7ff fabe bl 8001234 /* Read CTRL3_C */ tmp = SENSOR_IO_Read(LSM6DSL_ACC_GYRO_I2C_ADDRESS_LOW, LSM6DSL_ACC_GYRO_CTRL3_C); 8001cb8: 2112 movs r1, #18 8001cba: 20d4 movs r0, #212 @ 0xd4 8001cbc: f7ff fad4 bl 8001268 8001cc0: 4603 mov r3, r0 8001cc2: 73bb strb r3, [r7, #14] /* Write value to ACC MEMS CTRL3_C register: BDU and Auto-increment */ ctrl = ((uint8_t) (InitStruct >> 8)); 8001cc4: 88fb ldrh r3, [r7, #6] 8001cc6: 0a1b lsrs r3, r3, #8 8001cc8: b29b uxth r3, r3 8001cca: 73fb strb r3, [r7, #15] tmp &= ~(0x44); 8001ccc: 7bbb ldrb r3, [r7, #14] 8001cce: f023 0344 bic.w r3, r3, #68 @ 0x44 8001cd2: 73bb strb r3, [r7, #14] tmp |= ctrl; 8001cd4: 7bba ldrb r2, [r7, #14] 8001cd6: 7bfb ldrb r3, [r7, #15] 8001cd8: 4313 orrs r3, r2 8001cda: 73bb strb r3, [r7, #14] SENSOR_IO_Write(LSM6DSL_ACC_GYRO_I2C_ADDRESS_LOW, LSM6DSL_ACC_GYRO_CTRL3_C, tmp); 8001cdc: 7bbb ldrb r3, [r7, #14] 8001cde: 461a mov r2, r3 8001ce0: 2112 movs r1, #18 8001ce2: 20d4 movs r0, #212 @ 0xd4 8001ce4: f7ff faa6 bl 8001234 } 8001ce8: bf00 nop 8001cea: 3710 adds r7, #16 8001cec: 46bd mov sp, r7 8001cee: bd80 pop {r7, pc} 08001cf0 : /** * @brief LSM6DSL Accelerometer De-initialization. */ void LSM6DSL_AccDeInit(void) { 8001cf0: b580 push {r7, lr} 8001cf2: b082 sub sp, #8 8001cf4: af00 add r7, sp, #0 uint8_t ctrl = 0x00; 8001cf6: 2300 movs r3, #0 8001cf8: 71fb strb r3, [r7, #7] /* Read control register 1 value */ ctrl = SENSOR_IO_Read(LSM6DSL_ACC_GYRO_I2C_ADDRESS_LOW, LSM6DSL_ACC_GYRO_CTRL1_XL); 8001cfa: 2110 movs r1, #16 8001cfc: 20d4 movs r0, #212 @ 0xd4 8001cfe: f7ff fab3 bl 8001268 8001d02: 4603 mov r3, r0 8001d04: 71fb strb r3, [r7, #7] /* Clear ODR bits */ ctrl &= ~(LSM6DSL_ODR_BITPOSITION); 8001d06: 79fb ldrb r3, [r7, #7] 8001d08: f003 030f and.w r3, r3, #15 8001d0c: 71fb strb r3, [r7, #7] /* Set Power down */ ctrl |= LSM6DSL_ODR_POWER_DOWN; /* write back control register */ SENSOR_IO_Write(LSM6DSL_ACC_GYRO_I2C_ADDRESS_LOW, LSM6DSL_ACC_GYRO_CTRL1_XL, ctrl); 8001d0e: 79fb ldrb r3, [r7, #7] 8001d10: 461a mov r2, r3 8001d12: 2110 movs r1, #16 8001d14: 20d4 movs r0, #212 @ 0xd4 8001d16: f7ff fa8d bl 8001234 } 8001d1a: bf00 nop 8001d1c: 3708 adds r7, #8 8001d1e: 46bd mov sp, r7 8001d20: bd80 pop {r7, pc} 08001d22 : /** * @brief Read LSM6DSL ID. * @retval ID */ uint8_t LSM6DSL_AccReadID(void) { 8001d22: b580 push {r7, lr} 8001d24: af00 add r7, sp, #0 /* IO interface initialization */ SENSOR_IO_Init(); 8001d26: f7ff fa7b bl 8001220 /* Read value at Who am I register address */ return (SENSOR_IO_Read(LSM6DSL_ACC_GYRO_I2C_ADDRESS_LOW, LSM6DSL_ACC_GYRO_WHO_AM_I_REG)); 8001d2a: 210f movs r1, #15 8001d2c: 20d4 movs r0, #212 @ 0xd4 8001d2e: f7ff fa9b bl 8001268 8001d32: 4603 mov r3, r0 } 8001d34: 4618 mov r0, r3 8001d36: bd80 pop {r7, pc} 08001d38 : /** * @brief Set/Unset Accelerometer in low power mode. * @param status 0 means disable Low Power Mode, otherwise Low Power Mode is enabled */ void LSM6DSL_AccLowPower(uint16_t status) { 8001d38: b580 push {r7, lr} 8001d3a: b084 sub sp, #16 8001d3c: af00 add r7, sp, #0 8001d3e: 4603 mov r3, r0 8001d40: 80fb strh r3, [r7, #6] uint8_t ctrl = 0x00; 8001d42: 2300 movs r3, #0 8001d44: 73fb strb r3, [r7, #15] /* Read CTRL6_C value */ ctrl = SENSOR_IO_Read(LSM6DSL_ACC_GYRO_I2C_ADDRESS_LOW, LSM6DSL_ACC_GYRO_CTRL6_C); 8001d46: 2115 movs r1, #21 8001d48: 20d4 movs r0, #212 @ 0xd4 8001d4a: f7ff fa8d bl 8001268 8001d4e: 4603 mov r3, r0 8001d50: 73fb strb r3, [r7, #15] /* Clear Low Power Mode bit */ ctrl &= ~(0x10); 8001d52: 7bfb ldrb r3, [r7, #15] 8001d54: f023 0310 bic.w r3, r3, #16 8001d58: 73fb strb r3, [r7, #15] /* Set Low Power Mode */ if(status) 8001d5a: 88fb ldrh r3, [r7, #6] 8001d5c: 2b00 cmp r3, #0 8001d5e: d003 beq.n 8001d68 { ctrl |= LSM6DSL_ACC_GYRO_LP_XL_ENABLED; 8001d60: 7bfb ldrb r3, [r7, #15] 8001d62: f043 0310 orr.w r3, r3, #16 8001d66: 73fb strb r3, [r7, #15] { ctrl |= LSM6DSL_ACC_GYRO_LP_XL_DISABLED; } /* write back control register */ SENSOR_IO_Write(LSM6DSL_ACC_GYRO_I2C_ADDRESS_LOW, LSM6DSL_ACC_GYRO_CTRL6_C, ctrl); 8001d68: 7bfb ldrb r3, [r7, #15] 8001d6a: 461a mov r2, r3 8001d6c: 2115 movs r1, #21 8001d6e: 20d4 movs r0, #212 @ 0xd4 8001d70: f7ff fa60 bl 8001234 } 8001d74: bf00 nop 8001d76: 3710 adds r7, #16 8001d78: 46bd mov sp, r7 8001d7a: bd80 pop {r7, pc} 08001d7c : /** * @brief Read X, Y & Z Acceleration values * @param pData: Data out pointer */ void LSM6DSL_AccReadXYZ(int16_t* pData) { 8001d7c: b580 push {r7, lr} 8001d7e: b088 sub sp, #32 8001d80: af00 add r7, sp, #0 8001d82: 6078 str r0, [r7, #4] int16_t pnRawData[3]; uint8_t ctrlx= 0; 8001d84: 2300 movs r3, #0 8001d86: 75fb strb r3, [r7, #23] uint8_t buffer[6]; uint8_t i = 0; 8001d88: 2300 movs r3, #0 8001d8a: 77fb strb r3, [r7, #31] float sensitivity = 0; 8001d8c: f04f 0300 mov.w r3, #0 8001d90: 61bb str r3, [r7, #24] /* Read the acceleration control register content */ ctrlx = SENSOR_IO_Read(LSM6DSL_ACC_GYRO_I2C_ADDRESS_LOW, LSM6DSL_ACC_GYRO_CTRL1_XL); 8001d92: 2110 movs r1, #16 8001d94: 20d4 movs r0, #212 @ 0xd4 8001d96: f7ff fa67 bl 8001268 8001d9a: 4603 mov r3, r0 8001d9c: 75fb strb r3, [r7, #23] /* Read output register X, Y & Z acceleration */ SENSOR_IO_ReadMultiple(LSM6DSL_ACC_GYRO_I2C_ADDRESS_LOW, LSM6DSL_ACC_GYRO_OUTX_L_XL, buffer, 6); 8001d9e: f107 0208 add.w r2, r7, #8 8001da2: 2306 movs r3, #6 8001da4: 2128 movs r1, #40 @ 0x28 8001da6: 20d4 movs r0, #212 @ 0xd4 8001da8: f7ff fa7c bl 80012a4 for(i=0; i<3; i++) 8001dac: 2300 movs r3, #0 8001dae: 77fb strb r3, [r7, #31] 8001db0: e01a b.n 8001de8 { pnRawData[i]=((((uint16_t)buffer[2*i+1]) << 8) + (uint16_t)buffer[2*i]); 8001db2: 7ffb ldrb r3, [r7, #31] 8001db4: 005b lsls r3, r3, #1 8001db6: 3301 adds r3, #1 8001db8: 3320 adds r3, #32 8001dba: 443b add r3, r7 8001dbc: f813 3c18 ldrb.w r3, [r3, #-24] 8001dc0: 021b lsls r3, r3, #8 8001dc2: b29b uxth r3, r3 8001dc4: 7ffa ldrb r2, [r7, #31] 8001dc6: 0052 lsls r2, r2, #1 8001dc8: 3220 adds r2, #32 8001dca: 443a add r2, r7 8001dcc: f812 2c18 ldrb.w r2, [r2, #-24] 8001dd0: 4413 add r3, r2 8001dd2: b29a uxth r2, r3 8001dd4: 7ffb ldrb r3, [r7, #31] 8001dd6: b212 sxth r2, r2 8001dd8: 005b lsls r3, r3, #1 8001dda: 3320 adds r3, #32 8001ddc: 443b add r3, r7 8001dde: f823 2c10 strh.w r2, [r3, #-16] for(i=0; i<3; i++) 8001de2: 7ffb ldrb r3, [r7, #31] 8001de4: 3301 adds r3, #1 8001de6: 77fb strb r3, [r7, #31] 8001de8: 7ffb ldrb r3, [r7, #31] 8001dea: 2b02 cmp r3, #2 8001dec: d9e1 bls.n 8001db2 } /* Normal mode */ /* Switch the sensitivity value set in the CRTL1_XL */ switch(ctrlx & 0x0C) 8001dee: 7dfb ldrb r3, [r7, #23] 8001df0: f003 030c and.w r3, r3, #12 8001df4: 2b0c cmp r3, #12 8001df6: d829 bhi.n 8001e4c 8001df8: a201 add r2, pc, #4 @ (adr r2, 8001e00 ) 8001dfa: f852 f023 ldr.w pc, [r2, r3, lsl #2] 8001dfe: bf00 nop 8001e00: 08001e35 .word 0x08001e35 8001e04: 08001e4d .word 0x08001e4d 8001e08: 08001e4d .word 0x08001e4d 8001e0c: 08001e4d .word 0x08001e4d 8001e10: 08001e47 .word 0x08001e47 8001e14: 08001e4d .word 0x08001e4d 8001e18: 08001e4d .word 0x08001e4d 8001e1c: 08001e4d .word 0x08001e4d 8001e20: 08001e3b .word 0x08001e3b 8001e24: 08001e4d .word 0x08001e4d 8001e28: 08001e4d .word 0x08001e4d 8001e2c: 08001e4d .word 0x08001e4d 8001e30: 08001e41 .word 0x08001e41 { case LSM6DSL_ACC_FULLSCALE_2G: sensitivity = LSM6DSL_ACC_SENSITIVITY_2G; 8001e34: 4b18 ldr r3, [pc, #96] @ (8001e98 ) 8001e36: 61bb str r3, [r7, #24] break; 8001e38: e008 b.n 8001e4c case LSM6DSL_ACC_FULLSCALE_4G: sensitivity = LSM6DSL_ACC_SENSITIVITY_4G; 8001e3a: 4b18 ldr r3, [pc, #96] @ (8001e9c ) 8001e3c: 61bb str r3, [r7, #24] break; 8001e3e: e005 b.n 8001e4c case LSM6DSL_ACC_FULLSCALE_8G: sensitivity = LSM6DSL_ACC_SENSITIVITY_8G; 8001e40: 4b17 ldr r3, [pc, #92] @ (8001ea0 ) 8001e42: 61bb str r3, [r7, #24] break; 8001e44: e002 b.n 8001e4c case LSM6DSL_ACC_FULLSCALE_16G: sensitivity = LSM6DSL_ACC_SENSITIVITY_16G; 8001e46: 4b17 ldr r3, [pc, #92] @ (8001ea4 ) 8001e48: 61bb str r3, [r7, #24] break; 8001e4a: bf00 nop } /* Obtain the mg value for the three axis */ for(i=0; i<3; i++) 8001e4c: 2300 movs r3, #0 8001e4e: 77fb strb r3, [r7, #31] 8001e50: e01a b.n 8001e88 { pData[i]=( int16_t )(pnRawData[i] * sensitivity); 8001e52: 7ffb ldrb r3, [r7, #31] 8001e54: 005b lsls r3, r3, #1 8001e56: 3320 adds r3, #32 8001e58: 443b add r3, r7 8001e5a: f933 3c10 ldrsh.w r3, [r3, #-16] 8001e5e: ee07 3a90 vmov s15, r3 8001e62: eeb8 7ae7 vcvt.f32.s32 s14, s15 8001e66: edd7 7a06 vldr s15, [r7, #24] 8001e6a: ee67 7a27 vmul.f32 s15, s14, s15 8001e6e: 7ffb ldrb r3, [r7, #31] 8001e70: 005b lsls r3, r3, #1 8001e72: 687a ldr r2, [r7, #4] 8001e74: 4413 add r3, r2 8001e76: eefd 7ae7 vcvt.s32.f32 s15, s15 8001e7a: ee17 2a90 vmov r2, s15 8001e7e: b212 sxth r2, r2 8001e80: 801a strh r2, [r3, #0] for(i=0; i<3; i++) 8001e82: 7ffb ldrb r3, [r7, #31] 8001e84: 3301 adds r3, #1 8001e86: 77fb strb r3, [r7, #31] 8001e88: 7ffb ldrb r3, [r7, #31] 8001e8a: 2b02 cmp r3, #2 8001e8c: d9e1 bls.n 8001e52 } } 8001e8e: bf00 nop 8001e90: bf00 nop 8001e92: 3720 adds r7, #32 8001e94: 46bd mov sp, r7 8001e96: bd80 pop {r7, pc} 8001e98: 3d79db23 .word 0x3d79db23 8001e9c: 3df9db23 .word 0x3df9db23 8001ea0: 3e79db23 .word 0x3e79db23 8001ea4: 3ef9db23 .word 0x3ef9db23 08001ea8 : * @brief Set LSM6DSL Gyroscope Initialization. * @param InitStruct: pointer to a LSM6DSL_InitTypeDef structure * that contains the configuration setting for the LSM6DSL. */ void LSM6DSL_GyroInit(uint16_t InitStruct) { 8001ea8: b580 push {r7, lr} 8001eaa: b084 sub sp, #16 8001eac: af00 add r7, sp, #0 8001eae: 4603 mov r3, r0 8001eb0: 80fb strh r3, [r7, #6] uint8_t ctrl = 0x00; 8001eb2: 2300 movs r3, #0 8001eb4: 73fb strb r3, [r7, #15] uint8_t tmp; /* Read CTRL2_G */ tmp = SENSOR_IO_Read(LSM6DSL_ACC_GYRO_I2C_ADDRESS_LOW, LSM6DSL_ACC_GYRO_CTRL2_G); 8001eb6: 2111 movs r1, #17 8001eb8: 20d4 movs r0, #212 @ 0xd4 8001eba: f7ff f9d5 bl 8001268 8001ebe: 4603 mov r3, r0 8001ec0: 73bb strb r3, [r7, #14] /* Write value to GYRO MEMS CTRL2_G register: FS and Data Rate */ ctrl = (uint8_t) InitStruct; 8001ec2: 88fb ldrh r3, [r7, #6] 8001ec4: 73fb strb r3, [r7, #15] tmp &= ~(0xFC); 8001ec6: 7bbb ldrb r3, [r7, #14] 8001ec8: f003 0303 and.w r3, r3, #3 8001ecc: 73bb strb r3, [r7, #14] tmp |= ctrl; 8001ece: 7bba ldrb r2, [r7, #14] 8001ed0: 7bfb ldrb r3, [r7, #15] 8001ed2: 4313 orrs r3, r2 8001ed4: 73bb strb r3, [r7, #14] SENSOR_IO_Write(LSM6DSL_ACC_GYRO_I2C_ADDRESS_LOW, LSM6DSL_ACC_GYRO_CTRL2_G, tmp); 8001ed6: 7bbb ldrb r3, [r7, #14] 8001ed8: 461a mov r2, r3 8001eda: 2111 movs r1, #17 8001edc: 20d4 movs r0, #212 @ 0xd4 8001ede: f7ff f9a9 bl 8001234 /* Read CTRL3_C */ tmp = SENSOR_IO_Read(LSM6DSL_ACC_GYRO_I2C_ADDRESS_LOW, LSM6DSL_ACC_GYRO_CTRL3_C); 8001ee2: 2112 movs r1, #18 8001ee4: 20d4 movs r0, #212 @ 0xd4 8001ee6: f7ff f9bf bl 8001268 8001eea: 4603 mov r3, r0 8001eec: 73bb strb r3, [r7, #14] /* Write value to GYRO MEMS CTRL3_C register: BDU and Auto-increment */ ctrl = ((uint8_t) (InitStruct >> 8)); 8001eee: 88fb ldrh r3, [r7, #6] 8001ef0: 0a1b lsrs r3, r3, #8 8001ef2: b29b uxth r3, r3 8001ef4: 73fb strb r3, [r7, #15] tmp &= ~(0x44); 8001ef6: 7bbb ldrb r3, [r7, #14] 8001ef8: f023 0344 bic.w r3, r3, #68 @ 0x44 8001efc: 73bb strb r3, [r7, #14] tmp |= ctrl; 8001efe: 7bba ldrb r2, [r7, #14] 8001f00: 7bfb ldrb r3, [r7, #15] 8001f02: 4313 orrs r3, r2 8001f04: 73bb strb r3, [r7, #14] SENSOR_IO_Write(LSM6DSL_ACC_GYRO_I2C_ADDRESS_LOW, LSM6DSL_ACC_GYRO_CTRL3_C, tmp); 8001f06: 7bbb ldrb r3, [r7, #14] 8001f08: 461a mov r2, r3 8001f0a: 2112 movs r1, #18 8001f0c: 20d4 movs r0, #212 @ 0xd4 8001f0e: f7ff f991 bl 8001234 } 8001f12: bf00 nop 8001f14: 3710 adds r7, #16 8001f16: 46bd mov sp, r7 8001f18: bd80 pop {r7, pc} 08001f1a : /** * @brief LSM6DSL Gyroscope De-initialization */ void LSM6DSL_GyroDeInit(void) { 8001f1a: b580 push {r7, lr} 8001f1c: b082 sub sp, #8 8001f1e: af00 add r7, sp, #0 uint8_t ctrl = 0x00; 8001f20: 2300 movs r3, #0 8001f22: 71fb strb r3, [r7, #7] /* Read control register 1 value */ ctrl = SENSOR_IO_Read(LSM6DSL_ACC_GYRO_I2C_ADDRESS_LOW, LSM6DSL_ACC_GYRO_CTRL2_G); 8001f24: 2111 movs r1, #17 8001f26: 20d4 movs r0, #212 @ 0xd4 8001f28: f7ff f99e bl 8001268 8001f2c: 4603 mov r3, r0 8001f2e: 71fb strb r3, [r7, #7] /* Clear ODR bits */ ctrl &= ~(LSM6DSL_ODR_BITPOSITION); 8001f30: 79fb ldrb r3, [r7, #7] 8001f32: f003 030f and.w r3, r3, #15 8001f36: 71fb strb r3, [r7, #7] /* Set Power down */ ctrl |= LSM6DSL_ODR_POWER_DOWN; /* write back control register */ SENSOR_IO_Write(LSM6DSL_ACC_GYRO_I2C_ADDRESS_LOW, LSM6DSL_ACC_GYRO_CTRL2_G, ctrl); 8001f38: 79fb ldrb r3, [r7, #7] 8001f3a: 461a mov r2, r3 8001f3c: 2111 movs r1, #17 8001f3e: 20d4 movs r0, #212 @ 0xd4 8001f40: f7ff f978 bl 8001234 } 8001f44: bf00 nop 8001f46: 3708 adds r7, #8 8001f48: 46bd mov sp, r7 8001f4a: bd80 pop {r7, pc} 08001f4c : /** * @brief Read ID address of LSM6DSL * @retval ID */ uint8_t LSM6DSL_GyroReadID(void) { 8001f4c: b580 push {r7, lr} 8001f4e: af00 add r7, sp, #0 /* IO interface initialization */ SENSOR_IO_Init(); 8001f50: f7ff f966 bl 8001220 /* Read value at Who am I register address */ return SENSOR_IO_Read(LSM6DSL_ACC_GYRO_I2C_ADDRESS_LOW, LSM6DSL_ACC_GYRO_WHO_AM_I_REG); 8001f54: 210f movs r1, #15 8001f56: 20d4 movs r0, #212 @ 0xd4 8001f58: f7ff f986 bl 8001268 8001f5c: 4603 mov r3, r0 } 8001f5e: 4618 mov r0, r3 8001f60: bd80 pop {r7, pc} 08001f62 : /** * @brief Set/Unset LSM6DSL Gyroscope in low power mode * @param status 0 means disable Low Power Mode, otherwise Low Power Mode is enabled */ void LSM6DSL_GyroLowPower(uint16_t status) { 8001f62: b580 push {r7, lr} 8001f64: b084 sub sp, #16 8001f66: af00 add r7, sp, #0 8001f68: 4603 mov r3, r0 8001f6a: 80fb strh r3, [r7, #6] uint8_t ctrl = 0x00; 8001f6c: 2300 movs r3, #0 8001f6e: 73fb strb r3, [r7, #15] /* Read CTRL7_G value */ ctrl = SENSOR_IO_Read(LSM6DSL_ACC_GYRO_I2C_ADDRESS_LOW, LSM6DSL_ACC_GYRO_CTRL7_G); 8001f70: 2116 movs r1, #22 8001f72: 20d4 movs r0, #212 @ 0xd4 8001f74: f7ff f978 bl 8001268 8001f78: 4603 mov r3, r0 8001f7a: 73fb strb r3, [r7, #15] /* Clear Low Power Mode bit */ ctrl &= ~(0x80); 8001f7c: 7bfb ldrb r3, [r7, #15] 8001f7e: f003 037f and.w r3, r3, #127 @ 0x7f 8001f82: 73fb strb r3, [r7, #15] /* Set Low Power Mode */ if(status) 8001f84: 88fb ldrh r3, [r7, #6] 8001f86: 2b00 cmp r3, #0 8001f88: d003 beq.n 8001f92 { ctrl |= LSM6DSL_ACC_GYRO_LP_G_ENABLED; 8001f8a: 7bfb ldrb r3, [r7, #15] 8001f8c: f063 037f orn r3, r3, #127 @ 0x7f 8001f90: 73fb strb r3, [r7, #15] { ctrl |= LSM6DSL_ACC_GYRO_LP_G_DISABLED; } /* write back control register */ SENSOR_IO_Write(LSM6DSL_ACC_GYRO_I2C_ADDRESS_LOW, LSM6DSL_ACC_GYRO_CTRL7_G, ctrl); 8001f92: 7bfb ldrb r3, [r7, #15] 8001f94: 461a mov r2, r3 8001f96: 2116 movs r1, #22 8001f98: 20d4 movs r0, #212 @ 0xd4 8001f9a: f7ff f94b bl 8001234 } 8001f9e: bf00 nop 8001fa0: 3710 adds r7, #16 8001fa2: 46bd mov sp, r7 8001fa4: bd80 pop {r7, pc} ... 08001fa8 : /** * @brief Calculate the LSM6DSL angular data. * @param pfData: Data out pointer */ void LSM6DSL_GyroReadXYZAngRate(float *pfData) { 8001fa8: b580 push {r7, lr} 8001faa: b088 sub sp, #32 8001fac: af00 add r7, sp, #0 8001fae: 6078 str r0, [r7, #4] int16_t pnRawData[3]; uint8_t ctrlg= 0; 8001fb0: 2300 movs r3, #0 8001fb2: 75fb strb r3, [r7, #23] uint8_t buffer[6]; uint8_t i = 0; 8001fb4: 2300 movs r3, #0 8001fb6: 77fb strb r3, [r7, #31] float sensitivity = 0; 8001fb8: f04f 0300 mov.w r3, #0 8001fbc: 61bb str r3, [r7, #24] /* Read the gyro control register content */ ctrlg = SENSOR_IO_Read(LSM6DSL_ACC_GYRO_I2C_ADDRESS_LOW, LSM6DSL_ACC_GYRO_CTRL2_G); 8001fbe: 2111 movs r1, #17 8001fc0: 20d4 movs r0, #212 @ 0xd4 8001fc2: f7ff f951 bl 8001268 8001fc6: 4603 mov r3, r0 8001fc8: 75fb strb r3, [r7, #23] /* Read output register X, Y & Z acceleration */ SENSOR_IO_ReadMultiple(LSM6DSL_ACC_GYRO_I2C_ADDRESS_LOW, LSM6DSL_ACC_GYRO_OUTX_L_G, buffer, 6); 8001fca: f107 0208 add.w r2, r7, #8 8001fce: 2306 movs r3, #6 8001fd0: 2122 movs r1, #34 @ 0x22 8001fd2: 20d4 movs r0, #212 @ 0xd4 8001fd4: f7ff f966 bl 80012a4 for(i=0; i<3; i++) 8001fd8: 2300 movs r3, #0 8001fda: 77fb strb r3, [r7, #31] 8001fdc: e01a b.n 8002014 { pnRawData[i]=((((uint16_t)buffer[2*i+1]) << 8) + (uint16_t)buffer[2*i]); 8001fde: 7ffb ldrb r3, [r7, #31] 8001fe0: 005b lsls r3, r3, #1 8001fe2: 3301 adds r3, #1 8001fe4: 3320 adds r3, #32 8001fe6: 443b add r3, r7 8001fe8: f813 3c18 ldrb.w r3, [r3, #-24] 8001fec: 021b lsls r3, r3, #8 8001fee: b29b uxth r3, r3 8001ff0: 7ffa ldrb r2, [r7, #31] 8001ff2: 0052 lsls r2, r2, #1 8001ff4: 3220 adds r2, #32 8001ff6: 443a add r2, r7 8001ff8: f812 2c18 ldrb.w r2, [r2, #-24] 8001ffc: 4413 add r3, r2 8001ffe: b29a uxth r2, r3 8002000: 7ffb ldrb r3, [r7, #31] 8002002: b212 sxth r2, r2 8002004: 005b lsls r3, r3, #1 8002006: 3320 adds r3, #32 8002008: 443b add r3, r7 800200a: f823 2c10 strh.w r2, [r3, #-16] for(i=0; i<3; i++) 800200e: 7ffb ldrb r3, [r7, #31] 8002010: 3301 adds r3, #1 8002012: 77fb strb r3, [r7, #31] 8002014: 7ffb ldrb r3, [r7, #31] 8002016: 2b02 cmp r3, #2 8002018: d9e1 bls.n 8001fde } /* Normal mode */ /* Switch the sensitivity value set in the CRTL2_G */ switch(ctrlg & 0x0C) 800201a: 7dfb ldrb r3, [r7, #23] 800201c: f003 030c and.w r3, r3, #12 8002020: 2b0c cmp r3, #12 8002022: d829 bhi.n 8002078 8002024: a201 add r2, pc, #4 @ (adr r2, 800202c ) 8002026: f852 f023 ldr.w pc, [r2, r3, lsl #2] 800202a: bf00 nop 800202c: 08002061 .word 0x08002061 8002030: 08002079 .word 0x08002079 8002034: 08002079 .word 0x08002079 8002038: 08002079 .word 0x08002079 800203c: 08002067 .word 0x08002067 8002040: 08002079 .word 0x08002079 8002044: 08002079 .word 0x08002079 8002048: 08002079 .word 0x08002079 800204c: 0800206d .word 0x0800206d 8002050: 08002079 .word 0x08002079 8002054: 08002079 .word 0x08002079 8002058: 08002079 .word 0x08002079 800205c: 08002073 .word 0x08002073 { case LSM6DSL_GYRO_FS_245: sensitivity = LSM6DSL_GYRO_SENSITIVITY_245DPS; 8002060: 4b16 ldr r3, [pc, #88] @ (80020bc ) 8002062: 61bb str r3, [r7, #24] break; 8002064: e008 b.n 8002078 case LSM6DSL_GYRO_FS_500: sensitivity = LSM6DSL_GYRO_SENSITIVITY_500DPS; 8002066: 4b16 ldr r3, [pc, #88] @ (80020c0 ) 8002068: 61bb str r3, [r7, #24] break; 800206a: e005 b.n 8002078 case LSM6DSL_GYRO_FS_1000: sensitivity = LSM6DSL_GYRO_SENSITIVITY_1000DPS; 800206c: 4b15 ldr r3, [pc, #84] @ (80020c4 ) 800206e: 61bb str r3, [r7, #24] break; 8002070: e002 b.n 8002078 case LSM6DSL_GYRO_FS_2000: sensitivity = LSM6DSL_GYRO_SENSITIVITY_2000DPS; 8002072: 4b15 ldr r3, [pc, #84] @ (80020c8 ) 8002074: 61bb str r3, [r7, #24] break; 8002076: bf00 nop } /* Obtain the mg value for the three axis */ for(i=0; i<3; i++) 8002078: 2300 movs r3, #0 800207a: 77fb strb r3, [r7, #31] 800207c: e016 b.n 80020ac { pfData[i]=( float )(pnRawData[i] * sensitivity); 800207e: 7ffb ldrb r3, [r7, #31] 8002080: 005b lsls r3, r3, #1 8002082: 3320 adds r3, #32 8002084: 443b add r3, r7 8002086: f933 3c10 ldrsh.w r3, [r3, #-16] 800208a: ee07 3a90 vmov s15, r3 800208e: eeb8 7ae7 vcvt.f32.s32 s14, s15 8002092: 7ffb ldrb r3, [r7, #31] 8002094: 009b lsls r3, r3, #2 8002096: 687a ldr r2, [r7, #4] 8002098: 4413 add r3, r2 800209a: edd7 7a06 vldr s15, [r7, #24] 800209e: ee67 7a27 vmul.f32 s15, s14, s15 80020a2: edc3 7a00 vstr s15, [r3] for(i=0; i<3; i++) 80020a6: 7ffb ldrb r3, [r7, #31] 80020a8: 3301 adds r3, #1 80020aa: 77fb strb r3, [r7, #31] 80020ac: 7ffb ldrb r3, [r7, #31] 80020ae: 2b02 cmp r3, #2 80020b0: d9e5 bls.n 800207e } } 80020b2: bf00 nop 80020b4: bf00 nop 80020b6: 3720 adds r7, #32 80020b8: 46bd mov sp, r7 80020ba: bd80 pop {r7, pc} 80020bc: 410c0000 .word 0x410c0000 80020c0: 418c0000 .word 0x418c0000 80020c4: 420c0000 .word 0x420c0000 80020c8: 428c0000 .word 0x428c0000 080020cc : TickType_t sensor_period = 100; extern QueueHandle_t xQueueSensors; void InitSensors() { 80020cc: b580 push {r7, lr} 80020ce: af00 add r7, sp, #0 BSP_HSENSOR_Init(); 80020d0: f7ff f9ba bl 8001448 BSP_PSENSOR_Init(); 80020d4: f7ff fa2a bl 800152c BSP_TSENSOR_Init(); 80020d8: f7ff fa56 bl 8001588 BSP_ACCELERO_Init(); 80020dc: f7ff f900 bl 80012e0 BSP_GYRO_Init(); 80020e0: f7ff f956 bl 8001390 BSP_MAGNETO_Init(); 80020e4: f7ff f9de bl 80014a4 } 80020e8: bf00 nop 80020ea: bd80 pop {r7, pc} 080020ec : void ReadSensors(SensorData_t* sensor_data) { 80020ec: b580 push {r7, lr} 80020ee: b082 sub sp, #8 80020f0: af00 add r7, sp, #0 80020f2: 6078 str r0, [r7, #4] sensor_data->humidity = BSP_HSENSOR_ReadHumidity(); 80020f4: f7ff f9c8 bl 8001488 80020f8: eef0 7a40 vmov.f32 s15, s0 80020fc: 687b ldr r3, [r7, #4] 80020fe: edc3 7a00 vstr s15, [r3] sensor_data->pressure = BSP_PSENSOR_ReadPressure(); 8002102: f7ff fa33 bl 800156c 8002106: eef0 7a40 vmov.f32 s15, s0 800210a: 687b ldr r3, [r7, #4] 800210c: edc3 7a02 vstr s15, [r3, #8] sensor_data->temperature = BSP_TSENSOR_ReadTemp(); 8002110: f7ff fa56 bl 80015c0 8002114: eef0 7a40 vmov.f32 s15, s0 8002118: 687b ldr r3, [r7, #4] 800211a: edc3 7a01 vstr s15, [r3, #4] BSP_ACCELERO_AccGetXYZ(sensor_data->accelerometer); 800211e: 687b ldr r3, [r7, #4] 8002120: 330c adds r3, #12 8002122: 4618 mov r0, r3 8002124: f7ff f91c bl 8001360 BSP_GYRO_GetXYZ(sensor_data->gyroscope); 8002128: 687b ldr r3, [r7, #4] 800212a: 3314 adds r3, #20 800212c: 4618 mov r0, r3 800212e: f7ff f973 bl 8001418 BSP_MAGNETO_GetXYZ(sensor_data->magnetometer); 8002132: 687b ldr r3, [r7, #4] 8002134: 3320 adds r3, #32 8002136: 4618 mov r0, r3 8002138: f7ff f9e0 bl 80014fc } 800213c: bf00 nop 800213e: 3708 adds r7, #8 8002140: 46bd mov sp, r7 8002142: bd80 pop {r7, pc} 08002144 : QueueHandle_t xQueue; QueueHandle_t xQueueLED; QueueHandle_t xQueueSensors; void CreateSerialObjects() { 8002144: b580 push {r7, lr} 8002146: af00 add r7, sp, #0 xSemaphore = xSemaphoreCreateBinary(); 8002148: 2203 movs r2, #3 800214a: 2100 movs r1, #0 800214c: 2001 movs r0, #1 800214e: f00a fa4e bl 800c5ee 8002152: 4603 mov r3, r0 8002154: 4a11 ldr r2, [pc, #68] @ (800219c ) 8002156: 6013 str r3, [r2, #0] xSemaphoreGive (xSemaphore); 8002158: 4b10 ldr r3, [pc, #64] @ (800219c ) 800215a: 6818 ldr r0, [r3, #0] 800215c: 2300 movs r3, #0 800215e: 2200 movs r2, #0 8002160: 2100 movs r1, #0 8002162: f00a faa3 bl 800c6ac xQueue = xQueueCreate(5, sizeof (char*)); 8002166: 2200 movs r2, #0 8002168: 2104 movs r1, #4 800216a: 2005 movs r0, #5 800216c: f00a fa3f bl 800c5ee 8002170: 4603 mov r3, r0 8002172: 4a0b ldr r2, [pc, #44] @ (80021a0 ) 8002174: 6013 str r3, [r2, #0] xQueueLED = xQueueCreate(1, sizeof (char*)); 8002176: 2200 movs r2, #0 8002178: 2104 movs r1, #4 800217a: 2001 movs r0, #1 800217c: f00a fa37 bl 800c5ee 8002180: 4603 mov r3, r0 8002182: 4a08 ldr r2, [pc, #32] @ (80021a4 ) 8002184: 6013 str r3, [r2, #0] xQueueSensors = xQueueCreate(1, sizeof (SensorData_t)); 8002186: 2200 movs r2, #0 8002188: 2128 movs r1, #40 @ 0x28 800218a: 2001 movs r0, #1 800218c: f00a fa2f bl 800c5ee 8002190: 4603 mov r3, r0 8002192: 4a05 ldr r2, [pc, #20] @ (80021a8 ) 8002194: 6013 str r3, [r2, #0] } 8002196: bf00 nop 8002198: bd80 pop {r7, pc} 800219a: bf00 nop 800219c: 20000328 .word 0x20000328 80021a0: 2000032c .word 0x2000032c 80021a4: 20000330 .word 0x20000330 80021a8: 20000334 .word 0x20000334 080021ac : void QueueLed(char ch) { 80021ac: b580 push {r7, lr} 80021ae: b082 sub sp, #8 80021b0: af00 add r7, sp, #0 80021b2: 4603 mov r3, r0 80021b4: 71fb strb r3, [r7, #7] xQueueSend(xQueueLED,&ch, portMAX_DELAY); 80021b6: 4b06 ldr r3, [pc, #24] @ (80021d0 ) 80021b8: 6818 ldr r0, [r3, #0] 80021ba: 1df9 adds r1, r7, #7 80021bc: 2300 movs r3, #0 80021be: f04f 32ff mov.w r2, #4294967295 @ 0xffffffff 80021c2: f00a fa73 bl 800c6ac } 80021c6: bf00 nop 80021c8: 3708 adds r7, #8 80021ca: 46bd mov sp, r7 80021cc: bd80 pop {r7, pc} 80021ce: bf00 nop 80021d0: 20000330 .word 0x20000330 080021d4 : SensorData_t GetSensors() { 80021d4: b5b0 push {r4, r5, r7, lr} 80021d6: b08c sub sp, #48 @ 0x30 80021d8: af00 add r7, sp, #0 80021da: 6078 str r0, [r7, #4] SensorData_t aux; xTaskNotifyGive(sensorTaskHandle); 80021dc: 4b0f ldr r3, [pc, #60] @ (800221c ) 80021de: 6818 ldr r0, [r3, #0] 80021e0: 2300 movs r3, #0 80021e2: 2202 movs r2, #2 80021e4: 2100 movs r1, #0 80021e6: f00b ffd3 bl 800e190 xQueueReceive(xQueueSensors, &aux, portMAX_DELAY); 80021ea: 4b0d ldr r3, [pc, #52] @ (8002220 ) 80021ec: 681b ldr r3, [r3, #0] 80021ee: f107 0108 add.w r1, r7, #8 80021f2: f04f 32ff mov.w r2, #4294967295 @ 0xffffffff 80021f6: 4618 mov r0, r3 80021f8: f00a fc88 bl 800cb0c return aux; 80021fc: 687b ldr r3, [r7, #4] 80021fe: 461d mov r5, r3 8002200: f107 0408 add.w r4, r7, #8 8002204: cc0f ldmia r4!, {r0, r1, r2, r3} 8002206: c50f stmia r5!, {r0, r1, r2, r3} 8002208: cc0f ldmia r4!, {r0, r1, r2, r3} 800220a: c50f stmia r5!, {r0, r1, r2, r3} 800220c: e894 0003 ldmia.w r4, {r0, r1} 8002210: e885 0003 stmia.w r5, {r0, r1} } 8002214: 6878 ldr r0, [r7, #4] 8002216: 3730 adds r7, #48 @ 0x30 8002218: 46bd mov sp, r7 800221a: bdb0 pop {r4, r5, r7, pc} 800221c: 20000324 .word 0x20000324 8002220: 20000334 .word 0x20000334 08002224 : void CreateTasks() { 8002224: b580 push {r7, lr} 8002226: b082 sub sp, #8 8002228: af02 add r7, sp, #8 xTaskCreate( 800222a: 4b11 ldr r3, [pc, #68] @ (8002270 ) 800222c: 9301 str r3, [sp, #4] 800222e: 2301 movs r3, #1 8002230: 9300 str r3, [sp, #0] 8002232: 2300 movs r3, #0 8002234: f44f 7280 mov.w r2, #256 @ 0x100 8002238: 490e ldr r1, [pc, #56] @ (8002274 ) 800223a: 480f ldr r0, [pc, #60] @ (8002278 ) 800223c: f00b f83e bl 800d2bc NULL, 1, &sensorTaskHandle ); xTaskCreate( 8002240: 2300 movs r3, #0 8002242: 9301 str r3, [sp, #4] 8002244: 2301 movs r3, #1 8002246: 9300 str r3, [sp, #0] 8002248: 2300 movs r3, #0 800224a: f44f 7200 mov.w r2, #512 @ 0x200 800224e: 490b ldr r1, [pc, #44] @ (800227c ) 8002250: 480b ldr r0, [pc, #44] @ (8002280 ) 8002252: f00b f833 bl 800d2bc NULL, 1, NULL ); xTaskCreate( 8002256: 2300 movs r3, #0 8002258: 9301 str r3, [sp, #4] 800225a: 2301 movs r3, #1 800225c: 9300 str r3, [sp, #0] 800225e: 2300 movs r3, #0 8002260: 2280 movs r2, #128 @ 0x80 8002262: 4908 ldr r1, [pc, #32] @ (8002284 ) 8002264: 4808 ldr r0, [pc, #32] @ (8002288 ) 8002266: f00b f829 bl 800d2bc 128, NULL, 1, NULL ); } 800226a: bf00 nop 800226c: 46bd mov sp, r7 800226e: bd80 pop {r7, pc} 8002270: 20000324 .word 0x20000324 8002274: 080144b0 .word 0x080144b0 8002278: 0800228d .word 0x0800228d 800227c: 080144bc .word 0x080144bc 8002280: 080022c9 .word 0x080022c9 8002284: 080144cc .word 0x080144cc 8002288: 080022dd .word 0x080022dd 0800228c : void TaskSensors(void* pArg) { 800228c: b580 push {r7, lr} 800228e: b08c sub sp, #48 @ 0x30 8002290: af00 add r7, sp, #0 8002292: 6078 str r0, [r7, #4] SensorData_t data; InitSensors(); 8002294: f7ff ff1a bl 80020cc while(1) { ulTaskNotifyTake(pdTRUE, portMAX_DELAY); 8002298: f04f 31ff mov.w r1, #4294967295 @ 0xffffffff 800229c: 2001 movs r0, #1 800229e: f00b ff2f bl 800e100 ReadSensors(&data); 80022a2: f107 0308 add.w r3, r7, #8 80022a6: 4618 mov r0, r3 80022a8: f7ff ff20 bl 80020ec xQueueSend(xQueueSensors, &data, portMAX_DELAY); 80022ac: 4b05 ldr r3, [pc, #20] @ (80022c4 ) 80022ae: 6818 ldr r0, [r3, #0] 80022b0: f107 0108 add.w r1, r7, #8 80022b4: 2300 movs r3, #0 80022b6: f04f 32ff mov.w r2, #4294967295 @ 0xffffffff 80022ba: f00a f9f7 bl 800c6ac ulTaskNotifyTake(pdTRUE, portMAX_DELAY); 80022be: bf00 nop 80022c0: e7ea b.n 8002298 80022c2: bf00 nop 80022c4: 20000334 .word 0x20000334 080022c8 : } } void TaskWebServer(void* pArg) { 80022c8: b580 push {r7, lr} 80022ca: b082 sub sp, #8 80022cc: af00 add r7, sp, #0 80022ce: 6078 str r0, [r7, #4] WifiServer(); 80022d0: f000 f89c bl 800240c } 80022d4: bf00 nop 80022d6: 3708 adds r7, #8 80022d8: 46bd mov sp, r7 80022da: bd80 pop {r7, pc} 080022dc : void TaskLed(void* pArg) { 80022dc: b580 push {r7, lr} 80022de: b084 sub sp, #16 80022e0: af00 add r7, sp, #0 80022e2: 6078 str r0, [r7, #4] char ch; while(1) { xQueueReceive(xQueueLED, &ch, portMAX_DELAY); 80022e4: 4b08 ldr r3, [pc, #32] @ (8002308 ) 80022e6: 681b ldr r3, [r3, #0] 80022e8: f107 010f add.w r1, r7, #15 80022ec: f04f 32ff mov.w r2, #4294967295 @ 0xffffffff 80022f0: 4618 mov r0, r3 80022f2: f00a fc0b bl 800cb0c HAL_GPIO_WritePin(LED2_GPIO_Port, LED2_Pin, ch); 80022f6: 7bfb ldrb r3, [r7, #15] 80022f8: 461a mov r2, r3 80022fa: f44f 4180 mov.w r1, #16384 @ 0x4000 80022fe: 4803 ldr r0, [pc, #12] @ (800230c ) 8002300: f002 f9fe bl 8004700 xQueueReceive(xQueueLED, &ch, portMAX_DELAY); 8002304: bf00 nop 8002306: e7ed b.n 80022e4 8002308: 20000330 .word 0x20000330 800230c: 48000400 .word 0x48000400 08002310 : /* Private defines -----------------------------------------------------------*/ static uint8_t http[1024]; static uint8_t IP_Addr[4]; static int WifiStart(void) { 8002310: b5b0 push {r4, r5, r7, lr} 8002312: b086 sub sp, #24 8002314: af04 add r7, sp, #16 uint8_t MAC_Addr[6]; /*Initialize and use WIFI module */ if (WIFI_Init() == WIFI_STATUS_OK) { 8002316: f009 fda7 bl 800be68 800231a: 4603 mov r3, r0 800231c: 2b00 cmp r3, #0 800231e: d123 bne.n 8002368 LOG(("ES-WIFI Initialized.\n")); 8002320: 4814 ldr r0, [pc, #80] @ (8002374 ) 8002322: f00d ff6f bl 8010204 if (WIFI_GetMAC_Address(MAC_Addr) == WIFI_STATUS_OK) { 8002326: 463b mov r3, r7 8002328: 4618 mov r0, r3 800232a: f009 fdeb bl 800bf04 800232e: 4603 mov r3, r0 8002330: 2b00 cmp r3, #0 8002332: d113 bne.n 800235c LOG( 8002334: 783b ldrb r3, [r7, #0] 8002336: 4618 mov r0, r3 8002338: 787b ldrb r3, [r7, #1] 800233a: 461c mov r4, r3 800233c: 78bb ldrb r3, [r7, #2] 800233e: 461d mov r5, r3 8002340: 78fb ldrb r3, [r7, #3] 8002342: 793a ldrb r2, [r7, #4] 8002344: 7979 ldrb r1, [r7, #5] 8002346: 9102 str r1, [sp, #8] 8002348: 9201 str r2, [sp, #4] 800234a: 9300 str r3, [sp, #0] 800234c: 462b mov r3, r5 800234e: 4622 mov r2, r4 8002350: 4601 mov r1, r0 8002352: 4809 ldr r0, [pc, #36] @ (8002378 ) 8002354: f00d feee bl 8010134 return -1; } } else { return -1; } return 0; 8002358: 2300 movs r3, #0 800235a: e007 b.n 800236c LOG(("> ERROR : CANNOT get MAC address\n")); 800235c: 4807 ldr r0, [pc, #28] @ (800237c ) 800235e: f00d ff51 bl 8010204 return -1; 8002362: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff 8002366: e001 b.n 800236c return -1; 8002368: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff } 800236c: 4618 mov r0, r3 800236e: 3708 adds r7, #8 8002370: 46bd mov sp, r7 8002372: bdb0 pop {r4, r5, r7, pc} 8002374: 080144d4 .word 0x080144d4 8002378: 080144ec .word 0x080144ec 800237c: 08014520 .word 0x08014520 08002380 : int WifiConnect(void) { 8002380: b580 push {r7, lr} 8002382: b082 sub sp, #8 8002384: af02 add r7, sp, #8 WifiStart(); 8002386: f7ff ffc3 bl 8002310 LOG(("\nConnecting to %s , %s\n",SSID,PASSWORD)); 800238a: 4a19 ldr r2, [pc, #100] @ (80023f0 ) 800238c: 4919 ldr r1, [pc, #100] @ (80023f4 ) 800238e: 481a ldr r0, [pc, #104] @ (80023f8 ) 8002390: f00d fed0 bl 8010134 if (WIFI_Connect(SSID, PASSWORD, WIFI_ECN_WPA2_PSK) == WIFI_STATUS_OK) { 8002394: 2203 movs r2, #3 8002396: 4916 ldr r1, [pc, #88] @ (80023f0 ) 8002398: 4816 ldr r0, [pc, #88] @ (80023f4 ) 800239a: f009 fd91 bl 800bec0 800239e: 4603 mov r3, r0 80023a0: 2b00 cmp r3, #0 80023a2: d11d bne.n 80023e0 if (WIFI_GetIP_Address(IP_Addr) == WIFI_STATUS_OK) { 80023a4: 4815 ldr r0, [pc, #84] @ (80023fc ) 80023a6: f009 fdc3 bl 800bf30 80023aa: 4603 mov r3, r0 80023ac: 2b00 cmp r3, #0 80023ae: d111 bne.n 80023d4 LOG( 80023b0: 4b12 ldr r3, [pc, #72] @ (80023fc ) 80023b2: 781b ldrb r3, [r3, #0] 80023b4: 4619 mov r1, r3 80023b6: 4b11 ldr r3, [pc, #68] @ (80023fc ) 80023b8: 785b ldrb r3, [r3, #1] 80023ba: 461a mov r2, r3 80023bc: 4b0f ldr r3, [pc, #60] @ (80023fc ) 80023be: 789b ldrb r3, [r3, #2] 80023c0: 4618 mov r0, r3 80023c2: 4b0e ldr r3, [pc, #56] @ (80023fc ) 80023c4: 78db ldrb r3, [r3, #3] 80023c6: 9300 str r3, [sp, #0] 80023c8: 4603 mov r3, r0 80023ca: 480d ldr r0, [pc, #52] @ (8002400 ) 80023cc: f00d feb2 bl 8010134 } } else { LOG(("ERROR : es-wifi module NOT connected\n")); return -1; } return 0; 80023d0: 2300 movs r3, #0 80023d2: e00a b.n 80023ea LOG((" ERROR : es-wifi module CANNOT get IP address\n")); 80023d4: 480b ldr r0, [pc, #44] @ (8002404 ) 80023d6: f00d ff15 bl 8010204 return -1; 80023da: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff 80023de: e004 b.n 80023ea LOG(("ERROR : es-wifi module NOT connected\n")); 80023e0: 4809 ldr r0, [pc, #36] @ (8002408 ) 80023e2: f00d ff0f bl 8010204 return -1; 80023e6: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff } 80023ea: 4618 mov r0, r3 80023ec: 46bd mov sp, r7 80023ee: bd80 pop {r7, pc} 80023f0: 08014544 .word 0x08014544 80023f4: 08014554 .word 0x08014554 80023f8: 08014560 .word 0x08014560 80023fc: 20000738 .word 0x20000738 8002400: 08014578 .word 0x08014578 8002404: 080145b4 .word 0x080145b4 8002408: 080145e4 .word 0x080145e4 0800240c : int WifiServer(void) { 800240c: b590 push {r4, r7, lr} 800240e: b087 sub sp, #28 8002410: af02 add r7, sp, #8 bool stop_server = false; 8002412: 2300 movs r3, #0 8002414: 73fb strb r3, [r7, #15] LOG(("\nRunning HTTP Server test\n")); 8002416: 483d ldr r0, [pc, #244] @ (800250c ) 8002418: f00d fef4 bl 8010204 if (WifiConnect() != 0) 800241c: f7ff ffb0 bl 8002380 8002420: 4603 mov r3, r0 8002422: 2b00 cmp r3, #0 8002424: d002 beq.n 800242c return -1; 8002426: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff 800242a: e06b b.n 8002504 if (WIFI_STATUS_OK != WIFI_StartServer(SOCKET, WIFI_TCP_PROTOCOL, 1, "", PORT)) { 800242c: 2350 movs r3, #80 @ 0x50 800242e: 9300 str r3, [sp, #0] 8002430: 4b37 ldr r3, [pc, #220] @ (8002510 ) 8002432: 2201 movs r2, #1 8002434: 2100 movs r1, #0 8002436: 2000 movs r0, #0 8002438: f009 fd96 bl 800bf68 800243c: 4603 mov r3, r0 if (WIFI_STATUS_OK 800243e: 2b00 cmp r3, #0 8002440: d002 beq.n 8002448 LOG(("ERROR: Cannot start server.\n")); 8002442: 4834 ldr r0, [pc, #208] @ (8002514 ) 8002444: f00d fede bl 8010204 } LOG(("Server is running and waiting for an HTTP Client connection to %d.%d.%d.%d\n",IP_Addr[0],IP_Addr[1],IP_Addr[2],IP_Addr[3])); 8002448: 4b33 ldr r3, [pc, #204] @ (8002518 ) 800244a: 781b ldrb r3, [r3, #0] 800244c: 4619 mov r1, r3 800244e: 4b32 ldr r3, [pc, #200] @ (8002518 ) 8002450: 785b ldrb r3, [r3, #1] 8002452: 461a mov r2, r3 8002454: 4b30 ldr r3, [pc, #192] @ (8002518 ) 8002456: 789b ldrb r3, [r3, #2] 8002458: 4618 mov r0, r3 800245a: 4b2f ldr r3, [pc, #188] @ (8002518 ) 800245c: 78db ldrb r3, [r3, #3] 800245e: 9300 str r3, [sp, #0] 8002460: 4603 mov r3, r0 8002462: 482e ldr r0, [pc, #184] @ (800251c ) 8002464: f00d fe66 bl 8010134 do { uint8_t remote_ip[4]; uint16_t remote_port; while (WIFI_STATUS_OK 8002468: e00f b.n 800248a != WIFI_WaitServerConnection(SOCKET, 1000, remote_ip, &remote_port)) { LOG( 800246a: 4b2b ldr r3, [pc, #172] @ (8002518 ) 800246c: 781b ldrb r3, [r3, #0] 800246e: 4619 mov r1, r3 8002470: 4b29 ldr r3, [pc, #164] @ (8002518 ) 8002472: 785b ldrb r3, [r3, #1] 8002474: 461a mov r2, r3 8002476: 4b28 ldr r3, [pc, #160] @ (8002518 ) 8002478: 789b ldrb r3, [r3, #2] 800247a: 4618 mov r0, r3 800247c: 4b26 ldr r3, [pc, #152] @ (8002518 ) 800247e: 78db ldrb r3, [r3, #3] 8002480: 9300 str r3, [sp, #0] 8002482: 4603 mov r3, r0 8002484: 4826 ldr r0, [pc, #152] @ (8002520 ) 8002486: f00d fe55 bl 8010134 != WIFI_WaitServerConnection(SOCKET, 1000, remote_ip, 800248a: 1dbb adds r3, r7, #6 800248c: f107 0208 add.w r2, r7, #8 8002490: f44f 717a mov.w r1, #1000 @ 0x3e8 8002494: 2000 movs r0, #0 8002496: f009 fd97 bl 800bfc8 800249a: 4603 mov r3, r0 800249c: 2b00 cmp r3, #0 800249e: d1e4 bne.n 800246a ("Waiting connection to %d.%d.%d.%d\n",IP_Addr[0],IP_Addr[1],IP_Addr[2],IP_Addr[3])); } LOG( 80024a0: 7a3b ldrb r3, [r7, #8] 80024a2: 4619 mov r1, r3 80024a4: 7a7b ldrb r3, [r7, #9] 80024a6: 4618 mov r0, r3 80024a8: 7abb ldrb r3, [r7, #10] 80024aa: 461c mov r4, r3 80024ac: 7afb ldrb r3, [r7, #11] 80024ae: 88fa ldrh r2, [r7, #6] 80024b0: 9201 str r2, [sp, #4] 80024b2: 9300 str r3, [sp, #0] 80024b4: 4623 mov r3, r4 80024b6: 4602 mov r2, r0 80024b8: 481a ldr r0, [pc, #104] @ (8002524 ) 80024ba: f00d fe3b bl 8010134 ("Client connected %d.%d.%d.%d:%d\n",remote_ip[0],remote_ip[1],remote_ip[2],remote_ip[3],remote_port)); stop_server = WebServerProcess(); 80024be: f000 f839 bl 8002534 80024c2: 4603 mov r3, r0 80024c4: 73fb strb r3, [r7, #15] if (WIFI_CloseServerConnection(SOCKET) != WIFI_STATUS_OK) { 80024c6: 2000 movs r0, #0 80024c8: f009 fdc2 bl 800c050 80024cc: 4603 mov r3, r0 80024ce: 2b00 cmp r3, #0 80024d0: d005 beq.n 80024de LOG(("ERROR: failed to close current Server connection\n")); 80024d2: 4815 ldr r0, [pc, #84] @ (8002528 ) 80024d4: f00d fe96 bl 8010204 return -1; 80024d8: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff 80024dc: e012 b.n 8002504 } } while (stop_server == false); 80024de: 7bfb ldrb r3, [r7, #15] 80024e0: f083 0301 eor.w r3, r3, #1 80024e4: b2db uxtb r3, r3 80024e6: 2b00 cmp r3, #0 80024e8: d1cf bne.n 800248a if (WIFI_STATUS_OK != WIFI_StopServer(SOCKET)) { 80024ea: 2000 movs r0, #0 80024ec: f009 fdc6 bl 800c07c 80024f0: 4603 mov r3, r0 80024f2: 2b00 cmp r3, #0 80024f4: d002 beq.n 80024fc LOG(("ERROR: Cannot stop server.\n")); 80024f6: 480d ldr r0, [pc, #52] @ (800252c ) 80024f8: f00d fe84 bl 8010204 } LOG(("Server stopped\n")); 80024fc: 480c ldr r0, [pc, #48] @ (8002530 ) 80024fe: f00d fe81 bl 8010204 return 0; 8002502: 2300 movs r3, #0 } 8002504: 4618 mov r0, r3 8002506: 3714 adds r7, #20 8002508: 46bd mov sp, r7 800250a: bd90 pop {r4, r7, pc} 800250c: 0801460c .word 0x0801460c 8002510: 08014628 .word 0x08014628 8002514: 0801462c .word 0x0801462c 8002518: 20000738 .word 0x20000738 800251c: 08014648 .word 0x08014648 8002520: 08014698 .word 0x08014698 8002524: 080146bc .word 0x080146bc 8002528: 080146e0 .word 0x080146e0 800252c: 08014714 .word 0x08014714 8002530: 08014730 .word 0x08014730 08002534 : static bool WebServerProcess(void) { 8002534: b5b0 push {r4, r5, r7, lr} 8002536: b0aa sub sp, #168 @ 0xa8 8002538: af02 add r7, sp, #8 uint8_t led_state = 1; 800253a: 2301 movs r3, #1 800253c: f887 309e strb.w r3, [r7, #158] @ 0x9e SensorData_t tmp; // struct temporal uint16_t response_length; static uint8_t response[1024]; bool stop_server = false; 8002540: 2300 movs r3, #0 8002542: f887 309f strb.w r3, [r7, #159] @ 0x9f if (WIFI_STATUS_OK == WIFI_ReceiveData(SOCKET, response, sizeof(response) - 1, &response_length, WIFI_READ_TIMEOUT)) 8002546: f107 0372 add.w r3, r7, #114 @ 0x72 800254a: f242 7210 movw r2, #10000 @ 0x2710 800254e: 9200 str r2, [sp, #0] 8002550: f240 32ff movw r2, #1023 @ 0x3ff 8002554: 4970 ldr r1, [pc, #448] @ (8002718 ) 8002556: 2000 movs r0, #0 8002558: f009 fdca bl 800c0f0 800255c: 4603 mov r3, r0 800255e: 2b00 cmp r3, #0 8002560: f040 80d0 bne.w 8002704 { LOG(("get %d byte from server\n", response_length)); 8002564: f8b7 3072 ldrh.w r3, [r7, #114] @ 0x72 8002568: 4619 mov r1, r3 800256a: 486c ldr r0, [pc, #432] @ (800271c ) 800256c: f00d fde2 bl 8010134 if (response_length > 0) 8002570: f8b7 3072 ldrh.w r3, [r7, #114] @ 0x72 8002574: 2b00 cmp r3, #0 8002576: f000 80c8 beq.w 800270a { if (response_length < sizeof(response)) 800257a: f8b7 3072 ldrh.w r3, [r7, #114] @ 0x72 800257e: f5b3 6f80 cmp.w r3, #1024 @ 0x400 8002582: d206 bcs.n 8002592 response[response_length] = '\0'; 8002584: f8b7 3072 ldrh.w r3, [r7, #114] @ 0x72 8002588: 461a mov r2, r3 800258a: 4b63 ldr r3, [pc, #396] @ (8002718 ) 800258c: 2100 movs r1, #0 800258e: 5499 strb r1, [r3, r2] 8002590: e003 b.n 800259a else response[sizeof(response) - 1] = '\0'; 8002592: 4b61 ldr r3, [pc, #388] @ (8002718 ) 8002594: 2200 movs r2, #0 8002596: f883 23ff strb.w r2, [r3, #1023] @ 0x3ff char method[8] = {0}; 800259a: f107 0368 add.w r3, r7, #104 @ 0x68 800259e: 2200 movs r2, #0 80025a0: 601a str r2, [r3, #0] 80025a2: 605a str r2, [r3, #4] char path[64] = {0}; 80025a4: f107 0328 add.w r3, r7, #40 @ 0x28 80025a8: 2240 movs r2, #64 @ 0x40 80025aa: 2100 movs r1, #0 80025ac: 4618 mov r0, r3 80025ae: f00d ff9f bl 80104f0 sscanf((char*)response, "%7s %63s", method, path); 80025b2: f107 0328 add.w r3, r7, #40 @ 0x28 80025b6: f107 0268 add.w r2, r7, #104 @ 0x68 80025ba: 4959 ldr r1, [pc, #356] @ (8002720 ) 80025bc: 4856 ldr r0, [pc, #344] @ (8002718 ) 80025be: f00d fe81 bl 80102c4 LOG(("Request: method=%s path=%s\n", method, path)); 80025c2: f107 0228 add.w r2, r7, #40 @ 0x28 80025c6: f107 0368 add.w r3, r7, #104 @ 0x68 80025ca: 4619 mov r1, r3 80025cc: 4855 ldr r0, [pc, #340] @ (8002724 ) 80025ce: f00d fdb1 bl 8010134 // --- GET ---------------------------------------- if (strcmp(method, "GET") == 0) 80025d2: f107 0368 add.w r3, r7, #104 @ 0x68 80025d6: 4954 ldr r1, [pc, #336] @ (8002728 ) 80025d8: 4618 mov r0, r3 80025da: f7fd fdf9 bl 80001d0 80025de: 4603 mov r3, r0 80025e0: 2b00 cmp r3, #0 80025e2: d11e bne.n 8002622 { tmp = GetSensors(); 80025e4: 463b mov r3, r7 80025e6: 4618 mov r0, r3 80025e8: f7ff fdf4 bl 80021d4 80025ec: f107 0474 add.w r4, r7, #116 @ 0x74 80025f0: 463d mov r5, r7 80025f2: cd0f ldmia r5!, {r0, r1, r2, r3} 80025f4: c40f stmia r4!, {r0, r1, r2, r3} 80025f6: cd0f ldmia r5!, {r0, r1, r2, r3} 80025f8: c40f stmia r4!, {r0, r1, r2, r3} 80025fa: e895 0003 ldmia.w r5, {r0, r1} 80025fe: e884 0003 stmia.w r4, {r0, r1} if (SendJsonResponse(&tmp) != WIFI_STATUS_OK) { 8002602: f107 0374 add.w r3, r7, #116 @ 0x74 8002606: 4618 mov r0, r3 8002608: f000 f8aa bl 8002760 800260c: 4603 mov r3, r0 800260e: 2b00 cmp r3, #0 8002610: d003 beq.n 800261a LOG(("> ERROR : Cannot send JSON\n")); 8002612: 4846 ldr r0, [pc, #280] @ (800272c ) 8002614: f00d fdf6 bl 8010204 8002618: e077 b.n 800270a } else { LOG(("Send JSON after GET\n")); 800261a: 4845 ldr r0, [pc, #276] @ (8002730 ) 800261c: f00d fdf2 bl 8010204 8002620: e073 b.n 800270a } } // --- POST ---------------------------------------- else if (strcmp(method, "POST") == 0) 8002622: f107 0368 add.w r3, r7, #104 @ 0x68 8002626: 4943 ldr r1, [pc, #268] @ (8002734 ) 8002628: 4618 mov r0, r3 800262a: f7fd fdd1 bl 80001d0 800262e: 4603 mov r3, r0 8002630: 2b00 cmp r3, #0 8002632: d160 bne.n 80026f6 { if (strstr((char*)response, "radio")) { 8002634: 4940 ldr r1, [pc, #256] @ (8002738 ) 8002636: 4838 ldr r0, [pc, #224] @ (8002718 ) 8002638: f00d ffe4 bl 8010604 800263c: 4603 mov r3, r0 800263e: 2b00 cmp r3, #0 8002640: d01e beq.n 8002680 if (strstr((char*)response, "radio=0")) { 8002642: 493e ldr r1, [pc, #248] @ (800273c ) 8002644: 4834 ldr r0, [pc, #208] @ (8002718 ) 8002646: f00d ffdd bl 8010604 800264a: 4603 mov r3, r0 800264c: 2b00 cmp r3, #0 800264e: d008 beq.n 8002662 led_state = 0; 8002650: 2300 movs r3, #0 8002652: f887 309e strb.w r3, [r7, #158] @ 0x9e QueueLed(led_state); 8002656: f897 309e ldrb.w r3, [r7, #158] @ 0x9e 800265a: 4618 mov r0, r3 800265c: f7ff fda6 bl 80021ac 8002660: e00e b.n 8002680 } else if (strstr((char*)response, "radio=1")) { 8002662: 4937 ldr r1, [pc, #220] @ (8002740 ) 8002664: 482c ldr r0, [pc, #176] @ (8002718 ) 8002666: f00d ffcd bl 8010604 800266a: 4603 mov r3, r0 800266c: 2b00 cmp r3, #0 800266e: d007 beq.n 8002680 led_state = 1; 8002670: 2301 movs r3, #1 8002672: f887 309e strb.w r3, [r7, #158] @ 0x9e QueueLed(led_state); 8002676: f897 309e ldrb.w r3, [r7, #158] @ 0x9e 800267a: 4618 mov r0, r3 800267c: f7ff fd96 bl 80021ac } } if (strstr((char*)response, "stop_server")) { 8002680: 4930 ldr r1, [pc, #192] @ (8002744 ) 8002682: 4825 ldr r0, [pc, #148] @ (8002718 ) 8002684: f00d ffbe bl 8010604 8002688: 4603 mov r3, r0 800268a: 2b00 cmp r3, #0 800268c: d014 beq.n 80026b8 if (strstr((char*)response, "stop_server=0")) 800268e: 492e ldr r1, [pc, #184] @ (8002748 ) 8002690: 4821 ldr r0, [pc, #132] @ (8002718 ) 8002692: f00d ffb7 bl 8010604 8002696: 4603 mov r3, r0 8002698: 2b00 cmp r3, #0 800269a: d003 beq.n 80026a4 stop_server = false; 800269c: 2300 movs r3, #0 800269e: f887 309f strb.w r3, [r7, #159] @ 0x9f 80026a2: e009 b.n 80026b8 else if (strstr((char*)response, "stop_server=1")) 80026a4: 4929 ldr r1, [pc, #164] @ (800274c ) 80026a6: 481c ldr r0, [pc, #112] @ (8002718 ) 80026a8: f00d ffac bl 8010604 80026ac: 4603 mov r3, r0 80026ae: 2b00 cmp r3, #0 80026b0: d002 beq.n 80026b8 stop_server = true; 80026b2: 2301 movs r3, #1 80026b4: f887 309f strb.w r3, [r7, #159] @ 0x9f } tmp = GetSensors(); 80026b8: 463b mov r3, r7 80026ba: 4618 mov r0, r3 80026bc: f7ff fd8a bl 80021d4 80026c0: f107 0474 add.w r4, r7, #116 @ 0x74 80026c4: 463d mov r5, r7 80026c6: cd0f ldmia r5!, {r0, r1, r2, r3} 80026c8: c40f stmia r4!, {r0, r1, r2, r3} 80026ca: cd0f ldmia r5!, {r0, r1, r2, r3} 80026cc: c40f stmia r4!, {r0, r1, r2, r3} 80026ce: e895 0003 ldmia.w r5, {r0, r1} 80026d2: e884 0003 stmia.w r4, {r0, r1} if (SendJsonResponse(&tmp) != WIFI_STATUS_OK) { 80026d6: f107 0374 add.w r3, r7, #116 @ 0x74 80026da: 4618 mov r0, r3 80026dc: f000 f840 bl 8002760 80026e0: 4603 mov r3, r0 80026e2: 2b00 cmp r3, #0 80026e4: d003 beq.n 80026ee LOG(("> ERROR : Cannot send JSON after POST\n")); 80026e6: 481a ldr r0, [pc, #104] @ (8002750 ) 80026e8: f00d fd8c bl 8010204 80026ec: e00d b.n 800270a } else { LOG(("Send JSON after POST\n")); 80026ee: 4819 ldr r0, [pc, #100] @ (8002754 ) 80026f0: f00d fd88 bl 8010204 80026f4: e009 b.n 800270a } } // --- INVALID METHOD ---------------------------------------- else { LOG(("Unsupported method: %s\n", method)); 80026f6: f107 0368 add.w r3, r7, #104 @ 0x68 80026fa: 4619 mov r1, r3 80026fc: 4816 ldr r0, [pc, #88] @ (8002758 ) 80026fe: f00d fd19 bl 8010134 8002702: e002 b.n 800270a } } } else { LOG(("Client close connection or receive timeout\n")); 8002704: 4815 ldr r0, [pc, #84] @ (800275c ) 8002706: f00d fd7d bl 8010204 } return stop_server; 800270a: f897 309f ldrb.w r3, [r7, #159] @ 0x9f } 800270e: 4618 mov r0, r3 8002710: 37a0 adds r7, #160 @ 0xa0 8002712: 46bd mov sp, r7 8002714: bdb0 pop {r4, r5, r7, pc} 8002716: bf00 nop 8002718: 2000073c .word 0x2000073c 800271c: 08014740 .word 0x08014740 8002720: 0801475c .word 0x0801475c 8002724: 08014768 .word 0x08014768 8002728: 08014784 .word 0x08014784 800272c: 08014788 .word 0x08014788 8002730: 080147a4 .word 0x080147a4 8002734: 080147b8 .word 0x080147b8 8002738: 080147c0 .word 0x080147c0 800273c: 080147c8 .word 0x080147c8 8002740: 080147d0 .word 0x080147d0 8002744: 080147d8 .word 0x080147d8 8002748: 080147e4 .word 0x080147e4 800274c: 080147f4 .word 0x080147f4 8002750: 08014804 .word 0x08014804 8002754: 0801482c .word 0x0801482c 8002758: 08014844 .word 0x08014844 800275c: 0801485c .word 0x0801485c 08002760 : * @brief Send HTML page * @param None * @retval None */ static WIFI_Status_t SendJsonResponse(SensorData_t* payload) { 8002760: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 8002764: f5ad 7d23 sub.w sp, sp, #652 @ 0x28c 8002768: af14 add r7, sp, #80 @ 0x50 800276a: f507 730e add.w r3, r7, #568 @ 0x238 800276e: f5a3 7305 sub.w r3, r3, #532 @ 0x214 8002772: 6018 str r0, [r3, #0] uint16_t sent_data_length = 0; 8002774: 2300 movs r3, #0 8002776: f8a7 3228 strh.w r3, [r7, #552] @ 0x228 "\"pressure\": %.2f," "\"accelerometer\": [%d, %d, %d]," "\"gyroscope\": [%.2f, %.2f, %.2f]," "\"magnetometer\": [%d, %d, %d]" "}", payload->humidity, 800277a: f507 730e add.w r3, r7, #568 @ 0x238 800277e: f5a3 7305 sub.w r3, r3, #532 @ 0x214 8002782: 681b ldr r3, [r3, #0] 8002784: 681b ldr r3, [r3, #0] int body_length = snprintf(body, sizeof(body), 8002786: 4618 mov r0, r3 8002788: f7fd feee bl 8000568 <__aeabi_f2d> 800278c: 4682 mov sl, r0 800278e: 468b mov fp, r1 payload->temperature, 8002790: f507 730e add.w r3, r7, #568 @ 0x238 8002794: f5a3 7305 sub.w r3, r3, #532 @ 0x214 8002798: 681b ldr r3, [r3, #0] 800279a: 685b ldr r3, [r3, #4] int body_length = snprintf(body, sizeof(body), 800279c: 4618 mov r0, r3 800279e: f7fd fee3 bl 8000568 <__aeabi_f2d> 80027a2: e9c7 0106 strd r0, r1, [r7, #24] payload->pressure, 80027a6: f507 730e add.w r3, r7, #568 @ 0x238 80027aa: f5a3 7305 sub.w r3, r3, #532 @ 0x214 80027ae: 681b ldr r3, [r3, #0] 80027b0: 689b ldr r3, [r3, #8] int body_length = snprintf(body, sizeof(body), 80027b2: 4618 mov r0, r3 80027b4: f7fd fed8 bl 8000568 <__aeabi_f2d> 80027b8: e9c7 0104 strd r0, r1, [r7, #16] payload->accelerometer[0], payload->accelerometer[1], payload->accelerometer[2], 80027bc: f507 730e add.w r3, r7, #568 @ 0x238 80027c0: f5a3 7305 sub.w r3, r3, #532 @ 0x214 80027c4: 681b ldr r3, [r3, #0] 80027c6: f9b3 300c ldrsh.w r3, [r3, #12] int body_length = snprintf(body, sizeof(body), 80027ca: 461e mov r6, r3 payload->accelerometer[0], payload->accelerometer[1], payload->accelerometer[2], 80027cc: f507 730e add.w r3, r7, #568 @ 0x238 80027d0: f5a3 7305 sub.w r3, r3, #532 @ 0x214 80027d4: 681b ldr r3, [r3, #0] 80027d6: f9b3 300e ldrsh.w r3, [r3, #14] int body_length = snprintf(body, sizeof(body), 80027da: 623b str r3, [r7, #32] payload->accelerometer[0], payload->accelerometer[1], payload->accelerometer[2], 80027dc: f507 730e add.w r3, r7, #568 @ 0x238 80027e0: f5a3 7305 sub.w r3, r3, #532 @ 0x214 80027e4: 681b ldr r3, [r3, #0] 80027e6: f9b3 3010 ldrsh.w r3, [r3, #16] int body_length = snprintf(body, sizeof(body), 80027ea: 60fb str r3, [r7, #12] payload->gyroscope[0], payload->gyroscope[1], payload->gyroscope[2], 80027ec: f507 730e add.w r3, r7, #568 @ 0x238 80027f0: f5a3 7305 sub.w r3, r3, #532 @ 0x214 80027f4: 681b ldr r3, [r3, #0] 80027f6: 695b ldr r3, [r3, #20] int body_length = snprintf(body, sizeof(body), 80027f8: 4618 mov r0, r3 80027fa: f7fd feb5 bl 8000568 <__aeabi_f2d> 80027fe: e9c7 0100 strd r0, r1, [r7] payload->gyroscope[0], payload->gyroscope[1], payload->gyroscope[2], 8002802: f507 730e add.w r3, r7, #568 @ 0x238 8002806: f5a3 7305 sub.w r3, r3, #532 @ 0x214 800280a: 681b ldr r3, [r3, #0] 800280c: 699b ldr r3, [r3, #24] int body_length = snprintf(body, sizeof(body), 800280e: 4618 mov r0, r3 8002810: f7fd feaa bl 8000568 <__aeabi_f2d> 8002814: 4680 mov r8, r0 8002816: 4689 mov r9, r1 payload->gyroscope[0], payload->gyroscope[1], payload->gyroscope[2], 8002818: f507 730e add.w r3, r7, #568 @ 0x238 800281c: f5a3 7305 sub.w r3, r3, #532 @ 0x214 8002820: 681b ldr r3, [r3, #0] 8002822: 69db ldr r3, [r3, #28] int body_length = snprintf(body, sizeof(body), 8002824: 4618 mov r0, r3 8002826: f7fd fe9f bl 8000568 <__aeabi_f2d> 800282a: 4604 mov r4, r0 800282c: 460d mov r5, r1 payload->magnetometer[0], payload->magnetometer[1], payload->magnetometer[2] 800282e: f507 730e add.w r3, r7, #568 @ 0x238 8002832: f5a3 7305 sub.w r3, r3, #532 @ 0x214 8002836: 681b ldr r3, [r3, #0] 8002838: f9b3 3020 ldrsh.w r3, [r3, #32] int body_length = snprintf(body, sizeof(body), 800283c: 4619 mov r1, r3 payload->magnetometer[0], payload->magnetometer[1], payload->magnetometer[2] 800283e: f507 730e add.w r3, r7, #568 @ 0x238 8002842: f5a3 7305 sub.w r3, r3, #532 @ 0x214 8002846: 681b ldr r3, [r3, #0] 8002848: f9b3 3022 ldrsh.w r3, [r3, #34] @ 0x22 int body_length = snprintf(body, sizeof(body), 800284c: 461a mov r2, r3 payload->magnetometer[0], payload->magnetometer[1], payload->magnetometer[2] 800284e: f507 730e add.w r3, r7, #568 @ 0x238 8002852: f5a3 7305 sub.w r3, r3, #532 @ 0x214 8002856: 681b ldr r3, [r3, #0] 8002858: f9b3 3024 ldrsh.w r3, [r3, #36] @ 0x24 int body_length = snprintf(body, sizeof(body), 800285c: f107 0028 add.w r0, r7, #40 @ 0x28 8002860: 9312 str r3, [sp, #72] @ 0x48 8002862: 9211 str r2, [sp, #68] @ 0x44 8002864: 9110 str r1, [sp, #64] @ 0x40 8002866: e9cd 450e strd r4, r5, [sp, #56] @ 0x38 800286a: e9cd 890c strd r8, r9, [sp, #48] @ 0x30 800286e: ed97 7b00 vldr d7, [r7] 8002872: ed8d 7b0a vstr d7, [sp, #40] @ 0x28 8002876: 68fa ldr r2, [r7, #12] 8002878: 9208 str r2, [sp, #32] 800287a: 6a3b ldr r3, [r7, #32] 800287c: 9307 str r3, [sp, #28] 800287e: 9606 str r6, [sp, #24] 8002880: ed97 7b04 vldr d7, [r7, #16] 8002884: ed8d 7b04 vstr d7, [sp, #16] 8002888: ed97 7b06 vldr d7, [r7, #24] 800288c: ed8d 7b02 vstr d7, [sp, #8] 8002890: e9cd ab00 strd sl, fp, [sp] 8002894: 4a3e ldr r2, [pc, #248] @ (8002990 ) 8002896: f44f 7100 mov.w r1, #512 @ 0x200 800289a: f00d fcbb bl 8010214 800289e: f8c7 0234 str.w r0, [r7, #564] @ 0x234 ); if (body_length < 0) body_length = 0; 80028a2: f8d7 3234 ldr.w r3, [r7, #564] @ 0x234 80028a6: 2b00 cmp r3, #0 80028a8: da02 bge.n 80028b0 80028aa: 2300 movs r3, #0 80028ac: f8c7 3234 str.w r3, [r7, #564] @ 0x234 if (body_length >= (int)sizeof(body)) body_length = (int)sizeof(body) - 1; 80028b0: f8d7 3234 ldr.w r3, [r7, #564] @ 0x234 80028b4: f5b3 7f00 cmp.w r3, #512 @ 0x200 80028b8: db03 blt.n 80028c2 80028ba: f240 13ff movw r3, #511 @ 0x1ff 80028be: f8c7 3234 str.w r3, [r7, #564] @ 0x234 int header_length = snprintf((char*)http, sizeof(http), 80028c2: f8d7 3234 ldr.w r3, [r7, #564] @ 0x234 80028c6: 4a33 ldr r2, [pc, #204] @ (8002994 ) 80028c8: f44f 6180 mov.w r1, #1024 @ 0x400 80028cc: 4832 ldr r0, [pc, #200] @ (8002998 ) 80028ce: f00d fca1 bl 8010214 80028d2: f8c7 0230 str.w r0, [r7, #560] @ 0x230 "Pragma: no-cache\r\n" "\r\n", body_length ); if (header_length <= 0 || header_length >= (int)sizeof(http)) 80028d6: f8d7 3230 ldr.w r3, [r7, #560] @ 0x230 80028da: 2b00 cmp r3, #0 80028dc: dd04 ble.n 80028e8 80028de: f8d7 3230 ldr.w r3, [r7, #560] @ 0x230 80028e2: f5b3 6f80 cmp.w r3, #1024 @ 0x400 80028e6: db01 blt.n 80028ec return WIFI_STATUS_ERROR; 80028e8: 2301 movs r3, #1 80028ea: e04a b.n 8002982 if ((size_t)header_length + (size_t)body_length >= sizeof(http)) 80028ec: f8d7 2230 ldr.w r2, [r7, #560] @ 0x230 80028f0: f8d7 3234 ldr.w r3, [r7, #564] @ 0x234 80028f4: 4413 add r3, r2 80028f6: f5b3 6f80 cmp.w r3, #1024 @ 0x400 80028fa: d301 bcc.n 8002900 return WIFI_STATUS_ERROR; 80028fc: 2301 movs r3, #1 80028fe: e040 b.n 8002982 memcpy(http + header_length, body, body_length); 8002900: f8d7 3230 ldr.w r3, [r7, #560] @ 0x230 8002904: 4a24 ldr r2, [pc, #144] @ (8002998 ) 8002906: 4413 add r3, r2 8002908: f8d7 2234 ldr.w r2, [r7, #564] @ 0x234 800290c: f107 0128 add.w r1, r7, #40 @ 0x28 8002910: 4618 mov r0, r3 8002912: f00d ff04 bl 801071e size_t total_length = header_length + body_length + 2; 8002916: f8d7 2230 ldr.w r2, [r7, #560] @ 0x230 800291a: f8d7 3234 ldr.w r3, [r7, #564] @ 0x234 800291e: 4413 add r3, r2 8002920: 3302 adds r3, #2 8002922: f8c7 322c str.w r3, [r7, #556] @ 0x22c return_status = WIFI_SendData( 8002926: f8d7 322c ldr.w r3, [r7, #556] @ 0x22c 800292a: b29a uxth r2, r3 800292c: f507 730a add.w r3, r7, #552 @ 0x228 8002930: f242 7110 movw r1, #10000 @ 0x2710 8002934: 9100 str r1, [sp, #0] 8002936: 4918 ldr r1, [pc, #96] @ (8002998 ) 8002938: 2000 movs r0, #0 800293a: f009 fbb7 bl 800c0ac 800293e: 4603 mov r3, r0 8002940: f887 322b strb.w r3, [r7, #555] @ 0x22b total_length, &sent_data_length, WIFI_WRITE_TIMEOUT ); if (return_status != WIFI_STATUS_OK) { 8002944: f897 322b ldrb.w r3, [r7, #555] @ 0x22b 8002948: 2b00 cmp r3, #0 800294a: d008 beq.n 800295e LOG(("WIFI_SendData return_status != OK (%d)\n", (int)return_status)); 800294c: f897 322b ldrb.w r3, [r7, #555] @ 0x22b 8002950: 4619 mov r1, r3 8002952: 4812 ldr r0, [pc, #72] @ (800299c ) 8002954: f00d fbee bl 8010134 return return_status; 8002958: f897 322b ldrb.w r3, [r7, #555] @ 0x22b 800295c: e011 b.n 8002982 } if (sent_data_length != (uint16_t)total_length) { 800295e: f8d7 322c ldr.w r3, [r7, #556] @ 0x22c 8002962: b29a uxth r2, r3 8002964: f8b7 3228 ldrh.w r3, [r7, #552] @ 0x228 8002968: 429a cmp r2, r3 800296a: d009 beq.n 8002980 LOG(("WIFI_SendData sent %u of %u\n", sent_data_length, (unsigned)total_length)); 800296c: f8b7 3228 ldrh.w r3, [r7, #552] @ 0x228 8002970: f8d7 222c ldr.w r2, [r7, #556] @ 0x22c 8002974: 4619 mov r1, r3 8002976: 480a ldr r0, [pc, #40] @ (80029a0 ) 8002978: f00d fbdc bl 8010134 return WIFI_STATUS_ERROR; 800297c: 2301 movs r3, #1 800297e: e000 b.n 8002982 } return WIFI_STATUS_OK; 8002980: 2300 movs r3, #0 } 8002982: 4618 mov r0, r3 8002984: f507 770f add.w r7, r7, #572 @ 0x23c 8002988: 46bd mov sp, r7 800298a: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} 800298e: bf00 nop 8002990: 08014888 .word 0x08014888 8002994: 0801491c .word 0x0801491c 8002998: 20000338 .word 0x20000338 800299c: 0801498c .word 0x0801498c 80029a0: 080149b4 .word 0x080149b4 080029a4 : /** * @brief This function handles external lines 1interrupt request. * @param None * @retval None */ void EXTI1_IRQHandler(void) { 80029a4: b580 push {r7, lr} 80029a6: af00 add r7, sp, #0 HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_1); 80029a8: 2002 movs r0, #2 80029aa: f001 fec1 bl 8004730 portYIELD_FROM_ISR(pdFALSE); } 80029ae: bf00 nop 80029b0: bd80 pop {r7, pc} 080029b2 : /** * @brief EXTI line detection callback. * @param GPIO_Pin: Specifies the port pin connected to corresponding EXTI line. * @retval None */ void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin) { 80029b2: b580 push {r7, lr} 80029b4: b082 sub sp, #8 80029b6: af00 add r7, sp, #0 80029b8: 4603 mov r3, r0 80029ba: 80fb strh r3, [r7, #6] switch (GPIO_Pin) { 80029bc: 88fb ldrh r3, [r7, #6] 80029be: 2b02 cmp r3, #2 80029c0: d102 bne.n 80029c8 case (GPIO_PIN_1): { SPI_WIFI_ISR(); 80029c2: f009 fa41 bl 800be48 break; 80029c6: e000 b.n 80029ca } default: { break; 80029c8: bf00 nop } } portYIELD_FROM_ISR(pdFALSE); } 80029ca: bf00 nop 80029cc: 3708 adds r7, #8 80029ce: 46bd mov sp, r7 80029d0: bd80 pop {r7, pc} ... 080029d4 : * @brief SPI3 line detection callback. * @param None * @retval None */ extern SPI_HandleTypeDef hspi; void SPI3_IRQHandler(void) { 80029d4: b580 push {r7, lr} 80029d6: af00 add r7, sp, #0 HAL_SPI_IRQHandler(&hspi); 80029d8: 4802 ldr r0, [pc, #8] @ (80029e4 ) 80029da: f005 f881 bl 8007ae0 portYIELD_FROM_ISR(pdFALSE); } 80029de: bf00 nop 80029e0: bd80 pop {r7, pc} 80029e2: bf00 nop 80029e4: 200012e8 .word 0x200012e8 080029e8
: /** * @brief The application entry point. * @retval int */ int main(void) { 80029e8: b580 push {r7, lr} 80029ea: af00 add r7, sp, #0 /* USER CODE END 1 */ /* MCU Configuration--------------------------------------------------------*/ /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ HAL_Init(); 80029ec: f001 f907 bl 8003bfe /* USER CODE BEGIN Init */ /* USER CODE END Init */ /* Configure the system clock */ SystemClock_Config(); 80029f0: f000 f81a bl 8002a28 /* USER CODE BEGIN SysInit */ /* USER CODE END SysInit */ /* Initialize all configured peripherals */ MX_GPIO_Init(); 80029f4: f000 fa24 bl 8002e40 MX_DFSDM1_Init(); 80029f8: f000 f8ba bl 8002b70 MX_I2C2_Init(); 80029fc: f000 f8f0 bl 8002be0 MX_QUADSPI_Init(); 8002a00: f000 f92c bl 8002c5c MX_SPI3_Init(); 8002a04: f000 f950 bl 8002ca8 MX_USART1_UART_Init(); 8002a08: f000 f98c bl 8002d24 MX_USART3_UART_Init(); 8002a0c: f000 f9ba bl 8002d84 MX_USB_OTG_FS_PCD_Init(); 8002a10: f000 f9e8 bl 8002de4 /* USER CODE BEGIN 2 */ /* USER CODE END 2 */ /* Init scheduler */ osKernelInitialize(); 8002a14: f009 fbd2 bl 800c1bc /* creation of defaultTask */ //defaultTaskHandle = osThreadNew(StartDefaultTask, NULL, &defaultTask_attributes); /* USER CODE BEGIN RTOS_THREADS */ /* add threads, ... */ CreateSerialObjects(); 8002a18: f7ff fb94 bl 8002144 CreateTasks(); 8002a1c: f7ff fc02 bl 8002224 /* USER CODE END RTOS_THREADS */ /* Start scheduler */ osKernelStart(); 8002a20: f009 fbf0 bl 800c204 /* We should never get here as control is now taken by the scheduler */ /* Infinite loop */ /* USER CODE BEGIN WHILE */ while (1) 8002a24: bf00 nop 8002a26: e7fd b.n 8002a24 08002a28 : /** * @brief System Clock Configuration * @retval None */ void SystemClock_Config(void) { 8002a28: b580 push {r7, lr} 8002a2a: b0b8 sub sp, #224 @ 0xe0 8002a2c: af00 add r7, sp, #0 RCC_OscInitTypeDef RCC_OscInitStruct = {0}; 8002a2e: f107 039c add.w r3, r7, #156 @ 0x9c 8002a32: 2244 movs r2, #68 @ 0x44 8002a34: 2100 movs r1, #0 8002a36: 4618 mov r0, r3 8002a38: f00d fd5a bl 80104f0 RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; 8002a3c: f107 0388 add.w r3, r7, #136 @ 0x88 8002a40: 2200 movs r2, #0 8002a42: 601a str r2, [r3, #0] 8002a44: 605a str r2, [r3, #4] 8002a46: 609a str r2, [r3, #8] 8002a48: 60da str r2, [r3, #12] 8002a4a: 611a str r2, [r3, #16] RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; 8002a4c: 463b mov r3, r7 8002a4e: 2288 movs r2, #136 @ 0x88 8002a50: 2100 movs r1, #0 8002a52: 4618 mov r0, r3 8002a54: f00d fd4c bl 80104f0 /** Configure LSE Drive Capability */ HAL_PWR_EnableBkUpAccess(); 8002a58: f002 fe06 bl 8005668 __HAL_RCC_LSEDRIVE_CONFIG(RCC_LSEDRIVE_LOW); 8002a5c: 4b42 ldr r3, [pc, #264] @ (8002b68 ) 8002a5e: f8d3 3090 ldr.w r3, [r3, #144] @ 0x90 8002a62: 4a41 ldr r2, [pc, #260] @ (8002b68 ) 8002a64: f023 0318 bic.w r3, r3, #24 8002a68: f8c2 3090 str.w r3, [r2, #144] @ 0x90 /** Initializes the RCC Oscillators according to the specified parameters * in the RCC_OscInitTypeDef structure. */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSE|RCC_OSCILLATORTYPE_MSI; 8002a6c: 2314 movs r3, #20 8002a6e: f8c7 309c str.w r3, [r7, #156] @ 0x9c RCC_OscInitStruct.LSEState = RCC_LSE_ON; 8002a72: 2301 movs r3, #1 8002a74: f8c7 30a4 str.w r3, [r7, #164] @ 0xa4 RCC_OscInitStruct.MSIState = RCC_MSI_ON; 8002a78: 2301 movs r3, #1 8002a7a: f8c7 30b4 str.w r3, [r7, #180] @ 0xb4 RCC_OscInitStruct.MSICalibrationValue = 0; 8002a7e: 2300 movs r3, #0 8002a80: f8c7 30b8 str.w r3, [r7, #184] @ 0xb8 RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_6; 8002a84: 2360 movs r3, #96 @ 0x60 8002a86: f8c7 30bc str.w r3, [r7, #188] @ 0xbc RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; 8002a8a: 2302 movs r3, #2 8002a8c: f8c7 30c4 str.w r3, [r7, #196] @ 0xc4 RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_MSI; 8002a90: 2301 movs r3, #1 8002a92: f8c7 30c8 str.w r3, [r7, #200] @ 0xc8 RCC_OscInitStruct.PLL.PLLM = 1; 8002a96: 2301 movs r3, #1 8002a98: f8c7 30cc str.w r3, [r7, #204] @ 0xcc RCC_OscInitStruct.PLL.PLLN = 40; 8002a9c: 2328 movs r3, #40 @ 0x28 8002a9e: f8c7 30d0 str.w r3, [r7, #208] @ 0xd0 RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV7; 8002aa2: 2307 movs r3, #7 8002aa4: f8c7 30d4 str.w r3, [r7, #212] @ 0xd4 RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2; 8002aa8: 2302 movs r3, #2 8002aaa: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8 RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2; 8002aae: 2302 movs r3, #2 8002ab0: f8c7 30dc str.w r3, [r7, #220] @ 0xdc if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) 8002ab4: f107 039c add.w r3, r7, #156 @ 0x9c 8002ab8: 4618 mov r0, r3 8002aba: f002 ff15 bl 80058e8 8002abe: 4603 mov r3, r0 8002ac0: 2b00 cmp r3, #0 8002ac2: d001 beq.n 8002ac8 { Error_Handler(); 8002ac4: f000 fb80 bl 80031c8 } /** Initializes the CPU, AHB and APB buses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK 8002ac8: 230f movs r3, #15 8002aca: f8c7 3088 str.w r3, [r7, #136] @ 0x88 |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; 8002ace: 2303 movs r3, #3 8002ad0: f8c7 308c str.w r3, [r7, #140] @ 0x8c RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; 8002ad4: 2300 movs r3, #0 8002ad6: f8c7 3090 str.w r3, [r7, #144] @ 0x90 RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; 8002ada: 2300 movs r3, #0 8002adc: f8c7 3094 str.w r3, [r7, #148] @ 0x94 RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; 8002ae0: 2300 movs r3, #0 8002ae2: f8c7 3098 str.w r3, [r7, #152] @ 0x98 if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK) 8002ae6: f107 0388 add.w r3, r7, #136 @ 0x88 8002aea: 2104 movs r1, #4 8002aec: 4618 mov r0, r3 8002aee: f003 fad7 bl 80060a0 8002af2: 4603 mov r3, r0 8002af4: 2b00 cmp r3, #0 8002af6: d001 beq.n 8002afc { Error_Handler(); 8002af8: f000 fb66 bl 80031c8 } PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART1|RCC_PERIPHCLK_USART3 8002afc: 4b1b ldr r3, [pc, #108] @ (8002b6c ) 8002afe: 603b str r3, [r7, #0] |RCC_PERIPHCLK_I2C2|RCC_PERIPHCLK_DFSDM1 |RCC_PERIPHCLK_USB; PeriphClkInit.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2; 8002b00: 2300 movs r3, #0 8002b02: 63bb str r3, [r7, #56] @ 0x38 PeriphClkInit.Usart3ClockSelection = RCC_USART3CLKSOURCE_PCLK1; 8002b04: 2300 movs r3, #0 8002b06: 643b str r3, [r7, #64] @ 0x40 PeriphClkInit.I2c2ClockSelection = RCC_I2C2CLKSOURCE_PCLK1; 8002b08: 2300 movs r3, #0 8002b0a: 657b str r3, [r7, #84] @ 0x54 PeriphClkInit.Dfsdm1ClockSelection = RCC_DFSDM1CLKSOURCE_PCLK; 8002b0c: 2300 movs r3, #0 8002b0e: f8c7 3080 str.w r3, [r7, #128] @ 0x80 PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLLSAI1; 8002b12: f04f 6380 mov.w r3, #67108864 @ 0x4000000 8002b16: 66fb str r3, [r7, #108] @ 0x6c PeriphClkInit.PLLSAI1.PLLSAI1Source = RCC_PLLSOURCE_MSI; 8002b18: 2301 movs r3, #1 8002b1a: 607b str r3, [r7, #4] PeriphClkInit.PLLSAI1.PLLSAI1M = 1; 8002b1c: 2301 movs r3, #1 8002b1e: 60bb str r3, [r7, #8] PeriphClkInit.PLLSAI1.PLLSAI1N = 24; 8002b20: 2318 movs r3, #24 8002b22: 60fb str r3, [r7, #12] PeriphClkInit.PLLSAI1.PLLSAI1P = RCC_PLLP_DIV7; 8002b24: 2307 movs r3, #7 8002b26: 613b str r3, [r7, #16] PeriphClkInit.PLLSAI1.PLLSAI1Q = RCC_PLLQ_DIV2; 8002b28: 2302 movs r3, #2 8002b2a: 617b str r3, [r7, #20] PeriphClkInit.PLLSAI1.PLLSAI1R = RCC_PLLR_DIV2; 8002b2c: 2302 movs r3, #2 8002b2e: 61bb str r3, [r7, #24] PeriphClkInit.PLLSAI1.PLLSAI1ClockOut = RCC_PLLSAI1_48M2CLK; 8002b30: f44f 1380 mov.w r3, #1048576 @ 0x100000 8002b34: 61fb str r3, [r7, #28] if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) 8002b36: 463b mov r3, r7 8002b38: 4618 mov r0, r3 8002b3a: f003 fd07 bl 800654c 8002b3e: 4603 mov r3, r0 8002b40: 2b00 cmp r3, #0 8002b42: d001 beq.n 8002b48 { Error_Handler(); 8002b44: f000 fb40 bl 80031c8 } /** Configure the main internal regulator output voltage */ if (HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1) != HAL_OK) 8002b48: f44f 7000 mov.w r0, #512 @ 0x200 8002b4c: f002 fdaa bl 80056a4 8002b50: 4603 mov r3, r0 8002b52: 2b00 cmp r3, #0 8002b54: d001 beq.n 8002b5a { Error_Handler(); 8002b56: f000 fb37 bl 80031c8 } /** Enable MSI Auto calibration */ HAL_RCCEx_EnableMSIPLLMode(); 8002b5a: f003 ffe1 bl 8006b20 } 8002b5e: bf00 nop 8002b60: 37e0 adds r7, #224 @ 0xe0 8002b62: 46bd mov sp, r7 8002b64: bd80 pop {r7, pc} 8002b66: bf00 nop 8002b68: 40021000 .word 0x40021000 8002b6c: 00012085 .word 0x00012085 08002b70 : * @brief DFSDM1 Initialization Function * @param None * @retval None */ static void MX_DFSDM1_Init(void) { 8002b70: b580 push {r7, lr} 8002b72: af00 add r7, sp, #0 /* USER CODE END DFSDM1_Init 0 */ /* USER CODE BEGIN DFSDM1_Init 1 */ /* USER CODE END DFSDM1_Init 1 */ hdfsdm1_channel1.Instance = DFSDM1_Channel1; 8002b74: 4b18 ldr r3, [pc, #96] @ (8002bd8 ) 8002b76: 4a19 ldr r2, [pc, #100] @ (8002bdc ) 8002b78: 601a str r2, [r3, #0] hdfsdm1_channel1.Init.OutputClock.Activation = ENABLE; 8002b7a: 4b17 ldr r3, [pc, #92] @ (8002bd8 ) 8002b7c: 2201 movs r2, #1 8002b7e: 711a strb r2, [r3, #4] hdfsdm1_channel1.Init.OutputClock.Selection = DFSDM_CHANNEL_OUTPUT_CLOCK_SYSTEM; 8002b80: 4b15 ldr r3, [pc, #84] @ (8002bd8 ) 8002b82: 2200 movs r2, #0 8002b84: 609a str r2, [r3, #8] hdfsdm1_channel1.Init.OutputClock.Divider = 2; 8002b86: 4b14 ldr r3, [pc, #80] @ (8002bd8 ) 8002b88: 2202 movs r2, #2 8002b8a: 60da str r2, [r3, #12] hdfsdm1_channel1.Init.Input.Multiplexer = DFSDM_CHANNEL_EXTERNAL_INPUTS; 8002b8c: 4b12 ldr r3, [pc, #72] @ (8002bd8 ) 8002b8e: 2200 movs r2, #0 8002b90: 611a str r2, [r3, #16] hdfsdm1_channel1.Init.Input.DataPacking = DFSDM_CHANNEL_STANDARD_MODE; 8002b92: 4b11 ldr r3, [pc, #68] @ (8002bd8 ) 8002b94: 2200 movs r2, #0 8002b96: 615a str r2, [r3, #20] hdfsdm1_channel1.Init.Input.Pins = DFSDM_CHANNEL_FOLLOWING_CHANNEL_PINS; 8002b98: 4b0f ldr r3, [pc, #60] @ (8002bd8 ) 8002b9a: f44f 7280 mov.w r2, #256 @ 0x100 8002b9e: 619a str r2, [r3, #24] hdfsdm1_channel1.Init.SerialInterface.Type = DFSDM_CHANNEL_SPI_RISING; 8002ba0: 4b0d ldr r3, [pc, #52] @ (8002bd8 ) 8002ba2: 2200 movs r2, #0 8002ba4: 61da str r2, [r3, #28] hdfsdm1_channel1.Init.SerialInterface.SpiClock = DFSDM_CHANNEL_SPI_CLOCK_INTERNAL; 8002ba6: 4b0c ldr r3, [pc, #48] @ (8002bd8 ) 8002ba8: 2204 movs r2, #4 8002baa: 621a str r2, [r3, #32] hdfsdm1_channel1.Init.Awd.FilterOrder = DFSDM_CHANNEL_FASTSINC_ORDER; 8002bac: 4b0a ldr r3, [pc, #40] @ (8002bd8 ) 8002bae: 2200 movs r2, #0 8002bb0: 625a str r2, [r3, #36] @ 0x24 hdfsdm1_channel1.Init.Awd.Oversampling = 1; 8002bb2: 4b09 ldr r3, [pc, #36] @ (8002bd8 ) 8002bb4: 2201 movs r2, #1 8002bb6: 629a str r2, [r3, #40] @ 0x28 hdfsdm1_channel1.Init.Offset = 0; 8002bb8: 4b07 ldr r3, [pc, #28] @ (8002bd8 ) 8002bba: 2200 movs r2, #0 8002bbc: 62da str r2, [r3, #44] @ 0x2c hdfsdm1_channel1.Init.RightBitShift = 0x00; 8002bbe: 4b06 ldr r3, [pc, #24] @ (8002bd8 ) 8002bc0: 2200 movs r2, #0 8002bc2: 631a str r2, [r3, #48] @ 0x30 if (HAL_DFSDM_ChannelInit(&hdfsdm1_channel1) != HAL_OK) 8002bc4: 4804 ldr r0, [pc, #16] @ (8002bd8 ) 8002bc6: f001 f959 bl 8003e7c 8002bca: 4603 mov r3, r0 8002bcc: 2b00 cmp r3, #0 8002bce: d001 beq.n 8002bd4 { Error_Handler(); 8002bd0: f000 fafa bl 80031c8 } /* USER CODE BEGIN DFSDM1_Init 2 */ /* USER CODE END DFSDM1_Init 2 */ } 8002bd4: bf00 nop 8002bd6: bd80 pop {r7, pc} 8002bd8: 20000b3c .word 0x20000b3c 8002bdc: 40016020 .word 0x40016020 08002be0 : * @brief I2C2 Initialization Function * @param None * @retval None */ static void MX_I2C2_Init(void) { 8002be0: b580 push {r7, lr} 8002be2: af00 add r7, sp, #0 /* USER CODE END I2C2_Init 0 */ /* USER CODE BEGIN I2C2_Init 1 */ /* USER CODE END I2C2_Init 1 */ hi2c2.Instance = I2C2; 8002be4: 4b1b ldr r3, [pc, #108] @ (8002c54 ) 8002be6: 4a1c ldr r2, [pc, #112] @ (8002c58 ) 8002be8: 601a str r2, [r3, #0] hi2c2.Init.Timing = 0x00000E14; 8002bea: 4b1a ldr r3, [pc, #104] @ (8002c54 ) 8002bec: f640 6214 movw r2, #3604 @ 0xe14 8002bf0: 605a str r2, [r3, #4] hi2c2.Init.OwnAddress1 = 0; 8002bf2: 4b18 ldr r3, [pc, #96] @ (8002c54 ) 8002bf4: 2200 movs r2, #0 8002bf6: 609a str r2, [r3, #8] hi2c2.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT; 8002bf8: 4b16 ldr r3, [pc, #88] @ (8002c54 ) 8002bfa: 2201 movs r2, #1 8002bfc: 60da str r2, [r3, #12] hi2c2.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE; 8002bfe: 4b15 ldr r3, [pc, #84] @ (8002c54 ) 8002c00: 2200 movs r2, #0 8002c02: 611a str r2, [r3, #16] hi2c2.Init.OwnAddress2 = 0; 8002c04: 4b13 ldr r3, [pc, #76] @ (8002c54 ) 8002c06: 2200 movs r2, #0 8002c08: 615a str r2, [r3, #20] hi2c2.Init.OwnAddress2Masks = I2C_OA2_NOMASK; 8002c0a: 4b12 ldr r3, [pc, #72] @ (8002c54 ) 8002c0c: 2200 movs r2, #0 8002c0e: 619a str r2, [r3, #24] hi2c2.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE; 8002c10: 4b10 ldr r3, [pc, #64] @ (8002c54 ) 8002c12: 2200 movs r2, #0 8002c14: 61da str r2, [r3, #28] hi2c2.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE; 8002c16: 4b0f ldr r3, [pc, #60] @ (8002c54 ) 8002c18: 2200 movs r2, #0 8002c1a: 621a str r2, [r3, #32] if (HAL_I2C_Init(&hi2c2) != HAL_OK) 8002c1c: 480d ldr r0, [pc, #52] @ (8002c54 ) 8002c1e: f001 fd9f bl 8004760 8002c22: 4603 mov r3, r0 8002c24: 2b00 cmp r3, #0 8002c26: d001 beq.n 8002c2c { Error_Handler(); 8002c28: f000 face bl 80031c8 } /** Configure Analogue filter */ if (HAL_I2CEx_ConfigAnalogFilter(&hi2c2, I2C_ANALOGFILTER_ENABLE) != HAL_OK) 8002c2c: 2100 movs r1, #0 8002c2e: 4809 ldr r0, [pc, #36] @ (8002c54 ) 8002c30: f002 fb50 bl 80052d4 8002c34: 4603 mov r3, r0 8002c36: 2b00 cmp r3, #0 8002c38: d001 beq.n 8002c3e { Error_Handler(); 8002c3a: f000 fac5 bl 80031c8 } /** Configure Digital filter */ if (HAL_I2CEx_ConfigDigitalFilter(&hi2c2, 0) != HAL_OK) 8002c3e: 2100 movs r1, #0 8002c40: 4804 ldr r0, [pc, #16] @ (8002c54 ) 8002c42: f002 fb92 bl 800536a 8002c46: 4603 mov r3, r0 8002c48: 2b00 cmp r3, #0 8002c4a: d001 beq.n 8002c50 { Error_Handler(); 8002c4c: f000 fabc bl 80031c8 } /* USER CODE BEGIN I2C2_Init 2 */ /* USER CODE END I2C2_Init 2 */ } 8002c50: bf00 nop 8002c52: bd80 pop {r7, pc} 8002c54: 20000b74 .word 0x20000b74 8002c58: 40005800 .word 0x40005800 08002c5c : * @brief QUADSPI Initialization Function * @param None * @retval None */ static void MX_QUADSPI_Init(void) { 8002c5c: b580 push {r7, lr} 8002c5e: af00 add r7, sp, #0 /* USER CODE BEGIN QUADSPI_Init 1 */ /* USER CODE END QUADSPI_Init 1 */ /* QUADSPI parameter configuration*/ hqspi.Instance = QUADSPI; 8002c60: 4b0f ldr r3, [pc, #60] @ (8002ca0 ) 8002c62: 4a10 ldr r2, [pc, #64] @ (8002ca4 ) 8002c64: 601a str r2, [r3, #0] hqspi.Init.ClockPrescaler = 255; 8002c66: 4b0e ldr r3, [pc, #56] @ (8002ca0 ) 8002c68: 22ff movs r2, #255 @ 0xff 8002c6a: 605a str r2, [r3, #4] hqspi.Init.FifoThreshold = 1; 8002c6c: 4b0c ldr r3, [pc, #48] @ (8002ca0 ) 8002c6e: 2201 movs r2, #1 8002c70: 609a str r2, [r3, #8] hqspi.Init.SampleShifting = QSPI_SAMPLE_SHIFTING_NONE; 8002c72: 4b0b ldr r3, [pc, #44] @ (8002ca0 ) 8002c74: 2200 movs r2, #0 8002c76: 60da str r2, [r3, #12] hqspi.Init.FlashSize = 1; 8002c78: 4b09 ldr r3, [pc, #36] @ (8002ca0 ) 8002c7a: 2201 movs r2, #1 8002c7c: 611a str r2, [r3, #16] hqspi.Init.ChipSelectHighTime = QSPI_CS_HIGH_TIME_1_CYCLE; 8002c7e: 4b08 ldr r3, [pc, #32] @ (8002ca0 ) 8002c80: 2200 movs r2, #0 8002c82: 615a str r2, [r3, #20] hqspi.Init.ClockMode = QSPI_CLOCK_MODE_0; 8002c84: 4b06 ldr r3, [pc, #24] @ (8002ca0 ) 8002c86: 2200 movs r2, #0 8002c88: 619a str r2, [r3, #24] if (HAL_QSPI_Init(&hqspi) != HAL_OK) 8002c8a: 4805 ldr r0, [pc, #20] @ (8002ca0 ) 8002c8c: f002 fd70 bl 8005770 8002c90: 4603 mov r3, r0 8002c92: 2b00 cmp r3, #0 8002c94: d001 beq.n 8002c9a { Error_Handler(); 8002c96: f000 fa97 bl 80031c8 } /* USER CODE BEGIN QUADSPI_Init 2 */ /* USER CODE END QUADSPI_Init 2 */ } 8002c9a: bf00 nop 8002c9c: bd80 pop {r7, pc} 8002c9e: bf00 nop 8002ca0: 20000bc8 .word 0x20000bc8 8002ca4: a0001000 .word 0xa0001000 08002ca8 : * @brief SPI3 Initialization Function * @param None * @retval None */ static void MX_SPI3_Init(void) { 8002ca8: b580 push {r7, lr} 8002caa: af00 add r7, sp, #0 /* USER CODE BEGIN SPI3_Init 1 */ /* USER CODE END SPI3_Init 1 */ /* SPI3 parameter configuration*/ hspi3.Instance = SPI3; 8002cac: 4b1b ldr r3, [pc, #108] @ (8002d1c ) 8002cae: 4a1c ldr r2, [pc, #112] @ (8002d20 ) 8002cb0: 601a str r2, [r3, #0] hspi3.Init.Mode = SPI_MODE_MASTER; 8002cb2: 4b1a ldr r3, [pc, #104] @ (8002d1c ) 8002cb4: f44f 7282 mov.w r2, #260 @ 0x104 8002cb8: 605a str r2, [r3, #4] hspi3.Init.Direction = SPI_DIRECTION_2LINES; 8002cba: 4b18 ldr r3, [pc, #96] @ (8002d1c ) 8002cbc: 2200 movs r2, #0 8002cbe: 609a str r2, [r3, #8] hspi3.Init.DataSize = SPI_DATASIZE_4BIT; 8002cc0: 4b16 ldr r3, [pc, #88] @ (8002d1c ) 8002cc2: f44f 7240 mov.w r2, #768 @ 0x300 8002cc6: 60da str r2, [r3, #12] hspi3.Init.CLKPolarity = SPI_POLARITY_LOW; 8002cc8: 4b14 ldr r3, [pc, #80] @ (8002d1c ) 8002cca: 2200 movs r2, #0 8002ccc: 611a str r2, [r3, #16] hspi3.Init.CLKPhase = SPI_PHASE_1EDGE; 8002cce: 4b13 ldr r3, [pc, #76] @ (8002d1c ) 8002cd0: 2200 movs r2, #0 8002cd2: 615a str r2, [r3, #20] hspi3.Init.NSS = SPI_NSS_SOFT; 8002cd4: 4b11 ldr r3, [pc, #68] @ (8002d1c ) 8002cd6: f44f 7200 mov.w r2, #512 @ 0x200 8002cda: 619a str r2, [r3, #24] hspi3.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2; 8002cdc: 4b0f ldr r3, [pc, #60] @ (8002d1c ) 8002cde: 2200 movs r2, #0 8002ce0: 61da str r2, [r3, #28] hspi3.Init.FirstBit = SPI_FIRSTBIT_MSB; 8002ce2: 4b0e ldr r3, [pc, #56] @ (8002d1c ) 8002ce4: 2200 movs r2, #0 8002ce6: 621a str r2, [r3, #32] hspi3.Init.TIMode = SPI_TIMODE_DISABLE; 8002ce8: 4b0c ldr r3, [pc, #48] @ (8002d1c ) 8002cea: 2200 movs r2, #0 8002cec: 625a str r2, [r3, #36] @ 0x24 hspi3.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE; 8002cee: 4b0b ldr r3, [pc, #44] @ (8002d1c ) 8002cf0: 2200 movs r2, #0 8002cf2: 629a str r2, [r3, #40] @ 0x28 hspi3.Init.CRCPolynomial = 7; 8002cf4: 4b09 ldr r3, [pc, #36] @ (8002d1c ) 8002cf6: 2207 movs r2, #7 8002cf8: 62da str r2, [r3, #44] @ 0x2c hspi3.Init.CRCLength = SPI_CRC_LENGTH_DATASIZE; 8002cfa: 4b08 ldr r3, [pc, #32] @ (8002d1c ) 8002cfc: 2200 movs r2, #0 8002cfe: 631a str r2, [r3, #48] @ 0x30 hspi3.Init.NSSPMode = SPI_NSS_PULSE_ENABLE; 8002d00: 4b06 ldr r3, [pc, #24] @ (8002d1c ) 8002d02: 2208 movs r2, #8 8002d04: 635a str r2, [r3, #52] @ 0x34 if (HAL_SPI_Init(&hspi3) != HAL_OK) 8002d06: 4805 ldr r0, [pc, #20] @ (8002d1c ) 8002d08: f004 f8ec bl 8006ee4 8002d0c: 4603 mov r3, r0 8002d0e: 2b00 cmp r3, #0 8002d10: d001 beq.n 8002d16 { Error_Handler(); 8002d12: f000 fa59 bl 80031c8 } /* USER CODE BEGIN SPI3_Init 2 */ /* USER CODE END SPI3_Init 2 */ } 8002d16: bf00 nop 8002d18: bd80 pop {r7, pc} 8002d1a: bf00 nop 8002d1c: 20000c0c .word 0x20000c0c 8002d20: 40003c00 .word 0x40003c00 08002d24 : * @brief USART1 Initialization Function * @param None * @retval None */ static void MX_USART1_UART_Init(void) { 8002d24: b580 push {r7, lr} 8002d26: af00 add r7, sp, #0 /* USER CODE END USART1_Init 0 */ /* USER CODE BEGIN USART1_Init 1 */ /* USER CODE END USART1_Init 1 */ huart1.Instance = USART1; 8002d28: 4b14 ldr r3, [pc, #80] @ (8002d7c ) 8002d2a: 4a15 ldr r2, [pc, #84] @ (8002d80 ) 8002d2c: 601a str r2, [r3, #0] huart1.Init.BaudRate = 115200; 8002d2e: 4b13 ldr r3, [pc, #76] @ (8002d7c ) 8002d30: f44f 32e1 mov.w r2, #115200 @ 0x1c200 8002d34: 605a str r2, [r3, #4] huart1.Init.WordLength = UART_WORDLENGTH_8B; 8002d36: 4b11 ldr r3, [pc, #68] @ (8002d7c ) 8002d38: 2200 movs r2, #0 8002d3a: 609a str r2, [r3, #8] huart1.Init.StopBits = UART_STOPBITS_1; 8002d3c: 4b0f ldr r3, [pc, #60] @ (8002d7c ) 8002d3e: 2200 movs r2, #0 8002d40: 60da str r2, [r3, #12] huart1.Init.Parity = UART_PARITY_NONE; 8002d42: 4b0e ldr r3, [pc, #56] @ (8002d7c ) 8002d44: 2200 movs r2, #0 8002d46: 611a str r2, [r3, #16] huart1.Init.Mode = UART_MODE_TX_RX; 8002d48: 4b0c ldr r3, [pc, #48] @ (8002d7c ) 8002d4a: 220c movs r2, #12 8002d4c: 615a str r2, [r3, #20] huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE; 8002d4e: 4b0b ldr r3, [pc, #44] @ (8002d7c ) 8002d50: 2200 movs r2, #0 8002d52: 619a str r2, [r3, #24] huart1.Init.OverSampling = UART_OVERSAMPLING_16; 8002d54: 4b09 ldr r3, [pc, #36] @ (8002d7c ) 8002d56: 2200 movs r2, #0 8002d58: 61da str r2, [r3, #28] huart1.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; 8002d5a: 4b08 ldr r3, [pc, #32] @ (8002d7c ) 8002d5c: 2200 movs r2, #0 8002d5e: 621a str r2, [r3, #32] huart1.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT; 8002d60: 4b06 ldr r3, [pc, #24] @ (8002d7c ) 8002d62: 2200 movs r2, #0 8002d64: 625a str r2, [r3, #36] @ 0x24 if (HAL_UART_Init(&huart1) != HAL_OK) 8002d66: 4805 ldr r0, [pc, #20] @ (8002d7c ) 8002d68: f005 feb4 bl 8008ad4 8002d6c: 4603 mov r3, r0 8002d6e: 2b00 cmp r3, #0 8002d70: d001 beq.n 8002d76 { Error_Handler(); 8002d72: f000 fa29 bl 80031c8 } /* USER CODE BEGIN USART1_Init 2 */ /* USER CODE END USART1_Init 2 */ } 8002d76: bf00 nop 8002d78: bd80 pop {r7, pc} 8002d7a: bf00 nop 8002d7c: 20000c70 .word 0x20000c70 8002d80: 40013800 .word 0x40013800 08002d84 : * @brief USART3 Initialization Function * @param None * @retval None */ static void MX_USART3_UART_Init(void) { 8002d84: b580 push {r7, lr} 8002d86: af00 add r7, sp, #0 /* USER CODE END USART3_Init 0 */ /* USER CODE BEGIN USART3_Init 1 */ /* USER CODE END USART3_Init 1 */ huart3.Instance = USART3; 8002d88: 4b14 ldr r3, [pc, #80] @ (8002ddc ) 8002d8a: 4a15 ldr r2, [pc, #84] @ (8002de0 ) 8002d8c: 601a str r2, [r3, #0] huart3.Init.BaudRate = 115200; 8002d8e: 4b13 ldr r3, [pc, #76] @ (8002ddc ) 8002d90: f44f 32e1 mov.w r2, #115200 @ 0x1c200 8002d94: 605a str r2, [r3, #4] huart3.Init.WordLength = UART_WORDLENGTH_8B; 8002d96: 4b11 ldr r3, [pc, #68] @ (8002ddc ) 8002d98: 2200 movs r2, #0 8002d9a: 609a str r2, [r3, #8] huart3.Init.StopBits = UART_STOPBITS_1; 8002d9c: 4b0f ldr r3, [pc, #60] @ (8002ddc ) 8002d9e: 2200 movs r2, #0 8002da0: 60da str r2, [r3, #12] huart3.Init.Parity = UART_PARITY_NONE; 8002da2: 4b0e ldr r3, [pc, #56] @ (8002ddc ) 8002da4: 2200 movs r2, #0 8002da6: 611a str r2, [r3, #16] huart3.Init.Mode = UART_MODE_TX_RX; 8002da8: 4b0c ldr r3, [pc, #48] @ (8002ddc ) 8002daa: 220c movs r2, #12 8002dac: 615a str r2, [r3, #20] huart3.Init.HwFlowCtl = UART_HWCONTROL_NONE; 8002dae: 4b0b ldr r3, [pc, #44] @ (8002ddc ) 8002db0: 2200 movs r2, #0 8002db2: 619a str r2, [r3, #24] huart3.Init.OverSampling = UART_OVERSAMPLING_16; 8002db4: 4b09 ldr r3, [pc, #36] @ (8002ddc ) 8002db6: 2200 movs r2, #0 8002db8: 61da str r2, [r3, #28] huart3.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; 8002dba: 4b08 ldr r3, [pc, #32] @ (8002ddc ) 8002dbc: 2200 movs r2, #0 8002dbe: 621a str r2, [r3, #32] huart3.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT; 8002dc0: 4b06 ldr r3, [pc, #24] @ (8002ddc ) 8002dc2: 2200 movs r2, #0 8002dc4: 625a str r2, [r3, #36] @ 0x24 if (HAL_UART_Init(&huart3) != HAL_OK) 8002dc6: 4805 ldr r0, [pc, #20] @ (8002ddc ) 8002dc8: f005 fe84 bl 8008ad4 8002dcc: 4603 mov r3, r0 8002dce: 2b00 cmp r3, #0 8002dd0: d001 beq.n 8002dd6 { Error_Handler(); 8002dd2: f000 f9f9 bl 80031c8 } /* USER CODE BEGIN USART3_Init 2 */ /* USER CODE END USART3_Init 2 */ } 8002dd6: bf00 nop 8002dd8: bd80 pop {r7, pc} 8002dda: bf00 nop 8002ddc: 20000cf8 .word 0x20000cf8 8002de0: 40004800 .word 0x40004800 08002de4 : * @brief USB_OTG_FS Initialization Function * @param None * @retval None */ static void MX_USB_OTG_FS_PCD_Init(void) { 8002de4: b580 push {r7, lr} 8002de6: af00 add r7, sp, #0 /* USER CODE END USB_OTG_FS_Init 0 */ /* USER CODE BEGIN USB_OTG_FS_Init 1 */ /* USER CODE END USB_OTG_FS_Init 1 */ hpcd_USB_OTG_FS.Instance = USB_OTG_FS; 8002de8: 4b14 ldr r3, [pc, #80] @ (8002e3c ) 8002dea: f04f 42a0 mov.w r2, #1342177280 @ 0x50000000 8002dee: 601a str r2, [r3, #0] hpcd_USB_OTG_FS.Init.dev_endpoints = 6; 8002df0: 4b12 ldr r3, [pc, #72] @ (8002e3c ) 8002df2: 2206 movs r2, #6 8002df4: 711a strb r2, [r3, #4] hpcd_USB_OTG_FS.Init.speed = PCD_SPEED_FULL; 8002df6: 4b11 ldr r3, [pc, #68] @ (8002e3c ) 8002df8: 2202 movs r2, #2 8002dfa: 71da strb r2, [r3, #7] hpcd_USB_OTG_FS.Init.phy_itface = PCD_PHY_EMBEDDED; 8002dfc: 4b0f ldr r3, [pc, #60] @ (8002e3c ) 8002dfe: 2202 movs r2, #2 8002e00: 725a strb r2, [r3, #9] hpcd_USB_OTG_FS.Init.Sof_enable = DISABLE; 8002e02: 4b0e ldr r3, [pc, #56] @ (8002e3c ) 8002e04: 2200 movs r2, #0 8002e06: 729a strb r2, [r3, #10] hpcd_USB_OTG_FS.Init.low_power_enable = DISABLE; 8002e08: 4b0c ldr r3, [pc, #48] @ (8002e3c ) 8002e0a: 2200 movs r2, #0 8002e0c: 72da strb r2, [r3, #11] hpcd_USB_OTG_FS.Init.lpm_enable = DISABLE; 8002e0e: 4b0b ldr r3, [pc, #44] @ (8002e3c ) 8002e10: 2200 movs r2, #0 8002e12: 731a strb r2, [r3, #12] hpcd_USB_OTG_FS.Init.battery_charging_enable = DISABLE; 8002e14: 4b09 ldr r3, [pc, #36] @ (8002e3c ) 8002e16: 2200 movs r2, #0 8002e18: 735a strb r2, [r3, #13] hpcd_USB_OTG_FS.Init.use_dedicated_ep1 = DISABLE; 8002e1a: 4b08 ldr r3, [pc, #32] @ (8002e3c ) 8002e1c: 2200 movs r2, #0 8002e1e: 73da strb r2, [r3, #15] hpcd_USB_OTG_FS.Init.vbus_sensing_enable = DISABLE; 8002e20: 4b06 ldr r3, [pc, #24] @ (8002e3c ) 8002e22: 2200 movs r2, #0 8002e24: 739a strb r2, [r3, #14] if (HAL_PCD_Init(&hpcd_USB_OTG_FS) != HAL_OK) 8002e26: 4805 ldr r0, [pc, #20] @ (8002e3c ) 8002e28: f002 faeb bl 8005402 8002e2c: 4603 mov r3, r0 8002e2e: 2b00 cmp r3, #0 8002e30: d001 beq.n 8002e36 { Error_Handler(); 8002e32: f000 f9c9 bl 80031c8 } /* USER CODE BEGIN USB_OTG_FS_Init 2 */ /* USER CODE END USB_OTG_FS_Init 2 */ } 8002e36: bf00 nop 8002e38: bd80 pop {r7, pc} 8002e3a: bf00 nop 8002e3c: 20000d80 .word 0x20000d80 08002e40 : * @brief GPIO Initialization Function * @param None * @retval None */ static void MX_GPIO_Init(void) { 8002e40: b580 push {r7, lr} 8002e42: b08a sub sp, #40 @ 0x28 8002e44: af00 add r7, sp, #0 GPIO_InitTypeDef GPIO_InitStruct = {0}; 8002e46: f107 0314 add.w r3, r7, #20 8002e4a: 2200 movs r2, #0 8002e4c: 601a str r2, [r3, #0] 8002e4e: 605a str r2, [r3, #4] 8002e50: 609a str r2, [r3, #8] 8002e52: 60da str r2, [r3, #12] 8002e54: 611a str r2, [r3, #16] /* GPIO Ports Clock Enable */ __HAL_RCC_GPIOE_CLK_ENABLE(); 8002e56: 4bbd ldr r3, [pc, #756] @ (800314c ) 8002e58: 6cdb ldr r3, [r3, #76] @ 0x4c 8002e5a: 4abc ldr r2, [pc, #752] @ (800314c ) 8002e5c: f043 0310 orr.w r3, r3, #16 8002e60: 64d3 str r3, [r2, #76] @ 0x4c 8002e62: 4bba ldr r3, [pc, #744] @ (800314c ) 8002e64: 6cdb ldr r3, [r3, #76] @ 0x4c 8002e66: f003 0310 and.w r3, r3, #16 8002e6a: 613b str r3, [r7, #16] 8002e6c: 693b ldr r3, [r7, #16] __HAL_RCC_GPIOC_CLK_ENABLE(); 8002e6e: 4bb7 ldr r3, [pc, #732] @ (800314c ) 8002e70: 6cdb ldr r3, [r3, #76] @ 0x4c 8002e72: 4ab6 ldr r2, [pc, #728] @ (800314c ) 8002e74: f043 0304 orr.w r3, r3, #4 8002e78: 64d3 str r3, [r2, #76] @ 0x4c 8002e7a: 4bb4 ldr r3, [pc, #720] @ (800314c ) 8002e7c: 6cdb ldr r3, [r3, #76] @ 0x4c 8002e7e: f003 0304 and.w r3, r3, #4 8002e82: 60fb str r3, [r7, #12] 8002e84: 68fb ldr r3, [r7, #12] __HAL_RCC_GPIOA_CLK_ENABLE(); 8002e86: 4bb1 ldr r3, [pc, #708] @ (800314c ) 8002e88: 6cdb ldr r3, [r3, #76] @ 0x4c 8002e8a: 4ab0 ldr r2, [pc, #704] @ (800314c ) 8002e8c: f043 0301 orr.w r3, r3, #1 8002e90: 64d3 str r3, [r2, #76] @ 0x4c 8002e92: 4bae ldr r3, [pc, #696] @ (800314c ) 8002e94: 6cdb ldr r3, [r3, #76] @ 0x4c 8002e96: f003 0301 and.w r3, r3, #1 8002e9a: 60bb str r3, [r7, #8] 8002e9c: 68bb ldr r3, [r7, #8] __HAL_RCC_GPIOB_CLK_ENABLE(); 8002e9e: 4bab ldr r3, [pc, #684] @ (800314c ) 8002ea0: 6cdb ldr r3, [r3, #76] @ 0x4c 8002ea2: 4aaa ldr r2, [pc, #680] @ (800314c ) 8002ea4: f043 0302 orr.w r3, r3, #2 8002ea8: 64d3 str r3, [r2, #76] @ 0x4c 8002eaa: 4ba8 ldr r3, [pc, #672] @ (800314c ) 8002eac: 6cdb ldr r3, [r3, #76] @ 0x4c 8002eae: f003 0302 and.w r3, r3, #2 8002eb2: 607b str r3, [r7, #4] 8002eb4: 687b ldr r3, [r7, #4] __HAL_RCC_GPIOD_CLK_ENABLE(); 8002eb6: 4ba5 ldr r3, [pc, #660] @ (800314c ) 8002eb8: 6cdb ldr r3, [r3, #76] @ 0x4c 8002eba: 4aa4 ldr r2, [pc, #656] @ (800314c ) 8002ebc: f043 0308 orr.w r3, r3, #8 8002ec0: 64d3 str r3, [r2, #76] @ 0x4c 8002ec2: 4ba2 ldr r3, [pc, #648] @ (800314c ) 8002ec4: 6cdb ldr r3, [r3, #76] @ 0x4c 8002ec6: f003 0308 and.w r3, r3, #8 8002eca: 603b str r3, [r7, #0] 8002ecc: 683b ldr r3, [r7, #0] /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOE, M24SR64_Y_RF_DISABLE_Pin|M24SR64_Y_GPO_Pin|ISM43362_RST_Pin, GPIO_PIN_RESET); 8002ece: 2200 movs r2, #0 8002ed0: f44f 718a mov.w r1, #276 @ 0x114 8002ed4: 489e ldr r0, [pc, #632] @ (8003150 ) 8002ed6: f001 fc13 bl 8004700 /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOA, ARD_D10_Pin|SPBTLE_RF_RST_Pin|ARD_D9_Pin, GPIO_PIN_RESET); 8002eda: 2200 movs r2, #0 8002edc: f248 1104 movw r1, #33028 @ 0x8104 8002ee0: f04f 4090 mov.w r0, #1207959552 @ 0x48000000 8002ee4: f001 fc0c bl 8004700 /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOB, ARD_D8_Pin|ISM43362_BOOT0_Pin|ISM43362_WAKEUP_Pin|LED2_Pin 8002ee8: 2200 movs r2, #0 8002eea: f24f 0114 movw r1, #61460 @ 0xf014 8002eee: 4899 ldr r0, [pc, #612] @ (8003154 ) 8002ef0: f001 fc06 bl 8004700 |SPSGRF_915_SDN_Pin|ARD_D5_Pin, GPIO_PIN_RESET); /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOD, USB_OTG_FS_PWR_EN_Pin|PMOD_RESET_Pin|STSAFE_A100_RESET_Pin, GPIO_PIN_RESET); 8002ef4: 2200 movs r2, #0 8002ef6: f241 0181 movw r1, #4225 @ 0x1081 8002efa: 4897 ldr r0, [pc, #604] @ (8003158 ) 8002efc: f001 fc00 bl 8004700 /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(SPBTLE_RF_SPI3_CSN_GPIO_Port, SPBTLE_RF_SPI3_CSN_Pin, GPIO_PIN_SET); 8002f00: 2201 movs r2, #1 8002f02: f44f 5100 mov.w r1, #8192 @ 0x2000 8002f06: 4894 ldr r0, [pc, #592] @ (8003158 ) 8002f08: f001 fbfa bl 8004700 /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOC, VL53L0X_XSHUT_Pin|LED3_WIFI__LED4_BLE_Pin, GPIO_PIN_RESET); 8002f0c: 2200 movs r2, #0 8002f0e: f44f 7110 mov.w r1, #576 @ 0x240 8002f12: 4892 ldr r0, [pc, #584] @ (800315c ) 8002f14: f001 fbf4 bl 8004700 /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(SPSGRF_915_SPI3_CSN_GPIO_Port, SPSGRF_915_SPI3_CSN_Pin, GPIO_PIN_SET); 8002f18: 2201 movs r2, #1 8002f1a: 2120 movs r1, #32 8002f1c: 488d ldr r0, [pc, #564] @ (8003154 ) 8002f1e: f001 fbef bl 8004700 /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(ISM43362_SPI3_CSN_GPIO_Port, ISM43362_SPI3_CSN_Pin, GPIO_PIN_SET); 8002f22: 2201 movs r2, #1 8002f24: 2101 movs r1, #1 8002f26: 488a ldr r0, [pc, #552] @ (8003150 ) 8002f28: f001 fbea bl 8004700 /*Configure GPIO pins : M24SR64_Y_RF_DISABLE_Pin M24SR64_Y_GPO_Pin ISM43362_RST_Pin ISM43362_SPI3_CSN_Pin */ GPIO_InitStruct.Pin = M24SR64_Y_RF_DISABLE_Pin|M24SR64_Y_GPO_Pin|ISM43362_RST_Pin|ISM43362_SPI3_CSN_Pin; 8002f2c: f240 1315 movw r3, #277 @ 0x115 8002f30: 617b str r3, [r7, #20] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 8002f32: 2301 movs r3, #1 8002f34: 61bb str r3, [r7, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; 8002f36: 2300 movs r3, #0 8002f38: 61fb str r3, [r7, #28] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8002f3a: 2300 movs r3, #0 8002f3c: 623b str r3, [r7, #32] HAL_GPIO_Init(GPIOE, &GPIO_InitStruct); 8002f3e: f107 0314 add.w r3, r7, #20 8002f42: 4619 mov r1, r3 8002f44: 4882 ldr r0, [pc, #520] @ (8003150 ) 8002f46: f001 f925 bl 8004194 /*Configure GPIO pins : USB_OTG_FS_OVRCR_EXTI3_Pin SPSGRF_915_GPIO3_EXTI5_Pin SPBTLE_RF_IRQ_EXTI6_Pin ISM43362_DRDY_EXTI1_Pin */ GPIO_InitStruct.Pin = USB_OTG_FS_OVRCR_EXTI3_Pin|SPSGRF_915_GPIO3_EXTI5_Pin|SPBTLE_RF_IRQ_EXTI6_Pin|ISM43362_DRDY_EXTI1_Pin; 8002f4a: 236a movs r3, #106 @ 0x6a 8002f4c: 617b str r3, [r7, #20] GPIO_InitStruct.Mode = GPIO_MODE_IT_RISING; 8002f4e: f44f 1388 mov.w r3, #1114112 @ 0x110000 8002f52: 61bb str r3, [r7, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; 8002f54: 2300 movs r3, #0 8002f56: 61fb str r3, [r7, #28] HAL_GPIO_Init(GPIOE, &GPIO_InitStruct); 8002f58: f107 0314 add.w r3, r7, #20 8002f5c: 4619 mov r1, r3 8002f5e: 487c ldr r0, [pc, #496] @ (8003150 ) 8002f60: f001 f918 bl 8004194 /*Configure GPIO pin : BUTTON_EXTI13_Pin */ GPIO_InitStruct.Pin = BUTTON_EXTI13_Pin; 8002f64: f44f 5300 mov.w r3, #8192 @ 0x2000 8002f68: 617b str r3, [r7, #20] GPIO_InitStruct.Mode = GPIO_MODE_IT_FALLING; 8002f6a: f44f 1304 mov.w r3, #2162688 @ 0x210000 8002f6e: 61bb str r3, [r7, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; 8002f70: 2300 movs r3, #0 8002f72: 61fb str r3, [r7, #28] HAL_GPIO_Init(BUTTON_EXTI13_GPIO_Port, &GPIO_InitStruct); 8002f74: f107 0314 add.w r3, r7, #20 8002f78: 4619 mov r1, r3 8002f7a: 4878 ldr r0, [pc, #480] @ (800315c ) 8002f7c: f001 f90a bl 8004194 /*Configure GPIO pins : ARD_A5_Pin ARD_A4_Pin ARD_A3_Pin ARD_A2_Pin ARD_A1_Pin ARD_A0_Pin */ GPIO_InitStruct.Pin = ARD_A5_Pin|ARD_A4_Pin|ARD_A3_Pin|ARD_A2_Pin 8002f80: 233f movs r3, #63 @ 0x3f 8002f82: 617b str r3, [r7, #20] |ARD_A1_Pin|ARD_A0_Pin; GPIO_InitStruct.Mode = GPIO_MODE_ANALOG_ADC_CONTROL; 8002f84: 230b movs r3, #11 8002f86: 61bb str r3, [r7, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; 8002f88: 2300 movs r3, #0 8002f8a: 61fb str r3, [r7, #28] HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 8002f8c: f107 0314 add.w r3, r7, #20 8002f90: 4619 mov r1, r3 8002f92: 4872 ldr r0, [pc, #456] @ (800315c ) 8002f94: f001 f8fe bl 8004194 /*Configure GPIO pins : ARD_D1_Pin ARD_D0_Pin */ GPIO_InitStruct.Pin = ARD_D1_Pin|ARD_D0_Pin; 8002f98: 2303 movs r3, #3 8002f9a: 617b str r3, [r7, #20] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 8002f9c: 2302 movs r3, #2 8002f9e: 61bb str r3, [r7, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; 8002fa0: 2300 movs r3, #0 8002fa2: 61fb str r3, [r7, #28] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; 8002fa4: 2303 movs r3, #3 8002fa6: 623b str r3, [r7, #32] GPIO_InitStruct.Alternate = GPIO_AF8_UART4; 8002fa8: 2308 movs r3, #8 8002faa: 627b str r3, [r7, #36] @ 0x24 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8002fac: f107 0314 add.w r3, r7, #20 8002fb0: 4619 mov r1, r3 8002fb2: f04f 4090 mov.w r0, #1207959552 @ 0x48000000 8002fb6: f001 f8ed bl 8004194 /*Configure GPIO pins : ARD_D10_Pin SPBTLE_RF_RST_Pin ARD_D9_Pin */ GPIO_InitStruct.Pin = ARD_D10_Pin|SPBTLE_RF_RST_Pin|ARD_D9_Pin; 8002fba: f248 1304 movw r3, #33028 @ 0x8104 8002fbe: 617b str r3, [r7, #20] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 8002fc0: 2301 movs r3, #1 8002fc2: 61bb str r3, [r7, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; 8002fc4: 2300 movs r3, #0 8002fc6: 61fb str r3, [r7, #28] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8002fc8: 2300 movs r3, #0 8002fca: 623b str r3, [r7, #32] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8002fcc: f107 0314 add.w r3, r7, #20 8002fd0: 4619 mov r1, r3 8002fd2: f04f 4090 mov.w r0, #1207959552 @ 0x48000000 8002fd6: f001 f8dd bl 8004194 /*Configure GPIO pin : ARD_D4_Pin */ GPIO_InitStruct.Pin = ARD_D4_Pin; 8002fda: 2308 movs r3, #8 8002fdc: 617b str r3, [r7, #20] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 8002fde: 2302 movs r3, #2 8002fe0: 61bb str r3, [r7, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; 8002fe2: 2300 movs r3, #0 8002fe4: 61fb str r3, [r7, #28] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8002fe6: 2300 movs r3, #0 8002fe8: 623b str r3, [r7, #32] GPIO_InitStruct.Alternate = GPIO_AF1_TIM2; 8002fea: 2301 movs r3, #1 8002fec: 627b str r3, [r7, #36] @ 0x24 HAL_GPIO_Init(ARD_D4_GPIO_Port, &GPIO_InitStruct); 8002fee: f107 0314 add.w r3, r7, #20 8002ff2: 4619 mov r1, r3 8002ff4: f04f 4090 mov.w r0, #1207959552 @ 0x48000000 8002ff8: f001 f8cc bl 8004194 /*Configure GPIO pin : ARD_D7_Pin */ GPIO_InitStruct.Pin = ARD_D7_Pin; 8002ffc: 2310 movs r3, #16 8002ffe: 617b str r3, [r7, #20] GPIO_InitStruct.Mode = GPIO_MODE_ANALOG_ADC_CONTROL; 8003000: 230b movs r3, #11 8003002: 61bb str r3, [r7, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; 8003004: 2300 movs r3, #0 8003006: 61fb str r3, [r7, #28] HAL_GPIO_Init(ARD_D7_GPIO_Port, &GPIO_InitStruct); 8003008: f107 0314 add.w r3, r7, #20 800300c: 4619 mov r1, r3 800300e: f04f 4090 mov.w r0, #1207959552 @ 0x48000000 8003012: f001 f8bf bl 8004194 /*Configure GPIO pins : ARD_D13_Pin ARD_D12_Pin ARD_D11_Pin */ GPIO_InitStruct.Pin = ARD_D13_Pin|ARD_D12_Pin|ARD_D11_Pin; 8003016: 23e0 movs r3, #224 @ 0xe0 8003018: 617b str r3, [r7, #20] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 800301a: 2302 movs r3, #2 800301c: 61bb str r3, [r7, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; 800301e: 2300 movs r3, #0 8003020: 61fb str r3, [r7, #28] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; 8003022: 2303 movs r3, #3 8003024: 623b str r3, [r7, #32] GPIO_InitStruct.Alternate = GPIO_AF5_SPI1; 8003026: 2305 movs r3, #5 8003028: 627b str r3, [r7, #36] @ 0x24 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 800302a: f107 0314 add.w r3, r7, #20 800302e: 4619 mov r1, r3 8003030: f04f 4090 mov.w r0, #1207959552 @ 0x48000000 8003034: f001 f8ae bl 8004194 /*Configure GPIO pin : ARD_D3_Pin */ GPIO_InitStruct.Pin = ARD_D3_Pin; 8003038: 2301 movs r3, #1 800303a: 617b str r3, [r7, #20] GPIO_InitStruct.Mode = GPIO_MODE_IT_RISING; 800303c: f44f 1388 mov.w r3, #1114112 @ 0x110000 8003040: 61bb str r3, [r7, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; 8003042: 2300 movs r3, #0 8003044: 61fb str r3, [r7, #28] HAL_GPIO_Init(ARD_D3_GPIO_Port, &GPIO_InitStruct); 8003046: f107 0314 add.w r3, r7, #20 800304a: 4619 mov r1, r3 800304c: 4841 ldr r0, [pc, #260] @ (8003154 ) 800304e: f001 f8a1 bl 8004194 /*Configure GPIO pin : ARD_D6_Pin */ GPIO_InitStruct.Pin = ARD_D6_Pin; 8003052: 2302 movs r3, #2 8003054: 617b str r3, [r7, #20] GPIO_InitStruct.Mode = GPIO_MODE_ANALOG_ADC_CONTROL; 8003056: 230b movs r3, #11 8003058: 61bb str r3, [r7, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; 800305a: 2300 movs r3, #0 800305c: 61fb str r3, [r7, #28] HAL_GPIO_Init(ARD_D6_GPIO_Port, &GPIO_InitStruct); 800305e: f107 0314 add.w r3, r7, #20 8003062: 4619 mov r1, r3 8003064: 483b ldr r0, [pc, #236] @ (8003154 ) 8003066: f001 f895 bl 8004194 /*Configure GPIO pins : ARD_D8_Pin ISM43362_BOOT0_Pin ISM43362_WAKEUP_Pin LED2_Pin SPSGRF_915_SDN_Pin ARD_D5_Pin SPSGRF_915_SPI3_CSN_Pin */ GPIO_InitStruct.Pin = ARD_D8_Pin|ISM43362_BOOT0_Pin|ISM43362_WAKEUP_Pin|LED2_Pin 800306a: f24f 0334 movw r3, #61492 @ 0xf034 800306e: 617b str r3, [r7, #20] |SPSGRF_915_SDN_Pin|ARD_D5_Pin|SPSGRF_915_SPI3_CSN_Pin; GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 8003070: 2301 movs r3, #1 8003072: 61bb str r3, [r7, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; 8003074: 2300 movs r3, #0 8003076: 61fb str r3, [r7, #28] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8003078: 2300 movs r3, #0 800307a: 623b str r3, [r7, #32] HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 800307c: f107 0314 add.w r3, r7, #20 8003080: 4619 mov r1, r3 8003082: 4834 ldr r0, [pc, #208] @ (8003154 ) 8003084: f001 f886 bl 8004194 /*Configure GPIO pins : LPS22HB_INT_DRDY_EXTI0_Pin LSM6DSL_INT1_EXTI11_Pin ARD_D2_Pin HTS221_DRDY_EXTI15_Pin PMOD_IRQ_EXTI12_Pin */ GPIO_InitStruct.Pin = LPS22HB_INT_DRDY_EXTI0_Pin|LSM6DSL_INT1_EXTI11_Pin|ARD_D2_Pin|HTS221_DRDY_EXTI15_Pin 8003088: f64c 4304 movw r3, #52228 @ 0xcc04 800308c: 617b str r3, [r7, #20] |PMOD_IRQ_EXTI12_Pin; GPIO_InitStruct.Mode = GPIO_MODE_IT_RISING; 800308e: f44f 1388 mov.w r3, #1114112 @ 0x110000 8003092: 61bb str r3, [r7, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; 8003094: 2300 movs r3, #0 8003096: 61fb str r3, [r7, #28] HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); 8003098: f107 0314 add.w r3, r7, #20 800309c: 4619 mov r1, r3 800309e: 482e ldr r0, [pc, #184] @ (8003158 ) 80030a0: f001 f878 bl 8004194 /*Configure GPIO pins : USB_OTG_FS_PWR_EN_Pin SPBTLE_RF_SPI3_CSN_Pin PMOD_RESET_Pin STSAFE_A100_RESET_Pin */ GPIO_InitStruct.Pin = USB_OTG_FS_PWR_EN_Pin|SPBTLE_RF_SPI3_CSN_Pin|PMOD_RESET_Pin|STSAFE_A100_RESET_Pin; 80030a4: f243 0381 movw r3, #12417 @ 0x3081 80030a8: 617b str r3, [r7, #20] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 80030aa: 2301 movs r3, #1 80030ac: 61bb str r3, [r7, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; 80030ae: 2300 movs r3, #0 80030b0: 61fb str r3, [r7, #28] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 80030b2: 2300 movs r3, #0 80030b4: 623b str r3, [r7, #32] HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); 80030b6: f107 0314 add.w r3, r7, #20 80030ba: 4619 mov r1, r3 80030bc: 4826 ldr r0, [pc, #152] @ (8003158 ) 80030be: f001 f869 bl 8004194 /*Configure GPIO pins : VL53L0X_XSHUT_Pin LED3_WIFI__LED4_BLE_Pin */ GPIO_InitStruct.Pin = VL53L0X_XSHUT_Pin|LED3_WIFI__LED4_BLE_Pin; 80030c2: f44f 7310 mov.w r3, #576 @ 0x240 80030c6: 617b str r3, [r7, #20] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 80030c8: 2301 movs r3, #1 80030ca: 61bb str r3, [r7, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; 80030cc: 2300 movs r3, #0 80030ce: 61fb str r3, [r7, #28] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 80030d0: 2300 movs r3, #0 80030d2: 623b str r3, [r7, #32] HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 80030d4: f107 0314 add.w r3, r7, #20 80030d8: 4619 mov r1, r3 80030da: 4820 ldr r0, [pc, #128] @ (800315c ) 80030dc: f001 f85a bl 8004194 /*Configure GPIO pins : VL53L0X_GPIO1_EXTI7_Pin LSM3MDL_DRDY_EXTI8_Pin */ GPIO_InitStruct.Pin = VL53L0X_GPIO1_EXTI7_Pin|LSM3MDL_DRDY_EXTI8_Pin; 80030e0: f44f 73c0 mov.w r3, #384 @ 0x180 80030e4: 617b str r3, [r7, #20] GPIO_InitStruct.Mode = GPIO_MODE_IT_RISING; 80030e6: f44f 1388 mov.w r3, #1114112 @ 0x110000 80030ea: 61bb str r3, [r7, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; 80030ec: 2300 movs r3, #0 80030ee: 61fb str r3, [r7, #28] HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 80030f0: f107 0314 add.w r3, r7, #20 80030f4: 4619 mov r1, r3 80030f6: 4819 ldr r0, [pc, #100] @ (800315c ) 80030f8: f001 f84c bl 8004194 /*Configure GPIO pin : PMOD_SPI2_SCK_Pin */ GPIO_InitStruct.Pin = PMOD_SPI2_SCK_Pin; 80030fc: 2302 movs r3, #2 80030fe: 617b str r3, [r7, #20] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 8003100: 2302 movs r3, #2 8003102: 61bb str r3, [r7, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; 8003104: 2300 movs r3, #0 8003106: 61fb str r3, [r7, #28] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; 8003108: 2303 movs r3, #3 800310a: 623b str r3, [r7, #32] GPIO_InitStruct.Alternate = GPIO_AF5_SPI2; 800310c: 2305 movs r3, #5 800310e: 627b str r3, [r7, #36] @ 0x24 HAL_GPIO_Init(PMOD_SPI2_SCK_GPIO_Port, &GPIO_InitStruct); 8003110: f107 0314 add.w r3, r7, #20 8003114: 4619 mov r1, r3 8003116: 4810 ldr r0, [pc, #64] @ (8003158 ) 8003118: f001 f83c bl 8004194 /*Configure GPIO pins : PMOD_UART2_CTS_Pin PMOD_UART2_RTS_Pin PMOD_UART2_TX_Pin PMOD_UART2_RX_Pin */ GPIO_InitStruct.Pin = PMOD_UART2_CTS_Pin|PMOD_UART2_RTS_Pin|PMOD_UART2_TX_Pin|PMOD_UART2_RX_Pin; 800311c: 2378 movs r3, #120 @ 0x78 800311e: 617b str r3, [r7, #20] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 8003120: 2302 movs r3, #2 8003122: 61bb str r3, [r7, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; 8003124: 2300 movs r3, #0 8003126: 61fb str r3, [r7, #28] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; 8003128: 2303 movs r3, #3 800312a: 623b str r3, [r7, #32] GPIO_InitStruct.Alternate = GPIO_AF7_USART2; 800312c: 2307 movs r3, #7 800312e: 627b str r3, [r7, #36] @ 0x24 HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); 8003130: f107 0314 add.w r3, r7, #20 8003134: 4619 mov r1, r3 8003136: 4808 ldr r0, [pc, #32] @ (8003158 ) 8003138: f001 f82c bl 8004194 /*Configure GPIO pins : ARD_D15_Pin ARD_D14_Pin */ GPIO_InitStruct.Pin = ARD_D15_Pin|ARD_D14_Pin; 800313c: f44f 7340 mov.w r3, #768 @ 0x300 8003140: 617b str r3, [r7, #20] GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; 8003142: 2312 movs r3, #18 8003144: 61bb str r3, [r7, #24] GPIO_InitStruct.Pull = GPIO_PULLUP; 8003146: 2301 movs r3, #1 8003148: e00a b.n 8003160 800314a: bf00 nop 800314c: 40021000 .word 0x40021000 8003150: 48001000 .word 0x48001000 8003154: 48000400 .word 0x48000400 8003158: 48000c00 .word 0x48000c00 800315c: 48000800 .word 0x48000800 8003160: 61fb str r3, [r7, #28] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; 8003162: 2303 movs r3, #3 8003164: 623b str r3, [r7, #32] GPIO_InitStruct.Alternate = GPIO_AF4_I2C1; 8003166: 2304 movs r3, #4 8003168: 627b str r3, [r7, #36] @ 0x24 HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 800316a: f107 0314 add.w r3, r7, #20 800316e: 4619 mov r1, r3 8003170: 480b ldr r0, [pc, #44] @ (80031a0 ) 8003172: f001 f80f bl 8004194 /* EXTI interrupt init*/ HAL_NVIC_SetPriority(EXTI9_5_IRQn, 5, 0); 8003176: 2200 movs r2, #0 8003178: 2105 movs r1, #5 800317a: 2017 movs r0, #23 800317c: f000 fe54 bl 8003e28 HAL_NVIC_EnableIRQ(EXTI9_5_IRQn); 8003180: 2017 movs r0, #23 8003182: f000 fe6d bl 8003e60 HAL_NVIC_SetPriority(EXTI15_10_IRQn, 5, 0); 8003186: 2200 movs r2, #0 8003188: 2105 movs r1, #5 800318a: 2028 movs r0, #40 @ 0x28 800318c: f000 fe4c bl 8003e28 HAL_NVIC_EnableIRQ(EXTI15_10_IRQn); 8003190: 2028 movs r0, #40 @ 0x28 8003192: f000 fe65 bl 8003e60 } 8003196: bf00 nop 8003198: 3728 adds r7, #40 @ 0x28 800319a: 46bd mov sp, r7 800319c: bd80 pop {r7, pc} 800319e: bf00 nop 80031a0: 48000400 .word 0x48000400 080031a4 : * a global variable "uwTick" used as application time base. * @param htim : TIM handle * @retval None */ void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim) { 80031a4: b580 push {r7, lr} 80031a6: b082 sub sp, #8 80031a8: af00 add r7, sp, #0 80031aa: 6078 str r0, [r7, #4] /* USER CODE BEGIN Callback 0 */ /* USER CODE END Callback 0 */ if (htim->Instance == TIM17) { 80031ac: 687b ldr r3, [r7, #4] 80031ae: 681b ldr r3, [r3, #0] 80031b0: 4a04 ldr r2, [pc, #16] @ (80031c4 ) 80031b2: 4293 cmp r3, r2 80031b4: d101 bne.n 80031ba HAL_IncTick(); 80031b6: f000 fd3b bl 8003c30 } /* USER CODE BEGIN Callback 1 */ /* USER CODE END Callback 1 */ } 80031ba: bf00 nop 80031bc: 3708 adds r7, #8 80031be: 46bd mov sp, r7 80031c0: bd80 pop {r7, pc} 80031c2: bf00 nop 80031c4: 40014800 .word 0x40014800 080031c8 : /** * @brief This function is executed in case of error occurrence. * @retval None */ void Error_Handler(void) { 80031c8: b480 push {r7} 80031ca: af00 add r7, sp, #0 /* USER CODE BEGIN Error_Handler_Debug */ /* User can add his own implementation to report the HAL error return state */ /* USER CODE END Error_Handler_Debug */ } 80031cc: bf00 nop 80031ce: 46bd mov sp, r7 80031d0: f85d 7b04 ldr.w r7, [sp], #4 80031d4: 4770 bx lr ... 080031d8 : extern UART_HandleTypeDef huart1; extern SemaphoreHandle_t xSemaphore; void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart) { 80031d8: b580 push {r7, lr} 80031da: b082 sub sp, #8 80031dc: af00 add r7, sp, #0 80031de: 6078 str r0, [r7, #4] static signed long xHigherPriorityTaskWoken = pdFALSE; xSemaphoreGiveFromISR(xSemaphore, xHigherPriorityTaskWoken); 80031e0: 4b0b ldr r3, [pc, #44] @ (8003210 ) 80031e2: 681b ldr r3, [r3, #0] 80031e4: 4a0b ldr r2, [pc, #44] @ (8003214 ) 80031e6: 6812 ldr r2, [r2, #0] 80031e8: 4611 mov r1, r2 80031ea: 4618 mov r0, r3 80031ec: f009 fbfe bl 800c9ec portYIELD_FROM_ISR(xHigherPriorityTaskWoken); 80031f0: 4b08 ldr r3, [pc, #32] @ (8003214 ) 80031f2: 681b ldr r3, [r3, #0] 80031f4: 2b00 cmp r3, #0 80031f6: d007 beq.n 8003208 80031f8: 4b07 ldr r3, [pc, #28] @ (8003218 ) 80031fa: f04f 5280 mov.w r2, #268435456 @ 0x10000000 80031fe: 601a str r2, [r3, #0] 8003200: f3bf 8f4f dsb sy 8003204: f3bf 8f6f isb sy } 8003208: bf00 nop 800320a: 3708 adds r7, #8 800320c: 46bd mov sp, r7 800320e: bd80 pop {r7, pc} 8003210: 20000328 .word 0x20000328 8003214: 20001264 .word 0x20001264 8003218: e000ed04 .word 0xe000ed04 0800321c <__io_putchar>: int __io_putchar(int ch) { 800321c: b580 push {r7, lr} 800321e: b084 sub sp, #16 8003220: af00 add r7, sp, #0 8003222: 6078 str r0, [r7, #4] BaseType_t status = xSemaphoreTake(xSemaphore, 0xffff); 8003224: 4b09 ldr r3, [pc, #36] @ (800324c <__io_putchar+0x30>) 8003226: 681b ldr r3, [r3, #0] 8003228: f64f 71ff movw r1, #65535 @ 0xffff 800322c: 4618 mov r0, r3 800322e: f009 fd4f bl 800ccd0 8003232: 60f8 str r0, [r7, #12] HAL_UART_Transmit_IT(&huart1, (uint8_t*) &ch, 1); 8003234: 1d3b adds r3, r7, #4 8003236: 2201 movs r2, #1 8003238: 4619 mov r1, r3 800323a: 4805 ldr r0, [pc, #20] @ (8003250 <__io_putchar+0x34>) 800323c: f005 fd62 bl 8008d04 //while(HAL_OK != HAL_UART_Transmit(&huart1, (uint8_t*)&ch, 1, 30000)) //{ // ; //} return ch; 8003240: 687b ldr r3, [r7, #4] } 8003242: 4618 mov r0, r3 8003244: 3710 adds r7, #16 8003246: 46bd mov sp, r7 8003248: bd80 pop {r7, pc} 800324a: bf00 nop 800324c: 20000328 .word 0x20000328 8003250: 20000c70 .word 0x20000c70 08003254 <__io_getchar>: portYIELD_FROM_ISR(xHigherPriorityTaskWoken); } int __io_getchar(void) { 8003254: b580 push {r7, lr} 8003256: b082 sub sp, #8 8003258: af00 add r7, sp, #0 uint8_t ch = 0; 800325a: 2300 movs r3, #0 800325c: 71fb strb r3, [r7, #7] //while(HAL_OK != HAL_UART_Receive(&huart1, &ch, 1, 30000)) //{ // ; //} HAL_UART_Receive(&huart1, &ch, 1, 0); 800325e: 1df9 adds r1, r7, #7 8003260: 2300 movs r3, #0 8003262: 2201 movs r2, #1 8003264: 4803 ldr r0, [pc, #12] @ (8003274 <__io_getchar+0x20>) 8003266: f005 fc83 bl 8008b70 return ch; 800326a: 79fb ldrb r3, [r7, #7] } 800326c: 4618 mov r0, r3 800326e: 3708 adds r7, #8 8003270: 46bd mov sp, r7 8003272: bd80 pop {r7, pc} 8003274: 20000c70 .word 0x20000c70 08003278 : /* USER CODE END 0 */ /** * Initializes the Global MSP. */ void HAL_MspInit(void) { 8003278: b580 push {r7, lr} 800327a: b082 sub sp, #8 800327c: af00 add r7, sp, #0 /* USER CODE BEGIN MspInit 0 */ /* USER CODE END MspInit 0 */ __HAL_RCC_SYSCFG_CLK_ENABLE(); 800327e: 4b11 ldr r3, [pc, #68] @ (80032c4 ) 8003280: 6e1b ldr r3, [r3, #96] @ 0x60 8003282: 4a10 ldr r2, [pc, #64] @ (80032c4 ) 8003284: f043 0301 orr.w r3, r3, #1 8003288: 6613 str r3, [r2, #96] @ 0x60 800328a: 4b0e ldr r3, [pc, #56] @ (80032c4 ) 800328c: 6e1b ldr r3, [r3, #96] @ 0x60 800328e: f003 0301 and.w r3, r3, #1 8003292: 607b str r3, [r7, #4] 8003294: 687b ldr r3, [r7, #4] __HAL_RCC_PWR_CLK_ENABLE(); 8003296: 4b0b ldr r3, [pc, #44] @ (80032c4 ) 8003298: 6d9b ldr r3, [r3, #88] @ 0x58 800329a: 4a0a ldr r2, [pc, #40] @ (80032c4 ) 800329c: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 80032a0: 6593 str r3, [r2, #88] @ 0x58 80032a2: 4b08 ldr r3, [pc, #32] @ (80032c4 ) 80032a4: 6d9b ldr r3, [r3, #88] @ 0x58 80032a6: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 80032aa: 603b str r3, [r7, #0] 80032ac: 683b ldr r3, [r7, #0] /* System interrupt init*/ /* PendSV_IRQn interrupt configuration */ HAL_NVIC_SetPriority(PendSV_IRQn, 15, 0); 80032ae: 2200 movs r2, #0 80032b0: 210f movs r1, #15 80032b2: f06f 0001 mvn.w r0, #1 80032b6: f000 fdb7 bl 8003e28 /* USER CODE BEGIN MspInit 1 */ /* USER CODE END MspInit 1 */ } 80032ba: bf00 nop 80032bc: 3708 adds r7, #8 80032be: 46bd mov sp, r7 80032c0: bd80 pop {r7, pc} 80032c2: bf00 nop 80032c4: 40021000 .word 0x40021000 080032c8 : * This function configures the hardware resources used in this example * @param hdfsdm_channel: DFSDM_Channel handle pointer * @retval None */ void HAL_DFSDM_ChannelMspInit(DFSDM_Channel_HandleTypeDef* hdfsdm_channel) { 80032c8: b580 push {r7, lr} 80032ca: b0ac sub sp, #176 @ 0xb0 80032cc: af00 add r7, sp, #0 80032ce: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; 80032d0: f107 039c add.w r3, r7, #156 @ 0x9c 80032d4: 2200 movs r2, #0 80032d6: 601a str r2, [r3, #0] 80032d8: 605a str r2, [r3, #4] 80032da: 609a str r2, [r3, #8] 80032dc: 60da str r2, [r3, #12] 80032de: 611a str r2, [r3, #16] RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; 80032e0: f107 0314 add.w r3, r7, #20 80032e4: 2288 movs r2, #136 @ 0x88 80032e6: 2100 movs r1, #0 80032e8: 4618 mov r0, r3 80032ea: f00d f901 bl 80104f0 if(DFSDM1_Init == 0) 80032ee: 4b25 ldr r3, [pc, #148] @ (8003384 ) 80032f0: 681b ldr r3, [r3, #0] 80032f2: 2b00 cmp r3, #0 80032f4: d142 bne.n 800337c /* USER CODE END DFSDM1_MspInit 0 */ /** Initializes the peripherals clock */ PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_DFSDM1; 80032f6: f44f 3380 mov.w r3, #65536 @ 0x10000 80032fa: 617b str r3, [r7, #20] PeriphClkInit.Dfsdm1ClockSelection = RCC_DFSDM1CLKSOURCE_PCLK; 80032fc: 2300 movs r3, #0 80032fe: f8c7 3094 str.w r3, [r7, #148] @ 0x94 if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) 8003302: f107 0314 add.w r3, r7, #20 8003306: 4618 mov r0, r3 8003308: f003 f920 bl 800654c 800330c: 4603 mov r3, r0 800330e: 2b00 cmp r3, #0 8003310: d001 beq.n 8003316 { Error_Handler(); 8003312: f7ff ff59 bl 80031c8 } /* Peripheral clock enable */ __HAL_RCC_DFSDM1_CLK_ENABLE(); 8003316: 4b1c ldr r3, [pc, #112] @ (8003388 ) 8003318: 6e1b ldr r3, [r3, #96] @ 0x60 800331a: 4a1b ldr r2, [pc, #108] @ (8003388 ) 800331c: f043 7380 orr.w r3, r3, #16777216 @ 0x1000000 8003320: 6613 str r3, [r2, #96] @ 0x60 8003322: 4b19 ldr r3, [pc, #100] @ (8003388 ) 8003324: 6e1b ldr r3, [r3, #96] @ 0x60 8003326: f003 7380 and.w r3, r3, #16777216 @ 0x1000000 800332a: 613b str r3, [r7, #16] 800332c: 693b ldr r3, [r7, #16] __HAL_RCC_GPIOE_CLK_ENABLE(); 800332e: 4b16 ldr r3, [pc, #88] @ (8003388 ) 8003330: 6cdb ldr r3, [r3, #76] @ 0x4c 8003332: 4a15 ldr r2, [pc, #84] @ (8003388 ) 8003334: f043 0310 orr.w r3, r3, #16 8003338: 64d3 str r3, [r2, #76] @ 0x4c 800333a: 4b13 ldr r3, [pc, #76] @ (8003388 ) 800333c: 6cdb ldr r3, [r3, #76] @ 0x4c 800333e: f003 0310 and.w r3, r3, #16 8003342: 60fb str r3, [r7, #12] 8003344: 68fb ldr r3, [r7, #12] /**DFSDM1 GPIO Configuration PE7 ------> DFSDM1_DATIN2 PE9 ------> DFSDM1_CKOUT */ GPIO_InitStruct.Pin = DFSDM1_DATIN2_Pin|DFSDM1_CKOUT_Pin; 8003346: f44f 7320 mov.w r3, #640 @ 0x280 800334a: f8c7 309c str.w r3, [r7, #156] @ 0x9c GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 800334e: 2302 movs r3, #2 8003350: f8c7 30a0 str.w r3, [r7, #160] @ 0xa0 GPIO_InitStruct.Pull = GPIO_NOPULL; 8003354: 2300 movs r3, #0 8003356: f8c7 30a4 str.w r3, [r7, #164] @ 0xa4 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 800335a: 2300 movs r3, #0 800335c: f8c7 30a8 str.w r3, [r7, #168] @ 0xa8 GPIO_InitStruct.Alternate = GPIO_AF6_DFSDM1; 8003360: 2306 movs r3, #6 8003362: f8c7 30ac str.w r3, [r7, #172] @ 0xac HAL_GPIO_Init(GPIOE, &GPIO_InitStruct); 8003366: f107 039c add.w r3, r7, #156 @ 0x9c 800336a: 4619 mov r1, r3 800336c: 4807 ldr r0, [pc, #28] @ (800338c ) 800336e: f000 ff11 bl 8004194 /* USER CODE BEGIN DFSDM1_MspInit 1 */ /* USER CODE END DFSDM1_MspInit 1 */ DFSDM1_Init++; 8003372: 4b04 ldr r3, [pc, #16] @ (8003384 ) 8003374: 681b ldr r3, [r3, #0] 8003376: 3301 adds r3, #1 8003378: 4a02 ldr r2, [pc, #8] @ (8003384 ) 800337a: 6013 str r3, [r2, #0] } } 800337c: bf00 nop 800337e: 37b0 adds r7, #176 @ 0xb0 8003380: 46bd mov sp, r7 8003382: bd80 pop {r7, pc} 8003384: 20001268 .word 0x20001268 8003388: 40021000 .word 0x40021000 800338c: 48001000 .word 0x48001000 08003390 : * This function configures the hardware resources used in this example * @param hi2c: I2C handle pointer * @retval None */ void HAL_I2C_MspInit(I2C_HandleTypeDef* hi2c) { 8003390: b580 push {r7, lr} 8003392: b0ac sub sp, #176 @ 0xb0 8003394: af00 add r7, sp, #0 8003396: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; 8003398: f107 039c add.w r3, r7, #156 @ 0x9c 800339c: 2200 movs r2, #0 800339e: 601a str r2, [r3, #0] 80033a0: 605a str r2, [r3, #4] 80033a2: 609a str r2, [r3, #8] 80033a4: 60da str r2, [r3, #12] 80033a6: 611a str r2, [r3, #16] RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; 80033a8: f107 0314 add.w r3, r7, #20 80033ac: 2288 movs r2, #136 @ 0x88 80033ae: 2100 movs r1, #0 80033b0: 4618 mov r0, r3 80033b2: f00d f89d bl 80104f0 if(hi2c->Instance==I2C2) 80033b6: 687b ldr r3, [r7, #4] 80033b8: 681b ldr r3, [r3, #0] 80033ba: 4a21 ldr r2, [pc, #132] @ (8003440 ) 80033bc: 4293 cmp r3, r2 80033be: d13b bne.n 8003438 /* USER CODE END I2C2_MspInit 0 */ /** Initializes the peripherals clock */ PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_I2C2; 80033c0: 2380 movs r3, #128 @ 0x80 80033c2: 617b str r3, [r7, #20] PeriphClkInit.I2c2ClockSelection = RCC_I2C2CLKSOURCE_PCLK1; 80033c4: 2300 movs r3, #0 80033c6: 66bb str r3, [r7, #104] @ 0x68 if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) 80033c8: f107 0314 add.w r3, r7, #20 80033cc: 4618 mov r0, r3 80033ce: f003 f8bd bl 800654c 80033d2: 4603 mov r3, r0 80033d4: 2b00 cmp r3, #0 80033d6: d001 beq.n 80033dc { Error_Handler(); 80033d8: f7ff fef6 bl 80031c8 } __HAL_RCC_GPIOB_CLK_ENABLE(); 80033dc: 4b19 ldr r3, [pc, #100] @ (8003444 ) 80033de: 6cdb ldr r3, [r3, #76] @ 0x4c 80033e0: 4a18 ldr r2, [pc, #96] @ (8003444 ) 80033e2: f043 0302 orr.w r3, r3, #2 80033e6: 64d3 str r3, [r2, #76] @ 0x4c 80033e8: 4b16 ldr r3, [pc, #88] @ (8003444 ) 80033ea: 6cdb ldr r3, [r3, #76] @ 0x4c 80033ec: f003 0302 and.w r3, r3, #2 80033f0: 613b str r3, [r7, #16] 80033f2: 693b ldr r3, [r7, #16] /**I2C2 GPIO Configuration PB10 ------> I2C2_SCL PB11 ------> I2C2_SDA */ GPIO_InitStruct.Pin = INTERNAL_I2C2_SCL_Pin|INTERNAL_I2C2_SDA_Pin; 80033f4: f44f 6340 mov.w r3, #3072 @ 0xc00 80033f8: f8c7 309c str.w r3, [r7, #156] @ 0x9c GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; 80033fc: 2312 movs r3, #18 80033fe: f8c7 30a0 str.w r3, [r7, #160] @ 0xa0 GPIO_InitStruct.Pull = GPIO_PULLUP; 8003402: 2301 movs r3, #1 8003404: f8c7 30a4 str.w r3, [r7, #164] @ 0xa4 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; 8003408: 2303 movs r3, #3 800340a: f8c7 30a8 str.w r3, [r7, #168] @ 0xa8 GPIO_InitStruct.Alternate = GPIO_AF4_I2C2; 800340e: 2304 movs r3, #4 8003410: f8c7 30ac str.w r3, [r7, #172] @ 0xac HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 8003414: f107 039c add.w r3, r7, #156 @ 0x9c 8003418: 4619 mov r1, r3 800341a: 480b ldr r0, [pc, #44] @ (8003448 ) 800341c: f000 feba bl 8004194 /* Peripheral clock enable */ __HAL_RCC_I2C2_CLK_ENABLE(); 8003420: 4b08 ldr r3, [pc, #32] @ (8003444 ) 8003422: 6d9b ldr r3, [r3, #88] @ 0x58 8003424: 4a07 ldr r2, [pc, #28] @ (8003444 ) 8003426: f443 0380 orr.w r3, r3, #4194304 @ 0x400000 800342a: 6593 str r3, [r2, #88] @ 0x58 800342c: 4b05 ldr r3, [pc, #20] @ (8003444 ) 800342e: 6d9b ldr r3, [r3, #88] @ 0x58 8003430: f403 0380 and.w r3, r3, #4194304 @ 0x400000 8003434: 60fb str r3, [r7, #12] 8003436: 68fb ldr r3, [r7, #12] /* USER CODE END I2C2_MspInit 1 */ } } 8003438: bf00 nop 800343a: 37b0 adds r7, #176 @ 0xb0 800343c: 46bd mov sp, r7 800343e: bd80 pop {r7, pc} 8003440: 40005800 .word 0x40005800 8003444: 40021000 .word 0x40021000 8003448: 48000400 .word 0x48000400 0800344c : * This function freeze the hardware resources used in this example * @param hi2c: I2C handle pointer * @retval None */ void HAL_I2C_MspDeInit(I2C_HandleTypeDef* hi2c) { 800344c: b580 push {r7, lr} 800344e: b082 sub sp, #8 8003450: af00 add r7, sp, #0 8003452: 6078 str r0, [r7, #4] if(hi2c->Instance==I2C2) 8003454: 687b ldr r3, [r7, #4] 8003456: 681b ldr r3, [r3, #0] 8003458: 4a0b ldr r2, [pc, #44] @ (8003488 ) 800345a: 4293 cmp r3, r2 800345c: d10f bne.n 800347e { /* USER CODE BEGIN I2C2_MspDeInit 0 */ /* USER CODE END I2C2_MspDeInit 0 */ /* Peripheral clock disable */ __HAL_RCC_I2C2_CLK_DISABLE(); 800345e: 4b0b ldr r3, [pc, #44] @ (800348c ) 8003460: 6d9b ldr r3, [r3, #88] @ 0x58 8003462: 4a0a ldr r2, [pc, #40] @ (800348c ) 8003464: f423 0380 bic.w r3, r3, #4194304 @ 0x400000 8003468: 6593 str r3, [r2, #88] @ 0x58 /**I2C2 GPIO Configuration PB10 ------> I2C2_SCL PB11 ------> I2C2_SDA */ HAL_GPIO_DeInit(INTERNAL_I2C2_SCL_GPIO_Port, INTERNAL_I2C2_SCL_Pin); 800346a: f44f 6180 mov.w r1, #1024 @ 0x400 800346e: 4808 ldr r0, [pc, #32] @ (8003490 ) 8003470: f001 f83a bl 80044e8 HAL_GPIO_DeInit(INTERNAL_I2C2_SDA_GPIO_Port, INTERNAL_I2C2_SDA_Pin); 8003474: f44f 6100 mov.w r1, #2048 @ 0x800 8003478: 4805 ldr r0, [pc, #20] @ (8003490 ) 800347a: f001 f835 bl 80044e8 /* USER CODE BEGIN I2C2_MspDeInit 1 */ /* USER CODE END I2C2_MspDeInit 1 */ } } 800347e: bf00 nop 8003480: 3708 adds r7, #8 8003482: 46bd mov sp, r7 8003484: bd80 pop {r7, pc} 8003486: bf00 nop 8003488: 40005800 .word 0x40005800 800348c: 40021000 .word 0x40021000 8003490: 48000400 .word 0x48000400 08003494 : * This function configures the hardware resources used in this example * @param hqspi: QSPI handle pointer * @retval None */ void HAL_QSPI_MspInit(QSPI_HandleTypeDef* hqspi) { 8003494: b580 push {r7, lr} 8003496: b08a sub sp, #40 @ 0x28 8003498: af00 add r7, sp, #0 800349a: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; 800349c: f107 0314 add.w r3, r7, #20 80034a0: 2200 movs r2, #0 80034a2: 601a str r2, [r3, #0] 80034a4: 605a str r2, [r3, #4] 80034a6: 609a str r2, [r3, #8] 80034a8: 60da str r2, [r3, #12] 80034aa: 611a str r2, [r3, #16] if(hqspi->Instance==QUADSPI) 80034ac: 687b ldr r3, [r7, #4] 80034ae: 681b ldr r3, [r3, #0] 80034b0: 4a17 ldr r2, [pc, #92] @ (8003510 ) 80034b2: 4293 cmp r3, r2 80034b4: d128 bne.n 8003508 { /* USER CODE BEGIN QUADSPI_MspInit 0 */ /* USER CODE END QUADSPI_MspInit 0 */ /* Peripheral clock enable */ __HAL_RCC_QSPI_CLK_ENABLE(); 80034b6: 4b17 ldr r3, [pc, #92] @ (8003514 ) 80034b8: 6d1b ldr r3, [r3, #80] @ 0x50 80034ba: 4a16 ldr r2, [pc, #88] @ (8003514 ) 80034bc: f443 7380 orr.w r3, r3, #256 @ 0x100 80034c0: 6513 str r3, [r2, #80] @ 0x50 80034c2: 4b14 ldr r3, [pc, #80] @ (8003514 ) 80034c4: 6d1b ldr r3, [r3, #80] @ 0x50 80034c6: f403 7380 and.w r3, r3, #256 @ 0x100 80034ca: 613b str r3, [r7, #16] 80034cc: 693b ldr r3, [r7, #16] __HAL_RCC_GPIOE_CLK_ENABLE(); 80034ce: 4b11 ldr r3, [pc, #68] @ (8003514 ) 80034d0: 6cdb ldr r3, [r3, #76] @ 0x4c 80034d2: 4a10 ldr r2, [pc, #64] @ (8003514 ) 80034d4: f043 0310 orr.w r3, r3, #16 80034d8: 64d3 str r3, [r2, #76] @ 0x4c 80034da: 4b0e ldr r3, [pc, #56] @ (8003514 ) 80034dc: 6cdb ldr r3, [r3, #76] @ 0x4c 80034de: f003 0310 and.w r3, r3, #16 80034e2: 60fb str r3, [r7, #12] 80034e4: 68fb ldr r3, [r7, #12] PE12 ------> QUADSPI_BK1_IO0 PE13 ------> QUADSPI_BK1_IO1 PE14 ------> QUADSPI_BK1_IO2 PE15 ------> QUADSPI_BK1_IO3 */ GPIO_InitStruct.Pin = QUADSPI_CLK_Pin|QUADSPI_NCS_Pin|OQUADSPI_BK1_IO0_Pin|QUADSPI_BK1_IO1_Pin 80034e6: f44f 437c mov.w r3, #64512 @ 0xfc00 80034ea: 617b str r3, [r7, #20] |QUAD_SPI_BK1_IO2_Pin|QUAD_SPI_BK1_IO3_Pin; GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 80034ec: 2302 movs r3, #2 80034ee: 61bb str r3, [r7, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; 80034f0: 2300 movs r3, #0 80034f2: 61fb str r3, [r7, #28] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; 80034f4: 2303 movs r3, #3 80034f6: 623b str r3, [r7, #32] GPIO_InitStruct.Alternate = GPIO_AF10_QUADSPI; 80034f8: 230a movs r3, #10 80034fa: 627b str r3, [r7, #36] @ 0x24 HAL_GPIO_Init(GPIOE, &GPIO_InitStruct); 80034fc: f107 0314 add.w r3, r7, #20 8003500: 4619 mov r1, r3 8003502: 4805 ldr r0, [pc, #20] @ (8003518 ) 8003504: f000 fe46 bl 8004194 /* USER CODE END QUADSPI_MspInit 1 */ } } 8003508: bf00 nop 800350a: 3728 adds r7, #40 @ 0x28 800350c: 46bd mov sp, r7 800350e: bd80 pop {r7, pc} 8003510: a0001000 .word 0xa0001000 8003514: 40021000 .word 0x40021000 8003518: 48001000 .word 0x48001000 0800351c : * This function configures the hardware resources used in this example * @param hspi: SPI handle pointer * @retval None */ void HAL_SPI_MspInit(SPI_HandleTypeDef* hspi) { 800351c: b580 push {r7, lr} 800351e: b08a sub sp, #40 @ 0x28 8003520: af00 add r7, sp, #0 8003522: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; 8003524: f107 0314 add.w r3, r7, #20 8003528: 2200 movs r2, #0 800352a: 601a str r2, [r3, #0] 800352c: 605a str r2, [r3, #4] 800352e: 609a str r2, [r3, #8] 8003530: 60da str r2, [r3, #12] 8003532: 611a str r2, [r3, #16] if(hspi->Instance==SPI3) 8003534: 687b ldr r3, [r7, #4] 8003536: 681b ldr r3, [r3, #0] 8003538: 4a17 ldr r2, [pc, #92] @ (8003598 ) 800353a: 4293 cmp r3, r2 800353c: d128 bne.n 8003590 { /* USER CODE BEGIN SPI3_MspInit 0 */ /* USER CODE END SPI3_MspInit 0 */ /* Peripheral clock enable */ __HAL_RCC_SPI3_CLK_ENABLE(); 800353e: 4b17 ldr r3, [pc, #92] @ (800359c ) 8003540: 6d9b ldr r3, [r3, #88] @ 0x58 8003542: 4a16 ldr r2, [pc, #88] @ (800359c ) 8003544: f443 4300 orr.w r3, r3, #32768 @ 0x8000 8003548: 6593 str r3, [r2, #88] @ 0x58 800354a: 4b14 ldr r3, [pc, #80] @ (800359c ) 800354c: 6d9b ldr r3, [r3, #88] @ 0x58 800354e: f403 4300 and.w r3, r3, #32768 @ 0x8000 8003552: 613b str r3, [r7, #16] 8003554: 693b ldr r3, [r7, #16] __HAL_RCC_GPIOC_CLK_ENABLE(); 8003556: 4b11 ldr r3, [pc, #68] @ (800359c ) 8003558: 6cdb ldr r3, [r3, #76] @ 0x4c 800355a: 4a10 ldr r2, [pc, #64] @ (800359c ) 800355c: f043 0304 orr.w r3, r3, #4 8003560: 64d3 str r3, [r2, #76] @ 0x4c 8003562: 4b0e ldr r3, [pc, #56] @ (800359c ) 8003564: 6cdb ldr r3, [r3, #76] @ 0x4c 8003566: f003 0304 and.w r3, r3, #4 800356a: 60fb str r3, [r7, #12] 800356c: 68fb ldr r3, [r7, #12] /**SPI3 GPIO Configuration PC10 ------> SPI3_SCK PC11 ------> SPI3_MISO PC12 ------> SPI3_MOSI */ GPIO_InitStruct.Pin = INTERNAL_SPI3_SCK_Pin|INTERNAL_SPI3_MISO_Pin|INTERNAL_SPI3_MOSI_Pin; 800356e: f44f 53e0 mov.w r3, #7168 @ 0x1c00 8003572: 617b str r3, [r7, #20] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 8003574: 2302 movs r3, #2 8003576: 61bb str r3, [r7, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; 8003578: 2300 movs r3, #0 800357a: 61fb str r3, [r7, #28] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; 800357c: 2303 movs r3, #3 800357e: 623b str r3, [r7, #32] GPIO_InitStruct.Alternate = GPIO_AF6_SPI3; 8003580: 2306 movs r3, #6 8003582: 627b str r3, [r7, #36] @ 0x24 HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 8003584: f107 0314 add.w r3, r7, #20 8003588: 4619 mov r1, r3 800358a: 4805 ldr r0, [pc, #20] @ (80035a0 ) 800358c: f000 fe02 bl 8004194 /* USER CODE END SPI3_MspInit 1 */ } } 8003590: bf00 nop 8003592: 3728 adds r7, #40 @ 0x28 8003594: 46bd mov sp, r7 8003596: bd80 pop {r7, pc} 8003598: 40003c00 .word 0x40003c00 800359c: 40021000 .word 0x40021000 80035a0: 48000800 .word 0x48000800 080035a4 : * This function freeze the hardware resources used in this example * @param hspi: SPI handle pointer * @retval None */ void HAL_SPI_MspDeInit(SPI_HandleTypeDef* hspi) { 80035a4: b580 push {r7, lr} 80035a6: b082 sub sp, #8 80035a8: af00 add r7, sp, #0 80035aa: 6078 str r0, [r7, #4] if(hspi->Instance==SPI3) 80035ac: 687b ldr r3, [r7, #4] 80035ae: 681b ldr r3, [r3, #0] 80035b0: 4a08 ldr r2, [pc, #32] @ (80035d4 ) 80035b2: 4293 cmp r3, r2 80035b4: d10a bne.n 80035cc { /* USER CODE BEGIN SPI3_MspDeInit 0 */ /* USER CODE END SPI3_MspDeInit 0 */ /* Peripheral clock disable */ __HAL_RCC_SPI3_CLK_DISABLE(); 80035b6: 4b08 ldr r3, [pc, #32] @ (80035d8 ) 80035b8: 6d9b ldr r3, [r3, #88] @ 0x58 80035ba: 4a07 ldr r2, [pc, #28] @ (80035d8 ) 80035bc: f423 4300 bic.w r3, r3, #32768 @ 0x8000 80035c0: 6593 str r3, [r2, #88] @ 0x58 /**SPI3 GPIO Configuration PC10 ------> SPI3_SCK PC11 ------> SPI3_MISO PC12 ------> SPI3_MOSI */ HAL_GPIO_DeInit(GPIOC, INTERNAL_SPI3_SCK_Pin|INTERNAL_SPI3_MISO_Pin|INTERNAL_SPI3_MOSI_Pin); 80035c2: f44f 51e0 mov.w r1, #7168 @ 0x1c00 80035c6: 4805 ldr r0, [pc, #20] @ (80035dc ) 80035c8: f000 ff8e bl 80044e8 /* USER CODE BEGIN SPI3_MspDeInit 1 */ /* USER CODE END SPI3_MspDeInit 1 */ } } 80035cc: bf00 nop 80035ce: 3708 adds r7, #8 80035d0: 46bd mov sp, r7 80035d2: bd80 pop {r7, pc} 80035d4: 40003c00 .word 0x40003c00 80035d8: 40021000 .word 0x40021000 80035dc: 48000800 .word 0x48000800 080035e0 : * This function configures the hardware resources used in this example * @param huart: UART handle pointer * @retval None */ void HAL_UART_MspInit(UART_HandleTypeDef* huart) { 80035e0: b580 push {r7, lr} 80035e2: b0ae sub sp, #184 @ 0xb8 80035e4: af00 add r7, sp, #0 80035e6: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; 80035e8: f107 03a4 add.w r3, r7, #164 @ 0xa4 80035ec: 2200 movs r2, #0 80035ee: 601a str r2, [r3, #0] 80035f0: 605a str r2, [r3, #4] 80035f2: 609a str r2, [r3, #8] 80035f4: 60da str r2, [r3, #12] 80035f6: 611a str r2, [r3, #16] RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; 80035f8: f107 031c add.w r3, r7, #28 80035fc: 2288 movs r2, #136 @ 0x88 80035fe: 2100 movs r1, #0 8003600: 4618 mov r0, r3 8003602: f00c ff75 bl 80104f0 if(huart->Instance==USART1) 8003606: 687b ldr r3, [r7, #4] 8003608: 681b ldr r3, [r3, #0] 800360a: 4a46 ldr r2, [pc, #280] @ (8003724 ) 800360c: 4293 cmp r3, r2 800360e: d143 bne.n 8003698 /* USER CODE END USART1_MspInit 0 */ /** Initializes the peripherals clock */ PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART1; 8003610: 2301 movs r3, #1 8003612: 61fb str r3, [r7, #28] PeriphClkInit.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2; 8003614: 2300 movs r3, #0 8003616: 657b str r3, [r7, #84] @ 0x54 if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) 8003618: f107 031c add.w r3, r7, #28 800361c: 4618 mov r0, r3 800361e: f002 ff95 bl 800654c 8003622: 4603 mov r3, r0 8003624: 2b00 cmp r3, #0 8003626: d001 beq.n 800362c { Error_Handler(); 8003628: f7ff fdce bl 80031c8 } /* Peripheral clock enable */ __HAL_RCC_USART1_CLK_ENABLE(); 800362c: 4b3e ldr r3, [pc, #248] @ (8003728 ) 800362e: 6e1b ldr r3, [r3, #96] @ 0x60 8003630: 4a3d ldr r2, [pc, #244] @ (8003728 ) 8003632: f443 4380 orr.w r3, r3, #16384 @ 0x4000 8003636: 6613 str r3, [r2, #96] @ 0x60 8003638: 4b3b ldr r3, [pc, #236] @ (8003728 ) 800363a: 6e1b ldr r3, [r3, #96] @ 0x60 800363c: f403 4380 and.w r3, r3, #16384 @ 0x4000 8003640: 61bb str r3, [r7, #24] 8003642: 69bb ldr r3, [r7, #24] __HAL_RCC_GPIOB_CLK_ENABLE(); 8003644: 4b38 ldr r3, [pc, #224] @ (8003728 ) 8003646: 6cdb ldr r3, [r3, #76] @ 0x4c 8003648: 4a37 ldr r2, [pc, #220] @ (8003728 ) 800364a: f043 0302 orr.w r3, r3, #2 800364e: 64d3 str r3, [r2, #76] @ 0x4c 8003650: 4b35 ldr r3, [pc, #212] @ (8003728 ) 8003652: 6cdb ldr r3, [r3, #76] @ 0x4c 8003654: f003 0302 and.w r3, r3, #2 8003658: 617b str r3, [r7, #20] 800365a: 697b ldr r3, [r7, #20] /**USART1 GPIO Configuration PB6 ------> USART1_TX PB7 ------> USART1_RX */ GPIO_InitStruct.Pin = ST_LINK_UART1_TX_Pin|ST_LINK_UART1_RX_Pin; 800365c: 23c0 movs r3, #192 @ 0xc0 800365e: f8c7 30a4 str.w r3, [r7, #164] @ 0xa4 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 8003662: 2302 movs r3, #2 8003664: f8c7 30a8 str.w r3, [r7, #168] @ 0xa8 GPIO_InitStruct.Pull = GPIO_NOPULL; 8003668: 2300 movs r3, #0 800366a: f8c7 30ac str.w r3, [r7, #172] @ 0xac GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; 800366e: 2303 movs r3, #3 8003670: f8c7 30b0 str.w r3, [r7, #176] @ 0xb0 GPIO_InitStruct.Alternate = GPIO_AF7_USART1; 8003674: 2307 movs r3, #7 8003676: f8c7 30b4 str.w r3, [r7, #180] @ 0xb4 HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 800367a: f107 03a4 add.w r3, r7, #164 @ 0xa4 800367e: 4619 mov r1, r3 8003680: 482a ldr r0, [pc, #168] @ (800372c ) 8003682: f000 fd87 bl 8004194 /* USART1 interrupt Init */ HAL_NVIC_SetPriority(USART1_IRQn, 5, 0); 8003686: 2200 movs r2, #0 8003688: 2105 movs r1, #5 800368a: 2025 movs r0, #37 @ 0x25 800368c: f000 fbcc bl 8003e28 HAL_NVIC_EnableIRQ(USART1_IRQn); 8003690: 2025 movs r0, #37 @ 0x25 8003692: f000 fbe5 bl 8003e60 /* USER CODE BEGIN USART3_MspInit 1 */ /* USER CODE END USART3_MspInit 1 */ } } 8003696: e040 b.n 800371a else if(huart->Instance==USART3) 8003698: 687b ldr r3, [r7, #4] 800369a: 681b ldr r3, [r3, #0] 800369c: 4a24 ldr r2, [pc, #144] @ (8003730 ) 800369e: 4293 cmp r3, r2 80036a0: d13b bne.n 800371a PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART3; 80036a2: 2304 movs r3, #4 80036a4: 61fb str r3, [r7, #28] PeriphClkInit.Usart3ClockSelection = RCC_USART3CLKSOURCE_PCLK1; 80036a6: 2300 movs r3, #0 80036a8: 65fb str r3, [r7, #92] @ 0x5c if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) 80036aa: f107 031c add.w r3, r7, #28 80036ae: 4618 mov r0, r3 80036b0: f002 ff4c bl 800654c 80036b4: 4603 mov r3, r0 80036b6: 2b00 cmp r3, #0 80036b8: d001 beq.n 80036be Error_Handler(); 80036ba: f7ff fd85 bl 80031c8 __HAL_RCC_USART3_CLK_ENABLE(); 80036be: 4b1a ldr r3, [pc, #104] @ (8003728 ) 80036c0: 6d9b ldr r3, [r3, #88] @ 0x58 80036c2: 4a19 ldr r2, [pc, #100] @ (8003728 ) 80036c4: f443 2380 orr.w r3, r3, #262144 @ 0x40000 80036c8: 6593 str r3, [r2, #88] @ 0x58 80036ca: 4b17 ldr r3, [pc, #92] @ (8003728 ) 80036cc: 6d9b ldr r3, [r3, #88] @ 0x58 80036ce: f403 2380 and.w r3, r3, #262144 @ 0x40000 80036d2: 613b str r3, [r7, #16] 80036d4: 693b ldr r3, [r7, #16] __HAL_RCC_GPIOD_CLK_ENABLE(); 80036d6: 4b14 ldr r3, [pc, #80] @ (8003728 ) 80036d8: 6cdb ldr r3, [r3, #76] @ 0x4c 80036da: 4a13 ldr r2, [pc, #76] @ (8003728 ) 80036dc: f043 0308 orr.w r3, r3, #8 80036e0: 64d3 str r3, [r2, #76] @ 0x4c 80036e2: 4b11 ldr r3, [pc, #68] @ (8003728 ) 80036e4: 6cdb ldr r3, [r3, #76] @ 0x4c 80036e6: f003 0308 and.w r3, r3, #8 80036ea: 60fb str r3, [r7, #12] 80036ec: 68fb ldr r3, [r7, #12] GPIO_InitStruct.Pin = INTERNAL_UART3_TX_Pin|INTERNAL_UART3_RX_Pin; 80036ee: f44f 7340 mov.w r3, #768 @ 0x300 80036f2: f8c7 30a4 str.w r3, [r7, #164] @ 0xa4 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 80036f6: 2302 movs r3, #2 80036f8: f8c7 30a8 str.w r3, [r7, #168] @ 0xa8 GPIO_InitStruct.Pull = GPIO_NOPULL; 80036fc: 2300 movs r3, #0 80036fe: f8c7 30ac str.w r3, [r7, #172] @ 0xac GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; 8003702: 2303 movs r3, #3 8003704: f8c7 30b0 str.w r3, [r7, #176] @ 0xb0 GPIO_InitStruct.Alternate = GPIO_AF7_USART3; 8003708: 2307 movs r3, #7 800370a: f8c7 30b4 str.w r3, [r7, #180] @ 0xb4 HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); 800370e: f107 03a4 add.w r3, r7, #164 @ 0xa4 8003712: 4619 mov r1, r3 8003714: 4807 ldr r0, [pc, #28] @ (8003734 ) 8003716: f000 fd3d bl 8004194 } 800371a: bf00 nop 800371c: 37b8 adds r7, #184 @ 0xb8 800371e: 46bd mov sp, r7 8003720: bd80 pop {r7, pc} 8003722: bf00 nop 8003724: 40013800 .word 0x40013800 8003728: 40021000 .word 0x40021000 800372c: 48000400 .word 0x48000400 8003730: 40004800 .word 0x40004800 8003734: 48000c00 .word 0x48000c00 08003738 : * This function configures the hardware resources used in this example * @param hpcd: PCD handle pointer * @retval None */ void HAL_PCD_MspInit(PCD_HandleTypeDef* hpcd) { 8003738: b580 push {r7, lr} 800373a: b0ac sub sp, #176 @ 0xb0 800373c: af00 add r7, sp, #0 800373e: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; 8003740: f107 039c add.w r3, r7, #156 @ 0x9c 8003744: 2200 movs r2, #0 8003746: 601a str r2, [r3, #0] 8003748: 605a str r2, [r3, #4] 800374a: 609a str r2, [r3, #8] 800374c: 60da str r2, [r3, #12] 800374e: 611a str r2, [r3, #16] RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; 8003750: f107 0314 add.w r3, r7, #20 8003754: 2288 movs r2, #136 @ 0x88 8003756: 2100 movs r1, #0 8003758: 4618 mov r0, r3 800375a: f00c fec9 bl 80104f0 if(hpcd->Instance==USB_OTG_FS) 800375e: 687b ldr r3, [r7, #4] 8003760: 681b ldr r3, [r3, #0] 8003762: f1b3 4fa0 cmp.w r3, #1342177280 @ 0x50000000 8003766: d17c bne.n 8003862 /* USER CODE END USB_OTG_FS_MspInit 0 */ /** Initializes the peripherals clock */ PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USB; 8003768: f44f 5300 mov.w r3, #8192 @ 0x2000 800376c: 617b str r3, [r7, #20] PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLLSAI1; 800376e: f04f 6380 mov.w r3, #67108864 @ 0x4000000 8003772: f8c7 3080 str.w r3, [r7, #128] @ 0x80 PeriphClkInit.PLLSAI1.PLLSAI1Source = RCC_PLLSOURCE_MSI; 8003776: 2301 movs r3, #1 8003778: 61bb str r3, [r7, #24] PeriphClkInit.PLLSAI1.PLLSAI1M = 1; 800377a: 2301 movs r3, #1 800377c: 61fb str r3, [r7, #28] PeriphClkInit.PLLSAI1.PLLSAI1N = 24; 800377e: 2318 movs r3, #24 8003780: 623b str r3, [r7, #32] PeriphClkInit.PLLSAI1.PLLSAI1P = RCC_PLLP_DIV7; 8003782: 2307 movs r3, #7 8003784: 627b str r3, [r7, #36] @ 0x24 PeriphClkInit.PLLSAI1.PLLSAI1Q = RCC_PLLQ_DIV2; 8003786: 2302 movs r3, #2 8003788: 62bb str r3, [r7, #40] @ 0x28 PeriphClkInit.PLLSAI1.PLLSAI1R = RCC_PLLR_DIV2; 800378a: 2302 movs r3, #2 800378c: 62fb str r3, [r7, #44] @ 0x2c PeriphClkInit.PLLSAI1.PLLSAI1ClockOut = RCC_PLLSAI1_48M2CLK; 800378e: f44f 1380 mov.w r3, #1048576 @ 0x100000 8003792: 633b str r3, [r7, #48] @ 0x30 if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) 8003794: f107 0314 add.w r3, r7, #20 8003798: 4618 mov r0, r3 800379a: f002 fed7 bl 800654c 800379e: 4603 mov r3, r0 80037a0: 2b00 cmp r3, #0 80037a2: d001 beq.n 80037a8 { Error_Handler(); 80037a4: f7ff fd10 bl 80031c8 } __HAL_RCC_GPIOA_CLK_ENABLE(); 80037a8: 4b30 ldr r3, [pc, #192] @ (800386c ) 80037aa: 6cdb ldr r3, [r3, #76] @ 0x4c 80037ac: 4a2f ldr r2, [pc, #188] @ (800386c ) 80037ae: f043 0301 orr.w r3, r3, #1 80037b2: 64d3 str r3, [r2, #76] @ 0x4c 80037b4: 4b2d ldr r3, [pc, #180] @ (800386c ) 80037b6: 6cdb ldr r3, [r3, #76] @ 0x4c 80037b8: f003 0301 and.w r3, r3, #1 80037bc: 613b str r3, [r7, #16] 80037be: 693b ldr r3, [r7, #16] PA9 ------> USB_OTG_FS_VBUS PA10 ------> USB_OTG_FS_ID PA11 ------> USB_OTG_FS_DM PA12 ------> USB_OTG_FS_DP */ GPIO_InitStruct.Pin = USB_OTG_FS_VBUS_Pin; 80037c0: f44f 7300 mov.w r3, #512 @ 0x200 80037c4: f8c7 309c str.w r3, [r7, #156] @ 0x9c GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 80037c8: 2300 movs r3, #0 80037ca: f8c7 30a0 str.w r3, [r7, #160] @ 0xa0 GPIO_InitStruct.Pull = GPIO_NOPULL; 80037ce: 2300 movs r3, #0 80037d0: f8c7 30a4 str.w r3, [r7, #164] @ 0xa4 HAL_GPIO_Init(USB_OTG_FS_VBUS_GPIO_Port, &GPIO_InitStruct); 80037d4: f107 039c add.w r3, r7, #156 @ 0x9c 80037d8: 4619 mov r1, r3 80037da: f04f 4090 mov.w r0, #1207959552 @ 0x48000000 80037de: f000 fcd9 bl 8004194 GPIO_InitStruct.Pin = USB_OTG_FS_ID_Pin|USB_OTG_FS_DM_Pin|USB_OTG_FS_DP_Pin; 80037e2: f44f 53e0 mov.w r3, #7168 @ 0x1c00 80037e6: f8c7 309c str.w r3, [r7, #156] @ 0x9c GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 80037ea: 2302 movs r3, #2 80037ec: f8c7 30a0 str.w r3, [r7, #160] @ 0xa0 GPIO_InitStruct.Pull = GPIO_NOPULL; 80037f0: 2300 movs r3, #0 80037f2: f8c7 30a4 str.w r3, [r7, #164] @ 0xa4 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; 80037f6: 2303 movs r3, #3 80037f8: f8c7 30a8 str.w r3, [r7, #168] @ 0xa8 GPIO_InitStruct.Alternate = GPIO_AF10_OTG_FS; 80037fc: 230a movs r3, #10 80037fe: f8c7 30ac str.w r3, [r7, #172] @ 0xac HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8003802: f107 039c add.w r3, r7, #156 @ 0x9c 8003806: 4619 mov r1, r3 8003808: f04f 4090 mov.w r0, #1207959552 @ 0x48000000 800380c: f000 fcc2 bl 8004194 /* Peripheral clock enable */ __HAL_RCC_USB_OTG_FS_CLK_ENABLE(); 8003810: 4b16 ldr r3, [pc, #88] @ (800386c ) 8003812: 6cdb ldr r3, [r3, #76] @ 0x4c 8003814: 4a15 ldr r2, [pc, #84] @ (800386c ) 8003816: f443 5380 orr.w r3, r3, #4096 @ 0x1000 800381a: 64d3 str r3, [r2, #76] @ 0x4c 800381c: 4b13 ldr r3, [pc, #76] @ (800386c ) 800381e: 6cdb ldr r3, [r3, #76] @ 0x4c 8003820: f403 5380 and.w r3, r3, #4096 @ 0x1000 8003824: 60fb str r3, [r7, #12] 8003826: 68fb ldr r3, [r7, #12] /* Enable VDDUSB */ if(__HAL_RCC_PWR_IS_CLK_DISABLED()) 8003828: 4b10 ldr r3, [pc, #64] @ (800386c ) 800382a: 6d9b ldr r3, [r3, #88] @ 0x58 800382c: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 8003830: 2b00 cmp r3, #0 8003832: d114 bne.n 800385e { __HAL_RCC_PWR_CLK_ENABLE(); 8003834: 4b0d ldr r3, [pc, #52] @ (800386c ) 8003836: 6d9b ldr r3, [r3, #88] @ 0x58 8003838: 4a0c ldr r2, [pc, #48] @ (800386c ) 800383a: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 800383e: 6593 str r3, [r2, #88] @ 0x58 8003840: 4b0a ldr r3, [pc, #40] @ (800386c ) 8003842: 6d9b ldr r3, [r3, #88] @ 0x58 8003844: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 8003848: 60bb str r3, [r7, #8] 800384a: 68bb ldr r3, [r7, #8] HAL_PWREx_EnableVddUSB(); 800384c: f001 ff80 bl 8005750 __HAL_RCC_PWR_CLK_DISABLE(); 8003850: 4b06 ldr r3, [pc, #24] @ (800386c ) 8003852: 6d9b ldr r3, [r3, #88] @ 0x58 8003854: 4a05 ldr r2, [pc, #20] @ (800386c ) 8003856: f023 5380 bic.w r3, r3, #268435456 @ 0x10000000 800385a: 6593 str r3, [r2, #88] @ 0x58 /* USER CODE END USB_OTG_FS_MspInit 1 */ } } 800385c: e001 b.n 8003862 HAL_PWREx_EnableVddUSB(); 800385e: f001 ff77 bl 8005750 } 8003862: bf00 nop 8003864: 37b0 adds r7, #176 @ 0xb0 8003866: 46bd mov sp, r7 8003868: bd80 pop {r7, pc} 800386a: bf00 nop 800386c: 40021000 .word 0x40021000 08003870 : * reset by HAL_Init() or at any time when clock is configured, by HAL_RCC_ClockConfig(). * @param TickPriority: Tick interrupt priority. * @retval HAL status */ HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority) { 8003870: b580 push {r7, lr} 8003872: b08c sub sp, #48 @ 0x30 8003874: af00 add r7, sp, #0 8003876: 6078 str r0, [r7, #4] RCC_ClkInitTypeDef clkconfig; uint32_t uwTimclock; uint32_t uwPrescalerValue; uint32_t pFLatency; HAL_StatusTypeDef status = HAL_OK; 8003878: 2300 movs r3, #0 800387a: f887 302f strb.w r3, [r7, #47] @ 0x2f /* Enable TIM17 clock */ __HAL_RCC_TIM17_CLK_ENABLE(); 800387e: 4b2e ldr r3, [pc, #184] @ (8003938 ) 8003880: 6e1b ldr r3, [r3, #96] @ 0x60 8003882: 4a2d ldr r2, [pc, #180] @ (8003938 ) 8003884: f443 2380 orr.w r3, r3, #262144 @ 0x40000 8003888: 6613 str r3, [r2, #96] @ 0x60 800388a: 4b2b ldr r3, [pc, #172] @ (8003938 ) 800388c: 6e1b ldr r3, [r3, #96] @ 0x60 800388e: f403 2380 and.w r3, r3, #262144 @ 0x40000 8003892: 60bb str r3, [r7, #8] 8003894: 68bb ldr r3, [r7, #8] /* Get clock configuration */ HAL_RCC_GetClockConfig(&clkconfig, &pFLatency); 8003896: f107 020c add.w r2, r7, #12 800389a: f107 0310 add.w r3, r7, #16 800389e: 4611 mov r1, r2 80038a0: 4618 mov r0, r3 80038a2: f002 fdc1 bl 8006428 /* Compute TIM17 clock */ uwTimclock = HAL_RCC_GetPCLK2Freq(); 80038a6: f002 fda9 bl 80063fc 80038aa: 62b8 str r0, [r7, #40] @ 0x28 /* Compute the prescaler value to have TIM17 counter clock equal to 1MHz */ uwPrescalerValue = (uint32_t) ((uwTimclock / 1000000U) - 1U); 80038ac: 6abb ldr r3, [r7, #40] @ 0x28 80038ae: 4a23 ldr r2, [pc, #140] @ (800393c ) 80038b0: fba2 2303 umull r2, r3, r2, r3 80038b4: 0c9b lsrs r3, r3, #18 80038b6: 3b01 subs r3, #1 80038b8: 627b str r3, [r7, #36] @ 0x24 /* Initialize TIM17 */ htim17.Instance = TIM17; 80038ba: 4b21 ldr r3, [pc, #132] @ (8003940 ) 80038bc: 4a21 ldr r2, [pc, #132] @ (8003944 ) 80038be: 601a str r2, [r3, #0] * Period = [(TIM17CLK/1000) - 1]. to have a (1/1000) s time base. * Prescaler = (uwTimclock/1000000 - 1) to have a 1MHz counter clock. * ClockDivision = 0 * Counter direction = Up */ htim17.Init.Period = (1000000U / 1000U) - 1U; 80038c0: 4b1f ldr r3, [pc, #124] @ (8003940 ) 80038c2: f240 32e7 movw r2, #999 @ 0x3e7 80038c6: 60da str r2, [r3, #12] htim17.Init.Prescaler = uwPrescalerValue; 80038c8: 4a1d ldr r2, [pc, #116] @ (8003940 ) 80038ca: 6a7b ldr r3, [r7, #36] @ 0x24 80038cc: 6053 str r3, [r2, #4] htim17.Init.ClockDivision = 0; 80038ce: 4b1c ldr r3, [pc, #112] @ (8003940 ) 80038d0: 2200 movs r2, #0 80038d2: 611a str r2, [r3, #16] htim17.Init.CounterMode = TIM_COUNTERMODE_UP; 80038d4: 4b1a ldr r3, [pc, #104] @ (8003940 ) 80038d6: 2200 movs r2, #0 80038d8: 609a str r2, [r3, #8] htim17.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; 80038da: 4b19 ldr r3, [pc, #100] @ (8003940 ) 80038dc: 2200 movs r2, #0 80038de: 619a str r2, [r3, #24] status = HAL_TIM_Base_Init(&htim17); 80038e0: 4817 ldr r0, [pc, #92] @ (8003940 ) 80038e2: f004 fe32 bl 800854a 80038e6: 4603 mov r3, r0 80038e8: f887 302f strb.w r3, [r7, #47] @ 0x2f if (status == HAL_OK) 80038ec: f897 302f ldrb.w r3, [r7, #47] @ 0x2f 80038f0: 2b00 cmp r3, #0 80038f2: d11b bne.n 800392c { /* Start the TIM time Base generation in interrupt mode */ status = HAL_TIM_Base_Start_IT(&htim17); 80038f4: 4812 ldr r0, [pc, #72] @ (8003940 ) 80038f6: f004 fe89 bl 800860c 80038fa: 4603 mov r3, r0 80038fc: f887 302f strb.w r3, [r7, #47] @ 0x2f if (status == HAL_OK) 8003900: f897 302f ldrb.w r3, [r7, #47] @ 0x2f 8003904: 2b00 cmp r3, #0 8003906: d111 bne.n 800392c { /* Enable the TIM17 global Interrupt */ HAL_NVIC_EnableIRQ(TIM1_TRG_COM_TIM17_IRQn); 8003908: 201a movs r0, #26 800390a: f000 faa9 bl 8003e60 /* Configure the SysTick IRQ priority */ if (TickPriority < (1UL << __NVIC_PRIO_BITS)) 800390e: 687b ldr r3, [r7, #4] 8003910: 2b0f cmp r3, #15 8003912: d808 bhi.n 8003926 { /* Configure the TIM IRQ priority */ HAL_NVIC_SetPriority(TIM1_TRG_COM_TIM17_IRQn, TickPriority, 0U); 8003914: 2200 movs r2, #0 8003916: 6879 ldr r1, [r7, #4] 8003918: 201a movs r0, #26 800391a: f000 fa85 bl 8003e28 uwTickPrio = TickPriority; 800391e: 4a0a ldr r2, [pc, #40] @ (8003948 ) 8003920: 687b ldr r3, [r7, #4] 8003922: 6013 str r3, [r2, #0] 8003924: e002 b.n 800392c } else { status = HAL_ERROR; 8003926: 2301 movs r3, #1 8003928: f887 302f strb.w r3, [r7, #47] @ 0x2f } } } /* Return function status */ return status; 800392c: f897 302f ldrb.w r3, [r7, #47] @ 0x2f } 8003930: 4618 mov r0, r3 8003932: 3730 adds r7, #48 @ 0x30 8003934: 46bd mov sp, r7 8003936: bd80 pop {r7, pc} 8003938: 40021000 .word 0x40021000 800393c: 431bde83 .word 0x431bde83 8003940: 2000126c .word 0x2000126c 8003944: 40014800 .word 0x40014800 8003948: 200000c8 .word 0x200000c8 0800394c : /******************************************************************************/ /** * @brief This function handles Non maskable interrupt. */ void NMI_Handler(void) { 800394c: b480 push {r7} 800394e: af00 add r7, sp, #0 /* USER CODE BEGIN NonMaskableInt_IRQn 0 */ /* USER CODE END NonMaskableInt_IRQn 0 */ /* USER CODE BEGIN NonMaskableInt_IRQn 1 */ while (1) 8003950: bf00 nop 8003952: e7fd b.n 8003950 08003954 : /** * @brief This function handles Hard fault interrupt. */ void HardFault_Handler(void) { 8003954: b480 push {r7} 8003956: af00 add r7, sp, #0 /* USER CODE BEGIN HardFault_IRQn 0 */ /* USER CODE END HardFault_IRQn 0 */ while (1) 8003958: bf00 nop 800395a: e7fd b.n 8003958 0800395c : /** * @brief This function handles Memory management fault. */ void MemManage_Handler(void) { 800395c: b480 push {r7} 800395e: af00 add r7, sp, #0 /* USER CODE BEGIN MemoryManagement_IRQn 0 */ /* USER CODE END MemoryManagement_IRQn 0 */ while (1) 8003960: bf00 nop 8003962: e7fd b.n 8003960 08003964 : /** * @brief This function handles Prefetch fault, memory access fault. */ void BusFault_Handler(void) { 8003964: b480 push {r7} 8003966: af00 add r7, sp, #0 /* USER CODE BEGIN BusFault_IRQn 0 */ /* USER CODE END BusFault_IRQn 0 */ while (1) 8003968: bf00 nop 800396a: e7fd b.n 8003968 0800396c : /** * @brief This function handles Undefined instruction or illegal state. */ void UsageFault_Handler(void) { 800396c: b480 push {r7} 800396e: af00 add r7, sp, #0 /* USER CODE BEGIN UsageFault_IRQn 0 */ /* USER CODE END UsageFault_IRQn 0 */ while (1) 8003970: bf00 nop 8003972: e7fd b.n 8003970 08003974 : /** * @brief This function handles Debug monitor. */ void DebugMon_Handler(void) { 8003974: b480 push {r7} 8003976: af00 add r7, sp, #0 /* USER CODE END DebugMonitor_IRQn 0 */ /* USER CODE BEGIN DebugMonitor_IRQn 1 */ /* USER CODE END DebugMonitor_IRQn 1 */ } 8003978: bf00 nop 800397a: 46bd mov sp, r7 800397c: f85d 7b04 ldr.w r7, [sp], #4 8003980: 4770 bx lr 08003982 : /** * @brief This function handles EXTI line[9:5] interrupts. */ void EXTI9_5_IRQHandler(void) { 8003982: b580 push {r7, lr} 8003984: af00 add r7, sp, #0 /* USER CODE BEGIN EXTI9_5_IRQn 0 */ /* USER CODE END EXTI9_5_IRQn 0 */ HAL_GPIO_EXTI_IRQHandler(SPSGRF_915_GPIO3_EXTI5_Pin); 8003986: 2020 movs r0, #32 8003988: f000 fed2 bl 8004730 HAL_GPIO_EXTI_IRQHandler(SPBTLE_RF_IRQ_EXTI6_Pin); 800398c: 2040 movs r0, #64 @ 0x40 800398e: f000 fecf bl 8004730 HAL_GPIO_EXTI_IRQHandler(VL53L0X_GPIO1_EXTI7_Pin); 8003992: 2080 movs r0, #128 @ 0x80 8003994: f000 fecc bl 8004730 HAL_GPIO_EXTI_IRQHandler(LSM3MDL_DRDY_EXTI8_Pin); 8003998: f44f 7080 mov.w r0, #256 @ 0x100 800399c: f000 fec8 bl 8004730 /* USER CODE BEGIN EXTI9_5_IRQn 1 */ /* USER CODE END EXTI9_5_IRQn 1 */ } 80039a0: bf00 nop 80039a2: bd80 pop {r7, pc} 080039a4 : /** * @brief This function handles TIM1 trigger and commutation interrupts and TIM17 global interrupt. */ void TIM1_TRG_COM_TIM17_IRQHandler(void) { 80039a4: b580 push {r7, lr} 80039a6: af00 add r7, sp, #0 /* USER CODE BEGIN TIM1_TRG_COM_TIM17_IRQn 0 */ /* USER CODE END TIM1_TRG_COM_TIM17_IRQn 0 */ HAL_TIM_IRQHandler(&htim17); 80039a8: 4802 ldr r0, [pc, #8] @ (80039b4 ) 80039aa: f004 fe9f bl 80086ec /* USER CODE BEGIN TIM1_TRG_COM_TIM17_IRQn 1 */ /* USER CODE END TIM1_TRG_COM_TIM17_IRQn 1 */ } 80039ae: bf00 nop 80039b0: bd80 pop {r7, pc} 80039b2: bf00 nop 80039b4: 2000126c .word 0x2000126c 080039b8 : /** * @brief This function handles USART1 global interrupt. */ void USART1_IRQHandler(void) { 80039b8: b580 push {r7, lr} 80039ba: af00 add r7, sp, #0 /* USER CODE BEGIN USART1_IRQn 0 */ /* USER CODE END USART1_IRQn 0 */ HAL_UART_IRQHandler(&huart1); 80039bc: 4802 ldr r0, [pc, #8] @ (80039c8 ) 80039be: f005 f9ff bl 8008dc0 /* USER CODE BEGIN USART1_IRQn 1 */ /* USER CODE END USART1_IRQn 1 */ } 80039c2: bf00 nop 80039c4: bd80 pop {r7, pc} 80039c6: bf00 nop 80039c8: 20000c70 .word 0x20000c70 080039cc : /** * @brief This function handles EXTI line[15:10] interrupts. */ void EXTI15_10_IRQHandler(void) { 80039cc: b580 push {r7, lr} 80039ce: af00 add r7, sp, #0 /* USER CODE BEGIN EXTI15_10_IRQn 0 */ /* USER CODE END EXTI15_10_IRQn 0 */ HAL_GPIO_EXTI_IRQHandler(LPS22HB_INT_DRDY_EXTI0_Pin); 80039d0: f44f 6080 mov.w r0, #1024 @ 0x400 80039d4: f000 feac bl 8004730 HAL_GPIO_EXTI_IRQHandler(LSM6DSL_INT1_EXTI11_Pin); 80039d8: f44f 6000 mov.w r0, #2048 @ 0x800 80039dc: f000 fea8 bl 8004730 HAL_GPIO_EXTI_IRQHandler(BUTTON_EXTI13_Pin); 80039e0: f44f 5000 mov.w r0, #8192 @ 0x2000 80039e4: f000 fea4 bl 8004730 HAL_GPIO_EXTI_IRQHandler(ARD_D2_Pin); 80039e8: f44f 4080 mov.w r0, #16384 @ 0x4000 80039ec: f000 fea0 bl 8004730 HAL_GPIO_EXTI_IRQHandler(HTS221_DRDY_EXTI15_Pin); 80039f0: f44f 4000 mov.w r0, #32768 @ 0x8000 80039f4: f000 fe9c bl 8004730 /* USER CODE BEGIN EXTI15_10_IRQn 1 */ /* USER CODE END EXTI15_10_IRQn 1 */ } 80039f8: bf00 nop 80039fa: bd80 pop {r7, pc} 080039fc <_getpid>: void initialise_monitor_handles() { } int _getpid(void) { 80039fc: b480 push {r7} 80039fe: af00 add r7, sp, #0 return 1; 8003a00: 2301 movs r3, #1 } 8003a02: 4618 mov r0, r3 8003a04: 46bd mov sp, r7 8003a06: f85d 7b04 ldr.w r7, [sp], #4 8003a0a: 4770 bx lr 08003a0c <_kill>: int _kill(int pid, int sig) { 8003a0c: b580 push {r7, lr} 8003a0e: b082 sub sp, #8 8003a10: af00 add r7, sp, #0 8003a12: 6078 str r0, [r7, #4] 8003a14: 6039 str r1, [r7, #0] (void)pid; (void)sig; errno = EINVAL; 8003a16: f00c fe55 bl 80106c4 <__errno> 8003a1a: 4603 mov r3, r0 8003a1c: 2216 movs r2, #22 8003a1e: 601a str r2, [r3, #0] return -1; 8003a20: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff } 8003a24: 4618 mov r0, r3 8003a26: 3708 adds r7, #8 8003a28: 46bd mov sp, r7 8003a2a: bd80 pop {r7, pc} 08003a2c <_exit>: void _exit (int status) { 8003a2c: b580 push {r7, lr} 8003a2e: b082 sub sp, #8 8003a30: af00 add r7, sp, #0 8003a32: 6078 str r0, [r7, #4] _kill(status, -1); 8003a34: f04f 31ff mov.w r1, #4294967295 @ 0xffffffff 8003a38: 6878 ldr r0, [r7, #4] 8003a3a: f7ff ffe7 bl 8003a0c <_kill> while (1) {} /* Make sure we hang here */ 8003a3e: bf00 nop 8003a40: e7fd b.n 8003a3e <_exit+0x12> 08003a42 <_read>: } __attribute__((weak)) int _read(int file, char *ptr, int len) { 8003a42: b580 push {r7, lr} 8003a44: b086 sub sp, #24 8003a46: af00 add r7, sp, #0 8003a48: 60f8 str r0, [r7, #12] 8003a4a: 60b9 str r1, [r7, #8] 8003a4c: 607a str r2, [r7, #4] (void)file; int DataIdx; for (DataIdx = 0; DataIdx < len; DataIdx++) 8003a4e: 2300 movs r3, #0 8003a50: 617b str r3, [r7, #20] 8003a52: e00a b.n 8003a6a <_read+0x28> { *ptr++ = __io_getchar(); 8003a54: f7ff fbfe bl 8003254 <__io_getchar> 8003a58: 4601 mov r1, r0 8003a5a: 68bb ldr r3, [r7, #8] 8003a5c: 1c5a adds r2, r3, #1 8003a5e: 60ba str r2, [r7, #8] 8003a60: b2ca uxtb r2, r1 8003a62: 701a strb r2, [r3, #0] for (DataIdx = 0; DataIdx < len; DataIdx++) 8003a64: 697b ldr r3, [r7, #20] 8003a66: 3301 adds r3, #1 8003a68: 617b str r3, [r7, #20] 8003a6a: 697a ldr r2, [r7, #20] 8003a6c: 687b ldr r3, [r7, #4] 8003a6e: 429a cmp r2, r3 8003a70: dbf0 blt.n 8003a54 <_read+0x12> } return len; 8003a72: 687b ldr r3, [r7, #4] } 8003a74: 4618 mov r0, r3 8003a76: 3718 adds r7, #24 8003a78: 46bd mov sp, r7 8003a7a: bd80 pop {r7, pc} 08003a7c <_write>: __attribute__((weak)) int _write(int file, char *ptr, int len) { 8003a7c: b580 push {r7, lr} 8003a7e: b086 sub sp, #24 8003a80: af00 add r7, sp, #0 8003a82: 60f8 str r0, [r7, #12] 8003a84: 60b9 str r1, [r7, #8] 8003a86: 607a str r2, [r7, #4] (void)file; int DataIdx; for (DataIdx = 0; DataIdx < len; DataIdx++) 8003a88: 2300 movs r3, #0 8003a8a: 617b str r3, [r7, #20] 8003a8c: e009 b.n 8003aa2 <_write+0x26> { __io_putchar(*ptr++); 8003a8e: 68bb ldr r3, [r7, #8] 8003a90: 1c5a adds r2, r3, #1 8003a92: 60ba str r2, [r7, #8] 8003a94: 781b ldrb r3, [r3, #0] 8003a96: 4618 mov r0, r3 8003a98: f7ff fbc0 bl 800321c <__io_putchar> for (DataIdx = 0; DataIdx < len; DataIdx++) 8003a9c: 697b ldr r3, [r7, #20] 8003a9e: 3301 adds r3, #1 8003aa0: 617b str r3, [r7, #20] 8003aa2: 697a ldr r2, [r7, #20] 8003aa4: 687b ldr r3, [r7, #4] 8003aa6: 429a cmp r2, r3 8003aa8: dbf1 blt.n 8003a8e <_write+0x12> } return len; 8003aaa: 687b ldr r3, [r7, #4] } 8003aac: 4618 mov r0, r3 8003aae: 3718 adds r7, #24 8003ab0: 46bd mov sp, r7 8003ab2: bd80 pop {r7, pc} 08003ab4 <_close>: int _close(int file) { 8003ab4: b480 push {r7} 8003ab6: b083 sub sp, #12 8003ab8: af00 add r7, sp, #0 8003aba: 6078 str r0, [r7, #4] (void)file; return -1; 8003abc: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff } 8003ac0: 4618 mov r0, r3 8003ac2: 370c adds r7, #12 8003ac4: 46bd mov sp, r7 8003ac6: f85d 7b04 ldr.w r7, [sp], #4 8003aca: 4770 bx lr 08003acc <_fstat>: int _fstat(int file, struct stat *st) { 8003acc: b480 push {r7} 8003ace: b083 sub sp, #12 8003ad0: af00 add r7, sp, #0 8003ad2: 6078 str r0, [r7, #4] 8003ad4: 6039 str r1, [r7, #0] (void)file; st->st_mode = S_IFCHR; 8003ad6: 683b ldr r3, [r7, #0] 8003ad8: f44f 5200 mov.w r2, #8192 @ 0x2000 8003adc: 605a str r2, [r3, #4] return 0; 8003ade: 2300 movs r3, #0 } 8003ae0: 4618 mov r0, r3 8003ae2: 370c adds r7, #12 8003ae4: 46bd mov sp, r7 8003ae6: f85d 7b04 ldr.w r7, [sp], #4 8003aea: 4770 bx lr 08003aec <_isatty>: int _isatty(int file) { 8003aec: b480 push {r7} 8003aee: b083 sub sp, #12 8003af0: af00 add r7, sp, #0 8003af2: 6078 str r0, [r7, #4] (void)file; return 1; 8003af4: 2301 movs r3, #1 } 8003af6: 4618 mov r0, r3 8003af8: 370c adds r7, #12 8003afa: 46bd mov sp, r7 8003afc: f85d 7b04 ldr.w r7, [sp], #4 8003b00: 4770 bx lr 08003b02 <_lseek>: int _lseek(int file, int ptr, int dir) { 8003b02: b480 push {r7} 8003b04: b085 sub sp, #20 8003b06: af00 add r7, sp, #0 8003b08: 60f8 str r0, [r7, #12] 8003b0a: 60b9 str r1, [r7, #8] 8003b0c: 607a str r2, [r7, #4] (void)file; (void)ptr; (void)dir; return 0; 8003b0e: 2300 movs r3, #0 } 8003b10: 4618 mov r0, r3 8003b12: 3714 adds r7, #20 8003b14: 46bd mov sp, r7 8003b16: f85d 7b04 ldr.w r7, [sp], #4 8003b1a: 4770 bx lr 08003b1c <_sbrk>: * * @param incr Memory size * @return Pointer to allocated memory */ void *_sbrk(ptrdiff_t incr) { 8003b1c: b580 push {r7, lr} 8003b1e: b086 sub sp, #24 8003b20: af00 add r7, sp, #0 8003b22: 6078 str r0, [r7, #4] extern uint8_t _end; /* Symbol defined in the linker script */ extern uint8_t _estack; /* Symbol defined in the linker script */ extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */ const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size; 8003b24: 4a14 ldr r2, [pc, #80] @ (8003b78 <_sbrk+0x5c>) 8003b26: 4b15 ldr r3, [pc, #84] @ (8003b7c <_sbrk+0x60>) 8003b28: 1ad3 subs r3, r2, r3 8003b2a: 617b str r3, [r7, #20] const uint8_t *max_heap = (uint8_t *)stack_limit; 8003b2c: 697b ldr r3, [r7, #20] 8003b2e: 613b str r3, [r7, #16] uint8_t *prev_heap_end; /* Initialize heap end at first call */ if (NULL == __sbrk_heap_end) 8003b30: 4b13 ldr r3, [pc, #76] @ (8003b80 <_sbrk+0x64>) 8003b32: 681b ldr r3, [r3, #0] 8003b34: 2b00 cmp r3, #0 8003b36: d102 bne.n 8003b3e <_sbrk+0x22> { __sbrk_heap_end = &_end; 8003b38: 4b11 ldr r3, [pc, #68] @ (8003b80 <_sbrk+0x64>) 8003b3a: 4a12 ldr r2, [pc, #72] @ (8003b84 <_sbrk+0x68>) 8003b3c: 601a str r2, [r3, #0] } /* Protect heap from growing into the reserved MSP stack */ if (__sbrk_heap_end + incr > max_heap) 8003b3e: 4b10 ldr r3, [pc, #64] @ (8003b80 <_sbrk+0x64>) 8003b40: 681a ldr r2, [r3, #0] 8003b42: 687b ldr r3, [r7, #4] 8003b44: 4413 add r3, r2 8003b46: 693a ldr r2, [r7, #16] 8003b48: 429a cmp r2, r3 8003b4a: d207 bcs.n 8003b5c <_sbrk+0x40> { errno = ENOMEM; 8003b4c: f00c fdba bl 80106c4 <__errno> 8003b50: 4603 mov r3, r0 8003b52: 220c movs r2, #12 8003b54: 601a str r2, [r3, #0] return (void *)-1; 8003b56: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff 8003b5a: e009 b.n 8003b70 <_sbrk+0x54> } prev_heap_end = __sbrk_heap_end; 8003b5c: 4b08 ldr r3, [pc, #32] @ (8003b80 <_sbrk+0x64>) 8003b5e: 681b ldr r3, [r3, #0] 8003b60: 60fb str r3, [r7, #12] __sbrk_heap_end += incr; 8003b62: 4b07 ldr r3, [pc, #28] @ (8003b80 <_sbrk+0x64>) 8003b64: 681a ldr r2, [r3, #0] 8003b66: 687b ldr r3, [r7, #4] 8003b68: 4413 add r3, r2 8003b6a: 4a05 ldr r2, [pc, #20] @ (8003b80 <_sbrk+0x64>) 8003b6c: 6013 str r3, [r2, #0] return (void *)prev_heap_end; 8003b6e: 68fb ldr r3, [r7, #12] } 8003b70: 4618 mov r0, r3 8003b72: 3718 adds r7, #24 8003b74: 46bd mov sp, r7 8003b76: bd80 pop {r7, pc} 8003b78: 20018000 .word 0x20018000 8003b7c: 00000400 .word 0x00000400 8003b80: 200012b8 .word 0x200012b8 8003b84: 200036b0 .word 0x200036b0 08003b88 : * @brief Setup the microcontroller system. * @retval None */ void SystemInit(void) { 8003b88: b480 push {r7} 8003b8a: af00 add r7, sp, #0 SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; #endif /* FPU settings ------------------------------------------------------------*/ #if (__FPU_PRESENT == 1) && (__FPU_USED == 1) SCB->CPACR |= ((3UL << 20U)|(3UL << 22U)); /* set CP10 and CP11 Full Access */ 8003b8c: 4b06 ldr r3, [pc, #24] @ (8003ba8 ) 8003b8e: f8d3 3088 ldr.w r3, [r3, #136] @ 0x88 8003b92: 4a05 ldr r2, [pc, #20] @ (8003ba8 ) 8003b94: f443 0370 orr.w r3, r3, #15728640 @ 0xf00000 8003b98: f8c2 3088 str.w r3, [r2, #136] @ 0x88 #endif } 8003b9c: bf00 nop 8003b9e: 46bd mov sp, r7 8003ba0: f85d 7b04 ldr.w r7, [sp], #4 8003ba4: 4770 bx lr 8003ba6: bf00 nop 8003ba8: e000ed00 .word 0xe000ed00 08003bac : 8003bac: f8df d034 ldr.w sp, [pc, #52] @ 8003be4 8003bb0: f7ff ffea bl 8003b88 8003bb4: 480c ldr r0, [pc, #48] @ (8003be8 ) 8003bb6: 490d ldr r1, [pc, #52] @ (8003bec ) 8003bb8: 4a0d ldr r2, [pc, #52] @ (8003bf0 ) 8003bba: 2300 movs r3, #0 8003bbc: e002 b.n 8003bc4 08003bbe : 8003bbe: 58d4 ldr r4, [r2, r3] 8003bc0: 50c4 str r4, [r0, r3] 8003bc2: 3304 adds r3, #4 08003bc4 : 8003bc4: 18c4 adds r4, r0, r3 8003bc6: 428c cmp r4, r1 8003bc8: d3f9 bcc.n 8003bbe 8003bca: 4a0a ldr r2, [pc, #40] @ (8003bf4 ) 8003bcc: 4c0a ldr r4, [pc, #40] @ (8003bf8 ) 8003bce: 2300 movs r3, #0 8003bd0: e001 b.n 8003bd6 08003bd2 : 8003bd2: 6013 str r3, [r2, #0] 8003bd4: 3204 adds r2, #4 08003bd6 : 8003bd6: 42a2 cmp r2, r4 8003bd8: d3fb bcc.n 8003bd2 8003bda: f00c fd79 bl 80106d0 <__libc_init_array> 8003bde: f7fe ff03 bl 80029e8
08003be2 : 8003be2: e7fe b.n 8003be2 8003be4: 20018000 .word 0x20018000 8003be8: 20000000 .word 0x20000000 8003bec: 2000029c .word 0x2000029c 8003bf0: 080153b4 .word 0x080153b4 8003bf4: 2000029c .word 0x2000029c 8003bf8: 200036b0 .word 0x200036b0 08003bfc : 8003bfc: e7fe b.n 8003bfc 08003bfe : * each 1ms in the SysTick_Handler() interrupt handler. * * @retval HAL status */ HAL_StatusTypeDef HAL_Init(void) { 8003bfe: b580 push {r7, lr} 8003c00: b082 sub sp, #8 8003c02: af00 add r7, sp, #0 HAL_StatusTypeDef status = HAL_OK; 8003c04: 2300 movs r3, #0 8003c06: 71fb strb r3, [r7, #7] #if (PREFETCH_ENABLE != 0) __HAL_FLASH_PREFETCH_BUFFER_ENABLE(); #endif /* PREFETCH_ENABLE */ /* Set Interrupt Group Priority */ HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); 8003c08: 2003 movs r0, #3 8003c0a: f000 f902 bl 8003e12 /* Use SysTick as time base source and configure 1ms tick (default clock after Reset is MSI) */ if (HAL_InitTick(TICK_INT_PRIORITY) != HAL_OK) 8003c0e: 2000 movs r0, #0 8003c10: f7ff fe2e bl 8003870 8003c14: 4603 mov r3, r0 8003c16: 2b00 cmp r3, #0 8003c18: d002 beq.n 8003c20 { status = HAL_ERROR; 8003c1a: 2301 movs r3, #1 8003c1c: 71fb strb r3, [r7, #7] 8003c1e: e001 b.n 8003c24 } else { /* Init the low level hardware */ HAL_MspInit(); 8003c20: f7ff fb2a bl 8003278 } /* Return function status */ return status; 8003c24: 79fb ldrb r3, [r7, #7] } 8003c26: 4618 mov r0, r3 8003c28: 3708 adds r7, #8 8003c2a: 46bd mov sp, r7 8003c2c: bd80 pop {r7, pc} ... 08003c30 : * @note This function is declared as __weak to be overwritten in case of other * implementations in user file. * @retval None */ __weak void HAL_IncTick(void) { 8003c30: b480 push {r7} 8003c32: af00 add r7, sp, #0 uwTick += (uint32_t)uwTickFreq; 8003c34: 4b06 ldr r3, [pc, #24] @ (8003c50 ) 8003c36: 781b ldrb r3, [r3, #0] 8003c38: 461a mov r2, r3 8003c3a: 4b06 ldr r3, [pc, #24] @ (8003c54 ) 8003c3c: 681b ldr r3, [r3, #0] 8003c3e: 4413 add r3, r2 8003c40: 4a04 ldr r2, [pc, #16] @ (8003c54 ) 8003c42: 6013 str r3, [r2, #0] } 8003c44: bf00 nop 8003c46: 46bd mov sp, r7 8003c48: f85d 7b04 ldr.w r7, [sp], #4 8003c4c: 4770 bx lr 8003c4e: bf00 nop 8003c50: 200000cc .word 0x200000cc 8003c54: 200012bc .word 0x200012bc 08003c58 : * @note This function is declared as __weak to be overwritten in case of other * implementations in user file. * @retval tick value */ __weak uint32_t HAL_GetTick(void) { 8003c58: b480 push {r7} 8003c5a: af00 add r7, sp, #0 return uwTick; 8003c5c: 4b03 ldr r3, [pc, #12] @ (8003c6c ) 8003c5e: 681b ldr r3, [r3, #0] } 8003c60: 4618 mov r0, r3 8003c62: 46bd mov sp, r7 8003c64: f85d 7b04 ldr.w r7, [sp], #4 8003c68: 4770 bx lr 8003c6a: bf00 nop 8003c6c: 200012bc .word 0x200012bc 08003c70 : * implementations in user file. * @param Delay specifies the delay time length, in milliseconds. * @retval None */ __weak void HAL_Delay(uint32_t Delay) { 8003c70: b580 push {r7, lr} 8003c72: b084 sub sp, #16 8003c74: af00 add r7, sp, #0 8003c76: 6078 str r0, [r7, #4] uint32_t tickstart = HAL_GetTick(); 8003c78: f7ff ffee bl 8003c58 8003c7c: 60b8 str r0, [r7, #8] uint32_t wait = Delay; 8003c7e: 687b ldr r3, [r7, #4] 8003c80: 60fb str r3, [r7, #12] /* Add a period to guaranty minimum wait */ if (wait < HAL_MAX_DELAY) 8003c82: 68fb ldr r3, [r7, #12] 8003c84: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff 8003c88: d005 beq.n 8003c96 { wait += (uint32_t)uwTickFreq; 8003c8a: 4b0a ldr r3, [pc, #40] @ (8003cb4 ) 8003c8c: 781b ldrb r3, [r3, #0] 8003c8e: 461a mov r2, r3 8003c90: 68fb ldr r3, [r7, #12] 8003c92: 4413 add r3, r2 8003c94: 60fb str r3, [r7, #12] } while ((HAL_GetTick() - tickstart) < wait) 8003c96: bf00 nop 8003c98: f7ff ffde bl 8003c58 8003c9c: 4602 mov r2, r0 8003c9e: 68bb ldr r3, [r7, #8] 8003ca0: 1ad3 subs r3, r2, r3 8003ca2: 68fa ldr r2, [r7, #12] 8003ca4: 429a cmp r2, r3 8003ca6: d8f7 bhi.n 8003c98 { } } 8003ca8: bf00 nop 8003caa: bf00 nop 8003cac: 3710 adds r7, #16 8003cae: 46bd mov sp, r7 8003cb0: bd80 pop {r7, pc} 8003cb2: bf00 nop 8003cb4: 200000cc .word 0x200000cc 08003cb8 <__NVIC_SetPriorityGrouping>: In case of a conflict between priority grouping and available priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. \param [in] PriorityGroup Priority grouping field. */ __STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup) { 8003cb8: b480 push {r7} 8003cba: b085 sub sp, #20 8003cbc: af00 add r7, sp, #0 8003cbe: 6078 str r0, [r7, #4] uint32_t reg_value; uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ 8003cc0: 687b ldr r3, [r7, #4] 8003cc2: f003 0307 and.w r3, r3, #7 8003cc6: 60fb str r3, [r7, #12] reg_value = SCB->AIRCR; /* read old register configuration */ 8003cc8: 4b0c ldr r3, [pc, #48] @ (8003cfc <__NVIC_SetPriorityGrouping+0x44>) 8003cca: 68db ldr r3, [r3, #12] 8003ccc: 60bb str r3, [r7, #8] reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ 8003cce: 68ba ldr r2, [r7, #8] 8003cd0: f64f 03ff movw r3, #63743 @ 0xf8ff 8003cd4: 4013 ands r3, r2 8003cd6: 60bb str r3, [r7, #8] reg_value = (reg_value | ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */ 8003cd8: 68fb ldr r3, [r7, #12] 8003cda: 021a lsls r2, r3, #8 ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | 8003cdc: 68bb ldr r3, [r7, #8] 8003cde: 4313 orrs r3, r2 reg_value = (reg_value | 8003ce0: f043 63bf orr.w r3, r3, #100139008 @ 0x5f80000 8003ce4: f443 3300 orr.w r3, r3, #131072 @ 0x20000 8003ce8: 60bb str r3, [r7, #8] SCB->AIRCR = reg_value; 8003cea: 4a04 ldr r2, [pc, #16] @ (8003cfc <__NVIC_SetPriorityGrouping+0x44>) 8003cec: 68bb ldr r3, [r7, #8] 8003cee: 60d3 str r3, [r2, #12] } 8003cf0: bf00 nop 8003cf2: 3714 adds r7, #20 8003cf4: 46bd mov sp, r7 8003cf6: f85d 7b04 ldr.w r7, [sp], #4 8003cfa: 4770 bx lr 8003cfc: e000ed00 .word 0xe000ed00 08003d00 <__NVIC_GetPriorityGrouping>: \brief Get Priority Grouping \details Reads the priority grouping field from the NVIC Interrupt Controller. \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field). */ __STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void) { 8003d00: b480 push {r7} 8003d02: af00 add r7, sp, #0 return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); 8003d04: 4b04 ldr r3, [pc, #16] @ (8003d18 <__NVIC_GetPriorityGrouping+0x18>) 8003d06: 68db ldr r3, [r3, #12] 8003d08: 0a1b lsrs r3, r3, #8 8003d0a: f003 0307 and.w r3, r3, #7 } 8003d0e: 4618 mov r0, r3 8003d10: 46bd mov sp, r7 8003d12: f85d 7b04 ldr.w r7, [sp], #4 8003d16: 4770 bx lr 8003d18: e000ed00 .word 0xe000ed00 08003d1c <__NVIC_EnableIRQ>: \details Enables a device specific interrupt in the NVIC interrupt controller. \param [in] IRQn Device specific interrupt number. \note IRQn must not be negative. */ __STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn) { 8003d1c: b480 push {r7} 8003d1e: b083 sub sp, #12 8003d20: af00 add r7, sp, #0 8003d22: 4603 mov r3, r0 8003d24: 71fb strb r3, [r7, #7] if ((int32_t)(IRQn) >= 0) 8003d26: f997 3007 ldrsb.w r3, [r7, #7] 8003d2a: 2b00 cmp r3, #0 8003d2c: db0b blt.n 8003d46 <__NVIC_EnableIRQ+0x2a> { __COMPILER_BARRIER(); NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); 8003d2e: 79fb ldrb r3, [r7, #7] 8003d30: f003 021f and.w r2, r3, #31 8003d34: 4907 ldr r1, [pc, #28] @ (8003d54 <__NVIC_EnableIRQ+0x38>) 8003d36: f997 3007 ldrsb.w r3, [r7, #7] 8003d3a: 095b lsrs r3, r3, #5 8003d3c: 2001 movs r0, #1 8003d3e: fa00 f202 lsl.w r2, r0, r2 8003d42: f841 2023 str.w r2, [r1, r3, lsl #2] __COMPILER_BARRIER(); } } 8003d46: bf00 nop 8003d48: 370c adds r7, #12 8003d4a: 46bd mov sp, r7 8003d4c: f85d 7b04 ldr.w r7, [sp], #4 8003d50: 4770 bx lr 8003d52: bf00 nop 8003d54: e000e100 .word 0xe000e100 08003d58 <__NVIC_SetPriority>: \param [in] IRQn Interrupt number. \param [in] priority Priority to set. \note The priority cannot be set for every processor exception. */ __STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) { 8003d58: b480 push {r7} 8003d5a: b083 sub sp, #12 8003d5c: af00 add r7, sp, #0 8003d5e: 4603 mov r3, r0 8003d60: 6039 str r1, [r7, #0] 8003d62: 71fb strb r3, [r7, #7] if ((int32_t)(IRQn) >= 0) 8003d64: f997 3007 ldrsb.w r3, [r7, #7] 8003d68: 2b00 cmp r3, #0 8003d6a: db0a blt.n 8003d82 <__NVIC_SetPriority+0x2a> { NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 8003d6c: 683b ldr r3, [r7, #0] 8003d6e: b2da uxtb r2, r3 8003d70: 490c ldr r1, [pc, #48] @ (8003da4 <__NVIC_SetPriority+0x4c>) 8003d72: f997 3007 ldrsb.w r3, [r7, #7] 8003d76: 0112 lsls r2, r2, #4 8003d78: b2d2 uxtb r2, r2 8003d7a: 440b add r3, r1 8003d7c: f883 2300 strb.w r2, [r3, #768] @ 0x300 } else { SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); } } 8003d80: e00a b.n 8003d98 <__NVIC_SetPriority+0x40> SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 8003d82: 683b ldr r3, [r7, #0] 8003d84: b2da uxtb r2, r3 8003d86: 4908 ldr r1, [pc, #32] @ (8003da8 <__NVIC_SetPriority+0x50>) 8003d88: 79fb ldrb r3, [r7, #7] 8003d8a: f003 030f and.w r3, r3, #15 8003d8e: 3b04 subs r3, #4 8003d90: 0112 lsls r2, r2, #4 8003d92: b2d2 uxtb r2, r2 8003d94: 440b add r3, r1 8003d96: 761a strb r2, [r3, #24] } 8003d98: bf00 nop 8003d9a: 370c adds r7, #12 8003d9c: 46bd mov sp, r7 8003d9e: f85d 7b04 ldr.w r7, [sp], #4 8003da2: 4770 bx lr 8003da4: e000e100 .word 0xe000e100 8003da8: e000ed00 .word 0xe000ed00 08003dac : \param [in] PreemptPriority Preemptive priority value (starting from 0). \param [in] SubPriority Subpriority value (starting from 0). \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority(). */ __STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority) { 8003dac: b480 push {r7} 8003dae: b089 sub sp, #36 @ 0x24 8003db0: af00 add r7, sp, #0 8003db2: 60f8 str r0, [r7, #12] 8003db4: 60b9 str r1, [r7, #8] 8003db6: 607a str r2, [r7, #4] uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ 8003db8: 68fb ldr r3, [r7, #12] 8003dba: f003 0307 and.w r3, r3, #7 8003dbe: 61fb str r3, [r7, #28] uint32_t PreemptPriorityBits; uint32_t SubPriorityBits; PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); 8003dc0: 69fb ldr r3, [r7, #28] 8003dc2: f1c3 0307 rsb r3, r3, #7 8003dc6: 2b04 cmp r3, #4 8003dc8: bf28 it cs 8003dca: 2304 movcs r3, #4 8003dcc: 61bb str r3, [r7, #24] SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); 8003dce: 69fb ldr r3, [r7, #28] 8003dd0: 3304 adds r3, #4 8003dd2: 2b06 cmp r3, #6 8003dd4: d902 bls.n 8003ddc 8003dd6: 69fb ldr r3, [r7, #28] 8003dd8: 3b03 subs r3, #3 8003dda: e000 b.n 8003dde 8003ddc: 2300 movs r3, #0 8003dde: 617b str r3, [r7, #20] return ( ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | 8003de0: f04f 32ff mov.w r2, #4294967295 @ 0xffffffff 8003de4: 69bb ldr r3, [r7, #24] 8003de6: fa02 f303 lsl.w r3, r2, r3 8003dea: 43da mvns r2, r3 8003dec: 68bb ldr r3, [r7, #8] 8003dee: 401a ands r2, r3 8003df0: 697b ldr r3, [r7, #20] 8003df2: 409a lsls r2, r3 ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) 8003df4: f04f 31ff mov.w r1, #4294967295 @ 0xffffffff 8003df8: 697b ldr r3, [r7, #20] 8003dfa: fa01 f303 lsl.w r3, r1, r3 8003dfe: 43d9 mvns r1, r3 8003e00: 687b ldr r3, [r7, #4] 8003e02: 400b ands r3, r1 ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | 8003e04: 4313 orrs r3, r2 ); } 8003e06: 4618 mov r0, r3 8003e08: 3724 adds r7, #36 @ 0x24 8003e0a: 46bd mov sp, r7 8003e0c: f85d 7b04 ldr.w r7, [sp], #4 8003e10: 4770 bx lr 08003e12 : * @note When the NVIC_PriorityGroup_0 is selected, IRQ pre-emption is no more possible. * The pending IRQ priority will be managed only by the subpriority. * @retval None */ void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup) { 8003e12: b580 push {r7, lr} 8003e14: b082 sub sp, #8 8003e16: af00 add r7, sp, #0 8003e18: 6078 str r0, [r7, #4] /* Check the parameters */ assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup)); /* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */ NVIC_SetPriorityGrouping(PriorityGroup); 8003e1a: 6878 ldr r0, [r7, #4] 8003e1c: f7ff ff4c bl 8003cb8 <__NVIC_SetPriorityGrouping> } 8003e20: bf00 nop 8003e22: 3708 adds r7, #8 8003e24: 46bd mov sp, r7 8003e26: bd80 pop {r7, pc} 08003e28 : * This parameter can be a value between 0 and 15 * A lower priority value indicates a higher priority. * @retval None */ void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority) { 8003e28: b580 push {r7, lr} 8003e2a: b086 sub sp, #24 8003e2c: af00 add r7, sp, #0 8003e2e: 4603 mov r3, r0 8003e30: 60b9 str r1, [r7, #8] 8003e32: 607a str r2, [r7, #4] 8003e34: 73fb strb r3, [r7, #15] uint32_t prioritygroup = 0x00; 8003e36: 2300 movs r3, #0 8003e38: 617b str r3, [r7, #20] /* Check the parameters */ assert_param(IS_NVIC_SUB_PRIORITY(SubPriority)); assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority)); prioritygroup = NVIC_GetPriorityGrouping(); 8003e3a: f7ff ff61 bl 8003d00 <__NVIC_GetPriorityGrouping> 8003e3e: 6178 str r0, [r7, #20] NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority)); 8003e40: 687a ldr r2, [r7, #4] 8003e42: 68b9 ldr r1, [r7, #8] 8003e44: 6978 ldr r0, [r7, #20] 8003e46: f7ff ffb1 bl 8003dac 8003e4a: 4602 mov r2, r0 8003e4c: f997 300f ldrsb.w r3, [r7, #15] 8003e50: 4611 mov r1, r2 8003e52: 4618 mov r0, r3 8003e54: f7ff ff80 bl 8003d58 <__NVIC_SetPriority> } 8003e58: bf00 nop 8003e5a: 3718 adds r7, #24 8003e5c: 46bd mov sp, r7 8003e5e: bd80 pop {r7, pc} 08003e60 : * This parameter can be an enumerator of IRQn_Type enumeration * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32l4xxxx.h)) * @retval None */ void HAL_NVIC_EnableIRQ(IRQn_Type IRQn) { 8003e60: b580 push {r7, lr} 8003e62: b082 sub sp, #8 8003e64: af00 add r7, sp, #0 8003e66: 4603 mov r3, r0 8003e68: 71fb strb r3, [r7, #7] /* Check the parameters */ assert_param(IS_NVIC_DEVICE_IRQ(IRQn)); /* Enable interrupt */ NVIC_EnableIRQ(IRQn); 8003e6a: f997 3007 ldrsb.w r3, [r7, #7] 8003e6e: 4618 mov r0, r3 8003e70: f7ff ff54 bl 8003d1c <__NVIC_EnableIRQ> } 8003e74: bf00 nop 8003e76: 3708 adds r7, #8 8003e78: 46bd mov sp, r7 8003e7a: bd80 pop {r7, pc} 08003e7c : * in the DFSDM_ChannelInitTypeDef structure and initialize the associated handle. * @param hdfsdm_channel DFSDM channel handle. * @retval HAL status. */ HAL_StatusTypeDef HAL_DFSDM_ChannelInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel) { 8003e7c: b580 push {r7, lr} 8003e7e: b082 sub sp, #8 8003e80: af00 add r7, sp, #0 8003e82: 6078 str r0, [r7, #4] /* Check DFSDM Channel handle */ if (hdfsdm_channel == NULL) 8003e84: 687b ldr r3, [r7, #4] 8003e86: 2b00 cmp r3, #0 8003e88: d101 bne.n 8003e8e { return HAL_ERROR; 8003e8a: 2301 movs r3, #1 8003e8c: e0ac b.n 8003fe8 assert_param(IS_DFSDM_CHANNEL_FILTER_OVS_RATIO(hdfsdm_channel->Init.Awd.Oversampling)); assert_param(IS_DFSDM_CHANNEL_OFFSET(hdfsdm_channel->Init.Offset)); assert_param(IS_DFSDM_CHANNEL_RIGHT_BIT_SHIFT(hdfsdm_channel->Init.RightBitShift)); /* Check that channel has not been already initialized */ if (a_dfsdm1ChannelHandle[DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance)] != NULL) 8003e8e: 687b ldr r3, [r7, #4] 8003e90: 681b ldr r3, [r3, #0] 8003e92: 4618 mov r0, r3 8003e94: f000 f8b2 bl 8003ffc 8003e98: 4603 mov r3, r0 8003e9a: 4a55 ldr r2, [pc, #340] @ (8003ff0 ) 8003e9c: f852 3023 ldr.w r3, [r2, r3, lsl #2] 8003ea0: 2b00 cmp r3, #0 8003ea2: d001 beq.n 8003ea8 { return HAL_ERROR; 8003ea4: 2301 movs r3, #1 8003ea6: e09f b.n 8003fe8 hdfsdm_channel->MspInitCallback = HAL_DFSDM_ChannelMspInit; } hdfsdm_channel->MspInitCallback(hdfsdm_channel); #else /* Call MSP init function */ HAL_DFSDM_ChannelMspInit(hdfsdm_channel); 8003ea8: 6878 ldr r0, [r7, #4] 8003eaa: f7ff fa0d bl 80032c8 #endif /* Update the channel counter */ v_dfsdm1ChannelCounter++; 8003eae: 4b51 ldr r3, [pc, #324] @ (8003ff4 ) 8003eb0: 681b ldr r3, [r3, #0] 8003eb2: 3301 adds r3, #1 8003eb4: 4a4f ldr r2, [pc, #316] @ (8003ff4 ) 8003eb6: 6013 str r3, [r2, #0] /* Configure output serial clock and enable global DFSDM interface only for first channel */ if (v_dfsdm1ChannelCounter == 1U) 8003eb8: 4b4e ldr r3, [pc, #312] @ (8003ff4 ) 8003eba: 681b ldr r3, [r3, #0] 8003ebc: 2b01 cmp r3, #1 8003ebe: d125 bne.n 8003f0c { assert_param(IS_DFSDM_CHANNEL_OUTPUT_CLOCK(hdfsdm_channel->Init.OutputClock.Selection)); /* Set the output serial clock source */ DFSDM1_Channel0->CHCFGR1 &= ~(DFSDM_CHCFGR1_CKOUTSRC); 8003ec0: 4b4d ldr r3, [pc, #308] @ (8003ff8 ) 8003ec2: 681b ldr r3, [r3, #0] 8003ec4: 4a4c ldr r2, [pc, #304] @ (8003ff8 ) 8003ec6: f023 4380 bic.w r3, r3, #1073741824 @ 0x40000000 8003eca: 6013 str r3, [r2, #0] DFSDM1_Channel0->CHCFGR1 |= hdfsdm_channel->Init.OutputClock.Selection; 8003ecc: 4b4a ldr r3, [pc, #296] @ (8003ff8 ) 8003ece: 681a ldr r2, [r3, #0] 8003ed0: 687b ldr r3, [r7, #4] 8003ed2: 689b ldr r3, [r3, #8] 8003ed4: 4948 ldr r1, [pc, #288] @ (8003ff8 ) 8003ed6: 4313 orrs r3, r2 8003ed8: 600b str r3, [r1, #0] /* Reset clock divider */ DFSDM1_Channel0->CHCFGR1 &= ~(DFSDM_CHCFGR1_CKOUTDIV); 8003eda: 4b47 ldr r3, [pc, #284] @ (8003ff8 ) 8003edc: 681b ldr r3, [r3, #0] 8003ede: 4a46 ldr r2, [pc, #280] @ (8003ff8 ) 8003ee0: f423 037f bic.w r3, r3, #16711680 @ 0xff0000 8003ee4: 6013 str r3, [r2, #0] if (hdfsdm_channel->Init.OutputClock.Activation == ENABLE) 8003ee6: 687b ldr r3, [r7, #4] 8003ee8: 791b ldrb r3, [r3, #4] 8003eea: 2b01 cmp r3, #1 8003eec: d108 bne.n 8003f00 { assert_param(IS_DFSDM_CHANNEL_OUTPUT_CLOCK_DIVIDER(hdfsdm_channel->Init.OutputClock.Divider)); /* Set the output clock divider */ DFSDM1_Channel0->CHCFGR1 |= (uint32_t)((hdfsdm_channel->Init.OutputClock.Divider - 1U) << 8003eee: 4b42 ldr r3, [pc, #264] @ (8003ff8 ) 8003ef0: 681a ldr r2, [r3, #0] 8003ef2: 687b ldr r3, [r7, #4] 8003ef4: 68db ldr r3, [r3, #12] 8003ef6: 3b01 subs r3, #1 8003ef8: 041b lsls r3, r3, #16 8003efa: 493f ldr r1, [pc, #252] @ (8003ff8 ) 8003efc: 4313 orrs r3, r2 8003efe: 600b str r3, [r1, #0] DFSDM_CHCFGR1_CKOUTDIV_Pos); } /* enable the DFSDM global interface */ DFSDM1_Channel0->CHCFGR1 |= DFSDM_CHCFGR1_DFSDMEN; 8003f00: 4b3d ldr r3, [pc, #244] @ (8003ff8 ) 8003f02: 681b ldr r3, [r3, #0] 8003f04: 4a3c ldr r2, [pc, #240] @ (8003ff8 ) 8003f06: f043 4300 orr.w r3, r3, #2147483648 @ 0x80000000 8003f0a: 6013 str r3, [r2, #0] } /* Set channel input parameters */ hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_DATPACK | DFSDM_CHCFGR1_DATMPX | 8003f0c: 687b ldr r3, [r7, #4] 8003f0e: 681b ldr r3, [r3, #0] 8003f10: 681a ldr r2, [r3, #0] 8003f12: 687b ldr r3, [r7, #4] 8003f14: 681b ldr r3, [r3, #0] 8003f16: f422 4271 bic.w r2, r2, #61696 @ 0xf100 8003f1a: 601a str r2, [r3, #0] DFSDM_CHCFGR1_CHINSEL); hdfsdm_channel->Instance->CHCFGR1 |= (hdfsdm_channel->Init.Input.Multiplexer | 8003f1c: 687b ldr r3, [r7, #4] 8003f1e: 681b ldr r3, [r3, #0] 8003f20: 6819 ldr r1, [r3, #0] 8003f22: 687b ldr r3, [r7, #4] 8003f24: 691a ldr r2, [r3, #16] hdfsdm_channel->Init.Input.DataPacking | 8003f26: 687b ldr r3, [r7, #4] 8003f28: 695b ldr r3, [r3, #20] hdfsdm_channel->Instance->CHCFGR1 |= (hdfsdm_channel->Init.Input.Multiplexer | 8003f2a: 431a orrs r2, r3 hdfsdm_channel->Init.Input.Pins); 8003f2c: 687b ldr r3, [r7, #4] 8003f2e: 699b ldr r3, [r3, #24] hdfsdm_channel->Init.Input.DataPacking | 8003f30: 431a orrs r2, r3 hdfsdm_channel->Instance->CHCFGR1 |= (hdfsdm_channel->Init.Input.Multiplexer | 8003f32: 687b ldr r3, [r7, #4] 8003f34: 681b ldr r3, [r3, #0] 8003f36: 430a orrs r2, r1 8003f38: 601a str r2, [r3, #0] /* Set serial interface parameters */ hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_SITP | DFSDM_CHCFGR1_SPICKSEL); 8003f3a: 687b ldr r3, [r7, #4] 8003f3c: 681b ldr r3, [r3, #0] 8003f3e: 681a ldr r2, [r3, #0] 8003f40: 687b ldr r3, [r7, #4] 8003f42: 681b ldr r3, [r3, #0] 8003f44: f022 020f bic.w r2, r2, #15 8003f48: 601a str r2, [r3, #0] hdfsdm_channel->Instance->CHCFGR1 |= (hdfsdm_channel->Init.SerialInterface.Type | 8003f4a: 687b ldr r3, [r7, #4] 8003f4c: 681b ldr r3, [r3, #0] 8003f4e: 6819 ldr r1, [r3, #0] 8003f50: 687b ldr r3, [r7, #4] 8003f52: 69da ldr r2, [r3, #28] hdfsdm_channel->Init.SerialInterface.SpiClock); 8003f54: 687b ldr r3, [r7, #4] 8003f56: 6a1b ldr r3, [r3, #32] hdfsdm_channel->Instance->CHCFGR1 |= (hdfsdm_channel->Init.SerialInterface.Type | 8003f58: 431a orrs r2, r3 8003f5a: 687b ldr r3, [r7, #4] 8003f5c: 681b ldr r3, [r3, #0] 8003f5e: 430a orrs r2, r1 8003f60: 601a str r2, [r3, #0] /* Set analog watchdog parameters */ hdfsdm_channel->Instance->CHAWSCDR &= ~(DFSDM_CHAWSCDR_AWFORD | DFSDM_CHAWSCDR_AWFOSR); 8003f62: 687b ldr r3, [r7, #4] 8003f64: 681b ldr r3, [r3, #0] 8003f66: 689a ldr r2, [r3, #8] 8003f68: 687b ldr r3, [r7, #4] 8003f6a: 681b ldr r3, [r3, #0] 8003f6c: f422 025f bic.w r2, r2, #14614528 @ 0xdf0000 8003f70: 609a str r2, [r3, #8] hdfsdm_channel->Instance->CHAWSCDR |= (hdfsdm_channel->Init.Awd.FilterOrder | 8003f72: 687b ldr r3, [r7, #4] 8003f74: 681b ldr r3, [r3, #0] 8003f76: 6899 ldr r1, [r3, #8] 8003f78: 687b ldr r3, [r7, #4] 8003f7a: 6a5a ldr r2, [r3, #36] @ 0x24 ((hdfsdm_channel->Init.Awd.Oversampling - 1U) << DFSDM_CHAWSCDR_AWFOSR_Pos)); 8003f7c: 687b ldr r3, [r7, #4] 8003f7e: 6a9b ldr r3, [r3, #40] @ 0x28 8003f80: 3b01 subs r3, #1 8003f82: 041b lsls r3, r3, #16 hdfsdm_channel->Instance->CHAWSCDR |= (hdfsdm_channel->Init.Awd.FilterOrder | 8003f84: 431a orrs r2, r3 8003f86: 687b ldr r3, [r7, #4] 8003f88: 681b ldr r3, [r3, #0] 8003f8a: 430a orrs r2, r1 8003f8c: 609a str r2, [r3, #8] /* Set channel offset and right bit shift */ hdfsdm_channel->Instance->CHCFGR2 &= ~(DFSDM_CHCFGR2_OFFSET | DFSDM_CHCFGR2_DTRBS); 8003f8e: 687b ldr r3, [r7, #4] 8003f90: 681b ldr r3, [r3, #0] 8003f92: 685a ldr r2, [r3, #4] 8003f94: 687b ldr r3, [r7, #4] 8003f96: 681b ldr r3, [r3, #0] 8003f98: f002 0207 and.w r2, r2, #7 8003f9c: 605a str r2, [r3, #4] hdfsdm_channel->Instance->CHCFGR2 |= (((uint32_t) hdfsdm_channel->Init.Offset << DFSDM_CHCFGR2_OFFSET_Pos) | 8003f9e: 687b ldr r3, [r7, #4] 8003fa0: 681b ldr r3, [r3, #0] 8003fa2: 6859 ldr r1, [r3, #4] 8003fa4: 687b ldr r3, [r7, #4] 8003fa6: 6adb ldr r3, [r3, #44] @ 0x2c 8003fa8: 021a lsls r2, r3, #8 (hdfsdm_channel->Init.RightBitShift << DFSDM_CHCFGR2_DTRBS_Pos)); 8003faa: 687b ldr r3, [r7, #4] 8003fac: 6b1b ldr r3, [r3, #48] @ 0x30 8003fae: 00db lsls r3, r3, #3 hdfsdm_channel->Instance->CHCFGR2 |= (((uint32_t) hdfsdm_channel->Init.Offset << DFSDM_CHCFGR2_OFFSET_Pos) | 8003fb0: 431a orrs r2, r3 8003fb2: 687b ldr r3, [r7, #4] 8003fb4: 681b ldr r3, [r3, #0] 8003fb6: 430a orrs r2, r1 8003fb8: 605a str r2, [r3, #4] /* Enable DFSDM channel */ hdfsdm_channel->Instance->CHCFGR1 |= DFSDM_CHCFGR1_CHEN; 8003fba: 687b ldr r3, [r7, #4] 8003fbc: 681b ldr r3, [r3, #0] 8003fbe: 681a ldr r2, [r3, #0] 8003fc0: 687b ldr r3, [r7, #4] 8003fc2: 681b ldr r3, [r3, #0] 8003fc4: f042 0280 orr.w r2, r2, #128 @ 0x80 8003fc8: 601a str r2, [r3, #0] /* Set DFSDM Channel to ready state */ hdfsdm_channel->State = HAL_DFSDM_CHANNEL_STATE_READY; 8003fca: 687b ldr r3, [r7, #4] 8003fcc: 2201 movs r2, #1 8003fce: f883 2034 strb.w r2, [r3, #52] @ 0x34 /* Store channel handle in DFSDM channel handle table */ a_dfsdm1ChannelHandle[DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance)] = hdfsdm_channel; 8003fd2: 687b ldr r3, [r7, #4] 8003fd4: 681b ldr r3, [r3, #0] 8003fd6: 4618 mov r0, r3 8003fd8: f000 f810 bl 8003ffc 8003fdc: 4602 mov r2, r0 8003fde: 4904 ldr r1, [pc, #16] @ (8003ff0 ) 8003fe0: 687b ldr r3, [r7, #4] 8003fe2: f841 3022 str.w r3, [r1, r2, lsl #2] return HAL_OK; 8003fe6: 2300 movs r3, #0 } 8003fe8: 4618 mov r0, r3 8003fea: 3708 adds r7, #8 8003fec: 46bd mov sp, r7 8003fee: bd80 pop {r7, pc} 8003ff0: 200012c4 .word 0x200012c4 8003ff4: 200012c0 .word 0x200012c0 8003ff8: 40016000 .word 0x40016000 08003ffc : * @brief This function allows to get the channel number from channel instance. * @param Instance DFSDM channel instance. * @retval Channel number. */ static uint32_t DFSDM_GetChannelFromInstance(const DFSDM_Channel_TypeDef *Instance) { 8003ffc: b480 push {r7} 8003ffe: b085 sub sp, #20 8004000: af00 add r7, sp, #0 8004002: 6078 str r0, [r7, #4] uint32_t channel; /* Get channel from instance */ if (Instance == DFSDM1_Channel0) 8004004: 687b ldr r3, [r7, #4] 8004006: 4a1c ldr r2, [pc, #112] @ (8004078 ) 8004008: 4293 cmp r3, r2 800400a: d102 bne.n 8004012 { channel = 0; 800400c: 2300 movs r3, #0 800400e: 60fb str r3, [r7, #12] 8004010: e02b b.n 800406a } else if (Instance == DFSDM1_Channel1) 8004012: 687b ldr r3, [r7, #4] 8004014: 4a19 ldr r2, [pc, #100] @ (800407c ) 8004016: 4293 cmp r3, r2 8004018: d102 bne.n 8004020 { channel = 1; 800401a: 2301 movs r3, #1 800401c: 60fb str r3, [r7, #12] 800401e: e024 b.n 800406a } else if (Instance == DFSDM1_Channel2) 8004020: 687b ldr r3, [r7, #4] 8004022: 4a17 ldr r2, [pc, #92] @ (8004080 ) 8004024: 4293 cmp r3, r2 8004026: d102 bne.n 800402e { channel = 2; 8004028: 2302 movs r3, #2 800402a: 60fb str r3, [r7, #12] 800402c: e01d b.n 800406a } #if defined(STM32L471xx) || defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) || \ defined(STM32L496xx) || defined(STM32L4A6xx) || \ defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) else if (Instance == DFSDM1_Channel4) 800402e: 687b ldr r3, [r7, #4] 8004030: 4a14 ldr r2, [pc, #80] @ (8004084 ) 8004032: 4293 cmp r3, r2 8004034: d102 bne.n 800403c { channel = 4; 8004036: 2304 movs r3, #4 8004038: 60fb str r3, [r7, #12] 800403a: e016 b.n 800406a } else if (Instance == DFSDM1_Channel5) 800403c: 687b ldr r3, [r7, #4] 800403e: 4a12 ldr r2, [pc, #72] @ (8004088 ) 8004040: 4293 cmp r3, r2 8004042: d102 bne.n 800404a { channel = 5; 8004044: 2305 movs r3, #5 8004046: 60fb str r3, [r7, #12] 8004048: e00f b.n 800406a } else if (Instance == DFSDM1_Channel6) 800404a: 687b ldr r3, [r7, #4] 800404c: 4a0f ldr r2, [pc, #60] @ (800408c ) 800404e: 4293 cmp r3, r2 8004050: d102 bne.n 8004058 { channel = 6; 8004052: 2306 movs r3, #6 8004054: 60fb str r3, [r7, #12] 8004056: e008 b.n 800406a } else if (Instance == DFSDM1_Channel7) 8004058: 687b ldr r3, [r7, #4] 800405a: 4a0d ldr r2, [pc, #52] @ (8004090 ) 800405c: 4293 cmp r3, r2 800405e: d102 bne.n 8004066 { channel = 7; 8004060: 2307 movs r3, #7 8004062: 60fb str r3, [r7, #12] 8004064: e001 b.n 800406a } #endif /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || STM32L496xx || STM32L4A6xx || STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ else /* DFSDM1_Channel3 */ { channel = 3; 8004066: 2303 movs r3, #3 8004068: 60fb str r3, [r7, #12] } return channel; 800406a: 68fb ldr r3, [r7, #12] } 800406c: 4618 mov r0, r3 800406e: 3714 adds r7, #20 8004070: 46bd mov sp, r7 8004072: f85d 7b04 ldr.w r7, [sp], #4 8004076: 4770 bx lr 8004078: 40016000 .word 0x40016000 800407c: 40016020 .word 0x40016020 8004080: 40016040 .word 0x40016040 8004084: 40016080 .word 0x40016080 8004088: 400160a0 .word 0x400160a0 800408c: 400160c0 .word 0x400160c0 8004090: 400160e0 .word 0x400160e0 08004094 : * @param hdma pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA Channel. * @retval HAL status */ HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma) { 8004094: b480 push {r7} 8004096: b085 sub sp, #20 8004098: af00 add r7, sp, #0 800409a: 6078 str r0, [r7, #4] HAL_StatusTypeDef status = HAL_OK; 800409c: 2300 movs r3, #0 800409e: 73fb strb r3, [r7, #15] /* Check the DMA peripheral state */ if (hdma->State != HAL_DMA_STATE_BUSY) 80040a0: 687b ldr r3, [r7, #4] 80040a2: f893 3025 ldrb.w r3, [r3, #37] @ 0x25 80040a6: b2db uxtb r3, r3 80040a8: 2b02 cmp r3, #2 80040aa: d008 beq.n 80040be { hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER; 80040ac: 687b ldr r3, [r7, #4] 80040ae: 2204 movs r2, #4 80040b0: 63da str r2, [r3, #60] @ 0x3c /* Process Unlocked */ __HAL_UNLOCK(hdma); 80040b2: 687b ldr r3, [r7, #4] 80040b4: 2200 movs r2, #0 80040b6: f883 2024 strb.w r2, [r3, #36] @ 0x24 return HAL_ERROR; 80040ba: 2301 movs r3, #1 80040bc: e022 b.n 8004104 } else { /* Disable DMA IT */ __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); 80040be: 687b ldr r3, [r7, #4] 80040c0: 681b ldr r3, [r3, #0] 80040c2: 681a ldr r2, [r3, #0] 80040c4: 687b ldr r3, [r7, #4] 80040c6: 681b ldr r3, [r3, #0] 80040c8: f022 020e bic.w r2, r2, #14 80040cc: 601a str r2, [r3, #0] /* disable the DMAMUX sync overrun IT*/ hdma->DMAmuxChannel->CCR &= ~DMAMUX_CxCR_SOIE; #endif /* DMAMUX1 */ /* Disable the channel */ __HAL_DMA_DISABLE(hdma); 80040ce: 687b ldr r3, [r7, #4] 80040d0: 681b ldr r3, [r3, #0] 80040d2: 681a ldr r2, [r3, #0] 80040d4: 687b ldr r3, [r7, #4] 80040d6: 681b ldr r3, [r3, #0] 80040d8: f022 0201 bic.w r2, r2, #1 80040dc: 601a str r2, [r3, #0] /* Clear all flags */ hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1CU)); 80040de: 687b ldr r3, [r7, #4] 80040e0: 6c5b ldr r3, [r3, #68] @ 0x44 80040e2: f003 021c and.w r2, r3, #28 80040e6: 687b ldr r3, [r7, #4] 80040e8: 6c1b ldr r3, [r3, #64] @ 0x40 80040ea: 2101 movs r1, #1 80040ec: fa01 f202 lsl.w r2, r1, r2 80040f0: 605a str r2, [r3, #4] } #endif /* DMAMUX1 */ /* Change the DMA state */ hdma->State = HAL_DMA_STATE_READY; 80040f2: 687b ldr r3, [r7, #4] 80040f4: 2201 movs r2, #1 80040f6: f883 2025 strb.w r2, [r3, #37] @ 0x25 /* Process Unlocked */ __HAL_UNLOCK(hdma); 80040fa: 687b ldr r3, [r7, #4] 80040fc: 2200 movs r2, #0 80040fe: f883 2024 strb.w r2, [r3, #36] @ 0x24 return status; 8004102: 7bfb ldrb r3, [r7, #15] } } 8004104: 4618 mov r0, r3 8004106: 3714 adds r7, #20 8004108: 46bd mov sp, r7 800410a: f85d 7b04 ldr.w r7, [sp], #4 800410e: 4770 bx lr 08004110 : * @param hdma pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA Channel. * @retval HAL status */ HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma) { 8004110: b580 push {r7, lr} 8004112: b084 sub sp, #16 8004114: af00 add r7, sp, #0 8004116: 6078 str r0, [r7, #4] HAL_StatusTypeDef status = HAL_OK; 8004118: 2300 movs r3, #0 800411a: 73fb strb r3, [r7, #15] if (HAL_DMA_STATE_BUSY != hdma->State) 800411c: 687b ldr r3, [r7, #4] 800411e: f893 3025 ldrb.w r3, [r3, #37] @ 0x25 8004122: b2db uxtb r3, r3 8004124: 2b02 cmp r3, #2 8004126: d005 beq.n 8004134 { /* no transfer ongoing */ hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER; 8004128: 687b ldr r3, [r7, #4] 800412a: 2204 movs r2, #4 800412c: 63da str r2, [r3, #60] @ 0x3c status = HAL_ERROR; 800412e: 2301 movs r3, #1 8004130: 73fb strb r3, [r7, #15] 8004132: e029 b.n 8004188 } else { /* Disable DMA IT */ __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); 8004134: 687b ldr r3, [r7, #4] 8004136: 681b ldr r3, [r3, #0] 8004138: 681a ldr r2, [r3, #0] 800413a: 687b ldr r3, [r7, #4] 800413c: 681b ldr r3, [r3, #0] 800413e: f022 020e bic.w r2, r2, #14 8004142: 601a str r2, [r3, #0] /* Disable the channel */ __HAL_DMA_DISABLE(hdma); 8004144: 687b ldr r3, [r7, #4] 8004146: 681b ldr r3, [r3, #0] 8004148: 681a ldr r2, [r3, #0] 800414a: 687b ldr r3, [r7, #4] 800414c: 681b ldr r3, [r3, #0] 800414e: f022 0201 bic.w r2, r2, #1 8004152: 601a str r2, [r3, #0] hdma->DMAmuxRequestGenStatus->RGCFR = hdma->DMAmuxRequestGenStatusMask; } #else /* Clear all flags */ hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1CU)); 8004154: 687b ldr r3, [r7, #4] 8004156: 6c5b ldr r3, [r3, #68] @ 0x44 8004158: f003 021c and.w r2, r3, #28 800415c: 687b ldr r3, [r7, #4] 800415e: 6c1b ldr r3, [r3, #64] @ 0x40 8004160: 2101 movs r1, #1 8004162: fa01 f202 lsl.w r2, r1, r2 8004166: 605a str r2, [r3, #4] #endif /* DMAMUX1 */ /* Change the DMA state */ hdma->State = HAL_DMA_STATE_READY; 8004168: 687b ldr r3, [r7, #4] 800416a: 2201 movs r2, #1 800416c: f883 2025 strb.w r2, [r3, #37] @ 0x25 /* Process Unlocked */ __HAL_UNLOCK(hdma); 8004170: 687b ldr r3, [r7, #4] 8004172: 2200 movs r2, #0 8004174: f883 2024 strb.w r2, [r3, #36] @ 0x24 /* Call User Abort callback */ if (hdma->XferAbortCallback != NULL) 8004178: 687b ldr r3, [r7, #4] 800417a: 6b9b ldr r3, [r3, #56] @ 0x38 800417c: 2b00 cmp r3, #0 800417e: d003 beq.n 8004188 { hdma->XferAbortCallback(hdma); 8004180: 687b ldr r3, [r7, #4] 8004182: 6b9b ldr r3, [r3, #56] @ 0x38 8004184: 6878 ldr r0, [r7, #4] 8004186: 4798 blx r3 } } return status; 8004188: 7bfb ldrb r3, [r7, #15] } 800418a: 4618 mov r0, r3 800418c: 3710 adds r7, #16 800418e: 46bd mov sp, r7 8004190: bd80 pop {r7, pc} ... 08004194 : * @param GPIO_Init pointer to a GPIO_InitTypeDef structure that contains * the configuration information for the specified GPIO peripheral. * @retval None */ void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init) { 8004194: b480 push {r7} 8004196: b087 sub sp, #28 8004198: af00 add r7, sp, #0 800419a: 6078 str r0, [r7, #4] 800419c: 6039 str r1, [r7, #0] uint32_t position = 0x00u; 800419e: 2300 movs r3, #0 80041a0: 617b str r3, [r7, #20] assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); assert_param(IS_GPIO_PIN(GPIO_Init->Pin)); assert_param(IS_GPIO_MODE(GPIO_Init->Mode)); /* Configure the port pins */ while (((GPIO_Init->Pin) >> position) != 0x00u) 80041a2: e17f b.n 80044a4 { /* Get current io position */ iocurrent = (GPIO_Init->Pin) & (1uL << position); 80041a4: 683b ldr r3, [r7, #0] 80041a6: 681a ldr r2, [r3, #0] 80041a8: 2101 movs r1, #1 80041aa: 697b ldr r3, [r7, #20] 80041ac: fa01 f303 lsl.w r3, r1, r3 80041b0: 4013 ands r3, r2 80041b2: 60fb str r3, [r7, #12] if (iocurrent != 0x00u) 80041b4: 68fb ldr r3, [r7, #12] 80041b6: 2b00 cmp r3, #0 80041b8: f000 8171 beq.w 800449e { /*--------------------- GPIO Mode Configuration ------------------------*/ /* In case of Output or Alternate function mode selection */ if (((GPIO_Init->Mode & GPIO_MODE) == MODE_OUTPUT) || ((GPIO_Init->Mode & GPIO_MODE) == MODE_AF)) 80041bc: 683b ldr r3, [r7, #0] 80041be: 685b ldr r3, [r3, #4] 80041c0: f003 0303 and.w r3, r3, #3 80041c4: 2b01 cmp r3, #1 80041c6: d005 beq.n 80041d4 80041c8: 683b ldr r3, [r7, #0] 80041ca: 685b ldr r3, [r3, #4] 80041cc: f003 0303 and.w r3, r3, #3 80041d0: 2b02 cmp r3, #2 80041d2: d130 bne.n 8004236 { /* Check the Speed parameter */ assert_param(IS_GPIO_SPEED(GPIO_Init->Speed)); /* Configure the IO Speed */ temp = GPIOx->OSPEEDR; 80041d4: 687b ldr r3, [r7, #4] 80041d6: 689b ldr r3, [r3, #8] 80041d8: 613b str r3, [r7, #16] temp &= ~(GPIO_OSPEEDR_OSPEED0 << (position * 2u)); 80041da: 697b ldr r3, [r7, #20] 80041dc: 005b lsls r3, r3, #1 80041de: 2203 movs r2, #3 80041e0: fa02 f303 lsl.w r3, r2, r3 80041e4: 43db mvns r3, r3 80041e6: 693a ldr r2, [r7, #16] 80041e8: 4013 ands r3, r2 80041ea: 613b str r3, [r7, #16] temp |= (GPIO_Init->Speed << (position * 2u)); 80041ec: 683b ldr r3, [r7, #0] 80041ee: 68da ldr r2, [r3, #12] 80041f0: 697b ldr r3, [r7, #20] 80041f2: 005b lsls r3, r3, #1 80041f4: fa02 f303 lsl.w r3, r2, r3 80041f8: 693a ldr r2, [r7, #16] 80041fa: 4313 orrs r3, r2 80041fc: 613b str r3, [r7, #16] GPIOx->OSPEEDR = temp; 80041fe: 687b ldr r3, [r7, #4] 8004200: 693a ldr r2, [r7, #16] 8004202: 609a str r2, [r3, #8] /* Configure the IO Output Type */ temp = GPIOx->OTYPER; 8004204: 687b ldr r3, [r7, #4] 8004206: 685b ldr r3, [r3, #4] 8004208: 613b str r3, [r7, #16] temp &= ~(GPIO_OTYPER_OT0 << position) ; 800420a: 2201 movs r2, #1 800420c: 697b ldr r3, [r7, #20] 800420e: fa02 f303 lsl.w r3, r2, r3 8004212: 43db mvns r3, r3 8004214: 693a ldr r2, [r7, #16] 8004216: 4013 ands r3, r2 8004218: 613b str r3, [r7, #16] temp |= (((GPIO_Init->Mode & OUTPUT_TYPE) >> OUTPUT_TYPE_Pos) << position); 800421a: 683b ldr r3, [r7, #0] 800421c: 685b ldr r3, [r3, #4] 800421e: 091b lsrs r3, r3, #4 8004220: f003 0201 and.w r2, r3, #1 8004224: 697b ldr r3, [r7, #20] 8004226: fa02 f303 lsl.w r3, r2, r3 800422a: 693a ldr r2, [r7, #16] 800422c: 4313 orrs r3, r2 800422e: 613b str r3, [r7, #16] GPIOx->OTYPER = temp; 8004230: 687b ldr r3, [r7, #4] 8004232: 693a ldr r2, [r7, #16] 8004234: 605a str r2, [r3, #4] } #if defined(STM32L471xx) || defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) /* In case of Analog mode, check if ADC control mode is selected */ if((GPIO_Init->Mode & GPIO_MODE_ANALOG) == GPIO_MODE_ANALOG) 8004236: 683b ldr r3, [r7, #0] 8004238: 685b ldr r3, [r3, #4] 800423a: f003 0303 and.w r3, r3, #3 800423e: 2b03 cmp r3, #3 8004240: d118 bne.n 8004274 { /* Configure the IO Output Type */ temp = GPIOx->ASCR; 8004242: 687b ldr r3, [r7, #4] 8004244: 6adb ldr r3, [r3, #44] @ 0x2c 8004246: 613b str r3, [r7, #16] temp &= ~(GPIO_ASCR_ASC0 << position) ; 8004248: 2201 movs r2, #1 800424a: 697b ldr r3, [r7, #20] 800424c: fa02 f303 lsl.w r3, r2, r3 8004250: 43db mvns r3, r3 8004252: 693a ldr r2, [r7, #16] 8004254: 4013 ands r3, r2 8004256: 613b str r3, [r7, #16] temp |= (((GPIO_Init->Mode & GPIO_MODE_ANALOG_ADC_CONTROL) >> 3) << position); 8004258: 683b ldr r3, [r7, #0] 800425a: 685b ldr r3, [r3, #4] 800425c: 08db lsrs r3, r3, #3 800425e: f003 0201 and.w r2, r3, #1 8004262: 697b ldr r3, [r7, #20] 8004264: fa02 f303 lsl.w r3, r2, r3 8004268: 693a ldr r2, [r7, #16] 800426a: 4313 orrs r3, r2 800426c: 613b str r3, [r7, #16] GPIOx->ASCR = temp; 800426e: 687b ldr r3, [r7, #4] 8004270: 693a ldr r2, [r7, #16] 8004272: 62da str r2, [r3, #44] @ 0x2c } #endif /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx */ /* Activate the Pull-up or Pull down resistor for the current IO */ if ((GPIO_Init->Mode & GPIO_MODE) != MODE_ANALOG) 8004274: 683b ldr r3, [r7, #0] 8004276: 685b ldr r3, [r3, #4] 8004278: f003 0303 and.w r3, r3, #3 800427c: 2b03 cmp r3, #3 800427e: d017 beq.n 80042b0 { /* Check the Pull parameter */ assert_param(IS_GPIO_PULL(GPIO_Init->Pull)); temp = GPIOx->PUPDR; 8004280: 687b ldr r3, [r7, #4] 8004282: 68db ldr r3, [r3, #12] 8004284: 613b str r3, [r7, #16] temp &= ~(GPIO_PUPDR_PUPD0 << (position * 2U)); 8004286: 697b ldr r3, [r7, #20] 8004288: 005b lsls r3, r3, #1 800428a: 2203 movs r2, #3 800428c: fa02 f303 lsl.w r3, r2, r3 8004290: 43db mvns r3, r3 8004292: 693a ldr r2, [r7, #16] 8004294: 4013 ands r3, r2 8004296: 613b str r3, [r7, #16] temp |= ((GPIO_Init->Pull) << (position * 2U)); 8004298: 683b ldr r3, [r7, #0] 800429a: 689a ldr r2, [r3, #8] 800429c: 697b ldr r3, [r7, #20] 800429e: 005b lsls r3, r3, #1 80042a0: fa02 f303 lsl.w r3, r2, r3 80042a4: 693a ldr r2, [r7, #16] 80042a6: 4313 orrs r3, r2 80042a8: 613b str r3, [r7, #16] GPIOx->PUPDR = temp; 80042aa: 687b ldr r3, [r7, #4] 80042ac: 693a ldr r2, [r7, #16] 80042ae: 60da str r2, [r3, #12] } /* In case of Alternate function mode selection */ if ((GPIO_Init->Mode & GPIO_MODE) == MODE_AF) 80042b0: 683b ldr r3, [r7, #0] 80042b2: 685b ldr r3, [r3, #4] 80042b4: f003 0303 and.w r3, r3, #3 80042b8: 2b02 cmp r3, #2 80042ba: d123 bne.n 8004304 /* Check the Alternate function parameters */ assert_param(IS_GPIO_AF_INSTANCE(GPIOx)); assert_param(IS_GPIO_AF(GPIO_Init->Alternate)); /* Configure Alternate function mapped with the current IO */ temp = GPIOx->AFR[position >> 3u]; 80042bc: 697b ldr r3, [r7, #20] 80042be: 08da lsrs r2, r3, #3 80042c0: 687b ldr r3, [r7, #4] 80042c2: 3208 adds r2, #8 80042c4: f853 3022 ldr.w r3, [r3, r2, lsl #2] 80042c8: 613b str r3, [r7, #16] temp &= ~(0xFu << ((position & 0x07u) * 4u)); 80042ca: 697b ldr r3, [r7, #20] 80042cc: f003 0307 and.w r3, r3, #7 80042d0: 009b lsls r3, r3, #2 80042d2: 220f movs r2, #15 80042d4: fa02 f303 lsl.w r3, r2, r3 80042d8: 43db mvns r3, r3 80042da: 693a ldr r2, [r7, #16] 80042dc: 4013 ands r3, r2 80042de: 613b str r3, [r7, #16] temp |= ((GPIO_Init->Alternate) << ((position & 0x07u) * 4u)); 80042e0: 683b ldr r3, [r7, #0] 80042e2: 691a ldr r2, [r3, #16] 80042e4: 697b ldr r3, [r7, #20] 80042e6: f003 0307 and.w r3, r3, #7 80042ea: 009b lsls r3, r3, #2 80042ec: fa02 f303 lsl.w r3, r2, r3 80042f0: 693a ldr r2, [r7, #16] 80042f2: 4313 orrs r3, r2 80042f4: 613b str r3, [r7, #16] GPIOx->AFR[position >> 3u] = temp; 80042f6: 697b ldr r3, [r7, #20] 80042f8: 08da lsrs r2, r3, #3 80042fa: 687b ldr r3, [r7, #4] 80042fc: 3208 adds r2, #8 80042fe: 6939 ldr r1, [r7, #16] 8004300: f843 1022 str.w r1, [r3, r2, lsl #2] } /* Configure IO Direction mode (Input, Output, Alternate or Analog) */ temp = GPIOx->MODER; 8004304: 687b ldr r3, [r7, #4] 8004306: 681b ldr r3, [r3, #0] 8004308: 613b str r3, [r7, #16] temp &= ~(GPIO_MODER_MODE0 << (position * 2u)); 800430a: 697b ldr r3, [r7, #20] 800430c: 005b lsls r3, r3, #1 800430e: 2203 movs r2, #3 8004310: fa02 f303 lsl.w r3, r2, r3 8004314: 43db mvns r3, r3 8004316: 693a ldr r2, [r7, #16] 8004318: 4013 ands r3, r2 800431a: 613b str r3, [r7, #16] temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2u)); 800431c: 683b ldr r3, [r7, #0] 800431e: 685b ldr r3, [r3, #4] 8004320: f003 0203 and.w r2, r3, #3 8004324: 697b ldr r3, [r7, #20] 8004326: 005b lsls r3, r3, #1 8004328: fa02 f303 lsl.w r3, r2, r3 800432c: 693a ldr r2, [r7, #16] 800432e: 4313 orrs r3, r2 8004330: 613b str r3, [r7, #16] GPIOx->MODER = temp; 8004332: 687b ldr r3, [r7, #4] 8004334: 693a ldr r2, [r7, #16] 8004336: 601a str r2, [r3, #0] /*--------------------- EXTI Mode Configuration ------------------------*/ /* Configure the External Interrupt or event for the current IO */ if ((GPIO_Init->Mode & EXTI_MODE) != 0x00u) 8004338: 683b ldr r3, [r7, #0] 800433a: 685b ldr r3, [r3, #4] 800433c: f403 3340 and.w r3, r3, #196608 @ 0x30000 8004340: 2b00 cmp r3, #0 8004342: f000 80ac beq.w 800449e { /* Enable SYSCFG Clock */ __HAL_RCC_SYSCFG_CLK_ENABLE(); 8004346: 4b5f ldr r3, [pc, #380] @ (80044c4 ) 8004348: 6e1b ldr r3, [r3, #96] @ 0x60 800434a: 4a5e ldr r2, [pc, #376] @ (80044c4 ) 800434c: f043 0301 orr.w r3, r3, #1 8004350: 6613 str r3, [r2, #96] @ 0x60 8004352: 4b5c ldr r3, [pc, #368] @ (80044c4 ) 8004354: 6e1b ldr r3, [r3, #96] @ 0x60 8004356: f003 0301 and.w r3, r3, #1 800435a: 60bb str r3, [r7, #8] 800435c: 68bb ldr r3, [r7, #8] temp = SYSCFG->EXTICR[position >> 2u]; 800435e: 4a5a ldr r2, [pc, #360] @ (80044c8 ) 8004360: 697b ldr r3, [r7, #20] 8004362: 089b lsrs r3, r3, #2 8004364: 3302 adds r3, #2 8004366: f852 3023 ldr.w r3, [r2, r3, lsl #2] 800436a: 613b str r3, [r7, #16] temp &= ~(0x0FuL << (4u * (position & 0x03u))); 800436c: 697b ldr r3, [r7, #20] 800436e: f003 0303 and.w r3, r3, #3 8004372: 009b lsls r3, r3, #2 8004374: 220f movs r2, #15 8004376: fa02 f303 lsl.w r3, r2, r3 800437a: 43db mvns r3, r3 800437c: 693a ldr r2, [r7, #16] 800437e: 4013 ands r3, r2 8004380: 613b str r3, [r7, #16] temp |= (GPIO_GET_INDEX(GPIOx) << (4u * (position & 0x03u))); 8004382: 687b ldr r3, [r7, #4] 8004384: f1b3 4f90 cmp.w r3, #1207959552 @ 0x48000000 8004388: d025 beq.n 80043d6 800438a: 687b ldr r3, [r7, #4] 800438c: 4a4f ldr r2, [pc, #316] @ (80044cc ) 800438e: 4293 cmp r3, r2 8004390: d01f beq.n 80043d2 8004392: 687b ldr r3, [r7, #4] 8004394: 4a4e ldr r2, [pc, #312] @ (80044d0 ) 8004396: 4293 cmp r3, r2 8004398: d019 beq.n 80043ce 800439a: 687b ldr r3, [r7, #4] 800439c: 4a4d ldr r2, [pc, #308] @ (80044d4 ) 800439e: 4293 cmp r3, r2 80043a0: d013 beq.n 80043ca 80043a2: 687b ldr r3, [r7, #4] 80043a4: 4a4c ldr r2, [pc, #304] @ (80044d8 ) 80043a6: 4293 cmp r3, r2 80043a8: d00d beq.n 80043c6 80043aa: 687b ldr r3, [r7, #4] 80043ac: 4a4b ldr r2, [pc, #300] @ (80044dc ) 80043ae: 4293 cmp r3, r2 80043b0: d007 beq.n 80043c2 80043b2: 687b ldr r3, [r7, #4] 80043b4: 4a4a ldr r2, [pc, #296] @ (80044e0 ) 80043b6: 4293 cmp r3, r2 80043b8: d101 bne.n 80043be 80043ba: 2306 movs r3, #6 80043bc: e00c b.n 80043d8 80043be: 2307 movs r3, #7 80043c0: e00a b.n 80043d8 80043c2: 2305 movs r3, #5 80043c4: e008 b.n 80043d8 80043c6: 2304 movs r3, #4 80043c8: e006 b.n 80043d8 80043ca: 2303 movs r3, #3 80043cc: e004 b.n 80043d8 80043ce: 2302 movs r3, #2 80043d0: e002 b.n 80043d8 80043d2: 2301 movs r3, #1 80043d4: e000 b.n 80043d8 80043d6: 2300 movs r3, #0 80043d8: 697a ldr r2, [r7, #20] 80043da: f002 0203 and.w r2, r2, #3 80043de: 0092 lsls r2, r2, #2 80043e0: 4093 lsls r3, r2 80043e2: 693a ldr r2, [r7, #16] 80043e4: 4313 orrs r3, r2 80043e6: 613b str r3, [r7, #16] SYSCFG->EXTICR[position >> 2u] = temp; 80043e8: 4937 ldr r1, [pc, #220] @ (80044c8 ) 80043ea: 697b ldr r3, [r7, #20] 80043ec: 089b lsrs r3, r3, #2 80043ee: 3302 adds r3, #2 80043f0: 693a ldr r2, [r7, #16] 80043f2: f841 2023 str.w r2, [r1, r3, lsl #2] /* Clear Rising Falling edge configuration */ temp = EXTI->RTSR1; 80043f6: 4b3b ldr r3, [pc, #236] @ (80044e4 ) 80043f8: 689b ldr r3, [r3, #8] 80043fa: 613b str r3, [r7, #16] temp &= ~(iocurrent); 80043fc: 68fb ldr r3, [r7, #12] 80043fe: 43db mvns r3, r3 8004400: 693a ldr r2, [r7, #16] 8004402: 4013 ands r3, r2 8004404: 613b str r3, [r7, #16] if ((GPIO_Init->Mode & TRIGGER_RISING) != 0x00u) 8004406: 683b ldr r3, [r7, #0] 8004408: 685b ldr r3, [r3, #4] 800440a: f403 1380 and.w r3, r3, #1048576 @ 0x100000 800440e: 2b00 cmp r3, #0 8004410: d003 beq.n 800441a { temp |= iocurrent; 8004412: 693a ldr r2, [r7, #16] 8004414: 68fb ldr r3, [r7, #12] 8004416: 4313 orrs r3, r2 8004418: 613b str r3, [r7, #16] } EXTI->RTSR1 = temp; 800441a: 4a32 ldr r2, [pc, #200] @ (80044e4 ) 800441c: 693b ldr r3, [r7, #16] 800441e: 6093 str r3, [r2, #8] temp = EXTI->FTSR1; 8004420: 4b30 ldr r3, [pc, #192] @ (80044e4 ) 8004422: 68db ldr r3, [r3, #12] 8004424: 613b str r3, [r7, #16] temp &= ~(iocurrent); 8004426: 68fb ldr r3, [r7, #12] 8004428: 43db mvns r3, r3 800442a: 693a ldr r2, [r7, #16] 800442c: 4013 ands r3, r2 800442e: 613b str r3, [r7, #16] if ((GPIO_Init->Mode & TRIGGER_FALLING) != 0x00u) 8004430: 683b ldr r3, [r7, #0] 8004432: 685b ldr r3, [r3, #4] 8004434: f403 1300 and.w r3, r3, #2097152 @ 0x200000 8004438: 2b00 cmp r3, #0 800443a: d003 beq.n 8004444 { temp |= iocurrent; 800443c: 693a ldr r2, [r7, #16] 800443e: 68fb ldr r3, [r7, #12] 8004440: 4313 orrs r3, r2 8004442: 613b str r3, [r7, #16] } EXTI->FTSR1 = temp; 8004444: 4a27 ldr r2, [pc, #156] @ (80044e4 ) 8004446: 693b ldr r3, [r7, #16] 8004448: 60d3 str r3, [r2, #12] /* Clear EXTI line configuration */ temp = EXTI->EMR1; 800444a: 4b26 ldr r3, [pc, #152] @ (80044e4 ) 800444c: 685b ldr r3, [r3, #4] 800444e: 613b str r3, [r7, #16] temp &= ~(iocurrent); 8004450: 68fb ldr r3, [r7, #12] 8004452: 43db mvns r3, r3 8004454: 693a ldr r2, [r7, #16] 8004456: 4013 ands r3, r2 8004458: 613b str r3, [r7, #16] if ((GPIO_Init->Mode & EXTI_EVT) != 0x00u) 800445a: 683b ldr r3, [r7, #0] 800445c: 685b ldr r3, [r3, #4] 800445e: f403 3300 and.w r3, r3, #131072 @ 0x20000 8004462: 2b00 cmp r3, #0 8004464: d003 beq.n 800446e { temp |= iocurrent; 8004466: 693a ldr r2, [r7, #16] 8004468: 68fb ldr r3, [r7, #12] 800446a: 4313 orrs r3, r2 800446c: 613b str r3, [r7, #16] } EXTI->EMR1 = temp; 800446e: 4a1d ldr r2, [pc, #116] @ (80044e4 ) 8004470: 693b ldr r3, [r7, #16] 8004472: 6053 str r3, [r2, #4] temp = EXTI->IMR1; 8004474: 4b1b ldr r3, [pc, #108] @ (80044e4 ) 8004476: 681b ldr r3, [r3, #0] 8004478: 613b str r3, [r7, #16] temp &= ~(iocurrent); 800447a: 68fb ldr r3, [r7, #12] 800447c: 43db mvns r3, r3 800447e: 693a ldr r2, [r7, #16] 8004480: 4013 ands r3, r2 8004482: 613b str r3, [r7, #16] if ((GPIO_Init->Mode & EXTI_IT) != 0x00u) 8004484: 683b ldr r3, [r7, #0] 8004486: 685b ldr r3, [r3, #4] 8004488: f403 3380 and.w r3, r3, #65536 @ 0x10000 800448c: 2b00 cmp r3, #0 800448e: d003 beq.n 8004498 { temp |= iocurrent; 8004490: 693a ldr r2, [r7, #16] 8004492: 68fb ldr r3, [r7, #12] 8004494: 4313 orrs r3, r2 8004496: 613b str r3, [r7, #16] } EXTI->IMR1 = temp; 8004498: 4a12 ldr r2, [pc, #72] @ (80044e4 ) 800449a: 693b ldr r3, [r7, #16] 800449c: 6013 str r3, [r2, #0] } } position++; 800449e: 697b ldr r3, [r7, #20] 80044a0: 3301 adds r3, #1 80044a2: 617b str r3, [r7, #20] while (((GPIO_Init->Pin) >> position) != 0x00u) 80044a4: 683b ldr r3, [r7, #0] 80044a6: 681a ldr r2, [r3, #0] 80044a8: 697b ldr r3, [r7, #20] 80044aa: fa22 f303 lsr.w r3, r2, r3 80044ae: 2b00 cmp r3, #0 80044b0: f47f ae78 bne.w 80041a4 } } 80044b4: bf00 nop 80044b6: bf00 nop 80044b8: 371c adds r7, #28 80044ba: 46bd mov sp, r7 80044bc: f85d 7b04 ldr.w r7, [sp], #4 80044c0: 4770 bx lr 80044c2: bf00 nop 80044c4: 40021000 .word 0x40021000 80044c8: 40010000 .word 0x40010000 80044cc: 48000400 .word 0x48000400 80044d0: 48000800 .word 0x48000800 80044d4: 48000c00 .word 0x48000c00 80044d8: 48001000 .word 0x48001000 80044dc: 48001400 .word 0x48001400 80044e0: 48001800 .word 0x48001800 80044e4: 40010400 .word 0x40010400 080044e8 : * @param GPIO_Pin specifies the port bit to be written. * This parameter can be any combination of GPIO_PIN_x where x can be (0..15). * @retval None */ void HAL_GPIO_DeInit(GPIO_TypeDef *GPIOx, uint32_t GPIO_Pin) { 80044e8: b480 push {r7} 80044ea: b087 sub sp, #28 80044ec: af00 add r7, sp, #0 80044ee: 6078 str r0, [r7, #4] 80044f0: 6039 str r1, [r7, #0] uint32_t position = 0x00u; 80044f2: 2300 movs r3, #0 80044f4: 617b str r3, [r7, #20] /* Check the parameters */ assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); assert_param(IS_GPIO_PIN(GPIO_Pin)); /* Configure the port pins */ while ((GPIO_Pin >> position) != 0x00u) 80044f6: e0cd b.n 8004694 { /* Get current io position */ iocurrent = (GPIO_Pin) & (1uL << position); 80044f8: 2201 movs r2, #1 80044fa: 697b ldr r3, [r7, #20] 80044fc: fa02 f303 lsl.w r3, r2, r3 8004500: 683a ldr r2, [r7, #0] 8004502: 4013 ands r3, r2 8004504: 613b str r3, [r7, #16] if (iocurrent != 0x00u) 8004506: 693b ldr r3, [r7, #16] 8004508: 2b00 cmp r3, #0 800450a: f000 80c0 beq.w 800468e { /*------------------------- EXTI Mode Configuration --------------------*/ /* Clear the External Interrupt or Event for the current IO */ tmp = SYSCFG->EXTICR[position >> 2u]; 800450e: 4a68 ldr r2, [pc, #416] @ (80046b0 ) 8004510: 697b ldr r3, [r7, #20] 8004512: 089b lsrs r3, r3, #2 8004514: 3302 adds r3, #2 8004516: f852 3023 ldr.w r3, [r2, r3, lsl #2] 800451a: 60fb str r3, [r7, #12] tmp &= (0x0FuL << (4u * (position & 0x03u))); 800451c: 697b ldr r3, [r7, #20] 800451e: f003 0303 and.w r3, r3, #3 8004522: 009b lsls r3, r3, #2 8004524: 220f movs r2, #15 8004526: fa02 f303 lsl.w r3, r2, r3 800452a: 68fa ldr r2, [r7, #12] 800452c: 4013 ands r3, r2 800452e: 60fb str r3, [r7, #12] if (tmp == (GPIO_GET_INDEX(GPIOx) << (4u * (position & 0x03u)))) 8004530: 687b ldr r3, [r7, #4] 8004532: f1b3 4f90 cmp.w r3, #1207959552 @ 0x48000000 8004536: d025 beq.n 8004584 8004538: 687b ldr r3, [r7, #4] 800453a: 4a5e ldr r2, [pc, #376] @ (80046b4 ) 800453c: 4293 cmp r3, r2 800453e: d01f beq.n 8004580 8004540: 687b ldr r3, [r7, #4] 8004542: 4a5d ldr r2, [pc, #372] @ (80046b8 ) 8004544: 4293 cmp r3, r2 8004546: d019 beq.n 800457c 8004548: 687b ldr r3, [r7, #4] 800454a: 4a5c ldr r2, [pc, #368] @ (80046bc ) 800454c: 4293 cmp r3, r2 800454e: d013 beq.n 8004578 8004550: 687b ldr r3, [r7, #4] 8004552: 4a5b ldr r2, [pc, #364] @ (80046c0 ) 8004554: 4293 cmp r3, r2 8004556: d00d beq.n 8004574 8004558: 687b ldr r3, [r7, #4] 800455a: 4a5a ldr r2, [pc, #360] @ (80046c4 ) 800455c: 4293 cmp r3, r2 800455e: d007 beq.n 8004570 8004560: 687b ldr r3, [r7, #4] 8004562: 4a59 ldr r2, [pc, #356] @ (80046c8 ) 8004564: 4293 cmp r3, r2 8004566: d101 bne.n 800456c 8004568: 2306 movs r3, #6 800456a: e00c b.n 8004586 800456c: 2307 movs r3, #7 800456e: e00a b.n 8004586 8004570: 2305 movs r3, #5 8004572: e008 b.n 8004586 8004574: 2304 movs r3, #4 8004576: e006 b.n 8004586 8004578: 2303 movs r3, #3 800457a: e004 b.n 8004586 800457c: 2302 movs r3, #2 800457e: e002 b.n 8004586 8004580: 2301 movs r3, #1 8004582: e000 b.n 8004586 8004584: 2300 movs r3, #0 8004586: 697a ldr r2, [r7, #20] 8004588: f002 0203 and.w r2, r2, #3 800458c: 0092 lsls r2, r2, #2 800458e: 4093 lsls r3, r2 8004590: 68fa ldr r2, [r7, #12] 8004592: 429a cmp r2, r3 8004594: d132 bne.n 80045fc { /* Clear EXTI line configuration */ EXTI->IMR1 &= ~(iocurrent); 8004596: 4b4d ldr r3, [pc, #308] @ (80046cc ) 8004598: 681a ldr r2, [r3, #0] 800459a: 693b ldr r3, [r7, #16] 800459c: 43db mvns r3, r3 800459e: 494b ldr r1, [pc, #300] @ (80046cc ) 80045a0: 4013 ands r3, r2 80045a2: 600b str r3, [r1, #0] EXTI->EMR1 &= ~(iocurrent); 80045a4: 4b49 ldr r3, [pc, #292] @ (80046cc ) 80045a6: 685a ldr r2, [r3, #4] 80045a8: 693b ldr r3, [r7, #16] 80045aa: 43db mvns r3, r3 80045ac: 4947 ldr r1, [pc, #284] @ (80046cc ) 80045ae: 4013 ands r3, r2 80045b0: 604b str r3, [r1, #4] /* Clear Rising Falling edge configuration */ EXTI->FTSR1 &= ~(iocurrent); 80045b2: 4b46 ldr r3, [pc, #280] @ (80046cc ) 80045b4: 68da ldr r2, [r3, #12] 80045b6: 693b ldr r3, [r7, #16] 80045b8: 43db mvns r3, r3 80045ba: 4944 ldr r1, [pc, #272] @ (80046cc ) 80045bc: 4013 ands r3, r2 80045be: 60cb str r3, [r1, #12] EXTI->RTSR1 &= ~(iocurrent); 80045c0: 4b42 ldr r3, [pc, #264] @ (80046cc ) 80045c2: 689a ldr r2, [r3, #8] 80045c4: 693b ldr r3, [r7, #16] 80045c6: 43db mvns r3, r3 80045c8: 4940 ldr r1, [pc, #256] @ (80046cc ) 80045ca: 4013 ands r3, r2 80045cc: 608b str r3, [r1, #8] tmp = 0x0FuL << (4u * (position & 0x03u)); 80045ce: 697b ldr r3, [r7, #20] 80045d0: f003 0303 and.w r3, r3, #3 80045d4: 009b lsls r3, r3, #2 80045d6: 220f movs r2, #15 80045d8: fa02 f303 lsl.w r3, r2, r3 80045dc: 60fb str r3, [r7, #12] SYSCFG->EXTICR[position >> 2u] &= ~tmp; 80045de: 4a34 ldr r2, [pc, #208] @ (80046b0 ) 80045e0: 697b ldr r3, [r7, #20] 80045e2: 089b lsrs r3, r3, #2 80045e4: 3302 adds r3, #2 80045e6: f852 1023 ldr.w r1, [r2, r3, lsl #2] 80045ea: 68fb ldr r3, [r7, #12] 80045ec: 43da mvns r2, r3 80045ee: 4830 ldr r0, [pc, #192] @ (80046b0 ) 80045f0: 697b ldr r3, [r7, #20] 80045f2: 089b lsrs r3, r3, #2 80045f4: 400a ands r2, r1 80045f6: 3302 adds r3, #2 80045f8: f840 2023 str.w r2, [r0, r3, lsl #2] } /*------------------------- GPIO Mode Configuration --------------------*/ /* Configure IO in Analog Mode */ GPIOx->MODER |= (GPIO_MODER_MODE0 << (position * 2u)); 80045fc: 687b ldr r3, [r7, #4] 80045fe: 681a ldr r2, [r3, #0] 8004600: 697b ldr r3, [r7, #20] 8004602: 005b lsls r3, r3, #1 8004604: 2103 movs r1, #3 8004606: fa01 f303 lsl.w r3, r1, r3 800460a: 431a orrs r2, r3 800460c: 687b ldr r3, [r7, #4] 800460e: 601a str r2, [r3, #0] /* Configure the default Alternate Function in current IO */ GPIOx->AFR[position >> 3u] &= ~(0xFu << ((position & 0x07u) * 4u)) ; 8004610: 697b ldr r3, [r7, #20] 8004612: 08da lsrs r2, r3, #3 8004614: 687b ldr r3, [r7, #4] 8004616: 3208 adds r2, #8 8004618: f853 1022 ldr.w r1, [r3, r2, lsl #2] 800461c: 697b ldr r3, [r7, #20] 800461e: f003 0307 and.w r3, r3, #7 8004622: 009b lsls r3, r3, #2 8004624: 220f movs r2, #15 8004626: fa02 f303 lsl.w r3, r2, r3 800462a: 43db mvns r3, r3 800462c: 697a ldr r2, [r7, #20] 800462e: 08d2 lsrs r2, r2, #3 8004630: 4019 ands r1, r3 8004632: 687b ldr r3, [r7, #4] 8004634: 3208 adds r2, #8 8004636: f843 1022 str.w r1, [r3, r2, lsl #2] /* Configure the default value for IO Speed */ GPIOx->OSPEEDR &= ~(GPIO_OSPEEDR_OSPEED0 << (position * 2u)); 800463a: 687b ldr r3, [r7, #4] 800463c: 689a ldr r2, [r3, #8] 800463e: 697b ldr r3, [r7, #20] 8004640: 005b lsls r3, r3, #1 8004642: 2103 movs r1, #3 8004644: fa01 f303 lsl.w r3, r1, r3 8004648: 43db mvns r3, r3 800464a: 401a ands r2, r3 800464c: 687b ldr r3, [r7, #4] 800464e: 609a str r2, [r3, #8] /* Configure the default value IO Output Type */ GPIOx->OTYPER &= ~(GPIO_OTYPER_OT0 << position) ; 8004650: 687b ldr r3, [r7, #4] 8004652: 685a ldr r2, [r3, #4] 8004654: 2101 movs r1, #1 8004656: 697b ldr r3, [r7, #20] 8004658: fa01 f303 lsl.w r3, r1, r3 800465c: 43db mvns r3, r3 800465e: 401a ands r2, r3 8004660: 687b ldr r3, [r7, #4] 8004662: 605a str r2, [r3, #4] /* Deactivate the Pull-up and Pull-down resistor for the current IO */ GPIOx->PUPDR &= ~(GPIO_PUPDR_PUPD0 << (position * 2u)); 8004664: 687b ldr r3, [r7, #4] 8004666: 68da ldr r2, [r3, #12] 8004668: 697b ldr r3, [r7, #20] 800466a: 005b lsls r3, r3, #1 800466c: 2103 movs r1, #3 800466e: fa01 f303 lsl.w r3, r1, r3 8004672: 43db mvns r3, r3 8004674: 401a ands r2, r3 8004676: 687b ldr r3, [r7, #4] 8004678: 60da str r2, [r3, #12] #if defined(STM32L471xx) || defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) /* Deactivate the Control bit of Analog mode for the current IO */ GPIOx->ASCR &= ~(GPIO_ASCR_ASC0<< position); 800467a: 687b ldr r3, [r7, #4] 800467c: 6ada ldr r2, [r3, #44] @ 0x2c 800467e: 2101 movs r1, #1 8004680: 697b ldr r3, [r7, #20] 8004682: fa01 f303 lsl.w r3, r1, r3 8004686: 43db mvns r3, r3 8004688: 401a ands r2, r3 800468a: 687b ldr r3, [r7, #4] 800468c: 62da str r2, [r3, #44] @ 0x2c #endif /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx */ } position++; 800468e: 697b ldr r3, [r7, #20] 8004690: 3301 adds r3, #1 8004692: 617b str r3, [r7, #20] while ((GPIO_Pin >> position) != 0x00u) 8004694: 683a ldr r2, [r7, #0] 8004696: 697b ldr r3, [r7, #20] 8004698: fa22 f303 lsr.w r3, r2, r3 800469c: 2b00 cmp r3, #0 800469e: f47f af2b bne.w 80044f8 } } 80046a2: bf00 nop 80046a4: bf00 nop 80046a6: 371c adds r7, #28 80046a8: 46bd mov sp, r7 80046aa: f85d 7b04 ldr.w r7, [sp], #4 80046ae: 4770 bx lr 80046b0: 40010000 .word 0x40010000 80046b4: 48000400 .word 0x48000400 80046b8: 48000800 .word 0x48000800 80046bc: 48000c00 .word 0x48000c00 80046c0: 48001000 .word 0x48001000 80046c4: 48001400 .word 0x48001400 80046c8: 48001800 .word 0x48001800 80046cc: 40010400 .word 0x40010400 080046d0 : * @param GPIO_Pin specifies the port bit to read. * This parameter can be any combination of GPIO_PIN_x where x can be (0..15). * @retval The input port pin value. */ GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) { 80046d0: b480 push {r7} 80046d2: b085 sub sp, #20 80046d4: af00 add r7, sp, #0 80046d6: 6078 str r0, [r7, #4] 80046d8: 460b mov r3, r1 80046da: 807b strh r3, [r7, #2] GPIO_PinState bitstatus; /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); if ((GPIOx->IDR & GPIO_Pin) != 0x00u) 80046dc: 687b ldr r3, [r7, #4] 80046de: 691a ldr r2, [r3, #16] 80046e0: 887b ldrh r3, [r7, #2] 80046e2: 4013 ands r3, r2 80046e4: 2b00 cmp r3, #0 80046e6: d002 beq.n 80046ee { bitstatus = GPIO_PIN_SET; 80046e8: 2301 movs r3, #1 80046ea: 73fb strb r3, [r7, #15] 80046ec: e001 b.n 80046f2 } else { bitstatus = GPIO_PIN_RESET; 80046ee: 2300 movs r3, #0 80046f0: 73fb strb r3, [r7, #15] } return bitstatus; 80046f2: 7bfb ldrb r3, [r7, #15] } 80046f4: 4618 mov r0, r3 80046f6: 3714 adds r7, #20 80046f8: 46bd mov sp, r7 80046fa: f85d 7b04 ldr.w r7, [sp], #4 80046fe: 4770 bx lr 08004700 : * @arg GPIO_PIN_RESET: to clear the port pin * @arg GPIO_PIN_SET: to set the port pin * @retval None */ void HAL_GPIO_WritePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState) { 8004700: b480 push {r7} 8004702: b083 sub sp, #12 8004704: af00 add r7, sp, #0 8004706: 6078 str r0, [r7, #4] 8004708: 460b mov r3, r1 800470a: 807b strh r3, [r7, #2] 800470c: 4613 mov r3, r2 800470e: 707b strb r3, [r7, #1] /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); assert_param(IS_GPIO_PIN_ACTION(PinState)); if(PinState != GPIO_PIN_RESET) 8004710: 787b ldrb r3, [r7, #1] 8004712: 2b00 cmp r3, #0 8004714: d003 beq.n 800471e { GPIOx->BSRR = (uint32_t)GPIO_Pin; 8004716: 887a ldrh r2, [r7, #2] 8004718: 687b ldr r3, [r7, #4] 800471a: 619a str r2, [r3, #24] } else { GPIOx->BRR = (uint32_t)GPIO_Pin; } } 800471c: e002 b.n 8004724 GPIOx->BRR = (uint32_t)GPIO_Pin; 800471e: 887a ldrh r2, [r7, #2] 8004720: 687b ldr r3, [r7, #4] 8004722: 629a str r2, [r3, #40] @ 0x28 } 8004724: bf00 nop 8004726: 370c adds r7, #12 8004728: 46bd mov sp, r7 800472a: f85d 7b04 ldr.w r7, [sp], #4 800472e: 4770 bx lr 08004730 : * @brief Handle EXTI interrupt request. * @param GPIO_Pin Specifies the port pin connected to corresponding EXTI line. * @retval None */ void HAL_GPIO_EXTI_IRQHandler(uint16_t GPIO_Pin) { 8004730: b580 push {r7, lr} 8004732: b082 sub sp, #8 8004734: af00 add r7, sp, #0 8004736: 4603 mov r3, r0 8004738: 80fb strh r3, [r7, #6] /* EXTI line interrupt detected */ if(__HAL_GPIO_EXTI_GET_IT(GPIO_Pin) != 0x00u) 800473a: 4b08 ldr r3, [pc, #32] @ (800475c ) 800473c: 695a ldr r2, [r3, #20] 800473e: 88fb ldrh r3, [r7, #6] 8004740: 4013 ands r3, r2 8004742: 2b00 cmp r3, #0 8004744: d006 beq.n 8004754 { __HAL_GPIO_EXTI_CLEAR_IT(GPIO_Pin); 8004746: 4a05 ldr r2, [pc, #20] @ (800475c ) 8004748: 88fb ldrh r3, [r7, #6] 800474a: 6153 str r3, [r2, #20] HAL_GPIO_EXTI_Callback(GPIO_Pin); 800474c: 88fb ldrh r3, [r7, #6] 800474e: 4618 mov r0, r3 8004750: f7fe f92f bl 80029b2 } } 8004754: bf00 nop 8004756: 3708 adds r7, #8 8004758: 46bd mov sp, r7 800475a: bd80 pop {r7, pc} 800475c: 40010400 .word 0x40010400 08004760 : * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains * the configuration information for the specified I2C. * @retval HAL status */ HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c) { 8004760: b580 push {r7, lr} 8004762: b082 sub sp, #8 8004764: af00 add r7, sp, #0 8004766: 6078 str r0, [r7, #4] /* Check the I2C handle allocation */ if (hi2c == NULL) 8004768: 687b ldr r3, [r7, #4] 800476a: 2b00 cmp r3, #0 800476c: d101 bne.n 8004772 { return HAL_ERROR; 800476e: 2301 movs r3, #1 8004770: e08d b.n 800488e assert_param(IS_I2C_OWN_ADDRESS2(hi2c->Init.OwnAddress2)); assert_param(IS_I2C_OWN_ADDRESS2_MASK(hi2c->Init.OwnAddress2Masks)); assert_param(IS_I2C_GENERAL_CALL(hi2c->Init.GeneralCallMode)); assert_param(IS_I2C_NO_STRETCH(hi2c->Init.NoStretchMode)); if (hi2c->State == HAL_I2C_STATE_RESET) 8004772: 687b ldr r3, [r7, #4] 8004774: f893 3041 ldrb.w r3, [r3, #65] @ 0x41 8004778: b2db uxtb r3, r3 800477a: 2b00 cmp r3, #0 800477c: d106 bne.n 800478c { /* Allocate lock resource and initialize it */ hi2c->Lock = HAL_UNLOCKED; 800477e: 687b ldr r3, [r7, #4] 8004780: 2200 movs r2, #0 8004782: f883 2040 strb.w r2, [r3, #64] @ 0x40 /* Init the low level hardware : GPIO, CLOCK, CORTEX...etc */ hi2c->MspInitCallback(hi2c); #else /* Init the low level hardware : GPIO, CLOCK, CORTEX...etc */ HAL_I2C_MspInit(hi2c); 8004786: 6878 ldr r0, [r7, #4] 8004788: f7fe fe02 bl 8003390 #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ } hi2c->State = HAL_I2C_STATE_BUSY; 800478c: 687b ldr r3, [r7, #4] 800478e: 2224 movs r2, #36 @ 0x24 8004790: f883 2041 strb.w r2, [r3, #65] @ 0x41 /* Disable the selected I2C peripheral */ __HAL_I2C_DISABLE(hi2c); 8004794: 687b ldr r3, [r7, #4] 8004796: 681b ldr r3, [r3, #0] 8004798: 681a ldr r2, [r3, #0] 800479a: 687b ldr r3, [r7, #4] 800479c: 681b ldr r3, [r3, #0] 800479e: f022 0201 bic.w r2, r2, #1 80047a2: 601a str r2, [r3, #0] /*---------------------------- I2Cx TIMINGR Configuration ------------------*/ /* Configure I2Cx: Frequency range */ hi2c->Instance->TIMINGR = hi2c->Init.Timing & TIMING_CLEAR_MASK; 80047a4: 687b ldr r3, [r7, #4] 80047a6: 685a ldr r2, [r3, #4] 80047a8: 687b ldr r3, [r7, #4] 80047aa: 681b ldr r3, [r3, #0] 80047ac: f022 6270 bic.w r2, r2, #251658240 @ 0xf000000 80047b0: 611a str r2, [r3, #16] /*---------------------------- I2Cx OAR1 Configuration ---------------------*/ /* Disable Own Address1 before set the Own Address1 configuration */ hi2c->Instance->OAR1 &= ~I2C_OAR1_OA1EN; 80047b2: 687b ldr r3, [r7, #4] 80047b4: 681b ldr r3, [r3, #0] 80047b6: 689a ldr r2, [r3, #8] 80047b8: 687b ldr r3, [r7, #4] 80047ba: 681b ldr r3, [r3, #0] 80047bc: f422 4200 bic.w r2, r2, #32768 @ 0x8000 80047c0: 609a str r2, [r3, #8] /* Configure I2Cx: Own Address1 and ack own address1 mode */ if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT) 80047c2: 687b ldr r3, [r7, #4] 80047c4: 68db ldr r3, [r3, #12] 80047c6: 2b01 cmp r3, #1 80047c8: d107 bne.n 80047da { hi2c->Instance->OAR1 = (I2C_OAR1_OA1EN | hi2c->Init.OwnAddress1); 80047ca: 687b ldr r3, [r7, #4] 80047cc: 689a ldr r2, [r3, #8] 80047ce: 687b ldr r3, [r7, #4] 80047d0: 681b ldr r3, [r3, #0] 80047d2: f442 4200 orr.w r2, r2, #32768 @ 0x8000 80047d6: 609a str r2, [r3, #8] 80047d8: e006 b.n 80047e8 } else /* I2C_ADDRESSINGMODE_10BIT */ { hi2c->Instance->OAR1 = (I2C_OAR1_OA1EN | I2C_OAR1_OA1MODE | hi2c->Init.OwnAddress1); 80047da: 687b ldr r3, [r7, #4] 80047dc: 689a ldr r2, [r3, #8] 80047de: 687b ldr r3, [r7, #4] 80047e0: 681b ldr r3, [r3, #0] 80047e2: f442 4204 orr.w r2, r2, #33792 @ 0x8400 80047e6: 609a str r2, [r3, #8] } /*---------------------------- I2Cx CR2 Configuration ----------------------*/ /* Configure I2Cx: Addressing Master mode */ if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT) 80047e8: 687b ldr r3, [r7, #4] 80047ea: 68db ldr r3, [r3, #12] 80047ec: 2b02 cmp r3, #2 80047ee: d108 bne.n 8004802 { SET_BIT(hi2c->Instance->CR2, I2C_CR2_ADD10); 80047f0: 687b ldr r3, [r7, #4] 80047f2: 681b ldr r3, [r3, #0] 80047f4: 685a ldr r2, [r3, #4] 80047f6: 687b ldr r3, [r7, #4] 80047f8: 681b ldr r3, [r3, #0] 80047fa: f442 6200 orr.w r2, r2, #2048 @ 0x800 80047fe: 605a str r2, [r3, #4] 8004800: e007 b.n 8004812 } else { /* Clear the I2C ADD10 bit */ CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_ADD10); 8004802: 687b ldr r3, [r7, #4] 8004804: 681b ldr r3, [r3, #0] 8004806: 685a ldr r2, [r3, #4] 8004808: 687b ldr r3, [r7, #4] 800480a: 681b ldr r3, [r3, #0] 800480c: f422 6200 bic.w r2, r2, #2048 @ 0x800 8004810: 605a str r2, [r3, #4] } /* Enable the AUTOEND by default, and enable NACK (should be disable only during Slave process */ hi2c->Instance->CR2 |= (I2C_CR2_AUTOEND | I2C_CR2_NACK); 8004812: 687b ldr r3, [r7, #4] 8004814: 681b ldr r3, [r3, #0] 8004816: 685b ldr r3, [r3, #4] 8004818: 687a ldr r2, [r7, #4] 800481a: 6812 ldr r2, [r2, #0] 800481c: f043 7300 orr.w r3, r3, #33554432 @ 0x2000000 8004820: f443 4300 orr.w r3, r3, #32768 @ 0x8000 8004824: 6053 str r3, [r2, #4] /*---------------------------- I2Cx OAR2 Configuration ---------------------*/ /* Disable Own Address2 before set the Own Address2 configuration */ hi2c->Instance->OAR2 &= ~I2C_DUALADDRESS_ENABLE; 8004826: 687b ldr r3, [r7, #4] 8004828: 681b ldr r3, [r3, #0] 800482a: 68da ldr r2, [r3, #12] 800482c: 687b ldr r3, [r7, #4] 800482e: 681b ldr r3, [r3, #0] 8004830: f422 4200 bic.w r2, r2, #32768 @ 0x8000 8004834: 60da str r2, [r3, #12] /* Configure I2Cx: Dual mode and Own Address2 */ hi2c->Instance->OAR2 = (hi2c->Init.DualAddressMode | hi2c->Init.OwnAddress2 | \ 8004836: 687b ldr r3, [r7, #4] 8004838: 691a ldr r2, [r3, #16] 800483a: 687b ldr r3, [r7, #4] 800483c: 695b ldr r3, [r3, #20] 800483e: ea42 0103 orr.w r1, r2, r3 (hi2c->Init.OwnAddress2Masks << 8)); 8004842: 687b ldr r3, [r7, #4] 8004844: 699b ldr r3, [r3, #24] 8004846: 021a lsls r2, r3, #8 hi2c->Instance->OAR2 = (hi2c->Init.DualAddressMode | hi2c->Init.OwnAddress2 | \ 8004848: 687b ldr r3, [r7, #4] 800484a: 681b ldr r3, [r3, #0] 800484c: 430a orrs r2, r1 800484e: 60da str r2, [r3, #12] /*---------------------------- I2Cx CR1 Configuration ----------------------*/ /* Configure I2Cx: Generalcall and NoStretch mode */ hi2c->Instance->CR1 = (hi2c->Init.GeneralCallMode | hi2c->Init.NoStretchMode); 8004850: 687b ldr r3, [r7, #4] 8004852: 69d9 ldr r1, [r3, #28] 8004854: 687b ldr r3, [r7, #4] 8004856: 6a1a ldr r2, [r3, #32] 8004858: 687b ldr r3, [r7, #4] 800485a: 681b ldr r3, [r3, #0] 800485c: 430a orrs r2, r1 800485e: 601a str r2, [r3, #0] /* Enable the selected I2C peripheral */ __HAL_I2C_ENABLE(hi2c); 8004860: 687b ldr r3, [r7, #4] 8004862: 681b ldr r3, [r3, #0] 8004864: 681a ldr r2, [r3, #0] 8004866: 687b ldr r3, [r7, #4] 8004868: 681b ldr r3, [r3, #0] 800486a: f042 0201 orr.w r2, r2, #1 800486e: 601a str r2, [r3, #0] hi2c->ErrorCode = HAL_I2C_ERROR_NONE; 8004870: 687b ldr r3, [r7, #4] 8004872: 2200 movs r2, #0 8004874: 645a str r2, [r3, #68] @ 0x44 hi2c->State = HAL_I2C_STATE_READY; 8004876: 687b ldr r3, [r7, #4] 8004878: 2220 movs r2, #32 800487a: f883 2041 strb.w r2, [r3, #65] @ 0x41 hi2c->PreviousState = I2C_STATE_NONE; 800487e: 687b ldr r3, [r7, #4] 8004880: 2200 movs r2, #0 8004882: 631a str r2, [r3, #48] @ 0x30 hi2c->Mode = HAL_I2C_MODE_NONE; 8004884: 687b ldr r3, [r7, #4] 8004886: 2200 movs r2, #0 8004888: f883 2042 strb.w r2, [r3, #66] @ 0x42 return HAL_OK; 800488c: 2300 movs r3, #0 } 800488e: 4618 mov r0, r3 8004890: 3708 adds r7, #8 8004892: 46bd mov sp, r7 8004894: bd80 pop {r7, pc} 08004896 : * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains * the configuration information for the specified I2C. * @retval HAL status */ HAL_StatusTypeDef HAL_I2C_DeInit(I2C_HandleTypeDef *hi2c) { 8004896: b580 push {r7, lr} 8004898: b082 sub sp, #8 800489a: af00 add r7, sp, #0 800489c: 6078 str r0, [r7, #4] /* Check the I2C handle allocation */ if (hi2c == NULL) 800489e: 687b ldr r3, [r7, #4] 80048a0: 2b00 cmp r3, #0 80048a2: d101 bne.n 80048a8 { return HAL_ERROR; 80048a4: 2301 movs r3, #1 80048a6: e021 b.n 80048ec } /* Check the parameters */ assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance)); hi2c->State = HAL_I2C_STATE_BUSY; 80048a8: 687b ldr r3, [r7, #4] 80048aa: 2224 movs r2, #36 @ 0x24 80048ac: f883 2041 strb.w r2, [r3, #65] @ 0x41 /* Disable the I2C Peripheral Clock */ __HAL_I2C_DISABLE(hi2c); 80048b0: 687b ldr r3, [r7, #4] 80048b2: 681b ldr r3, [r3, #0] 80048b4: 681a ldr r2, [r3, #0] 80048b6: 687b ldr r3, [r7, #4] 80048b8: 681b ldr r3, [r3, #0] 80048ba: f022 0201 bic.w r2, r2, #1 80048be: 601a str r2, [r3, #0] /* DeInit the low level hardware: GPIO, CLOCK, NVIC */ hi2c->MspDeInitCallback(hi2c); #else /* DeInit the low level hardware: GPIO, CLOCK, NVIC */ HAL_I2C_MspDeInit(hi2c); 80048c0: 6878 ldr r0, [r7, #4] 80048c2: f7fe fdc3 bl 800344c #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ hi2c->ErrorCode = HAL_I2C_ERROR_NONE; 80048c6: 687b ldr r3, [r7, #4] 80048c8: 2200 movs r2, #0 80048ca: 645a str r2, [r3, #68] @ 0x44 hi2c->State = HAL_I2C_STATE_RESET; 80048cc: 687b ldr r3, [r7, #4] 80048ce: 2200 movs r2, #0 80048d0: f883 2041 strb.w r2, [r3, #65] @ 0x41 hi2c->PreviousState = I2C_STATE_NONE; 80048d4: 687b ldr r3, [r7, #4] 80048d6: 2200 movs r2, #0 80048d8: 631a str r2, [r3, #48] @ 0x30 hi2c->Mode = HAL_I2C_MODE_NONE; 80048da: 687b ldr r3, [r7, #4] 80048dc: 2200 movs r2, #0 80048de: f883 2042 strb.w r2, [r3, #66] @ 0x42 /* Release Lock */ __HAL_UNLOCK(hi2c); 80048e2: 687b ldr r3, [r7, #4] 80048e4: 2200 movs r2, #0 80048e6: f883 2040 strb.w r2, [r3, #64] @ 0x40 return HAL_OK; 80048ea: 2300 movs r3, #0 } 80048ec: 4618 mov r0, r3 80048ee: 3708 adds r7, #8 80048f0: 46bd mov sp, r7 80048f2: bd80 pop {r7, pc} 080048f4 : * @param Timeout Timeout duration * @retval HAL status */ HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout) { 80048f4: b580 push {r7, lr} 80048f6: b088 sub sp, #32 80048f8: af02 add r7, sp, #8 80048fa: 60f8 str r0, [r7, #12] 80048fc: 4608 mov r0, r1 80048fe: 4611 mov r1, r2 8004900: 461a mov r2, r3 8004902: 4603 mov r3, r0 8004904: 817b strh r3, [r7, #10] 8004906: 460b mov r3, r1 8004908: 813b strh r3, [r7, #8] 800490a: 4613 mov r3, r2 800490c: 80fb strh r3, [r7, #6] uint32_t tickstart; /* Check the parameters */ assert_param(IS_I2C_MEMADD_SIZE(MemAddSize)); if (hi2c->State == HAL_I2C_STATE_READY) 800490e: 68fb ldr r3, [r7, #12] 8004910: f893 3041 ldrb.w r3, [r3, #65] @ 0x41 8004914: b2db uxtb r3, r3 8004916: 2b20 cmp r3, #32 8004918: f040 80f9 bne.w 8004b0e { if ((pData == NULL) || (Size == 0U)) 800491c: 6a3b ldr r3, [r7, #32] 800491e: 2b00 cmp r3, #0 8004920: d002 beq.n 8004928 8004922: 8cbb ldrh r3, [r7, #36] @ 0x24 8004924: 2b00 cmp r3, #0 8004926: d105 bne.n 8004934 { hi2c->ErrorCode = HAL_I2C_ERROR_INVALID_PARAM; 8004928: 68fb ldr r3, [r7, #12] 800492a: f44f 7200 mov.w r2, #512 @ 0x200 800492e: 645a str r2, [r3, #68] @ 0x44 return HAL_ERROR; 8004930: 2301 movs r3, #1 8004932: e0ed b.n 8004b10 } /* Process Locked */ __HAL_LOCK(hi2c); 8004934: 68fb ldr r3, [r7, #12] 8004936: f893 3040 ldrb.w r3, [r3, #64] @ 0x40 800493a: 2b01 cmp r3, #1 800493c: d101 bne.n 8004942 800493e: 2302 movs r3, #2 8004940: e0e6 b.n 8004b10 8004942: 68fb ldr r3, [r7, #12] 8004944: 2201 movs r2, #1 8004946: f883 2040 strb.w r2, [r3, #64] @ 0x40 /* Init tickstart for timeout management*/ tickstart = HAL_GetTick(); 800494a: f7ff f985 bl 8003c58 800494e: 6178 str r0, [r7, #20] if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY, tickstart) != HAL_OK) 8004950: 697b ldr r3, [r7, #20] 8004952: 9300 str r3, [sp, #0] 8004954: 2319 movs r3, #25 8004956: 2201 movs r2, #1 8004958: f44f 4100 mov.w r1, #32768 @ 0x8000 800495c: 68f8 ldr r0, [r7, #12] 800495e: f000 fac3 bl 8004ee8 8004962: 4603 mov r3, r0 8004964: 2b00 cmp r3, #0 8004966: d001 beq.n 800496c { return HAL_ERROR; 8004968: 2301 movs r3, #1 800496a: e0d1 b.n 8004b10 } hi2c->State = HAL_I2C_STATE_BUSY_TX; 800496c: 68fb ldr r3, [r7, #12] 800496e: 2221 movs r2, #33 @ 0x21 8004970: f883 2041 strb.w r2, [r3, #65] @ 0x41 hi2c->Mode = HAL_I2C_MODE_MEM; 8004974: 68fb ldr r3, [r7, #12] 8004976: 2240 movs r2, #64 @ 0x40 8004978: f883 2042 strb.w r2, [r3, #66] @ 0x42 hi2c->ErrorCode = HAL_I2C_ERROR_NONE; 800497c: 68fb ldr r3, [r7, #12] 800497e: 2200 movs r2, #0 8004980: 645a str r2, [r3, #68] @ 0x44 /* Prepare transfer parameters */ hi2c->pBuffPtr = pData; 8004982: 68fb ldr r3, [r7, #12] 8004984: 6a3a ldr r2, [r7, #32] 8004986: 625a str r2, [r3, #36] @ 0x24 hi2c->XferCount = Size; 8004988: 68fb ldr r3, [r7, #12] 800498a: 8cba ldrh r2, [r7, #36] @ 0x24 800498c: 855a strh r2, [r3, #42] @ 0x2a hi2c->XferISR = NULL; 800498e: 68fb ldr r3, [r7, #12] 8004990: 2200 movs r2, #0 8004992: 635a str r2, [r3, #52] @ 0x34 /* Send Slave Address and Memory Address */ if (I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK) 8004994: 88f8 ldrh r0, [r7, #6] 8004996: 893a ldrh r2, [r7, #8] 8004998: 8979 ldrh r1, [r7, #10] 800499a: 697b ldr r3, [r7, #20] 800499c: 9301 str r3, [sp, #4] 800499e: 6abb ldr r3, [r7, #40] @ 0x28 80049a0: 9300 str r3, [sp, #0] 80049a2: 4603 mov r3, r0 80049a4: 68f8 ldr r0, [r7, #12] 80049a6: f000 f9d3 bl 8004d50 80049aa: 4603 mov r3, r0 80049ac: 2b00 cmp r3, #0 80049ae: d005 beq.n 80049bc { /* Process Unlocked */ __HAL_UNLOCK(hi2c); 80049b0: 68fb ldr r3, [r7, #12] 80049b2: 2200 movs r2, #0 80049b4: f883 2040 strb.w r2, [r3, #64] @ 0x40 return HAL_ERROR; 80049b8: 2301 movs r3, #1 80049ba: e0a9 b.n 8004b10 } /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE */ if (hi2c->XferCount > MAX_NBYTE_SIZE) 80049bc: 68fb ldr r3, [r7, #12] 80049be: 8d5b ldrh r3, [r3, #42] @ 0x2a 80049c0: b29b uxth r3, r3 80049c2: 2bff cmp r3, #255 @ 0xff 80049c4: d90e bls.n 80049e4 { hi2c->XferSize = MAX_NBYTE_SIZE; 80049c6: 68fb ldr r3, [r7, #12] 80049c8: 22ff movs r2, #255 @ 0xff 80049ca: 851a strh r2, [r3, #40] @ 0x28 I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP); 80049cc: 68fb ldr r3, [r7, #12] 80049ce: 8d1b ldrh r3, [r3, #40] @ 0x28 80049d0: b2da uxtb r2, r3 80049d2: 8979 ldrh r1, [r7, #10] 80049d4: 2300 movs r3, #0 80049d6: 9300 str r3, [sp, #0] 80049d8: f04f 7380 mov.w r3, #16777216 @ 0x1000000 80049dc: 68f8 ldr r0, [r7, #12] 80049de: f000 fc47 bl 8005270 80049e2: e00f b.n 8004a04 } else { hi2c->XferSize = hi2c->XferCount; 80049e4: 68fb ldr r3, [r7, #12] 80049e6: 8d5b ldrh r3, [r3, #42] @ 0x2a 80049e8: b29a uxth r2, r3 80049ea: 68fb ldr r3, [r7, #12] 80049ec: 851a strh r2, [r3, #40] @ 0x28 I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP); 80049ee: 68fb ldr r3, [r7, #12] 80049f0: 8d1b ldrh r3, [r3, #40] @ 0x28 80049f2: b2da uxtb r2, r3 80049f4: 8979 ldrh r1, [r7, #10] 80049f6: 2300 movs r3, #0 80049f8: 9300 str r3, [sp, #0] 80049fa: f04f 7300 mov.w r3, #33554432 @ 0x2000000 80049fe: 68f8 ldr r0, [r7, #12] 8004a00: f000 fc36 bl 8005270 } do { /* Wait until TXIS flag is set */ if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) 8004a04: 697a ldr r2, [r7, #20] 8004a06: 6ab9 ldr r1, [r7, #40] @ 0x28 8004a08: 68f8 ldr r0, [r7, #12] 8004a0a: f000 fac6 bl 8004f9a 8004a0e: 4603 mov r3, r0 8004a10: 2b00 cmp r3, #0 8004a12: d001 beq.n 8004a18 { return HAL_ERROR; 8004a14: 2301 movs r3, #1 8004a16: e07b b.n 8004b10 } /* Write data to TXDR */ hi2c->Instance->TXDR = *hi2c->pBuffPtr; 8004a18: 68fb ldr r3, [r7, #12] 8004a1a: 6a5b ldr r3, [r3, #36] @ 0x24 8004a1c: 781a ldrb r2, [r3, #0] 8004a1e: 68fb ldr r3, [r7, #12] 8004a20: 681b ldr r3, [r3, #0] 8004a22: 629a str r2, [r3, #40] @ 0x28 /* Increment Buffer pointer */ hi2c->pBuffPtr++; 8004a24: 68fb ldr r3, [r7, #12] 8004a26: 6a5b ldr r3, [r3, #36] @ 0x24 8004a28: 1c5a adds r2, r3, #1 8004a2a: 68fb ldr r3, [r7, #12] 8004a2c: 625a str r2, [r3, #36] @ 0x24 hi2c->XferCount--; 8004a2e: 68fb ldr r3, [r7, #12] 8004a30: 8d5b ldrh r3, [r3, #42] @ 0x2a 8004a32: b29b uxth r3, r3 8004a34: 3b01 subs r3, #1 8004a36: b29a uxth r2, r3 8004a38: 68fb ldr r3, [r7, #12] 8004a3a: 855a strh r2, [r3, #42] @ 0x2a hi2c->XferSize--; 8004a3c: 68fb ldr r3, [r7, #12] 8004a3e: 8d1b ldrh r3, [r3, #40] @ 0x28 8004a40: 3b01 subs r3, #1 8004a42: b29a uxth r2, r3 8004a44: 68fb ldr r3, [r7, #12] 8004a46: 851a strh r2, [r3, #40] @ 0x28 if ((hi2c->XferCount != 0U) && (hi2c->XferSize == 0U)) 8004a48: 68fb ldr r3, [r7, #12] 8004a4a: 8d5b ldrh r3, [r3, #42] @ 0x2a 8004a4c: b29b uxth r3, r3 8004a4e: 2b00 cmp r3, #0 8004a50: d034 beq.n 8004abc 8004a52: 68fb ldr r3, [r7, #12] 8004a54: 8d1b ldrh r3, [r3, #40] @ 0x28 8004a56: 2b00 cmp r3, #0 8004a58: d130 bne.n 8004abc { /* Wait until TCR flag is set */ if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout, tickstart) != HAL_OK) 8004a5a: 697b ldr r3, [r7, #20] 8004a5c: 9300 str r3, [sp, #0] 8004a5e: 6abb ldr r3, [r7, #40] @ 0x28 8004a60: 2200 movs r2, #0 8004a62: 2180 movs r1, #128 @ 0x80 8004a64: 68f8 ldr r0, [r7, #12] 8004a66: f000 fa3f bl 8004ee8 8004a6a: 4603 mov r3, r0 8004a6c: 2b00 cmp r3, #0 8004a6e: d001 beq.n 8004a74 { return HAL_ERROR; 8004a70: 2301 movs r3, #1 8004a72: e04d b.n 8004b10 } if (hi2c->XferCount > MAX_NBYTE_SIZE) 8004a74: 68fb ldr r3, [r7, #12] 8004a76: 8d5b ldrh r3, [r3, #42] @ 0x2a 8004a78: b29b uxth r3, r3 8004a7a: 2bff cmp r3, #255 @ 0xff 8004a7c: d90e bls.n 8004a9c { hi2c->XferSize = MAX_NBYTE_SIZE; 8004a7e: 68fb ldr r3, [r7, #12] 8004a80: 22ff movs r2, #255 @ 0xff 8004a82: 851a strh r2, [r3, #40] @ 0x28 I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, 8004a84: 68fb ldr r3, [r7, #12] 8004a86: 8d1b ldrh r3, [r3, #40] @ 0x28 8004a88: b2da uxtb r2, r3 8004a8a: 8979 ldrh r1, [r7, #10] 8004a8c: 2300 movs r3, #0 8004a8e: 9300 str r3, [sp, #0] 8004a90: f04f 7380 mov.w r3, #16777216 @ 0x1000000 8004a94: 68f8 ldr r0, [r7, #12] 8004a96: f000 fbeb bl 8005270 8004a9a: e00f b.n 8004abc I2C_NO_STARTSTOP); } else { hi2c->XferSize = hi2c->XferCount; 8004a9c: 68fb ldr r3, [r7, #12] 8004a9e: 8d5b ldrh r3, [r3, #42] @ 0x2a 8004aa0: b29a uxth r2, r3 8004aa2: 68fb ldr r3, [r7, #12] 8004aa4: 851a strh r2, [r3, #40] @ 0x28 I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, 8004aa6: 68fb ldr r3, [r7, #12] 8004aa8: 8d1b ldrh r3, [r3, #40] @ 0x28 8004aaa: b2da uxtb r2, r3 8004aac: 8979 ldrh r1, [r7, #10] 8004aae: 2300 movs r3, #0 8004ab0: 9300 str r3, [sp, #0] 8004ab2: f04f 7300 mov.w r3, #33554432 @ 0x2000000 8004ab6: 68f8 ldr r0, [r7, #12] 8004ab8: f000 fbda bl 8005270 I2C_NO_STARTSTOP); } } } while (hi2c->XferCount > 0U); 8004abc: 68fb ldr r3, [r7, #12] 8004abe: 8d5b ldrh r3, [r3, #42] @ 0x2a 8004ac0: b29b uxth r3, r3 8004ac2: 2b00 cmp r3, #0 8004ac4: d19e bne.n 8004a04 /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */ /* Wait until STOPF flag is reset */ if (I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) 8004ac6: 697a ldr r2, [r7, #20] 8004ac8: 6ab9 ldr r1, [r7, #40] @ 0x28 8004aca: 68f8 ldr r0, [r7, #12] 8004acc: f000 faac bl 8005028 8004ad0: 4603 mov r3, r0 8004ad2: 2b00 cmp r3, #0 8004ad4: d001 beq.n 8004ada { return HAL_ERROR; 8004ad6: 2301 movs r3, #1 8004ad8: e01a b.n 8004b10 } /* Clear STOP Flag */ __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); 8004ada: 68fb ldr r3, [r7, #12] 8004adc: 681b ldr r3, [r3, #0] 8004ade: 2220 movs r2, #32 8004ae0: 61da str r2, [r3, #28] /* Clear Configuration Register 2 */ I2C_RESET_CR2(hi2c); 8004ae2: 68fb ldr r3, [r7, #12] 8004ae4: 681b ldr r3, [r3, #0] 8004ae6: 6859 ldr r1, [r3, #4] 8004ae8: 68fb ldr r3, [r7, #12] 8004aea: 681a ldr r2, [r3, #0] 8004aec: 4b0a ldr r3, [pc, #40] @ (8004b18 ) 8004aee: 400b ands r3, r1 8004af0: 6053 str r3, [r2, #4] hi2c->State = HAL_I2C_STATE_READY; 8004af2: 68fb ldr r3, [r7, #12] 8004af4: 2220 movs r2, #32 8004af6: f883 2041 strb.w r2, [r3, #65] @ 0x41 hi2c->Mode = HAL_I2C_MODE_NONE; 8004afa: 68fb ldr r3, [r7, #12] 8004afc: 2200 movs r2, #0 8004afe: f883 2042 strb.w r2, [r3, #66] @ 0x42 /* Process Unlocked */ __HAL_UNLOCK(hi2c); 8004b02: 68fb ldr r3, [r7, #12] 8004b04: 2200 movs r2, #0 8004b06: f883 2040 strb.w r2, [r3, #64] @ 0x40 return HAL_OK; 8004b0a: 2300 movs r3, #0 8004b0c: e000 b.n 8004b10 } else { return HAL_BUSY; 8004b0e: 2302 movs r3, #2 } } 8004b10: 4618 mov r0, r3 8004b12: 3718 adds r7, #24 8004b14: 46bd mov sp, r7 8004b16: bd80 pop {r7, pc} 8004b18: fe00e800 .word 0xfe00e800 08004b1c : * @param Timeout Timeout duration * @retval HAL status */ HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout) { 8004b1c: b580 push {r7, lr} 8004b1e: b088 sub sp, #32 8004b20: af02 add r7, sp, #8 8004b22: 60f8 str r0, [r7, #12] 8004b24: 4608 mov r0, r1 8004b26: 4611 mov r1, r2 8004b28: 461a mov r2, r3 8004b2a: 4603 mov r3, r0 8004b2c: 817b strh r3, [r7, #10] 8004b2e: 460b mov r3, r1 8004b30: 813b strh r3, [r7, #8] 8004b32: 4613 mov r3, r2 8004b34: 80fb strh r3, [r7, #6] uint32_t tickstart; /* Check the parameters */ assert_param(IS_I2C_MEMADD_SIZE(MemAddSize)); if (hi2c->State == HAL_I2C_STATE_READY) 8004b36: 68fb ldr r3, [r7, #12] 8004b38: f893 3041 ldrb.w r3, [r3, #65] @ 0x41 8004b3c: b2db uxtb r3, r3 8004b3e: 2b20 cmp r3, #32 8004b40: f040 80fd bne.w 8004d3e { if ((pData == NULL) || (Size == 0U)) 8004b44: 6a3b ldr r3, [r7, #32] 8004b46: 2b00 cmp r3, #0 8004b48: d002 beq.n 8004b50 8004b4a: 8cbb ldrh r3, [r7, #36] @ 0x24 8004b4c: 2b00 cmp r3, #0 8004b4e: d105 bne.n 8004b5c { hi2c->ErrorCode = HAL_I2C_ERROR_INVALID_PARAM; 8004b50: 68fb ldr r3, [r7, #12] 8004b52: f44f 7200 mov.w r2, #512 @ 0x200 8004b56: 645a str r2, [r3, #68] @ 0x44 return HAL_ERROR; 8004b58: 2301 movs r3, #1 8004b5a: e0f1 b.n 8004d40 } /* Process Locked */ __HAL_LOCK(hi2c); 8004b5c: 68fb ldr r3, [r7, #12] 8004b5e: f893 3040 ldrb.w r3, [r3, #64] @ 0x40 8004b62: 2b01 cmp r3, #1 8004b64: d101 bne.n 8004b6a 8004b66: 2302 movs r3, #2 8004b68: e0ea b.n 8004d40 8004b6a: 68fb ldr r3, [r7, #12] 8004b6c: 2201 movs r2, #1 8004b6e: f883 2040 strb.w r2, [r3, #64] @ 0x40 /* Init tickstart for timeout management*/ tickstart = HAL_GetTick(); 8004b72: f7ff f871 bl 8003c58 8004b76: 6178 str r0, [r7, #20] if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY, tickstart) != HAL_OK) 8004b78: 697b ldr r3, [r7, #20] 8004b7a: 9300 str r3, [sp, #0] 8004b7c: 2319 movs r3, #25 8004b7e: 2201 movs r2, #1 8004b80: f44f 4100 mov.w r1, #32768 @ 0x8000 8004b84: 68f8 ldr r0, [r7, #12] 8004b86: f000 f9af bl 8004ee8 8004b8a: 4603 mov r3, r0 8004b8c: 2b00 cmp r3, #0 8004b8e: d001 beq.n 8004b94 { return HAL_ERROR; 8004b90: 2301 movs r3, #1 8004b92: e0d5 b.n 8004d40 } hi2c->State = HAL_I2C_STATE_BUSY_RX; 8004b94: 68fb ldr r3, [r7, #12] 8004b96: 2222 movs r2, #34 @ 0x22 8004b98: f883 2041 strb.w r2, [r3, #65] @ 0x41 hi2c->Mode = HAL_I2C_MODE_MEM; 8004b9c: 68fb ldr r3, [r7, #12] 8004b9e: 2240 movs r2, #64 @ 0x40 8004ba0: f883 2042 strb.w r2, [r3, #66] @ 0x42 hi2c->ErrorCode = HAL_I2C_ERROR_NONE; 8004ba4: 68fb ldr r3, [r7, #12] 8004ba6: 2200 movs r2, #0 8004ba8: 645a str r2, [r3, #68] @ 0x44 /* Prepare transfer parameters */ hi2c->pBuffPtr = pData; 8004baa: 68fb ldr r3, [r7, #12] 8004bac: 6a3a ldr r2, [r7, #32] 8004bae: 625a str r2, [r3, #36] @ 0x24 hi2c->XferCount = Size; 8004bb0: 68fb ldr r3, [r7, #12] 8004bb2: 8cba ldrh r2, [r7, #36] @ 0x24 8004bb4: 855a strh r2, [r3, #42] @ 0x2a hi2c->XferISR = NULL; 8004bb6: 68fb ldr r3, [r7, #12] 8004bb8: 2200 movs r2, #0 8004bba: 635a str r2, [r3, #52] @ 0x34 /* Send Slave Address and Memory Address */ if (I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK) 8004bbc: 88f8 ldrh r0, [r7, #6] 8004bbe: 893a ldrh r2, [r7, #8] 8004bc0: 8979 ldrh r1, [r7, #10] 8004bc2: 697b ldr r3, [r7, #20] 8004bc4: 9301 str r3, [sp, #4] 8004bc6: 6abb ldr r3, [r7, #40] @ 0x28 8004bc8: 9300 str r3, [sp, #0] 8004bca: 4603 mov r3, r0 8004bcc: 68f8 ldr r0, [r7, #12] 8004bce: f000 f913 bl 8004df8 8004bd2: 4603 mov r3, r0 8004bd4: 2b00 cmp r3, #0 8004bd6: d005 beq.n 8004be4 { /* Process Unlocked */ __HAL_UNLOCK(hi2c); 8004bd8: 68fb ldr r3, [r7, #12] 8004bda: 2200 movs r2, #0 8004bdc: f883 2040 strb.w r2, [r3, #64] @ 0x40 return HAL_ERROR; 8004be0: 2301 movs r3, #1 8004be2: e0ad b.n 8004d40 } /* Send Slave Address */ /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */ if (hi2c->XferCount > MAX_NBYTE_SIZE) 8004be4: 68fb ldr r3, [r7, #12] 8004be6: 8d5b ldrh r3, [r3, #42] @ 0x2a 8004be8: b29b uxth r3, r3 8004bea: 2bff cmp r3, #255 @ 0xff 8004bec: d90e bls.n 8004c0c { hi2c->XferSize = 1U; 8004bee: 68fb ldr r3, [r7, #12] 8004bf0: 2201 movs r2, #1 8004bf2: 851a strh r2, [r3, #40] @ 0x28 I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, 8004bf4: 68fb ldr r3, [r7, #12] 8004bf6: 8d1b ldrh r3, [r3, #40] @ 0x28 8004bf8: b2da uxtb r2, r3 8004bfa: 8979 ldrh r1, [r7, #10] 8004bfc: 4b52 ldr r3, [pc, #328] @ (8004d48 ) 8004bfe: 9300 str r3, [sp, #0] 8004c00: f04f 7380 mov.w r3, #16777216 @ 0x1000000 8004c04: 68f8 ldr r0, [r7, #12] 8004c06: f000 fb33 bl 8005270 8004c0a: e00f b.n 8004c2c I2C_GENERATE_START_READ); } else { hi2c->XferSize = hi2c->XferCount; 8004c0c: 68fb ldr r3, [r7, #12] 8004c0e: 8d5b ldrh r3, [r3, #42] @ 0x2a 8004c10: b29a uxth r2, r3 8004c12: 68fb ldr r3, [r7, #12] 8004c14: 851a strh r2, [r3, #40] @ 0x28 I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, 8004c16: 68fb ldr r3, [r7, #12] 8004c18: 8d1b ldrh r3, [r3, #40] @ 0x28 8004c1a: b2da uxtb r2, r3 8004c1c: 8979 ldrh r1, [r7, #10] 8004c1e: 4b4a ldr r3, [pc, #296] @ (8004d48 ) 8004c20: 9300 str r3, [sp, #0] 8004c22: f04f 7300 mov.w r3, #33554432 @ 0x2000000 8004c26: 68f8 ldr r0, [r7, #12] 8004c28: f000 fb22 bl 8005270 } do { /* Wait until RXNE flag is set */ if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_RXNE, RESET, Timeout, tickstart) != HAL_OK) 8004c2c: 697b ldr r3, [r7, #20] 8004c2e: 9300 str r3, [sp, #0] 8004c30: 6abb ldr r3, [r7, #40] @ 0x28 8004c32: 2200 movs r2, #0 8004c34: 2104 movs r1, #4 8004c36: 68f8 ldr r0, [r7, #12] 8004c38: f000 f956 bl 8004ee8 8004c3c: 4603 mov r3, r0 8004c3e: 2b00 cmp r3, #0 8004c40: d001 beq.n 8004c46 { return HAL_ERROR; 8004c42: 2301 movs r3, #1 8004c44: e07c b.n 8004d40 } /* Read data from RXDR */ *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->RXDR; 8004c46: 68fb ldr r3, [r7, #12] 8004c48: 681b ldr r3, [r3, #0] 8004c4a: 6a5a ldr r2, [r3, #36] @ 0x24 8004c4c: 68fb ldr r3, [r7, #12] 8004c4e: 6a5b ldr r3, [r3, #36] @ 0x24 8004c50: b2d2 uxtb r2, r2 8004c52: 701a strb r2, [r3, #0] /* Increment Buffer pointer */ hi2c->pBuffPtr++; 8004c54: 68fb ldr r3, [r7, #12] 8004c56: 6a5b ldr r3, [r3, #36] @ 0x24 8004c58: 1c5a adds r2, r3, #1 8004c5a: 68fb ldr r3, [r7, #12] 8004c5c: 625a str r2, [r3, #36] @ 0x24 hi2c->XferSize--; 8004c5e: 68fb ldr r3, [r7, #12] 8004c60: 8d1b ldrh r3, [r3, #40] @ 0x28 8004c62: 3b01 subs r3, #1 8004c64: b29a uxth r2, r3 8004c66: 68fb ldr r3, [r7, #12] 8004c68: 851a strh r2, [r3, #40] @ 0x28 hi2c->XferCount--; 8004c6a: 68fb ldr r3, [r7, #12] 8004c6c: 8d5b ldrh r3, [r3, #42] @ 0x2a 8004c6e: b29b uxth r3, r3 8004c70: 3b01 subs r3, #1 8004c72: b29a uxth r2, r3 8004c74: 68fb ldr r3, [r7, #12] 8004c76: 855a strh r2, [r3, #42] @ 0x2a if ((hi2c->XferCount != 0U) && (hi2c->XferSize == 0U)) 8004c78: 68fb ldr r3, [r7, #12] 8004c7a: 8d5b ldrh r3, [r3, #42] @ 0x2a 8004c7c: b29b uxth r3, r3 8004c7e: 2b00 cmp r3, #0 8004c80: d034 beq.n 8004cec 8004c82: 68fb ldr r3, [r7, #12] 8004c84: 8d1b ldrh r3, [r3, #40] @ 0x28 8004c86: 2b00 cmp r3, #0 8004c88: d130 bne.n 8004cec { /* Wait until TCR flag is set */ if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout, tickstart) != HAL_OK) 8004c8a: 697b ldr r3, [r7, #20] 8004c8c: 9300 str r3, [sp, #0] 8004c8e: 6abb ldr r3, [r7, #40] @ 0x28 8004c90: 2200 movs r2, #0 8004c92: 2180 movs r1, #128 @ 0x80 8004c94: 68f8 ldr r0, [r7, #12] 8004c96: f000 f927 bl 8004ee8 8004c9a: 4603 mov r3, r0 8004c9c: 2b00 cmp r3, #0 8004c9e: d001 beq.n 8004ca4 { return HAL_ERROR; 8004ca0: 2301 movs r3, #1 8004ca2: e04d b.n 8004d40 } if (hi2c->XferCount > MAX_NBYTE_SIZE) 8004ca4: 68fb ldr r3, [r7, #12] 8004ca6: 8d5b ldrh r3, [r3, #42] @ 0x2a 8004ca8: b29b uxth r3, r3 8004caa: 2bff cmp r3, #255 @ 0xff 8004cac: d90e bls.n 8004ccc { hi2c->XferSize = 1U; 8004cae: 68fb ldr r3, [r7, #12] 8004cb0: 2201 movs r2, #1 8004cb2: 851a strh r2, [r3, #40] @ 0x28 I2C_TransferConfig(hi2c, DevAddress, (uint8_t) hi2c->XferSize, I2C_RELOAD_MODE, 8004cb4: 68fb ldr r3, [r7, #12] 8004cb6: 8d1b ldrh r3, [r3, #40] @ 0x28 8004cb8: b2da uxtb r2, r3 8004cba: 8979 ldrh r1, [r7, #10] 8004cbc: 2300 movs r3, #0 8004cbe: 9300 str r3, [sp, #0] 8004cc0: f04f 7380 mov.w r3, #16777216 @ 0x1000000 8004cc4: 68f8 ldr r0, [r7, #12] 8004cc6: f000 fad3 bl 8005270 8004cca: e00f b.n 8004cec I2C_NO_STARTSTOP); } else { hi2c->XferSize = hi2c->XferCount; 8004ccc: 68fb ldr r3, [r7, #12] 8004cce: 8d5b ldrh r3, [r3, #42] @ 0x2a 8004cd0: b29a uxth r2, r3 8004cd2: 68fb ldr r3, [r7, #12] 8004cd4: 851a strh r2, [r3, #40] @ 0x28 I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, 8004cd6: 68fb ldr r3, [r7, #12] 8004cd8: 8d1b ldrh r3, [r3, #40] @ 0x28 8004cda: b2da uxtb r2, r3 8004cdc: 8979 ldrh r1, [r7, #10] 8004cde: 2300 movs r3, #0 8004ce0: 9300 str r3, [sp, #0] 8004ce2: f04f 7300 mov.w r3, #33554432 @ 0x2000000 8004ce6: 68f8 ldr r0, [r7, #12] 8004ce8: f000 fac2 bl 8005270 I2C_NO_STARTSTOP); } } } while (hi2c->XferCount > 0U); 8004cec: 68fb ldr r3, [r7, #12] 8004cee: 8d5b ldrh r3, [r3, #42] @ 0x2a 8004cf0: b29b uxth r3, r3 8004cf2: 2b00 cmp r3, #0 8004cf4: d19a bne.n 8004c2c /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */ /* Wait until STOPF flag is reset */ if (I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) 8004cf6: 697a ldr r2, [r7, #20] 8004cf8: 6ab9 ldr r1, [r7, #40] @ 0x28 8004cfa: 68f8 ldr r0, [r7, #12] 8004cfc: f000 f994 bl 8005028 8004d00: 4603 mov r3, r0 8004d02: 2b00 cmp r3, #0 8004d04: d001 beq.n 8004d0a { return HAL_ERROR; 8004d06: 2301 movs r3, #1 8004d08: e01a b.n 8004d40 } /* Clear STOP Flag */ __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); 8004d0a: 68fb ldr r3, [r7, #12] 8004d0c: 681b ldr r3, [r3, #0] 8004d0e: 2220 movs r2, #32 8004d10: 61da str r2, [r3, #28] /* Clear Configuration Register 2 */ I2C_RESET_CR2(hi2c); 8004d12: 68fb ldr r3, [r7, #12] 8004d14: 681b ldr r3, [r3, #0] 8004d16: 6859 ldr r1, [r3, #4] 8004d18: 68fb ldr r3, [r7, #12] 8004d1a: 681a ldr r2, [r3, #0] 8004d1c: 4b0b ldr r3, [pc, #44] @ (8004d4c ) 8004d1e: 400b ands r3, r1 8004d20: 6053 str r3, [r2, #4] hi2c->State = HAL_I2C_STATE_READY; 8004d22: 68fb ldr r3, [r7, #12] 8004d24: 2220 movs r2, #32 8004d26: f883 2041 strb.w r2, [r3, #65] @ 0x41 hi2c->Mode = HAL_I2C_MODE_NONE; 8004d2a: 68fb ldr r3, [r7, #12] 8004d2c: 2200 movs r2, #0 8004d2e: f883 2042 strb.w r2, [r3, #66] @ 0x42 /* Process Unlocked */ __HAL_UNLOCK(hi2c); 8004d32: 68fb ldr r3, [r7, #12] 8004d34: 2200 movs r2, #0 8004d36: f883 2040 strb.w r2, [r3, #64] @ 0x40 return HAL_OK; 8004d3a: 2300 movs r3, #0 8004d3c: e000 b.n 8004d40 } else { return HAL_BUSY; 8004d3e: 2302 movs r3, #2 } } 8004d40: 4618 mov r0, r3 8004d42: 3718 adds r7, #24 8004d44: 46bd mov sp, r7 8004d46: bd80 pop {r7, pc} 8004d48: 80002400 .word 0x80002400 8004d4c: fe00e800 .word 0xfe00e800 08004d50 : * @retval HAL status */ static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart) { 8004d50: b580 push {r7, lr} 8004d52: b086 sub sp, #24 8004d54: af02 add r7, sp, #8 8004d56: 60f8 str r0, [r7, #12] 8004d58: 4608 mov r0, r1 8004d5a: 4611 mov r1, r2 8004d5c: 461a mov r2, r3 8004d5e: 4603 mov r3, r0 8004d60: 817b strh r3, [r7, #10] 8004d62: 460b mov r3, r1 8004d64: 813b strh r3, [r7, #8] 8004d66: 4613 mov r3, r2 8004d68: 80fb strh r3, [r7, #6] I2C_TransferConfig(hi2c, DevAddress, (uint8_t)MemAddSize, I2C_RELOAD_MODE, I2C_GENERATE_START_WRITE); 8004d6a: 88fb ldrh r3, [r7, #6] 8004d6c: b2da uxtb r2, r3 8004d6e: 8979 ldrh r1, [r7, #10] 8004d70: 4b20 ldr r3, [pc, #128] @ (8004df4 ) 8004d72: 9300 str r3, [sp, #0] 8004d74: f04f 7380 mov.w r3, #16777216 @ 0x1000000 8004d78: 68f8 ldr r0, [r7, #12] 8004d7a: f000 fa79 bl 8005270 /* Wait until TXIS flag is set */ if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK) 8004d7e: 69fa ldr r2, [r7, #28] 8004d80: 69b9 ldr r1, [r7, #24] 8004d82: 68f8 ldr r0, [r7, #12] 8004d84: f000 f909 bl 8004f9a 8004d88: 4603 mov r3, r0 8004d8a: 2b00 cmp r3, #0 8004d8c: d001 beq.n 8004d92 { return HAL_ERROR; 8004d8e: 2301 movs r3, #1 8004d90: e02c b.n 8004dec } /* If Memory address size is 8Bit */ if (MemAddSize == I2C_MEMADD_SIZE_8BIT) 8004d92: 88fb ldrh r3, [r7, #6] 8004d94: 2b01 cmp r3, #1 8004d96: d105 bne.n 8004da4 { /* Send Memory Address */ hi2c->Instance->TXDR = I2C_MEM_ADD_LSB(MemAddress); 8004d98: 893b ldrh r3, [r7, #8] 8004d9a: b2da uxtb r2, r3 8004d9c: 68fb ldr r3, [r7, #12] 8004d9e: 681b ldr r3, [r3, #0] 8004da0: 629a str r2, [r3, #40] @ 0x28 8004da2: e015 b.n 8004dd0 } /* If Memory address size is 16Bit */ else { /* Send MSB of Memory Address */ hi2c->Instance->TXDR = I2C_MEM_ADD_MSB(MemAddress); 8004da4: 893b ldrh r3, [r7, #8] 8004da6: 0a1b lsrs r3, r3, #8 8004da8: b29b uxth r3, r3 8004daa: b2da uxtb r2, r3 8004dac: 68fb ldr r3, [r7, #12] 8004dae: 681b ldr r3, [r3, #0] 8004db0: 629a str r2, [r3, #40] @ 0x28 /* Wait until TXIS flag is set */ if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK) 8004db2: 69fa ldr r2, [r7, #28] 8004db4: 69b9 ldr r1, [r7, #24] 8004db6: 68f8 ldr r0, [r7, #12] 8004db8: f000 f8ef bl 8004f9a 8004dbc: 4603 mov r3, r0 8004dbe: 2b00 cmp r3, #0 8004dc0: d001 beq.n 8004dc6 { return HAL_ERROR; 8004dc2: 2301 movs r3, #1 8004dc4: e012 b.n 8004dec } /* Send LSB of Memory Address */ hi2c->Instance->TXDR = I2C_MEM_ADD_LSB(MemAddress); 8004dc6: 893b ldrh r3, [r7, #8] 8004dc8: b2da uxtb r2, r3 8004dca: 68fb ldr r3, [r7, #12] 8004dcc: 681b ldr r3, [r3, #0] 8004dce: 629a str r2, [r3, #40] @ 0x28 } /* Wait until TCR flag is set */ if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout, Tickstart) != HAL_OK) 8004dd0: 69fb ldr r3, [r7, #28] 8004dd2: 9300 str r3, [sp, #0] 8004dd4: 69bb ldr r3, [r7, #24] 8004dd6: 2200 movs r2, #0 8004dd8: 2180 movs r1, #128 @ 0x80 8004dda: 68f8 ldr r0, [r7, #12] 8004ddc: f000 f884 bl 8004ee8 8004de0: 4603 mov r3, r0 8004de2: 2b00 cmp r3, #0 8004de4: d001 beq.n 8004dea { return HAL_ERROR; 8004de6: 2301 movs r3, #1 8004de8: e000 b.n 8004dec } return HAL_OK; 8004dea: 2300 movs r3, #0 } 8004dec: 4618 mov r0, r3 8004dee: 3710 adds r7, #16 8004df0: 46bd mov sp, r7 8004df2: bd80 pop {r7, pc} 8004df4: 80002000 .word 0x80002000 08004df8 : * @retval HAL status */ static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart) { 8004df8: b580 push {r7, lr} 8004dfa: b086 sub sp, #24 8004dfc: af02 add r7, sp, #8 8004dfe: 60f8 str r0, [r7, #12] 8004e00: 4608 mov r0, r1 8004e02: 4611 mov r1, r2 8004e04: 461a mov r2, r3 8004e06: 4603 mov r3, r0 8004e08: 817b strh r3, [r7, #10] 8004e0a: 460b mov r3, r1 8004e0c: 813b strh r3, [r7, #8] 8004e0e: 4613 mov r3, r2 8004e10: 80fb strh r3, [r7, #6] I2C_TransferConfig(hi2c, DevAddress, (uint8_t)MemAddSize, I2C_SOFTEND_MODE, I2C_GENERATE_START_WRITE); 8004e12: 88fb ldrh r3, [r7, #6] 8004e14: b2da uxtb r2, r3 8004e16: 8979 ldrh r1, [r7, #10] 8004e18: 4b20 ldr r3, [pc, #128] @ (8004e9c ) 8004e1a: 9300 str r3, [sp, #0] 8004e1c: 2300 movs r3, #0 8004e1e: 68f8 ldr r0, [r7, #12] 8004e20: f000 fa26 bl 8005270 /* Wait until TXIS flag is set */ if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK) 8004e24: 69fa ldr r2, [r7, #28] 8004e26: 69b9 ldr r1, [r7, #24] 8004e28: 68f8 ldr r0, [r7, #12] 8004e2a: f000 f8b6 bl 8004f9a 8004e2e: 4603 mov r3, r0 8004e30: 2b00 cmp r3, #0 8004e32: d001 beq.n 8004e38 { return HAL_ERROR; 8004e34: 2301 movs r3, #1 8004e36: e02c b.n 8004e92 } /* If Memory address size is 8Bit */ if (MemAddSize == I2C_MEMADD_SIZE_8BIT) 8004e38: 88fb ldrh r3, [r7, #6] 8004e3a: 2b01 cmp r3, #1 8004e3c: d105 bne.n 8004e4a { /* Send Memory Address */ hi2c->Instance->TXDR = I2C_MEM_ADD_LSB(MemAddress); 8004e3e: 893b ldrh r3, [r7, #8] 8004e40: b2da uxtb r2, r3 8004e42: 68fb ldr r3, [r7, #12] 8004e44: 681b ldr r3, [r3, #0] 8004e46: 629a str r2, [r3, #40] @ 0x28 8004e48: e015 b.n 8004e76 } /* If Memory address size is 16Bit */ else { /* Send MSB of Memory Address */ hi2c->Instance->TXDR = I2C_MEM_ADD_MSB(MemAddress); 8004e4a: 893b ldrh r3, [r7, #8] 8004e4c: 0a1b lsrs r3, r3, #8 8004e4e: b29b uxth r3, r3 8004e50: b2da uxtb r2, r3 8004e52: 68fb ldr r3, [r7, #12] 8004e54: 681b ldr r3, [r3, #0] 8004e56: 629a str r2, [r3, #40] @ 0x28 /* Wait until TXIS flag is set */ if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK) 8004e58: 69fa ldr r2, [r7, #28] 8004e5a: 69b9 ldr r1, [r7, #24] 8004e5c: 68f8 ldr r0, [r7, #12] 8004e5e: f000 f89c bl 8004f9a 8004e62: 4603 mov r3, r0 8004e64: 2b00 cmp r3, #0 8004e66: d001 beq.n 8004e6c { return HAL_ERROR; 8004e68: 2301 movs r3, #1 8004e6a: e012 b.n 8004e92 } /* Send LSB of Memory Address */ hi2c->Instance->TXDR = I2C_MEM_ADD_LSB(MemAddress); 8004e6c: 893b ldrh r3, [r7, #8] 8004e6e: b2da uxtb r2, r3 8004e70: 68fb ldr r3, [r7, #12] 8004e72: 681b ldr r3, [r3, #0] 8004e74: 629a str r2, [r3, #40] @ 0x28 } /* Wait until TC flag is set */ if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TC, RESET, Timeout, Tickstart) != HAL_OK) 8004e76: 69fb ldr r3, [r7, #28] 8004e78: 9300 str r3, [sp, #0] 8004e7a: 69bb ldr r3, [r7, #24] 8004e7c: 2200 movs r2, #0 8004e7e: 2140 movs r1, #64 @ 0x40 8004e80: 68f8 ldr r0, [r7, #12] 8004e82: f000 f831 bl 8004ee8 8004e86: 4603 mov r3, r0 8004e88: 2b00 cmp r3, #0 8004e8a: d001 beq.n 8004e90 { return HAL_ERROR; 8004e8c: 2301 movs r3, #1 8004e8e: e000 b.n 8004e92 } return HAL_OK; 8004e90: 2300 movs r3, #0 } 8004e92: 4618 mov r0, r3 8004e94: 3710 adds r7, #16 8004e96: 46bd mov sp, r7 8004e98: bd80 pop {r7, pc} 8004e9a: bf00 nop 8004e9c: 80002000 .word 0x80002000 08004ea0 : * @brief I2C Tx data register flush process. * @param hi2c I2C handle. * @retval None */ static void I2C_Flush_TXDR(I2C_HandleTypeDef *hi2c) { 8004ea0: b480 push {r7} 8004ea2: b083 sub sp, #12 8004ea4: af00 add r7, sp, #0 8004ea6: 6078 str r0, [r7, #4] /* If a pending TXIS flag is set */ /* Write a dummy data in TXDR to clear it */ if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXIS) != RESET) 8004ea8: 687b ldr r3, [r7, #4] 8004eaa: 681b ldr r3, [r3, #0] 8004eac: 699b ldr r3, [r3, #24] 8004eae: f003 0302 and.w r3, r3, #2 8004eb2: 2b02 cmp r3, #2 8004eb4: d103 bne.n 8004ebe { hi2c->Instance->TXDR = 0x00U; 8004eb6: 687b ldr r3, [r7, #4] 8004eb8: 681b ldr r3, [r3, #0] 8004eba: 2200 movs r2, #0 8004ebc: 629a str r2, [r3, #40] @ 0x28 } /* Flush TX register if not empty */ if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE) == RESET) 8004ebe: 687b ldr r3, [r7, #4] 8004ec0: 681b ldr r3, [r3, #0] 8004ec2: 699b ldr r3, [r3, #24] 8004ec4: f003 0301 and.w r3, r3, #1 8004ec8: 2b01 cmp r3, #1 8004eca: d007 beq.n 8004edc { __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_TXE); 8004ecc: 687b ldr r3, [r7, #4] 8004ece: 681b ldr r3, [r3, #0] 8004ed0: 699a ldr r2, [r3, #24] 8004ed2: 687b ldr r3, [r7, #4] 8004ed4: 681b ldr r3, [r3, #0] 8004ed6: f042 0201 orr.w r2, r2, #1 8004eda: 619a str r2, [r3, #24] } } 8004edc: bf00 nop 8004ede: 370c adds r7, #12 8004ee0: 46bd mov sp, r7 8004ee2: f85d 7b04 ldr.w r7, [sp], #4 8004ee6: 4770 bx lr 08004ee8 : * @param Tickstart Tick start value * @retval HAL status */ static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status, uint32_t Timeout, uint32_t Tickstart) { 8004ee8: b580 push {r7, lr} 8004eea: b084 sub sp, #16 8004eec: af00 add r7, sp, #0 8004eee: 60f8 str r0, [r7, #12] 8004ef0: 60b9 str r1, [r7, #8] 8004ef2: 603b str r3, [r7, #0] 8004ef4: 4613 mov r3, r2 8004ef6: 71fb strb r3, [r7, #7] while (__HAL_I2C_GET_FLAG(hi2c, Flag) == Status) 8004ef8: e03b b.n 8004f72 { /* Check if an error is detected */ if (I2C_IsErrorOccurred(hi2c, Timeout, Tickstart) != HAL_OK) 8004efa: 69ba ldr r2, [r7, #24] 8004efc: 6839 ldr r1, [r7, #0] 8004efe: 68f8 ldr r0, [r7, #12] 8004f00: f000 f8d6 bl 80050b0 8004f04: 4603 mov r3, r0 8004f06: 2b00 cmp r3, #0 8004f08: d001 beq.n 8004f0e { return HAL_ERROR; 8004f0a: 2301 movs r3, #1 8004f0c: e041 b.n 8004f92 } /* Check for the Timeout */ if (Timeout != HAL_MAX_DELAY) 8004f0e: 683b ldr r3, [r7, #0] 8004f10: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff 8004f14: d02d beq.n 8004f72 { if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) 8004f16: f7fe fe9f bl 8003c58 8004f1a: 4602 mov r2, r0 8004f1c: 69bb ldr r3, [r7, #24] 8004f1e: 1ad3 subs r3, r2, r3 8004f20: 683a ldr r2, [r7, #0] 8004f22: 429a cmp r2, r3 8004f24: d302 bcc.n 8004f2c 8004f26: 683b ldr r3, [r7, #0] 8004f28: 2b00 cmp r3, #0 8004f2a: d122 bne.n 8004f72 { if ((__HAL_I2C_GET_FLAG(hi2c, Flag) == Status)) 8004f2c: 68fb ldr r3, [r7, #12] 8004f2e: 681b ldr r3, [r3, #0] 8004f30: 699a ldr r2, [r3, #24] 8004f32: 68bb ldr r3, [r7, #8] 8004f34: 4013 ands r3, r2 8004f36: 68ba ldr r2, [r7, #8] 8004f38: 429a cmp r2, r3 8004f3a: bf0c ite eq 8004f3c: 2301 moveq r3, #1 8004f3e: 2300 movne r3, #0 8004f40: b2db uxtb r3, r3 8004f42: 461a mov r2, r3 8004f44: 79fb ldrb r3, [r7, #7] 8004f46: 429a cmp r2, r3 8004f48: d113 bne.n 8004f72 { hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; 8004f4a: 68fb ldr r3, [r7, #12] 8004f4c: 6c5b ldr r3, [r3, #68] @ 0x44 8004f4e: f043 0220 orr.w r2, r3, #32 8004f52: 68fb ldr r3, [r7, #12] 8004f54: 645a str r2, [r3, #68] @ 0x44 hi2c->State = HAL_I2C_STATE_READY; 8004f56: 68fb ldr r3, [r7, #12] 8004f58: 2220 movs r2, #32 8004f5a: f883 2041 strb.w r2, [r3, #65] @ 0x41 hi2c->Mode = HAL_I2C_MODE_NONE; 8004f5e: 68fb ldr r3, [r7, #12] 8004f60: 2200 movs r2, #0 8004f62: f883 2042 strb.w r2, [r3, #66] @ 0x42 /* Process Unlocked */ __HAL_UNLOCK(hi2c); 8004f66: 68fb ldr r3, [r7, #12] 8004f68: 2200 movs r2, #0 8004f6a: f883 2040 strb.w r2, [r3, #64] @ 0x40 return HAL_ERROR; 8004f6e: 2301 movs r3, #1 8004f70: e00f b.n 8004f92 while (__HAL_I2C_GET_FLAG(hi2c, Flag) == Status) 8004f72: 68fb ldr r3, [r7, #12] 8004f74: 681b ldr r3, [r3, #0] 8004f76: 699a ldr r2, [r3, #24] 8004f78: 68bb ldr r3, [r7, #8] 8004f7a: 4013 ands r3, r2 8004f7c: 68ba ldr r2, [r7, #8] 8004f7e: 429a cmp r2, r3 8004f80: bf0c ite eq 8004f82: 2301 moveq r3, #1 8004f84: 2300 movne r3, #0 8004f86: b2db uxtb r3, r3 8004f88: 461a mov r2, r3 8004f8a: 79fb ldrb r3, [r7, #7] 8004f8c: 429a cmp r2, r3 8004f8e: d0b4 beq.n 8004efa } } } } return HAL_OK; 8004f90: 2300 movs r3, #0 } 8004f92: 4618 mov r0, r3 8004f94: 3710 adds r7, #16 8004f96: 46bd mov sp, r7 8004f98: bd80 pop {r7, pc} 08004f9a : * @param Tickstart Tick start value * @retval HAL status */ static HAL_StatusTypeDef I2C_WaitOnTXISFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart) { 8004f9a: b580 push {r7, lr} 8004f9c: b084 sub sp, #16 8004f9e: af00 add r7, sp, #0 8004fa0: 60f8 str r0, [r7, #12] 8004fa2: 60b9 str r1, [r7, #8] 8004fa4: 607a str r2, [r7, #4] while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXIS) == RESET) 8004fa6: e033 b.n 8005010 { /* Check if an error is detected */ if (I2C_IsErrorOccurred(hi2c, Timeout, Tickstart) != HAL_OK) 8004fa8: 687a ldr r2, [r7, #4] 8004faa: 68b9 ldr r1, [r7, #8] 8004fac: 68f8 ldr r0, [r7, #12] 8004fae: f000 f87f bl 80050b0 8004fb2: 4603 mov r3, r0 8004fb4: 2b00 cmp r3, #0 8004fb6: d001 beq.n 8004fbc { return HAL_ERROR; 8004fb8: 2301 movs r3, #1 8004fba: e031 b.n 8005020 } /* Check for the Timeout */ if (Timeout != HAL_MAX_DELAY) 8004fbc: 68bb ldr r3, [r7, #8] 8004fbe: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff 8004fc2: d025 beq.n 8005010 { if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) 8004fc4: f7fe fe48 bl 8003c58 8004fc8: 4602 mov r2, r0 8004fca: 687b ldr r3, [r7, #4] 8004fcc: 1ad3 subs r3, r2, r3 8004fce: 68ba ldr r2, [r7, #8] 8004fd0: 429a cmp r2, r3 8004fd2: d302 bcc.n 8004fda 8004fd4: 68bb ldr r3, [r7, #8] 8004fd6: 2b00 cmp r3, #0 8004fd8: d11a bne.n 8005010 { if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXIS) == RESET)) 8004fda: 68fb ldr r3, [r7, #12] 8004fdc: 681b ldr r3, [r3, #0] 8004fde: 699b ldr r3, [r3, #24] 8004fe0: f003 0302 and.w r3, r3, #2 8004fe4: 2b02 cmp r3, #2 8004fe6: d013 beq.n 8005010 { hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; 8004fe8: 68fb ldr r3, [r7, #12] 8004fea: 6c5b ldr r3, [r3, #68] @ 0x44 8004fec: f043 0220 orr.w r2, r3, #32 8004ff0: 68fb ldr r3, [r7, #12] 8004ff2: 645a str r2, [r3, #68] @ 0x44 hi2c->State = HAL_I2C_STATE_READY; 8004ff4: 68fb ldr r3, [r7, #12] 8004ff6: 2220 movs r2, #32 8004ff8: f883 2041 strb.w r2, [r3, #65] @ 0x41 hi2c->Mode = HAL_I2C_MODE_NONE; 8004ffc: 68fb ldr r3, [r7, #12] 8004ffe: 2200 movs r2, #0 8005000: f883 2042 strb.w r2, [r3, #66] @ 0x42 /* Process Unlocked */ __HAL_UNLOCK(hi2c); 8005004: 68fb ldr r3, [r7, #12] 8005006: 2200 movs r2, #0 8005008: f883 2040 strb.w r2, [r3, #64] @ 0x40 return HAL_ERROR; 800500c: 2301 movs r3, #1 800500e: e007 b.n 8005020 while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXIS) == RESET) 8005010: 68fb ldr r3, [r7, #12] 8005012: 681b ldr r3, [r3, #0] 8005014: 699b ldr r3, [r3, #24] 8005016: f003 0302 and.w r3, r3, #2 800501a: 2b02 cmp r3, #2 800501c: d1c4 bne.n 8004fa8 } } } } return HAL_OK; 800501e: 2300 movs r3, #0 } 8005020: 4618 mov r0, r3 8005022: 3710 adds r7, #16 8005024: 46bd mov sp, r7 8005026: bd80 pop {r7, pc} 08005028 : * @param Tickstart Tick start value * @retval HAL status */ static HAL_StatusTypeDef I2C_WaitOnSTOPFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart) { 8005028: b580 push {r7, lr} 800502a: b084 sub sp, #16 800502c: af00 add r7, sp, #0 800502e: 60f8 str r0, [r7, #12] 8005030: 60b9 str r1, [r7, #8] 8005032: 607a str r2, [r7, #4] while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET) 8005034: e02f b.n 8005096 { /* Check if an error is detected */ if (I2C_IsErrorOccurred(hi2c, Timeout, Tickstart) != HAL_OK) 8005036: 687a ldr r2, [r7, #4] 8005038: 68b9 ldr r1, [r7, #8] 800503a: 68f8 ldr r0, [r7, #12] 800503c: f000 f838 bl 80050b0 8005040: 4603 mov r3, r0 8005042: 2b00 cmp r3, #0 8005044: d001 beq.n 800504a { return HAL_ERROR; 8005046: 2301 movs r3, #1 8005048: e02d b.n 80050a6 } /* Check for the Timeout */ if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) 800504a: f7fe fe05 bl 8003c58 800504e: 4602 mov r2, r0 8005050: 687b ldr r3, [r7, #4] 8005052: 1ad3 subs r3, r2, r3 8005054: 68ba ldr r2, [r7, #8] 8005056: 429a cmp r2, r3 8005058: d302 bcc.n 8005060 800505a: 68bb ldr r3, [r7, #8] 800505c: 2b00 cmp r3, #0 800505e: d11a bne.n 8005096 { if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET)) 8005060: 68fb ldr r3, [r7, #12] 8005062: 681b ldr r3, [r3, #0] 8005064: 699b ldr r3, [r3, #24] 8005066: f003 0320 and.w r3, r3, #32 800506a: 2b20 cmp r3, #32 800506c: d013 beq.n 8005096 { hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; 800506e: 68fb ldr r3, [r7, #12] 8005070: 6c5b ldr r3, [r3, #68] @ 0x44 8005072: f043 0220 orr.w r2, r3, #32 8005076: 68fb ldr r3, [r7, #12] 8005078: 645a str r2, [r3, #68] @ 0x44 hi2c->State = HAL_I2C_STATE_READY; 800507a: 68fb ldr r3, [r7, #12] 800507c: 2220 movs r2, #32 800507e: f883 2041 strb.w r2, [r3, #65] @ 0x41 hi2c->Mode = HAL_I2C_MODE_NONE; 8005082: 68fb ldr r3, [r7, #12] 8005084: 2200 movs r2, #0 8005086: f883 2042 strb.w r2, [r3, #66] @ 0x42 /* Process Unlocked */ __HAL_UNLOCK(hi2c); 800508a: 68fb ldr r3, [r7, #12] 800508c: 2200 movs r2, #0 800508e: f883 2040 strb.w r2, [r3, #64] @ 0x40 return HAL_ERROR; 8005092: 2301 movs r3, #1 8005094: e007 b.n 80050a6 while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET) 8005096: 68fb ldr r3, [r7, #12] 8005098: 681b ldr r3, [r3, #0] 800509a: 699b ldr r3, [r3, #24] 800509c: f003 0320 and.w r3, r3, #32 80050a0: 2b20 cmp r3, #32 80050a2: d1c8 bne.n 8005036 } } } return HAL_OK; 80050a4: 2300 movs r3, #0 } 80050a6: 4618 mov r0, r3 80050a8: 3710 adds r7, #16 80050aa: 46bd mov sp, r7 80050ac: bd80 pop {r7, pc} ... 080050b0 : * @param Timeout Timeout duration * @param Tickstart Tick start value * @retval HAL status */ static HAL_StatusTypeDef I2C_IsErrorOccurred(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart) { 80050b0: b580 push {r7, lr} 80050b2: b08a sub sp, #40 @ 0x28 80050b4: af00 add r7, sp, #0 80050b6: 60f8 str r0, [r7, #12] 80050b8: 60b9 str r1, [r7, #8] 80050ba: 607a str r2, [r7, #4] HAL_StatusTypeDef status = HAL_OK; 80050bc: 2300 movs r3, #0 80050be: f887 3027 strb.w r3, [r7, #39] @ 0x27 uint32_t itflag = hi2c->Instance->ISR; 80050c2: 68fb ldr r3, [r7, #12] 80050c4: 681b ldr r3, [r3, #0] 80050c6: 699b ldr r3, [r3, #24] 80050c8: 61bb str r3, [r7, #24] uint32_t error_code = 0; 80050ca: 2300 movs r3, #0 80050cc: 623b str r3, [r7, #32] uint32_t tickstart = Tickstart; 80050ce: 687b ldr r3, [r7, #4] 80050d0: 61fb str r3, [r7, #28] uint32_t tmp1; HAL_I2C_ModeTypeDef tmp2; if (HAL_IS_BIT_SET(itflag, I2C_FLAG_AF)) 80050d2: 69bb ldr r3, [r7, #24] 80050d4: f003 0310 and.w r3, r3, #16 80050d8: 2b00 cmp r3, #0 80050da: d068 beq.n 80051ae { /* Clear NACKF Flag */ __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); 80050dc: 68fb ldr r3, [r7, #12] 80050de: 681b ldr r3, [r3, #0] 80050e0: 2210 movs r2, #16 80050e2: 61da str r2, [r3, #28] /* Wait until STOP Flag is set or timeout occurred */ /* AutoEnd should be initiate after AF */ while ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET) && (status == HAL_OK)) 80050e4: e049 b.n 800517a { /* Check for the Timeout */ if (Timeout != HAL_MAX_DELAY) 80050e6: 68bb ldr r3, [r7, #8] 80050e8: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff 80050ec: d045 beq.n 800517a { if (((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0U)) 80050ee: f7fe fdb3 bl 8003c58 80050f2: 4602 mov r2, r0 80050f4: 69fb ldr r3, [r7, #28] 80050f6: 1ad3 subs r3, r2, r3 80050f8: 68ba ldr r2, [r7, #8] 80050fa: 429a cmp r2, r3 80050fc: d302 bcc.n 8005104 80050fe: 68bb ldr r3, [r7, #8] 8005100: 2b00 cmp r3, #0 8005102: d13a bne.n 800517a { tmp1 = (uint32_t)(hi2c->Instance->CR2 & I2C_CR2_STOP); 8005104: 68fb ldr r3, [r7, #12] 8005106: 681b ldr r3, [r3, #0] 8005108: 685b ldr r3, [r3, #4] 800510a: f403 4380 and.w r3, r3, #16384 @ 0x4000 800510e: 617b str r3, [r7, #20] tmp2 = hi2c->Mode; 8005110: 68fb ldr r3, [r7, #12] 8005112: f893 3042 ldrb.w r3, [r3, #66] @ 0x42 8005116: 74fb strb r3, [r7, #19] /* In case of I2C still busy, try to regenerate a STOP manually */ if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET) && \ 8005118: 68fb ldr r3, [r7, #12] 800511a: 681b ldr r3, [r3, #0] 800511c: 699b ldr r3, [r3, #24] 800511e: f403 4300 and.w r3, r3, #32768 @ 0x8000 8005122: f5b3 4f00 cmp.w r3, #32768 @ 0x8000 8005126: d121 bne.n 800516c 8005128: 697b ldr r3, [r7, #20] 800512a: f5b3 4f80 cmp.w r3, #16384 @ 0x4000 800512e: d01d beq.n 800516c (tmp1 != I2C_CR2_STOP) && \ 8005130: 7cfb ldrb r3, [r7, #19] 8005132: 2b20 cmp r3, #32 8005134: d01a beq.n 800516c (tmp2 != HAL_I2C_MODE_SLAVE)) { /* Generate Stop */ hi2c->Instance->CR2 |= I2C_CR2_STOP; 8005136: 68fb ldr r3, [r7, #12] 8005138: 681b ldr r3, [r3, #0] 800513a: 685a ldr r2, [r3, #4] 800513c: 68fb ldr r3, [r7, #12] 800513e: 681b ldr r3, [r3, #0] 8005140: f442 4280 orr.w r2, r2, #16384 @ 0x4000 8005144: 605a str r2, [r3, #4] /* Update Tick with new reference */ tickstart = HAL_GetTick(); 8005146: f7fe fd87 bl 8003c58 800514a: 61f8 str r0, [r7, #28] } while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET) 800514c: e00e b.n 800516c { /* Check for the Timeout */ if ((HAL_GetTick() - tickstart) > I2C_TIMEOUT_STOPF) 800514e: f7fe fd83 bl 8003c58 8005152: 4602 mov r2, r0 8005154: 69fb ldr r3, [r7, #28] 8005156: 1ad3 subs r3, r2, r3 8005158: 2b19 cmp r3, #25 800515a: d907 bls.n 800516c { error_code |= HAL_I2C_ERROR_TIMEOUT; 800515c: 6a3b ldr r3, [r7, #32] 800515e: f043 0320 orr.w r3, r3, #32 8005162: 623b str r3, [r7, #32] status = HAL_ERROR; 8005164: 2301 movs r3, #1 8005166: f887 3027 strb.w r3, [r7, #39] @ 0x27 break; 800516a: e006 b.n 800517a while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET) 800516c: 68fb ldr r3, [r7, #12] 800516e: 681b ldr r3, [r3, #0] 8005170: 699b ldr r3, [r3, #24] 8005172: f003 0320 and.w r3, r3, #32 8005176: 2b20 cmp r3, #32 8005178: d1e9 bne.n 800514e while ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET) && (status == HAL_OK)) 800517a: 68fb ldr r3, [r7, #12] 800517c: 681b ldr r3, [r3, #0] 800517e: 699b ldr r3, [r3, #24] 8005180: f003 0320 and.w r3, r3, #32 8005184: 2b20 cmp r3, #32 8005186: d003 beq.n 8005190 8005188: f897 3027 ldrb.w r3, [r7, #39] @ 0x27 800518c: 2b00 cmp r3, #0 800518e: d0aa beq.n 80050e6 } } } /* In case STOP Flag is detected, clear it */ if (status == HAL_OK) 8005190: f897 3027 ldrb.w r3, [r7, #39] @ 0x27 8005194: 2b00 cmp r3, #0 8005196: d103 bne.n 80051a0 { /* Clear STOP Flag */ __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); 8005198: 68fb ldr r3, [r7, #12] 800519a: 681b ldr r3, [r3, #0] 800519c: 2220 movs r2, #32 800519e: 61da str r2, [r3, #28] } error_code |= HAL_I2C_ERROR_AF; 80051a0: 6a3b ldr r3, [r7, #32] 80051a2: f043 0304 orr.w r3, r3, #4 80051a6: 623b str r3, [r7, #32] status = HAL_ERROR; 80051a8: 2301 movs r3, #1 80051aa: f887 3027 strb.w r3, [r7, #39] @ 0x27 } /* Refresh Content of Status register */ itflag = hi2c->Instance->ISR; 80051ae: 68fb ldr r3, [r7, #12] 80051b0: 681b ldr r3, [r3, #0] 80051b2: 699b ldr r3, [r3, #24] 80051b4: 61bb str r3, [r7, #24] /* Then verify if an additional errors occurs */ /* Check if a Bus error occurred */ if (HAL_IS_BIT_SET(itflag, I2C_FLAG_BERR)) 80051b6: 69bb ldr r3, [r7, #24] 80051b8: f403 7380 and.w r3, r3, #256 @ 0x100 80051bc: 2b00 cmp r3, #0 80051be: d00b beq.n 80051d8 { error_code |= HAL_I2C_ERROR_BERR; 80051c0: 6a3b ldr r3, [r7, #32] 80051c2: f043 0301 orr.w r3, r3, #1 80051c6: 623b str r3, [r7, #32] /* Clear BERR flag */ __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_BERR); 80051c8: 68fb ldr r3, [r7, #12] 80051ca: 681b ldr r3, [r3, #0] 80051cc: f44f 7280 mov.w r2, #256 @ 0x100 80051d0: 61da str r2, [r3, #28] status = HAL_ERROR; 80051d2: 2301 movs r3, #1 80051d4: f887 3027 strb.w r3, [r7, #39] @ 0x27 } /* Check if an Over-Run/Under-Run error occurred */ if (HAL_IS_BIT_SET(itflag, I2C_FLAG_OVR)) 80051d8: 69bb ldr r3, [r7, #24] 80051da: f403 6380 and.w r3, r3, #1024 @ 0x400 80051de: 2b00 cmp r3, #0 80051e0: d00b beq.n 80051fa { error_code |= HAL_I2C_ERROR_OVR; 80051e2: 6a3b ldr r3, [r7, #32] 80051e4: f043 0308 orr.w r3, r3, #8 80051e8: 623b str r3, [r7, #32] /* Clear OVR flag */ __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_OVR); 80051ea: 68fb ldr r3, [r7, #12] 80051ec: 681b ldr r3, [r3, #0] 80051ee: f44f 6280 mov.w r2, #1024 @ 0x400 80051f2: 61da str r2, [r3, #28] status = HAL_ERROR; 80051f4: 2301 movs r3, #1 80051f6: f887 3027 strb.w r3, [r7, #39] @ 0x27 } /* Check if an Arbitration Loss error occurred */ if (HAL_IS_BIT_SET(itflag, I2C_FLAG_ARLO)) 80051fa: 69bb ldr r3, [r7, #24] 80051fc: f403 7300 and.w r3, r3, #512 @ 0x200 8005200: 2b00 cmp r3, #0 8005202: d00b beq.n 800521c { error_code |= HAL_I2C_ERROR_ARLO; 8005204: 6a3b ldr r3, [r7, #32] 8005206: f043 0302 orr.w r3, r3, #2 800520a: 623b str r3, [r7, #32] /* Clear ARLO flag */ __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ARLO); 800520c: 68fb ldr r3, [r7, #12] 800520e: 681b ldr r3, [r3, #0] 8005210: f44f 7200 mov.w r2, #512 @ 0x200 8005214: 61da str r2, [r3, #28] status = HAL_ERROR; 8005216: 2301 movs r3, #1 8005218: f887 3027 strb.w r3, [r7, #39] @ 0x27 } if (status != HAL_OK) 800521c: f897 3027 ldrb.w r3, [r7, #39] @ 0x27 8005220: 2b00 cmp r3, #0 8005222: d01c beq.n 800525e { /* Flush TX register */ I2C_Flush_TXDR(hi2c); 8005224: 68f8 ldr r0, [r7, #12] 8005226: f7ff fe3b bl 8004ea0 /* Clear Configuration Register 2 */ I2C_RESET_CR2(hi2c); 800522a: 68fb ldr r3, [r7, #12] 800522c: 681b ldr r3, [r3, #0] 800522e: 6859 ldr r1, [r3, #4] 8005230: 68fb ldr r3, [r7, #12] 8005232: 681a ldr r2, [r3, #0] 8005234: 4b0d ldr r3, [pc, #52] @ (800526c ) 8005236: 400b ands r3, r1 8005238: 6053 str r3, [r2, #4] hi2c->ErrorCode |= error_code; 800523a: 68fb ldr r3, [r7, #12] 800523c: 6c5a ldr r2, [r3, #68] @ 0x44 800523e: 6a3b ldr r3, [r7, #32] 8005240: 431a orrs r2, r3 8005242: 68fb ldr r3, [r7, #12] 8005244: 645a str r2, [r3, #68] @ 0x44 hi2c->State = HAL_I2C_STATE_READY; 8005246: 68fb ldr r3, [r7, #12] 8005248: 2220 movs r2, #32 800524a: f883 2041 strb.w r2, [r3, #65] @ 0x41 hi2c->Mode = HAL_I2C_MODE_NONE; 800524e: 68fb ldr r3, [r7, #12] 8005250: 2200 movs r2, #0 8005252: f883 2042 strb.w r2, [r3, #66] @ 0x42 /* Process Unlocked */ __HAL_UNLOCK(hi2c); 8005256: 68fb ldr r3, [r7, #12] 8005258: 2200 movs r2, #0 800525a: f883 2040 strb.w r2, [r3, #64] @ 0x40 } return status; 800525e: f897 3027 ldrb.w r3, [r7, #39] @ 0x27 } 8005262: 4618 mov r0, r3 8005264: 3728 adds r7, #40 @ 0x28 8005266: 46bd mov sp, r7 8005268: bd80 pop {r7, pc} 800526a: bf00 nop 800526c: fe00e800 .word 0xfe00e800 08005270 : * @arg @ref I2C_GENERATE_START_WRITE Generate Restart for write request. * @retval None */ static void I2C_TransferConfig(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t Size, uint32_t Mode, uint32_t Request) { 8005270: b480 push {r7} 8005272: b087 sub sp, #28 8005274: af00 add r7, sp, #0 8005276: 60f8 str r0, [r7, #12] 8005278: 607b str r3, [r7, #4] 800527a: 460b mov r3, r1 800527c: 817b strh r3, [r7, #10] 800527e: 4613 mov r3, r2 8005280: 727b strb r3, [r7, #9] assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance)); assert_param(IS_TRANSFER_MODE(Mode)); assert_param(IS_TRANSFER_REQUEST(Request)); /* Declaration of tmp to prevent undefined behavior of volatile usage */ uint32_t tmp = ((uint32_t)(((uint32_t)DevAddress & I2C_CR2_SADD) | \ 8005282: 897b ldrh r3, [r7, #10] 8005284: f3c3 0209 ubfx r2, r3, #0, #10 (((uint32_t)Size << I2C_CR2_NBYTES_Pos) & I2C_CR2_NBYTES) | \ 8005288: 7a7b ldrb r3, [r7, #9] 800528a: 041b lsls r3, r3, #16 800528c: f403 037f and.w r3, r3, #16711680 @ 0xff0000 uint32_t tmp = ((uint32_t)(((uint32_t)DevAddress & I2C_CR2_SADD) | \ 8005290: 431a orrs r2, r3 (((uint32_t)Size << I2C_CR2_NBYTES_Pos) & I2C_CR2_NBYTES) | \ 8005292: 687b ldr r3, [r7, #4] 8005294: 431a orrs r2, r3 uint32_t tmp = ((uint32_t)(((uint32_t)DevAddress & I2C_CR2_SADD) | \ 8005296: 6a3b ldr r3, [r7, #32] 8005298: 4313 orrs r3, r2 800529a: f023 4300 bic.w r3, r3, #2147483648 @ 0x80000000 800529e: 617b str r3, [r7, #20] (uint32_t)Mode | (uint32_t)Request) & (~0x80000000U)); /* update CR2 register */ MODIFY_REG(hi2c->Instance->CR2, \ 80052a0: 68fb ldr r3, [r7, #12] 80052a2: 681b ldr r3, [r3, #0] 80052a4: 685a ldr r2, [r3, #4] 80052a6: 6a3b ldr r3, [r7, #32] 80052a8: 0d5b lsrs r3, r3, #21 80052aa: f403 6180 and.w r1, r3, #1024 @ 0x400 80052ae: 4b08 ldr r3, [pc, #32] @ (80052d0 ) 80052b0: 430b orrs r3, r1 80052b2: 43db mvns r3, r3 80052b4: ea02 0103 and.w r1, r2, r3 80052b8: 68fb ldr r3, [r7, #12] 80052ba: 681b ldr r3, [r3, #0] 80052bc: 697a ldr r2, [r7, #20] 80052be: 430a orrs r2, r1 80052c0: 605a str r2, [r3, #4] ((I2C_CR2_SADD | I2C_CR2_NBYTES | I2C_CR2_RELOAD | I2C_CR2_AUTOEND | \ (I2C_CR2_RD_WRN & (uint32_t)(Request >> (31U - I2C_CR2_RD_WRN_Pos))) | \ I2C_CR2_START | I2C_CR2_STOP)), tmp); } 80052c2: bf00 nop 80052c4: 371c adds r7, #28 80052c6: 46bd mov sp, r7 80052c8: f85d 7b04 ldr.w r7, [sp], #4 80052cc: 4770 bx lr 80052ce: bf00 nop 80052d0: 03ff63ff .word 0x03ff63ff 080052d4 : * the configuration information for the specified I2Cx peripheral. * @param AnalogFilter New state of the Analog filter. * @retval HAL status */ HAL_StatusTypeDef HAL_I2CEx_ConfigAnalogFilter(I2C_HandleTypeDef *hi2c, uint32_t AnalogFilter) { 80052d4: b480 push {r7} 80052d6: b083 sub sp, #12 80052d8: af00 add r7, sp, #0 80052da: 6078 str r0, [r7, #4] 80052dc: 6039 str r1, [r7, #0] /* Check the parameters */ assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance)); assert_param(IS_I2C_ANALOG_FILTER(AnalogFilter)); if (hi2c->State == HAL_I2C_STATE_READY) 80052de: 687b ldr r3, [r7, #4] 80052e0: f893 3041 ldrb.w r3, [r3, #65] @ 0x41 80052e4: b2db uxtb r3, r3 80052e6: 2b20 cmp r3, #32 80052e8: d138 bne.n 800535c { /* Process Locked */ __HAL_LOCK(hi2c); 80052ea: 687b ldr r3, [r7, #4] 80052ec: f893 3040 ldrb.w r3, [r3, #64] @ 0x40 80052f0: 2b01 cmp r3, #1 80052f2: d101 bne.n 80052f8 80052f4: 2302 movs r3, #2 80052f6: e032 b.n 800535e 80052f8: 687b ldr r3, [r7, #4] 80052fa: 2201 movs r2, #1 80052fc: f883 2040 strb.w r2, [r3, #64] @ 0x40 hi2c->State = HAL_I2C_STATE_BUSY; 8005300: 687b ldr r3, [r7, #4] 8005302: 2224 movs r2, #36 @ 0x24 8005304: f883 2041 strb.w r2, [r3, #65] @ 0x41 /* Disable the selected I2C peripheral */ __HAL_I2C_DISABLE(hi2c); 8005308: 687b ldr r3, [r7, #4] 800530a: 681b ldr r3, [r3, #0] 800530c: 681a ldr r2, [r3, #0] 800530e: 687b ldr r3, [r7, #4] 8005310: 681b ldr r3, [r3, #0] 8005312: f022 0201 bic.w r2, r2, #1 8005316: 601a str r2, [r3, #0] /* Reset I2Cx ANOFF bit */ hi2c->Instance->CR1 &= ~(I2C_CR1_ANFOFF); 8005318: 687b ldr r3, [r7, #4] 800531a: 681b ldr r3, [r3, #0] 800531c: 681a ldr r2, [r3, #0] 800531e: 687b ldr r3, [r7, #4] 8005320: 681b ldr r3, [r3, #0] 8005322: f422 5280 bic.w r2, r2, #4096 @ 0x1000 8005326: 601a str r2, [r3, #0] /* Set analog filter bit*/ hi2c->Instance->CR1 |= AnalogFilter; 8005328: 687b ldr r3, [r7, #4] 800532a: 681b ldr r3, [r3, #0] 800532c: 6819 ldr r1, [r3, #0] 800532e: 687b ldr r3, [r7, #4] 8005330: 681b ldr r3, [r3, #0] 8005332: 683a ldr r2, [r7, #0] 8005334: 430a orrs r2, r1 8005336: 601a str r2, [r3, #0] __HAL_I2C_ENABLE(hi2c); 8005338: 687b ldr r3, [r7, #4] 800533a: 681b ldr r3, [r3, #0] 800533c: 681a ldr r2, [r3, #0] 800533e: 687b ldr r3, [r7, #4] 8005340: 681b ldr r3, [r3, #0] 8005342: f042 0201 orr.w r2, r2, #1 8005346: 601a str r2, [r3, #0] hi2c->State = HAL_I2C_STATE_READY; 8005348: 687b ldr r3, [r7, #4] 800534a: 2220 movs r2, #32 800534c: f883 2041 strb.w r2, [r3, #65] @ 0x41 /* Process Unlocked */ __HAL_UNLOCK(hi2c); 8005350: 687b ldr r3, [r7, #4] 8005352: 2200 movs r2, #0 8005354: f883 2040 strb.w r2, [r3, #64] @ 0x40 return HAL_OK; 8005358: 2300 movs r3, #0 800535a: e000 b.n 800535e } else { return HAL_BUSY; 800535c: 2302 movs r3, #2 } } 800535e: 4618 mov r0, r3 8005360: 370c adds r7, #12 8005362: 46bd mov sp, r7 8005364: f85d 7b04 ldr.w r7, [sp], #4 8005368: 4770 bx lr 0800536a : * the configuration information for the specified I2Cx peripheral. * @param DigitalFilter Coefficient of digital noise filter between Min_Data=0x00 and Max_Data=0x0F. * @retval HAL status */ HAL_StatusTypeDef HAL_I2CEx_ConfigDigitalFilter(I2C_HandleTypeDef *hi2c, uint32_t DigitalFilter) { 800536a: b480 push {r7} 800536c: b085 sub sp, #20 800536e: af00 add r7, sp, #0 8005370: 6078 str r0, [r7, #4] 8005372: 6039 str r1, [r7, #0] /* Check the parameters */ assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance)); assert_param(IS_I2C_DIGITAL_FILTER(DigitalFilter)); if (hi2c->State == HAL_I2C_STATE_READY) 8005374: 687b ldr r3, [r7, #4] 8005376: f893 3041 ldrb.w r3, [r3, #65] @ 0x41 800537a: b2db uxtb r3, r3 800537c: 2b20 cmp r3, #32 800537e: d139 bne.n 80053f4 { /* Process Locked */ __HAL_LOCK(hi2c); 8005380: 687b ldr r3, [r7, #4] 8005382: f893 3040 ldrb.w r3, [r3, #64] @ 0x40 8005386: 2b01 cmp r3, #1 8005388: d101 bne.n 800538e 800538a: 2302 movs r3, #2 800538c: e033 b.n 80053f6 800538e: 687b ldr r3, [r7, #4] 8005390: 2201 movs r2, #1 8005392: f883 2040 strb.w r2, [r3, #64] @ 0x40 hi2c->State = HAL_I2C_STATE_BUSY; 8005396: 687b ldr r3, [r7, #4] 8005398: 2224 movs r2, #36 @ 0x24 800539a: f883 2041 strb.w r2, [r3, #65] @ 0x41 /* Disable the selected I2C peripheral */ __HAL_I2C_DISABLE(hi2c); 800539e: 687b ldr r3, [r7, #4] 80053a0: 681b ldr r3, [r3, #0] 80053a2: 681a ldr r2, [r3, #0] 80053a4: 687b ldr r3, [r7, #4] 80053a6: 681b ldr r3, [r3, #0] 80053a8: f022 0201 bic.w r2, r2, #1 80053ac: 601a str r2, [r3, #0] /* Get the old register value */ tmpreg = hi2c->Instance->CR1; 80053ae: 687b ldr r3, [r7, #4] 80053b0: 681b ldr r3, [r3, #0] 80053b2: 681b ldr r3, [r3, #0] 80053b4: 60fb str r3, [r7, #12] /* Reset I2Cx DNF bits [11:8] */ tmpreg &= ~(I2C_CR1_DNF); 80053b6: 68fb ldr r3, [r7, #12] 80053b8: f423 6370 bic.w r3, r3, #3840 @ 0xf00 80053bc: 60fb str r3, [r7, #12] /* Set I2Cx DNF coefficient */ tmpreg |= DigitalFilter << 8U; 80053be: 683b ldr r3, [r7, #0] 80053c0: 021b lsls r3, r3, #8 80053c2: 68fa ldr r2, [r7, #12] 80053c4: 4313 orrs r3, r2 80053c6: 60fb str r3, [r7, #12] /* Store the new register value */ hi2c->Instance->CR1 = tmpreg; 80053c8: 687b ldr r3, [r7, #4] 80053ca: 681b ldr r3, [r3, #0] 80053cc: 68fa ldr r2, [r7, #12] 80053ce: 601a str r2, [r3, #0] __HAL_I2C_ENABLE(hi2c); 80053d0: 687b ldr r3, [r7, #4] 80053d2: 681b ldr r3, [r3, #0] 80053d4: 681a ldr r2, [r3, #0] 80053d6: 687b ldr r3, [r7, #4] 80053d8: 681b ldr r3, [r3, #0] 80053da: f042 0201 orr.w r2, r2, #1 80053de: 601a str r2, [r3, #0] hi2c->State = HAL_I2C_STATE_READY; 80053e0: 687b ldr r3, [r7, #4] 80053e2: 2220 movs r2, #32 80053e4: f883 2041 strb.w r2, [r3, #65] @ 0x41 /* Process Unlocked */ __HAL_UNLOCK(hi2c); 80053e8: 687b ldr r3, [r7, #4] 80053ea: 2200 movs r2, #0 80053ec: f883 2040 strb.w r2, [r3, #64] @ 0x40 return HAL_OK; 80053f0: 2300 movs r3, #0 80053f2: e000 b.n 80053f6 } else { return HAL_BUSY; 80053f4: 2302 movs r3, #2 } } 80053f6: 4618 mov r0, r3 80053f8: 3714 adds r7, #20 80053fa: 46bd mov sp, r7 80053fc: f85d 7b04 ldr.w r7, [sp], #4 8005400: 4770 bx lr 08005402 : * parameters in the PCD_InitTypeDef and initialize the associated handle. * @param hpcd PCD handle * @retval HAL status */ HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd) { 8005402: b580 push {r7, lr} 8005404: b086 sub sp, #24 8005406: af02 add r7, sp, #8 8005408: 6078 str r0, [r7, #4] uint8_t i; /* Check the PCD handle allocation */ if (hpcd == NULL) 800540a: 687b ldr r3, [r7, #4] 800540c: 2b00 cmp r3, #0 800540e: d101 bne.n 8005414 { return HAL_ERROR; 8005410: 2301 movs r3, #1 8005412: e101 b.n 8005618 } /* Check the parameters */ assert_param(IS_PCD_ALL_INSTANCE(hpcd->Instance)); if (hpcd->State == HAL_PCD_STATE_RESET) 8005414: 687b ldr r3, [r7, #4] 8005416: f893 3495 ldrb.w r3, [r3, #1173] @ 0x495 800541a: b2db uxtb r3, r3 800541c: 2b00 cmp r3, #0 800541e: d106 bne.n 800542e { /* Allocate lock resource and initialize it */ hpcd->Lock = HAL_UNLOCKED; 8005420: 687b ldr r3, [r7, #4] 8005422: 2200 movs r2, #0 8005424: f883 2494 strb.w r2, [r3, #1172] @ 0x494 /* Init the low level hardware */ hpcd->MspInitCallback(hpcd); #else /* Init the low level hardware : GPIO, CLOCK, NVIC... */ HAL_PCD_MspInit(hpcd); 8005428: 6878 ldr r0, [r7, #4] 800542a: f7fe f985 bl 8003738 #endif /* (USE_HAL_PCD_REGISTER_CALLBACKS) */ } hpcd->State = HAL_PCD_STATE_BUSY; 800542e: 687b ldr r3, [r7, #4] 8005430: 2203 movs r2, #3 8005432: f883 2495 strb.w r2, [r3, #1173] @ 0x495 /* Disable DMA mode for FS instance */ hpcd->Init.dma_enable = 0U; 8005436: 687b ldr r3, [r7, #4] 8005438: 2200 movs r2, #0 800543a: 719a strb r2, [r3, #6] /* Disable the Interrupts */ __HAL_PCD_DISABLE(hpcd); 800543c: 687b ldr r3, [r7, #4] 800543e: 681b ldr r3, [r3, #0] 8005440: 4618 mov r0, r3 8005442: f004 fdde bl 800a002 /*Init the Core (common init.) */ if (USB_CoreInit(hpcd->Instance, hpcd->Init) != HAL_OK) 8005446: 687b ldr r3, [r7, #4] 8005448: 6818 ldr r0, [r3, #0] 800544a: 687b ldr r3, [r7, #4] 800544c: 7c1a ldrb r2, [r3, #16] 800544e: f88d 2000 strb.w r2, [sp] 8005452: 3304 adds r3, #4 8005454: cb0e ldmia r3, {r1, r2, r3} 8005456: f004 fda7 bl 8009fa8 800545a: 4603 mov r3, r0 800545c: 2b00 cmp r3, #0 800545e: d005 beq.n 800546c { hpcd->State = HAL_PCD_STATE_ERROR; 8005460: 687b ldr r3, [r7, #4] 8005462: 2202 movs r2, #2 8005464: f883 2495 strb.w r2, [r3, #1173] @ 0x495 return HAL_ERROR; 8005468: 2301 movs r3, #1 800546a: e0d5 b.n 8005618 } /* Force Device Mode */ if (USB_SetCurrentMode(hpcd->Instance, USB_DEVICE_MODE) != HAL_OK) 800546c: 687b ldr r3, [r7, #4] 800546e: 681b ldr r3, [r3, #0] 8005470: 2100 movs r1, #0 8005472: 4618 mov r0, r3 8005474: f004 fdd6 bl 800a024 8005478: 4603 mov r3, r0 800547a: 2b00 cmp r3, #0 800547c: d005 beq.n 800548a { hpcd->State = HAL_PCD_STATE_ERROR; 800547e: 687b ldr r3, [r7, #4] 8005480: 2202 movs r2, #2 8005482: f883 2495 strb.w r2, [r3, #1173] @ 0x495 return HAL_ERROR; 8005486: 2301 movs r3, #1 8005488: e0c6 b.n 8005618 } /* Init endpoints structures */ for (i = 0U; i < hpcd->Init.dev_endpoints; i++) 800548a: 2300 movs r3, #0 800548c: 73fb strb r3, [r7, #15] 800548e: e04a b.n 8005526 { /* Init ep structure */ hpcd->IN_ep[i].is_in = 1U; 8005490: 7bfa ldrb r2, [r7, #15] 8005492: 6879 ldr r1, [r7, #4] 8005494: 4613 mov r3, r2 8005496: 00db lsls r3, r3, #3 8005498: 4413 add r3, r2 800549a: 009b lsls r3, r3, #2 800549c: 440b add r3, r1 800549e: 3315 adds r3, #21 80054a0: 2201 movs r2, #1 80054a2: 701a strb r2, [r3, #0] hpcd->IN_ep[i].num = i; 80054a4: 7bfa ldrb r2, [r7, #15] 80054a6: 6879 ldr r1, [r7, #4] 80054a8: 4613 mov r3, r2 80054aa: 00db lsls r3, r3, #3 80054ac: 4413 add r3, r2 80054ae: 009b lsls r3, r3, #2 80054b0: 440b add r3, r1 80054b2: 3314 adds r3, #20 80054b4: 7bfa ldrb r2, [r7, #15] 80054b6: 701a strb r2, [r3, #0] #if defined (USB_OTG_FS) hpcd->IN_ep[i].tx_fifo_num = i; 80054b8: 7bfa ldrb r2, [r7, #15] 80054ba: 7bfb ldrb r3, [r7, #15] 80054bc: b298 uxth r0, r3 80054be: 6879 ldr r1, [r7, #4] 80054c0: 4613 mov r3, r2 80054c2: 00db lsls r3, r3, #3 80054c4: 4413 add r3, r2 80054c6: 009b lsls r3, r3, #2 80054c8: 440b add r3, r1 80054ca: 332e adds r3, #46 @ 0x2e 80054cc: 4602 mov r2, r0 80054ce: 801a strh r2, [r3, #0] #endif /* defined (USB_OTG_FS) */ /* Control until ep is activated */ hpcd->IN_ep[i].type = EP_TYPE_CTRL; 80054d0: 7bfa ldrb r2, [r7, #15] 80054d2: 6879 ldr r1, [r7, #4] 80054d4: 4613 mov r3, r2 80054d6: 00db lsls r3, r3, #3 80054d8: 4413 add r3, r2 80054da: 009b lsls r3, r3, #2 80054dc: 440b add r3, r1 80054de: 3318 adds r3, #24 80054e0: 2200 movs r2, #0 80054e2: 701a strb r2, [r3, #0] hpcd->IN_ep[i].maxpacket = 0U; 80054e4: 7bfa ldrb r2, [r7, #15] 80054e6: 6879 ldr r1, [r7, #4] 80054e8: 4613 mov r3, r2 80054ea: 00db lsls r3, r3, #3 80054ec: 4413 add r3, r2 80054ee: 009b lsls r3, r3, #2 80054f0: 440b add r3, r1 80054f2: 331c adds r3, #28 80054f4: 2200 movs r2, #0 80054f6: 601a str r2, [r3, #0] hpcd->IN_ep[i].xfer_buff = 0U; 80054f8: 7bfa ldrb r2, [r7, #15] 80054fa: 6879 ldr r1, [r7, #4] 80054fc: 4613 mov r3, r2 80054fe: 00db lsls r3, r3, #3 8005500: 4413 add r3, r2 8005502: 009b lsls r3, r3, #2 8005504: 440b add r3, r1 8005506: 3320 adds r3, #32 8005508: 2200 movs r2, #0 800550a: 601a str r2, [r3, #0] hpcd->IN_ep[i].xfer_len = 0U; 800550c: 7bfa ldrb r2, [r7, #15] 800550e: 6879 ldr r1, [r7, #4] 8005510: 4613 mov r3, r2 8005512: 00db lsls r3, r3, #3 8005514: 4413 add r3, r2 8005516: 009b lsls r3, r3, #2 8005518: 440b add r3, r1 800551a: 3324 adds r3, #36 @ 0x24 800551c: 2200 movs r2, #0 800551e: 601a str r2, [r3, #0] for (i = 0U; i < hpcd->Init.dev_endpoints; i++) 8005520: 7bfb ldrb r3, [r7, #15] 8005522: 3301 adds r3, #1 8005524: 73fb strb r3, [r7, #15] 8005526: 687b ldr r3, [r7, #4] 8005528: 791b ldrb r3, [r3, #4] 800552a: 7bfa ldrb r2, [r7, #15] 800552c: 429a cmp r2, r3 800552e: d3af bcc.n 8005490 } for (i = 0U; i < hpcd->Init.dev_endpoints; i++) 8005530: 2300 movs r3, #0 8005532: 73fb strb r3, [r7, #15] 8005534: e044 b.n 80055c0 { hpcd->OUT_ep[i].is_in = 0U; 8005536: 7bfa ldrb r2, [r7, #15] 8005538: 6879 ldr r1, [r7, #4] 800553a: 4613 mov r3, r2 800553c: 00db lsls r3, r3, #3 800553e: 4413 add r3, r2 8005540: 009b lsls r3, r3, #2 8005542: 440b add r3, r1 8005544: f203 2355 addw r3, r3, #597 @ 0x255 8005548: 2200 movs r2, #0 800554a: 701a strb r2, [r3, #0] hpcd->OUT_ep[i].num = i; 800554c: 7bfa ldrb r2, [r7, #15] 800554e: 6879 ldr r1, [r7, #4] 8005550: 4613 mov r3, r2 8005552: 00db lsls r3, r3, #3 8005554: 4413 add r3, r2 8005556: 009b lsls r3, r3, #2 8005558: 440b add r3, r1 800555a: f503 7315 add.w r3, r3, #596 @ 0x254 800555e: 7bfa ldrb r2, [r7, #15] 8005560: 701a strb r2, [r3, #0] /* Control until ep is activated */ hpcd->OUT_ep[i].type = EP_TYPE_CTRL; 8005562: 7bfa ldrb r2, [r7, #15] 8005564: 6879 ldr r1, [r7, #4] 8005566: 4613 mov r3, r2 8005568: 00db lsls r3, r3, #3 800556a: 4413 add r3, r2 800556c: 009b lsls r3, r3, #2 800556e: 440b add r3, r1 8005570: f503 7316 add.w r3, r3, #600 @ 0x258 8005574: 2200 movs r2, #0 8005576: 701a strb r2, [r3, #0] hpcd->OUT_ep[i].maxpacket = 0U; 8005578: 7bfa ldrb r2, [r7, #15] 800557a: 6879 ldr r1, [r7, #4] 800557c: 4613 mov r3, r2 800557e: 00db lsls r3, r3, #3 8005580: 4413 add r3, r2 8005582: 009b lsls r3, r3, #2 8005584: 440b add r3, r1 8005586: f503 7317 add.w r3, r3, #604 @ 0x25c 800558a: 2200 movs r2, #0 800558c: 601a str r2, [r3, #0] hpcd->OUT_ep[i].xfer_buff = 0U; 800558e: 7bfa ldrb r2, [r7, #15] 8005590: 6879 ldr r1, [r7, #4] 8005592: 4613 mov r3, r2 8005594: 00db lsls r3, r3, #3 8005596: 4413 add r3, r2 8005598: 009b lsls r3, r3, #2 800559a: 440b add r3, r1 800559c: f503 7318 add.w r3, r3, #608 @ 0x260 80055a0: 2200 movs r2, #0 80055a2: 601a str r2, [r3, #0] hpcd->OUT_ep[i].xfer_len = 0U; 80055a4: 7bfa ldrb r2, [r7, #15] 80055a6: 6879 ldr r1, [r7, #4] 80055a8: 4613 mov r3, r2 80055aa: 00db lsls r3, r3, #3 80055ac: 4413 add r3, r2 80055ae: 009b lsls r3, r3, #2 80055b0: 440b add r3, r1 80055b2: f503 7319 add.w r3, r3, #612 @ 0x264 80055b6: 2200 movs r2, #0 80055b8: 601a str r2, [r3, #0] for (i = 0U; i < hpcd->Init.dev_endpoints; i++) 80055ba: 7bfb ldrb r3, [r7, #15] 80055bc: 3301 adds r3, #1 80055be: 73fb strb r3, [r7, #15] 80055c0: 687b ldr r3, [r7, #4] 80055c2: 791b ldrb r3, [r3, #4] 80055c4: 7bfa ldrb r2, [r7, #15] 80055c6: 429a cmp r2, r3 80055c8: d3b5 bcc.n 8005536 } /* Init Device */ if (USB_DevInit(hpcd->Instance, hpcd->Init) != HAL_OK) 80055ca: 687b ldr r3, [r7, #4] 80055cc: 6818 ldr r0, [r3, #0] 80055ce: 687b ldr r3, [r7, #4] 80055d0: 7c1a ldrb r2, [r3, #16] 80055d2: f88d 2000 strb.w r2, [sp] 80055d6: 3304 adds r3, #4 80055d8: cb0e ldmia r3, {r1, r2, r3} 80055da: f004 fd6f bl 800a0bc 80055de: 4603 mov r3, r0 80055e0: 2b00 cmp r3, #0 80055e2: d005 beq.n 80055f0 { hpcd->State = HAL_PCD_STATE_ERROR; 80055e4: 687b ldr r3, [r7, #4] 80055e6: 2202 movs r2, #2 80055e8: f883 2495 strb.w r2, [r3, #1173] @ 0x495 return HAL_ERROR; 80055ec: 2301 movs r3, #1 80055ee: e013 b.n 8005618 } hpcd->USB_Address = 0U; 80055f0: 687b ldr r3, [r7, #4] 80055f2: 2200 movs r2, #0 80055f4: 745a strb r2, [r3, #17] hpcd->State = HAL_PCD_STATE_READY; 80055f6: 687b ldr r3, [r7, #4] 80055f8: 2201 movs r2, #1 80055fa: f883 2495 strb.w r2, [r3, #1173] @ 0x495 /* Activate LPM */ if (hpcd->Init.lpm_enable == 1U) 80055fe: 687b ldr r3, [r7, #4] 8005600: 7b1b ldrb r3, [r3, #12] 8005602: 2b01 cmp r3, #1 8005604: d102 bne.n 800560c { (void)HAL_PCDEx_ActivateLPM(hpcd); 8005606: 6878 ldr r0, [r7, #4] 8005608: f000 f80a bl 8005620 } (void)USB_DevDisconnect(hpcd->Instance); 800560c: 687b ldr r3, [r7, #4] 800560e: 681b ldr r3, [r3, #0] 8005610: 4618 mov r0, r3 8005612: f004 ff14 bl 800a43e return HAL_OK; 8005616: 2300 movs r3, #0 } 8005618: 4618 mov r0, r3 800561a: 3710 adds r7, #16 800561c: 46bd mov sp, r7 800561e: bd80 pop {r7, pc} 08005620 : * @brief Activate LPM feature. * @param hpcd PCD handle * @retval HAL status */ HAL_StatusTypeDef HAL_PCDEx_ActivateLPM(PCD_HandleTypeDef *hpcd) { 8005620: b480 push {r7} 8005622: b085 sub sp, #20 8005624: af00 add r7, sp, #0 8005626: 6078 str r0, [r7, #4] USB_OTG_GlobalTypeDef *USBx = hpcd->Instance; 8005628: 687b ldr r3, [r7, #4] 800562a: 681b ldr r3, [r3, #0] 800562c: 60fb str r3, [r7, #12] hpcd->lpm_active = 1U; 800562e: 687b ldr r3, [r7, #4] 8005630: 2201 movs r2, #1 8005632: f8c3 24d8 str.w r2, [r3, #1240] @ 0x4d8 hpcd->LPM_State = LPM_L0; 8005636: 687b ldr r3, [r7, #4] 8005638: 2200 movs r2, #0 800563a: f883 24cc strb.w r2, [r3, #1228] @ 0x4cc USBx->GINTMSK |= USB_OTG_GINTMSK_LPMINTM; 800563e: 68fb ldr r3, [r7, #12] 8005640: 699b ldr r3, [r3, #24] 8005642: f043 6200 orr.w r2, r3, #134217728 @ 0x8000000 8005646: 68fb ldr r3, [r7, #12] 8005648: 619a str r2, [r3, #24] USBx->GLPMCFG |= (USB_OTG_GLPMCFG_LPMEN | USB_OTG_GLPMCFG_LPMACK | USB_OTG_GLPMCFG_ENBESL); 800564a: 68fb ldr r3, [r7, #12] 800564c: 6d5b ldr r3, [r3, #84] @ 0x54 800564e: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 8005652: f043 0303 orr.w r3, r3, #3 8005656: 68fa ldr r2, [r7, #12] 8005658: 6553 str r3, [r2, #84] @ 0x54 return HAL_OK; 800565a: 2300 movs r3, #0 } 800565c: 4618 mov r0, r3 800565e: 3714 adds r7, #20 8005660: 46bd mov sp, r7 8005662: f85d 7b04 ldr.w r7, [sp], #4 8005666: 4770 bx lr 08005668 : * @note LSEON bit that switches on and off the LSE crystal belongs as well to the * back-up domain. * @retval None */ void HAL_PWR_EnableBkUpAccess(void) { 8005668: b480 push {r7} 800566a: af00 add r7, sp, #0 SET_BIT(PWR->CR1, PWR_CR1_DBP); 800566c: 4b05 ldr r3, [pc, #20] @ (8005684 ) 800566e: 681b ldr r3, [r3, #0] 8005670: 4a04 ldr r2, [pc, #16] @ (8005684 ) 8005672: f443 7380 orr.w r3, r3, #256 @ 0x100 8005676: 6013 str r3, [r2, #0] } 8005678: bf00 nop 800567a: 46bd mov sp, r7 800567c: f85d 7b04 ldr.w r7, [sp], #4 8005680: 4770 bx lr 8005682: bf00 nop 8005684: 40007000 .word 0x40007000 08005688 : * @brief Return Voltage Scaling Range. * @retval VOS bit field (PWR_REGULATOR_VOLTAGE_SCALE1 or PWR_REGULATOR_VOLTAGE_SCALE2 * or PWR_REGULATOR_VOLTAGE_SCALE1_BOOST when applicable) */ uint32_t HAL_PWREx_GetVoltageRange(void) { 8005688: b480 push {r7} 800568a: af00 add r7, sp, #0 else { return PWR_REGULATOR_VOLTAGE_SCALE1_BOOST; } #else return (PWR->CR1 & PWR_CR1_VOS); 800568c: 4b04 ldr r3, [pc, #16] @ (80056a0 ) 800568e: 681b ldr r3, [r3, #0] 8005690: f403 63c0 and.w r3, r3, #1536 @ 0x600 #endif } 8005694: 4618 mov r0, r3 8005696: 46bd mov sp, r7 8005698: f85d 7b04 ldr.w r7, [sp], #4 800569c: 4770 bx lr 800569e: bf00 nop 80056a0: 40007000 .word 0x40007000 080056a4 : * cleared before returning the status. If the flag is not cleared within * 50 microseconds, HAL_TIMEOUT status is reported. * @retval HAL Status */ HAL_StatusTypeDef HAL_PWREx_ControlVoltageScaling(uint32_t VoltageScaling) { 80056a4: b480 push {r7} 80056a6: b085 sub sp, #20 80056a8: af00 add r7, sp, #0 80056aa: 6078 str r0, [r7, #4] } #else /* If Set Range 1 */ if (VoltageScaling == PWR_REGULATOR_VOLTAGE_SCALE1) 80056ac: 687b ldr r3, [r7, #4] 80056ae: f5b3 7f00 cmp.w r3, #512 @ 0x200 80056b2: d130 bne.n 8005716 { if (READ_BIT(PWR->CR1, PWR_CR1_VOS) != PWR_REGULATOR_VOLTAGE_SCALE1) 80056b4: 4b23 ldr r3, [pc, #140] @ (8005744 ) 80056b6: 681b ldr r3, [r3, #0] 80056b8: f403 63c0 and.w r3, r3, #1536 @ 0x600 80056bc: f5b3 7f00 cmp.w r3, #512 @ 0x200 80056c0: d038 beq.n 8005734 { /* Set Range 1 */ MODIFY_REG(PWR->CR1, PWR_CR1_VOS, PWR_REGULATOR_VOLTAGE_SCALE1); 80056c2: 4b20 ldr r3, [pc, #128] @ (8005744 ) 80056c4: 681b ldr r3, [r3, #0] 80056c6: f423 63c0 bic.w r3, r3, #1536 @ 0x600 80056ca: 4a1e ldr r2, [pc, #120] @ (8005744 ) 80056cc: f443 7300 orr.w r3, r3, #512 @ 0x200 80056d0: 6013 str r3, [r2, #0] /* Wait until VOSF is cleared */ wait_loop_index = ((PWR_FLAG_SETTING_DELAY_US * SystemCoreClock) / 1000000U) + 1U; 80056d2: 4b1d ldr r3, [pc, #116] @ (8005748 ) 80056d4: 681b ldr r3, [r3, #0] 80056d6: 2232 movs r2, #50 @ 0x32 80056d8: fb02 f303 mul.w r3, r2, r3 80056dc: 4a1b ldr r2, [pc, #108] @ (800574c ) 80056de: fba2 2303 umull r2, r3, r2, r3 80056e2: 0c9b lsrs r3, r3, #18 80056e4: 3301 adds r3, #1 80056e6: 60fb str r3, [r7, #12] while ((HAL_IS_BIT_SET(PWR->SR2, PWR_SR2_VOSF)) && (wait_loop_index != 0U)) 80056e8: e002 b.n 80056f0 { wait_loop_index--; 80056ea: 68fb ldr r3, [r7, #12] 80056ec: 3b01 subs r3, #1 80056ee: 60fb str r3, [r7, #12] while ((HAL_IS_BIT_SET(PWR->SR2, PWR_SR2_VOSF)) && (wait_loop_index != 0U)) 80056f0: 4b14 ldr r3, [pc, #80] @ (8005744 ) 80056f2: 695b ldr r3, [r3, #20] 80056f4: f403 6380 and.w r3, r3, #1024 @ 0x400 80056f8: f5b3 6f80 cmp.w r3, #1024 @ 0x400 80056fc: d102 bne.n 8005704 80056fe: 68fb ldr r3, [r7, #12] 8005700: 2b00 cmp r3, #0 8005702: d1f2 bne.n 80056ea } if (HAL_IS_BIT_SET(PWR->SR2, PWR_SR2_VOSF)) 8005704: 4b0f ldr r3, [pc, #60] @ (8005744 ) 8005706: 695b ldr r3, [r3, #20] 8005708: f403 6380 and.w r3, r3, #1024 @ 0x400 800570c: f5b3 6f80 cmp.w r3, #1024 @ 0x400 8005710: d110 bne.n 8005734 { return HAL_TIMEOUT; 8005712: 2303 movs r3, #3 8005714: e00f b.n 8005736 } } } else { if (READ_BIT(PWR->CR1, PWR_CR1_VOS) != PWR_REGULATOR_VOLTAGE_SCALE2) 8005716: 4b0b ldr r3, [pc, #44] @ (8005744 ) 8005718: 681b ldr r3, [r3, #0] 800571a: f403 63c0 and.w r3, r3, #1536 @ 0x600 800571e: f5b3 6f80 cmp.w r3, #1024 @ 0x400 8005722: d007 beq.n 8005734 { /* Set Range 2 */ MODIFY_REG(PWR->CR1, PWR_CR1_VOS, PWR_REGULATOR_VOLTAGE_SCALE2); 8005724: 4b07 ldr r3, [pc, #28] @ (8005744 ) 8005726: 681b ldr r3, [r3, #0] 8005728: f423 63c0 bic.w r3, r3, #1536 @ 0x600 800572c: 4a05 ldr r2, [pc, #20] @ (8005744 ) 800572e: f443 6380 orr.w r3, r3, #1024 @ 0x400 8005732: 6013 str r3, [r2, #0] /* No need to wait for VOSF to be cleared for this transition */ } } #endif return HAL_OK; 8005734: 2300 movs r3, #0 } 8005736: 4618 mov r0, r3 8005738: 3714 adds r7, #20 800573a: 46bd mov sp, r7 800573c: f85d 7b04 ldr.w r7, [sp], #4 8005740: 4770 bx lr 8005742: bf00 nop 8005744: 40007000 .word 0x40007000 8005748: 200000c4 .word 0x200000c4 800574c: 431bde83 .word 0x431bde83 08005750 : * @brief Enable VDDUSB supply. * @note Remove VDDUSB electrical and logical isolation, once VDDUSB supply is present. * @retval None */ void HAL_PWREx_EnableVddUSB(void) { 8005750: b480 push {r7} 8005752: af00 add r7, sp, #0 SET_BIT(PWR->CR2, PWR_CR2_USV); 8005754: 4b05 ldr r3, [pc, #20] @ (800576c ) 8005756: 685b ldr r3, [r3, #4] 8005758: 4a04 ldr r2, [pc, #16] @ (800576c ) 800575a: f443 6380 orr.w r3, r3, #1024 @ 0x400 800575e: 6053 str r3, [r2, #4] } 8005760: bf00 nop 8005762: 46bd mov sp, r7 8005764: f85d 7b04 ldr.w r7, [sp], #4 8005768: 4770 bx lr 800576a: bf00 nop 800576c: 40007000 .word 0x40007000 08005770 : * in the QSPI_InitTypeDef and initialize the associated handle. * @param hqspi QSPI handle * @retval HAL status */ HAL_StatusTypeDef HAL_QSPI_Init(QSPI_HandleTypeDef *hqspi) { 8005770: b580 push {r7, lr} 8005772: b086 sub sp, #24 8005774: af02 add r7, sp, #8 8005776: 6078 str r0, [r7, #4] HAL_StatusTypeDef status; uint32_t tickstart = HAL_GetTick(); 8005778: f7fe fa6e bl 8003c58 800577c: 60f8 str r0, [r7, #12] /* Check the QSPI handle allocation */ if(hqspi == NULL) 800577e: 687b ldr r3, [r7, #4] 8005780: 2b00 cmp r3, #0 8005782: d101 bne.n 8005788 { return HAL_ERROR; 8005784: 2301 movs r3, #1 8005786: e063 b.n 8005850 { assert_param(IS_QSPI_FLASH_ID(hqspi->Init.FlashID)); } #endif if(hqspi->State == HAL_QSPI_STATE_RESET) 8005788: 687b ldr r3, [r7, #4] 800578a: f893 3039 ldrb.w r3, [r3, #57] @ 0x39 800578e: b2db uxtb r3, r3 8005790: 2b00 cmp r3, #0 8005792: d10b bne.n 80057ac { /* Allocate lock resource and initialize it */ hqspi->Lock = HAL_UNLOCKED; 8005794: 687b ldr r3, [r7, #4] 8005796: 2200 movs r2, #0 8005798: f883 2038 strb.w r2, [r3, #56] @ 0x38 /* Init the low level hardware */ hqspi->MspInitCallback(hqspi); #else /* Init the low level hardware : GPIO, CLOCK */ HAL_QSPI_MspInit(hqspi); 800579c: 6878 ldr r0, [r7, #4] 800579e: f7fd fe79 bl 8003494 #endif /* Configure the default timeout for the QSPI memory access */ HAL_QSPI_SetTimeout(hqspi, HAL_QSPI_TIMEOUT_DEFAULT_VALUE); 80057a2: f241 3188 movw r1, #5000 @ 0x1388 80057a6: 6878 ldr r0, [r7, #4] 80057a8: f000 f858 bl 800585c } /* Configure QSPI FIFO Threshold */ MODIFY_REG(hqspi->Instance->CR, QUADSPI_CR_FTHRES, 80057ac: 687b ldr r3, [r7, #4] 80057ae: 681b ldr r3, [r3, #0] 80057b0: 681b ldr r3, [r3, #0] 80057b2: f423 6170 bic.w r1, r3, #3840 @ 0xf00 80057b6: 687b ldr r3, [r7, #4] 80057b8: 689b ldr r3, [r3, #8] 80057ba: 3b01 subs r3, #1 80057bc: 021a lsls r2, r3, #8 80057be: 687b ldr r3, [r7, #4] 80057c0: 681b ldr r3, [r3, #0] 80057c2: 430a orrs r2, r1 80057c4: 601a str r2, [r3, #0] ((hqspi->Init.FifoThreshold - 1U) << QUADSPI_CR_FTHRES_Pos)); /* Wait till BUSY flag reset */ status = QSPI_WaitFlagStateUntilTimeout(hqspi, QSPI_FLAG_BUSY, RESET, tickstart, hqspi->Timeout); 80057c6: 687b ldr r3, [r7, #4] 80057c8: 6c1b ldr r3, [r3, #64] @ 0x40 80057ca: 9300 str r3, [sp, #0] 80057cc: 68fb ldr r3, [r7, #12] 80057ce: 2200 movs r2, #0 80057d0: 2120 movs r1, #32 80057d2: 6878 ldr r0, [r7, #4] 80057d4: f000 f850 bl 8005878 80057d8: 4603 mov r3, r0 80057da: 72fb strb r3, [r7, #11] if(status == HAL_OK) 80057dc: 7afb ldrb r3, [r7, #11] 80057de: 2b00 cmp r3, #0 80057e0: d131 bne.n 8005846 #if defined(QUADSPI_CR_DFM) MODIFY_REG(hqspi->Instance->CR, (QUADSPI_CR_PRESCALER | QUADSPI_CR_SSHIFT | QUADSPI_CR_FSEL | QUADSPI_CR_DFM), ((hqspi->Init.ClockPrescaler << QUADSPI_CR_PRESCALER_Pos) | hqspi->Init.SampleShifting | hqspi->Init.FlashID | hqspi->Init.DualFlash)); #else MODIFY_REG(hqspi->Instance->CR, (QUADSPI_CR_PRESCALER | QUADSPI_CR_SSHIFT), 80057e2: 687b ldr r3, [r7, #4] 80057e4: 681b ldr r3, [r3, #0] 80057e6: 681b ldr r3, [r3, #0] 80057e8: f023 437f bic.w r3, r3, #4278190080 @ 0xff000000 80057ec: f023 0310 bic.w r3, r3, #16 80057f0: 687a ldr r2, [r7, #4] 80057f2: 6852 ldr r2, [r2, #4] 80057f4: 0611 lsls r1, r2, #24 80057f6: 687a ldr r2, [r7, #4] 80057f8: 68d2 ldr r2, [r2, #12] 80057fa: 4311 orrs r1, r2 80057fc: 687a ldr r2, [r7, #4] 80057fe: 6812 ldr r2, [r2, #0] 8005800: 430b orrs r3, r1 8005802: 6013 str r3, [r2, #0] ((hqspi->Init.ClockPrescaler << QUADSPI_CR_PRESCALER_Pos) | hqspi->Init.SampleShifting)); #endif /* Configure QSPI Flash Size, CS High Time and Clock Mode */ MODIFY_REG(hqspi->Instance->DCR, (QUADSPI_DCR_FSIZE | QUADSPI_DCR_CSHT | QUADSPI_DCR_CKMODE), 8005804: 687b ldr r3, [r7, #4] 8005806: 681b ldr r3, [r3, #0] 8005808: 685a ldr r2, [r3, #4] 800580a: 4b13 ldr r3, [pc, #76] @ (8005858 ) 800580c: 4013 ands r3, r2 800580e: 687a ldr r2, [r7, #4] 8005810: 6912 ldr r2, [r2, #16] 8005812: 0411 lsls r1, r2, #16 8005814: 687a ldr r2, [r7, #4] 8005816: 6952 ldr r2, [r2, #20] 8005818: 4311 orrs r1, r2 800581a: 687a ldr r2, [r7, #4] 800581c: 6992 ldr r2, [r2, #24] 800581e: 4311 orrs r1, r2 8005820: 687a ldr r2, [r7, #4] 8005822: 6812 ldr r2, [r2, #0] 8005824: 430b orrs r3, r1 8005826: 6053 str r3, [r2, #4] ((hqspi->Init.FlashSize << QUADSPI_DCR_FSIZE_Pos) | hqspi->Init.ChipSelectHighTime | hqspi->Init.ClockMode)); /* Enable the QSPI peripheral */ __HAL_QSPI_ENABLE(hqspi); 8005828: 687b ldr r3, [r7, #4] 800582a: 681b ldr r3, [r3, #0] 800582c: 681a ldr r2, [r3, #0] 800582e: 687b ldr r3, [r7, #4] 8005830: 681b ldr r3, [r3, #0] 8005832: f042 0201 orr.w r2, r2, #1 8005836: 601a str r2, [r3, #0] /* Set QSPI error code to none */ hqspi->ErrorCode = HAL_QSPI_ERROR_NONE; 8005838: 687b ldr r3, [r7, #4] 800583a: 2200 movs r2, #0 800583c: 63da str r2, [r3, #60] @ 0x3c /* Initialize the QSPI state */ hqspi->State = HAL_QSPI_STATE_READY; 800583e: 687b ldr r3, [r7, #4] 8005840: 2201 movs r2, #1 8005842: f883 2039 strb.w r2, [r3, #57] @ 0x39 } /* Release Lock */ __HAL_UNLOCK(hqspi); 8005846: 687b ldr r3, [r7, #4] 8005848: 2200 movs r2, #0 800584a: f883 2038 strb.w r2, [r3, #56] @ 0x38 /* Return function status */ return status; 800584e: 7afb ldrb r3, [r7, #11] } 8005850: 4618 mov r0, r3 8005852: 3710 adds r7, #16 8005854: 46bd mov sp, r7 8005856: bd80 pop {r7, pc} 8005858: ffe0f8fe .word 0xffe0f8fe 0800585c : * @param hqspi QSPI handle. * @param Timeout Timeout for the QSPI memory access. * @retval None */ void HAL_QSPI_SetTimeout(QSPI_HandleTypeDef *hqspi, uint32_t Timeout) { 800585c: b480 push {r7} 800585e: b083 sub sp, #12 8005860: af00 add r7, sp, #0 8005862: 6078 str r0, [r7, #4] 8005864: 6039 str r1, [r7, #0] hqspi->Timeout = Timeout; 8005866: 687b ldr r3, [r7, #4] 8005868: 683a ldr r2, [r7, #0] 800586a: 641a str r2, [r3, #64] @ 0x40 } 800586c: bf00 nop 800586e: 370c adds r7, #12 8005870: 46bd mov sp, r7 8005872: f85d 7b04 ldr.w r7, [sp], #4 8005876: 4770 bx lr 08005878 : * @param Timeout Duration of the timeout * @retval HAL status */ static HAL_StatusTypeDef QSPI_WaitFlagStateUntilTimeout(QSPI_HandleTypeDef *hqspi, uint32_t Flag, FlagStatus State, uint32_t Tickstart, uint32_t Timeout) { 8005878: b580 push {r7, lr} 800587a: b084 sub sp, #16 800587c: af00 add r7, sp, #0 800587e: 60f8 str r0, [r7, #12] 8005880: 60b9 str r1, [r7, #8] 8005882: 603b str r3, [r7, #0] 8005884: 4613 mov r3, r2 8005886: 71fb strb r3, [r7, #7] /* Wait until flag is in expected state */ while((__HAL_QSPI_GET_FLAG(hqspi, Flag)) != State) 8005888: e01a b.n 80058c0 { /* Check for the Timeout */ if (Timeout != HAL_MAX_DELAY) 800588a: 69bb ldr r3, [r7, #24] 800588c: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff 8005890: d016 beq.n 80058c0 { if(((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) 8005892: f7fe f9e1 bl 8003c58 8005896: 4602 mov r2, r0 8005898: 683b ldr r3, [r7, #0] 800589a: 1ad3 subs r3, r2, r3 800589c: 69ba ldr r2, [r7, #24] 800589e: 429a cmp r2, r3 80058a0: d302 bcc.n 80058a8 80058a2: 69bb ldr r3, [r7, #24] 80058a4: 2b00 cmp r3, #0 80058a6: d10b bne.n 80058c0 { hqspi->State = HAL_QSPI_STATE_ERROR; 80058a8: 68fb ldr r3, [r7, #12] 80058aa: 2204 movs r2, #4 80058ac: f883 2039 strb.w r2, [r3, #57] @ 0x39 hqspi->ErrorCode |= HAL_QSPI_ERROR_TIMEOUT; 80058b0: 68fb ldr r3, [r7, #12] 80058b2: 6bdb ldr r3, [r3, #60] @ 0x3c 80058b4: f043 0201 orr.w r2, r3, #1 80058b8: 68fb ldr r3, [r7, #12] 80058ba: 63da str r2, [r3, #60] @ 0x3c return HAL_ERROR; 80058bc: 2301 movs r3, #1 80058be: e00e b.n 80058de while((__HAL_QSPI_GET_FLAG(hqspi, Flag)) != State) 80058c0: 68fb ldr r3, [r7, #12] 80058c2: 681b ldr r3, [r3, #0] 80058c4: 689a ldr r2, [r3, #8] 80058c6: 68bb ldr r3, [r7, #8] 80058c8: 4013 ands r3, r2 80058ca: 2b00 cmp r3, #0 80058cc: bf14 ite ne 80058ce: 2301 movne r3, #1 80058d0: 2300 moveq r3, #0 80058d2: b2db uxtb r3, r3 80058d4: 461a mov r2, r3 80058d6: 79fb ldrb r3, [r7, #7] 80058d8: 429a cmp r2, r3 80058da: d1d6 bne.n 800588a } } } return HAL_OK; 80058dc: 2300 movs r3, #0 } 80058de: 4618 mov r0, r3 80058e0: 3710 adds r7, #16 80058e2: 46bd mov sp, r7 80058e4: bd80 pop {r7, pc} ... 080058e8 : * @note If HSE failed to start, HSE should be disabled before recalling HAL_RCC_OscConfig(). * @retval HAL status */ HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct) { 80058e8: b580 push {r7, lr} 80058ea: b088 sub sp, #32 80058ec: af00 add r7, sp, #0 80058ee: 6078 str r0, [r7, #4] uint32_t tickstart; HAL_StatusTypeDef status; uint32_t sysclk_source, pll_config; /* Check Null pointer */ if(RCC_OscInitStruct == NULL) 80058f0: 687b ldr r3, [r7, #4] 80058f2: 2b00 cmp r3, #0 80058f4: d101 bne.n 80058fa { return HAL_ERROR; 80058f6: 2301 movs r3, #1 80058f8: e3ca b.n 8006090 } /* Check the parameters */ assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType)); sysclk_source = __HAL_RCC_GET_SYSCLK_SOURCE(); 80058fa: 4b97 ldr r3, [pc, #604] @ (8005b58 ) 80058fc: 689b ldr r3, [r3, #8] 80058fe: f003 030c and.w r3, r3, #12 8005902: 61bb str r3, [r7, #24] pll_config = __HAL_RCC_GET_PLL_OSCSOURCE(); 8005904: 4b94 ldr r3, [pc, #592] @ (8005b58 ) 8005906: 68db ldr r3, [r3, #12] 8005908: f003 0303 and.w r3, r3, #3 800590c: 617b str r3, [r7, #20] /*----------------------------- MSI Configuration --------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_MSI) == RCC_OSCILLATORTYPE_MSI) 800590e: 687b ldr r3, [r7, #4] 8005910: 681b ldr r3, [r3, #0] 8005912: f003 0310 and.w r3, r3, #16 8005916: 2b00 cmp r3, #0 8005918: f000 80e4 beq.w 8005ae4 assert_param(IS_RCC_MSI(RCC_OscInitStruct->MSIState)); assert_param(IS_RCC_MSICALIBRATION_VALUE(RCC_OscInitStruct->MSICalibrationValue)); assert_param(IS_RCC_MSI_CLOCK_RANGE(RCC_OscInitStruct->MSIClockRange)); /* Check if MSI is used as system clock or as PLL source when PLL is selected as system clock */ if((sysclk_source == RCC_CFGR_SWS_MSI) || 800591c: 69bb ldr r3, [r7, #24] 800591e: 2b00 cmp r3, #0 8005920: d007 beq.n 8005932 8005922: 69bb ldr r3, [r7, #24] 8005924: 2b0c cmp r3, #12 8005926: f040 808b bne.w 8005a40 ((sysclk_source == RCC_CFGR_SWS_PLL) && (pll_config == RCC_PLLSOURCE_MSI))) 800592a: 697b ldr r3, [r7, #20] 800592c: 2b01 cmp r3, #1 800592e: f040 8087 bne.w 8005a40 { if((READ_BIT(RCC->CR, RCC_CR_MSIRDY) != 0U) && (RCC_OscInitStruct->MSIState == RCC_MSI_OFF)) 8005932: 4b89 ldr r3, [pc, #548] @ (8005b58 ) 8005934: 681b ldr r3, [r3, #0] 8005936: f003 0302 and.w r3, r3, #2 800593a: 2b00 cmp r3, #0 800593c: d005 beq.n 800594a 800593e: 687b ldr r3, [r7, #4] 8005940: 699b ldr r3, [r3, #24] 8005942: 2b00 cmp r3, #0 8005944: d101 bne.n 800594a { return HAL_ERROR; 8005946: 2301 movs r3, #1 8005948: e3a2 b.n 8006090 else { /* To correctly read data from FLASH memory, the number of wait states (LATENCY) must be correctly programmed according to the frequency of the CPU clock (HCLK) and the supply voltage of the device. */ if(RCC_OscInitStruct->MSIClockRange > __HAL_RCC_GET_MSI_RANGE()) 800594a: 687b ldr r3, [r7, #4] 800594c: 6a1a ldr r2, [r3, #32] 800594e: 4b82 ldr r3, [pc, #520] @ (8005b58 ) 8005950: 681b ldr r3, [r3, #0] 8005952: f003 0308 and.w r3, r3, #8 8005956: 2b00 cmp r3, #0 8005958: d004 beq.n 8005964 800595a: 4b7f ldr r3, [pc, #508] @ (8005b58 ) 800595c: 681b ldr r3, [r3, #0] 800595e: f003 03f0 and.w r3, r3, #240 @ 0xf0 8005962: e005 b.n 8005970 8005964: 4b7c ldr r3, [pc, #496] @ (8005b58 ) 8005966: f8d3 3094 ldr.w r3, [r3, #148] @ 0x94 800596a: 091b lsrs r3, r3, #4 800596c: f003 03f0 and.w r3, r3, #240 @ 0xf0 8005970: 4293 cmp r3, r2 8005972: d223 bcs.n 80059bc { /* First increase number of wait states update if necessary */ if(RCC_SetFlashLatencyFromMSIRange(RCC_OscInitStruct->MSIClockRange) != HAL_OK) 8005974: 687b ldr r3, [r7, #4] 8005976: 6a1b ldr r3, [r3, #32] 8005978: 4618 mov r0, r3 800597a: f000 fd87 bl 800648c 800597e: 4603 mov r3, r0 8005980: 2b00 cmp r3, #0 8005982: d001 beq.n 8005988 { return HAL_ERROR; 8005984: 2301 movs r3, #1 8005986: e383 b.n 8006090 } /* Selects the Multiple Speed oscillator (MSI) clock range .*/ __HAL_RCC_MSI_RANGE_CONFIG(RCC_OscInitStruct->MSIClockRange); 8005988: 4b73 ldr r3, [pc, #460] @ (8005b58 ) 800598a: 681b ldr r3, [r3, #0] 800598c: 4a72 ldr r2, [pc, #456] @ (8005b58 ) 800598e: f043 0308 orr.w r3, r3, #8 8005992: 6013 str r3, [r2, #0] 8005994: 4b70 ldr r3, [pc, #448] @ (8005b58 ) 8005996: 681b ldr r3, [r3, #0] 8005998: f023 02f0 bic.w r2, r3, #240 @ 0xf0 800599c: 687b ldr r3, [r7, #4] 800599e: 6a1b ldr r3, [r3, #32] 80059a0: 496d ldr r1, [pc, #436] @ (8005b58 ) 80059a2: 4313 orrs r3, r2 80059a4: 600b str r3, [r1, #0] /* Adjusts the Multiple Speed oscillator (MSI) calibration value.*/ __HAL_RCC_MSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->MSICalibrationValue); 80059a6: 4b6c ldr r3, [pc, #432] @ (8005b58 ) 80059a8: 685b ldr r3, [r3, #4] 80059aa: f423 427f bic.w r2, r3, #65280 @ 0xff00 80059ae: 687b ldr r3, [r7, #4] 80059b0: 69db ldr r3, [r3, #28] 80059b2: 021b lsls r3, r3, #8 80059b4: 4968 ldr r1, [pc, #416] @ (8005b58 ) 80059b6: 4313 orrs r3, r2 80059b8: 604b str r3, [r1, #4] 80059ba: e025 b.n 8005a08 } else { /* Else, keep current flash latency while decreasing applies */ /* Selects the Multiple Speed oscillator (MSI) clock range .*/ __HAL_RCC_MSI_RANGE_CONFIG(RCC_OscInitStruct->MSIClockRange); 80059bc: 4b66 ldr r3, [pc, #408] @ (8005b58 ) 80059be: 681b ldr r3, [r3, #0] 80059c0: 4a65 ldr r2, [pc, #404] @ (8005b58 ) 80059c2: f043 0308 orr.w r3, r3, #8 80059c6: 6013 str r3, [r2, #0] 80059c8: 4b63 ldr r3, [pc, #396] @ (8005b58 ) 80059ca: 681b ldr r3, [r3, #0] 80059cc: f023 02f0 bic.w r2, r3, #240 @ 0xf0 80059d0: 687b ldr r3, [r7, #4] 80059d2: 6a1b ldr r3, [r3, #32] 80059d4: 4960 ldr r1, [pc, #384] @ (8005b58 ) 80059d6: 4313 orrs r3, r2 80059d8: 600b str r3, [r1, #0] /* Adjusts the Multiple Speed oscillator (MSI) calibration value.*/ __HAL_RCC_MSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->MSICalibrationValue); 80059da: 4b5f ldr r3, [pc, #380] @ (8005b58 ) 80059dc: 685b ldr r3, [r3, #4] 80059de: f423 427f bic.w r2, r3, #65280 @ 0xff00 80059e2: 687b ldr r3, [r7, #4] 80059e4: 69db ldr r3, [r3, #28] 80059e6: 021b lsls r3, r3, #8 80059e8: 495b ldr r1, [pc, #364] @ (8005b58 ) 80059ea: 4313 orrs r3, r2 80059ec: 604b str r3, [r1, #4] /* Decrease number of wait states update if necessary */ /* Only possible when MSI is the System clock source */ if(sysclk_source == RCC_CFGR_SWS_MSI) 80059ee: 69bb ldr r3, [r7, #24] 80059f0: 2b00 cmp r3, #0 80059f2: d109 bne.n 8005a08 { if(RCC_SetFlashLatencyFromMSIRange(RCC_OscInitStruct->MSIClockRange) != HAL_OK) 80059f4: 687b ldr r3, [r7, #4] 80059f6: 6a1b ldr r3, [r3, #32] 80059f8: 4618 mov r0, r3 80059fa: f000 fd47 bl 800648c 80059fe: 4603 mov r3, r0 8005a00: 2b00 cmp r3, #0 8005a02: d001 beq.n 8005a08 { return HAL_ERROR; 8005a04: 2301 movs r3, #1 8005a06: e343 b.n 8006090 } } } /* Update the SystemCoreClock global variable */ SystemCoreClock = HAL_RCC_GetSysClockFreq() >> (AHBPrescTable[READ_BIT(RCC->CFGR, RCC_CFGR_HPRE) >> RCC_CFGR_HPRE_Pos] & 0x1FU); 8005a08: f000 fc4a bl 80062a0 8005a0c: 4602 mov r2, r0 8005a0e: 4b52 ldr r3, [pc, #328] @ (8005b58 ) 8005a10: 689b ldr r3, [r3, #8] 8005a12: 091b lsrs r3, r3, #4 8005a14: f003 030f and.w r3, r3, #15 8005a18: 4950 ldr r1, [pc, #320] @ (8005b5c ) 8005a1a: 5ccb ldrb r3, [r1, r3] 8005a1c: f003 031f and.w r3, r3, #31 8005a20: fa22 f303 lsr.w r3, r2, r3 8005a24: 4a4e ldr r2, [pc, #312] @ (8005b60 ) 8005a26: 6013 str r3, [r2, #0] /* Configure the source of time base considering new system clocks settings*/ status = HAL_InitTick(uwTickPrio); 8005a28: 4b4e ldr r3, [pc, #312] @ (8005b64 ) 8005a2a: 681b ldr r3, [r3, #0] 8005a2c: 4618 mov r0, r3 8005a2e: f7fd ff1f bl 8003870 8005a32: 4603 mov r3, r0 8005a34: 73fb strb r3, [r7, #15] if(status != HAL_OK) 8005a36: 7bfb ldrb r3, [r7, #15] 8005a38: 2b00 cmp r3, #0 8005a3a: d052 beq.n 8005ae2 { return status; 8005a3c: 7bfb ldrb r3, [r7, #15] 8005a3e: e327 b.n 8006090 } } else { /* Check the MSI State */ if(RCC_OscInitStruct->MSIState != RCC_MSI_OFF) 8005a40: 687b ldr r3, [r7, #4] 8005a42: 699b ldr r3, [r3, #24] 8005a44: 2b00 cmp r3, #0 8005a46: d032 beq.n 8005aae { /* Enable the Internal High Speed oscillator (MSI). */ __HAL_RCC_MSI_ENABLE(); 8005a48: 4b43 ldr r3, [pc, #268] @ (8005b58 ) 8005a4a: 681b ldr r3, [r3, #0] 8005a4c: 4a42 ldr r2, [pc, #264] @ (8005b58 ) 8005a4e: f043 0301 orr.w r3, r3, #1 8005a52: 6013 str r3, [r2, #0] /* Get timeout */ tickstart = HAL_GetTick(); 8005a54: f7fe f900 bl 8003c58 8005a58: 6138 str r0, [r7, #16] /* Wait till MSI is ready */ while(READ_BIT(RCC->CR, RCC_CR_MSIRDY) == 0U) 8005a5a: e008 b.n 8005a6e { if((HAL_GetTick() - tickstart) > MSI_TIMEOUT_VALUE) 8005a5c: f7fe f8fc bl 8003c58 8005a60: 4602 mov r2, r0 8005a62: 693b ldr r3, [r7, #16] 8005a64: 1ad3 subs r3, r2, r3 8005a66: 2b02 cmp r3, #2 8005a68: d901 bls.n 8005a6e { return HAL_TIMEOUT; 8005a6a: 2303 movs r3, #3 8005a6c: e310 b.n 8006090 while(READ_BIT(RCC->CR, RCC_CR_MSIRDY) == 0U) 8005a6e: 4b3a ldr r3, [pc, #232] @ (8005b58 ) 8005a70: 681b ldr r3, [r3, #0] 8005a72: f003 0302 and.w r3, r3, #2 8005a76: 2b00 cmp r3, #0 8005a78: d0f0 beq.n 8005a5c } } /* Selects the Multiple Speed oscillator (MSI) clock range .*/ __HAL_RCC_MSI_RANGE_CONFIG(RCC_OscInitStruct->MSIClockRange); 8005a7a: 4b37 ldr r3, [pc, #220] @ (8005b58 ) 8005a7c: 681b ldr r3, [r3, #0] 8005a7e: 4a36 ldr r2, [pc, #216] @ (8005b58 ) 8005a80: f043 0308 orr.w r3, r3, #8 8005a84: 6013 str r3, [r2, #0] 8005a86: 4b34 ldr r3, [pc, #208] @ (8005b58 ) 8005a88: 681b ldr r3, [r3, #0] 8005a8a: f023 02f0 bic.w r2, r3, #240 @ 0xf0 8005a8e: 687b ldr r3, [r7, #4] 8005a90: 6a1b ldr r3, [r3, #32] 8005a92: 4931 ldr r1, [pc, #196] @ (8005b58 ) 8005a94: 4313 orrs r3, r2 8005a96: 600b str r3, [r1, #0] /* Adjusts the Multiple Speed oscillator (MSI) calibration value.*/ __HAL_RCC_MSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->MSICalibrationValue); 8005a98: 4b2f ldr r3, [pc, #188] @ (8005b58 ) 8005a9a: 685b ldr r3, [r3, #4] 8005a9c: f423 427f bic.w r2, r3, #65280 @ 0xff00 8005aa0: 687b ldr r3, [r7, #4] 8005aa2: 69db ldr r3, [r3, #28] 8005aa4: 021b lsls r3, r3, #8 8005aa6: 492c ldr r1, [pc, #176] @ (8005b58 ) 8005aa8: 4313 orrs r3, r2 8005aaa: 604b str r3, [r1, #4] 8005aac: e01a b.n 8005ae4 } else { /* Disable the Internal High Speed oscillator (MSI). */ __HAL_RCC_MSI_DISABLE(); 8005aae: 4b2a ldr r3, [pc, #168] @ (8005b58 ) 8005ab0: 681b ldr r3, [r3, #0] 8005ab2: 4a29 ldr r2, [pc, #164] @ (8005b58 ) 8005ab4: f023 0301 bic.w r3, r3, #1 8005ab8: 6013 str r3, [r2, #0] /* Get timeout */ tickstart = HAL_GetTick(); 8005aba: f7fe f8cd bl 8003c58 8005abe: 6138 str r0, [r7, #16] /* Wait till MSI is ready */ while(READ_BIT(RCC->CR, RCC_CR_MSIRDY) != 0U) 8005ac0: e008 b.n 8005ad4 { if((HAL_GetTick() - tickstart) > MSI_TIMEOUT_VALUE) 8005ac2: f7fe f8c9 bl 8003c58 8005ac6: 4602 mov r2, r0 8005ac8: 693b ldr r3, [r7, #16] 8005aca: 1ad3 subs r3, r2, r3 8005acc: 2b02 cmp r3, #2 8005ace: d901 bls.n 8005ad4 { return HAL_TIMEOUT; 8005ad0: 2303 movs r3, #3 8005ad2: e2dd b.n 8006090 while(READ_BIT(RCC->CR, RCC_CR_MSIRDY) != 0U) 8005ad4: 4b20 ldr r3, [pc, #128] @ (8005b58 ) 8005ad6: 681b ldr r3, [r3, #0] 8005ad8: f003 0302 and.w r3, r3, #2 8005adc: 2b00 cmp r3, #0 8005ade: d1f0 bne.n 8005ac2 8005ae0: e000 b.n 8005ae4 if((READ_BIT(RCC->CR, RCC_CR_MSIRDY) != 0U) && (RCC_OscInitStruct->MSIState == RCC_MSI_OFF)) 8005ae2: bf00 nop } } } } /*------------------------------- HSE Configuration ------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) 8005ae4: 687b ldr r3, [r7, #4] 8005ae6: 681b ldr r3, [r3, #0] 8005ae8: f003 0301 and.w r3, r3, #1 8005aec: 2b00 cmp r3, #0 8005aee: d074 beq.n 8005bda { /* Check the parameters */ assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState)); /* When the HSE is used as system clock or clock source for PLL in these cases it is not allowed to be disabled */ if((sysclk_source == RCC_CFGR_SWS_HSE) || 8005af0: 69bb ldr r3, [r7, #24] 8005af2: 2b08 cmp r3, #8 8005af4: d005 beq.n 8005b02 8005af6: 69bb ldr r3, [r7, #24] 8005af8: 2b0c cmp r3, #12 8005afa: d10e bne.n 8005b1a ((sysclk_source == RCC_CFGR_SWS_PLL) && (pll_config == RCC_PLLSOURCE_HSE))) 8005afc: 697b ldr r3, [r7, #20] 8005afe: 2b03 cmp r3, #3 8005b00: d10b bne.n 8005b1a { if((READ_BIT(RCC->CR, RCC_CR_HSERDY) != 0U) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) 8005b02: 4b15 ldr r3, [pc, #84] @ (8005b58 ) 8005b04: 681b ldr r3, [r3, #0] 8005b06: f403 3300 and.w r3, r3, #131072 @ 0x20000 8005b0a: 2b00 cmp r3, #0 8005b0c: d064 beq.n 8005bd8 8005b0e: 687b ldr r3, [r7, #4] 8005b10: 685b ldr r3, [r3, #4] 8005b12: 2b00 cmp r3, #0 8005b14: d160 bne.n 8005bd8 { return HAL_ERROR; 8005b16: 2301 movs r3, #1 8005b18: e2ba b.n 8006090 } } else { /* Set the new HSE configuration ---------------------------------------*/ __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); 8005b1a: 687b ldr r3, [r7, #4] 8005b1c: 685b ldr r3, [r3, #4] 8005b1e: f5b3 3f80 cmp.w r3, #65536 @ 0x10000 8005b22: d106 bne.n 8005b32 8005b24: 4b0c ldr r3, [pc, #48] @ (8005b58 ) 8005b26: 681b ldr r3, [r3, #0] 8005b28: 4a0b ldr r2, [pc, #44] @ (8005b58 ) 8005b2a: f443 3380 orr.w r3, r3, #65536 @ 0x10000 8005b2e: 6013 str r3, [r2, #0] 8005b30: e026 b.n 8005b80 8005b32: 687b ldr r3, [r7, #4] 8005b34: 685b ldr r3, [r3, #4] 8005b36: f5b3 2fa0 cmp.w r3, #327680 @ 0x50000 8005b3a: d115 bne.n 8005b68 8005b3c: 4b06 ldr r3, [pc, #24] @ (8005b58 ) 8005b3e: 681b ldr r3, [r3, #0] 8005b40: 4a05 ldr r2, [pc, #20] @ (8005b58 ) 8005b42: f443 2380 orr.w r3, r3, #262144 @ 0x40000 8005b46: 6013 str r3, [r2, #0] 8005b48: 4b03 ldr r3, [pc, #12] @ (8005b58 ) 8005b4a: 681b ldr r3, [r3, #0] 8005b4c: 4a02 ldr r2, [pc, #8] @ (8005b58 ) 8005b4e: f443 3380 orr.w r3, r3, #65536 @ 0x10000 8005b52: 6013 str r3, [r2, #0] 8005b54: e014 b.n 8005b80 8005b56: bf00 nop 8005b58: 40021000 .word 0x40021000 8005b5c: 08014ebc .word 0x08014ebc 8005b60: 200000c4 .word 0x200000c4 8005b64: 200000c8 .word 0x200000c8 8005b68: 4ba0 ldr r3, [pc, #640] @ (8005dec ) 8005b6a: 681b ldr r3, [r3, #0] 8005b6c: 4a9f ldr r2, [pc, #636] @ (8005dec ) 8005b6e: f423 3380 bic.w r3, r3, #65536 @ 0x10000 8005b72: 6013 str r3, [r2, #0] 8005b74: 4b9d ldr r3, [pc, #628] @ (8005dec ) 8005b76: 681b ldr r3, [r3, #0] 8005b78: 4a9c ldr r2, [pc, #624] @ (8005dec ) 8005b7a: f423 2380 bic.w r3, r3, #262144 @ 0x40000 8005b7e: 6013 str r3, [r2, #0] /* Check the HSE State */ if(RCC_OscInitStruct->HSEState != RCC_HSE_OFF) 8005b80: 687b ldr r3, [r7, #4] 8005b82: 685b ldr r3, [r3, #4] 8005b84: 2b00 cmp r3, #0 8005b86: d013 beq.n 8005bb0 { /* Get Start Tick*/ tickstart = HAL_GetTick(); 8005b88: f7fe f866 bl 8003c58 8005b8c: 6138 str r0, [r7, #16] /* Wait till HSE is ready */ while(READ_BIT(RCC->CR, RCC_CR_HSERDY) == 0U) 8005b8e: e008 b.n 8005ba2 { if((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE) 8005b90: f7fe f862 bl 8003c58 8005b94: 4602 mov r2, r0 8005b96: 693b ldr r3, [r7, #16] 8005b98: 1ad3 subs r3, r2, r3 8005b9a: 2b64 cmp r3, #100 @ 0x64 8005b9c: d901 bls.n 8005ba2 { return HAL_TIMEOUT; 8005b9e: 2303 movs r3, #3 8005ba0: e276 b.n 8006090 while(READ_BIT(RCC->CR, RCC_CR_HSERDY) == 0U) 8005ba2: 4b92 ldr r3, [pc, #584] @ (8005dec ) 8005ba4: 681b ldr r3, [r3, #0] 8005ba6: f403 3300 and.w r3, r3, #131072 @ 0x20000 8005baa: 2b00 cmp r3, #0 8005bac: d0f0 beq.n 8005b90 8005bae: e014 b.n 8005bda } } else { /* Get Start Tick*/ tickstart = HAL_GetTick(); 8005bb0: f7fe f852 bl 8003c58 8005bb4: 6138 str r0, [r7, #16] /* Wait till HSE is disabled */ while(READ_BIT(RCC->CR, RCC_CR_HSERDY) != 0U) 8005bb6: e008 b.n 8005bca { if((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE) 8005bb8: f7fe f84e bl 8003c58 8005bbc: 4602 mov r2, r0 8005bbe: 693b ldr r3, [r7, #16] 8005bc0: 1ad3 subs r3, r2, r3 8005bc2: 2b64 cmp r3, #100 @ 0x64 8005bc4: d901 bls.n 8005bca { return HAL_TIMEOUT; 8005bc6: 2303 movs r3, #3 8005bc8: e262 b.n 8006090 while(READ_BIT(RCC->CR, RCC_CR_HSERDY) != 0U) 8005bca: 4b88 ldr r3, [pc, #544] @ (8005dec ) 8005bcc: 681b ldr r3, [r3, #0] 8005bce: f403 3300 and.w r3, r3, #131072 @ 0x20000 8005bd2: 2b00 cmp r3, #0 8005bd4: d1f0 bne.n 8005bb8 8005bd6: e000 b.n 8005bda if((READ_BIT(RCC->CR, RCC_CR_HSERDY) != 0U) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) 8005bd8: bf00 nop } } } } /*----------------------------- HSI Configuration --------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI) 8005bda: 687b ldr r3, [r7, #4] 8005bdc: 681b ldr r3, [r3, #0] 8005bde: f003 0302 and.w r3, r3, #2 8005be2: 2b00 cmp r3, #0 8005be4: d060 beq.n 8005ca8 /* Check the parameters */ assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState)); assert_param(IS_RCC_HSI_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue)); /* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */ if((sysclk_source == RCC_CFGR_SWS_HSI) || 8005be6: 69bb ldr r3, [r7, #24] 8005be8: 2b04 cmp r3, #4 8005bea: d005 beq.n 8005bf8 8005bec: 69bb ldr r3, [r7, #24] 8005bee: 2b0c cmp r3, #12 8005bf0: d119 bne.n 8005c26 ((sysclk_source == RCC_CFGR_SWS_PLL) && (pll_config == RCC_PLLSOURCE_HSI))) 8005bf2: 697b ldr r3, [r7, #20] 8005bf4: 2b02 cmp r3, #2 8005bf6: d116 bne.n 8005c26 { /* When HSI is used as system clock it will not be disabled */ if((READ_BIT(RCC->CR, RCC_CR_HSIRDY) != 0U) && (RCC_OscInitStruct->HSIState == RCC_HSI_OFF)) 8005bf8: 4b7c ldr r3, [pc, #496] @ (8005dec ) 8005bfa: 681b ldr r3, [r3, #0] 8005bfc: f403 6380 and.w r3, r3, #1024 @ 0x400 8005c00: 2b00 cmp r3, #0 8005c02: d005 beq.n 8005c10 8005c04: 687b ldr r3, [r7, #4] 8005c06: 68db ldr r3, [r3, #12] 8005c08: 2b00 cmp r3, #0 8005c0a: d101 bne.n 8005c10 { return HAL_ERROR; 8005c0c: 2301 movs r3, #1 8005c0e: e23f b.n 8006090 } /* Otherwise, just the calibration is allowed */ else { /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); 8005c10: 4b76 ldr r3, [pc, #472] @ (8005dec ) 8005c12: 685b ldr r3, [r3, #4] 8005c14: f023 52f8 bic.w r2, r3, #520093696 @ 0x1f000000 8005c18: 687b ldr r3, [r7, #4] 8005c1a: 691b ldr r3, [r3, #16] 8005c1c: 061b lsls r3, r3, #24 8005c1e: 4973 ldr r1, [pc, #460] @ (8005dec ) 8005c20: 4313 orrs r3, r2 8005c22: 604b str r3, [r1, #4] if((READ_BIT(RCC->CR, RCC_CR_HSIRDY) != 0U) && (RCC_OscInitStruct->HSIState == RCC_HSI_OFF)) 8005c24: e040 b.n 8005ca8 } } else { /* Check the HSI State */ if(RCC_OscInitStruct->HSIState != RCC_HSI_OFF) 8005c26: 687b ldr r3, [r7, #4] 8005c28: 68db ldr r3, [r3, #12] 8005c2a: 2b00 cmp r3, #0 8005c2c: d023 beq.n 8005c76 { /* Enable the Internal High Speed oscillator (HSI). */ __HAL_RCC_HSI_ENABLE(); 8005c2e: 4b6f ldr r3, [pc, #444] @ (8005dec ) 8005c30: 681b ldr r3, [r3, #0] 8005c32: 4a6e ldr r2, [pc, #440] @ (8005dec ) 8005c34: f443 7380 orr.w r3, r3, #256 @ 0x100 8005c38: 6013 str r3, [r2, #0] /* Get Start Tick*/ tickstart = HAL_GetTick(); 8005c3a: f7fe f80d bl 8003c58 8005c3e: 6138 str r0, [r7, #16] /* Wait till HSI is ready */ while(READ_BIT(RCC->CR, RCC_CR_HSIRDY) == 0U) 8005c40: e008 b.n 8005c54 { if((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE) 8005c42: f7fe f809 bl 8003c58 8005c46: 4602 mov r2, r0 8005c48: 693b ldr r3, [r7, #16] 8005c4a: 1ad3 subs r3, r2, r3 8005c4c: 2b02 cmp r3, #2 8005c4e: d901 bls.n 8005c54 { return HAL_TIMEOUT; 8005c50: 2303 movs r3, #3 8005c52: e21d b.n 8006090 while(READ_BIT(RCC->CR, RCC_CR_HSIRDY) == 0U) 8005c54: 4b65 ldr r3, [pc, #404] @ (8005dec ) 8005c56: 681b ldr r3, [r3, #0] 8005c58: f403 6380 and.w r3, r3, #1024 @ 0x400 8005c5c: 2b00 cmp r3, #0 8005c5e: d0f0 beq.n 8005c42 } } /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); 8005c60: 4b62 ldr r3, [pc, #392] @ (8005dec ) 8005c62: 685b ldr r3, [r3, #4] 8005c64: f023 52f8 bic.w r2, r3, #520093696 @ 0x1f000000 8005c68: 687b ldr r3, [r7, #4] 8005c6a: 691b ldr r3, [r3, #16] 8005c6c: 061b lsls r3, r3, #24 8005c6e: 495f ldr r1, [pc, #380] @ (8005dec ) 8005c70: 4313 orrs r3, r2 8005c72: 604b str r3, [r1, #4] 8005c74: e018 b.n 8005ca8 } else { /* Disable the Internal High Speed oscillator (HSI). */ __HAL_RCC_HSI_DISABLE(); 8005c76: 4b5d ldr r3, [pc, #372] @ (8005dec ) 8005c78: 681b ldr r3, [r3, #0] 8005c7a: 4a5c ldr r2, [pc, #368] @ (8005dec ) 8005c7c: f423 7380 bic.w r3, r3, #256 @ 0x100 8005c80: 6013 str r3, [r2, #0] /* Get Start Tick*/ tickstart = HAL_GetTick(); 8005c82: f7fd ffe9 bl 8003c58 8005c86: 6138 str r0, [r7, #16] /* Wait till HSI is disabled */ while(READ_BIT(RCC->CR, RCC_CR_HSIRDY) != 0U) 8005c88: e008 b.n 8005c9c { if((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE) 8005c8a: f7fd ffe5 bl 8003c58 8005c8e: 4602 mov r2, r0 8005c90: 693b ldr r3, [r7, #16] 8005c92: 1ad3 subs r3, r2, r3 8005c94: 2b02 cmp r3, #2 8005c96: d901 bls.n 8005c9c { return HAL_TIMEOUT; 8005c98: 2303 movs r3, #3 8005c9a: e1f9 b.n 8006090 while(READ_BIT(RCC->CR, RCC_CR_HSIRDY) != 0U) 8005c9c: 4b53 ldr r3, [pc, #332] @ (8005dec ) 8005c9e: 681b ldr r3, [r3, #0] 8005ca0: f403 6380 and.w r3, r3, #1024 @ 0x400 8005ca4: 2b00 cmp r3, #0 8005ca6: d1f0 bne.n 8005c8a } } } } /*------------------------------ LSI Configuration -------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI) 8005ca8: 687b ldr r3, [r7, #4] 8005caa: 681b ldr r3, [r3, #0] 8005cac: f003 0308 and.w r3, r3, #8 8005cb0: 2b00 cmp r3, #0 8005cb2: d03c beq.n 8005d2e { /* Check the parameters */ assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState)); /* Check the LSI State */ if(RCC_OscInitStruct->LSIState != RCC_LSI_OFF) 8005cb4: 687b ldr r3, [r7, #4] 8005cb6: 695b ldr r3, [r3, #20] 8005cb8: 2b00 cmp r3, #0 8005cba: d01c beq.n 8005cf6 MODIFY_REG(RCC->CSR, RCC_CSR_LSIPREDIV, RCC_OscInitStruct->LSIDiv); } #endif /* RCC_CSR_LSIPREDIV */ /* Enable the Internal Low Speed oscillator (LSI). */ __HAL_RCC_LSI_ENABLE(); 8005cbc: 4b4b ldr r3, [pc, #300] @ (8005dec ) 8005cbe: f8d3 3094 ldr.w r3, [r3, #148] @ 0x94 8005cc2: 4a4a ldr r2, [pc, #296] @ (8005dec ) 8005cc4: f043 0301 orr.w r3, r3, #1 8005cc8: f8c2 3094 str.w r3, [r2, #148] @ 0x94 /* Get Start Tick*/ tickstart = HAL_GetTick(); 8005ccc: f7fd ffc4 bl 8003c58 8005cd0: 6138 str r0, [r7, #16] /* Wait till LSI is ready */ while(READ_BIT(RCC->CSR, RCC_CSR_LSIRDY) == 0U) 8005cd2: e008 b.n 8005ce6 { if((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE) 8005cd4: f7fd ffc0 bl 8003c58 8005cd8: 4602 mov r2, r0 8005cda: 693b ldr r3, [r7, #16] 8005cdc: 1ad3 subs r3, r2, r3 8005cde: 2b02 cmp r3, #2 8005ce0: d901 bls.n 8005ce6 { return HAL_TIMEOUT; 8005ce2: 2303 movs r3, #3 8005ce4: e1d4 b.n 8006090 while(READ_BIT(RCC->CSR, RCC_CSR_LSIRDY) == 0U) 8005ce6: 4b41 ldr r3, [pc, #260] @ (8005dec ) 8005ce8: f8d3 3094 ldr.w r3, [r3, #148] @ 0x94 8005cec: f003 0302 and.w r3, r3, #2 8005cf0: 2b00 cmp r3, #0 8005cf2: d0ef beq.n 8005cd4 8005cf4: e01b b.n 8005d2e } } else { /* Disable the Internal Low Speed oscillator (LSI). */ __HAL_RCC_LSI_DISABLE(); 8005cf6: 4b3d ldr r3, [pc, #244] @ (8005dec ) 8005cf8: f8d3 3094 ldr.w r3, [r3, #148] @ 0x94 8005cfc: 4a3b ldr r2, [pc, #236] @ (8005dec ) 8005cfe: f023 0301 bic.w r3, r3, #1 8005d02: f8c2 3094 str.w r3, [r2, #148] @ 0x94 /* Get Start Tick*/ tickstart = HAL_GetTick(); 8005d06: f7fd ffa7 bl 8003c58 8005d0a: 6138 str r0, [r7, #16] /* Wait till LSI is disabled */ while(READ_BIT(RCC->CSR, RCC_CSR_LSIRDY) != 0U) 8005d0c: e008 b.n 8005d20 { if((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE) 8005d0e: f7fd ffa3 bl 8003c58 8005d12: 4602 mov r2, r0 8005d14: 693b ldr r3, [r7, #16] 8005d16: 1ad3 subs r3, r2, r3 8005d18: 2b02 cmp r3, #2 8005d1a: d901 bls.n 8005d20 { return HAL_TIMEOUT; 8005d1c: 2303 movs r3, #3 8005d1e: e1b7 b.n 8006090 while(READ_BIT(RCC->CSR, RCC_CSR_LSIRDY) != 0U) 8005d20: 4b32 ldr r3, [pc, #200] @ (8005dec ) 8005d22: f8d3 3094 ldr.w r3, [r3, #148] @ 0x94 8005d26: f003 0302 and.w r3, r3, #2 8005d2a: 2b00 cmp r3, #0 8005d2c: d1ef bne.n 8005d0e } } } } /*------------------------------ LSE Configuration -------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE) 8005d2e: 687b ldr r3, [r7, #4] 8005d30: 681b ldr r3, [r3, #0] 8005d32: f003 0304 and.w r3, r3, #4 8005d36: 2b00 cmp r3, #0 8005d38: f000 80a6 beq.w 8005e88 { FlagStatus pwrclkchanged = RESET; 8005d3c: 2300 movs r3, #0 8005d3e: 77fb strb r3, [r7, #31] /* Check the parameters */ assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState)); /* Update LSE configuration in Backup Domain control register */ /* Requires to enable write access to Backup Domain of necessary */ if(HAL_IS_BIT_CLR(RCC->APB1ENR1, RCC_APB1ENR1_PWREN)) 8005d40: 4b2a ldr r3, [pc, #168] @ (8005dec ) 8005d42: 6d9b ldr r3, [r3, #88] @ 0x58 8005d44: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 8005d48: 2b00 cmp r3, #0 8005d4a: d10d bne.n 8005d68 { __HAL_RCC_PWR_CLK_ENABLE(); 8005d4c: 4b27 ldr r3, [pc, #156] @ (8005dec ) 8005d4e: 6d9b ldr r3, [r3, #88] @ 0x58 8005d50: 4a26 ldr r2, [pc, #152] @ (8005dec ) 8005d52: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 8005d56: 6593 str r3, [r2, #88] @ 0x58 8005d58: 4b24 ldr r3, [pc, #144] @ (8005dec ) 8005d5a: 6d9b ldr r3, [r3, #88] @ 0x58 8005d5c: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 8005d60: 60bb str r3, [r7, #8] 8005d62: 68bb ldr r3, [r7, #8] pwrclkchanged = SET; 8005d64: 2301 movs r3, #1 8005d66: 77fb strb r3, [r7, #31] } if(HAL_IS_BIT_CLR(PWR->CR1, PWR_CR1_DBP)) 8005d68: 4b21 ldr r3, [pc, #132] @ (8005df0 ) 8005d6a: 681b ldr r3, [r3, #0] 8005d6c: f403 7380 and.w r3, r3, #256 @ 0x100 8005d70: 2b00 cmp r3, #0 8005d72: d118 bne.n 8005da6 { /* Enable write access to Backup domain */ SET_BIT(PWR->CR1, PWR_CR1_DBP); 8005d74: 4b1e ldr r3, [pc, #120] @ (8005df0 ) 8005d76: 681b ldr r3, [r3, #0] 8005d78: 4a1d ldr r2, [pc, #116] @ (8005df0 ) 8005d7a: f443 7380 orr.w r3, r3, #256 @ 0x100 8005d7e: 6013 str r3, [r2, #0] /* Wait for Backup domain Write protection disable */ tickstart = HAL_GetTick(); 8005d80: f7fd ff6a bl 8003c58 8005d84: 6138 str r0, [r7, #16] while(HAL_IS_BIT_CLR(PWR->CR1, PWR_CR1_DBP)) 8005d86: e008 b.n 8005d9a { if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) 8005d88: f7fd ff66 bl 8003c58 8005d8c: 4602 mov r2, r0 8005d8e: 693b ldr r3, [r7, #16] 8005d90: 1ad3 subs r3, r2, r3 8005d92: 2b02 cmp r3, #2 8005d94: d901 bls.n 8005d9a { return HAL_TIMEOUT; 8005d96: 2303 movs r3, #3 8005d98: e17a b.n 8006090 while(HAL_IS_BIT_CLR(PWR->CR1, PWR_CR1_DBP)) 8005d9a: 4b15 ldr r3, [pc, #84] @ (8005df0 ) 8005d9c: 681b ldr r3, [r3, #0] 8005d9e: f403 7380 and.w r3, r3, #256 @ 0x100 8005da2: 2b00 cmp r3, #0 8005da4: d0f0 beq.n 8005d88 { CLEAR_BIT(RCC->BDCR, RCC_BDCR_LSEON); CLEAR_BIT(RCC->BDCR, RCC_BDCR_LSEBYP); } #else __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); 8005da6: 687b ldr r3, [r7, #4] 8005da8: 689b ldr r3, [r3, #8] 8005daa: 2b01 cmp r3, #1 8005dac: d108 bne.n 8005dc0 8005dae: 4b0f ldr r3, [pc, #60] @ (8005dec ) 8005db0: f8d3 3090 ldr.w r3, [r3, #144] @ 0x90 8005db4: 4a0d ldr r2, [pc, #52] @ (8005dec ) 8005db6: f043 0301 orr.w r3, r3, #1 8005dba: f8c2 3090 str.w r3, [r2, #144] @ 0x90 8005dbe: e029 b.n 8005e14 8005dc0: 687b ldr r3, [r7, #4] 8005dc2: 689b ldr r3, [r3, #8] 8005dc4: 2b05 cmp r3, #5 8005dc6: d115 bne.n 8005df4 8005dc8: 4b08 ldr r3, [pc, #32] @ (8005dec ) 8005dca: f8d3 3090 ldr.w r3, [r3, #144] @ 0x90 8005dce: 4a07 ldr r2, [pc, #28] @ (8005dec ) 8005dd0: f043 0304 orr.w r3, r3, #4 8005dd4: f8c2 3090 str.w r3, [r2, #144] @ 0x90 8005dd8: 4b04 ldr r3, [pc, #16] @ (8005dec ) 8005dda: f8d3 3090 ldr.w r3, [r3, #144] @ 0x90 8005dde: 4a03 ldr r2, [pc, #12] @ (8005dec ) 8005de0: f043 0301 orr.w r3, r3, #1 8005de4: f8c2 3090 str.w r3, [r2, #144] @ 0x90 8005de8: e014 b.n 8005e14 8005dea: bf00 nop 8005dec: 40021000 .word 0x40021000 8005df0: 40007000 .word 0x40007000 8005df4: 4b9c ldr r3, [pc, #624] @ (8006068 ) 8005df6: f8d3 3090 ldr.w r3, [r3, #144] @ 0x90 8005dfa: 4a9b ldr r2, [pc, #620] @ (8006068 ) 8005dfc: f023 0301 bic.w r3, r3, #1 8005e00: f8c2 3090 str.w r3, [r2, #144] @ 0x90 8005e04: 4b98 ldr r3, [pc, #608] @ (8006068 ) 8005e06: f8d3 3090 ldr.w r3, [r3, #144] @ 0x90 8005e0a: 4a97 ldr r2, [pc, #604] @ (8006068 ) 8005e0c: f023 0304 bic.w r3, r3, #4 8005e10: f8c2 3090 str.w r3, [r2, #144] @ 0x90 #endif /* RCC_BDCR_LSESYSDIS */ /* Check the LSE State */ if(RCC_OscInitStruct->LSEState != RCC_LSE_OFF) 8005e14: 687b ldr r3, [r7, #4] 8005e16: 689b ldr r3, [r3, #8] 8005e18: 2b00 cmp r3, #0 8005e1a: d016 beq.n 8005e4a { /* Get Start Tick*/ tickstart = HAL_GetTick(); 8005e1c: f7fd ff1c bl 8003c58 8005e20: 6138 str r0, [r7, #16] /* Wait till LSE is ready */ while(READ_BIT(RCC->BDCR, RCC_BDCR_LSERDY) == 0U) 8005e22: e00a b.n 8005e3a { if((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) 8005e24: f7fd ff18 bl 8003c58 8005e28: 4602 mov r2, r0 8005e2a: 693b ldr r3, [r7, #16] 8005e2c: 1ad3 subs r3, r2, r3 8005e2e: f241 3288 movw r2, #5000 @ 0x1388 8005e32: 4293 cmp r3, r2 8005e34: d901 bls.n 8005e3a { return HAL_TIMEOUT; 8005e36: 2303 movs r3, #3 8005e38: e12a b.n 8006090 while(READ_BIT(RCC->BDCR, RCC_BDCR_LSERDY) == 0U) 8005e3a: 4b8b ldr r3, [pc, #556] @ (8006068 ) 8005e3c: f8d3 3090 ldr.w r3, [r3, #144] @ 0x90 8005e40: f003 0302 and.w r3, r3, #2 8005e44: 2b00 cmp r3, #0 8005e46: d0ed beq.n 8005e24 8005e48: e015 b.n 8005e76 } } else { /* Get Start Tick*/ tickstart = HAL_GetTick(); 8005e4a: f7fd ff05 bl 8003c58 8005e4e: 6138 str r0, [r7, #16] /* Wait till LSE is disabled */ while(READ_BIT(RCC->BDCR, RCC_BDCR_LSERDY) != 0U) 8005e50: e00a b.n 8005e68 { if((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) 8005e52: f7fd ff01 bl 8003c58 8005e56: 4602 mov r2, r0 8005e58: 693b ldr r3, [r7, #16] 8005e5a: 1ad3 subs r3, r2, r3 8005e5c: f241 3288 movw r2, #5000 @ 0x1388 8005e60: 4293 cmp r3, r2 8005e62: d901 bls.n 8005e68 { return HAL_TIMEOUT; 8005e64: 2303 movs r3, #3 8005e66: e113 b.n 8006090 while(READ_BIT(RCC->BDCR, RCC_BDCR_LSERDY) != 0U) 8005e68: 4b7f ldr r3, [pc, #508] @ (8006068 ) 8005e6a: f8d3 3090 ldr.w r3, [r3, #144] @ 0x90 8005e6e: f003 0302 and.w r3, r3, #2 8005e72: 2b00 cmp r3, #0 8005e74: d1ed bne.n 8005e52 CLEAR_BIT(RCC->BDCR, RCC_BDCR_LSESYSDIS); #endif /* RCC_BDCR_LSESYSDIS */ } /* Restore clock configuration if changed */ if(pwrclkchanged == SET) 8005e76: 7ffb ldrb r3, [r7, #31] 8005e78: 2b01 cmp r3, #1 8005e7a: d105 bne.n 8005e88 { __HAL_RCC_PWR_CLK_DISABLE(); 8005e7c: 4b7a ldr r3, [pc, #488] @ (8006068 ) 8005e7e: 6d9b ldr r3, [r3, #88] @ 0x58 8005e80: 4a79 ldr r2, [pc, #484] @ (8006068 ) 8005e82: f023 5380 bic.w r3, r3, #268435456 @ 0x10000000 8005e86: 6593 str r3, [r2, #88] @ 0x58 #endif /* RCC_HSI48_SUPPORT */ /*-------------------------------- PLL Configuration -----------------------*/ /* Check the parameters */ assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState)); if(RCC_OscInitStruct->PLL.PLLState != RCC_PLL_NONE) 8005e88: 687b ldr r3, [r7, #4] 8005e8a: 6a9b ldr r3, [r3, #40] @ 0x28 8005e8c: 2b00 cmp r3, #0 8005e8e: f000 80fe beq.w 800608e { /* PLL On ? */ if(RCC_OscInitStruct->PLL.PLLState == RCC_PLL_ON) 8005e92: 687b ldr r3, [r7, #4] 8005e94: 6a9b ldr r3, [r3, #40] @ 0x28 8005e96: 2b02 cmp r3, #2 8005e98: f040 80d0 bne.w 800603c #endif /* RCC_PLLP_SUPPORT */ assert_param(IS_RCC_PLLQ_VALUE(RCC_OscInitStruct->PLL.PLLQ)); assert_param(IS_RCC_PLLR_VALUE(RCC_OscInitStruct->PLL.PLLR)); /* Do nothing if PLL configuration is the unchanged */ pll_config = RCC->PLLCFGR; 8005e9c: 4b72 ldr r3, [pc, #456] @ (8006068 ) 8005e9e: 68db ldr r3, [r3, #12] 8005ea0: 617b str r3, [r7, #20] if((READ_BIT(pll_config, RCC_PLLCFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || 8005ea2: 697b ldr r3, [r7, #20] 8005ea4: f003 0203 and.w r2, r3, #3 8005ea8: 687b ldr r3, [r7, #4] 8005eaa: 6adb ldr r3, [r3, #44] @ 0x2c 8005eac: 429a cmp r2, r3 8005eae: d130 bne.n 8005f12 (READ_BIT(pll_config, RCC_PLLCFGR_PLLM) != ((RCC_OscInitStruct->PLL.PLLM - 1U) << RCC_PLLCFGR_PLLM_Pos)) || 8005eb0: 697b ldr r3, [r7, #20] 8005eb2: f003 0270 and.w r2, r3, #112 @ 0x70 8005eb6: 687b ldr r3, [r7, #4] 8005eb8: 6b1b ldr r3, [r3, #48] @ 0x30 8005eba: 3b01 subs r3, #1 8005ebc: 011b lsls r3, r3, #4 if((READ_BIT(pll_config, RCC_PLLCFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || 8005ebe: 429a cmp r2, r3 8005ec0: d127 bne.n 8005f12 (READ_BIT(pll_config, RCC_PLLCFGR_PLLN) != (RCC_OscInitStruct->PLL.PLLN << RCC_PLLCFGR_PLLN_Pos)) || 8005ec2: 697b ldr r3, [r7, #20] 8005ec4: f403 42fe and.w r2, r3, #32512 @ 0x7f00 8005ec8: 687b ldr r3, [r7, #4] 8005eca: 6b5b ldr r3, [r3, #52] @ 0x34 8005ecc: 021b lsls r3, r3, #8 (READ_BIT(pll_config, RCC_PLLCFGR_PLLM) != ((RCC_OscInitStruct->PLL.PLLM - 1U) << RCC_PLLCFGR_PLLM_Pos)) || 8005ece: 429a cmp r2, r3 8005ed0: d11f bne.n 8005f12 #if defined(RCC_PLLP_SUPPORT) #if defined(RCC_PLLP_DIV_2_31_SUPPORT) (READ_BIT(pll_config, RCC_PLLCFGR_PLLPDIV) != (RCC_OscInitStruct->PLL.PLLP << RCC_PLLCFGR_PLLPDIV_Pos)) || #else (READ_BIT(pll_config, RCC_PLLCFGR_PLLP) != ((RCC_OscInitStruct->PLL.PLLP == RCC_PLLP_DIV7) ? 0U : 1U)) || 8005ed2: 697b ldr r3, [r7, #20] 8005ed4: f403 3300 and.w r3, r3, #131072 @ 0x20000 8005ed8: 687a ldr r2, [r7, #4] 8005eda: 6b92 ldr r2, [r2, #56] @ 0x38 8005edc: 2a07 cmp r2, #7 8005ede: bf14 ite ne 8005ee0: 2201 movne r2, #1 8005ee2: 2200 moveq r2, #0 8005ee4: b2d2 uxtb r2, r2 (READ_BIT(pll_config, RCC_PLLCFGR_PLLN) != (RCC_OscInitStruct->PLL.PLLN << RCC_PLLCFGR_PLLN_Pos)) || 8005ee6: 4293 cmp r3, r2 8005ee8: d113 bne.n 8005f12 #endif #endif (READ_BIT(pll_config, RCC_PLLCFGR_PLLQ) != ((((RCC_OscInitStruct->PLL.PLLQ) >> 1U) - 1U) << RCC_PLLCFGR_PLLQ_Pos)) || 8005eea: 697b ldr r3, [r7, #20] 8005eec: f403 02c0 and.w r2, r3, #6291456 @ 0x600000 8005ef0: 687b ldr r3, [r7, #4] 8005ef2: 6bdb ldr r3, [r3, #60] @ 0x3c 8005ef4: 085b lsrs r3, r3, #1 8005ef6: 3b01 subs r3, #1 8005ef8: 055b lsls r3, r3, #21 (READ_BIT(pll_config, RCC_PLLCFGR_PLLP) != ((RCC_OscInitStruct->PLL.PLLP == RCC_PLLP_DIV7) ? 0U : 1U)) || 8005efa: 429a cmp r2, r3 8005efc: d109 bne.n 8005f12 (READ_BIT(pll_config, RCC_PLLCFGR_PLLR) != ((((RCC_OscInitStruct->PLL.PLLR) >> 1U) - 1U) << RCC_PLLCFGR_PLLR_Pos))) 8005efe: 697b ldr r3, [r7, #20] 8005f00: f003 62c0 and.w r2, r3, #100663296 @ 0x6000000 8005f04: 687b ldr r3, [r7, #4] 8005f06: 6c1b ldr r3, [r3, #64] @ 0x40 8005f08: 085b lsrs r3, r3, #1 8005f0a: 3b01 subs r3, #1 8005f0c: 065b lsls r3, r3, #25 (READ_BIT(pll_config, RCC_PLLCFGR_PLLQ) != ((((RCC_OscInitStruct->PLL.PLLQ) >> 1U) - 1U) << RCC_PLLCFGR_PLLQ_Pos)) || 8005f0e: 429a cmp r2, r3 8005f10: d06e beq.n 8005ff0 { /* Check if the PLL is used as system clock or not */ if(sysclk_source != RCC_CFGR_SWS_PLL) 8005f12: 69bb ldr r3, [r7, #24] 8005f14: 2b0c cmp r3, #12 8005f16: d069 beq.n 8005fec { #if defined(RCC_PLLSAI1_SUPPORT) || defined(RCC_PLLSAI2_SUPPORT) /* Check if main PLL can be updated */ /* Not possible if the source is shared by other enabled PLLSAIx */ if((READ_BIT(RCC->CR, RCC_CR_PLLSAI1ON) != 0U) 8005f18: 4b53 ldr r3, [pc, #332] @ (8006068 ) 8005f1a: 681b ldr r3, [r3, #0] 8005f1c: f003 6380 and.w r3, r3, #67108864 @ 0x4000000 8005f20: 2b00 cmp r3, #0 8005f22: d105 bne.n 8005f30 #if defined(RCC_PLLSAI2_SUPPORT) || (READ_BIT(RCC->CR, RCC_CR_PLLSAI2ON) != 0U) 8005f24: 4b50 ldr r3, [pc, #320] @ (8006068 ) 8005f26: 681b ldr r3, [r3, #0] 8005f28: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 8005f2c: 2b00 cmp r3, #0 8005f2e: d001 beq.n 8005f34 #endif ) { return HAL_ERROR; 8005f30: 2301 movs r3, #1 8005f32: e0ad b.n 8006090 } else #endif /* RCC_PLLSAI1_SUPPORT || RCC_PLLSAI2_SUPPORT */ { /* Disable the main PLL. */ __HAL_RCC_PLL_DISABLE(); 8005f34: 4b4c ldr r3, [pc, #304] @ (8006068 ) 8005f36: 681b ldr r3, [r3, #0] 8005f38: 4a4b ldr r2, [pc, #300] @ (8006068 ) 8005f3a: f023 7380 bic.w r3, r3, #16777216 @ 0x1000000 8005f3e: 6013 str r3, [r2, #0] /* Get Start Tick*/ tickstart = HAL_GetTick(); 8005f40: f7fd fe8a bl 8003c58 8005f44: 6138 str r0, [r7, #16] /* Wait till PLL is ready */ while(READ_BIT(RCC->CR, RCC_CR_PLLRDY) != 0U) 8005f46: e008 b.n 8005f5a { if((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) 8005f48: f7fd fe86 bl 8003c58 8005f4c: 4602 mov r2, r0 8005f4e: 693b ldr r3, [r7, #16] 8005f50: 1ad3 subs r3, r2, r3 8005f52: 2b02 cmp r3, #2 8005f54: d901 bls.n 8005f5a { return HAL_TIMEOUT; 8005f56: 2303 movs r3, #3 8005f58: e09a b.n 8006090 while(READ_BIT(RCC->CR, RCC_CR_PLLRDY) != 0U) 8005f5a: 4b43 ldr r3, [pc, #268] @ (8006068 ) 8005f5c: 681b ldr r3, [r3, #0] 8005f5e: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 8005f62: 2b00 cmp r3, #0 8005f64: d1f0 bne.n 8005f48 } } /* Configure the main PLL clock source, multiplication and division factors. */ #if defined(RCC_PLLP_SUPPORT) __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource, 8005f66: 4b40 ldr r3, [pc, #256] @ (8006068 ) 8005f68: 68da ldr r2, [r3, #12] 8005f6a: 4b40 ldr r3, [pc, #256] @ (800606c ) 8005f6c: 4013 ands r3, r2 8005f6e: 687a ldr r2, [r7, #4] 8005f70: 6ad1 ldr r1, [r2, #44] @ 0x2c 8005f72: 687a ldr r2, [r7, #4] 8005f74: 6b12 ldr r2, [r2, #48] @ 0x30 8005f76: 3a01 subs r2, #1 8005f78: 0112 lsls r2, r2, #4 8005f7a: 4311 orrs r1, r2 8005f7c: 687a ldr r2, [r7, #4] 8005f7e: 6b52 ldr r2, [r2, #52] @ 0x34 8005f80: 0212 lsls r2, r2, #8 8005f82: 4311 orrs r1, r2 8005f84: 687a ldr r2, [r7, #4] 8005f86: 6bd2 ldr r2, [r2, #60] @ 0x3c 8005f88: 0852 lsrs r2, r2, #1 8005f8a: 3a01 subs r2, #1 8005f8c: 0552 lsls r2, r2, #21 8005f8e: 4311 orrs r1, r2 8005f90: 687a ldr r2, [r7, #4] 8005f92: 6c12 ldr r2, [r2, #64] @ 0x40 8005f94: 0852 lsrs r2, r2, #1 8005f96: 3a01 subs r2, #1 8005f98: 0652 lsls r2, r2, #25 8005f9a: 4311 orrs r1, r2 8005f9c: 687a ldr r2, [r7, #4] 8005f9e: 6b92 ldr r2, [r2, #56] @ 0x38 8005fa0: 0912 lsrs r2, r2, #4 8005fa2: 0452 lsls r2, r2, #17 8005fa4: 430a orrs r2, r1 8005fa6: 4930 ldr r1, [pc, #192] @ (8006068 ) 8005fa8: 4313 orrs r3, r2 8005faa: 60cb str r3, [r1, #12] RCC_OscInitStruct->PLL.PLLQ, RCC_OscInitStruct->PLL.PLLR); #endif /* Enable the main PLL. */ __HAL_RCC_PLL_ENABLE(); 8005fac: 4b2e ldr r3, [pc, #184] @ (8006068 ) 8005fae: 681b ldr r3, [r3, #0] 8005fb0: 4a2d ldr r2, [pc, #180] @ (8006068 ) 8005fb2: f043 7380 orr.w r3, r3, #16777216 @ 0x1000000 8005fb6: 6013 str r3, [r2, #0] /* Enable PLL System Clock output. */ __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL_SYSCLK); 8005fb8: 4b2b ldr r3, [pc, #172] @ (8006068 ) 8005fba: 68db ldr r3, [r3, #12] 8005fbc: 4a2a ldr r2, [pc, #168] @ (8006068 ) 8005fbe: f043 7380 orr.w r3, r3, #16777216 @ 0x1000000 8005fc2: 60d3 str r3, [r2, #12] /* Get Start Tick*/ tickstart = HAL_GetTick(); 8005fc4: f7fd fe48 bl 8003c58 8005fc8: 6138 str r0, [r7, #16] /* Wait till PLL is ready */ while(READ_BIT(RCC->CR, RCC_CR_PLLRDY) == 0U) 8005fca: e008 b.n 8005fde { if((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) 8005fcc: f7fd fe44 bl 8003c58 8005fd0: 4602 mov r2, r0 8005fd2: 693b ldr r3, [r7, #16] 8005fd4: 1ad3 subs r3, r2, r3 8005fd6: 2b02 cmp r3, #2 8005fd8: d901 bls.n 8005fde { return HAL_TIMEOUT; 8005fda: 2303 movs r3, #3 8005fdc: e058 b.n 8006090 while(READ_BIT(RCC->CR, RCC_CR_PLLRDY) == 0U) 8005fde: 4b22 ldr r3, [pc, #136] @ (8006068 ) 8005fe0: 681b ldr r3, [r3, #0] 8005fe2: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 8005fe6: 2b00 cmp r3, #0 8005fe8: d0f0 beq.n 8005fcc if(sysclk_source != RCC_CFGR_SWS_PLL) 8005fea: e050 b.n 800608e } } else { /* PLL is already used as System core clock */ return HAL_ERROR; 8005fec: 2301 movs r3, #1 8005fee: e04f b.n 8006090 } else { /* PLL configuration is unchanged */ /* Re-enable PLL if it was disabled (ie. low power mode) */ if(READ_BIT(RCC->CR, RCC_CR_PLLRDY) == 0U) 8005ff0: 4b1d ldr r3, [pc, #116] @ (8006068 ) 8005ff2: 681b ldr r3, [r3, #0] 8005ff4: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 8005ff8: 2b00 cmp r3, #0 8005ffa: d148 bne.n 800608e { /* Enable the main PLL. */ __HAL_RCC_PLL_ENABLE(); 8005ffc: 4b1a ldr r3, [pc, #104] @ (8006068 ) 8005ffe: 681b ldr r3, [r3, #0] 8006000: 4a19 ldr r2, [pc, #100] @ (8006068 ) 8006002: f043 7380 orr.w r3, r3, #16777216 @ 0x1000000 8006006: 6013 str r3, [r2, #0] /* Enable PLL System Clock output. */ __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL_SYSCLK); 8006008: 4b17 ldr r3, [pc, #92] @ (8006068 ) 800600a: 68db ldr r3, [r3, #12] 800600c: 4a16 ldr r2, [pc, #88] @ (8006068 ) 800600e: f043 7380 orr.w r3, r3, #16777216 @ 0x1000000 8006012: 60d3 str r3, [r2, #12] /* Get Start Tick*/ tickstart = HAL_GetTick(); 8006014: f7fd fe20 bl 8003c58 8006018: 6138 str r0, [r7, #16] /* Wait till PLL is ready */ while(READ_BIT(RCC->CR, RCC_CR_PLLRDY) == 0U) 800601a: e008 b.n 800602e { if((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) 800601c: f7fd fe1c bl 8003c58 8006020: 4602 mov r2, r0 8006022: 693b ldr r3, [r7, #16] 8006024: 1ad3 subs r3, r2, r3 8006026: 2b02 cmp r3, #2 8006028: d901 bls.n 800602e { return HAL_TIMEOUT; 800602a: 2303 movs r3, #3 800602c: e030 b.n 8006090 while(READ_BIT(RCC->CR, RCC_CR_PLLRDY) == 0U) 800602e: 4b0e ldr r3, [pc, #56] @ (8006068 ) 8006030: 681b ldr r3, [r3, #0] 8006032: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 8006036: 2b00 cmp r3, #0 8006038: d0f0 beq.n 800601c 800603a: e028 b.n 800608e } } else { /* Check that PLL is not used as system clock or not */ if(sysclk_source != RCC_CFGR_SWS_PLL) 800603c: 69bb ldr r3, [r7, #24] 800603e: 2b0c cmp r3, #12 8006040: d023 beq.n 800608a { /* Disable the main PLL. */ __HAL_RCC_PLL_DISABLE(); 8006042: 4b09 ldr r3, [pc, #36] @ (8006068 ) 8006044: 681b ldr r3, [r3, #0] 8006046: 4a08 ldr r2, [pc, #32] @ (8006068 ) 8006048: f023 7380 bic.w r3, r3, #16777216 @ 0x1000000 800604c: 6013 str r3, [r2, #0] /* Get Start Tick*/ tickstart = HAL_GetTick(); 800604e: f7fd fe03 bl 8003c58 8006052: 6138 str r0, [r7, #16] /* Wait till PLL is disabled */ while(READ_BIT(RCC->CR, RCC_CR_PLLRDY) != 0U) 8006054: e00c b.n 8006070 { if((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) 8006056: f7fd fdff bl 8003c58 800605a: 4602 mov r2, r0 800605c: 693b ldr r3, [r7, #16] 800605e: 1ad3 subs r3, r2, r3 8006060: 2b02 cmp r3, #2 8006062: d905 bls.n 8006070 { return HAL_TIMEOUT; 8006064: 2303 movs r3, #3 8006066: e013 b.n 8006090 8006068: 40021000 .word 0x40021000 800606c: f99d808c .word 0xf99d808c while(READ_BIT(RCC->CR, RCC_CR_PLLRDY) != 0U) 8006070: 4b09 ldr r3, [pc, #36] @ (8006098 ) 8006072: 681b ldr r3, [r3, #0] 8006074: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 8006078: 2b00 cmp r3, #0 800607a: d1ec bne.n 8006056 } } /* Unselect main PLL clock source and disable main PLL outputs to save power */ #if defined(RCC_PLLSAI2_SUPPORT) RCC->PLLCFGR &= ~(RCC_PLLCFGR_PLLSRC | RCC_PLL_SYSCLK | RCC_PLL_48M1CLK | RCC_PLL_SAI3CLK); 800607c: 4b06 ldr r3, [pc, #24] @ (8006098 ) 800607e: 68da ldr r2, [r3, #12] 8006080: 4905 ldr r1, [pc, #20] @ (8006098 ) 8006082: 4b06 ldr r3, [pc, #24] @ (800609c ) 8006084: 4013 ands r3, r2 8006086: 60cb str r3, [r1, #12] 8006088: e001 b.n 800608e #endif /* RCC_PLLSAI2_SUPPORT */ } else { /* PLL is already used as System core clock */ return HAL_ERROR; 800608a: 2301 movs r3, #1 800608c: e000 b.n 8006090 } } } return HAL_OK; 800608e: 2300 movs r3, #0 } 8006090: 4618 mov r0, r3 8006092: 3720 adds r7, #32 8006094: 46bd mov sp, r7 8006096: bd80 pop {r7, pc} 8006098: 40021000 .word 0x40021000 800609c: feeefffc .word 0xfeeefffc 080060a0 : * HPRE[3:0] bits to ensure that HCLK not exceed the maximum allowed frequency * (for more details refer to section above "Initialization/de-initialization functions") * @retval None */ HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency) { 80060a0: b580 push {r7, lr} 80060a2: b084 sub sp, #16 80060a4: af00 add r7, sp, #0 80060a6: 6078 str r0, [r7, #4] 80060a8: 6039 str r1, [r7, #0] uint32_t hpre = RCC_SYSCLK_DIV1; #endif HAL_StatusTypeDef status; /* Check Null pointer */ if(RCC_ClkInitStruct == NULL) 80060aa: 687b ldr r3, [r7, #4] 80060ac: 2b00 cmp r3, #0 80060ae: d101 bne.n 80060b4 { return HAL_ERROR; 80060b0: 2301 movs r3, #1 80060b2: e0e7 b.n 8006284 /* To correctly read data from FLASH memory, the number of wait states (LATENCY) must be correctly programmed according to the frequency of the CPU clock (HCLK) and the supply voltage of the device. */ /* Increasing the number of wait states because of higher CPU frequency */ if(FLatency > __HAL_FLASH_GET_LATENCY()) 80060b4: 4b75 ldr r3, [pc, #468] @ (800628c ) 80060b6: 681b ldr r3, [r3, #0] 80060b8: f003 0307 and.w r3, r3, #7 80060bc: 683a ldr r2, [r7, #0] 80060be: 429a cmp r2, r3 80060c0: d910 bls.n 80060e4 { /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ __HAL_FLASH_SET_LATENCY(FLatency); 80060c2: 4b72 ldr r3, [pc, #456] @ (800628c ) 80060c4: 681b ldr r3, [r3, #0] 80060c6: f023 0207 bic.w r2, r3, #7 80060ca: 4970 ldr r1, [pc, #448] @ (800628c ) 80060cc: 683b ldr r3, [r7, #0] 80060ce: 4313 orrs r3, r2 80060d0: 600b str r3, [r1, #0] /* Check that the new number of wait states is taken into account to access the Flash memory by reading the FLASH_ACR register */ if(__HAL_FLASH_GET_LATENCY() != FLatency) 80060d2: 4b6e ldr r3, [pc, #440] @ (800628c ) 80060d4: 681b ldr r3, [r3, #0] 80060d6: f003 0307 and.w r3, r3, #7 80060da: 683a ldr r2, [r7, #0] 80060dc: 429a cmp r2, r3 80060de: d001 beq.n 80060e4 { return HAL_ERROR; 80060e0: 2301 movs r3, #1 80060e2: e0cf b.n 8006284 } } /*----------------- HCLK Configuration prior to SYSCLK----------------------*/ /* Apply higher HCLK prescaler request here to ensure CPU clock is not of of spec when SYSCLK is increased */ if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK) 80060e4: 687b ldr r3, [r7, #4] 80060e6: 681b ldr r3, [r3, #0] 80060e8: f003 0302 and.w r3, r3, #2 80060ec: 2b00 cmp r3, #0 80060ee: d010 beq.n 8006112 { assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider)); if(RCC_ClkInitStruct->AHBCLKDivider > READ_BIT(RCC->CFGR, RCC_CFGR_HPRE)) 80060f0: 687b ldr r3, [r7, #4] 80060f2: 689a ldr r2, [r3, #8] 80060f4: 4b66 ldr r3, [pc, #408] @ (8006290 ) 80060f6: 689b ldr r3, [r3, #8] 80060f8: f003 03f0 and.w r3, r3, #240 @ 0xf0 80060fc: 429a cmp r2, r3 80060fe: d908 bls.n 8006112 { MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider); 8006100: 4b63 ldr r3, [pc, #396] @ (8006290 ) 8006102: 689b ldr r3, [r3, #8] 8006104: f023 02f0 bic.w r2, r3, #240 @ 0xf0 8006108: 687b ldr r3, [r7, #4] 800610a: 689b ldr r3, [r3, #8] 800610c: 4960 ldr r1, [pc, #384] @ (8006290 ) 800610e: 4313 orrs r3, r2 8006110: 608b str r3, [r1, #8] } } /*------------------------- SYSCLK Configuration ---------------------------*/ if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK) 8006112: 687b ldr r3, [r7, #4] 8006114: 681b ldr r3, [r3, #0] 8006116: f003 0301 and.w r3, r3, #1 800611a: 2b00 cmp r3, #0 800611c: d04c beq.n 80061b8 { assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource)); /* PLL is selected as System Clock Source */ if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) 800611e: 687b ldr r3, [r7, #4] 8006120: 685b ldr r3, [r3, #4] 8006122: 2b03 cmp r3, #3 8006124: d107 bne.n 8006136 { /* Check the PLL ready flag */ if(READ_BIT(RCC->CR, RCC_CR_PLLRDY) == 0U) 8006126: 4b5a ldr r3, [pc, #360] @ (8006290 ) 8006128: 681b ldr r3, [r3, #0] 800612a: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 800612e: 2b00 cmp r3, #0 8006130: d121 bne.n 8006176 { return HAL_ERROR; 8006132: 2301 movs r3, #1 8006134: e0a6 b.n 8006284 #endif } else { /* HSE is selected as System Clock Source */ if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) 8006136: 687b ldr r3, [r7, #4] 8006138: 685b ldr r3, [r3, #4] 800613a: 2b02 cmp r3, #2 800613c: d107 bne.n 800614e { /* Check the HSE ready flag */ if(READ_BIT(RCC->CR, RCC_CR_HSERDY) == 0U) 800613e: 4b54 ldr r3, [pc, #336] @ (8006290 ) 8006140: 681b ldr r3, [r3, #0] 8006142: f403 3300 and.w r3, r3, #131072 @ 0x20000 8006146: 2b00 cmp r3, #0 8006148: d115 bne.n 8006176 { return HAL_ERROR; 800614a: 2301 movs r3, #1 800614c: e09a b.n 8006284 } } /* MSI is selected as System Clock Source */ else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_MSI) 800614e: 687b ldr r3, [r7, #4] 8006150: 685b ldr r3, [r3, #4] 8006152: 2b00 cmp r3, #0 8006154: d107 bne.n 8006166 { /* Check the MSI ready flag */ if(READ_BIT(RCC->CR, RCC_CR_MSIRDY) == 0U) 8006156: 4b4e ldr r3, [pc, #312] @ (8006290 ) 8006158: 681b ldr r3, [r3, #0] 800615a: f003 0302 and.w r3, r3, #2 800615e: 2b00 cmp r3, #0 8006160: d109 bne.n 8006176 { return HAL_ERROR; 8006162: 2301 movs r3, #1 8006164: e08e b.n 8006284 } /* HSI is selected as System Clock Source */ else { /* Check the HSI ready flag */ if(READ_BIT(RCC->CR, RCC_CR_HSIRDY) == 0U) 8006166: 4b4a ldr r3, [pc, #296] @ (8006290 ) 8006168: 681b ldr r3, [r3, #0] 800616a: f403 6380 and.w r3, r3, #1024 @ 0x400 800616e: 2b00 cmp r3, #0 8006170: d101 bne.n 8006176 { return HAL_ERROR; 8006172: 2301 movs r3, #1 8006174: e086 b.n 8006284 } #endif } MODIFY_REG(RCC->CFGR, RCC_CFGR_SW, RCC_ClkInitStruct->SYSCLKSource); 8006176: 4b46 ldr r3, [pc, #280] @ (8006290 ) 8006178: 689b ldr r3, [r3, #8] 800617a: f023 0203 bic.w r2, r3, #3 800617e: 687b ldr r3, [r7, #4] 8006180: 685b ldr r3, [r3, #4] 8006182: 4943 ldr r1, [pc, #268] @ (8006290 ) 8006184: 4313 orrs r3, r2 8006186: 608b str r3, [r1, #8] /* Get Start Tick*/ tickstart = HAL_GetTick(); 8006188: f7fd fd66 bl 8003c58 800618c: 60f8 str r0, [r7, #12] while(__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos)) 800618e: e00a b.n 80061a6 { if((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE) 8006190: f7fd fd62 bl 8003c58 8006194: 4602 mov r2, r0 8006196: 68fb ldr r3, [r7, #12] 8006198: 1ad3 subs r3, r2, r3 800619a: f241 3288 movw r2, #5000 @ 0x1388 800619e: 4293 cmp r3, r2 80061a0: d901 bls.n 80061a6 { return HAL_TIMEOUT; 80061a2: 2303 movs r3, #3 80061a4: e06e b.n 8006284 while(__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos)) 80061a6: 4b3a ldr r3, [pc, #232] @ (8006290 ) 80061a8: 689b ldr r3, [r3, #8] 80061aa: f003 020c and.w r2, r3, #12 80061ae: 687b ldr r3, [r7, #4] 80061b0: 685b ldr r3, [r3, #4] 80061b2: 009b lsls r3, r3, #2 80061b4: 429a cmp r2, r3 80061b6: d1eb bne.n 8006190 } #endif /*----------------- HCLK Configuration after SYSCLK-------------------------*/ /* Apply lower HCLK prescaler request here to ensure CPU clock is not of of spec when SYSCLK is set */ if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK) 80061b8: 687b ldr r3, [r7, #4] 80061ba: 681b ldr r3, [r3, #0] 80061bc: f003 0302 and.w r3, r3, #2 80061c0: 2b00 cmp r3, #0 80061c2: d010 beq.n 80061e6 { if(RCC_ClkInitStruct->AHBCLKDivider < READ_BIT(RCC->CFGR, RCC_CFGR_HPRE)) 80061c4: 687b ldr r3, [r7, #4] 80061c6: 689a ldr r2, [r3, #8] 80061c8: 4b31 ldr r3, [pc, #196] @ (8006290 ) 80061ca: 689b ldr r3, [r3, #8] 80061cc: f003 03f0 and.w r3, r3, #240 @ 0xf0 80061d0: 429a cmp r2, r3 80061d2: d208 bcs.n 80061e6 { MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider); 80061d4: 4b2e ldr r3, [pc, #184] @ (8006290 ) 80061d6: 689b ldr r3, [r3, #8] 80061d8: f023 02f0 bic.w r2, r3, #240 @ 0xf0 80061dc: 687b ldr r3, [r7, #4] 80061de: 689b ldr r3, [r3, #8] 80061e0: 492b ldr r1, [pc, #172] @ (8006290 ) 80061e2: 4313 orrs r3, r2 80061e4: 608b str r3, [r1, #8] } } /* Allow decreasing of the number of wait states (because of lower CPU frequency expected) */ if(FLatency < __HAL_FLASH_GET_LATENCY()) 80061e6: 4b29 ldr r3, [pc, #164] @ (800628c ) 80061e8: 681b ldr r3, [r3, #0] 80061ea: f003 0307 and.w r3, r3, #7 80061ee: 683a ldr r2, [r7, #0] 80061f0: 429a cmp r2, r3 80061f2: d210 bcs.n 8006216 { /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ __HAL_FLASH_SET_LATENCY(FLatency); 80061f4: 4b25 ldr r3, [pc, #148] @ (800628c ) 80061f6: 681b ldr r3, [r3, #0] 80061f8: f023 0207 bic.w r2, r3, #7 80061fc: 4923 ldr r1, [pc, #140] @ (800628c ) 80061fe: 683b ldr r3, [r7, #0] 8006200: 4313 orrs r3, r2 8006202: 600b str r3, [r1, #0] /* Check that the new number of wait states is taken into account to access the Flash memory by reading the FLASH_ACR register */ if(__HAL_FLASH_GET_LATENCY() != FLatency) 8006204: 4b21 ldr r3, [pc, #132] @ (800628c ) 8006206: 681b ldr r3, [r3, #0] 8006208: f003 0307 and.w r3, r3, #7 800620c: 683a ldr r2, [r7, #0] 800620e: 429a cmp r2, r3 8006210: d001 beq.n 8006216 { return HAL_ERROR; 8006212: 2301 movs r3, #1 8006214: e036 b.n 8006284 } } /*-------------------------- PCLK1 Configuration ---------------------------*/ if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) 8006216: 687b ldr r3, [r7, #4] 8006218: 681b ldr r3, [r3, #0] 800621a: f003 0304 and.w r3, r3, #4 800621e: 2b00 cmp r3, #0 8006220: d008 beq.n 8006234 { assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider)); MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider); 8006222: 4b1b ldr r3, [pc, #108] @ (8006290 ) 8006224: 689b ldr r3, [r3, #8] 8006226: f423 62e0 bic.w r2, r3, #1792 @ 0x700 800622a: 687b ldr r3, [r7, #4] 800622c: 68db ldr r3, [r3, #12] 800622e: 4918 ldr r1, [pc, #96] @ (8006290 ) 8006230: 4313 orrs r3, r2 8006232: 608b str r3, [r1, #8] } /*-------------------------- PCLK2 Configuration ---------------------------*/ if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) 8006234: 687b ldr r3, [r7, #4] 8006236: 681b ldr r3, [r3, #0] 8006238: f003 0308 and.w r3, r3, #8 800623c: 2b00 cmp r3, #0 800623e: d009 beq.n 8006254 { assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider)); MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3U)); 8006240: 4b13 ldr r3, [pc, #76] @ (8006290 ) 8006242: 689b ldr r3, [r3, #8] 8006244: f423 5260 bic.w r2, r3, #14336 @ 0x3800 8006248: 687b ldr r3, [r7, #4] 800624a: 691b ldr r3, [r3, #16] 800624c: 00db lsls r3, r3, #3 800624e: 4910 ldr r1, [pc, #64] @ (8006290 ) 8006250: 4313 orrs r3, r2 8006252: 608b str r3, [r1, #8] } /* Update the SystemCoreClock global variable */ SystemCoreClock = HAL_RCC_GetSysClockFreq() >> (AHBPrescTable[READ_BIT(RCC->CFGR, RCC_CFGR_HPRE) >> RCC_CFGR_HPRE_Pos] & 0x1FU); 8006254: f000 f824 bl 80062a0 8006258: 4602 mov r2, r0 800625a: 4b0d ldr r3, [pc, #52] @ (8006290 ) 800625c: 689b ldr r3, [r3, #8] 800625e: 091b lsrs r3, r3, #4 8006260: f003 030f and.w r3, r3, #15 8006264: 490b ldr r1, [pc, #44] @ (8006294 ) 8006266: 5ccb ldrb r3, [r1, r3] 8006268: f003 031f and.w r3, r3, #31 800626c: fa22 f303 lsr.w r3, r2, r3 8006270: 4a09 ldr r2, [pc, #36] @ (8006298 ) 8006272: 6013 str r3, [r2, #0] /* Configure the source of time base considering new system clocks settings*/ status = HAL_InitTick(uwTickPrio); 8006274: 4b09 ldr r3, [pc, #36] @ (800629c ) 8006276: 681b ldr r3, [r3, #0] 8006278: 4618 mov r0, r3 800627a: f7fd faf9 bl 8003870 800627e: 4603 mov r3, r0 8006280: 72fb strb r3, [r7, #11] return status; 8006282: 7afb ldrb r3, [r7, #11] } 8006284: 4618 mov r0, r3 8006286: 3710 adds r7, #16 8006288: 46bd mov sp, r7 800628a: bd80 pop {r7, pc} 800628c: 40022000 .word 0x40022000 8006290: 40021000 .word 0x40021000 8006294: 08014ebc .word 0x08014ebc 8006298: 200000c4 .word 0x200000c4 800629c: 200000c8 .word 0x200000c8 080062a0 : * * * @retval SYSCLK frequency */ uint32_t HAL_RCC_GetSysClockFreq(void) { 80062a0: b480 push {r7} 80062a2: b089 sub sp, #36 @ 0x24 80062a4: af00 add r7, sp, #0 uint32_t msirange = 0U, sysclockfreq = 0U; 80062a6: 2300 movs r3, #0 80062a8: 61fb str r3, [r7, #28] 80062aa: 2300 movs r3, #0 80062ac: 61bb str r3, [r7, #24] uint32_t pllvco, pllsource, pllr, pllm; /* no init needed */ uint32_t sysclk_source, pll_oscsource; sysclk_source = __HAL_RCC_GET_SYSCLK_SOURCE(); 80062ae: 4b3e ldr r3, [pc, #248] @ (80063a8 ) 80062b0: 689b ldr r3, [r3, #8] 80062b2: f003 030c and.w r3, r3, #12 80062b6: 613b str r3, [r7, #16] pll_oscsource = __HAL_RCC_GET_PLL_OSCSOURCE(); 80062b8: 4b3b ldr r3, [pc, #236] @ (80063a8 ) 80062ba: 68db ldr r3, [r3, #12] 80062bc: f003 0303 and.w r3, r3, #3 80062c0: 60fb str r3, [r7, #12] if((sysclk_source == RCC_CFGR_SWS_MSI) || 80062c2: 693b ldr r3, [r7, #16] 80062c4: 2b00 cmp r3, #0 80062c6: d005 beq.n 80062d4 80062c8: 693b ldr r3, [r7, #16] 80062ca: 2b0c cmp r3, #12 80062cc: d121 bne.n 8006312 ((sysclk_source == RCC_CFGR_SWS_PLL) && (pll_oscsource == RCC_PLLSOURCE_MSI))) 80062ce: 68fb ldr r3, [r7, #12] 80062d0: 2b01 cmp r3, #1 80062d2: d11e bne.n 8006312 { /* MSI or PLL with MSI source used as system clock source */ /* Get SYSCLK source */ if(READ_BIT(RCC->CR, RCC_CR_MSIRGSEL) == 0U) 80062d4: 4b34 ldr r3, [pc, #208] @ (80063a8 ) 80062d6: 681b ldr r3, [r3, #0] 80062d8: f003 0308 and.w r3, r3, #8 80062dc: 2b00 cmp r3, #0 80062de: d107 bne.n 80062f0 { /* MSISRANGE from RCC_CSR applies */ msirange = READ_BIT(RCC->CSR, RCC_CSR_MSISRANGE) >> RCC_CSR_MSISRANGE_Pos; 80062e0: 4b31 ldr r3, [pc, #196] @ (80063a8 ) 80062e2: f8d3 3094 ldr.w r3, [r3, #148] @ 0x94 80062e6: 0a1b lsrs r3, r3, #8 80062e8: f003 030f and.w r3, r3, #15 80062ec: 61fb str r3, [r7, #28] 80062ee: e005 b.n 80062fc } else { /* MSIRANGE from RCC_CR applies */ msirange = READ_BIT(RCC->CR, RCC_CR_MSIRANGE) >> RCC_CR_MSIRANGE_Pos; 80062f0: 4b2d ldr r3, [pc, #180] @ (80063a8 ) 80062f2: 681b ldr r3, [r3, #0] 80062f4: 091b lsrs r3, r3, #4 80062f6: f003 030f and.w r3, r3, #15 80062fa: 61fb str r3, [r7, #28] } /*MSI frequency range in HZ*/ msirange = MSIRangeTable[msirange]; 80062fc: 4a2b ldr r2, [pc, #172] @ (80063ac ) 80062fe: 69fb ldr r3, [r7, #28] 8006300: f852 3023 ldr.w r3, [r2, r3, lsl #2] 8006304: 61fb str r3, [r7, #28] if(sysclk_source == RCC_CFGR_SWS_MSI) 8006306: 693b ldr r3, [r7, #16] 8006308: 2b00 cmp r3, #0 800630a: d10d bne.n 8006328 { /* MSI used as system clock source */ sysclockfreq = msirange; 800630c: 69fb ldr r3, [r7, #28] 800630e: 61bb str r3, [r7, #24] if(sysclk_source == RCC_CFGR_SWS_MSI) 8006310: e00a b.n 8006328 } } else if(sysclk_source == RCC_CFGR_SWS_HSI) 8006312: 693b ldr r3, [r7, #16] 8006314: 2b04 cmp r3, #4 8006316: d102 bne.n 800631e { /* HSI used as system clock source */ sysclockfreq = HSI_VALUE; 8006318: 4b25 ldr r3, [pc, #148] @ (80063b0 ) 800631a: 61bb str r3, [r7, #24] 800631c: e004 b.n 8006328 } else if(sysclk_source == RCC_CFGR_SWS_HSE) 800631e: 693b ldr r3, [r7, #16] 8006320: 2b08 cmp r3, #8 8006322: d101 bne.n 8006328 { /* HSE used as system clock source */ sysclockfreq = HSE_VALUE; 8006324: 4b23 ldr r3, [pc, #140] @ (80063b4 ) 8006326: 61bb str r3, [r7, #24] else { /* unexpected case: sysclockfreq at 0 */ } if(sysclk_source == RCC_CFGR_SWS_PLL) 8006328: 693b ldr r3, [r7, #16] 800632a: 2b0c cmp r3, #12 800632c: d134 bne.n 8006398 /* PLL used as system clock source */ /* PLL_VCO = (HSE_VALUE or HSI_VALUE or MSI_VALUE) * PLLN / PLLM SYSCLK = PLL_VCO / PLLR */ pllsource = READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC); 800632e: 4b1e ldr r3, [pc, #120] @ (80063a8 ) 8006330: 68db ldr r3, [r3, #12] 8006332: f003 0303 and.w r3, r3, #3 8006336: 60bb str r3, [r7, #8] switch (pllsource) 8006338: 68bb ldr r3, [r7, #8] 800633a: 2b02 cmp r3, #2 800633c: d003 beq.n 8006346 800633e: 68bb ldr r3, [r7, #8] 8006340: 2b03 cmp r3, #3 8006342: d003 beq.n 800634c 8006344: e005 b.n 8006352 { case RCC_PLLSOURCE_HSI: /* HSI used as PLL clock source */ pllvco = HSI_VALUE; 8006346: 4b1a ldr r3, [pc, #104] @ (80063b0 ) 8006348: 617b str r3, [r7, #20] break; 800634a: e005 b.n 8006358 case RCC_PLLSOURCE_HSE: /* HSE used as PLL clock source */ pllvco = HSE_VALUE; 800634c: 4b19 ldr r3, [pc, #100] @ (80063b4 ) 800634e: 617b str r3, [r7, #20] break; 8006350: e002 b.n 8006358 case RCC_PLLSOURCE_MSI: /* MSI used as PLL clock source */ default: pllvco = msirange; 8006352: 69fb ldr r3, [r7, #28] 8006354: 617b str r3, [r7, #20] break; 8006356: bf00 nop } pllm = (READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLM) >> RCC_PLLCFGR_PLLM_Pos) + 1U ; 8006358: 4b13 ldr r3, [pc, #76] @ (80063a8 ) 800635a: 68db ldr r3, [r3, #12] 800635c: 091b lsrs r3, r3, #4 800635e: f003 0307 and.w r3, r3, #7 8006362: 3301 adds r3, #1 8006364: 607b str r3, [r7, #4] pllvco = (pllvco * (READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos)) / pllm; 8006366: 4b10 ldr r3, [pc, #64] @ (80063a8 ) 8006368: 68db ldr r3, [r3, #12] 800636a: 0a1b lsrs r3, r3, #8 800636c: f003 037f and.w r3, r3, #127 @ 0x7f 8006370: 697a ldr r2, [r7, #20] 8006372: fb03 f202 mul.w r2, r3, r2 8006376: 687b ldr r3, [r7, #4] 8006378: fbb2 f3f3 udiv r3, r2, r3 800637c: 617b str r3, [r7, #20] pllr = ((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLR) >> RCC_PLLCFGR_PLLR_Pos) + 1U ) * 2U; 800637e: 4b0a ldr r3, [pc, #40] @ (80063a8 ) 8006380: 68db ldr r3, [r3, #12] 8006382: 0e5b lsrs r3, r3, #25 8006384: f003 0303 and.w r3, r3, #3 8006388: 3301 adds r3, #1 800638a: 005b lsls r3, r3, #1 800638c: 603b str r3, [r7, #0] sysclockfreq = pllvco / pllr; 800638e: 697a ldr r2, [r7, #20] 8006390: 683b ldr r3, [r7, #0] 8006392: fbb2 f3f3 udiv r3, r2, r3 8006396: 61bb str r3, [r7, #24] } return sysclockfreq; 8006398: 69bb ldr r3, [r7, #24] } 800639a: 4618 mov r0, r3 800639c: 3724 adds r7, #36 @ 0x24 800639e: 46bd mov sp, r7 80063a0: f85d 7b04 ldr.w r7, [sp], #4 80063a4: 4770 bx lr 80063a6: bf00 nop 80063a8: 40021000 .word 0x40021000 80063ac: 08014ed4 .word 0x08014ed4 80063b0: 00f42400 .word 0x00f42400 80063b4: 007a1200 .word 0x007a1200 080063b8 : * * @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency. * @retval HCLK frequency in Hz */ uint32_t HAL_RCC_GetHCLKFreq(void) { 80063b8: b480 push {r7} 80063ba: af00 add r7, sp, #0 return SystemCoreClock; 80063bc: 4b03 ldr r3, [pc, #12] @ (80063cc ) 80063be: 681b ldr r3, [r3, #0] } 80063c0: 4618 mov r0, r3 80063c2: 46bd mov sp, r7 80063c4: f85d 7b04 ldr.w r7, [sp], #4 80063c8: 4770 bx lr 80063ca: bf00 nop 80063cc: 200000c4 .word 0x200000c4 080063d0 : * @note Each time PCLK1 changes, this function must be called to update the * right PCLK1 value. Otherwise, any configuration based on this function will be incorrect. * @retval PCLK1 frequency in Hz */ uint32_t HAL_RCC_GetPCLK1Freq(void) { 80063d0: b580 push {r7, lr} 80063d2: af00 add r7, sp, #0 /* Get HCLK source and Compute PCLK1 frequency ---------------------------*/ return (HAL_RCC_GetHCLKFreq() >> (APBPrescTable[READ_BIT(RCC->CFGR, RCC_CFGR_PPRE1) >> RCC_CFGR_PPRE1_Pos] & 0x1FU)); 80063d4: f7ff fff0 bl 80063b8 80063d8: 4602 mov r2, r0 80063da: 4b06 ldr r3, [pc, #24] @ (80063f4 ) 80063dc: 689b ldr r3, [r3, #8] 80063de: 0a1b lsrs r3, r3, #8 80063e0: f003 0307 and.w r3, r3, #7 80063e4: 4904 ldr r1, [pc, #16] @ (80063f8 ) 80063e6: 5ccb ldrb r3, [r1, r3] 80063e8: f003 031f and.w r3, r3, #31 80063ec: fa22 f303 lsr.w r3, r2, r3 } 80063f0: 4618 mov r0, r3 80063f2: bd80 pop {r7, pc} 80063f4: 40021000 .word 0x40021000 80063f8: 08014ecc .word 0x08014ecc 080063fc : * @note Each time PCLK2 changes, this function must be called to update the * right PCLK2 value. Otherwise, any configuration based on this function will be incorrect. * @retval PCLK2 frequency in Hz */ uint32_t HAL_RCC_GetPCLK2Freq(void) { 80063fc: b580 push {r7, lr} 80063fe: af00 add r7, sp, #0 /* Get HCLK source and Compute PCLK2 frequency ---------------------------*/ return (HAL_RCC_GetHCLKFreq()>> (APBPrescTable[READ_BIT(RCC->CFGR, RCC_CFGR_PPRE2) >> RCC_CFGR_PPRE2_Pos] & 0x1FU)); 8006400: f7ff ffda bl 80063b8 8006404: 4602 mov r2, r0 8006406: 4b06 ldr r3, [pc, #24] @ (8006420 ) 8006408: 689b ldr r3, [r3, #8] 800640a: 0adb lsrs r3, r3, #11 800640c: f003 0307 and.w r3, r3, #7 8006410: 4904 ldr r1, [pc, #16] @ (8006424 ) 8006412: 5ccb ldrb r3, [r1, r3] 8006414: f003 031f and.w r3, r3, #31 8006418: fa22 f303 lsr.w r3, r2, r3 } 800641c: 4618 mov r0, r3 800641e: bd80 pop {r7, pc} 8006420: 40021000 .word 0x40021000 8006424: 08014ecc .word 0x08014ecc 08006428 : * will be configured. * @param pFLatency Pointer on the Flash Latency. * @retval None */ void HAL_RCC_GetClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t *pFLatency) { 8006428: b480 push {r7} 800642a: b083 sub sp, #12 800642c: af00 add r7, sp, #0 800642e: 6078 str r0, [r7, #4] 8006430: 6039 str r1, [r7, #0] /* Check the parameters */ assert_param(RCC_ClkInitStruct != (void *)NULL); assert_param(pFLatency != (void *)NULL); /* Set all possible values for the Clock type parameter --------------------*/ RCC_ClkInitStruct->ClockType = RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2; 8006432: 687b ldr r3, [r7, #4] 8006434: 220f movs r2, #15 8006436: 601a str r2, [r3, #0] /* Get the SYSCLK configuration --------------------------------------------*/ RCC_ClkInitStruct->SYSCLKSource = READ_BIT(RCC->CFGR, RCC_CFGR_SW); 8006438: 4b12 ldr r3, [pc, #72] @ (8006484 ) 800643a: 689b ldr r3, [r3, #8] 800643c: f003 0203 and.w r2, r3, #3 8006440: 687b ldr r3, [r7, #4] 8006442: 605a str r2, [r3, #4] /* Get the HCLK configuration ----------------------------------------------*/ RCC_ClkInitStruct->AHBCLKDivider = READ_BIT(RCC->CFGR, RCC_CFGR_HPRE); 8006444: 4b0f ldr r3, [pc, #60] @ (8006484 ) 8006446: 689b ldr r3, [r3, #8] 8006448: f003 02f0 and.w r2, r3, #240 @ 0xf0 800644c: 687b ldr r3, [r7, #4] 800644e: 609a str r2, [r3, #8] /* Get the APB1 configuration ----------------------------------------------*/ RCC_ClkInitStruct->APB1CLKDivider = READ_BIT(RCC->CFGR, RCC_CFGR_PPRE1); 8006450: 4b0c ldr r3, [pc, #48] @ (8006484 ) 8006452: 689b ldr r3, [r3, #8] 8006454: f403 62e0 and.w r2, r3, #1792 @ 0x700 8006458: 687b ldr r3, [r7, #4] 800645a: 60da str r2, [r3, #12] /* Get the APB2 configuration ----------------------------------------------*/ RCC_ClkInitStruct->APB2CLKDivider = (READ_BIT(RCC->CFGR, RCC_CFGR_PPRE2) >> 3U); 800645c: 4b09 ldr r3, [pc, #36] @ (8006484 ) 800645e: 689b ldr r3, [r3, #8] 8006460: 08db lsrs r3, r3, #3 8006462: f403 62e0 and.w r2, r3, #1792 @ 0x700 8006466: 687b ldr r3, [r7, #4] 8006468: 611a str r2, [r3, #16] /* Get the Flash Wait State (Latency) configuration ------------------------*/ *pFLatency = __HAL_FLASH_GET_LATENCY(); 800646a: 4b07 ldr r3, [pc, #28] @ (8006488 ) 800646c: 681b ldr r3, [r3, #0] 800646e: f003 0207 and.w r2, r3, #7 8006472: 683b ldr r3, [r7, #0] 8006474: 601a str r2, [r3, #0] } 8006476: bf00 nop 8006478: 370c adds r7, #12 800647a: 46bd mov sp, r7 800647c: f85d 7b04 ldr.w r7, [sp], #4 8006480: 4770 bx lr 8006482: bf00 nop 8006484: 40021000 .word 0x40021000 8006488: 40022000 .word 0x40022000 0800648c : voltage range. * @param msirange MSI range value from RCC_MSIRANGE_0 to RCC_MSIRANGE_11 * @retval HAL status */ static HAL_StatusTypeDef RCC_SetFlashLatencyFromMSIRange(uint32_t msirange) { 800648c: b580 push {r7, lr} 800648e: b086 sub sp, #24 8006490: af00 add r7, sp, #0 8006492: 6078 str r0, [r7, #4] uint32_t vos; uint32_t latency = FLASH_LATENCY_0; /* default value 0WS */ 8006494: 2300 movs r3, #0 8006496: 613b str r3, [r7, #16] if(__HAL_RCC_PWR_IS_CLK_ENABLED()) 8006498: 4b2a ldr r3, [pc, #168] @ (8006544 ) 800649a: 6d9b ldr r3, [r3, #88] @ 0x58 800649c: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 80064a0: 2b00 cmp r3, #0 80064a2: d003 beq.n 80064ac { vos = HAL_PWREx_GetVoltageRange(); 80064a4: f7ff f8f0 bl 8005688 80064a8: 6178 str r0, [r7, #20] 80064aa: e014 b.n 80064d6 } else { __HAL_RCC_PWR_CLK_ENABLE(); 80064ac: 4b25 ldr r3, [pc, #148] @ (8006544 ) 80064ae: 6d9b ldr r3, [r3, #88] @ 0x58 80064b0: 4a24 ldr r2, [pc, #144] @ (8006544 ) 80064b2: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 80064b6: 6593 str r3, [r2, #88] @ 0x58 80064b8: 4b22 ldr r3, [pc, #136] @ (8006544 ) 80064ba: 6d9b ldr r3, [r3, #88] @ 0x58 80064bc: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 80064c0: 60fb str r3, [r7, #12] 80064c2: 68fb ldr r3, [r7, #12] vos = HAL_PWREx_GetVoltageRange(); 80064c4: f7ff f8e0 bl 8005688 80064c8: 6178 str r0, [r7, #20] __HAL_RCC_PWR_CLK_DISABLE(); 80064ca: 4b1e ldr r3, [pc, #120] @ (8006544 ) 80064cc: 6d9b ldr r3, [r3, #88] @ 0x58 80064ce: 4a1d ldr r2, [pc, #116] @ (8006544 ) 80064d0: f023 5380 bic.w r3, r3, #268435456 @ 0x10000000 80064d4: 6593 str r3, [r2, #88] @ 0x58 } if(vos == PWR_REGULATOR_VOLTAGE_SCALE1) 80064d6: 697b ldr r3, [r7, #20] 80064d8: f5b3 7f00 cmp.w r3, #512 @ 0x200 80064dc: d10b bne.n 80064f6 { if(msirange > RCC_MSIRANGE_8) 80064de: 687b ldr r3, [r7, #4] 80064e0: 2b80 cmp r3, #128 @ 0x80 80064e2: d919 bls.n 8006518 { /* MSI > 16Mhz */ if(msirange > RCC_MSIRANGE_10) 80064e4: 687b ldr r3, [r7, #4] 80064e6: 2ba0 cmp r3, #160 @ 0xa0 80064e8: d902 bls.n 80064f0 { /* MSI 48Mhz */ latency = FLASH_LATENCY_2; /* 2WS */ 80064ea: 2302 movs r3, #2 80064ec: 613b str r3, [r7, #16] 80064ee: e013 b.n 8006518 } else { /* MSI 24Mhz or 32Mhz */ latency = FLASH_LATENCY_1; /* 1WS */ 80064f0: 2301 movs r3, #1 80064f2: 613b str r3, [r7, #16] 80064f4: e010 b.n 8006518 latency = FLASH_LATENCY_1; /* 1WS */ } /* else MSI < 8Mhz default FLASH_LATENCY_0 0WS */ } #else if(msirange > RCC_MSIRANGE_8) 80064f6: 687b ldr r3, [r7, #4] 80064f8: 2b80 cmp r3, #128 @ 0x80 80064fa: d902 bls.n 8006502 { /* MSI > 16Mhz */ latency = FLASH_LATENCY_3; /* 3WS */ 80064fc: 2303 movs r3, #3 80064fe: 613b str r3, [r7, #16] 8006500: e00a b.n 8006518 } else { if(msirange == RCC_MSIRANGE_8) 8006502: 687b ldr r3, [r7, #4] 8006504: 2b80 cmp r3, #128 @ 0x80 8006506: d102 bne.n 800650e { /* MSI 16Mhz */ latency = FLASH_LATENCY_2; /* 2WS */ 8006508: 2302 movs r3, #2 800650a: 613b str r3, [r7, #16] 800650c: e004 b.n 8006518 } else if(msirange == RCC_MSIRANGE_7) 800650e: 687b ldr r3, [r7, #4] 8006510: 2b70 cmp r3, #112 @ 0x70 8006512: d101 bne.n 8006518 { /* MSI 8Mhz */ latency = FLASH_LATENCY_1; /* 1WS */ 8006514: 2301 movs r3, #1 8006516: 613b str r3, [r7, #16] } } #endif } __HAL_FLASH_SET_LATENCY(latency); 8006518: 4b0b ldr r3, [pc, #44] @ (8006548 ) 800651a: 681b ldr r3, [r3, #0] 800651c: f023 0207 bic.w r2, r3, #7 8006520: 4909 ldr r1, [pc, #36] @ (8006548 ) 8006522: 693b ldr r3, [r7, #16] 8006524: 4313 orrs r3, r2 8006526: 600b str r3, [r1, #0] /* Check that the new number of wait states is taken into account to access the Flash memory by reading the FLASH_ACR register */ if(__HAL_FLASH_GET_LATENCY() != latency) 8006528: 4b07 ldr r3, [pc, #28] @ (8006548 ) 800652a: 681b ldr r3, [r3, #0] 800652c: f003 0307 and.w r3, r3, #7 8006530: 693a ldr r2, [r7, #16] 8006532: 429a cmp r2, r3 8006534: d001 beq.n 800653a { return HAL_ERROR; 8006536: 2301 movs r3, #1 8006538: e000 b.n 800653c } return HAL_OK; 800653a: 2300 movs r3, #0 } 800653c: 4618 mov r0, r3 800653e: 3718 adds r7, #24 8006540: 46bd mov sp, r7 8006542: bd80 pop {r7, pc} 8006544: 40021000 .word 0x40021000 8006548: 40022000 .word 0x40022000 0800654c : * the RTC clock source: in this case the access to Backup domain is enabled. * * @retval HAL status */ HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit) { 800654c: b580 push {r7, lr} 800654e: b086 sub sp, #24 8006550: af00 add r7, sp, #0 8006552: 6078 str r0, [r7, #4] uint32_t tmpregister, tickstart; /* no init needed */ HAL_StatusTypeDef ret = HAL_OK; /* Intermediate status */ 8006554: 2300 movs r3, #0 8006556: 74fb strb r3, [r7, #19] HAL_StatusTypeDef status = HAL_OK; /* Final status */ 8006558: 2300 movs r3, #0 800655a: 74bb strb r3, [r7, #18] assert_param(IS_RCC_PERIPHCLOCK(PeriphClkInit->PeriphClockSelection)); #if defined(SAI1) /*-------------------------- SAI1 clock source configuration ---------------------*/ if((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI1) == RCC_PERIPHCLK_SAI1)) 800655c: 687b ldr r3, [r7, #4] 800655e: 681b ldr r3, [r3, #0] 8006560: f403 6300 and.w r3, r3, #2048 @ 0x800 8006564: 2b00 cmp r3, #0 8006566: d041 beq.n 80065ec { /* Check the parameters */ assert_param(IS_RCC_SAI1CLK(PeriphClkInit->Sai1ClockSelection)); switch(PeriphClkInit->Sai1ClockSelection) 8006568: 687b ldr r3, [r7, #4] 800656a: 6e5b ldr r3, [r3, #100] @ 0x64 800656c: f5b3 0f40 cmp.w r3, #12582912 @ 0xc00000 8006570: d02a beq.n 80065c8 8006572: f5b3 0f40 cmp.w r3, #12582912 @ 0xc00000 8006576: d824 bhi.n 80065c2 8006578: f5b3 0f00 cmp.w r3, #8388608 @ 0x800000 800657c: d008 beq.n 8006590 800657e: f5b3 0f00 cmp.w r3, #8388608 @ 0x800000 8006582: d81e bhi.n 80065c2 8006584: 2b00 cmp r3, #0 8006586: d00a beq.n 800659e 8006588: f5b3 0f80 cmp.w r3, #4194304 @ 0x400000 800658c: d010 beq.n 80065b0 800658e: e018 b.n 80065c2 { case RCC_SAI1CLKSOURCE_PLL: /* PLL is used as clock source for SAI1*/ /* Enable SAI Clock output generated from System PLL . */ #if defined(RCC_PLLSAI2_SUPPORT) __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL_SAI3CLK); 8006590: 4b86 ldr r3, [pc, #536] @ (80067ac ) 8006592: 68db ldr r3, [r3, #12] 8006594: 4a85 ldr r2, [pc, #532] @ (80067ac ) 8006596: f443 3380 orr.w r3, r3, #65536 @ 0x10000 800659a: 60d3 str r3, [r2, #12] #else __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL_SAI2CLK); #endif /* RCC_PLLSAI2_SUPPORT */ /* SAI1 clock source config set later after clock selection check */ break; 800659c: e015 b.n 80065ca case RCC_SAI1CLKSOURCE_PLLSAI1: /* PLLSAI1 is used as clock source for SAI1*/ /* PLLSAI1 input clock, parameters M, N & P configuration and clock output (PLLSAI1ClockOut) */ ret = RCCEx_PLLSAI1_Config(&(PeriphClkInit->PLLSAI1), DIVIDER_P_UPDATE); 800659e: 687b ldr r3, [r7, #4] 80065a0: 3304 adds r3, #4 80065a2: 2100 movs r1, #0 80065a4: 4618 mov r0, r3 80065a6: f000 facb bl 8006b40 80065aa: 4603 mov r3, r0 80065ac: 74fb strb r3, [r7, #19] /* SAI1 clock source config set later after clock selection check */ break; 80065ae: e00c b.n 80065ca #if defined(RCC_PLLSAI2_SUPPORT) case RCC_SAI1CLKSOURCE_PLLSAI2: /* PLLSAI2 is used as clock source for SAI1*/ /* PLLSAI2 input clock, parameters M, N & P configuration clock output (PLLSAI2ClockOut) */ ret = RCCEx_PLLSAI2_Config(&(PeriphClkInit->PLLSAI2), DIVIDER_P_UPDATE); 80065b0: 687b ldr r3, [r7, #4] 80065b2: 3320 adds r3, #32 80065b4: 2100 movs r1, #0 80065b6: 4618 mov r0, r3 80065b8: f000 fbb6 bl 8006d28 80065bc: 4603 mov r3, r0 80065be: 74fb strb r3, [r7, #19] /* SAI1 clock source config set later after clock selection check */ break; 80065c0: e003 b.n 80065ca #endif /* STM32L4P5xx || STM32L4Q5xx || STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ /* SAI1 clock source config set later after clock selection check */ break; default: ret = HAL_ERROR; 80065c2: 2301 movs r3, #1 80065c4: 74fb strb r3, [r7, #19] break; 80065c6: e000 b.n 80065ca break; 80065c8: bf00 nop } if(ret == HAL_OK) 80065ca: 7cfb ldrb r3, [r7, #19] 80065cc: 2b00 cmp r3, #0 80065ce: d10b bne.n 80065e8 { /* Set the source of SAI1 clock*/ __HAL_RCC_SAI1_CONFIG(PeriphClkInit->Sai1ClockSelection); 80065d0: 4b76 ldr r3, [pc, #472] @ (80067ac ) 80065d2: f8d3 3088 ldr.w r3, [r3, #136] @ 0x88 80065d6: f423 0240 bic.w r2, r3, #12582912 @ 0xc00000 80065da: 687b ldr r3, [r7, #4] 80065dc: 6e5b ldr r3, [r3, #100] @ 0x64 80065de: 4973 ldr r1, [pc, #460] @ (80067ac ) 80065e0: 4313 orrs r3, r2 80065e2: f8c1 3088 str.w r3, [r1, #136] @ 0x88 80065e6: e001 b.n 80065ec } else { /* set overall return value */ status = ret; 80065e8: 7cfb ldrb r3, [r7, #19] 80065ea: 74bb strb r3, [r7, #18] #endif /* SAI1 */ #if defined(SAI2) /*-------------------------- SAI2 clock source configuration ---------------------*/ if((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI2) == RCC_PERIPHCLK_SAI2)) 80065ec: 687b ldr r3, [r7, #4] 80065ee: 681b ldr r3, [r3, #0] 80065f0: f403 5380 and.w r3, r3, #4096 @ 0x1000 80065f4: 2b00 cmp r3, #0 80065f6: d041 beq.n 800667c { /* Check the parameters */ assert_param(IS_RCC_SAI2CLK(PeriphClkInit->Sai2ClockSelection)); switch(PeriphClkInit->Sai2ClockSelection) 80065f8: 687b ldr r3, [r7, #4] 80065fa: 6e9b ldr r3, [r3, #104] @ 0x68 80065fc: f1b3 7f40 cmp.w r3, #50331648 @ 0x3000000 8006600: d02a beq.n 8006658 8006602: f1b3 7f40 cmp.w r3, #50331648 @ 0x3000000 8006606: d824 bhi.n 8006652 8006608: f1b3 7f00 cmp.w r3, #33554432 @ 0x2000000 800660c: d008 beq.n 8006620 800660e: f1b3 7f00 cmp.w r3, #33554432 @ 0x2000000 8006612: d81e bhi.n 8006652 8006614: 2b00 cmp r3, #0 8006616: d00a beq.n 800662e 8006618: f1b3 7f80 cmp.w r3, #16777216 @ 0x1000000 800661c: d010 beq.n 8006640 800661e: e018 b.n 8006652 { case RCC_SAI2CLKSOURCE_PLL: /* PLL is used as clock source for SAI2*/ /* Enable SAI Clock output generated from System PLL . */ __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL_SAI3CLK); 8006620: 4b62 ldr r3, [pc, #392] @ (80067ac ) 8006622: 68db ldr r3, [r3, #12] 8006624: 4a61 ldr r2, [pc, #388] @ (80067ac ) 8006626: f443 3380 orr.w r3, r3, #65536 @ 0x10000 800662a: 60d3 str r3, [r2, #12] /* SAI2 clock source config set later after clock selection check */ break; 800662c: e015 b.n 800665a case RCC_SAI2CLKSOURCE_PLLSAI1: /* PLLSAI1 is used as clock source for SAI2*/ /* PLLSAI1 input clock, parameters M, N & P configuration and clock output (PLLSAI1ClockOut) */ ret = RCCEx_PLLSAI1_Config(&(PeriphClkInit->PLLSAI1), DIVIDER_P_UPDATE); 800662e: 687b ldr r3, [r7, #4] 8006630: 3304 adds r3, #4 8006632: 2100 movs r1, #0 8006634: 4618 mov r0, r3 8006636: f000 fa83 bl 8006b40 800663a: 4603 mov r3, r0 800663c: 74fb strb r3, [r7, #19] /* SAI2 clock source config set later after clock selection check */ break; 800663e: e00c b.n 800665a case RCC_SAI2CLKSOURCE_PLLSAI2: /* PLLSAI2 is used as clock source for SAI2*/ /* PLLSAI2 input clock, parameters M, N & P configuration and clock output (PLLSAI2ClockOut) */ ret = RCCEx_PLLSAI2_Config(&(PeriphClkInit->PLLSAI2), DIVIDER_P_UPDATE); 8006640: 687b ldr r3, [r7, #4] 8006642: 3320 adds r3, #32 8006644: 2100 movs r1, #0 8006646: 4618 mov r0, r3 8006648: f000 fb6e bl 8006d28 800664c: 4603 mov r3, r0 800664e: 74fb strb r3, [r7, #19] /* SAI2 clock source config set later after clock selection check */ break; 8006650: e003 b.n 800665a #endif /* STM32L4P5xx || STM32L4Q5xx || STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ /* SAI2 clock source config set later after clock selection check */ break; default: ret = HAL_ERROR; 8006652: 2301 movs r3, #1 8006654: 74fb strb r3, [r7, #19] break; 8006656: e000 b.n 800665a break; 8006658: bf00 nop } if(ret == HAL_OK) 800665a: 7cfb ldrb r3, [r7, #19] 800665c: 2b00 cmp r3, #0 800665e: d10b bne.n 8006678 { /* Set the source of SAI2 clock*/ __HAL_RCC_SAI2_CONFIG(PeriphClkInit->Sai2ClockSelection); 8006660: 4b52 ldr r3, [pc, #328] @ (80067ac ) 8006662: f8d3 3088 ldr.w r3, [r3, #136] @ 0x88 8006666: f023 7240 bic.w r2, r3, #50331648 @ 0x3000000 800666a: 687b ldr r3, [r7, #4] 800666c: 6e9b ldr r3, [r3, #104] @ 0x68 800666e: 494f ldr r1, [pc, #316] @ (80067ac ) 8006670: 4313 orrs r3, r2 8006672: f8c1 3088 str.w r3, [r1, #136] @ 0x88 8006676: e001 b.n 800667c } else { /* set overall return value */ status = ret; 8006678: 7cfb ldrb r3, [r7, #19] 800667a: 74bb strb r3, [r7, #18] } } #endif /* SAI2 */ /*-------------------------- RTC clock source configuration ----------------------*/ if((PeriphClkInit->PeriphClockSelection & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC) 800667c: 687b ldr r3, [r7, #4] 800667e: 681b ldr r3, [r3, #0] 8006680: f403 3300 and.w r3, r3, #131072 @ 0x20000 8006684: 2b00 cmp r3, #0 8006686: f000 80a0 beq.w 80067ca { FlagStatus pwrclkchanged = RESET; 800668a: 2300 movs r3, #0 800668c: 747b strb r3, [r7, #17] /* Check for RTC Parameters used to output RTCCLK */ assert_param(IS_RCC_RTCCLKSOURCE(PeriphClkInit->RTCClockSelection)); /* Enable Power Clock */ if(__HAL_RCC_PWR_IS_CLK_DISABLED() != 0U) 800668e: 4b47 ldr r3, [pc, #284] @ (80067ac ) 8006690: 6d9b ldr r3, [r3, #88] @ 0x58 8006692: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 8006696: 2b00 cmp r3, #0 8006698: d101 bne.n 800669e 800669a: 2301 movs r3, #1 800669c: e000 b.n 80066a0 800669e: 2300 movs r3, #0 80066a0: 2b00 cmp r3, #0 80066a2: d00d beq.n 80066c0 { __HAL_RCC_PWR_CLK_ENABLE(); 80066a4: 4b41 ldr r3, [pc, #260] @ (80067ac ) 80066a6: 6d9b ldr r3, [r3, #88] @ 0x58 80066a8: 4a40 ldr r2, [pc, #256] @ (80067ac ) 80066aa: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 80066ae: 6593 str r3, [r2, #88] @ 0x58 80066b0: 4b3e ldr r3, [pc, #248] @ (80067ac ) 80066b2: 6d9b ldr r3, [r3, #88] @ 0x58 80066b4: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 80066b8: 60bb str r3, [r7, #8] 80066ba: 68bb ldr r3, [r7, #8] pwrclkchanged = SET; 80066bc: 2301 movs r3, #1 80066be: 747b strb r3, [r7, #17] } /* Enable write access to Backup domain */ SET_BIT(PWR->CR1, PWR_CR1_DBP); 80066c0: 4b3b ldr r3, [pc, #236] @ (80067b0 ) 80066c2: 681b ldr r3, [r3, #0] 80066c4: 4a3a ldr r2, [pc, #232] @ (80067b0 ) 80066c6: f443 7380 orr.w r3, r3, #256 @ 0x100 80066ca: 6013 str r3, [r2, #0] /* Wait for Backup domain Write protection disable */ tickstart = HAL_GetTick(); 80066cc: f7fd fac4 bl 8003c58 80066d0: 60f8 str r0, [r7, #12] while(READ_BIT(PWR->CR1, PWR_CR1_DBP) == 0U) 80066d2: e009 b.n 80066e8 { if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) 80066d4: f7fd fac0 bl 8003c58 80066d8: 4602 mov r2, r0 80066da: 68fb ldr r3, [r7, #12] 80066dc: 1ad3 subs r3, r2, r3 80066de: 2b02 cmp r3, #2 80066e0: d902 bls.n 80066e8 { ret = HAL_TIMEOUT; 80066e2: 2303 movs r3, #3 80066e4: 74fb strb r3, [r7, #19] break; 80066e6: e005 b.n 80066f4 while(READ_BIT(PWR->CR1, PWR_CR1_DBP) == 0U) 80066e8: 4b31 ldr r3, [pc, #196] @ (80067b0 ) 80066ea: 681b ldr r3, [r3, #0] 80066ec: f403 7380 and.w r3, r3, #256 @ 0x100 80066f0: 2b00 cmp r3, #0 80066f2: d0ef beq.n 80066d4 } } if(ret == HAL_OK) 80066f4: 7cfb ldrb r3, [r7, #19] 80066f6: 2b00 cmp r3, #0 80066f8: d15c bne.n 80067b4 { /* Reset the Backup domain only if the RTC Clock source selection is modified from default */ tmpregister = READ_BIT(RCC->BDCR, RCC_BDCR_RTCSEL); 80066fa: 4b2c ldr r3, [pc, #176] @ (80067ac ) 80066fc: f8d3 3090 ldr.w r3, [r3, #144] @ 0x90 8006700: f403 7340 and.w r3, r3, #768 @ 0x300 8006704: 617b str r3, [r7, #20] if((tmpregister != RCC_RTCCLKSOURCE_NONE) && (tmpregister != PeriphClkInit->RTCClockSelection)) 8006706: 697b ldr r3, [r7, #20] 8006708: 2b00 cmp r3, #0 800670a: d01f beq.n 800674c 800670c: 687b ldr r3, [r7, #4] 800670e: f8d3 3084 ldr.w r3, [r3, #132] @ 0x84 8006712: 697a ldr r2, [r7, #20] 8006714: 429a cmp r2, r3 8006716: d019 beq.n 800674c { /* Store the content of BDCR register before the reset of Backup Domain */ tmpregister = READ_BIT(RCC->BDCR, ~(RCC_BDCR_RTCSEL)); 8006718: 4b24 ldr r3, [pc, #144] @ (80067ac ) 800671a: f8d3 3090 ldr.w r3, [r3, #144] @ 0x90 800671e: f423 7340 bic.w r3, r3, #768 @ 0x300 8006722: 617b str r3, [r7, #20] /* RTC Clock selection can be changed only if the Backup Domain is reset */ __HAL_RCC_BACKUPRESET_FORCE(); 8006724: 4b21 ldr r3, [pc, #132] @ (80067ac ) 8006726: f8d3 3090 ldr.w r3, [r3, #144] @ 0x90 800672a: 4a20 ldr r2, [pc, #128] @ (80067ac ) 800672c: f443 3380 orr.w r3, r3, #65536 @ 0x10000 8006730: f8c2 3090 str.w r3, [r2, #144] @ 0x90 __HAL_RCC_BACKUPRESET_RELEASE(); 8006734: 4b1d ldr r3, [pc, #116] @ (80067ac ) 8006736: f8d3 3090 ldr.w r3, [r3, #144] @ 0x90 800673a: 4a1c ldr r2, [pc, #112] @ (80067ac ) 800673c: f423 3380 bic.w r3, r3, #65536 @ 0x10000 8006740: f8c2 3090 str.w r3, [r2, #144] @ 0x90 /* Restore the Content of BDCR register */ RCC->BDCR = tmpregister; 8006744: 4a19 ldr r2, [pc, #100] @ (80067ac ) 8006746: 697b ldr r3, [r7, #20] 8006748: f8c2 3090 str.w r3, [r2, #144] @ 0x90 } /* Wait for LSE reactivation if LSE was enable prior to Backup Domain reset */ if (HAL_IS_BIT_SET(tmpregister, RCC_BDCR_LSEON)) 800674c: 697b ldr r3, [r7, #20] 800674e: f003 0301 and.w r3, r3, #1 8006752: 2b00 cmp r3, #0 8006754: d016 beq.n 8006784 { /* Get Start Tick*/ tickstart = HAL_GetTick(); 8006756: f7fd fa7f bl 8003c58 800675a: 60f8 str r0, [r7, #12] /* Wait till LSE is ready */ while(READ_BIT(RCC->BDCR, RCC_BDCR_LSERDY) == 0U) 800675c: e00b b.n 8006776 { if((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) 800675e: f7fd fa7b bl 8003c58 8006762: 4602 mov r2, r0 8006764: 68fb ldr r3, [r7, #12] 8006766: 1ad3 subs r3, r2, r3 8006768: f241 3288 movw r2, #5000 @ 0x1388 800676c: 4293 cmp r3, r2 800676e: d902 bls.n 8006776 { ret = HAL_TIMEOUT; 8006770: 2303 movs r3, #3 8006772: 74fb strb r3, [r7, #19] break; 8006774: e006 b.n 8006784 while(READ_BIT(RCC->BDCR, RCC_BDCR_LSERDY) == 0U) 8006776: 4b0d ldr r3, [pc, #52] @ (80067ac ) 8006778: f8d3 3090 ldr.w r3, [r3, #144] @ 0x90 800677c: f003 0302 and.w r3, r3, #2 8006780: 2b00 cmp r3, #0 8006782: d0ec beq.n 800675e } } } if(ret == HAL_OK) 8006784: 7cfb ldrb r3, [r7, #19] 8006786: 2b00 cmp r3, #0 8006788: d10c bne.n 80067a4 { /* Apply new RTC clock source selection */ __HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection); 800678a: 4b08 ldr r3, [pc, #32] @ (80067ac ) 800678c: f8d3 3090 ldr.w r3, [r3, #144] @ 0x90 8006790: f423 7240 bic.w r2, r3, #768 @ 0x300 8006794: 687b ldr r3, [r7, #4] 8006796: f8d3 3084 ldr.w r3, [r3, #132] @ 0x84 800679a: 4904 ldr r1, [pc, #16] @ (80067ac ) 800679c: 4313 orrs r3, r2 800679e: f8c1 3090 str.w r3, [r1, #144] @ 0x90 80067a2: e009 b.n 80067b8 } else { /* set overall return value */ status = ret; 80067a4: 7cfb ldrb r3, [r7, #19] 80067a6: 74bb strb r3, [r7, #18] 80067a8: e006 b.n 80067b8 80067aa: bf00 nop 80067ac: 40021000 .word 0x40021000 80067b0: 40007000 .word 0x40007000 } } else { /* set overall return value */ status = ret; 80067b4: 7cfb ldrb r3, [r7, #19] 80067b6: 74bb strb r3, [r7, #18] } /* Restore clock configuration if changed */ if(pwrclkchanged == SET) 80067b8: 7c7b ldrb r3, [r7, #17] 80067ba: 2b01 cmp r3, #1 80067bc: d105 bne.n 80067ca { __HAL_RCC_PWR_CLK_DISABLE(); 80067be: 4b9e ldr r3, [pc, #632] @ (8006a38 ) 80067c0: 6d9b ldr r3, [r3, #88] @ 0x58 80067c2: 4a9d ldr r2, [pc, #628] @ (8006a38 ) 80067c4: f023 5380 bic.w r3, r3, #268435456 @ 0x10000000 80067c8: 6593 str r3, [r2, #88] @ 0x58 } } /*-------------------------- USART1 clock source configuration -------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART1) == RCC_PERIPHCLK_USART1) 80067ca: 687b ldr r3, [r7, #4] 80067cc: 681b ldr r3, [r3, #0] 80067ce: f003 0301 and.w r3, r3, #1 80067d2: 2b00 cmp r3, #0 80067d4: d00a beq.n 80067ec { /* Check the parameters */ assert_param(IS_RCC_USART1CLKSOURCE(PeriphClkInit->Usart1ClockSelection)); /* Configure the USART1 clock source */ __HAL_RCC_USART1_CONFIG(PeriphClkInit->Usart1ClockSelection); 80067d6: 4b98 ldr r3, [pc, #608] @ (8006a38 ) 80067d8: f8d3 3088 ldr.w r3, [r3, #136] @ 0x88 80067dc: f023 0203 bic.w r2, r3, #3 80067e0: 687b ldr r3, [r7, #4] 80067e2: 6b9b ldr r3, [r3, #56] @ 0x38 80067e4: 4994 ldr r1, [pc, #592] @ (8006a38 ) 80067e6: 4313 orrs r3, r2 80067e8: f8c1 3088 str.w r3, [r1, #136] @ 0x88 } /*-------------------------- USART2 clock source configuration -------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART2) == RCC_PERIPHCLK_USART2) 80067ec: 687b ldr r3, [r7, #4] 80067ee: 681b ldr r3, [r3, #0] 80067f0: f003 0302 and.w r3, r3, #2 80067f4: 2b00 cmp r3, #0 80067f6: d00a beq.n 800680e { /* Check the parameters */ assert_param(IS_RCC_USART2CLKSOURCE(PeriphClkInit->Usart2ClockSelection)); /* Configure the USART2 clock source */ __HAL_RCC_USART2_CONFIG(PeriphClkInit->Usart2ClockSelection); 80067f8: 4b8f ldr r3, [pc, #572] @ (8006a38 ) 80067fa: f8d3 3088 ldr.w r3, [r3, #136] @ 0x88 80067fe: f023 020c bic.w r2, r3, #12 8006802: 687b ldr r3, [r7, #4] 8006804: 6bdb ldr r3, [r3, #60] @ 0x3c 8006806: 498c ldr r1, [pc, #560] @ (8006a38 ) 8006808: 4313 orrs r3, r2 800680a: f8c1 3088 str.w r3, [r1, #136] @ 0x88 } #if defined(USART3) /*-------------------------- USART3 clock source configuration -------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART3) == RCC_PERIPHCLK_USART3) 800680e: 687b ldr r3, [r7, #4] 8006810: 681b ldr r3, [r3, #0] 8006812: f003 0304 and.w r3, r3, #4 8006816: 2b00 cmp r3, #0 8006818: d00a beq.n 8006830 { /* Check the parameters */ assert_param(IS_RCC_USART3CLKSOURCE(PeriphClkInit->Usart3ClockSelection)); /* Configure the USART3 clock source */ __HAL_RCC_USART3_CONFIG(PeriphClkInit->Usart3ClockSelection); 800681a: 4b87 ldr r3, [pc, #540] @ (8006a38 ) 800681c: f8d3 3088 ldr.w r3, [r3, #136] @ 0x88 8006820: f023 0230 bic.w r2, r3, #48 @ 0x30 8006824: 687b ldr r3, [r7, #4] 8006826: 6c1b ldr r3, [r3, #64] @ 0x40 8006828: 4983 ldr r1, [pc, #524] @ (8006a38 ) 800682a: 4313 orrs r3, r2 800682c: f8c1 3088 str.w r3, [r1, #136] @ 0x88 #endif /* USART3 */ #if defined(UART4) /*-------------------------- UART4 clock source configuration --------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_UART4) == RCC_PERIPHCLK_UART4) 8006830: 687b ldr r3, [r7, #4] 8006832: 681b ldr r3, [r3, #0] 8006834: f003 0308 and.w r3, r3, #8 8006838: 2b00 cmp r3, #0 800683a: d00a beq.n 8006852 { /* Check the parameters */ assert_param(IS_RCC_UART4CLKSOURCE(PeriphClkInit->Uart4ClockSelection)); /* Configure the UART4 clock source */ __HAL_RCC_UART4_CONFIG(PeriphClkInit->Uart4ClockSelection); 800683c: 4b7e ldr r3, [pc, #504] @ (8006a38 ) 800683e: f8d3 3088 ldr.w r3, [r3, #136] @ 0x88 8006842: f023 02c0 bic.w r2, r3, #192 @ 0xc0 8006846: 687b ldr r3, [r7, #4] 8006848: 6c5b ldr r3, [r3, #68] @ 0x44 800684a: 497b ldr r1, [pc, #492] @ (8006a38 ) 800684c: 4313 orrs r3, r2 800684e: f8c1 3088 str.w r3, [r1, #136] @ 0x88 #endif /* UART4 */ #if defined(UART5) /*-------------------------- UART5 clock source configuration --------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_UART5) == RCC_PERIPHCLK_UART5) 8006852: 687b ldr r3, [r7, #4] 8006854: 681b ldr r3, [r3, #0] 8006856: f003 0310 and.w r3, r3, #16 800685a: 2b00 cmp r3, #0 800685c: d00a beq.n 8006874 { /* Check the parameters */ assert_param(IS_RCC_UART5CLKSOURCE(PeriphClkInit->Uart5ClockSelection)); /* Configure the UART5 clock source */ __HAL_RCC_UART5_CONFIG(PeriphClkInit->Uart5ClockSelection); 800685e: 4b76 ldr r3, [pc, #472] @ (8006a38 ) 8006860: f8d3 3088 ldr.w r3, [r3, #136] @ 0x88 8006864: f423 7240 bic.w r2, r3, #768 @ 0x300 8006868: 687b ldr r3, [r7, #4] 800686a: 6c9b ldr r3, [r3, #72] @ 0x48 800686c: 4972 ldr r1, [pc, #456] @ (8006a38 ) 800686e: 4313 orrs r3, r2 8006870: f8c1 3088 str.w r3, [r1, #136] @ 0x88 } #endif /* UART5 */ /*-------------------------- LPUART1 clock source configuration ------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LPUART1) == RCC_PERIPHCLK_LPUART1) 8006874: 687b ldr r3, [r7, #4] 8006876: 681b ldr r3, [r3, #0] 8006878: f003 0320 and.w r3, r3, #32 800687c: 2b00 cmp r3, #0 800687e: d00a beq.n 8006896 { /* Check the parameters */ assert_param(IS_RCC_LPUART1CLKSOURCE(PeriphClkInit->Lpuart1ClockSelection)); /* Configure the LPUART1 clock source */ __HAL_RCC_LPUART1_CONFIG(PeriphClkInit->Lpuart1ClockSelection); 8006880: 4b6d ldr r3, [pc, #436] @ (8006a38 ) 8006882: f8d3 3088 ldr.w r3, [r3, #136] @ 0x88 8006886: f423 6240 bic.w r2, r3, #3072 @ 0xc00 800688a: 687b ldr r3, [r7, #4] 800688c: 6cdb ldr r3, [r3, #76] @ 0x4c 800688e: 496a ldr r1, [pc, #424] @ (8006a38 ) 8006890: 4313 orrs r3, r2 8006892: f8c1 3088 str.w r3, [r1, #136] @ 0x88 } /*-------------------------- LPTIM1 clock source configuration -------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LPTIM1) == (RCC_PERIPHCLK_LPTIM1)) 8006896: 687b ldr r3, [r7, #4] 8006898: 681b ldr r3, [r3, #0] 800689a: f403 7300 and.w r3, r3, #512 @ 0x200 800689e: 2b00 cmp r3, #0 80068a0: d00a beq.n 80068b8 { assert_param(IS_RCC_LPTIM1CLK(PeriphClkInit->Lptim1ClockSelection)); __HAL_RCC_LPTIM1_CONFIG(PeriphClkInit->Lptim1ClockSelection); 80068a2: 4b65 ldr r3, [pc, #404] @ (8006a38 ) 80068a4: f8d3 3088 ldr.w r3, [r3, #136] @ 0x88 80068a8: f423 2240 bic.w r2, r3, #786432 @ 0xc0000 80068ac: 687b ldr r3, [r7, #4] 80068ae: 6ddb ldr r3, [r3, #92] @ 0x5c 80068b0: 4961 ldr r1, [pc, #388] @ (8006a38 ) 80068b2: 4313 orrs r3, r2 80068b4: f8c1 3088 str.w r3, [r1, #136] @ 0x88 } /*-------------------------- LPTIM2 clock source configuration -------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LPTIM2) == (RCC_PERIPHCLK_LPTIM2)) 80068b8: 687b ldr r3, [r7, #4] 80068ba: 681b ldr r3, [r3, #0] 80068bc: f403 6380 and.w r3, r3, #1024 @ 0x400 80068c0: 2b00 cmp r3, #0 80068c2: d00a beq.n 80068da { assert_param(IS_RCC_LPTIM2CLK(PeriphClkInit->Lptim2ClockSelection)); __HAL_RCC_LPTIM2_CONFIG(PeriphClkInit->Lptim2ClockSelection); 80068c4: 4b5c ldr r3, [pc, #368] @ (8006a38 ) 80068c6: f8d3 3088 ldr.w r3, [r3, #136] @ 0x88 80068ca: f423 1240 bic.w r2, r3, #3145728 @ 0x300000 80068ce: 687b ldr r3, [r7, #4] 80068d0: 6e1b ldr r3, [r3, #96] @ 0x60 80068d2: 4959 ldr r1, [pc, #356] @ (8006a38 ) 80068d4: 4313 orrs r3, r2 80068d6: f8c1 3088 str.w r3, [r1, #136] @ 0x88 } /*-------------------------- I2C1 clock source configuration ---------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C1) == RCC_PERIPHCLK_I2C1) 80068da: 687b ldr r3, [r7, #4] 80068dc: 681b ldr r3, [r3, #0] 80068de: f003 0340 and.w r3, r3, #64 @ 0x40 80068e2: 2b00 cmp r3, #0 80068e4: d00a beq.n 80068fc { /* Check the parameters */ assert_param(IS_RCC_I2C1CLKSOURCE(PeriphClkInit->I2c1ClockSelection)); /* Configure the I2C1 clock source */ __HAL_RCC_I2C1_CONFIG(PeriphClkInit->I2c1ClockSelection); 80068e6: 4b54 ldr r3, [pc, #336] @ (8006a38 ) 80068e8: f8d3 3088 ldr.w r3, [r3, #136] @ 0x88 80068ec: f423 5240 bic.w r2, r3, #12288 @ 0x3000 80068f0: 687b ldr r3, [r7, #4] 80068f2: 6d1b ldr r3, [r3, #80] @ 0x50 80068f4: 4950 ldr r1, [pc, #320] @ (8006a38 ) 80068f6: 4313 orrs r3, r2 80068f8: f8c1 3088 str.w r3, [r1, #136] @ 0x88 } #if defined(I2C2) /*-------------------------- I2C2 clock source configuration ---------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C2) == RCC_PERIPHCLK_I2C2) 80068fc: 687b ldr r3, [r7, #4] 80068fe: 681b ldr r3, [r3, #0] 8006900: f003 0380 and.w r3, r3, #128 @ 0x80 8006904: 2b00 cmp r3, #0 8006906: d00a beq.n 800691e { /* Check the parameters */ assert_param(IS_RCC_I2C2CLKSOURCE(PeriphClkInit->I2c2ClockSelection)); /* Configure the I2C2 clock source */ __HAL_RCC_I2C2_CONFIG(PeriphClkInit->I2c2ClockSelection); 8006908: 4b4b ldr r3, [pc, #300] @ (8006a38 ) 800690a: f8d3 3088 ldr.w r3, [r3, #136] @ 0x88 800690e: f423 4240 bic.w r2, r3, #49152 @ 0xc000 8006912: 687b ldr r3, [r7, #4] 8006914: 6d5b ldr r3, [r3, #84] @ 0x54 8006916: 4948 ldr r1, [pc, #288] @ (8006a38 ) 8006918: 4313 orrs r3, r2 800691a: f8c1 3088 str.w r3, [r1, #136] @ 0x88 } #endif /* I2C2 */ /*-------------------------- I2C3 clock source configuration ---------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C3) == RCC_PERIPHCLK_I2C3) 800691e: 687b ldr r3, [r7, #4] 8006920: 681b ldr r3, [r3, #0] 8006922: f403 7380 and.w r3, r3, #256 @ 0x100 8006926: 2b00 cmp r3, #0 8006928: d00a beq.n 8006940 { /* Check the parameters */ assert_param(IS_RCC_I2C3CLKSOURCE(PeriphClkInit->I2c3ClockSelection)); /* Configure the I2C3 clock source */ __HAL_RCC_I2C3_CONFIG(PeriphClkInit->I2c3ClockSelection); 800692a: 4b43 ldr r3, [pc, #268] @ (8006a38 ) 800692c: f8d3 3088 ldr.w r3, [r3, #136] @ 0x88 8006930: f423 3240 bic.w r2, r3, #196608 @ 0x30000 8006934: 687b ldr r3, [r7, #4] 8006936: 6d9b ldr r3, [r3, #88] @ 0x58 8006938: 493f ldr r1, [pc, #252] @ (8006a38 ) 800693a: 4313 orrs r3, r2 800693c: f8c1 3088 str.w r3, [r1, #136] @ 0x88 #endif /* I2C4 */ #if defined(USB_OTG_FS) || defined(USB) /*-------------------------- USB clock source configuration ----------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USB) == (RCC_PERIPHCLK_USB)) 8006940: 687b ldr r3, [r7, #4] 8006942: 681b ldr r3, [r3, #0] 8006944: f403 5300 and.w r3, r3, #8192 @ 0x2000 8006948: 2b00 cmp r3, #0 800694a: d028 beq.n 800699e { assert_param(IS_RCC_USBCLKSOURCE(PeriphClkInit->UsbClockSelection)); __HAL_RCC_USB_CONFIG(PeriphClkInit->UsbClockSelection); 800694c: 4b3a ldr r3, [pc, #232] @ (8006a38 ) 800694e: f8d3 3088 ldr.w r3, [r3, #136] @ 0x88 8006952: f023 6240 bic.w r2, r3, #201326592 @ 0xc000000 8006956: 687b ldr r3, [r7, #4] 8006958: 6edb ldr r3, [r3, #108] @ 0x6c 800695a: 4937 ldr r1, [pc, #220] @ (8006a38 ) 800695c: 4313 orrs r3, r2 800695e: f8c1 3088 str.w r3, [r1, #136] @ 0x88 if(PeriphClkInit->UsbClockSelection == RCC_USBCLKSOURCE_PLL) 8006962: 687b ldr r3, [r7, #4] 8006964: 6edb ldr r3, [r3, #108] @ 0x6c 8006966: f1b3 6f00 cmp.w r3, #134217728 @ 0x8000000 800696a: d106 bne.n 800697a { /* Enable PLL48M1CLK output clock */ __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL_48M1CLK); 800696c: 4b32 ldr r3, [pc, #200] @ (8006a38 ) 800696e: 68db ldr r3, [r3, #12] 8006970: 4a31 ldr r2, [pc, #196] @ (8006a38 ) 8006972: f443 1380 orr.w r3, r3, #1048576 @ 0x100000 8006976: 60d3 str r3, [r2, #12] 8006978: e011 b.n 800699e } else { #if defined(RCC_PLLSAI1_SUPPORT) if(PeriphClkInit->UsbClockSelection == RCC_USBCLKSOURCE_PLLSAI1) 800697a: 687b ldr r3, [r7, #4] 800697c: 6edb ldr r3, [r3, #108] @ 0x6c 800697e: f1b3 6f80 cmp.w r3, #67108864 @ 0x4000000 8006982: d10c bne.n 800699e { /* PLLSAI1 input clock, parameters M, N & Q configuration and clock output (PLLSAI1ClockOut) */ ret = RCCEx_PLLSAI1_Config(&(PeriphClkInit->PLLSAI1), DIVIDER_Q_UPDATE); 8006984: 687b ldr r3, [r7, #4] 8006986: 3304 adds r3, #4 8006988: 2101 movs r1, #1 800698a: 4618 mov r0, r3 800698c: f000 f8d8 bl 8006b40 8006990: 4603 mov r3, r0 8006992: 74fb strb r3, [r7, #19] if(ret != HAL_OK) 8006994: 7cfb ldrb r3, [r7, #19] 8006996: 2b00 cmp r3, #0 8006998: d001 beq.n 800699e { /* set overall return value */ status = ret; 800699a: 7cfb ldrb r3, [r7, #19] 800699c: 74bb strb r3, [r7, #18] #endif /* USB_OTG_FS || USB */ #if defined(SDMMC1) /*-------------------------- SDMMC1 clock source configuration -------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SDMMC1) == (RCC_PERIPHCLK_SDMMC1)) 800699e: 687b ldr r3, [r7, #4] 80069a0: 681b ldr r3, [r3, #0] 80069a2: f403 2300 and.w r3, r3, #524288 @ 0x80000 80069a6: 2b00 cmp r3, #0 80069a8: d028 beq.n 80069fc { assert_param(IS_RCC_SDMMC1CLKSOURCE(PeriphClkInit->Sdmmc1ClockSelection)); __HAL_RCC_SDMMC1_CONFIG(PeriphClkInit->Sdmmc1ClockSelection); 80069aa: 4b23 ldr r3, [pc, #140] @ (8006a38 ) 80069ac: f8d3 3088 ldr.w r3, [r3, #136] @ 0x88 80069b0: f023 6240 bic.w r2, r3, #201326592 @ 0xc000000 80069b4: 687b ldr r3, [r7, #4] 80069b6: 6f1b ldr r3, [r3, #112] @ 0x70 80069b8: 491f ldr r1, [pc, #124] @ (8006a38 ) 80069ba: 4313 orrs r3, r2 80069bc: f8c1 3088 str.w r3, [r1, #136] @ 0x88 if(PeriphClkInit->Sdmmc1ClockSelection == RCC_SDMMC1CLKSOURCE_PLL) /* PLL "Q" ? */ 80069c0: 687b ldr r3, [r7, #4] 80069c2: 6f1b ldr r3, [r3, #112] @ 0x70 80069c4: f1b3 6f00 cmp.w r3, #134217728 @ 0x8000000 80069c8: d106 bne.n 80069d8 { /* Enable PLL48M1CLK output clock */ __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL_48M1CLK); 80069ca: 4b1b ldr r3, [pc, #108] @ (8006a38 ) 80069cc: 68db ldr r3, [r3, #12] 80069ce: 4a1a ldr r2, [pc, #104] @ (8006a38 ) 80069d0: f443 1380 orr.w r3, r3, #1048576 @ 0x100000 80069d4: 60d3 str r3, [r2, #12] 80069d6: e011 b.n 80069fc { /* Enable PLLSAI3CLK output */ __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL_SAI3CLK); } #endif else if(PeriphClkInit->Sdmmc1ClockSelection == RCC_SDMMC1CLKSOURCE_PLLSAI1) 80069d8: 687b ldr r3, [r7, #4] 80069da: 6f1b ldr r3, [r3, #112] @ 0x70 80069dc: f1b3 6f80 cmp.w r3, #67108864 @ 0x4000000 80069e0: d10c bne.n 80069fc { /* PLLSAI1 input clock, parameters M, N & Q configuration and clock output (PLLSAI1ClockOut) */ ret = RCCEx_PLLSAI1_Config(&(PeriphClkInit->PLLSAI1), DIVIDER_Q_UPDATE); 80069e2: 687b ldr r3, [r7, #4] 80069e4: 3304 adds r3, #4 80069e6: 2101 movs r1, #1 80069e8: 4618 mov r0, r3 80069ea: f000 f8a9 bl 8006b40 80069ee: 4603 mov r3, r0 80069f0: 74fb strb r3, [r7, #19] if(ret != HAL_OK) 80069f2: 7cfb ldrb r3, [r7, #19] 80069f4: 2b00 cmp r3, #0 80069f6: d001 beq.n 80069fc { /* set overall return value */ status = ret; 80069f8: 7cfb ldrb r3, [r7, #19] 80069fa: 74bb strb r3, [r7, #18] } #endif /* SDMMC1 */ /*-------------------------- RNG clock source configuration ----------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RNG) == (RCC_PERIPHCLK_RNG)) 80069fc: 687b ldr r3, [r7, #4] 80069fe: 681b ldr r3, [r3, #0] 8006a00: f403 2380 and.w r3, r3, #262144 @ 0x40000 8006a04: 2b00 cmp r3, #0 8006a06: d02b beq.n 8006a60 { assert_param(IS_RCC_RNGCLKSOURCE(PeriphClkInit->RngClockSelection)); __HAL_RCC_RNG_CONFIG(PeriphClkInit->RngClockSelection); 8006a08: 4b0b ldr r3, [pc, #44] @ (8006a38 ) 8006a0a: f8d3 3088 ldr.w r3, [r3, #136] @ 0x88 8006a0e: f023 6240 bic.w r2, r3, #201326592 @ 0xc000000 8006a12: 687b ldr r3, [r7, #4] 8006a14: 6f5b ldr r3, [r3, #116] @ 0x74 8006a16: 4908 ldr r1, [pc, #32] @ (8006a38 ) 8006a18: 4313 orrs r3, r2 8006a1a: f8c1 3088 str.w r3, [r1, #136] @ 0x88 if(PeriphClkInit->RngClockSelection == RCC_RNGCLKSOURCE_PLL) 8006a1e: 687b ldr r3, [r7, #4] 8006a20: 6f5b ldr r3, [r3, #116] @ 0x74 8006a22: f1b3 6f00 cmp.w r3, #134217728 @ 0x8000000 8006a26: d109 bne.n 8006a3c { /* Enable PLL48M1CLK output clock */ __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL_48M1CLK); 8006a28: 4b03 ldr r3, [pc, #12] @ (8006a38 ) 8006a2a: 68db ldr r3, [r3, #12] 8006a2c: 4a02 ldr r2, [pc, #8] @ (8006a38 ) 8006a2e: f443 1380 orr.w r3, r3, #1048576 @ 0x100000 8006a32: 60d3 str r3, [r2, #12] 8006a34: e014 b.n 8006a60 8006a36: bf00 nop 8006a38: 40021000 .word 0x40021000 } #if defined(RCC_PLLSAI1_SUPPORT) else if(PeriphClkInit->RngClockSelection == RCC_RNGCLKSOURCE_PLLSAI1) 8006a3c: 687b ldr r3, [r7, #4] 8006a3e: 6f5b ldr r3, [r3, #116] @ 0x74 8006a40: f1b3 6f80 cmp.w r3, #67108864 @ 0x4000000 8006a44: d10c bne.n 8006a60 { /* PLLSAI1 input clock, parameters M, N & Q configuration and clock output (PLLSAI1ClockOut) */ ret = RCCEx_PLLSAI1_Config(&(PeriphClkInit->PLLSAI1), DIVIDER_Q_UPDATE); 8006a46: 687b ldr r3, [r7, #4] 8006a48: 3304 adds r3, #4 8006a4a: 2101 movs r1, #1 8006a4c: 4618 mov r0, r3 8006a4e: f000 f877 bl 8006b40 8006a52: 4603 mov r3, r0 8006a54: 74fb strb r3, [r7, #19] if(ret != HAL_OK) 8006a56: 7cfb ldrb r3, [r7, #19] 8006a58: 2b00 cmp r3, #0 8006a5a: d001 beq.n 8006a60 { /* set overall return value */ status = ret; 8006a5c: 7cfb ldrb r3, [r7, #19] 8006a5e: 74bb strb r3, [r7, #18] } } /*-------------------------- ADC clock source configuration ----------------------*/ #if !defined(STM32L412xx) && !defined(STM32L422xx) if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_ADC) == RCC_PERIPHCLK_ADC) 8006a60: 687b ldr r3, [r7, #4] 8006a62: 681b ldr r3, [r3, #0] 8006a64: f403 4380 and.w r3, r3, #16384 @ 0x4000 8006a68: 2b00 cmp r3, #0 8006a6a: d02f beq.n 8006acc { /* Check the parameters */ assert_param(IS_RCC_ADCCLKSOURCE(PeriphClkInit->AdcClockSelection)); /* Configure the ADC interface clock source */ __HAL_RCC_ADC_CONFIG(PeriphClkInit->AdcClockSelection); 8006a6c: 4b2b ldr r3, [pc, #172] @ (8006b1c ) 8006a6e: f8d3 3088 ldr.w r3, [r3, #136] @ 0x88 8006a72: f023 5240 bic.w r2, r3, #805306368 @ 0x30000000 8006a76: 687b ldr r3, [r7, #4] 8006a78: 6f9b ldr r3, [r3, #120] @ 0x78 8006a7a: 4928 ldr r1, [pc, #160] @ (8006b1c ) 8006a7c: 4313 orrs r3, r2 8006a7e: f8c1 3088 str.w r3, [r1, #136] @ 0x88 #if defined(RCC_PLLSAI1_SUPPORT) if(PeriphClkInit->AdcClockSelection == RCC_ADCCLKSOURCE_PLLSAI1) 8006a82: 687b ldr r3, [r7, #4] 8006a84: 6f9b ldr r3, [r3, #120] @ 0x78 8006a86: f1b3 5f80 cmp.w r3, #268435456 @ 0x10000000 8006a8a: d10d bne.n 8006aa8 { /* PLLSAI1 input clock, parameters M, N & R configuration and clock output (PLLSAI1ClockOut) */ ret = RCCEx_PLLSAI1_Config(&(PeriphClkInit->PLLSAI1), DIVIDER_R_UPDATE); 8006a8c: 687b ldr r3, [r7, #4] 8006a8e: 3304 adds r3, #4 8006a90: 2102 movs r1, #2 8006a92: 4618 mov r0, r3 8006a94: f000 f854 bl 8006b40 8006a98: 4603 mov r3, r0 8006a9a: 74fb strb r3, [r7, #19] if(ret != HAL_OK) 8006a9c: 7cfb ldrb r3, [r7, #19] 8006a9e: 2b00 cmp r3, #0 8006aa0: d014 beq.n 8006acc { /* set overall return value */ status = ret; 8006aa2: 7cfb ldrb r3, [r7, #19] 8006aa4: 74bb strb r3, [r7, #18] 8006aa6: e011 b.n 8006acc } #endif /* RCC_PLLSAI1_SUPPORT */ #if defined(STM32L471xx) || defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) || defined(STM32L496xx) || defined(STM32L4A6xx) else if(PeriphClkInit->AdcClockSelection == RCC_ADCCLKSOURCE_PLLSAI2) 8006aa8: 687b ldr r3, [r7, #4] 8006aaa: 6f9b ldr r3, [r3, #120] @ 0x78 8006aac: f1b3 5f00 cmp.w r3, #536870912 @ 0x20000000 8006ab0: d10c bne.n 8006acc { /* PLLSAI2 input clock, parameters M, N & R configuration and clock output (PLLSAI2ClockOut) */ ret = RCCEx_PLLSAI2_Config(&(PeriphClkInit->PLLSAI2), DIVIDER_R_UPDATE); 8006ab2: 687b ldr r3, [r7, #4] 8006ab4: 3320 adds r3, #32 8006ab6: 2102 movs r1, #2 8006ab8: 4618 mov r0, r3 8006aba: f000 f935 bl 8006d28 8006abe: 4603 mov r3, r0 8006ac0: 74fb strb r3, [r7, #19] if(ret != HAL_OK) 8006ac2: 7cfb ldrb r3, [r7, #19] 8006ac4: 2b00 cmp r3, #0 8006ac6: d001 beq.n 8006acc { /* set overall return value */ status = ret; 8006ac8: 7cfb ldrb r3, [r7, #19] 8006aca: 74bb strb r3, [r7, #18] #endif /* !STM32L412xx && !STM32L422xx */ #if defined(SWPMI1) /*-------------------------- SWPMI1 clock source configuration -------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SWPMI1) == RCC_PERIPHCLK_SWPMI1) 8006acc: 687b ldr r3, [r7, #4] 8006ace: 681b ldr r3, [r3, #0] 8006ad0: f403 4300 and.w r3, r3, #32768 @ 0x8000 8006ad4: 2b00 cmp r3, #0 8006ad6: d00a beq.n 8006aee { /* Check the parameters */ assert_param(IS_RCC_SWPMI1CLKSOURCE(PeriphClkInit->Swpmi1ClockSelection)); /* Configure the SWPMI1 clock source */ __HAL_RCC_SWPMI1_CONFIG(PeriphClkInit->Swpmi1ClockSelection); 8006ad8: 4b10 ldr r3, [pc, #64] @ (8006b1c ) 8006ada: f8d3 3088 ldr.w r3, [r3, #136] @ 0x88 8006ade: f023 4280 bic.w r2, r3, #1073741824 @ 0x40000000 8006ae2: 687b ldr r3, [r7, #4] 8006ae4: 6fdb ldr r3, [r3, #124] @ 0x7c 8006ae6: 490d ldr r1, [pc, #52] @ (8006b1c ) 8006ae8: 4313 orrs r3, r2 8006aea: f8c1 3088 str.w r3, [r1, #136] @ 0x88 #endif /* SWPMI1 */ #if defined(DFSDM1_Filter0) /*-------------------------- DFSDM1 clock source configuration -------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_DFSDM1) == RCC_PERIPHCLK_DFSDM1) 8006aee: 687b ldr r3, [r7, #4] 8006af0: 681b ldr r3, [r3, #0] 8006af2: f403 3380 and.w r3, r3, #65536 @ 0x10000 8006af6: 2b00 cmp r3, #0 8006af8: d00b beq.n 8006b12 { /* Check the parameters */ assert_param(IS_RCC_DFSDM1CLKSOURCE(PeriphClkInit->Dfsdm1ClockSelection)); /* Configure the DFSDM1 interface clock source */ __HAL_RCC_DFSDM1_CONFIG(PeriphClkInit->Dfsdm1ClockSelection); 8006afa: 4b08 ldr r3, [pc, #32] @ (8006b1c ) 8006afc: f8d3 3088 ldr.w r3, [r3, #136] @ 0x88 8006b00: f023 4200 bic.w r2, r3, #2147483648 @ 0x80000000 8006b04: 687b ldr r3, [r7, #4] 8006b06: f8d3 3080 ldr.w r3, [r3, #128] @ 0x80 8006b0a: 4904 ldr r1, [pc, #16] @ (8006b1c ) 8006b0c: 4313 orrs r3, r2 8006b0e: f8c1 3088 str.w r3, [r1, #136] @ 0x88 } } #endif /* OCTOSPI1 || OCTOSPI2 */ return status; 8006b12: 7cbb ldrb r3, [r7, #18] } 8006b14: 4618 mov r0, r3 8006b16: 3718 adds r7, #24 8006b18: 46bd mov sp, r7 8006b1a: bd80 pop {r7, pc} 8006b1c: 40021000 .word 0x40021000 08006b20 : * @note Prior to enable the PLL-mode of the MSI for automatic hardware * calibration LSE oscillator is to be enabled with HAL_RCC_OscConfig(). * @retval None */ void HAL_RCCEx_EnableMSIPLLMode(void) { 8006b20: b480 push {r7} 8006b22: af00 add r7, sp, #0 SET_BIT(RCC->CR, RCC_CR_MSIPLLEN) ; 8006b24: 4b05 ldr r3, [pc, #20] @ (8006b3c ) 8006b26: 681b ldr r3, [r3, #0] 8006b28: 4a04 ldr r2, [pc, #16] @ (8006b3c ) 8006b2a: f043 0304 orr.w r3, r3, #4 8006b2e: 6013 str r3, [r2, #0] } 8006b30: bf00 nop 8006b32: 46bd mov sp, r7 8006b34: f85d 7b04 ldr.w r7, [sp], #4 8006b38: 4770 bx lr 8006b3a: bf00 nop 8006b3c: 40021000 .word 0x40021000 08006b40 : * @note PLLSAI1 is temporary disable to apply new parameters * * @retval HAL status */ static HAL_StatusTypeDef RCCEx_PLLSAI1_Config(RCC_PLLSAI1InitTypeDef *PllSai1, uint32_t Divider) { 8006b40: b580 push {r7, lr} 8006b42: b084 sub sp, #16 8006b44: af00 add r7, sp, #0 8006b46: 6078 str r0, [r7, #4] 8006b48: 6039 str r1, [r7, #0] uint32_t tickstart; HAL_StatusTypeDef status = HAL_OK; 8006b4a: 2300 movs r3, #0 8006b4c: 73fb strb r3, [r7, #15] assert_param(IS_RCC_PLLSAI1M_VALUE(PllSai1->PLLSAI1M)); assert_param(IS_RCC_PLLSAI1N_VALUE(PllSai1->PLLSAI1N)); assert_param(IS_RCC_PLLSAI1CLOCKOUT_VALUE(PllSai1->PLLSAI1ClockOut)); /* Check that PLLSAI1 clock source and divider M can be applied */ if(__HAL_RCC_GET_PLL_OSCSOURCE() != RCC_PLLSOURCE_NONE) 8006b4e: 4b75 ldr r3, [pc, #468] @ (8006d24 ) 8006b50: 68db ldr r3, [r3, #12] 8006b52: f003 0303 and.w r3, r3, #3 8006b56: 2b00 cmp r3, #0 8006b58: d018 beq.n 8006b8c { /* PLL clock source and divider M already set, check that no request for change */ if((__HAL_RCC_GET_PLL_OSCSOURCE() != PllSai1->PLLSAI1Source) 8006b5a: 4b72 ldr r3, [pc, #456] @ (8006d24 ) 8006b5c: 68db ldr r3, [r3, #12] 8006b5e: f003 0203 and.w r2, r3, #3 8006b62: 687b ldr r3, [r7, #4] 8006b64: 681b ldr r3, [r3, #0] 8006b66: 429a cmp r2, r3 8006b68: d10d bne.n 8006b86 || (PllSai1->PLLSAI1Source == RCC_PLLSOURCE_NONE) 8006b6a: 687b ldr r3, [r7, #4] 8006b6c: 681b ldr r3, [r3, #0] || 8006b6e: 2b00 cmp r3, #0 8006b70: d009 beq.n 8006b86 #if !defined(RCC_PLLSAI1M_DIV_1_16_SUPPORT) || (((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLM) >> RCC_PLLCFGR_PLLM_Pos) + 1U) != PllSai1->PLLSAI1M) 8006b72: 4b6c ldr r3, [pc, #432] @ (8006d24 ) 8006b74: 68db ldr r3, [r3, #12] 8006b76: 091b lsrs r3, r3, #4 8006b78: f003 0307 and.w r3, r3, #7 8006b7c: 1c5a adds r2, r3, #1 8006b7e: 687b ldr r3, [r7, #4] 8006b80: 685b ldr r3, [r3, #4] || 8006b82: 429a cmp r2, r3 8006b84: d047 beq.n 8006c16 #endif ) { status = HAL_ERROR; 8006b86: 2301 movs r3, #1 8006b88: 73fb strb r3, [r7, #15] 8006b8a: e044 b.n 8006c16 } } else { /* Check PLLSAI1 clock source availability */ switch(PllSai1->PLLSAI1Source) 8006b8c: 687b ldr r3, [r7, #4] 8006b8e: 681b ldr r3, [r3, #0] 8006b90: 2b03 cmp r3, #3 8006b92: d018 beq.n 8006bc6 8006b94: 2b03 cmp r3, #3 8006b96: d825 bhi.n 8006be4 8006b98: 2b01 cmp r3, #1 8006b9a: d002 beq.n 8006ba2 8006b9c: 2b02 cmp r3, #2 8006b9e: d009 beq.n 8006bb4 8006ba0: e020 b.n 8006be4 { case RCC_PLLSOURCE_MSI: if(HAL_IS_BIT_CLR(RCC->CR, RCC_CR_MSIRDY)) 8006ba2: 4b60 ldr r3, [pc, #384] @ (8006d24 ) 8006ba4: 681b ldr r3, [r3, #0] 8006ba6: f003 0302 and.w r3, r3, #2 8006baa: 2b00 cmp r3, #0 8006bac: d11d bne.n 8006bea { status = HAL_ERROR; 8006bae: 2301 movs r3, #1 8006bb0: 73fb strb r3, [r7, #15] } break; 8006bb2: e01a b.n 8006bea case RCC_PLLSOURCE_HSI: if(HAL_IS_BIT_CLR(RCC->CR, RCC_CR_HSIRDY)) 8006bb4: 4b5b ldr r3, [pc, #364] @ (8006d24 ) 8006bb6: 681b ldr r3, [r3, #0] 8006bb8: f403 6380 and.w r3, r3, #1024 @ 0x400 8006bbc: 2b00 cmp r3, #0 8006bbe: d116 bne.n 8006bee { status = HAL_ERROR; 8006bc0: 2301 movs r3, #1 8006bc2: 73fb strb r3, [r7, #15] } break; 8006bc4: e013 b.n 8006bee case RCC_PLLSOURCE_HSE: if(HAL_IS_BIT_CLR(RCC->CR, RCC_CR_HSERDY)) 8006bc6: 4b57 ldr r3, [pc, #348] @ (8006d24 ) 8006bc8: 681b ldr r3, [r3, #0] 8006bca: f403 3300 and.w r3, r3, #131072 @ 0x20000 8006bce: 2b00 cmp r3, #0 8006bd0: d10f bne.n 8006bf2 { if(HAL_IS_BIT_CLR(RCC->CR, RCC_CR_HSEBYP)) 8006bd2: 4b54 ldr r3, [pc, #336] @ (8006d24 ) 8006bd4: 681b ldr r3, [r3, #0] 8006bd6: f403 2380 and.w r3, r3, #262144 @ 0x40000 8006bda: 2b00 cmp r3, #0 8006bdc: d109 bne.n 8006bf2 { status = HAL_ERROR; 8006bde: 2301 movs r3, #1 8006be0: 73fb strb r3, [r7, #15] } } break; 8006be2: e006 b.n 8006bf2 default: status = HAL_ERROR; 8006be4: 2301 movs r3, #1 8006be6: 73fb strb r3, [r7, #15] break; 8006be8: e004 b.n 8006bf4 break; 8006bea: bf00 nop 8006bec: e002 b.n 8006bf4 break; 8006bee: bf00 nop 8006bf0: e000 b.n 8006bf4 break; 8006bf2: bf00 nop } if(status == HAL_OK) 8006bf4: 7bfb ldrb r3, [r7, #15] 8006bf6: 2b00 cmp r3, #0 8006bf8: d10d bne.n 8006c16 #if defined(RCC_PLLSAI1M_DIV_1_16_SUPPORT) /* Set PLLSAI1 clock source */ MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC, PllSai1->PLLSAI1Source); #else /* Set PLLSAI1 clock source and divider M */ MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC | RCC_PLLCFGR_PLLM, PllSai1->PLLSAI1Source | (PllSai1->PLLSAI1M - 1U) << RCC_PLLCFGR_PLLM_Pos); 8006bfa: 4b4a ldr r3, [pc, #296] @ (8006d24 ) 8006bfc: 68db ldr r3, [r3, #12] 8006bfe: f023 0273 bic.w r2, r3, #115 @ 0x73 8006c02: 687b ldr r3, [r7, #4] 8006c04: 6819 ldr r1, [r3, #0] 8006c06: 687b ldr r3, [r7, #4] 8006c08: 685b ldr r3, [r3, #4] 8006c0a: 3b01 subs r3, #1 8006c0c: 011b lsls r3, r3, #4 8006c0e: 430b orrs r3, r1 8006c10: 4944 ldr r1, [pc, #272] @ (8006d24 ) 8006c12: 4313 orrs r3, r2 8006c14: 60cb str r3, [r1, #12] #endif } } if(status == HAL_OK) 8006c16: 7bfb ldrb r3, [r7, #15] 8006c18: 2b00 cmp r3, #0 8006c1a: d17d bne.n 8006d18 { /* Disable the PLLSAI1 */ __HAL_RCC_PLLSAI1_DISABLE(); 8006c1c: 4b41 ldr r3, [pc, #260] @ (8006d24 ) 8006c1e: 681b ldr r3, [r3, #0] 8006c20: 4a40 ldr r2, [pc, #256] @ (8006d24 ) 8006c22: f023 6380 bic.w r3, r3, #67108864 @ 0x4000000 8006c26: 6013 str r3, [r2, #0] /* Get Start Tick*/ tickstart = HAL_GetTick(); 8006c28: f7fd f816 bl 8003c58 8006c2c: 60b8 str r0, [r7, #8] /* Wait till PLLSAI1 is ready to be updated */ while(READ_BIT(RCC->CR, RCC_CR_PLLSAI1RDY) != 0U) 8006c2e: e009 b.n 8006c44 { if((HAL_GetTick() - tickstart) > PLLSAI1_TIMEOUT_VALUE) 8006c30: f7fd f812 bl 8003c58 8006c34: 4602 mov r2, r0 8006c36: 68bb ldr r3, [r7, #8] 8006c38: 1ad3 subs r3, r2, r3 8006c3a: 2b02 cmp r3, #2 8006c3c: d902 bls.n 8006c44 { status = HAL_TIMEOUT; 8006c3e: 2303 movs r3, #3 8006c40: 73fb strb r3, [r7, #15] break; 8006c42: e005 b.n 8006c50 while(READ_BIT(RCC->CR, RCC_CR_PLLSAI1RDY) != 0U) 8006c44: 4b37 ldr r3, [pc, #220] @ (8006d24 ) 8006c46: 681b ldr r3, [r3, #0] 8006c48: f003 6300 and.w r3, r3, #134217728 @ 0x8000000 8006c4c: 2b00 cmp r3, #0 8006c4e: d1ef bne.n 8006c30 } } if(status == HAL_OK) 8006c50: 7bfb ldrb r3, [r7, #15] 8006c52: 2b00 cmp r3, #0 8006c54: d160 bne.n 8006d18 { if(Divider == DIVIDER_P_UPDATE) 8006c56: 683b ldr r3, [r7, #0] 8006c58: 2b00 cmp r3, #0 8006c5a: d111 bne.n 8006c80 MODIFY_REG(RCC->PLLSAI1CFGR, RCC_PLLSAI1CFGR_PLLSAI1N | RCC_PLLSAI1CFGR_PLLSAI1PDIV, (PllSai1->PLLSAI1N << RCC_PLLSAI1CFGR_PLLSAI1N_Pos) | (PllSai1->PLLSAI1P << RCC_PLLSAI1CFGR_PLLSAI1PDIV_Pos)); #else MODIFY_REG(RCC->PLLSAI1CFGR, 8006c5c: 4b31 ldr r3, [pc, #196] @ (8006d24 ) 8006c5e: 691b ldr r3, [r3, #16] 8006c60: f423 331f bic.w r3, r3, #162816 @ 0x27c00 8006c64: f423 7340 bic.w r3, r3, #768 @ 0x300 8006c68: 687a ldr r2, [r7, #4] 8006c6a: 6892 ldr r2, [r2, #8] 8006c6c: 0211 lsls r1, r2, #8 8006c6e: 687a ldr r2, [r7, #4] 8006c70: 68d2 ldr r2, [r2, #12] 8006c72: 0912 lsrs r2, r2, #4 8006c74: 0452 lsls r2, r2, #17 8006c76: 430a orrs r2, r1 8006c78: 492a ldr r1, [pc, #168] @ (8006d24 ) 8006c7a: 4313 orrs r3, r2 8006c7c: 610b str r3, [r1, #16] 8006c7e: e027 b.n 8006cd0 ((PllSai1->PLLSAI1P >> 4U) << RCC_PLLSAI1CFGR_PLLSAI1P_Pos)); #endif /* RCC_PLLSAI1P_DIV_2_31_SUPPORT */ #endif /* RCC_PLLSAI1M_DIV_1_16_SUPPORT */ } else if(Divider == DIVIDER_Q_UPDATE) 8006c80: 683b ldr r3, [r7, #0] 8006c82: 2b01 cmp r3, #1 8006c84: d112 bne.n 8006cac (PllSai1->PLLSAI1N << RCC_PLLSAI1CFGR_PLLSAI1N_Pos) | (((PllSai1->PLLSAI1Q >> 1U) - 1U) << RCC_PLLSAI1CFGR_PLLSAI1Q_Pos) | ((PllSai1->PLLSAI1M - 1U) << RCC_PLLSAI1CFGR_PLLSAI1M_Pos)); #else /* Configure the PLLSAI1 Division factor Q and Multiplication factor N*/ MODIFY_REG(RCC->PLLSAI1CFGR, 8006c86: 4b27 ldr r3, [pc, #156] @ (8006d24 ) 8006c88: 691b ldr r3, [r3, #16] 8006c8a: f423 03c0 bic.w r3, r3, #6291456 @ 0x600000 8006c8e: f423 43fe bic.w r3, r3, #32512 @ 0x7f00 8006c92: 687a ldr r2, [r7, #4] 8006c94: 6892 ldr r2, [r2, #8] 8006c96: 0211 lsls r1, r2, #8 8006c98: 687a ldr r2, [r7, #4] 8006c9a: 6912 ldr r2, [r2, #16] 8006c9c: 0852 lsrs r2, r2, #1 8006c9e: 3a01 subs r2, #1 8006ca0: 0552 lsls r2, r2, #21 8006ca2: 430a orrs r2, r1 8006ca4: 491f ldr r1, [pc, #124] @ (8006d24 ) 8006ca6: 4313 orrs r3, r2 8006ca8: 610b str r3, [r1, #16] 8006caa: e011 b.n 8006cd0 (PllSai1->PLLSAI1N << RCC_PLLSAI1CFGR_PLLSAI1N_Pos) | (((PllSai1->PLLSAI1R >> 1U) - 1U) << RCC_PLLSAI1CFGR_PLLSAI1R_Pos) | ((PllSai1->PLLSAI1M - 1U) << RCC_PLLSAI1CFGR_PLLSAI1M_Pos)); #else /* Configure the PLLSAI1 Division factor R and Multiplication factor N*/ MODIFY_REG(RCC->PLLSAI1CFGR, 8006cac: 4b1d ldr r3, [pc, #116] @ (8006d24 ) 8006cae: 691b ldr r3, [r3, #16] 8006cb0: f023 63c0 bic.w r3, r3, #100663296 @ 0x6000000 8006cb4: f423 43fe bic.w r3, r3, #32512 @ 0x7f00 8006cb8: 687a ldr r2, [r7, #4] 8006cba: 6892 ldr r2, [r2, #8] 8006cbc: 0211 lsls r1, r2, #8 8006cbe: 687a ldr r2, [r7, #4] 8006cc0: 6952 ldr r2, [r2, #20] 8006cc2: 0852 lsrs r2, r2, #1 8006cc4: 3a01 subs r2, #1 8006cc6: 0652 lsls r2, r2, #25 8006cc8: 430a orrs r2, r1 8006cca: 4916 ldr r1, [pc, #88] @ (8006d24 ) 8006ccc: 4313 orrs r3, r2 8006cce: 610b str r3, [r1, #16] (((PllSai1->PLLSAI1R >> 1U) - 1U) << RCC_PLLSAI1CFGR_PLLSAI1R_Pos)); #endif /* RCC_PLLSAI1M_DIV_1_16_SUPPORT */ } /* Enable the PLLSAI1 again by setting PLLSAI1ON to 1*/ __HAL_RCC_PLLSAI1_ENABLE(); 8006cd0: 4b14 ldr r3, [pc, #80] @ (8006d24 ) 8006cd2: 681b ldr r3, [r3, #0] 8006cd4: 4a13 ldr r2, [pc, #76] @ (8006d24 ) 8006cd6: f043 6380 orr.w r3, r3, #67108864 @ 0x4000000 8006cda: 6013 str r3, [r2, #0] /* Get Start Tick*/ tickstart = HAL_GetTick(); 8006cdc: f7fc ffbc bl 8003c58 8006ce0: 60b8 str r0, [r7, #8] /* Wait till PLLSAI1 is ready */ while(READ_BIT(RCC->CR, RCC_CR_PLLSAI1RDY) == 0U) 8006ce2: e009 b.n 8006cf8 { if((HAL_GetTick() - tickstart) > PLLSAI1_TIMEOUT_VALUE) 8006ce4: f7fc ffb8 bl 8003c58 8006ce8: 4602 mov r2, r0 8006cea: 68bb ldr r3, [r7, #8] 8006cec: 1ad3 subs r3, r2, r3 8006cee: 2b02 cmp r3, #2 8006cf0: d902 bls.n 8006cf8 { status = HAL_TIMEOUT; 8006cf2: 2303 movs r3, #3 8006cf4: 73fb strb r3, [r7, #15] break; 8006cf6: e005 b.n 8006d04 while(READ_BIT(RCC->CR, RCC_CR_PLLSAI1RDY) == 0U) 8006cf8: 4b0a ldr r3, [pc, #40] @ (8006d24 ) 8006cfa: 681b ldr r3, [r3, #0] 8006cfc: f003 6300 and.w r3, r3, #134217728 @ 0x8000000 8006d00: 2b00 cmp r3, #0 8006d02: d0ef beq.n 8006ce4 } } if(status == HAL_OK) 8006d04: 7bfb ldrb r3, [r7, #15] 8006d06: 2b00 cmp r3, #0 8006d08: d106 bne.n 8006d18 { /* Configure the PLLSAI1 Clock output(s) */ __HAL_RCC_PLLSAI1CLKOUT_ENABLE(PllSai1->PLLSAI1ClockOut); 8006d0a: 4b06 ldr r3, [pc, #24] @ (8006d24 ) 8006d0c: 691a ldr r2, [r3, #16] 8006d0e: 687b ldr r3, [r7, #4] 8006d10: 699b ldr r3, [r3, #24] 8006d12: 4904 ldr r1, [pc, #16] @ (8006d24 ) 8006d14: 4313 orrs r3, r2 8006d16: 610b str r3, [r1, #16] } } } return status; 8006d18: 7bfb ldrb r3, [r7, #15] } 8006d1a: 4618 mov r0, r3 8006d1c: 3710 adds r7, #16 8006d1e: 46bd mov sp, r7 8006d20: bd80 pop {r7, pc} 8006d22: bf00 nop 8006d24: 40021000 .word 0x40021000 08006d28 : * @note PLLSAI2 is temporary disable to apply new parameters * * @retval HAL status */ static HAL_StatusTypeDef RCCEx_PLLSAI2_Config(RCC_PLLSAI2InitTypeDef *PllSai2, uint32_t Divider) { 8006d28: b580 push {r7, lr} 8006d2a: b084 sub sp, #16 8006d2c: af00 add r7, sp, #0 8006d2e: 6078 str r0, [r7, #4] 8006d30: 6039 str r1, [r7, #0] uint32_t tickstart; HAL_StatusTypeDef status = HAL_OK; 8006d32: 2300 movs r3, #0 8006d34: 73fb strb r3, [r7, #15] assert_param(IS_RCC_PLLSAI2M_VALUE(PllSai2->PLLSAI2M)); assert_param(IS_RCC_PLLSAI2N_VALUE(PllSai2->PLLSAI2N)); assert_param(IS_RCC_PLLSAI2CLOCKOUT_VALUE(PllSai2->PLLSAI2ClockOut)); /* Check that PLLSAI2 clock source and divider M can be applied */ if(__HAL_RCC_GET_PLL_OSCSOURCE() != RCC_PLLSOURCE_NONE) 8006d36: 4b6a ldr r3, [pc, #424] @ (8006ee0 ) 8006d38: 68db ldr r3, [r3, #12] 8006d3a: f003 0303 and.w r3, r3, #3 8006d3e: 2b00 cmp r3, #0 8006d40: d018 beq.n 8006d74 { /* PLL clock source and divider M already set, check that no request for change */ if((__HAL_RCC_GET_PLL_OSCSOURCE() != PllSai2->PLLSAI2Source) 8006d42: 4b67 ldr r3, [pc, #412] @ (8006ee0 ) 8006d44: 68db ldr r3, [r3, #12] 8006d46: f003 0203 and.w r2, r3, #3 8006d4a: 687b ldr r3, [r7, #4] 8006d4c: 681b ldr r3, [r3, #0] 8006d4e: 429a cmp r2, r3 8006d50: d10d bne.n 8006d6e || (PllSai2->PLLSAI2Source == RCC_PLLSOURCE_NONE) 8006d52: 687b ldr r3, [r7, #4] 8006d54: 681b ldr r3, [r3, #0] || 8006d56: 2b00 cmp r3, #0 8006d58: d009 beq.n 8006d6e #if !defined(RCC_PLLSAI2M_DIV_1_16_SUPPORT) || (((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLM) >> RCC_PLLCFGR_PLLM_Pos) + 1U) != PllSai2->PLLSAI2M) 8006d5a: 4b61 ldr r3, [pc, #388] @ (8006ee0 ) 8006d5c: 68db ldr r3, [r3, #12] 8006d5e: 091b lsrs r3, r3, #4 8006d60: f003 0307 and.w r3, r3, #7 8006d64: 1c5a adds r2, r3, #1 8006d66: 687b ldr r3, [r7, #4] 8006d68: 685b ldr r3, [r3, #4] || 8006d6a: 429a cmp r2, r3 8006d6c: d047 beq.n 8006dfe #endif ) { status = HAL_ERROR; 8006d6e: 2301 movs r3, #1 8006d70: 73fb strb r3, [r7, #15] 8006d72: e044 b.n 8006dfe } } else { /* Check PLLSAI2 clock source availability */ switch(PllSai2->PLLSAI2Source) 8006d74: 687b ldr r3, [r7, #4] 8006d76: 681b ldr r3, [r3, #0] 8006d78: 2b03 cmp r3, #3 8006d7a: d018 beq.n 8006dae 8006d7c: 2b03 cmp r3, #3 8006d7e: d825 bhi.n 8006dcc 8006d80: 2b01 cmp r3, #1 8006d82: d002 beq.n 8006d8a 8006d84: 2b02 cmp r3, #2 8006d86: d009 beq.n 8006d9c 8006d88: e020 b.n 8006dcc { case RCC_PLLSOURCE_MSI: if(HAL_IS_BIT_CLR(RCC->CR, RCC_CR_MSIRDY)) 8006d8a: 4b55 ldr r3, [pc, #340] @ (8006ee0 ) 8006d8c: 681b ldr r3, [r3, #0] 8006d8e: f003 0302 and.w r3, r3, #2 8006d92: 2b00 cmp r3, #0 8006d94: d11d bne.n 8006dd2 { status = HAL_ERROR; 8006d96: 2301 movs r3, #1 8006d98: 73fb strb r3, [r7, #15] } break; 8006d9a: e01a b.n 8006dd2 case RCC_PLLSOURCE_HSI: if(HAL_IS_BIT_CLR(RCC->CR, RCC_CR_HSIRDY)) 8006d9c: 4b50 ldr r3, [pc, #320] @ (8006ee0 ) 8006d9e: 681b ldr r3, [r3, #0] 8006da0: f403 6380 and.w r3, r3, #1024 @ 0x400 8006da4: 2b00 cmp r3, #0 8006da6: d116 bne.n 8006dd6 { status = HAL_ERROR; 8006da8: 2301 movs r3, #1 8006daa: 73fb strb r3, [r7, #15] } break; 8006dac: e013 b.n 8006dd6 case RCC_PLLSOURCE_HSE: if(HAL_IS_BIT_CLR(RCC->CR, RCC_CR_HSERDY)) 8006dae: 4b4c ldr r3, [pc, #304] @ (8006ee0 ) 8006db0: 681b ldr r3, [r3, #0] 8006db2: f403 3300 and.w r3, r3, #131072 @ 0x20000 8006db6: 2b00 cmp r3, #0 8006db8: d10f bne.n 8006dda { if(HAL_IS_BIT_CLR(RCC->CR, RCC_CR_HSEBYP)) 8006dba: 4b49 ldr r3, [pc, #292] @ (8006ee0 ) 8006dbc: 681b ldr r3, [r3, #0] 8006dbe: f403 2380 and.w r3, r3, #262144 @ 0x40000 8006dc2: 2b00 cmp r3, #0 8006dc4: d109 bne.n 8006dda { status = HAL_ERROR; 8006dc6: 2301 movs r3, #1 8006dc8: 73fb strb r3, [r7, #15] } } break; 8006dca: e006 b.n 8006dda default: status = HAL_ERROR; 8006dcc: 2301 movs r3, #1 8006dce: 73fb strb r3, [r7, #15] break; 8006dd0: e004 b.n 8006ddc break; 8006dd2: bf00 nop 8006dd4: e002 b.n 8006ddc break; 8006dd6: bf00 nop 8006dd8: e000 b.n 8006ddc break; 8006dda: bf00 nop } if(status == HAL_OK) 8006ddc: 7bfb ldrb r3, [r7, #15] 8006dde: 2b00 cmp r3, #0 8006de0: d10d bne.n 8006dfe #if defined(RCC_PLLSAI2M_DIV_1_16_SUPPORT) /* Set PLLSAI2 clock source */ MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC, PllSai2->PLLSAI2Source); #else /* Set PLLSAI2 clock source and divider M */ MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC | RCC_PLLCFGR_PLLM, PllSai2->PLLSAI2Source | (PllSai2->PLLSAI2M - 1U) << RCC_PLLCFGR_PLLM_Pos); 8006de2: 4b3f ldr r3, [pc, #252] @ (8006ee0 ) 8006de4: 68db ldr r3, [r3, #12] 8006de6: f023 0273 bic.w r2, r3, #115 @ 0x73 8006dea: 687b ldr r3, [r7, #4] 8006dec: 6819 ldr r1, [r3, #0] 8006dee: 687b ldr r3, [r7, #4] 8006df0: 685b ldr r3, [r3, #4] 8006df2: 3b01 subs r3, #1 8006df4: 011b lsls r3, r3, #4 8006df6: 430b orrs r3, r1 8006df8: 4939 ldr r1, [pc, #228] @ (8006ee0 ) 8006dfa: 4313 orrs r3, r2 8006dfc: 60cb str r3, [r1, #12] #endif } } if(status == HAL_OK) 8006dfe: 7bfb ldrb r3, [r7, #15] 8006e00: 2b00 cmp r3, #0 8006e02: d167 bne.n 8006ed4 { /* Disable the PLLSAI2 */ __HAL_RCC_PLLSAI2_DISABLE(); 8006e04: 4b36 ldr r3, [pc, #216] @ (8006ee0 ) 8006e06: 681b ldr r3, [r3, #0] 8006e08: 4a35 ldr r2, [pc, #212] @ (8006ee0 ) 8006e0a: f023 5380 bic.w r3, r3, #268435456 @ 0x10000000 8006e0e: 6013 str r3, [r2, #0] /* Get Start Tick*/ tickstart = HAL_GetTick(); 8006e10: f7fc ff22 bl 8003c58 8006e14: 60b8 str r0, [r7, #8] /* Wait till PLLSAI2 is ready to be updated */ while(READ_BIT(RCC->CR, RCC_CR_PLLSAI2RDY) != 0U) 8006e16: e009 b.n 8006e2c { if((HAL_GetTick() - tickstart) > PLLSAI2_TIMEOUT_VALUE) 8006e18: f7fc ff1e bl 8003c58 8006e1c: 4602 mov r2, r0 8006e1e: 68bb ldr r3, [r7, #8] 8006e20: 1ad3 subs r3, r2, r3 8006e22: 2b02 cmp r3, #2 8006e24: d902 bls.n 8006e2c { status = HAL_TIMEOUT; 8006e26: 2303 movs r3, #3 8006e28: 73fb strb r3, [r7, #15] break; 8006e2a: e005 b.n 8006e38 while(READ_BIT(RCC->CR, RCC_CR_PLLSAI2RDY) != 0U) 8006e2c: 4b2c ldr r3, [pc, #176] @ (8006ee0 ) 8006e2e: 681b ldr r3, [r3, #0] 8006e30: f003 5300 and.w r3, r3, #536870912 @ 0x20000000 8006e34: 2b00 cmp r3, #0 8006e36: d1ef bne.n 8006e18 } } if(status == HAL_OK) 8006e38: 7bfb ldrb r3, [r7, #15] 8006e3a: 2b00 cmp r3, #0 8006e3c: d14a bne.n 8006ed4 { if(Divider == DIVIDER_P_UPDATE) 8006e3e: 683b ldr r3, [r7, #0] 8006e40: 2b00 cmp r3, #0 8006e42: d111 bne.n 8006e68 MODIFY_REG(RCC->PLLSAI2CFGR, RCC_PLLSAI2CFGR_PLLSAI2N | RCC_PLLSAI2CFGR_PLLSAI2PDIV, (PllSai2->PLLSAI2N << RCC_PLLSAI2CFGR_PLLSAI2N_Pos) | (PllSai2->PLLSAI2P << RCC_PLLSAI2CFGR_PLLSAI2PDIV_Pos)); #else MODIFY_REG(RCC->PLLSAI2CFGR, 8006e44: 4b26 ldr r3, [pc, #152] @ (8006ee0 ) 8006e46: 695b ldr r3, [r3, #20] 8006e48: f423 331f bic.w r3, r3, #162816 @ 0x27c00 8006e4c: f423 7340 bic.w r3, r3, #768 @ 0x300 8006e50: 687a ldr r2, [r7, #4] 8006e52: 6892 ldr r2, [r2, #8] 8006e54: 0211 lsls r1, r2, #8 8006e56: 687a ldr r2, [r7, #4] 8006e58: 68d2 ldr r2, [r2, #12] 8006e5a: 0912 lsrs r2, r2, #4 8006e5c: 0452 lsls r2, r2, #17 8006e5e: 430a orrs r2, r1 8006e60: 491f ldr r1, [pc, #124] @ (8006ee0 ) 8006e62: 4313 orrs r3, r2 8006e64: 614b str r3, [r1, #20] 8006e66: e011 b.n 8006e8c (PllSai2->PLLSAI2N << RCC_PLLSAI2CFGR_PLLSAI2N_Pos) | (((PllSai2->PLLSAI2R >> 1U) - 1U) << RCC_PLLSAI2CFGR_PLLSAI2R_Pos) | ((PllSai2->PLLSAI2M - 1U) << RCC_PLLSAI2CFGR_PLLSAI2M_Pos)); #else /* Configure the PLLSAI2 Division factor R and Multiplication factor N*/ MODIFY_REG(RCC->PLLSAI2CFGR, 8006e68: 4b1d ldr r3, [pc, #116] @ (8006ee0 ) 8006e6a: 695b ldr r3, [r3, #20] 8006e6c: f023 63c0 bic.w r3, r3, #100663296 @ 0x6000000 8006e70: f423 43fe bic.w r3, r3, #32512 @ 0x7f00 8006e74: 687a ldr r2, [r7, #4] 8006e76: 6892 ldr r2, [r2, #8] 8006e78: 0211 lsls r1, r2, #8 8006e7a: 687a ldr r2, [r7, #4] 8006e7c: 6912 ldr r2, [r2, #16] 8006e7e: 0852 lsrs r2, r2, #1 8006e80: 3a01 subs r2, #1 8006e82: 0652 lsls r2, r2, #25 8006e84: 430a orrs r2, r1 8006e86: 4916 ldr r1, [pc, #88] @ (8006ee0 ) 8006e88: 4313 orrs r3, r2 8006e8a: 614b str r3, [r1, #20] (((PllSai2->PLLSAI2R >> 1U) - 1U) << RCC_PLLSAI2CFGR_PLLSAI2R_Pos)); #endif /* RCC_PLLSAI2M_DIV_1_16_SUPPORT */ } /* Enable the PLLSAI2 again by setting PLLSAI2ON to 1*/ __HAL_RCC_PLLSAI2_ENABLE(); 8006e8c: 4b14 ldr r3, [pc, #80] @ (8006ee0 ) 8006e8e: 681b ldr r3, [r3, #0] 8006e90: 4a13 ldr r2, [pc, #76] @ (8006ee0 ) 8006e92: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 8006e96: 6013 str r3, [r2, #0] /* Get Start Tick*/ tickstart = HAL_GetTick(); 8006e98: f7fc fede bl 8003c58 8006e9c: 60b8 str r0, [r7, #8] /* Wait till PLLSAI2 is ready */ while(READ_BIT(RCC->CR, RCC_CR_PLLSAI2RDY) == 0U) 8006e9e: e009 b.n 8006eb4 { if((HAL_GetTick() - tickstart) > PLLSAI2_TIMEOUT_VALUE) 8006ea0: f7fc feda bl 8003c58 8006ea4: 4602 mov r2, r0 8006ea6: 68bb ldr r3, [r7, #8] 8006ea8: 1ad3 subs r3, r2, r3 8006eaa: 2b02 cmp r3, #2 8006eac: d902 bls.n 8006eb4 { status = HAL_TIMEOUT; 8006eae: 2303 movs r3, #3 8006eb0: 73fb strb r3, [r7, #15] break; 8006eb2: e005 b.n 8006ec0 while(READ_BIT(RCC->CR, RCC_CR_PLLSAI2RDY) == 0U) 8006eb4: 4b0a ldr r3, [pc, #40] @ (8006ee0 ) 8006eb6: 681b ldr r3, [r3, #0] 8006eb8: f003 5300 and.w r3, r3, #536870912 @ 0x20000000 8006ebc: 2b00 cmp r3, #0 8006ebe: d0ef beq.n 8006ea0 } } if(status == HAL_OK) 8006ec0: 7bfb ldrb r3, [r7, #15] 8006ec2: 2b00 cmp r3, #0 8006ec4: d106 bne.n 8006ed4 { /* Configure the PLLSAI2 Clock output(s) */ __HAL_RCC_PLLSAI2CLKOUT_ENABLE(PllSai2->PLLSAI2ClockOut); 8006ec6: 4b06 ldr r3, [pc, #24] @ (8006ee0 ) 8006ec8: 695a ldr r2, [r3, #20] 8006eca: 687b ldr r3, [r7, #4] 8006ecc: 695b ldr r3, [r3, #20] 8006ece: 4904 ldr r1, [pc, #16] @ (8006ee0 ) 8006ed0: 4313 orrs r3, r2 8006ed2: 614b str r3, [r1, #20] } } } return status; 8006ed4: 7bfb ldrb r3, [r7, #15] } 8006ed6: 4618 mov r0, r3 8006ed8: 3710 adds r7, #16 8006eda: 46bd mov sp, r7 8006edc: bd80 pop {r7, pc} 8006ede: bf00 nop 8006ee0: 40021000 .word 0x40021000 08006ee4 : * @param hspi pointer to a SPI_HandleTypeDef structure that contains * the configuration information for SPI module. * @retval HAL status */ HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi) { 8006ee4: b580 push {r7, lr} 8006ee6: b084 sub sp, #16 8006ee8: af00 add r7, sp, #0 8006eea: 6078 str r0, [r7, #4] uint32_t frxth; /* Check the SPI handle allocation */ if (hspi == NULL) 8006eec: 687b ldr r3, [r7, #4] 8006eee: 2b00 cmp r3, #0 8006ef0: d101 bne.n 8006ef6 { return HAL_ERROR; 8006ef2: 2301 movs r3, #1 8006ef4: e095 b.n 8007022 assert_param(IS_SPI_NSS(hspi->Init.NSS)); assert_param(IS_SPI_NSSP(hspi->Init.NSSPMode)); assert_param(IS_SPI_BAUDRATE_PRESCALER(hspi->Init.BaudRatePrescaler)); assert_param(IS_SPI_FIRST_BIT(hspi->Init.FirstBit)); assert_param(IS_SPI_TIMODE(hspi->Init.TIMode)); if (hspi->Init.TIMode == SPI_TIMODE_DISABLE) 8006ef6: 687b ldr r3, [r7, #4] 8006ef8: 6a5b ldr r3, [r3, #36] @ 0x24 8006efa: 2b00 cmp r3, #0 8006efc: d108 bne.n 8006f10 { assert_param(IS_SPI_CPOL(hspi->Init.CLKPolarity)); assert_param(IS_SPI_CPHA(hspi->Init.CLKPhase)); if (hspi->Init.Mode == SPI_MODE_MASTER) 8006efe: 687b ldr r3, [r7, #4] 8006f00: 685b ldr r3, [r3, #4] 8006f02: f5b3 7f82 cmp.w r3, #260 @ 0x104 8006f06: d009 beq.n 8006f1c assert_param(IS_SPI_BAUDRATE_PRESCALER(hspi->Init.BaudRatePrescaler)); } else { /* Baudrate prescaler not use in Motoraola Slave mode. force to default value */ hspi->Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2; 8006f08: 687b ldr r3, [r7, #4] 8006f0a: 2200 movs r2, #0 8006f0c: 61da str r2, [r3, #28] 8006f0e: e005 b.n 8006f1c else { assert_param(IS_SPI_BAUDRATE_PRESCALER(hspi->Init.BaudRatePrescaler)); /* Force polarity and phase to TI protocaol requirements */ hspi->Init.CLKPolarity = SPI_POLARITY_LOW; 8006f10: 687b ldr r3, [r7, #4] 8006f12: 2200 movs r2, #0 8006f14: 611a str r2, [r3, #16] hspi->Init.CLKPhase = SPI_PHASE_1EDGE; 8006f16: 687b ldr r3, [r7, #4] 8006f18: 2200 movs r2, #0 8006f1a: 615a str r2, [r3, #20] { assert_param(IS_SPI_CRC_POLYNOMIAL(hspi->Init.CRCPolynomial)); assert_param(IS_SPI_CRC_LENGTH(hspi->Init.CRCLength)); } #else hspi->Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE; 8006f1c: 687b ldr r3, [r7, #4] 8006f1e: 2200 movs r2, #0 8006f20: 629a str r2, [r3, #40] @ 0x28 #endif /* USE_SPI_CRC */ if (hspi->State == HAL_SPI_STATE_RESET) 8006f22: 687b ldr r3, [r7, #4] 8006f24: f893 305d ldrb.w r3, [r3, #93] @ 0x5d 8006f28: b2db uxtb r3, r3 8006f2a: 2b00 cmp r3, #0 8006f2c: d106 bne.n 8006f3c { /* Allocate lock resource and initialize it */ hspi->Lock = HAL_UNLOCKED; 8006f2e: 687b ldr r3, [r7, #4] 8006f30: 2200 movs r2, #0 8006f32: f883 205c strb.w r2, [r3, #92] @ 0x5c /* Init the low level hardware : GPIO, CLOCK, NVIC... */ hspi->MspInitCallback(hspi); #else /* Init the low level hardware : GPIO, CLOCK, NVIC... */ HAL_SPI_MspInit(hspi); 8006f36: 6878 ldr r0, [r7, #4] 8006f38: f7fc faf0 bl 800351c #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ } hspi->State = HAL_SPI_STATE_BUSY; 8006f3c: 687b ldr r3, [r7, #4] 8006f3e: 2202 movs r2, #2 8006f40: f883 205d strb.w r2, [r3, #93] @ 0x5d /* Disable the selected SPI peripheral */ __HAL_SPI_DISABLE(hspi); 8006f44: 687b ldr r3, [r7, #4] 8006f46: 681b ldr r3, [r3, #0] 8006f48: 681a ldr r2, [r3, #0] 8006f4a: 687b ldr r3, [r7, #4] 8006f4c: 681b ldr r3, [r3, #0] 8006f4e: f022 0240 bic.w r2, r2, #64 @ 0x40 8006f52: 601a str r2, [r3, #0] /* Align by default the rs fifo threshold on the data size */ if (hspi->Init.DataSize > SPI_DATASIZE_8BIT) 8006f54: 687b ldr r3, [r7, #4] 8006f56: 68db ldr r3, [r3, #12] 8006f58: f5b3 6fe0 cmp.w r3, #1792 @ 0x700 8006f5c: d902 bls.n 8006f64 { frxth = SPI_RXFIFO_THRESHOLD_HF; 8006f5e: 2300 movs r3, #0 8006f60: 60fb str r3, [r7, #12] 8006f62: e002 b.n 8006f6a } else { frxth = SPI_RXFIFO_THRESHOLD_QF; 8006f64: f44f 5380 mov.w r3, #4096 @ 0x1000 8006f68: 60fb str r3, [r7, #12] } /* CRC calculation is valid only for 16Bit and 8 Bit */ if ((hspi->Init.DataSize != SPI_DATASIZE_16BIT) && (hspi->Init.DataSize != SPI_DATASIZE_8BIT)) 8006f6a: 687b ldr r3, [r7, #4] 8006f6c: 68db ldr r3, [r3, #12] 8006f6e: f5b3 6f70 cmp.w r3, #3840 @ 0xf00 8006f72: d007 beq.n 8006f84 8006f74: 687b ldr r3, [r7, #4] 8006f76: 68db ldr r3, [r3, #12] 8006f78: f5b3 6fe0 cmp.w r3, #1792 @ 0x700 8006f7c: d002 beq.n 8006f84 { /* CRC must be disabled */ hspi->Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE; 8006f7e: 687b ldr r3, [r7, #4] 8006f80: 2200 movs r2, #0 8006f82: 629a str r2, [r3, #40] @ 0x28 } /*----------------------- SPIx CR1 & CR2 Configuration ---------------------*/ /* Configure : SPI Mode, Communication Mode, Clock polarity and phase, NSS management, Communication speed, First bit and CRC calculation state */ WRITE_REG(hspi->Instance->CR1, ((hspi->Init.Mode & (SPI_CR1_MSTR | SPI_CR1_SSI)) | 8006f84: 687b ldr r3, [r7, #4] 8006f86: 685b ldr r3, [r3, #4] 8006f88: f403 7282 and.w r2, r3, #260 @ 0x104 8006f8c: 687b ldr r3, [r7, #4] 8006f8e: 689b ldr r3, [r3, #8] 8006f90: f403 4304 and.w r3, r3, #33792 @ 0x8400 8006f94: 431a orrs r2, r3 8006f96: 687b ldr r3, [r7, #4] 8006f98: 691b ldr r3, [r3, #16] 8006f9a: f003 0302 and.w r3, r3, #2 8006f9e: 431a orrs r2, r3 8006fa0: 687b ldr r3, [r7, #4] 8006fa2: 695b ldr r3, [r3, #20] 8006fa4: f003 0301 and.w r3, r3, #1 8006fa8: 431a orrs r2, r3 8006faa: 687b ldr r3, [r7, #4] 8006fac: 699b ldr r3, [r3, #24] 8006fae: f403 7300 and.w r3, r3, #512 @ 0x200 8006fb2: 431a orrs r2, r3 8006fb4: 687b ldr r3, [r7, #4] 8006fb6: 69db ldr r3, [r3, #28] 8006fb8: f003 0338 and.w r3, r3, #56 @ 0x38 8006fbc: 431a orrs r2, r3 8006fbe: 687b ldr r3, [r7, #4] 8006fc0: 6a1b ldr r3, [r3, #32] 8006fc2: f003 0380 and.w r3, r3, #128 @ 0x80 8006fc6: ea42 0103 orr.w r1, r2, r3 8006fca: 687b ldr r3, [r7, #4] 8006fcc: 6a9b ldr r3, [r3, #40] @ 0x28 8006fce: f403 5200 and.w r2, r3, #8192 @ 0x2000 8006fd2: 687b ldr r3, [r7, #4] 8006fd4: 681b ldr r3, [r3, #0] 8006fd6: 430a orrs r2, r1 8006fd8: 601a str r2, [r3, #0] } } #endif /* USE_SPI_CRC */ /* Configure : NSS management, TI Mode, NSS Pulse, Data size and Rx Fifo threshold */ WRITE_REG(hspi->Instance->CR2, (((hspi->Init.NSS >> 16U) & SPI_CR2_SSOE) | 8006fda: 687b ldr r3, [r7, #4] 8006fdc: 699b ldr r3, [r3, #24] 8006fde: 0c1b lsrs r3, r3, #16 8006fe0: f003 0204 and.w r2, r3, #4 8006fe4: 687b ldr r3, [r7, #4] 8006fe6: 6a5b ldr r3, [r3, #36] @ 0x24 8006fe8: f003 0310 and.w r3, r3, #16 8006fec: 431a orrs r2, r3 8006fee: 687b ldr r3, [r7, #4] 8006ff0: 6b5b ldr r3, [r3, #52] @ 0x34 8006ff2: f003 0308 and.w r3, r3, #8 8006ff6: 431a orrs r2, r3 8006ff8: 687b ldr r3, [r7, #4] 8006ffa: 68db ldr r3, [r3, #12] 8006ffc: f403 6370 and.w r3, r3, #3840 @ 0xf00 8007000: ea42 0103 orr.w r1, r2, r3 8007004: 68fb ldr r3, [r7, #12] 8007006: f403 5280 and.w r2, r3, #4096 @ 0x1000 800700a: 687b ldr r3, [r7, #4] 800700c: 681b ldr r3, [r3, #0] 800700e: 430a orrs r2, r1 8007010: 605a str r2, [r3, #4] #if defined(SPI_I2SCFGR_I2SMOD) /* Activate the SPI mode (Make sure that I2SMOD bit in I2SCFGR register is reset) */ CLEAR_BIT(hspi->Instance->I2SCFGR, SPI_I2SCFGR_I2SMOD); #endif /* SPI_I2SCFGR_I2SMOD */ hspi->ErrorCode = HAL_SPI_ERROR_NONE; 8007012: 687b ldr r3, [r7, #4] 8007014: 2200 movs r2, #0 8007016: 661a str r2, [r3, #96] @ 0x60 hspi->State = HAL_SPI_STATE_READY; 8007018: 687b ldr r3, [r7, #4] 800701a: 2201 movs r2, #1 800701c: f883 205d strb.w r2, [r3, #93] @ 0x5d return HAL_OK; 8007020: 2300 movs r3, #0 } 8007022: 4618 mov r0, r3 8007024: 3710 adds r7, #16 8007026: 46bd mov sp, r7 8007028: bd80 pop {r7, pc} 0800702a : * @param hspi pointer to a SPI_HandleTypeDef structure that contains * the configuration information for SPI module. * @retval HAL status */ HAL_StatusTypeDef HAL_SPI_DeInit(SPI_HandleTypeDef *hspi) { 800702a: b580 push {r7, lr} 800702c: b082 sub sp, #8 800702e: af00 add r7, sp, #0 8007030: 6078 str r0, [r7, #4] /* Check the SPI handle allocation */ if (hspi == NULL) 8007032: 687b ldr r3, [r7, #4] 8007034: 2b00 cmp r3, #0 8007036: d101 bne.n 800703c { return HAL_ERROR; 8007038: 2301 movs r3, #1 800703a: e01a b.n 8007072 } /* Check SPI Instance parameter */ assert_param(IS_SPI_ALL_INSTANCE(hspi->Instance)); hspi->State = HAL_SPI_STATE_BUSY; 800703c: 687b ldr r3, [r7, #4] 800703e: 2202 movs r2, #2 8007040: f883 205d strb.w r2, [r3, #93] @ 0x5d /* Disable the SPI Peripheral Clock */ __HAL_SPI_DISABLE(hspi); 8007044: 687b ldr r3, [r7, #4] 8007046: 681b ldr r3, [r3, #0] 8007048: 681a ldr r2, [r3, #0] 800704a: 687b ldr r3, [r7, #4] 800704c: 681b ldr r3, [r3, #0] 800704e: f022 0240 bic.w r2, r2, #64 @ 0x40 8007052: 601a str r2, [r3, #0] /* DeInit the low level hardware: GPIO, CLOCK, NVIC... */ hspi->MspDeInitCallback(hspi); #else /* DeInit the low level hardware: GPIO, CLOCK, NVIC... */ HAL_SPI_MspDeInit(hspi); 8007054: 6878 ldr r0, [r7, #4] 8007056: f7fc faa5 bl 80035a4 #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ hspi->ErrorCode = HAL_SPI_ERROR_NONE; 800705a: 687b ldr r3, [r7, #4] 800705c: 2200 movs r2, #0 800705e: 661a str r2, [r3, #96] @ 0x60 hspi->State = HAL_SPI_STATE_RESET; 8007060: 687b ldr r3, [r7, #4] 8007062: 2200 movs r2, #0 8007064: f883 205d strb.w r2, [r3, #93] @ 0x5d /* Release Lock */ __HAL_UNLOCK(hspi); 8007068: 687b ldr r3, [r7, #4] 800706a: 2200 movs r2, #0 800706c: f883 205c strb.w r2, [r3, #92] @ 0x5c return HAL_OK; 8007070: 2300 movs r3, #0 } 8007072: 4618 mov r0, r3 8007074: 3708 adds r7, #8 8007076: 46bd mov sp, r7 8007078: bd80 pop {r7, pc} 0800707a : * @param Size amount of data to be received * @param Timeout Timeout duration * @retval HAL status */ HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout) { 800707a: b580 push {r7, lr} 800707c: b088 sub sp, #32 800707e: af02 add r7, sp, #8 8007080: 60f8 str r0, [r7, #12] 8007082: 60b9 str r1, [r7, #8] 8007084: 603b str r3, [r7, #0] 8007086: 4613 mov r3, r2 8007088: 80fb strh r3, [r7, #6] __IO uint8_t *ptmpreg8; __IO uint8_t tmpreg8 = 0; #endif /* USE_SPI_CRC */ uint32_t tickstart; if (hspi->State != HAL_SPI_STATE_READY) 800708a: 68fb ldr r3, [r7, #12] 800708c: f893 305d ldrb.w r3, [r3, #93] @ 0x5d 8007090: b2db uxtb r3, r3 8007092: 2b01 cmp r3, #1 8007094: d001 beq.n 800709a { return HAL_BUSY; 8007096: 2302 movs r3, #2 8007098: e123 b.n 80072e2 } if ((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES)) 800709a: 68fb ldr r3, [r7, #12] 800709c: 685b ldr r3, [r3, #4] 800709e: f5b3 7f82 cmp.w r3, #260 @ 0x104 80070a2: d112 bne.n 80070ca 80070a4: 68fb ldr r3, [r7, #12] 80070a6: 689b ldr r3, [r3, #8] 80070a8: 2b00 cmp r3, #0 80070aa: d10e bne.n 80070ca { hspi->State = HAL_SPI_STATE_BUSY_RX; 80070ac: 68fb ldr r3, [r7, #12] 80070ae: 2204 movs r2, #4 80070b0: f883 205d strb.w r2, [r3, #93] @ 0x5d /* Call transmit-receive function to send Dummy data on Tx line and generate clock on CLK line */ return HAL_SPI_TransmitReceive(hspi, pData, pData, Size, Timeout); 80070b4: 88fa ldrh r2, [r7, #6] 80070b6: 683b ldr r3, [r7, #0] 80070b8: 9300 str r3, [sp, #0] 80070ba: 4613 mov r3, r2 80070bc: 68ba ldr r2, [r7, #8] 80070be: 68b9 ldr r1, [r7, #8] 80070c0: 68f8 ldr r0, [r7, #12] 80070c2: f000 f912 bl 80072ea 80070c6: 4603 mov r3, r0 80070c8: e10b b.n 80072e2 } /* Init tickstart for timeout management*/ tickstart = HAL_GetTick(); 80070ca: f7fc fdc5 bl 8003c58 80070ce: 6178 str r0, [r7, #20] if ((pData == NULL) || (Size == 0U)) 80070d0: 68bb ldr r3, [r7, #8] 80070d2: 2b00 cmp r3, #0 80070d4: d002 beq.n 80070dc 80070d6: 88fb ldrh r3, [r7, #6] 80070d8: 2b00 cmp r3, #0 80070da: d101 bne.n 80070e0 { return HAL_ERROR; 80070dc: 2301 movs r3, #1 80070de: e100 b.n 80072e2 } /* Process Locked */ __HAL_LOCK(hspi); 80070e0: 68fb ldr r3, [r7, #12] 80070e2: f893 305c ldrb.w r3, [r3, #92] @ 0x5c 80070e6: 2b01 cmp r3, #1 80070e8: d101 bne.n 80070ee 80070ea: 2302 movs r3, #2 80070ec: e0f9 b.n 80072e2 80070ee: 68fb ldr r3, [r7, #12] 80070f0: 2201 movs r2, #1 80070f2: f883 205c strb.w r2, [r3, #92] @ 0x5c /* Set the transaction information */ hspi->State = HAL_SPI_STATE_BUSY_RX; 80070f6: 68fb ldr r3, [r7, #12] 80070f8: 2204 movs r2, #4 80070fa: f883 205d strb.w r2, [r3, #93] @ 0x5d hspi->ErrorCode = HAL_SPI_ERROR_NONE; 80070fe: 68fb ldr r3, [r7, #12] 8007100: 2200 movs r2, #0 8007102: 661a str r2, [r3, #96] @ 0x60 hspi->pRxBuffPtr = (uint8_t *)pData; 8007104: 68fb ldr r3, [r7, #12] 8007106: 68ba ldr r2, [r7, #8] 8007108: 641a str r2, [r3, #64] @ 0x40 hspi->RxXferSize = Size; 800710a: 68fb ldr r3, [r7, #12] 800710c: 88fa ldrh r2, [r7, #6] 800710e: f8a3 2044 strh.w r2, [r3, #68] @ 0x44 hspi->RxXferCount = Size; 8007112: 68fb ldr r3, [r7, #12] 8007114: 88fa ldrh r2, [r7, #6] 8007116: f8a3 2046 strh.w r2, [r3, #70] @ 0x46 /*Init field not used in handle to zero */ hspi->pTxBuffPtr = (uint8_t *)NULL; 800711a: 68fb ldr r3, [r7, #12] 800711c: 2200 movs r2, #0 800711e: 639a str r2, [r3, #56] @ 0x38 hspi->TxXferSize = 0U; 8007120: 68fb ldr r3, [r7, #12] 8007122: 2200 movs r2, #0 8007124: 879a strh r2, [r3, #60] @ 0x3c hspi->TxXferCount = 0U; 8007126: 68fb ldr r3, [r7, #12] 8007128: 2200 movs r2, #0 800712a: 87da strh r2, [r3, #62] @ 0x3e hspi->RxISR = NULL; 800712c: 68fb ldr r3, [r7, #12] 800712e: 2200 movs r2, #0 8007130: 64da str r2, [r3, #76] @ 0x4c hspi->TxISR = NULL; 8007132: 68fb ldr r3, [r7, #12] 8007134: 2200 movs r2, #0 8007136: 651a str r2, [r3, #80] @ 0x50 hspi->RxXferCount--; } #endif /* USE_SPI_CRC */ /* Set the Rx Fifo threshold */ if (hspi->Init.DataSize > SPI_DATASIZE_8BIT) 8007138: 68fb ldr r3, [r7, #12] 800713a: 68db ldr r3, [r3, #12] 800713c: f5b3 6fe0 cmp.w r3, #1792 @ 0x700 8007140: d908 bls.n 8007154 { /* Set RX Fifo threshold according the reception data length: 16bit */ CLEAR_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD); 8007142: 68fb ldr r3, [r7, #12] 8007144: 681b ldr r3, [r3, #0] 8007146: 685a ldr r2, [r3, #4] 8007148: 68fb ldr r3, [r7, #12] 800714a: 681b ldr r3, [r3, #0] 800714c: f422 5280 bic.w r2, r2, #4096 @ 0x1000 8007150: 605a str r2, [r3, #4] 8007152: e007 b.n 8007164 } else { /* Set RX Fifo threshold according the reception data length: 8bit */ SET_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD); 8007154: 68fb ldr r3, [r7, #12] 8007156: 681b ldr r3, [r3, #0] 8007158: 685a ldr r2, [r3, #4] 800715a: 68fb ldr r3, [r7, #12] 800715c: 681b ldr r3, [r3, #0] 800715e: f442 5280 orr.w r2, r2, #4096 @ 0x1000 8007162: 605a str r2, [r3, #4] } /* Configure communication direction: 1Line */ if (hspi->Init.Direction == SPI_DIRECTION_1LINE) 8007164: 68fb ldr r3, [r7, #12] 8007166: 689b ldr r3, [r3, #8] 8007168: f5b3 4f00 cmp.w r3, #32768 @ 0x8000 800716c: d10f bne.n 800718e { /* Disable SPI Peripheral before set 1Line direction (BIDIOE bit) */ __HAL_SPI_DISABLE(hspi); 800716e: 68fb ldr r3, [r7, #12] 8007170: 681b ldr r3, [r3, #0] 8007172: 681a ldr r2, [r3, #0] 8007174: 68fb ldr r3, [r7, #12] 8007176: 681b ldr r3, [r3, #0] 8007178: f022 0240 bic.w r2, r2, #64 @ 0x40 800717c: 601a str r2, [r3, #0] SPI_1LINE_RX(hspi); 800717e: 68fb ldr r3, [r7, #12] 8007180: 681b ldr r3, [r3, #0] 8007182: 681a ldr r2, [r3, #0] 8007184: 68fb ldr r3, [r7, #12] 8007186: 681b ldr r3, [r3, #0] 8007188: f422 4280 bic.w r2, r2, #16384 @ 0x4000 800718c: 601a str r2, [r3, #0] } /* Check if the SPI is already enabled */ if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE) 800718e: 68fb ldr r3, [r7, #12] 8007190: 681b ldr r3, [r3, #0] 8007192: 681b ldr r3, [r3, #0] 8007194: f003 0340 and.w r3, r3, #64 @ 0x40 8007198: 2b40 cmp r3, #64 @ 0x40 800719a: d007 beq.n 80071ac { /* Enable SPI peripheral */ __HAL_SPI_ENABLE(hspi); 800719c: 68fb ldr r3, [r7, #12] 800719e: 681b ldr r3, [r3, #0] 80071a0: 681a ldr r2, [r3, #0] 80071a2: 68fb ldr r3, [r7, #12] 80071a4: 681b ldr r3, [r3, #0] 80071a6: f042 0240 orr.w r2, r2, #64 @ 0x40 80071aa: 601a str r2, [r3, #0] } /* Receive data in 8 Bit mode */ if (hspi->Init.DataSize <= SPI_DATASIZE_8BIT) 80071ac: 68fb ldr r3, [r7, #12] 80071ae: 68db ldr r3, [r3, #12] 80071b0: f5b3 6fe0 cmp.w r3, #1792 @ 0x700 80071b4: d875 bhi.n 80072a2 { /* Transfer loop */ while (hspi->RxXferCount > 0U) 80071b6: e037 b.n 8007228 { /* Check the RXNE flag */ if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_RXNE)) 80071b8: 68fb ldr r3, [r7, #12] 80071ba: 681b ldr r3, [r3, #0] 80071bc: 689b ldr r3, [r3, #8] 80071be: f003 0301 and.w r3, r3, #1 80071c2: 2b01 cmp r3, #1 80071c4: d117 bne.n 80071f6 { /* read the received data */ (* (uint8_t *)hspi->pRxBuffPtr) = *(__IO uint8_t *)&hspi->Instance->DR; 80071c6: 68fb ldr r3, [r7, #12] 80071c8: 681b ldr r3, [r3, #0] 80071ca: f103 020c add.w r2, r3, #12 80071ce: 68fb ldr r3, [r7, #12] 80071d0: 6c1b ldr r3, [r3, #64] @ 0x40 80071d2: 7812 ldrb r2, [r2, #0] 80071d4: b2d2 uxtb r2, r2 80071d6: 701a strb r2, [r3, #0] hspi->pRxBuffPtr += sizeof(uint8_t); 80071d8: 68fb ldr r3, [r7, #12] 80071da: 6c1b ldr r3, [r3, #64] @ 0x40 80071dc: 1c5a adds r2, r3, #1 80071de: 68fb ldr r3, [r7, #12] 80071e0: 641a str r2, [r3, #64] @ 0x40 hspi->RxXferCount--; 80071e2: 68fb ldr r3, [r7, #12] 80071e4: f8b3 3046 ldrh.w r3, [r3, #70] @ 0x46 80071e8: b29b uxth r3, r3 80071ea: 3b01 subs r3, #1 80071ec: b29a uxth r2, r3 80071ee: 68fb ldr r3, [r7, #12] 80071f0: f8a3 2046 strh.w r2, [r3, #70] @ 0x46 80071f4: e018 b.n 8007228 } else { /* Timeout management */ if ((((HAL_GetTick() - tickstart) >= Timeout) && (Timeout != HAL_MAX_DELAY)) || (Timeout == 0U)) 80071f6: f7fc fd2f bl 8003c58 80071fa: 4602 mov r2, r0 80071fc: 697b ldr r3, [r7, #20] 80071fe: 1ad3 subs r3, r2, r3 8007200: 683a ldr r2, [r7, #0] 8007202: 429a cmp r2, r3 8007204: d803 bhi.n 800720e 8007206: 683b ldr r3, [r7, #0] 8007208: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff 800720c: d102 bne.n 8007214 800720e: 683b ldr r3, [r7, #0] 8007210: 2b00 cmp r3, #0 8007212: d109 bne.n 8007228 { hspi->State = HAL_SPI_STATE_READY; 8007214: 68fb ldr r3, [r7, #12] 8007216: 2201 movs r2, #1 8007218: f883 205d strb.w r2, [r3, #93] @ 0x5d __HAL_UNLOCK(hspi); 800721c: 68fb ldr r3, [r7, #12] 800721e: 2200 movs r2, #0 8007220: f883 205c strb.w r2, [r3, #92] @ 0x5c return HAL_TIMEOUT; 8007224: 2303 movs r3, #3 8007226: e05c b.n 80072e2 while (hspi->RxXferCount > 0U) 8007228: 68fb ldr r3, [r7, #12] 800722a: f8b3 3046 ldrh.w r3, [r3, #70] @ 0x46 800722e: b29b uxth r3, r3 8007230: 2b00 cmp r3, #0 8007232: d1c1 bne.n 80071b8 8007234: e03b b.n 80072ae { /* Transfer loop */ while (hspi->RxXferCount > 0U) { /* Check the RXNE flag */ if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_RXNE)) 8007236: 68fb ldr r3, [r7, #12] 8007238: 681b ldr r3, [r3, #0] 800723a: 689b ldr r3, [r3, #8] 800723c: f003 0301 and.w r3, r3, #1 8007240: 2b01 cmp r3, #1 8007242: d115 bne.n 8007270 { *((uint16_t *)hspi->pRxBuffPtr) = (uint16_t)hspi->Instance->DR; 8007244: 68fb ldr r3, [r7, #12] 8007246: 681b ldr r3, [r3, #0] 8007248: 68da ldr r2, [r3, #12] 800724a: 68fb ldr r3, [r7, #12] 800724c: 6c1b ldr r3, [r3, #64] @ 0x40 800724e: b292 uxth r2, r2 8007250: 801a strh r2, [r3, #0] hspi->pRxBuffPtr += sizeof(uint16_t); 8007252: 68fb ldr r3, [r7, #12] 8007254: 6c1b ldr r3, [r3, #64] @ 0x40 8007256: 1c9a adds r2, r3, #2 8007258: 68fb ldr r3, [r7, #12] 800725a: 641a str r2, [r3, #64] @ 0x40 hspi->RxXferCount--; 800725c: 68fb ldr r3, [r7, #12] 800725e: f8b3 3046 ldrh.w r3, [r3, #70] @ 0x46 8007262: b29b uxth r3, r3 8007264: 3b01 subs r3, #1 8007266: b29a uxth r2, r3 8007268: 68fb ldr r3, [r7, #12] 800726a: f8a3 2046 strh.w r2, [r3, #70] @ 0x46 800726e: e018 b.n 80072a2 } else { /* Timeout management */ if ((((HAL_GetTick() - tickstart) >= Timeout) && (Timeout != HAL_MAX_DELAY)) || (Timeout == 0U)) 8007270: f7fc fcf2 bl 8003c58 8007274: 4602 mov r2, r0 8007276: 697b ldr r3, [r7, #20] 8007278: 1ad3 subs r3, r2, r3 800727a: 683a ldr r2, [r7, #0] 800727c: 429a cmp r2, r3 800727e: d803 bhi.n 8007288 8007280: 683b ldr r3, [r7, #0] 8007282: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff 8007286: d102 bne.n 800728e 8007288: 683b ldr r3, [r7, #0] 800728a: 2b00 cmp r3, #0 800728c: d109 bne.n 80072a2 { hspi->State = HAL_SPI_STATE_READY; 800728e: 68fb ldr r3, [r7, #12] 8007290: 2201 movs r2, #1 8007292: f883 205d strb.w r2, [r3, #93] @ 0x5d __HAL_UNLOCK(hspi); 8007296: 68fb ldr r3, [r7, #12] 8007298: 2200 movs r2, #0 800729a: f883 205c strb.w r2, [r3, #92] @ 0x5c return HAL_TIMEOUT; 800729e: 2303 movs r3, #3 80072a0: e01f b.n 80072e2 while (hspi->RxXferCount > 0U) 80072a2: 68fb ldr r3, [r7, #12] 80072a4: f8b3 3046 ldrh.w r3, [r3, #70] @ 0x46 80072a8: b29b uxth r3, r3 80072aa: 2b00 cmp r3, #0 80072ac: d1c3 bne.n 8007236 } } #endif /* USE_SPI_CRC */ /* Check the end of the transaction */ if (SPI_EndRxTransaction(hspi, Timeout, tickstart) != HAL_OK) 80072ae: 697a ldr r2, [r7, #20] 80072b0: 6839 ldr r1, [r7, #0] 80072b2: 68f8 ldr r0, [r7, #12] 80072b4: f000 fffa bl 80082ac 80072b8: 4603 mov r3, r0 80072ba: 2b00 cmp r3, #0 80072bc: d002 beq.n 80072c4 { hspi->ErrorCode = HAL_SPI_ERROR_FLAG; 80072be: 68fb ldr r3, [r7, #12] 80072c0: 2220 movs r2, #32 80072c2: 661a str r2, [r3, #96] @ 0x60 SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC); __HAL_SPI_CLEAR_CRCERRFLAG(hspi); } #endif /* USE_SPI_CRC */ hspi->State = HAL_SPI_STATE_READY; 80072c4: 68fb ldr r3, [r7, #12] 80072c6: 2201 movs r2, #1 80072c8: f883 205d strb.w r2, [r3, #93] @ 0x5d /* Unlock the process */ __HAL_UNLOCK(hspi); 80072cc: 68fb ldr r3, [r7, #12] 80072ce: 2200 movs r2, #0 80072d0: f883 205c strb.w r2, [r3, #92] @ 0x5c if (hspi->ErrorCode != HAL_SPI_ERROR_NONE) 80072d4: 68fb ldr r3, [r7, #12] 80072d6: 6e1b ldr r3, [r3, #96] @ 0x60 80072d8: 2b00 cmp r3, #0 80072da: d001 beq.n 80072e0 { return HAL_ERROR; 80072dc: 2301 movs r3, #1 80072de: e000 b.n 80072e2 } else { return HAL_OK; 80072e0: 2300 movs r3, #0 } } 80072e2: 4618 mov r0, r3 80072e4: 3718 adds r7, #24 80072e6: 46bd mov sp, r7 80072e8: bd80 pop {r7, pc} 080072ea : * @param Timeout Timeout duration * @retval HAL status */ HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, const uint8_t *pTxData, uint8_t *pRxData, uint16_t Size, uint32_t Timeout) { 80072ea: b580 push {r7, lr} 80072ec: b08a sub sp, #40 @ 0x28 80072ee: af00 add r7, sp, #0 80072f0: 60f8 str r0, [r7, #12] 80072f2: 60b9 str r1, [r7, #8] 80072f4: 607a str r2, [r7, #4] 80072f6: 807b strh r3, [r7, #2] __IO uint8_t *ptmpreg8; __IO uint8_t tmpreg8 = 0; #endif /* USE_SPI_CRC */ /* Variable used to alternate Rx and Tx during transfer */ uint32_t txallowed = 1U; 80072f8: 2301 movs r3, #1 80072fa: 627b str r3, [r7, #36] @ 0x24 /* Check Direction parameter */ assert_param(IS_SPI_DIRECTION_2LINES(hspi->Init.Direction)); /* Init tickstart for timeout management*/ tickstart = HAL_GetTick(); 80072fc: f7fc fcac bl 8003c58 8007300: 6238 str r0, [r7, #32] /* Init temporary variables */ tmp_state = hspi->State; 8007302: 68fb ldr r3, [r7, #12] 8007304: f893 305d ldrb.w r3, [r3, #93] @ 0x5d 8007308: 77fb strb r3, [r7, #31] tmp_mode = hspi->Init.Mode; 800730a: 68fb ldr r3, [r7, #12] 800730c: 685b ldr r3, [r3, #4] 800730e: 61bb str r3, [r7, #24] initial_TxXferCount = Size; 8007310: 887b ldrh r3, [r7, #2] 8007312: 82fb strh r3, [r7, #22] initial_RxXferCount = Size; 8007314: 887b ldrh r3, [r7, #2] 8007316: 82bb strh r3, [r7, #20] #if (USE_SPI_CRC != 0U) spi_cr1 = READ_REG(hspi->Instance->CR1); spi_cr2 = READ_REG(hspi->Instance->CR2); #endif /* USE_SPI_CRC */ if (!((tmp_state == HAL_SPI_STATE_READY) || \ 8007318: 7ffb ldrb r3, [r7, #31] 800731a: 2b01 cmp r3, #1 800731c: d00c beq.n 8007338 800731e: 69bb ldr r3, [r7, #24] 8007320: f5b3 7f82 cmp.w r3, #260 @ 0x104 8007324: d106 bne.n 8007334 ((tmp_mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && 8007326: 68fb ldr r3, [r7, #12] 8007328: 689b ldr r3, [r3, #8] 800732a: 2b00 cmp r3, #0 800732c: d102 bne.n 8007334 800732e: 7ffb ldrb r3, [r7, #31] 8007330: 2b04 cmp r3, #4 8007332: d001 beq.n 8007338 (tmp_state == HAL_SPI_STATE_BUSY_RX)))) { return HAL_BUSY; 8007334: 2302 movs r3, #2 8007336: e1f3 b.n 8007720 } if ((pTxData == NULL) || (pRxData == NULL) || (Size == 0U)) 8007338: 68bb ldr r3, [r7, #8] 800733a: 2b00 cmp r3, #0 800733c: d005 beq.n 800734a 800733e: 687b ldr r3, [r7, #4] 8007340: 2b00 cmp r3, #0 8007342: d002 beq.n 800734a 8007344: 887b ldrh r3, [r7, #2] 8007346: 2b00 cmp r3, #0 8007348: d101 bne.n 800734e { return HAL_ERROR; 800734a: 2301 movs r3, #1 800734c: e1e8 b.n 8007720 } /* Process Locked */ __HAL_LOCK(hspi); 800734e: 68fb ldr r3, [r7, #12] 8007350: f893 305c ldrb.w r3, [r3, #92] @ 0x5c 8007354: 2b01 cmp r3, #1 8007356: d101 bne.n 800735c 8007358: 2302 movs r3, #2 800735a: e1e1 b.n 8007720 800735c: 68fb ldr r3, [r7, #12] 800735e: 2201 movs r2, #1 8007360: f883 205c strb.w r2, [r3, #92] @ 0x5c /* Don't overwrite in case of HAL_SPI_STATE_BUSY_RX */ if (hspi->State != HAL_SPI_STATE_BUSY_RX) 8007364: 68fb ldr r3, [r7, #12] 8007366: f893 305d ldrb.w r3, [r3, #93] @ 0x5d 800736a: b2db uxtb r3, r3 800736c: 2b04 cmp r3, #4 800736e: d003 beq.n 8007378 { hspi->State = HAL_SPI_STATE_BUSY_TX_RX; 8007370: 68fb ldr r3, [r7, #12] 8007372: 2205 movs r2, #5 8007374: f883 205d strb.w r2, [r3, #93] @ 0x5d } /* Set the transaction information */ hspi->ErrorCode = HAL_SPI_ERROR_NONE; 8007378: 68fb ldr r3, [r7, #12] 800737a: 2200 movs r2, #0 800737c: 661a str r2, [r3, #96] @ 0x60 hspi->pRxBuffPtr = (uint8_t *)pRxData; 800737e: 68fb ldr r3, [r7, #12] 8007380: 687a ldr r2, [r7, #4] 8007382: 641a str r2, [r3, #64] @ 0x40 hspi->RxXferCount = Size; 8007384: 68fb ldr r3, [r7, #12] 8007386: 887a ldrh r2, [r7, #2] 8007388: f8a3 2046 strh.w r2, [r3, #70] @ 0x46 hspi->RxXferSize = Size; 800738c: 68fb ldr r3, [r7, #12] 800738e: 887a ldrh r2, [r7, #2] 8007390: f8a3 2044 strh.w r2, [r3, #68] @ 0x44 hspi->pTxBuffPtr = (const uint8_t *)pTxData; 8007394: 68fb ldr r3, [r7, #12] 8007396: 68ba ldr r2, [r7, #8] 8007398: 639a str r2, [r3, #56] @ 0x38 hspi->TxXferCount = Size; 800739a: 68fb ldr r3, [r7, #12] 800739c: 887a ldrh r2, [r7, #2] 800739e: 87da strh r2, [r3, #62] @ 0x3e hspi->TxXferSize = Size; 80073a0: 68fb ldr r3, [r7, #12] 80073a2: 887a ldrh r2, [r7, #2] 80073a4: 879a strh r2, [r3, #60] @ 0x3c /*Init field not used in handle to zero */ hspi->RxISR = NULL; 80073a6: 68fb ldr r3, [r7, #12] 80073a8: 2200 movs r2, #0 80073aa: 64da str r2, [r3, #76] @ 0x4c hspi->TxISR = NULL; 80073ac: 68fb ldr r3, [r7, #12] 80073ae: 2200 movs r2, #0 80073b0: 651a str r2, [r3, #80] @ 0x50 SPI_RESET_CRC(hspi); } #endif /* USE_SPI_CRC */ /* Set the Rx Fifo threshold */ if ((hspi->Init.DataSize > SPI_DATASIZE_8BIT) || (initial_RxXferCount > 1U)) 80073b2: 68fb ldr r3, [r7, #12] 80073b4: 68db ldr r3, [r3, #12] 80073b6: f5b3 6fe0 cmp.w r3, #1792 @ 0x700 80073ba: d802 bhi.n 80073c2 80073bc: 8abb ldrh r3, [r7, #20] 80073be: 2b01 cmp r3, #1 80073c0: d908 bls.n 80073d4 { /* Set fiforxthreshold according the reception data length: 16bit */ CLEAR_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD); 80073c2: 68fb ldr r3, [r7, #12] 80073c4: 681b ldr r3, [r3, #0] 80073c6: 685a ldr r2, [r3, #4] 80073c8: 68fb ldr r3, [r7, #12] 80073ca: 681b ldr r3, [r3, #0] 80073cc: f422 5280 bic.w r2, r2, #4096 @ 0x1000 80073d0: 605a str r2, [r3, #4] 80073d2: e007 b.n 80073e4 } else { /* Set fiforxthreshold according the reception data length: 8bit */ SET_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD); 80073d4: 68fb ldr r3, [r7, #12] 80073d6: 681b ldr r3, [r3, #0] 80073d8: 685a ldr r2, [r3, #4] 80073da: 68fb ldr r3, [r7, #12] 80073dc: 681b ldr r3, [r3, #0] 80073de: f442 5280 orr.w r2, r2, #4096 @ 0x1000 80073e2: 605a str r2, [r3, #4] } /* Check if the SPI is already enabled */ if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE) 80073e4: 68fb ldr r3, [r7, #12] 80073e6: 681b ldr r3, [r3, #0] 80073e8: 681b ldr r3, [r3, #0] 80073ea: f003 0340 and.w r3, r3, #64 @ 0x40 80073ee: 2b40 cmp r3, #64 @ 0x40 80073f0: d007 beq.n 8007402 { /* Enable SPI peripheral */ __HAL_SPI_ENABLE(hspi); 80073f2: 68fb ldr r3, [r7, #12] 80073f4: 681b ldr r3, [r3, #0] 80073f6: 681a ldr r2, [r3, #0] 80073f8: 68fb ldr r3, [r7, #12] 80073fa: 681b ldr r3, [r3, #0] 80073fc: f042 0240 orr.w r2, r2, #64 @ 0x40 8007400: 601a str r2, [r3, #0] } /* Transmit and Receive data in 16 Bit mode */ if (hspi->Init.DataSize > SPI_DATASIZE_8BIT) 8007402: 68fb ldr r3, [r7, #12] 8007404: 68db ldr r3, [r3, #12] 8007406: f5b3 6fe0 cmp.w r3, #1792 @ 0x700 800740a: f240 8083 bls.w 8007514 { if ((hspi->Init.Mode == SPI_MODE_SLAVE) || (initial_TxXferCount == 0x01U)) 800740e: 68fb ldr r3, [r7, #12] 8007410: 685b ldr r3, [r3, #4] 8007412: 2b00 cmp r3, #0 8007414: d002 beq.n 800741c 8007416: 8afb ldrh r3, [r7, #22] 8007418: 2b01 cmp r3, #1 800741a: d16f bne.n 80074fc { hspi->Instance->DR = *((const uint16_t *)hspi->pTxBuffPtr); 800741c: 68fb ldr r3, [r7, #12] 800741e: 6b9b ldr r3, [r3, #56] @ 0x38 8007420: 881a ldrh r2, [r3, #0] 8007422: 68fb ldr r3, [r7, #12] 8007424: 681b ldr r3, [r3, #0] 8007426: 60da str r2, [r3, #12] hspi->pTxBuffPtr += sizeof(uint16_t); 8007428: 68fb ldr r3, [r7, #12] 800742a: 6b9b ldr r3, [r3, #56] @ 0x38 800742c: 1c9a adds r2, r3, #2 800742e: 68fb ldr r3, [r7, #12] 8007430: 639a str r2, [r3, #56] @ 0x38 hspi->TxXferCount--; 8007432: 68fb ldr r3, [r7, #12] 8007434: 8fdb ldrh r3, [r3, #62] @ 0x3e 8007436: b29b uxth r3, r3 8007438: 3b01 subs r3, #1 800743a: b29a uxth r2, r3 800743c: 68fb ldr r3, [r7, #12] 800743e: 87da strh r2, [r3, #62] @ 0x3e SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT); } #endif /* USE_SPI_CRC */ } while ((hspi->TxXferCount > 0U) || (hspi->RxXferCount > 0U)) 8007440: e05c b.n 80074fc { /* Check TXE flag */ if ((__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE)) && (hspi->TxXferCount > 0U) && (txallowed == 1U)) 8007442: 68fb ldr r3, [r7, #12] 8007444: 681b ldr r3, [r3, #0] 8007446: 689b ldr r3, [r3, #8] 8007448: f003 0302 and.w r3, r3, #2 800744c: 2b02 cmp r3, #2 800744e: d11b bne.n 8007488 8007450: 68fb ldr r3, [r7, #12] 8007452: 8fdb ldrh r3, [r3, #62] @ 0x3e 8007454: b29b uxth r3, r3 8007456: 2b00 cmp r3, #0 8007458: d016 beq.n 8007488 800745a: 6a7b ldr r3, [r7, #36] @ 0x24 800745c: 2b01 cmp r3, #1 800745e: d113 bne.n 8007488 { hspi->Instance->DR = *((const uint16_t *)hspi->pTxBuffPtr); 8007460: 68fb ldr r3, [r7, #12] 8007462: 6b9b ldr r3, [r3, #56] @ 0x38 8007464: 881a ldrh r2, [r3, #0] 8007466: 68fb ldr r3, [r7, #12] 8007468: 681b ldr r3, [r3, #0] 800746a: 60da str r2, [r3, #12] hspi->pTxBuffPtr += sizeof(uint16_t); 800746c: 68fb ldr r3, [r7, #12] 800746e: 6b9b ldr r3, [r3, #56] @ 0x38 8007470: 1c9a adds r2, r3, #2 8007472: 68fb ldr r3, [r7, #12] 8007474: 639a str r2, [r3, #56] @ 0x38 hspi->TxXferCount--; 8007476: 68fb ldr r3, [r7, #12] 8007478: 8fdb ldrh r3, [r3, #62] @ 0x3e 800747a: b29b uxth r3, r3 800747c: 3b01 subs r3, #1 800747e: b29a uxth r2, r3 8007480: 68fb ldr r3, [r7, #12] 8007482: 87da strh r2, [r3, #62] @ 0x3e /* Next Data is a reception (Rx). Tx not allowed */ txallowed = 0U; 8007484: 2300 movs r3, #0 8007486: 627b str r3, [r7, #36] @ 0x24 } #endif /* USE_SPI_CRC */ } /* Check RXNE flag */ if ((__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_RXNE)) && (hspi->RxXferCount > 0U)) 8007488: 68fb ldr r3, [r7, #12] 800748a: 681b ldr r3, [r3, #0] 800748c: 689b ldr r3, [r3, #8] 800748e: f003 0301 and.w r3, r3, #1 8007492: 2b01 cmp r3, #1 8007494: d11c bne.n 80074d0 8007496: 68fb ldr r3, [r7, #12] 8007498: f8b3 3046 ldrh.w r3, [r3, #70] @ 0x46 800749c: b29b uxth r3, r3 800749e: 2b00 cmp r3, #0 80074a0: d016 beq.n 80074d0 { *((uint16_t *)hspi->pRxBuffPtr) = (uint16_t)hspi->Instance->DR; 80074a2: 68fb ldr r3, [r7, #12] 80074a4: 681b ldr r3, [r3, #0] 80074a6: 68da ldr r2, [r3, #12] 80074a8: 68fb ldr r3, [r7, #12] 80074aa: 6c1b ldr r3, [r3, #64] @ 0x40 80074ac: b292 uxth r2, r2 80074ae: 801a strh r2, [r3, #0] hspi->pRxBuffPtr += sizeof(uint16_t); 80074b0: 68fb ldr r3, [r7, #12] 80074b2: 6c1b ldr r3, [r3, #64] @ 0x40 80074b4: 1c9a adds r2, r3, #2 80074b6: 68fb ldr r3, [r7, #12] 80074b8: 641a str r2, [r3, #64] @ 0x40 hspi->RxXferCount--; 80074ba: 68fb ldr r3, [r7, #12] 80074bc: f8b3 3046 ldrh.w r3, [r3, #70] @ 0x46 80074c0: b29b uxth r3, r3 80074c2: 3b01 subs r3, #1 80074c4: b29a uxth r2, r3 80074c6: 68fb ldr r3, [r7, #12] 80074c8: f8a3 2046 strh.w r2, [r3, #70] @ 0x46 /* Next Data is a Transmission (Tx). Tx is allowed */ txallowed = 1U; 80074cc: 2301 movs r3, #1 80074ce: 627b str r3, [r7, #36] @ 0x24 } if (((HAL_GetTick() - tickstart) >= Timeout) && (Timeout != HAL_MAX_DELAY)) 80074d0: f7fc fbc2 bl 8003c58 80074d4: 4602 mov r2, r0 80074d6: 6a3b ldr r3, [r7, #32] 80074d8: 1ad3 subs r3, r2, r3 80074da: 6b3a ldr r2, [r7, #48] @ 0x30 80074dc: 429a cmp r2, r3 80074de: d80d bhi.n 80074fc 80074e0: 6b3b ldr r3, [r7, #48] @ 0x30 80074e2: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff 80074e6: d009 beq.n 80074fc { hspi->State = HAL_SPI_STATE_READY; 80074e8: 68fb ldr r3, [r7, #12] 80074ea: 2201 movs r2, #1 80074ec: f883 205d strb.w r2, [r3, #93] @ 0x5d __HAL_UNLOCK(hspi); 80074f0: 68fb ldr r3, [r7, #12] 80074f2: 2200 movs r2, #0 80074f4: f883 205c strb.w r2, [r3, #92] @ 0x5c return HAL_TIMEOUT; 80074f8: 2303 movs r3, #3 80074fa: e111 b.n 8007720 while ((hspi->TxXferCount > 0U) || (hspi->RxXferCount > 0U)) 80074fc: 68fb ldr r3, [r7, #12] 80074fe: 8fdb ldrh r3, [r3, #62] @ 0x3e 8007500: b29b uxth r3, r3 8007502: 2b00 cmp r3, #0 8007504: d19d bne.n 8007442 8007506: 68fb ldr r3, [r7, #12] 8007508: f8b3 3046 ldrh.w r3, [r3, #70] @ 0x46 800750c: b29b uxth r3, r3 800750e: 2b00 cmp r3, #0 8007510: d197 bne.n 8007442 8007512: e0e5 b.n 80076e0 } } /* Transmit and Receive data in 8 Bit mode */ else { if ((hspi->Init.Mode == SPI_MODE_SLAVE) || (initial_TxXferCount == 0x01U)) 8007514: 68fb ldr r3, [r7, #12] 8007516: 685b ldr r3, [r3, #4] 8007518: 2b00 cmp r3, #0 800751a: d003 beq.n 8007524 800751c: 8afb ldrh r3, [r7, #22] 800751e: 2b01 cmp r3, #1 8007520: f040 80d1 bne.w 80076c6 { if (hspi->TxXferCount > 1U) 8007524: 68fb ldr r3, [r7, #12] 8007526: 8fdb ldrh r3, [r3, #62] @ 0x3e 8007528: b29b uxth r3, r3 800752a: 2b01 cmp r3, #1 800752c: d912 bls.n 8007554 { hspi->Instance->DR = *((const uint16_t *)hspi->pTxBuffPtr); 800752e: 68fb ldr r3, [r7, #12] 8007530: 6b9b ldr r3, [r3, #56] @ 0x38 8007532: 881a ldrh r2, [r3, #0] 8007534: 68fb ldr r3, [r7, #12] 8007536: 681b ldr r3, [r3, #0] 8007538: 60da str r2, [r3, #12] hspi->pTxBuffPtr += sizeof(uint16_t); 800753a: 68fb ldr r3, [r7, #12] 800753c: 6b9b ldr r3, [r3, #56] @ 0x38 800753e: 1c9a adds r2, r3, #2 8007540: 68fb ldr r3, [r7, #12] 8007542: 639a str r2, [r3, #56] @ 0x38 hspi->TxXferCount -= 2U; 8007544: 68fb ldr r3, [r7, #12] 8007546: 8fdb ldrh r3, [r3, #62] @ 0x3e 8007548: b29b uxth r3, r3 800754a: 3b02 subs r3, #2 800754c: b29a uxth r2, r3 800754e: 68fb ldr r3, [r7, #12] 8007550: 87da strh r2, [r3, #62] @ 0x3e 8007552: e0b8 b.n 80076c6 } else { *(__IO uint8_t *)&hspi->Instance->DR = *((const uint8_t *)hspi->pTxBuffPtr); 8007554: 68fb ldr r3, [r7, #12] 8007556: 6b9a ldr r2, [r3, #56] @ 0x38 8007558: 68fb ldr r3, [r7, #12] 800755a: 681b ldr r3, [r3, #0] 800755c: 330c adds r3, #12 800755e: 7812 ldrb r2, [r2, #0] 8007560: 701a strb r2, [r3, #0] hspi->pTxBuffPtr++; 8007562: 68fb ldr r3, [r7, #12] 8007564: 6b9b ldr r3, [r3, #56] @ 0x38 8007566: 1c5a adds r2, r3, #1 8007568: 68fb ldr r3, [r7, #12] 800756a: 639a str r2, [r3, #56] @ 0x38 hspi->TxXferCount--; 800756c: 68fb ldr r3, [r7, #12] 800756e: 8fdb ldrh r3, [r3, #62] @ 0x3e 8007570: b29b uxth r3, r3 8007572: 3b01 subs r3, #1 8007574: b29a uxth r2, r3 8007576: 68fb ldr r3, [r7, #12] 8007578: 87da strh r2, [r3, #62] @ 0x3e SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT); } #endif /* USE_SPI_CRC */ } } while ((hspi->TxXferCount > 0U) || (hspi->RxXferCount > 0U)) 800757a: e0a4 b.n 80076c6 { /* Check TXE flag */ if ((__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE)) && (hspi->TxXferCount > 0U) && (txallowed == 1U)) 800757c: 68fb ldr r3, [r7, #12] 800757e: 681b ldr r3, [r3, #0] 8007580: 689b ldr r3, [r3, #8] 8007582: f003 0302 and.w r3, r3, #2 8007586: 2b02 cmp r3, #2 8007588: d134 bne.n 80075f4 800758a: 68fb ldr r3, [r7, #12] 800758c: 8fdb ldrh r3, [r3, #62] @ 0x3e 800758e: b29b uxth r3, r3 8007590: 2b00 cmp r3, #0 8007592: d02f beq.n 80075f4 8007594: 6a7b ldr r3, [r7, #36] @ 0x24 8007596: 2b01 cmp r3, #1 8007598: d12c bne.n 80075f4 { if (hspi->TxXferCount > 1U) 800759a: 68fb ldr r3, [r7, #12] 800759c: 8fdb ldrh r3, [r3, #62] @ 0x3e 800759e: b29b uxth r3, r3 80075a0: 2b01 cmp r3, #1 80075a2: d912 bls.n 80075ca { hspi->Instance->DR = *((const uint16_t *)hspi->pTxBuffPtr); 80075a4: 68fb ldr r3, [r7, #12] 80075a6: 6b9b ldr r3, [r3, #56] @ 0x38 80075a8: 881a ldrh r2, [r3, #0] 80075aa: 68fb ldr r3, [r7, #12] 80075ac: 681b ldr r3, [r3, #0] 80075ae: 60da str r2, [r3, #12] hspi->pTxBuffPtr += sizeof(uint16_t); 80075b0: 68fb ldr r3, [r7, #12] 80075b2: 6b9b ldr r3, [r3, #56] @ 0x38 80075b4: 1c9a adds r2, r3, #2 80075b6: 68fb ldr r3, [r7, #12] 80075b8: 639a str r2, [r3, #56] @ 0x38 hspi->TxXferCount -= 2U; 80075ba: 68fb ldr r3, [r7, #12] 80075bc: 8fdb ldrh r3, [r3, #62] @ 0x3e 80075be: b29b uxth r3, r3 80075c0: 3b02 subs r3, #2 80075c2: b29a uxth r2, r3 80075c4: 68fb ldr r3, [r7, #12] 80075c6: 87da strh r2, [r3, #62] @ 0x3e 80075c8: e012 b.n 80075f0 } else { *(__IO uint8_t *)&hspi->Instance->DR = *((const uint8_t *)hspi->pTxBuffPtr); 80075ca: 68fb ldr r3, [r7, #12] 80075cc: 6b9a ldr r2, [r3, #56] @ 0x38 80075ce: 68fb ldr r3, [r7, #12] 80075d0: 681b ldr r3, [r3, #0] 80075d2: 330c adds r3, #12 80075d4: 7812 ldrb r2, [r2, #0] 80075d6: 701a strb r2, [r3, #0] hspi->pTxBuffPtr++; 80075d8: 68fb ldr r3, [r7, #12] 80075da: 6b9b ldr r3, [r3, #56] @ 0x38 80075dc: 1c5a adds r2, r3, #1 80075de: 68fb ldr r3, [r7, #12] 80075e0: 639a str r2, [r3, #56] @ 0x38 hspi->TxXferCount--; 80075e2: 68fb ldr r3, [r7, #12] 80075e4: 8fdb ldrh r3, [r3, #62] @ 0x3e 80075e6: b29b uxth r3, r3 80075e8: 3b01 subs r3, #1 80075ea: b29a uxth r2, r3 80075ec: 68fb ldr r3, [r7, #12] 80075ee: 87da strh r2, [r3, #62] @ 0x3e } /* Next Data is a reception (Rx). Tx not allowed */ txallowed = 0U; 80075f0: 2300 movs r3, #0 80075f2: 627b str r3, [r7, #36] @ 0x24 } #endif /* USE_SPI_CRC */ } /* Wait until RXNE flag is reset */ if ((__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_RXNE)) && (hspi->RxXferCount > 0U)) 80075f4: 68fb ldr r3, [r7, #12] 80075f6: 681b ldr r3, [r3, #0] 80075f8: 689b ldr r3, [r3, #8] 80075fa: f003 0301 and.w r3, r3, #1 80075fe: 2b01 cmp r3, #1 8007600: d148 bne.n 8007694 8007602: 68fb ldr r3, [r7, #12] 8007604: f8b3 3046 ldrh.w r3, [r3, #70] @ 0x46 8007608: b29b uxth r3, r3 800760a: 2b00 cmp r3, #0 800760c: d042 beq.n 8007694 { if (hspi->RxXferCount > 1U) 800760e: 68fb ldr r3, [r7, #12] 8007610: f8b3 3046 ldrh.w r3, [r3, #70] @ 0x46 8007614: b29b uxth r3, r3 8007616: 2b01 cmp r3, #1 8007618: d923 bls.n 8007662 { *((uint16_t *)hspi->pRxBuffPtr) = (uint16_t)hspi->Instance->DR; 800761a: 68fb ldr r3, [r7, #12] 800761c: 681b ldr r3, [r3, #0] 800761e: 68da ldr r2, [r3, #12] 8007620: 68fb ldr r3, [r7, #12] 8007622: 6c1b ldr r3, [r3, #64] @ 0x40 8007624: b292 uxth r2, r2 8007626: 801a strh r2, [r3, #0] hspi->pRxBuffPtr += sizeof(uint16_t); 8007628: 68fb ldr r3, [r7, #12] 800762a: 6c1b ldr r3, [r3, #64] @ 0x40 800762c: 1c9a adds r2, r3, #2 800762e: 68fb ldr r3, [r7, #12] 8007630: 641a str r2, [r3, #64] @ 0x40 hspi->RxXferCount -= 2U; 8007632: 68fb ldr r3, [r7, #12] 8007634: f8b3 3046 ldrh.w r3, [r3, #70] @ 0x46 8007638: b29b uxth r3, r3 800763a: 3b02 subs r3, #2 800763c: b29a uxth r2, r3 800763e: 68fb ldr r3, [r7, #12] 8007640: f8a3 2046 strh.w r2, [r3, #70] @ 0x46 if (hspi->RxXferCount <= 1U) 8007644: 68fb ldr r3, [r7, #12] 8007646: f8b3 3046 ldrh.w r3, [r3, #70] @ 0x46 800764a: b29b uxth r3, r3 800764c: 2b01 cmp r3, #1 800764e: d81f bhi.n 8007690 { /* Set RX Fifo threshold before to switch on 8 bit data size */ SET_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD); 8007650: 68fb ldr r3, [r7, #12] 8007652: 681b ldr r3, [r3, #0] 8007654: 685a ldr r2, [r3, #4] 8007656: 68fb ldr r3, [r7, #12] 8007658: 681b ldr r3, [r3, #0] 800765a: f442 5280 orr.w r2, r2, #4096 @ 0x1000 800765e: 605a str r2, [r3, #4] 8007660: e016 b.n 8007690 } } else { (*(uint8_t *)hspi->pRxBuffPtr) = *(__IO uint8_t *)&hspi->Instance->DR; 8007662: 68fb ldr r3, [r7, #12] 8007664: 681b ldr r3, [r3, #0] 8007666: f103 020c add.w r2, r3, #12 800766a: 68fb ldr r3, [r7, #12] 800766c: 6c1b ldr r3, [r3, #64] @ 0x40 800766e: 7812 ldrb r2, [r2, #0] 8007670: b2d2 uxtb r2, r2 8007672: 701a strb r2, [r3, #0] hspi->pRxBuffPtr++; 8007674: 68fb ldr r3, [r7, #12] 8007676: 6c1b ldr r3, [r3, #64] @ 0x40 8007678: 1c5a adds r2, r3, #1 800767a: 68fb ldr r3, [r7, #12] 800767c: 641a str r2, [r3, #64] @ 0x40 hspi->RxXferCount--; 800767e: 68fb ldr r3, [r7, #12] 8007680: f8b3 3046 ldrh.w r3, [r3, #70] @ 0x46 8007684: b29b uxth r3, r3 8007686: 3b01 subs r3, #1 8007688: b29a uxth r2, r3 800768a: 68fb ldr r3, [r7, #12] 800768c: f8a3 2046 strh.w r2, [r3, #70] @ 0x46 } /* Next Data is a Transmission (Tx). Tx is allowed */ txallowed = 1U; 8007690: 2301 movs r3, #1 8007692: 627b str r3, [r7, #36] @ 0x24 } if ((((HAL_GetTick() - tickstart) >= Timeout) && ((Timeout != HAL_MAX_DELAY))) || (Timeout == 0U)) 8007694: f7fc fae0 bl 8003c58 8007698: 4602 mov r2, r0 800769a: 6a3b ldr r3, [r7, #32] 800769c: 1ad3 subs r3, r2, r3 800769e: 6b3a ldr r2, [r7, #48] @ 0x30 80076a0: 429a cmp r2, r3 80076a2: d803 bhi.n 80076ac 80076a4: 6b3b ldr r3, [r7, #48] @ 0x30 80076a6: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff 80076aa: d102 bne.n 80076b2 80076ac: 6b3b ldr r3, [r7, #48] @ 0x30 80076ae: 2b00 cmp r3, #0 80076b0: d109 bne.n 80076c6 { hspi->State = HAL_SPI_STATE_READY; 80076b2: 68fb ldr r3, [r7, #12] 80076b4: 2201 movs r2, #1 80076b6: f883 205d strb.w r2, [r3, #93] @ 0x5d __HAL_UNLOCK(hspi); 80076ba: 68fb ldr r3, [r7, #12] 80076bc: 2200 movs r2, #0 80076be: f883 205c strb.w r2, [r3, #92] @ 0x5c return HAL_TIMEOUT; 80076c2: 2303 movs r3, #3 80076c4: e02c b.n 8007720 while ((hspi->TxXferCount > 0U) || (hspi->RxXferCount > 0U)) 80076c6: 68fb ldr r3, [r7, #12] 80076c8: 8fdb ldrh r3, [r3, #62] @ 0x3e 80076ca: b29b uxth r3, r3 80076cc: 2b00 cmp r3, #0 80076ce: f47f af55 bne.w 800757c 80076d2: 68fb ldr r3, [r7, #12] 80076d4: f8b3 3046 ldrh.w r3, [r3, #70] @ 0x46 80076d8: b29b uxth r3, r3 80076da: 2b00 cmp r3, #0 80076dc: f47f af4e bne.w 800757c return HAL_ERROR; } #endif /* USE_SPI_CRC */ /* Check the end of the transaction */ if (SPI_EndRxTxTransaction(hspi, Timeout, tickstart) != HAL_OK) 80076e0: 6a3a ldr r2, [r7, #32] 80076e2: 6b39 ldr r1, [r7, #48] @ 0x30 80076e4: 68f8 ldr r0, [r7, #12] 80076e6: f000 fe39 bl 800835c 80076ea: 4603 mov r3, r0 80076ec: 2b00 cmp r3, #0 80076ee: d008 beq.n 8007702 { hspi->ErrorCode = HAL_SPI_ERROR_FLAG; 80076f0: 68fb ldr r3, [r7, #12] 80076f2: 2220 movs r2, #32 80076f4: 661a str r2, [r3, #96] @ 0x60 __HAL_UNLOCK(hspi); 80076f6: 68fb ldr r3, [r7, #12] 80076f8: 2200 movs r2, #0 80076fa: f883 205c strb.w r2, [r3, #92] @ 0x5c return HAL_ERROR; 80076fe: 2301 movs r3, #1 8007700: e00e b.n 8007720 } hspi->State = HAL_SPI_STATE_READY; 8007702: 68fb ldr r3, [r7, #12] 8007704: 2201 movs r2, #1 8007706: f883 205d strb.w r2, [r3, #93] @ 0x5d /* Unlock the process */ __HAL_UNLOCK(hspi); 800770a: 68fb ldr r3, [r7, #12] 800770c: 2200 movs r2, #0 800770e: f883 205c strb.w r2, [r3, #92] @ 0x5c if (hspi->ErrorCode != HAL_SPI_ERROR_NONE) 8007712: 68fb ldr r3, [r7, #12] 8007714: 6e1b ldr r3, [r3, #96] @ 0x60 8007716: 2b00 cmp r3, #0 8007718: d001 beq.n 800771e { return HAL_ERROR; 800771a: 2301 movs r3, #1 800771c: e000 b.n 8007720 } else { return HAL_OK; 800771e: 2300 movs r3, #0 } } 8007720: 4618 mov r0, r3 8007722: 3728 adds r7, #40 @ 0x28 8007724: 46bd mov sp, r7 8007726: bd80 pop {r7, pc} 08007728 : * @param pData pointer to data buffer * @param Size amount of data to be sent * @retval HAL status */ HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, const uint8_t *pData, uint16_t Size) { 8007728: b480 push {r7} 800772a: b085 sub sp, #20 800772c: af00 add r7, sp, #0 800772e: 60f8 str r0, [r7, #12] 8007730: 60b9 str r1, [r7, #8] 8007732: 4613 mov r3, r2 8007734: 80fb strh r3, [r7, #6] /* Check Direction parameter */ assert_param(IS_SPI_DIRECTION_2LINES_OR_1LINE(hspi->Init.Direction)); if ((pData == NULL) || (Size == 0U)) 8007736: 68bb ldr r3, [r7, #8] 8007738: 2b00 cmp r3, #0 800773a: d002 beq.n 8007742 800773c: 88fb ldrh r3, [r7, #6] 800773e: 2b00 cmp r3, #0 8007740: d101 bne.n 8007746 { return HAL_ERROR; 8007742: 2301 movs r3, #1 8007744: e06d b.n 8007822 } if (hspi->State != HAL_SPI_STATE_READY) 8007746: 68fb ldr r3, [r7, #12] 8007748: f893 305d ldrb.w r3, [r3, #93] @ 0x5d 800774c: b2db uxtb r3, r3 800774e: 2b01 cmp r3, #1 8007750: d001 beq.n 8007756 { return HAL_BUSY; 8007752: 2302 movs r3, #2 8007754: e065 b.n 8007822 } /* Process Locked */ __HAL_LOCK(hspi); 8007756: 68fb ldr r3, [r7, #12] 8007758: f893 305c ldrb.w r3, [r3, #92] @ 0x5c 800775c: 2b01 cmp r3, #1 800775e: d101 bne.n 8007764 8007760: 2302 movs r3, #2 8007762: e05e b.n 8007822 8007764: 68fb ldr r3, [r7, #12] 8007766: 2201 movs r2, #1 8007768: f883 205c strb.w r2, [r3, #92] @ 0x5c /* Set the transaction information */ hspi->State = HAL_SPI_STATE_BUSY_TX; 800776c: 68fb ldr r3, [r7, #12] 800776e: 2203 movs r2, #3 8007770: f883 205d strb.w r2, [r3, #93] @ 0x5d hspi->ErrorCode = HAL_SPI_ERROR_NONE; 8007774: 68fb ldr r3, [r7, #12] 8007776: 2200 movs r2, #0 8007778: 661a str r2, [r3, #96] @ 0x60 hspi->pTxBuffPtr = (const uint8_t *)pData; 800777a: 68fb ldr r3, [r7, #12] 800777c: 68ba ldr r2, [r7, #8] 800777e: 639a str r2, [r3, #56] @ 0x38 hspi->TxXferSize = Size; 8007780: 68fb ldr r3, [r7, #12] 8007782: 88fa ldrh r2, [r7, #6] 8007784: 879a strh r2, [r3, #60] @ 0x3c hspi->TxXferCount = Size; 8007786: 68fb ldr r3, [r7, #12] 8007788: 88fa ldrh r2, [r7, #6] 800778a: 87da strh r2, [r3, #62] @ 0x3e /* Init field not used in handle to zero */ hspi->pRxBuffPtr = (uint8_t *)NULL; 800778c: 68fb ldr r3, [r7, #12] 800778e: 2200 movs r2, #0 8007790: 641a str r2, [r3, #64] @ 0x40 hspi->RxXferSize = 0U; 8007792: 68fb ldr r3, [r7, #12] 8007794: 2200 movs r2, #0 8007796: f8a3 2044 strh.w r2, [r3, #68] @ 0x44 hspi->RxXferCount = 0U; 800779a: 68fb ldr r3, [r7, #12] 800779c: 2200 movs r2, #0 800779e: f8a3 2046 strh.w r2, [r3, #70] @ 0x46 hspi->RxISR = NULL; 80077a2: 68fb ldr r3, [r7, #12] 80077a4: 2200 movs r2, #0 80077a6: 64da str r2, [r3, #76] @ 0x4c /* Set the function for IT treatment */ if (hspi->Init.DataSize > SPI_DATASIZE_8BIT) 80077a8: 68fb ldr r3, [r7, #12] 80077aa: 68db ldr r3, [r3, #12] 80077ac: f5b3 6fe0 cmp.w r3, #1792 @ 0x700 80077b0: d903 bls.n 80077ba { hspi->TxISR = SPI_TxISR_16BIT; 80077b2: 68fb ldr r3, [r7, #12] 80077b4: 4a1e ldr r2, [pc, #120] @ (8007830 ) 80077b6: 651a str r2, [r3, #80] @ 0x50 80077b8: e002 b.n 80077c0 } else { hspi->TxISR = SPI_TxISR_8BIT; 80077ba: 68fb ldr r3, [r7, #12] 80077bc: 4a1d ldr r2, [pc, #116] @ (8007834 ) 80077be: 651a str r2, [r3, #80] @ 0x50 } /* Configure communication direction : 1Line */ if (hspi->Init.Direction == SPI_DIRECTION_1LINE) 80077c0: 68fb ldr r3, [r7, #12] 80077c2: 689b ldr r3, [r3, #8] 80077c4: f5b3 4f00 cmp.w r3, #32768 @ 0x8000 80077c8: d10f bne.n 80077ea { /* Disable SPI Peripheral before set 1Line direction (BIDIOE bit) */ __HAL_SPI_DISABLE(hspi); 80077ca: 68fb ldr r3, [r7, #12] 80077cc: 681b ldr r3, [r3, #0] 80077ce: 681a ldr r2, [r3, #0] 80077d0: 68fb ldr r3, [r7, #12] 80077d2: 681b ldr r3, [r3, #0] 80077d4: f022 0240 bic.w r2, r2, #64 @ 0x40 80077d8: 601a str r2, [r3, #0] SPI_1LINE_TX(hspi); 80077da: 68fb ldr r3, [r7, #12] 80077dc: 681b ldr r3, [r3, #0] 80077de: 681a ldr r2, [r3, #0] 80077e0: 68fb ldr r3, [r7, #12] 80077e2: 681b ldr r3, [r3, #0] 80077e4: f442 4280 orr.w r2, r2, #16384 @ 0x4000 80077e8: 601a str r2, [r3, #0] SPI_RESET_CRC(hspi); } #endif /* USE_SPI_CRC */ /* Check if the SPI is already enabled */ if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE) 80077ea: 68fb ldr r3, [r7, #12] 80077ec: 681b ldr r3, [r3, #0] 80077ee: 681b ldr r3, [r3, #0] 80077f0: f003 0340 and.w r3, r3, #64 @ 0x40 80077f4: 2b40 cmp r3, #64 @ 0x40 80077f6: d007 beq.n 8007808 { /* Enable SPI peripheral */ __HAL_SPI_ENABLE(hspi); 80077f8: 68fb ldr r3, [r7, #12] 80077fa: 681b ldr r3, [r3, #0] 80077fc: 681a ldr r2, [r3, #0] 80077fe: 68fb ldr r3, [r7, #12] 8007800: 681b ldr r3, [r3, #0] 8007802: f042 0240 orr.w r2, r2, #64 @ 0x40 8007806: 601a str r2, [r3, #0] } /* Process Unlocked */ __HAL_UNLOCK(hspi); 8007808: 68fb ldr r3, [r7, #12] 800780a: 2200 movs r2, #0 800780c: f883 205c strb.w r2, [r3, #92] @ 0x5c /* Enable TXE and ERR interrupt */ __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_ERR)); 8007810: 68fb ldr r3, [r7, #12] 8007812: 681b ldr r3, [r3, #0] 8007814: 685a ldr r2, [r3, #4] 8007816: 68fb ldr r3, [r7, #12] 8007818: 681b ldr r3, [r3, #0] 800781a: f042 02a0 orr.w r2, r2, #160 @ 0xa0 800781e: 605a str r2, [r3, #4] return HAL_OK; 8007820: 2300 movs r3, #0 } 8007822: 4618 mov r0, r3 8007824: 3714 adds r7, #20 8007826: 46bd mov sp, r7 8007828: f85d 7b04 ldr.w r7, [sp], #4 800782c: 4770 bx lr 800782e: bf00 nop 8007830: 0800802b .word 0x0800802b 8007834: 08007fe5 .word 0x08007fe5 08007838 : * @param pData pointer to data buffer * @param Size amount of data to be sent * @retval HAL status */ HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size) { 8007838: b580 push {r7, lr} 800783a: b084 sub sp, #16 800783c: af00 add r7, sp, #0 800783e: 60f8 str r0, [r7, #12] 8007840: 60b9 str r1, [r7, #8] 8007842: 4613 mov r3, r2 8007844: 80fb strh r3, [r7, #6] if (hspi->State != HAL_SPI_STATE_READY) 8007846: 68fb ldr r3, [r7, #12] 8007848: f893 305d ldrb.w r3, [r3, #93] @ 0x5d 800784c: b2db uxtb r3, r3 800784e: 2b01 cmp r3, #1 8007850: d001 beq.n 8007856 { return HAL_BUSY; 8007852: 2302 movs r3, #2 8007854: e092 b.n 800797c } if ((hspi->Init.Direction == SPI_DIRECTION_2LINES) && (hspi->Init.Mode == SPI_MODE_MASTER)) 8007856: 68fb ldr r3, [r7, #12] 8007858: 689b ldr r3, [r3, #8] 800785a: 2b00 cmp r3, #0 800785c: d110 bne.n 8007880 800785e: 68fb ldr r3, [r7, #12] 8007860: 685b ldr r3, [r3, #4] 8007862: f5b3 7f82 cmp.w r3, #260 @ 0x104 8007866: d10b bne.n 8007880 { hspi->State = HAL_SPI_STATE_BUSY_RX; 8007868: 68fb ldr r3, [r7, #12] 800786a: 2204 movs r2, #4 800786c: f883 205d strb.w r2, [r3, #93] @ 0x5d /* Call transmit-receive function to send Dummy data on Tx line and generate clock on CLK line */ return HAL_SPI_TransmitReceive_IT(hspi, pData, pData, Size); 8007870: 88fb ldrh r3, [r7, #6] 8007872: 68ba ldr r2, [r7, #8] 8007874: 68b9 ldr r1, [r7, #8] 8007876: 68f8 ldr r0, [r7, #12] 8007878: f000 f888 bl 800798c 800787c: 4603 mov r3, r0 800787e: e07d b.n 800797c } if ((pData == NULL) || (Size == 0U)) 8007880: 68bb ldr r3, [r7, #8] 8007882: 2b00 cmp r3, #0 8007884: d002 beq.n 800788c 8007886: 88fb ldrh r3, [r7, #6] 8007888: 2b00 cmp r3, #0 800788a: d101 bne.n 8007890 { return HAL_ERROR; 800788c: 2301 movs r3, #1 800788e: e075 b.n 800797c } /* Process Locked */ __HAL_LOCK(hspi); 8007890: 68fb ldr r3, [r7, #12] 8007892: f893 305c ldrb.w r3, [r3, #92] @ 0x5c 8007896: 2b01 cmp r3, #1 8007898: d101 bne.n 800789e 800789a: 2302 movs r3, #2 800789c: e06e b.n 800797c 800789e: 68fb ldr r3, [r7, #12] 80078a0: 2201 movs r2, #1 80078a2: f883 205c strb.w r2, [r3, #92] @ 0x5c /* Set the transaction information */ hspi->State = HAL_SPI_STATE_BUSY_RX; 80078a6: 68fb ldr r3, [r7, #12] 80078a8: 2204 movs r2, #4 80078aa: f883 205d strb.w r2, [r3, #93] @ 0x5d hspi->ErrorCode = HAL_SPI_ERROR_NONE; 80078ae: 68fb ldr r3, [r7, #12] 80078b0: 2200 movs r2, #0 80078b2: 661a str r2, [r3, #96] @ 0x60 hspi->pRxBuffPtr = (uint8_t *)pData; 80078b4: 68fb ldr r3, [r7, #12] 80078b6: 68ba ldr r2, [r7, #8] 80078b8: 641a str r2, [r3, #64] @ 0x40 hspi->RxXferSize = Size; 80078ba: 68fb ldr r3, [r7, #12] 80078bc: 88fa ldrh r2, [r7, #6] 80078be: f8a3 2044 strh.w r2, [r3, #68] @ 0x44 hspi->RxXferCount = Size; 80078c2: 68fb ldr r3, [r7, #12] 80078c4: 88fa ldrh r2, [r7, #6] 80078c6: f8a3 2046 strh.w r2, [r3, #70] @ 0x46 /* Init field not used in handle to zero */ hspi->pTxBuffPtr = (uint8_t *)NULL; 80078ca: 68fb ldr r3, [r7, #12] 80078cc: 2200 movs r2, #0 80078ce: 639a str r2, [r3, #56] @ 0x38 hspi->TxXferSize = 0U; 80078d0: 68fb ldr r3, [r7, #12] 80078d2: 2200 movs r2, #0 80078d4: 879a strh r2, [r3, #60] @ 0x3c hspi->TxXferCount = 0U; 80078d6: 68fb ldr r3, [r7, #12] 80078d8: 2200 movs r2, #0 80078da: 87da strh r2, [r3, #62] @ 0x3e hspi->TxISR = NULL; 80078dc: 68fb ldr r3, [r7, #12] 80078de: 2200 movs r2, #0 80078e0: 651a str r2, [r3, #80] @ 0x50 /* Check the data size to adapt Rx threshold and the set the function for IT treatment */ if (hspi->Init.DataSize > SPI_DATASIZE_8BIT) 80078e2: 68fb ldr r3, [r7, #12] 80078e4: 68db ldr r3, [r3, #12] 80078e6: f5b3 6fe0 cmp.w r3, #1792 @ 0x700 80078ea: d90b bls.n 8007904 { /* Set RX Fifo threshold according the reception data length: 16 bit */ CLEAR_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD); 80078ec: 68fb ldr r3, [r7, #12] 80078ee: 681b ldr r3, [r3, #0] 80078f0: 685a ldr r2, [r3, #4] 80078f2: 68fb ldr r3, [r7, #12] 80078f4: 681b ldr r3, [r3, #0] 80078f6: f422 5280 bic.w r2, r2, #4096 @ 0x1000 80078fa: 605a str r2, [r3, #4] hspi->RxISR = SPI_RxISR_16BIT; 80078fc: 68fb ldr r3, [r7, #12] 80078fe: 4a21 ldr r2, [pc, #132] @ (8007984 ) 8007900: 64da str r2, [r3, #76] @ 0x4c 8007902: e00a b.n 800791a } else { /* Set RX Fifo threshold according the reception data length: 8 bit */ SET_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD); 8007904: 68fb ldr r3, [r7, #12] 8007906: 681b ldr r3, [r3, #0] 8007908: 685a ldr r2, [r3, #4] 800790a: 68fb ldr r3, [r7, #12] 800790c: 681b ldr r3, [r3, #0] 800790e: f442 5280 orr.w r2, r2, #4096 @ 0x1000 8007912: 605a str r2, [r3, #4] hspi->RxISR = SPI_RxISR_8BIT; 8007914: 68fb ldr r3, [r7, #12] 8007916: 4a1c ldr r2, [pc, #112] @ (8007988 ) 8007918: 64da str r2, [r3, #76] @ 0x4c } /* Configure communication direction : 1Line */ if (hspi->Init.Direction == SPI_DIRECTION_1LINE) 800791a: 68fb ldr r3, [r7, #12] 800791c: 689b ldr r3, [r3, #8] 800791e: f5b3 4f00 cmp.w r3, #32768 @ 0x8000 8007922: d10f bne.n 8007944 { /* Disable SPI Peripheral before set 1Line direction (BIDIOE bit) */ __HAL_SPI_DISABLE(hspi); 8007924: 68fb ldr r3, [r7, #12] 8007926: 681b ldr r3, [r3, #0] 8007928: 681a ldr r2, [r3, #0] 800792a: 68fb ldr r3, [r7, #12] 800792c: 681b ldr r3, [r3, #0] 800792e: f022 0240 bic.w r2, r2, #64 @ 0x40 8007932: 601a str r2, [r3, #0] SPI_1LINE_RX(hspi); 8007934: 68fb ldr r3, [r7, #12] 8007936: 681b ldr r3, [r3, #0] 8007938: 681a ldr r2, [r3, #0] 800793a: 68fb ldr r3, [r7, #12] 800793c: 681b ldr r3, [r3, #0] 800793e: f422 4280 bic.w r2, r2, #16384 @ 0x4000 8007942: 601a str r2, [r3, #0] /* Note : The SPI must be enabled after unlocking current process to avoid the risk of SPI interrupt handle execution before current process unlock */ /* Check if the SPI is already enabled */ if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE) 8007944: 68fb ldr r3, [r7, #12] 8007946: 681b ldr r3, [r3, #0] 8007948: 681b ldr r3, [r3, #0] 800794a: f003 0340 and.w r3, r3, #64 @ 0x40 800794e: 2b40 cmp r3, #64 @ 0x40 8007950: d007 beq.n 8007962 { /* Enable SPI peripheral */ __HAL_SPI_ENABLE(hspi); 8007952: 68fb ldr r3, [r7, #12] 8007954: 681b ldr r3, [r3, #0] 8007956: 681a ldr r2, [r3, #0] 8007958: 68fb ldr r3, [r7, #12] 800795a: 681b ldr r3, [r3, #0] 800795c: f042 0240 orr.w r2, r2, #64 @ 0x40 8007960: 601a str r2, [r3, #0] } /* Process Unlocked */ __HAL_UNLOCK(hspi); 8007962: 68fb ldr r3, [r7, #12] 8007964: 2200 movs r2, #0 8007966: f883 205c strb.w r2, [r3, #92] @ 0x5c /* Enable RXNE and ERR interrupt */ __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_RXNE | SPI_IT_ERR)); 800796a: 68fb ldr r3, [r7, #12] 800796c: 681b ldr r3, [r3, #0] 800796e: 685a ldr r2, [r3, #4] 8007970: 68fb ldr r3, [r7, #12] 8007972: 681b ldr r3, [r3, #0] 8007974: f042 0260 orr.w r2, r2, #96 @ 0x60 8007978: 605a str r2, [r3, #4] return HAL_OK; 800797a: 2300 movs r3, #0 } 800797c: 4618 mov r0, r3 800797e: 3710 adds r7, #16 8007980: 46bd mov sp, r7 8007982: bd80 pop {r7, pc} 8007984: 08007f99 .word 0x08007f99 8007988: 08007f49 .word 0x08007f49 0800798c : * @param Size amount of data to be sent and received * @retval HAL status */ HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, const uint8_t *pTxData, uint8_t *pRxData, uint16_t Size) { 800798c: b480 push {r7} 800798e: b087 sub sp, #28 8007990: af00 add r7, sp, #0 8007992: 60f8 str r0, [r7, #12] 8007994: 60b9 str r1, [r7, #8] 8007996: 607a str r2, [r7, #4] 8007998: 807b strh r3, [r7, #2] /* Check Direction parameter */ assert_param(IS_SPI_DIRECTION_2LINES(hspi->Init.Direction)); /* Init temporary variables */ tmp_state = hspi->State; 800799a: 68fb ldr r3, [r7, #12] 800799c: f893 305d ldrb.w r3, [r3, #93] @ 0x5d 80079a0: 75fb strb r3, [r7, #23] tmp_mode = hspi->Init.Mode; 80079a2: 68fb ldr r3, [r7, #12] 80079a4: 685b ldr r3, [r3, #4] 80079a6: 613b str r3, [r7, #16] if (!((tmp_state == HAL_SPI_STATE_READY) || \ 80079a8: 7dfb ldrb r3, [r7, #23] 80079aa: 2b01 cmp r3, #1 80079ac: d00c beq.n 80079c8 80079ae: 693b ldr r3, [r7, #16] 80079b0: f5b3 7f82 cmp.w r3, #260 @ 0x104 80079b4: d106 bne.n 80079c4 ((tmp_mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && 80079b6: 68fb ldr r3, [r7, #12] 80079b8: 689b ldr r3, [r3, #8] 80079ba: 2b00 cmp r3, #0 80079bc: d102 bne.n 80079c4 80079be: 7dfb ldrb r3, [r7, #23] 80079c0: 2b04 cmp r3, #4 80079c2: d001 beq.n 80079c8 (tmp_state == HAL_SPI_STATE_BUSY_RX)))) { return HAL_BUSY; 80079c4: 2302 movs r3, #2 80079c6: e07d b.n 8007ac4 } if ((pTxData == NULL) || (pRxData == NULL) || (Size == 0U)) 80079c8: 68bb ldr r3, [r7, #8] 80079ca: 2b00 cmp r3, #0 80079cc: d005 beq.n 80079da 80079ce: 687b ldr r3, [r7, #4] 80079d0: 2b00 cmp r3, #0 80079d2: d002 beq.n 80079da 80079d4: 887b ldrh r3, [r7, #2] 80079d6: 2b00 cmp r3, #0 80079d8: d101 bne.n 80079de { return HAL_ERROR; 80079da: 2301 movs r3, #1 80079dc: e072 b.n 8007ac4 } /* Process locked */ __HAL_LOCK(hspi); 80079de: 68fb ldr r3, [r7, #12] 80079e0: f893 305c ldrb.w r3, [r3, #92] @ 0x5c 80079e4: 2b01 cmp r3, #1 80079e6: d101 bne.n 80079ec 80079e8: 2302 movs r3, #2 80079ea: e06b b.n 8007ac4 80079ec: 68fb ldr r3, [r7, #12] 80079ee: 2201 movs r2, #1 80079f0: f883 205c strb.w r2, [r3, #92] @ 0x5c /* Don't overwrite in case of HAL_SPI_STATE_BUSY_RX */ if (hspi->State != HAL_SPI_STATE_BUSY_RX) 80079f4: 68fb ldr r3, [r7, #12] 80079f6: f893 305d ldrb.w r3, [r3, #93] @ 0x5d 80079fa: b2db uxtb r3, r3 80079fc: 2b04 cmp r3, #4 80079fe: d003 beq.n 8007a08 { hspi->State = HAL_SPI_STATE_BUSY_TX_RX; 8007a00: 68fb ldr r3, [r7, #12] 8007a02: 2205 movs r2, #5 8007a04: f883 205d strb.w r2, [r3, #93] @ 0x5d } /* Set the transaction information */ hspi->ErrorCode = HAL_SPI_ERROR_NONE; 8007a08: 68fb ldr r3, [r7, #12] 8007a0a: 2200 movs r2, #0 8007a0c: 661a str r2, [r3, #96] @ 0x60 hspi->pTxBuffPtr = (const uint8_t *)pTxData; 8007a0e: 68fb ldr r3, [r7, #12] 8007a10: 68ba ldr r2, [r7, #8] 8007a12: 639a str r2, [r3, #56] @ 0x38 hspi->TxXferSize = Size; 8007a14: 68fb ldr r3, [r7, #12] 8007a16: 887a ldrh r2, [r7, #2] 8007a18: 879a strh r2, [r3, #60] @ 0x3c hspi->TxXferCount = Size; 8007a1a: 68fb ldr r3, [r7, #12] 8007a1c: 887a ldrh r2, [r7, #2] 8007a1e: 87da strh r2, [r3, #62] @ 0x3e hspi->pRxBuffPtr = (uint8_t *)pRxData; 8007a20: 68fb ldr r3, [r7, #12] 8007a22: 687a ldr r2, [r7, #4] 8007a24: 641a str r2, [r3, #64] @ 0x40 hspi->RxXferSize = Size; 8007a26: 68fb ldr r3, [r7, #12] 8007a28: 887a ldrh r2, [r7, #2] 8007a2a: f8a3 2044 strh.w r2, [r3, #68] @ 0x44 hspi->RxXferCount = Size; 8007a2e: 68fb ldr r3, [r7, #12] 8007a30: 887a ldrh r2, [r7, #2] 8007a32: f8a3 2046 strh.w r2, [r3, #70] @ 0x46 /* Set the function for IT treatment */ if (hspi->Init.DataSize > SPI_DATASIZE_8BIT) 8007a36: 68fb ldr r3, [r7, #12] 8007a38: 68db ldr r3, [r3, #12] 8007a3a: f5b3 6fe0 cmp.w r3, #1792 @ 0x700 8007a3e: d906 bls.n 8007a4e { hspi->RxISR = SPI_2linesRxISR_16BIT; 8007a40: 68fb ldr r3, [r7, #12] 8007a42: 4a23 ldr r2, [pc, #140] @ (8007ad0 ) 8007a44: 64da str r2, [r3, #76] @ 0x4c hspi->TxISR = SPI_2linesTxISR_16BIT; 8007a46: 68fb ldr r3, [r7, #12] 8007a48: 4a22 ldr r2, [pc, #136] @ (8007ad4 ) 8007a4a: 651a str r2, [r3, #80] @ 0x50 8007a4c: e005 b.n 8007a5a } else { hspi->RxISR = SPI_2linesRxISR_8BIT; 8007a4e: 68fb ldr r3, [r7, #12] 8007a50: 4a21 ldr r2, [pc, #132] @ (8007ad8 ) 8007a52: 64da str r2, [r3, #76] @ 0x4c hspi->TxISR = SPI_2linesTxISR_8BIT; 8007a54: 68fb ldr r3, [r7, #12] 8007a56: 4a21 ldr r2, [pc, #132] @ (8007adc ) 8007a58: 651a str r2, [r3, #80] @ 0x50 hspi->CRCSize = 0U; } #endif /* USE_SPI_CRC */ /* Check if packing mode is enabled and if there is more than 2 data to receive */ if ((hspi->Init.DataSize > SPI_DATASIZE_8BIT) || (Size >= 2U)) 8007a5a: 68fb ldr r3, [r7, #12] 8007a5c: 68db ldr r3, [r3, #12] 8007a5e: f5b3 6fe0 cmp.w r3, #1792 @ 0x700 8007a62: d802 bhi.n 8007a6a 8007a64: 887b ldrh r3, [r7, #2] 8007a66: 2b01 cmp r3, #1 8007a68: d908 bls.n 8007a7c { /* Set RX Fifo threshold according the reception data length: 16 bit */ CLEAR_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD); 8007a6a: 68fb ldr r3, [r7, #12] 8007a6c: 681b ldr r3, [r3, #0] 8007a6e: 685a ldr r2, [r3, #4] 8007a70: 68fb ldr r3, [r7, #12] 8007a72: 681b ldr r3, [r3, #0] 8007a74: f422 5280 bic.w r2, r2, #4096 @ 0x1000 8007a78: 605a str r2, [r3, #4] 8007a7a: e007 b.n 8007a8c } else { /* Set RX Fifo threshold according the reception data length: 8 bit */ SET_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD); 8007a7c: 68fb ldr r3, [r7, #12] 8007a7e: 681b ldr r3, [r3, #0] 8007a80: 685a ldr r2, [r3, #4] 8007a82: 68fb ldr r3, [r7, #12] 8007a84: 681b ldr r3, [r3, #0] 8007a86: f442 5280 orr.w r2, r2, #4096 @ 0x1000 8007a8a: 605a str r2, [r3, #4] } /* Check if the SPI is already enabled */ if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE) 8007a8c: 68fb ldr r3, [r7, #12] 8007a8e: 681b ldr r3, [r3, #0] 8007a90: 681b ldr r3, [r3, #0] 8007a92: f003 0340 and.w r3, r3, #64 @ 0x40 8007a96: 2b40 cmp r3, #64 @ 0x40 8007a98: d007 beq.n 8007aaa { /* Enable SPI peripheral */ __HAL_SPI_ENABLE(hspi); 8007a9a: 68fb ldr r3, [r7, #12] 8007a9c: 681b ldr r3, [r3, #0] 8007a9e: 681a ldr r2, [r3, #0] 8007aa0: 68fb ldr r3, [r7, #12] 8007aa2: 681b ldr r3, [r3, #0] 8007aa4: f042 0240 orr.w r2, r2, #64 @ 0x40 8007aa8: 601a str r2, [r3, #0] } /* Process Unlocked */ __HAL_UNLOCK(hspi); 8007aaa: 68fb ldr r3, [r7, #12] 8007aac: 2200 movs r2, #0 8007aae: f883 205c strb.w r2, [r3, #92] @ 0x5c /* Enable TXE, RXNE and ERR interrupt */ __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_RXNE | SPI_IT_ERR)); 8007ab2: 68fb ldr r3, [r7, #12] 8007ab4: 681b ldr r3, [r3, #0] 8007ab6: 685a ldr r2, [r3, #4] 8007ab8: 68fb ldr r3, [r7, #12] 8007aba: 681b ldr r3, [r3, #0] 8007abc: f042 02e0 orr.w r2, r2, #224 @ 0xe0 8007ac0: 605a str r2, [r3, #4] return HAL_OK; 8007ac2: 2300 movs r3, #0 } 8007ac4: 4618 mov r0, r3 8007ac6: 371c adds r7, #28 8007ac8: 46bd mov sp, r7 8007aca: f85d 7b04 ldr.w r7, [sp], #4 8007ace: 4770 bx lr 8007ad0: 08007e83 .word 0x08007e83 8007ad4: 08007ee9 .word 0x08007ee9 8007ad8: 08007d33 .word 0x08007d33 8007adc: 08007df1 .word 0x08007df1 08007ae0 : * @param hspi pointer to a SPI_HandleTypeDef structure that contains * the configuration information for the specified SPI module. * @retval None */ void HAL_SPI_IRQHandler(SPI_HandleTypeDef *hspi) { 8007ae0: b580 push {r7, lr} 8007ae2: b088 sub sp, #32 8007ae4: af00 add r7, sp, #0 8007ae6: 6078 str r0, [r7, #4] uint32_t itsource = hspi->Instance->CR2; 8007ae8: 687b ldr r3, [r7, #4] 8007aea: 681b ldr r3, [r3, #0] 8007aec: 685b ldr r3, [r3, #4] 8007aee: 61fb str r3, [r7, #28] uint32_t itflag = hspi->Instance->SR; 8007af0: 687b ldr r3, [r7, #4] 8007af2: 681b ldr r3, [r3, #0] 8007af4: 689b ldr r3, [r3, #8] 8007af6: 61bb str r3, [r7, #24] /* SPI in mode Receiver ----------------------------------------------------*/ if ((SPI_CHECK_FLAG(itflag, SPI_FLAG_OVR) == RESET) && 8007af8: 69bb ldr r3, [r7, #24] 8007afa: 099b lsrs r3, r3, #6 8007afc: f003 0301 and.w r3, r3, #1 8007b00: 2b00 cmp r3, #0 8007b02: d10f bne.n 8007b24 (SPI_CHECK_FLAG(itflag, SPI_FLAG_RXNE) != RESET) && (SPI_CHECK_IT_SOURCE(itsource, SPI_IT_RXNE) != RESET)) 8007b04: 69bb ldr r3, [r7, #24] 8007b06: f003 0301 and.w r3, r3, #1 if ((SPI_CHECK_FLAG(itflag, SPI_FLAG_OVR) == RESET) && 8007b0a: 2b00 cmp r3, #0 8007b0c: d00a beq.n 8007b24 (SPI_CHECK_FLAG(itflag, SPI_FLAG_RXNE) != RESET) && (SPI_CHECK_IT_SOURCE(itsource, SPI_IT_RXNE) != RESET)) 8007b0e: 69fb ldr r3, [r7, #28] 8007b10: 099b lsrs r3, r3, #6 8007b12: f003 0301 and.w r3, r3, #1 8007b16: 2b00 cmp r3, #0 8007b18: d004 beq.n 8007b24 { hspi->RxISR(hspi); 8007b1a: 687b ldr r3, [r7, #4] 8007b1c: 6cdb ldr r3, [r3, #76] @ 0x4c 8007b1e: 6878 ldr r0, [r7, #4] 8007b20: 4798 blx r3 return; 8007b22: e0d7 b.n 8007cd4 } /* SPI in mode Transmitter -------------------------------------------------*/ if ((SPI_CHECK_FLAG(itflag, SPI_FLAG_TXE) != RESET) && (SPI_CHECK_IT_SOURCE(itsource, SPI_IT_TXE) != RESET)) 8007b24: 69bb ldr r3, [r7, #24] 8007b26: 085b lsrs r3, r3, #1 8007b28: f003 0301 and.w r3, r3, #1 8007b2c: 2b00 cmp r3, #0 8007b2e: d00a beq.n 8007b46 8007b30: 69fb ldr r3, [r7, #28] 8007b32: 09db lsrs r3, r3, #7 8007b34: f003 0301 and.w r3, r3, #1 8007b38: 2b00 cmp r3, #0 8007b3a: d004 beq.n 8007b46 { hspi->TxISR(hspi); 8007b3c: 687b ldr r3, [r7, #4] 8007b3e: 6d1b ldr r3, [r3, #80] @ 0x50 8007b40: 6878 ldr r0, [r7, #4] 8007b42: 4798 blx r3 return; 8007b44: e0c6 b.n 8007cd4 } /* SPI in Error Treatment --------------------------------------------------*/ if (((SPI_CHECK_FLAG(itflag, SPI_FLAG_MODF) != RESET) || (SPI_CHECK_FLAG(itflag, SPI_FLAG_OVR) != RESET) 8007b46: 69bb ldr r3, [r7, #24] 8007b48: 095b lsrs r3, r3, #5 8007b4a: f003 0301 and.w r3, r3, #1 8007b4e: 2b00 cmp r3, #0 8007b50: d10c bne.n 8007b6c 8007b52: 69bb ldr r3, [r7, #24] 8007b54: 099b lsrs r3, r3, #6 8007b56: f003 0301 and.w r3, r3, #1 8007b5a: 2b00 cmp r3, #0 8007b5c: d106 bne.n 8007b6c || (SPI_CHECK_FLAG(itflag, SPI_FLAG_FRE) != RESET)) && (SPI_CHECK_IT_SOURCE(itsource, SPI_IT_ERR) != RESET)) 8007b5e: 69bb ldr r3, [r7, #24] 8007b60: 0a1b lsrs r3, r3, #8 8007b62: f003 0301 and.w r3, r3, #1 8007b66: 2b00 cmp r3, #0 8007b68: f000 80b4 beq.w 8007cd4 8007b6c: 69fb ldr r3, [r7, #28] 8007b6e: 095b lsrs r3, r3, #5 8007b70: f003 0301 and.w r3, r3, #1 8007b74: 2b00 cmp r3, #0 8007b76: f000 80ad beq.w 8007cd4 { /* SPI Overrun error interrupt occurred ----------------------------------*/ if (SPI_CHECK_FLAG(itflag, SPI_FLAG_OVR) != RESET) 8007b7a: 69bb ldr r3, [r7, #24] 8007b7c: 099b lsrs r3, r3, #6 8007b7e: f003 0301 and.w r3, r3, #1 8007b82: 2b00 cmp r3, #0 8007b84: d023 beq.n 8007bce { if (hspi->State != HAL_SPI_STATE_BUSY_TX) 8007b86: 687b ldr r3, [r7, #4] 8007b88: f893 305d ldrb.w r3, [r3, #93] @ 0x5d 8007b8c: b2db uxtb r3, r3 8007b8e: 2b03 cmp r3, #3 8007b90: d011 beq.n 8007bb6 { SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_OVR); 8007b92: 687b ldr r3, [r7, #4] 8007b94: 6e1b ldr r3, [r3, #96] @ 0x60 8007b96: f043 0204 orr.w r2, r3, #4 8007b9a: 687b ldr r3, [r7, #4] 8007b9c: 661a str r2, [r3, #96] @ 0x60 __HAL_SPI_CLEAR_OVRFLAG(hspi); 8007b9e: 2300 movs r3, #0 8007ba0: 617b str r3, [r7, #20] 8007ba2: 687b ldr r3, [r7, #4] 8007ba4: 681b ldr r3, [r3, #0] 8007ba6: 68db ldr r3, [r3, #12] 8007ba8: 617b str r3, [r7, #20] 8007baa: 687b ldr r3, [r7, #4] 8007bac: 681b ldr r3, [r3, #0] 8007bae: 689b ldr r3, [r3, #8] 8007bb0: 617b str r3, [r7, #20] 8007bb2: 697b ldr r3, [r7, #20] 8007bb4: e00b b.n 8007bce } else { __HAL_SPI_CLEAR_OVRFLAG(hspi); 8007bb6: 2300 movs r3, #0 8007bb8: 613b str r3, [r7, #16] 8007bba: 687b ldr r3, [r7, #4] 8007bbc: 681b ldr r3, [r3, #0] 8007bbe: 68db ldr r3, [r3, #12] 8007bc0: 613b str r3, [r7, #16] 8007bc2: 687b ldr r3, [r7, #4] 8007bc4: 681b ldr r3, [r3, #0] 8007bc6: 689b ldr r3, [r3, #8] 8007bc8: 613b str r3, [r7, #16] 8007bca: 693b ldr r3, [r7, #16] return; 8007bcc: e082 b.n 8007cd4 } } /* SPI Mode Fault error interrupt occurred -------------------------------*/ if (SPI_CHECK_FLAG(itflag, SPI_FLAG_MODF) != RESET) 8007bce: 69bb ldr r3, [r7, #24] 8007bd0: 095b lsrs r3, r3, #5 8007bd2: f003 0301 and.w r3, r3, #1 8007bd6: 2b00 cmp r3, #0 8007bd8: d014 beq.n 8007c04 { SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_MODF); 8007bda: 687b ldr r3, [r7, #4] 8007bdc: 6e1b ldr r3, [r3, #96] @ 0x60 8007bde: f043 0201 orr.w r2, r3, #1 8007be2: 687b ldr r3, [r7, #4] 8007be4: 661a str r2, [r3, #96] @ 0x60 __HAL_SPI_CLEAR_MODFFLAG(hspi); 8007be6: 2300 movs r3, #0 8007be8: 60fb str r3, [r7, #12] 8007bea: 687b ldr r3, [r7, #4] 8007bec: 681b ldr r3, [r3, #0] 8007bee: 689b ldr r3, [r3, #8] 8007bf0: 60fb str r3, [r7, #12] 8007bf2: 687b ldr r3, [r7, #4] 8007bf4: 681b ldr r3, [r3, #0] 8007bf6: 681a ldr r2, [r3, #0] 8007bf8: 687b ldr r3, [r7, #4] 8007bfa: 681b ldr r3, [r3, #0] 8007bfc: f022 0240 bic.w r2, r2, #64 @ 0x40 8007c00: 601a str r2, [r3, #0] 8007c02: 68fb ldr r3, [r7, #12] } /* SPI Frame error interrupt occurred ------------------------------------*/ if (SPI_CHECK_FLAG(itflag, SPI_FLAG_FRE) != RESET) 8007c04: 69bb ldr r3, [r7, #24] 8007c06: 0a1b lsrs r3, r3, #8 8007c08: f003 0301 and.w r3, r3, #1 8007c0c: 2b00 cmp r3, #0 8007c0e: d00c beq.n 8007c2a { SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FRE); 8007c10: 687b ldr r3, [r7, #4] 8007c12: 6e1b ldr r3, [r3, #96] @ 0x60 8007c14: f043 0208 orr.w r2, r3, #8 8007c18: 687b ldr r3, [r7, #4] 8007c1a: 661a str r2, [r3, #96] @ 0x60 __HAL_SPI_CLEAR_FREFLAG(hspi); 8007c1c: 2300 movs r3, #0 8007c1e: 60bb str r3, [r7, #8] 8007c20: 687b ldr r3, [r7, #4] 8007c22: 681b ldr r3, [r3, #0] 8007c24: 689b ldr r3, [r3, #8] 8007c26: 60bb str r3, [r7, #8] 8007c28: 68bb ldr r3, [r7, #8] } if (hspi->ErrorCode != HAL_SPI_ERROR_NONE) 8007c2a: 687b ldr r3, [r7, #4] 8007c2c: 6e1b ldr r3, [r3, #96] @ 0x60 8007c2e: 2b00 cmp r3, #0 8007c30: d04f beq.n 8007cd2 { /* Disable all interrupts */ __HAL_SPI_DISABLE_IT(hspi, SPI_IT_RXNE | SPI_IT_TXE | SPI_IT_ERR); 8007c32: 687b ldr r3, [r7, #4] 8007c34: 681b ldr r3, [r3, #0] 8007c36: 685a ldr r2, [r3, #4] 8007c38: 687b ldr r3, [r7, #4] 8007c3a: 681b ldr r3, [r3, #0] 8007c3c: f022 02e0 bic.w r2, r2, #224 @ 0xe0 8007c40: 605a str r2, [r3, #4] hspi->State = HAL_SPI_STATE_READY; 8007c42: 687b ldr r3, [r7, #4] 8007c44: 2201 movs r2, #1 8007c46: f883 205d strb.w r2, [r3, #93] @ 0x5d /* Disable the SPI DMA requests if enabled */ if ((HAL_IS_BIT_SET(itsource, SPI_CR2_TXDMAEN)) || (HAL_IS_BIT_SET(itsource, SPI_CR2_RXDMAEN))) 8007c4a: 69fb ldr r3, [r7, #28] 8007c4c: f003 0302 and.w r3, r3, #2 8007c50: 2b00 cmp r3, #0 8007c52: d104 bne.n 8007c5e 8007c54: 69fb ldr r3, [r7, #28] 8007c56: f003 0301 and.w r3, r3, #1 8007c5a: 2b00 cmp r3, #0 8007c5c: d034 beq.n 8007cc8 { CLEAR_BIT(hspi->Instance->CR2, (SPI_CR2_TXDMAEN | SPI_CR2_RXDMAEN)); 8007c5e: 687b ldr r3, [r7, #4] 8007c60: 681b ldr r3, [r3, #0] 8007c62: 685a ldr r2, [r3, #4] 8007c64: 687b ldr r3, [r7, #4] 8007c66: 681b ldr r3, [r3, #0] 8007c68: f022 0203 bic.w r2, r2, #3 8007c6c: 605a str r2, [r3, #4] /* Abort the SPI DMA Rx channel */ if (hspi->hdmarx != NULL) 8007c6e: 687b ldr r3, [r7, #4] 8007c70: 6d9b ldr r3, [r3, #88] @ 0x58 8007c72: 2b00 cmp r3, #0 8007c74: d011 beq.n 8007c9a { /* Set the SPI DMA Abort callback : will lead to call HAL_SPI_ErrorCallback() at end of DMA abort procedure */ hspi->hdmarx->XferAbortCallback = SPI_DMAAbortOnError; 8007c76: 687b ldr r3, [r7, #4] 8007c78: 6d9b ldr r3, [r3, #88] @ 0x58 8007c7a: 4a18 ldr r2, [pc, #96] @ (8007cdc ) 8007c7c: 639a str r2, [r3, #56] @ 0x38 if (HAL_OK != HAL_DMA_Abort_IT(hspi->hdmarx)) 8007c7e: 687b ldr r3, [r7, #4] 8007c80: 6d9b ldr r3, [r3, #88] @ 0x58 8007c82: 4618 mov r0, r3 8007c84: f7fc fa44 bl 8004110 8007c88: 4603 mov r3, r0 8007c8a: 2b00 cmp r3, #0 8007c8c: d005 beq.n 8007c9a { SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_ABORT); 8007c8e: 687b ldr r3, [r7, #4] 8007c90: 6e1b ldr r3, [r3, #96] @ 0x60 8007c92: f043 0240 orr.w r2, r3, #64 @ 0x40 8007c96: 687b ldr r3, [r7, #4] 8007c98: 661a str r2, [r3, #96] @ 0x60 } } /* Abort the SPI DMA Tx channel */ if (hspi->hdmatx != NULL) 8007c9a: 687b ldr r3, [r7, #4] 8007c9c: 6d5b ldr r3, [r3, #84] @ 0x54 8007c9e: 2b00 cmp r3, #0 8007ca0: d016 beq.n 8007cd0 { /* Set the SPI DMA Abort callback : will lead to call HAL_SPI_ErrorCallback() at end of DMA abort procedure */ hspi->hdmatx->XferAbortCallback = SPI_DMAAbortOnError; 8007ca2: 687b ldr r3, [r7, #4] 8007ca4: 6d5b ldr r3, [r3, #84] @ 0x54 8007ca6: 4a0d ldr r2, [pc, #52] @ (8007cdc ) 8007ca8: 639a str r2, [r3, #56] @ 0x38 if (HAL_OK != HAL_DMA_Abort_IT(hspi->hdmatx)) 8007caa: 687b ldr r3, [r7, #4] 8007cac: 6d5b ldr r3, [r3, #84] @ 0x54 8007cae: 4618 mov r0, r3 8007cb0: f7fc fa2e bl 8004110 8007cb4: 4603 mov r3, r0 8007cb6: 2b00 cmp r3, #0 8007cb8: d00a beq.n 8007cd0 { SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_ABORT); 8007cba: 687b ldr r3, [r7, #4] 8007cbc: 6e1b ldr r3, [r3, #96] @ 0x60 8007cbe: f043 0240 orr.w r2, r3, #64 @ 0x40 8007cc2: 687b ldr r3, [r7, #4] 8007cc4: 661a str r2, [r3, #96] @ 0x60 if (hspi->hdmatx != NULL) 8007cc6: e003 b.n 8007cd0 { /* Call user error callback */ #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) hspi->ErrorCallback(hspi); #else HAL_SPI_ErrorCallback(hspi); 8007cc8: 6878 ldr r0, [r7, #4] 8007cca: f000 f813 bl 8007cf4 #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ } } return; 8007cce: e000 b.n 8007cd2 if (hspi->hdmatx != NULL) 8007cd0: bf00 nop return; 8007cd2: bf00 nop } } 8007cd4: 3720 adds r7, #32 8007cd6: 46bd mov sp, r7 8007cd8: bd80 pop {r7, pc} 8007cda: bf00 nop 8007cdc: 08007d09 .word 0x08007d09 08007ce0 : * @param hspi pointer to a SPI_HandleTypeDef structure that contains * the configuration information for SPI module. * @retval None */ __weak void HAL_SPI_TxRxCpltCallback(SPI_HandleTypeDef *hspi) { 8007ce0: b480 push {r7} 8007ce2: b083 sub sp, #12 8007ce4: af00 add r7, sp, #0 8007ce6: 6078 str r0, [r7, #4] UNUSED(hspi); /* NOTE : This function should not be modified, when the callback is needed, the HAL_SPI_TxRxCpltCallback should be implemented in the user file */ } 8007ce8: bf00 nop 8007cea: 370c adds r7, #12 8007cec: 46bd mov sp, r7 8007cee: f85d 7b04 ldr.w r7, [sp], #4 8007cf2: 4770 bx lr 08007cf4 : * @param hspi pointer to a SPI_HandleTypeDef structure that contains * the configuration information for SPI module. * @retval None */ __weak void HAL_SPI_ErrorCallback(SPI_HandleTypeDef *hspi) { 8007cf4: b480 push {r7} 8007cf6: b083 sub sp, #12 8007cf8: af00 add r7, sp, #0 8007cfa: 6078 str r0, [r7, #4] the HAL_SPI_ErrorCallback should be implemented in the user file */ /* NOTE : The ErrorCode parameter in the hspi handle is updated by the SPI processes and user can use HAL_SPI_GetError() API to check the latest error occurred */ } 8007cfc: bf00 nop 8007cfe: 370c adds r7, #12 8007d00: 46bd mov sp, r7 8007d02: f85d 7b04 ldr.w r7, [sp], #4 8007d06: 4770 bx lr 08007d08 : * (To be called at end of DMA Abort procedure following error occurrence). * @param hdma DMA handle. * @retval None */ static void SPI_DMAAbortOnError(DMA_HandleTypeDef *hdma) { 8007d08: b580 push {r7, lr} 8007d0a: b084 sub sp, #16 8007d0c: af00 add r7, sp, #0 8007d0e: 6078 str r0, [r7, #4] SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); 8007d10: 687b ldr r3, [r7, #4] 8007d12: 6a9b ldr r3, [r3, #40] @ 0x28 8007d14: 60fb str r3, [r7, #12] hspi->RxXferCount = 0U; 8007d16: 68fb ldr r3, [r7, #12] 8007d18: 2200 movs r2, #0 8007d1a: f8a3 2046 strh.w r2, [r3, #70] @ 0x46 hspi->TxXferCount = 0U; 8007d1e: 68fb ldr r3, [r7, #12] 8007d20: 2200 movs r2, #0 8007d22: 87da strh r2, [r3, #62] @ 0x3e /* Call user error callback */ #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) hspi->ErrorCallback(hspi); #else HAL_SPI_ErrorCallback(hspi); 8007d24: 68f8 ldr r0, [r7, #12] 8007d26: f7ff ffe5 bl 8007cf4 #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ } 8007d2a: bf00 nop 8007d2c: 3710 adds r7, #16 8007d2e: 46bd mov sp, r7 8007d30: bd80 pop {r7, pc} 08007d32 : * @param hspi pointer to a SPI_HandleTypeDef structure that contains * the configuration information for SPI module. * @retval None */ static void SPI_2linesRxISR_8BIT(struct __SPI_HandleTypeDef *hspi) { 8007d32: b580 push {r7, lr} 8007d34: b082 sub sp, #8 8007d36: af00 add r7, sp, #0 8007d38: 6078 str r0, [r7, #4] /* Receive data in packing mode */ if (hspi->RxXferCount > 1U) 8007d3a: 687b ldr r3, [r7, #4] 8007d3c: f8b3 3046 ldrh.w r3, [r3, #70] @ 0x46 8007d40: b29b uxth r3, r3 8007d42: 2b01 cmp r3, #1 8007d44: d923 bls.n 8007d8e { *((uint16_t *)hspi->pRxBuffPtr) = (uint16_t)(hspi->Instance->DR); 8007d46: 687b ldr r3, [r7, #4] 8007d48: 681b ldr r3, [r3, #0] 8007d4a: 68da ldr r2, [r3, #12] 8007d4c: 687b ldr r3, [r7, #4] 8007d4e: 6c1b ldr r3, [r3, #64] @ 0x40 8007d50: b292 uxth r2, r2 8007d52: 801a strh r2, [r3, #0] hspi->pRxBuffPtr += sizeof(uint16_t); 8007d54: 687b ldr r3, [r7, #4] 8007d56: 6c1b ldr r3, [r3, #64] @ 0x40 8007d58: 1c9a adds r2, r3, #2 8007d5a: 687b ldr r3, [r7, #4] 8007d5c: 641a str r2, [r3, #64] @ 0x40 hspi->RxXferCount -= 2U; 8007d5e: 687b ldr r3, [r7, #4] 8007d60: f8b3 3046 ldrh.w r3, [r3, #70] @ 0x46 8007d64: b29b uxth r3, r3 8007d66: 3b02 subs r3, #2 8007d68: b29a uxth r2, r3 8007d6a: 687b ldr r3, [r7, #4] 8007d6c: f8a3 2046 strh.w r2, [r3, #70] @ 0x46 if (hspi->RxXferCount == 1U) 8007d70: 687b ldr r3, [r7, #4] 8007d72: f8b3 3046 ldrh.w r3, [r3, #70] @ 0x46 8007d76: b29b uxth r3, r3 8007d78: 2b01 cmp r3, #1 8007d7a: d11f bne.n 8007dbc { /* Set RX Fifo threshold according the reception data length: 8bit */ SET_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD); 8007d7c: 687b ldr r3, [r7, #4] 8007d7e: 681b ldr r3, [r3, #0] 8007d80: 685a ldr r2, [r3, #4] 8007d82: 687b ldr r3, [r7, #4] 8007d84: 681b ldr r3, [r3, #0] 8007d86: f442 5280 orr.w r2, r2, #4096 @ 0x1000 8007d8a: 605a str r2, [r3, #4] 8007d8c: e016 b.n 8007dbc } } /* Receive data in 8 Bit mode */ else { *hspi->pRxBuffPtr = *((__IO uint8_t *)&hspi->Instance->DR); 8007d8e: 687b ldr r3, [r7, #4] 8007d90: 681b ldr r3, [r3, #0] 8007d92: f103 020c add.w r2, r3, #12 8007d96: 687b ldr r3, [r7, #4] 8007d98: 6c1b ldr r3, [r3, #64] @ 0x40 8007d9a: 7812 ldrb r2, [r2, #0] 8007d9c: b2d2 uxtb r2, r2 8007d9e: 701a strb r2, [r3, #0] hspi->pRxBuffPtr++; 8007da0: 687b ldr r3, [r7, #4] 8007da2: 6c1b ldr r3, [r3, #64] @ 0x40 8007da4: 1c5a adds r2, r3, #1 8007da6: 687b ldr r3, [r7, #4] 8007da8: 641a str r2, [r3, #64] @ 0x40 hspi->RxXferCount--; 8007daa: 687b ldr r3, [r7, #4] 8007dac: f8b3 3046 ldrh.w r3, [r3, #70] @ 0x46 8007db0: b29b uxth r3, r3 8007db2: 3b01 subs r3, #1 8007db4: b29a uxth r2, r3 8007db6: 687b ldr r3, [r7, #4] 8007db8: f8a3 2046 strh.w r2, [r3, #70] @ 0x46 } /* Check end of the reception */ if (hspi->RxXferCount == 0U) 8007dbc: 687b ldr r3, [r7, #4] 8007dbe: f8b3 3046 ldrh.w r3, [r3, #70] @ 0x46 8007dc2: b29b uxth r3, r3 8007dc4: 2b00 cmp r3, #0 8007dc6: d10f bne.n 8007de8 return; } #endif /* USE_SPI_CRC */ /* Disable RXNE and ERR interrupt */ __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_RXNE | SPI_IT_ERR)); 8007dc8: 687b ldr r3, [r7, #4] 8007dca: 681b ldr r3, [r3, #0] 8007dcc: 685a ldr r2, [r3, #4] 8007dce: 687b ldr r3, [r7, #4] 8007dd0: 681b ldr r3, [r3, #0] 8007dd2: f022 0260 bic.w r2, r2, #96 @ 0x60 8007dd6: 605a str r2, [r3, #4] if (hspi->TxXferCount == 0U) 8007dd8: 687b ldr r3, [r7, #4] 8007dda: 8fdb ldrh r3, [r3, #62] @ 0x3e 8007ddc: b29b uxth r3, r3 8007dde: 2b00 cmp r3, #0 8007de0: d102 bne.n 8007de8 { SPI_CloseRxTx_ISR(hspi); 8007de2: 6878 ldr r0, [r7, #4] 8007de4: f000 fb00 bl 80083e8 } } } 8007de8: bf00 nop 8007dea: 3708 adds r7, #8 8007dec: 46bd mov sp, r7 8007dee: bd80 pop {r7, pc} 08007df0 : * @param hspi pointer to a SPI_HandleTypeDef structure that contains * the configuration information for SPI module. * @retval None */ static void SPI_2linesTxISR_8BIT(struct __SPI_HandleTypeDef *hspi) { 8007df0: b580 push {r7, lr} 8007df2: b082 sub sp, #8 8007df4: af00 add r7, sp, #0 8007df6: 6078 str r0, [r7, #4] /* Transmit data in packing Bit mode */ if (hspi->TxXferCount >= 2U) 8007df8: 687b ldr r3, [r7, #4] 8007dfa: 8fdb ldrh r3, [r3, #62] @ 0x3e 8007dfc: b29b uxth r3, r3 8007dfe: 2b01 cmp r3, #1 8007e00: d912 bls.n 8007e28 { hspi->Instance->DR = *((const uint16_t *)hspi->pTxBuffPtr); 8007e02: 687b ldr r3, [r7, #4] 8007e04: 6b9b ldr r3, [r3, #56] @ 0x38 8007e06: 881a ldrh r2, [r3, #0] 8007e08: 687b ldr r3, [r7, #4] 8007e0a: 681b ldr r3, [r3, #0] 8007e0c: 60da str r2, [r3, #12] hspi->pTxBuffPtr += sizeof(uint16_t); 8007e0e: 687b ldr r3, [r7, #4] 8007e10: 6b9b ldr r3, [r3, #56] @ 0x38 8007e12: 1c9a adds r2, r3, #2 8007e14: 687b ldr r3, [r7, #4] 8007e16: 639a str r2, [r3, #56] @ 0x38 hspi->TxXferCount -= 2U; 8007e18: 687b ldr r3, [r7, #4] 8007e1a: 8fdb ldrh r3, [r3, #62] @ 0x3e 8007e1c: b29b uxth r3, r3 8007e1e: 3b02 subs r3, #2 8007e20: b29a uxth r2, r3 8007e22: 687b ldr r3, [r7, #4] 8007e24: 87da strh r2, [r3, #62] @ 0x3e 8007e26: e012 b.n 8007e4e } /* Transmit data in 8 Bit mode */ else { *(__IO uint8_t *)&hspi->Instance->DR = *((const uint8_t *)hspi->pTxBuffPtr); 8007e28: 687b ldr r3, [r7, #4] 8007e2a: 6b9a ldr r2, [r3, #56] @ 0x38 8007e2c: 687b ldr r3, [r7, #4] 8007e2e: 681b ldr r3, [r3, #0] 8007e30: 330c adds r3, #12 8007e32: 7812 ldrb r2, [r2, #0] 8007e34: 701a strb r2, [r3, #0] hspi->pTxBuffPtr++; 8007e36: 687b ldr r3, [r7, #4] 8007e38: 6b9b ldr r3, [r3, #56] @ 0x38 8007e3a: 1c5a adds r2, r3, #1 8007e3c: 687b ldr r3, [r7, #4] 8007e3e: 639a str r2, [r3, #56] @ 0x38 hspi->TxXferCount--; 8007e40: 687b ldr r3, [r7, #4] 8007e42: 8fdb ldrh r3, [r3, #62] @ 0x3e 8007e44: b29b uxth r3, r3 8007e46: 3b01 subs r3, #1 8007e48: b29a uxth r2, r3 8007e4a: 687b ldr r3, [r7, #4] 8007e4c: 87da strh r2, [r3, #62] @ 0x3e } /* Check the end of the transmission */ if (hspi->TxXferCount == 0U) 8007e4e: 687b ldr r3, [r7, #4] 8007e50: 8fdb ldrh r3, [r3, #62] @ 0x3e 8007e52: b29b uxth r3, r3 8007e54: 2b00 cmp r3, #0 8007e56: d110 bne.n 8007e7a return; } #endif /* USE_SPI_CRC */ /* Disable TXE interrupt */ __HAL_SPI_DISABLE_IT(hspi, SPI_IT_TXE); 8007e58: 687b ldr r3, [r7, #4] 8007e5a: 681b ldr r3, [r3, #0] 8007e5c: 685a ldr r2, [r3, #4] 8007e5e: 687b ldr r3, [r7, #4] 8007e60: 681b ldr r3, [r3, #0] 8007e62: f022 0280 bic.w r2, r2, #128 @ 0x80 8007e66: 605a str r2, [r3, #4] if (hspi->RxXferCount == 0U) 8007e68: 687b ldr r3, [r7, #4] 8007e6a: f8b3 3046 ldrh.w r3, [r3, #70] @ 0x46 8007e6e: b29b uxth r3, r3 8007e70: 2b00 cmp r3, #0 8007e72: d102 bne.n 8007e7a { SPI_CloseRxTx_ISR(hspi); 8007e74: 6878 ldr r0, [r7, #4] 8007e76: f000 fab7 bl 80083e8 } } } 8007e7a: bf00 nop 8007e7c: 3708 adds r7, #8 8007e7e: 46bd mov sp, r7 8007e80: bd80 pop {r7, pc} 08007e82 : * @param hspi pointer to a SPI_HandleTypeDef structure that contains * the configuration information for SPI module. * @retval None */ static void SPI_2linesRxISR_16BIT(struct __SPI_HandleTypeDef *hspi) { 8007e82: b580 push {r7, lr} 8007e84: b082 sub sp, #8 8007e86: af00 add r7, sp, #0 8007e88: 6078 str r0, [r7, #4] /* Receive data in 16 Bit mode */ *((uint16_t *)hspi->pRxBuffPtr) = (uint16_t)(hspi->Instance->DR); 8007e8a: 687b ldr r3, [r7, #4] 8007e8c: 681b ldr r3, [r3, #0] 8007e8e: 68da ldr r2, [r3, #12] 8007e90: 687b ldr r3, [r7, #4] 8007e92: 6c1b ldr r3, [r3, #64] @ 0x40 8007e94: b292 uxth r2, r2 8007e96: 801a strh r2, [r3, #0] hspi->pRxBuffPtr += sizeof(uint16_t); 8007e98: 687b ldr r3, [r7, #4] 8007e9a: 6c1b ldr r3, [r3, #64] @ 0x40 8007e9c: 1c9a adds r2, r3, #2 8007e9e: 687b ldr r3, [r7, #4] 8007ea0: 641a str r2, [r3, #64] @ 0x40 hspi->RxXferCount--; 8007ea2: 687b ldr r3, [r7, #4] 8007ea4: f8b3 3046 ldrh.w r3, [r3, #70] @ 0x46 8007ea8: b29b uxth r3, r3 8007eaa: 3b01 subs r3, #1 8007eac: b29a uxth r2, r3 8007eae: 687b ldr r3, [r7, #4] 8007eb0: f8a3 2046 strh.w r2, [r3, #70] @ 0x46 if (hspi->RxXferCount == 0U) 8007eb4: 687b ldr r3, [r7, #4] 8007eb6: f8b3 3046 ldrh.w r3, [r3, #70] @ 0x46 8007eba: b29b uxth r3, r3 8007ebc: 2b00 cmp r3, #0 8007ebe: d10f bne.n 8007ee0 return; } #endif /* USE_SPI_CRC */ /* Disable RXNE interrupt */ __HAL_SPI_DISABLE_IT(hspi, SPI_IT_RXNE); 8007ec0: 687b ldr r3, [r7, #4] 8007ec2: 681b ldr r3, [r3, #0] 8007ec4: 685a ldr r2, [r3, #4] 8007ec6: 687b ldr r3, [r7, #4] 8007ec8: 681b ldr r3, [r3, #0] 8007eca: f022 0240 bic.w r2, r2, #64 @ 0x40 8007ece: 605a str r2, [r3, #4] if (hspi->TxXferCount == 0U) 8007ed0: 687b ldr r3, [r7, #4] 8007ed2: 8fdb ldrh r3, [r3, #62] @ 0x3e 8007ed4: b29b uxth r3, r3 8007ed6: 2b00 cmp r3, #0 8007ed8: d102 bne.n 8007ee0 { SPI_CloseRxTx_ISR(hspi); 8007eda: 6878 ldr r0, [r7, #4] 8007edc: f000 fa84 bl 80083e8 } } } 8007ee0: bf00 nop 8007ee2: 3708 adds r7, #8 8007ee4: 46bd mov sp, r7 8007ee6: bd80 pop {r7, pc} 08007ee8 : * @param hspi pointer to a SPI_HandleTypeDef structure that contains * the configuration information for SPI module. * @retval None */ static void SPI_2linesTxISR_16BIT(struct __SPI_HandleTypeDef *hspi) { 8007ee8: b580 push {r7, lr} 8007eea: b082 sub sp, #8 8007eec: af00 add r7, sp, #0 8007eee: 6078 str r0, [r7, #4] /* Transmit data in 16 Bit mode */ hspi->Instance->DR = *((const uint16_t *)hspi->pTxBuffPtr); 8007ef0: 687b ldr r3, [r7, #4] 8007ef2: 6b9b ldr r3, [r3, #56] @ 0x38 8007ef4: 881a ldrh r2, [r3, #0] 8007ef6: 687b ldr r3, [r7, #4] 8007ef8: 681b ldr r3, [r3, #0] 8007efa: 60da str r2, [r3, #12] hspi->pTxBuffPtr += sizeof(uint16_t); 8007efc: 687b ldr r3, [r7, #4] 8007efe: 6b9b ldr r3, [r3, #56] @ 0x38 8007f00: 1c9a adds r2, r3, #2 8007f02: 687b ldr r3, [r7, #4] 8007f04: 639a str r2, [r3, #56] @ 0x38 hspi->TxXferCount--; 8007f06: 687b ldr r3, [r7, #4] 8007f08: 8fdb ldrh r3, [r3, #62] @ 0x3e 8007f0a: b29b uxth r3, r3 8007f0c: 3b01 subs r3, #1 8007f0e: b29a uxth r2, r3 8007f10: 687b ldr r3, [r7, #4] 8007f12: 87da strh r2, [r3, #62] @ 0x3e /* Enable CRC Transmission */ if (hspi->TxXferCount == 0U) 8007f14: 687b ldr r3, [r7, #4] 8007f16: 8fdb ldrh r3, [r3, #62] @ 0x3e 8007f18: b29b uxth r3, r3 8007f1a: 2b00 cmp r3, #0 8007f1c: d110 bne.n 8007f40 return; } #endif /* USE_SPI_CRC */ /* Disable TXE interrupt */ __HAL_SPI_DISABLE_IT(hspi, SPI_IT_TXE); 8007f1e: 687b ldr r3, [r7, #4] 8007f20: 681b ldr r3, [r3, #0] 8007f22: 685a ldr r2, [r3, #4] 8007f24: 687b ldr r3, [r7, #4] 8007f26: 681b ldr r3, [r3, #0] 8007f28: f022 0280 bic.w r2, r2, #128 @ 0x80 8007f2c: 605a str r2, [r3, #4] if (hspi->RxXferCount == 0U) 8007f2e: 687b ldr r3, [r7, #4] 8007f30: f8b3 3046 ldrh.w r3, [r3, #70] @ 0x46 8007f34: b29b uxth r3, r3 8007f36: 2b00 cmp r3, #0 8007f38: d102 bne.n 8007f40 { SPI_CloseRxTx_ISR(hspi); 8007f3a: 6878 ldr r0, [r7, #4] 8007f3c: f000 fa54 bl 80083e8 } } } 8007f40: bf00 nop 8007f42: 3708 adds r7, #8 8007f44: 46bd mov sp, r7 8007f46: bd80 pop {r7, pc} 08007f48 : * @param hspi pointer to a SPI_HandleTypeDef structure that contains * the configuration information for SPI module. * @retval None */ static void SPI_RxISR_8BIT(struct __SPI_HandleTypeDef *hspi) { 8007f48: b580 push {r7, lr} 8007f4a: b082 sub sp, #8 8007f4c: af00 add r7, sp, #0 8007f4e: 6078 str r0, [r7, #4] *hspi->pRxBuffPtr = (*(__IO uint8_t *)&hspi->Instance->DR); 8007f50: 687b ldr r3, [r7, #4] 8007f52: 681b ldr r3, [r3, #0] 8007f54: f103 020c add.w r2, r3, #12 8007f58: 687b ldr r3, [r7, #4] 8007f5a: 6c1b ldr r3, [r3, #64] @ 0x40 8007f5c: 7812 ldrb r2, [r2, #0] 8007f5e: b2d2 uxtb r2, r2 8007f60: 701a strb r2, [r3, #0] hspi->pRxBuffPtr++; 8007f62: 687b ldr r3, [r7, #4] 8007f64: 6c1b ldr r3, [r3, #64] @ 0x40 8007f66: 1c5a adds r2, r3, #1 8007f68: 687b ldr r3, [r7, #4] 8007f6a: 641a str r2, [r3, #64] @ 0x40 hspi->RxXferCount--; 8007f6c: 687b ldr r3, [r7, #4] 8007f6e: f8b3 3046 ldrh.w r3, [r3, #70] @ 0x46 8007f72: b29b uxth r3, r3 8007f74: 3b01 subs r3, #1 8007f76: b29a uxth r2, r3 8007f78: 687b ldr r3, [r7, #4] 8007f7a: f8a3 2046 strh.w r2, [r3, #70] @ 0x46 { SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT); } #endif /* USE_SPI_CRC */ if (hspi->RxXferCount == 0U) 8007f7e: 687b ldr r3, [r7, #4] 8007f80: f8b3 3046 ldrh.w r3, [r3, #70] @ 0x46 8007f84: b29b uxth r3, r3 8007f86: 2b00 cmp r3, #0 8007f88: d102 bne.n 8007f90 { hspi->RxISR = SPI_RxISR_8BITCRC; return; } #endif /* USE_SPI_CRC */ SPI_CloseRx_ISR(hspi); 8007f8a: 6878 ldr r0, [r7, #4] 8007f8c: f000 fa6e bl 800846c } } 8007f90: bf00 nop 8007f92: 3708 adds r7, #8 8007f94: 46bd mov sp, r7 8007f96: bd80 pop {r7, pc} 08007f98 : * @param hspi pointer to a SPI_HandleTypeDef structure that contains * the configuration information for SPI module. * @retval None */ static void SPI_RxISR_16BIT(struct __SPI_HandleTypeDef *hspi) { 8007f98: b580 push {r7, lr} 8007f9a: b082 sub sp, #8 8007f9c: af00 add r7, sp, #0 8007f9e: 6078 str r0, [r7, #4] *((uint16_t *)hspi->pRxBuffPtr) = (uint16_t)(hspi->Instance->DR); 8007fa0: 687b ldr r3, [r7, #4] 8007fa2: 681b ldr r3, [r3, #0] 8007fa4: 68da ldr r2, [r3, #12] 8007fa6: 687b ldr r3, [r7, #4] 8007fa8: 6c1b ldr r3, [r3, #64] @ 0x40 8007faa: b292 uxth r2, r2 8007fac: 801a strh r2, [r3, #0] hspi->pRxBuffPtr += sizeof(uint16_t); 8007fae: 687b ldr r3, [r7, #4] 8007fb0: 6c1b ldr r3, [r3, #64] @ 0x40 8007fb2: 1c9a adds r2, r3, #2 8007fb4: 687b ldr r3, [r7, #4] 8007fb6: 641a str r2, [r3, #64] @ 0x40 hspi->RxXferCount--; 8007fb8: 687b ldr r3, [r7, #4] 8007fba: f8b3 3046 ldrh.w r3, [r3, #70] @ 0x46 8007fbe: b29b uxth r3, r3 8007fc0: 3b01 subs r3, #1 8007fc2: b29a uxth r2, r3 8007fc4: 687b ldr r3, [r7, #4] 8007fc6: f8a3 2046 strh.w r2, [r3, #70] @ 0x46 { SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT); } #endif /* USE_SPI_CRC */ if (hspi->RxXferCount == 0U) 8007fca: 687b ldr r3, [r7, #4] 8007fcc: f8b3 3046 ldrh.w r3, [r3, #70] @ 0x46 8007fd0: b29b uxth r3, r3 8007fd2: 2b00 cmp r3, #0 8007fd4: d102 bne.n 8007fdc { hspi->RxISR = SPI_RxISR_16BITCRC; return; } #endif /* USE_SPI_CRC */ SPI_CloseRx_ISR(hspi); 8007fd6: 6878 ldr r0, [r7, #4] 8007fd8: f000 fa48 bl 800846c } } 8007fdc: bf00 nop 8007fde: 3708 adds r7, #8 8007fe0: 46bd mov sp, r7 8007fe2: bd80 pop {r7, pc} 08007fe4 : * @param hspi pointer to a SPI_HandleTypeDef structure that contains * the configuration information for SPI module. * @retval None */ static void SPI_TxISR_8BIT(struct __SPI_HandleTypeDef *hspi) { 8007fe4: b580 push {r7, lr} 8007fe6: b082 sub sp, #8 8007fe8: af00 add r7, sp, #0 8007fea: 6078 str r0, [r7, #4] *(__IO uint8_t *)&hspi->Instance->DR = *((const uint8_t *)hspi->pTxBuffPtr); 8007fec: 687b ldr r3, [r7, #4] 8007fee: 6b9a ldr r2, [r3, #56] @ 0x38 8007ff0: 687b ldr r3, [r7, #4] 8007ff2: 681b ldr r3, [r3, #0] 8007ff4: 330c adds r3, #12 8007ff6: 7812 ldrb r2, [r2, #0] 8007ff8: 701a strb r2, [r3, #0] hspi->pTxBuffPtr++; 8007ffa: 687b ldr r3, [r7, #4] 8007ffc: 6b9b ldr r3, [r3, #56] @ 0x38 8007ffe: 1c5a adds r2, r3, #1 8008000: 687b ldr r3, [r7, #4] 8008002: 639a str r2, [r3, #56] @ 0x38 hspi->TxXferCount--; 8008004: 687b ldr r3, [r7, #4] 8008006: 8fdb ldrh r3, [r3, #62] @ 0x3e 8008008: b29b uxth r3, r3 800800a: 3b01 subs r3, #1 800800c: b29a uxth r2, r3 800800e: 687b ldr r3, [r7, #4] 8008010: 87da strh r2, [r3, #62] @ 0x3e if (hspi->TxXferCount == 0U) 8008012: 687b ldr r3, [r7, #4] 8008014: 8fdb ldrh r3, [r3, #62] @ 0x3e 8008016: b29b uxth r3, r3 8008018: 2b00 cmp r3, #0 800801a: d102 bne.n 8008022 { /* Enable CRC Transmission */ SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT); } #endif /* USE_SPI_CRC */ SPI_CloseTx_ISR(hspi); 800801c: 6878 ldr r0, [r7, #4] 800801e: f000 fa55 bl 80084cc } } 8008022: bf00 nop 8008024: 3708 adds r7, #8 8008026: 46bd mov sp, r7 8008028: bd80 pop {r7, pc} 0800802a : * @param hspi pointer to a SPI_HandleTypeDef structure that contains * the configuration information for SPI module. * @retval None */ static void SPI_TxISR_16BIT(struct __SPI_HandleTypeDef *hspi) { 800802a: b580 push {r7, lr} 800802c: b082 sub sp, #8 800802e: af00 add r7, sp, #0 8008030: 6078 str r0, [r7, #4] /* Transmit data in 16 Bit mode */ hspi->Instance->DR = *((const uint16_t *)hspi->pTxBuffPtr); 8008032: 687b ldr r3, [r7, #4] 8008034: 6b9b ldr r3, [r3, #56] @ 0x38 8008036: 881a ldrh r2, [r3, #0] 8008038: 687b ldr r3, [r7, #4] 800803a: 681b ldr r3, [r3, #0] 800803c: 60da str r2, [r3, #12] hspi->pTxBuffPtr += sizeof(uint16_t); 800803e: 687b ldr r3, [r7, #4] 8008040: 6b9b ldr r3, [r3, #56] @ 0x38 8008042: 1c9a adds r2, r3, #2 8008044: 687b ldr r3, [r7, #4] 8008046: 639a str r2, [r3, #56] @ 0x38 hspi->TxXferCount--; 8008048: 687b ldr r3, [r7, #4] 800804a: 8fdb ldrh r3, [r3, #62] @ 0x3e 800804c: b29b uxth r3, r3 800804e: 3b01 subs r3, #1 8008050: b29a uxth r2, r3 8008052: 687b ldr r3, [r7, #4] 8008054: 87da strh r2, [r3, #62] @ 0x3e if (hspi->TxXferCount == 0U) 8008056: 687b ldr r3, [r7, #4] 8008058: 8fdb ldrh r3, [r3, #62] @ 0x3e 800805a: b29b uxth r3, r3 800805c: 2b00 cmp r3, #0 800805e: d102 bne.n 8008066 { /* Enable CRC Transmission */ SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT); } #endif /* USE_SPI_CRC */ SPI_CloseTx_ISR(hspi); 8008060: 6878 ldr r0, [r7, #4] 8008062: f000 fa33 bl 80084cc } } 8008066: bf00 nop 8008068: 3708 adds r7, #8 800806a: 46bd mov sp, r7 800806c: bd80 pop {r7, pc} ... 08008070 : * @param Tickstart tick start value * @retval HAL status */ static HAL_StatusTypeDef SPI_WaitFlagStateUntilTimeout(SPI_HandleTypeDef *hspi, uint32_t Flag, FlagStatus State, uint32_t Timeout, uint32_t Tickstart) { 8008070: b580 push {r7, lr} 8008072: b088 sub sp, #32 8008074: af00 add r7, sp, #0 8008076: 60f8 str r0, [r7, #12] 8008078: 60b9 str r1, [r7, #8] 800807a: 603b str r3, [r7, #0] 800807c: 4613 mov r3, r2 800807e: 71fb strb r3, [r7, #7] __IO uint32_t count; uint32_t tmp_timeout; uint32_t tmp_tickstart; /* Adjust Timeout value in case of end of transfer */ tmp_timeout = Timeout - (HAL_GetTick() - Tickstart); 8008080: f7fb fdea bl 8003c58 8008084: 4602 mov r2, r0 8008086: 6abb ldr r3, [r7, #40] @ 0x28 8008088: 1a9b subs r3, r3, r2 800808a: 683a ldr r2, [r7, #0] 800808c: 4413 add r3, r2 800808e: 61fb str r3, [r7, #28] tmp_tickstart = HAL_GetTick(); 8008090: f7fb fde2 bl 8003c58 8008094: 61b8 str r0, [r7, #24] /* Calculate Timeout based on a software loop to avoid blocking issue if Systick is disabled */ count = tmp_timeout * ((SystemCoreClock * 32U) >> 20U); 8008096: 4b39 ldr r3, [pc, #228] @ (800817c ) 8008098: 681b ldr r3, [r3, #0] 800809a: 015b lsls r3, r3, #5 800809c: 0d1b lsrs r3, r3, #20 800809e: 69fa ldr r2, [r7, #28] 80080a0: fb02 f303 mul.w r3, r2, r3 80080a4: 617b str r3, [r7, #20] while ((__HAL_SPI_GET_FLAG(hspi, Flag) ? SET : RESET) != State) 80080a6: e054 b.n 8008152 { if (Timeout != HAL_MAX_DELAY) 80080a8: 683b ldr r3, [r7, #0] 80080aa: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff 80080ae: d050 beq.n 8008152 { if (((HAL_GetTick() - tmp_tickstart) >= tmp_timeout) || (tmp_timeout == 0U)) 80080b0: f7fb fdd2 bl 8003c58 80080b4: 4602 mov r2, r0 80080b6: 69bb ldr r3, [r7, #24] 80080b8: 1ad3 subs r3, r2, r3 80080ba: 69fa ldr r2, [r7, #28] 80080bc: 429a cmp r2, r3 80080be: d902 bls.n 80080c6 80080c0: 69fb ldr r3, [r7, #28] 80080c2: 2b00 cmp r3, #0 80080c4: d13d bne.n 8008142 /* Disable the SPI and reset the CRC: the CRC value should be cleared on both master and slave sides in order to resynchronize the master and slave for their respective CRC calculation */ /* Disable TXE, RXNE and ERR interrupts for the interrupt process */ __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_RXNE | SPI_IT_ERR)); 80080c6: 68fb ldr r3, [r7, #12] 80080c8: 681b ldr r3, [r3, #0] 80080ca: 685a ldr r2, [r3, #4] 80080cc: 68fb ldr r3, [r7, #12] 80080ce: 681b ldr r3, [r3, #0] 80080d0: f022 02e0 bic.w r2, r2, #224 @ 0xe0 80080d4: 605a str r2, [r3, #4] if ((hspi->Init.Mode == SPI_MODE_MASTER) && ((hspi->Init.Direction == SPI_DIRECTION_1LINE) 80080d6: 68fb ldr r3, [r7, #12] 80080d8: 685b ldr r3, [r3, #4] 80080da: f5b3 7f82 cmp.w r3, #260 @ 0x104 80080de: d111 bne.n 8008104 80080e0: 68fb ldr r3, [r7, #12] 80080e2: 689b ldr r3, [r3, #8] 80080e4: f5b3 4f00 cmp.w r3, #32768 @ 0x8000 80080e8: d004 beq.n 80080f4 || (hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY))) 80080ea: 68fb ldr r3, [r7, #12] 80080ec: 689b ldr r3, [r3, #8] 80080ee: f5b3 6f80 cmp.w r3, #1024 @ 0x400 80080f2: d107 bne.n 8008104 { /* Disable SPI peripheral */ __HAL_SPI_DISABLE(hspi); 80080f4: 68fb ldr r3, [r7, #12] 80080f6: 681b ldr r3, [r3, #0] 80080f8: 681a ldr r2, [r3, #0] 80080fa: 68fb ldr r3, [r7, #12] 80080fc: 681b ldr r3, [r3, #0] 80080fe: f022 0240 bic.w r2, r2, #64 @ 0x40 8008102: 601a str r2, [r3, #0] } /* Reset CRC Calculation */ if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) 8008104: 68fb ldr r3, [r7, #12] 8008106: 6a9b ldr r3, [r3, #40] @ 0x28 8008108: f5b3 5f00 cmp.w r3, #8192 @ 0x2000 800810c: d10f bne.n 800812e { SPI_RESET_CRC(hspi); 800810e: 68fb ldr r3, [r7, #12] 8008110: 681b ldr r3, [r3, #0] 8008112: 681a ldr r2, [r3, #0] 8008114: 68fb ldr r3, [r7, #12] 8008116: 681b ldr r3, [r3, #0] 8008118: f422 5200 bic.w r2, r2, #8192 @ 0x2000 800811c: 601a str r2, [r3, #0] 800811e: 68fb ldr r3, [r7, #12] 8008120: 681b ldr r3, [r3, #0] 8008122: 681a ldr r2, [r3, #0] 8008124: 68fb ldr r3, [r7, #12] 8008126: 681b ldr r3, [r3, #0] 8008128: f442 5200 orr.w r2, r2, #8192 @ 0x2000 800812c: 601a str r2, [r3, #0] } hspi->State = HAL_SPI_STATE_READY; 800812e: 68fb ldr r3, [r7, #12] 8008130: 2201 movs r2, #1 8008132: f883 205d strb.w r2, [r3, #93] @ 0x5d /* Process Unlocked */ __HAL_UNLOCK(hspi); 8008136: 68fb ldr r3, [r7, #12] 8008138: 2200 movs r2, #0 800813a: f883 205c strb.w r2, [r3, #92] @ 0x5c return HAL_TIMEOUT; 800813e: 2303 movs r3, #3 8008140: e017 b.n 8008172 } /* If Systick is disabled or not incremented, deactivate timeout to go in disable loop procedure */ if (count == 0U) 8008142: 697b ldr r3, [r7, #20] 8008144: 2b00 cmp r3, #0 8008146: d101 bne.n 800814c { tmp_timeout = 0U; 8008148: 2300 movs r3, #0 800814a: 61fb str r3, [r7, #28] } count--; 800814c: 697b ldr r3, [r7, #20] 800814e: 3b01 subs r3, #1 8008150: 617b str r3, [r7, #20] while ((__HAL_SPI_GET_FLAG(hspi, Flag) ? SET : RESET) != State) 8008152: 68fb ldr r3, [r7, #12] 8008154: 681b ldr r3, [r3, #0] 8008156: 689a ldr r2, [r3, #8] 8008158: 68bb ldr r3, [r7, #8] 800815a: 4013 ands r3, r2 800815c: 68ba ldr r2, [r7, #8] 800815e: 429a cmp r2, r3 8008160: bf0c ite eq 8008162: 2301 moveq r3, #1 8008164: 2300 movne r3, #0 8008166: b2db uxtb r3, r3 8008168: 461a mov r2, r3 800816a: 79fb ldrb r3, [r7, #7] 800816c: 429a cmp r2, r3 800816e: d19b bne.n 80080a8 } } return HAL_OK; 8008170: 2300 movs r3, #0 } 8008172: 4618 mov r0, r3 8008174: 3720 adds r7, #32 8008176: 46bd mov sp, r7 8008178: bd80 pop {r7, pc} 800817a: bf00 nop 800817c: 200000c4 .word 0x200000c4 08008180 : * @param Tickstart tick start value * @retval HAL status */ static HAL_StatusTypeDef SPI_WaitFifoStateUntilTimeout(SPI_HandleTypeDef *hspi, uint32_t Fifo, uint32_t State, uint32_t Timeout, uint32_t Tickstart) { 8008180: b580 push {r7, lr} 8008182: b08a sub sp, #40 @ 0x28 8008184: af00 add r7, sp, #0 8008186: 60f8 str r0, [r7, #12] 8008188: 60b9 str r1, [r7, #8] 800818a: 607a str r2, [r7, #4] 800818c: 603b str r3, [r7, #0] __IO uint32_t count; uint32_t tmp_timeout; uint32_t tmp_tickstart; __IO const uint8_t *ptmpreg8; __IO uint8_t tmpreg8 = 0; 800818e: 2300 movs r3, #0 8008190: 75fb strb r3, [r7, #23] /* Adjust Timeout value in case of end of transfer */ tmp_timeout = Timeout - (HAL_GetTick() - Tickstart); 8008192: f7fb fd61 bl 8003c58 8008196: 4602 mov r2, r0 8008198: 6b3b ldr r3, [r7, #48] @ 0x30 800819a: 1a9b subs r3, r3, r2 800819c: 683a ldr r2, [r7, #0] 800819e: 4413 add r3, r2 80081a0: 627b str r3, [r7, #36] @ 0x24 tmp_tickstart = HAL_GetTick(); 80081a2: f7fb fd59 bl 8003c58 80081a6: 6238 str r0, [r7, #32] /* Initialize the 8bit temporary pointer */ ptmpreg8 = (__IO uint8_t *)&hspi->Instance->DR; 80081a8: 68fb ldr r3, [r7, #12] 80081aa: 681b ldr r3, [r3, #0] 80081ac: 330c adds r3, #12 80081ae: 61fb str r3, [r7, #28] /* Calculate Timeout based on a software loop to avoid blocking issue if Systick is disabled */ count = tmp_timeout * ((SystemCoreClock * 35U) >> 20U); 80081b0: 4b3d ldr r3, [pc, #244] @ (80082a8 ) 80081b2: 681a ldr r2, [r3, #0] 80081b4: 4613 mov r3, r2 80081b6: 009b lsls r3, r3, #2 80081b8: 4413 add r3, r2 80081ba: 00da lsls r2, r3, #3 80081bc: 1ad3 subs r3, r2, r3 80081be: 0d1b lsrs r3, r3, #20 80081c0: 6a7a ldr r2, [r7, #36] @ 0x24 80081c2: fb02 f303 mul.w r3, r2, r3 80081c6: 61bb str r3, [r7, #24] while ((hspi->Instance->SR & Fifo) != State) 80081c8: e060 b.n 800828c { if ((Fifo == SPI_SR_FRLVL) && (State == SPI_FRLVL_EMPTY)) 80081ca: 68bb ldr r3, [r7, #8] 80081cc: f5b3 6fc0 cmp.w r3, #1536 @ 0x600 80081d0: d107 bne.n 80081e2 80081d2: 687b ldr r3, [r7, #4] 80081d4: 2b00 cmp r3, #0 80081d6: d104 bne.n 80081e2 { /* Flush Data Register by a blank read */ tmpreg8 = *ptmpreg8; 80081d8: 69fb ldr r3, [r7, #28] 80081da: 781b ldrb r3, [r3, #0] 80081dc: b2db uxtb r3, r3 80081de: 75fb strb r3, [r7, #23] /* To avoid GCC warning */ UNUSED(tmpreg8); 80081e0: 7dfb ldrb r3, [r7, #23] } if (Timeout != HAL_MAX_DELAY) 80081e2: 683b ldr r3, [r7, #0] 80081e4: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff 80081e8: d050 beq.n 800828c { if (((HAL_GetTick() - tmp_tickstart) >= tmp_timeout) || (tmp_timeout == 0U)) 80081ea: f7fb fd35 bl 8003c58 80081ee: 4602 mov r2, r0 80081f0: 6a3b ldr r3, [r7, #32] 80081f2: 1ad3 subs r3, r2, r3 80081f4: 6a7a ldr r2, [r7, #36] @ 0x24 80081f6: 429a cmp r2, r3 80081f8: d902 bls.n 8008200 80081fa: 6a7b ldr r3, [r7, #36] @ 0x24 80081fc: 2b00 cmp r3, #0 80081fe: d13d bne.n 800827c /* Disable the SPI and reset the CRC: the CRC value should be cleared on both master and slave sides in order to resynchronize the master and slave for their respective CRC calculation */ /* Disable TXE, RXNE and ERR interrupts for the interrupt process */ __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_RXNE | SPI_IT_ERR)); 8008200: 68fb ldr r3, [r7, #12] 8008202: 681b ldr r3, [r3, #0] 8008204: 685a ldr r2, [r3, #4] 8008206: 68fb ldr r3, [r7, #12] 8008208: 681b ldr r3, [r3, #0] 800820a: f022 02e0 bic.w r2, r2, #224 @ 0xe0 800820e: 605a str r2, [r3, #4] if ((hspi->Init.Mode == SPI_MODE_MASTER) && ((hspi->Init.Direction == SPI_DIRECTION_1LINE) 8008210: 68fb ldr r3, [r7, #12] 8008212: 685b ldr r3, [r3, #4] 8008214: f5b3 7f82 cmp.w r3, #260 @ 0x104 8008218: d111 bne.n 800823e 800821a: 68fb ldr r3, [r7, #12] 800821c: 689b ldr r3, [r3, #8] 800821e: f5b3 4f00 cmp.w r3, #32768 @ 0x8000 8008222: d004 beq.n 800822e || (hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY))) 8008224: 68fb ldr r3, [r7, #12] 8008226: 689b ldr r3, [r3, #8] 8008228: f5b3 6f80 cmp.w r3, #1024 @ 0x400 800822c: d107 bne.n 800823e { /* Disable SPI peripheral */ __HAL_SPI_DISABLE(hspi); 800822e: 68fb ldr r3, [r7, #12] 8008230: 681b ldr r3, [r3, #0] 8008232: 681a ldr r2, [r3, #0] 8008234: 68fb ldr r3, [r7, #12] 8008236: 681b ldr r3, [r3, #0] 8008238: f022 0240 bic.w r2, r2, #64 @ 0x40 800823c: 601a str r2, [r3, #0] } /* Reset CRC Calculation */ if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) 800823e: 68fb ldr r3, [r7, #12] 8008240: 6a9b ldr r3, [r3, #40] @ 0x28 8008242: f5b3 5f00 cmp.w r3, #8192 @ 0x2000 8008246: d10f bne.n 8008268 { SPI_RESET_CRC(hspi); 8008248: 68fb ldr r3, [r7, #12] 800824a: 681b ldr r3, [r3, #0] 800824c: 681a ldr r2, [r3, #0] 800824e: 68fb ldr r3, [r7, #12] 8008250: 681b ldr r3, [r3, #0] 8008252: f422 5200 bic.w r2, r2, #8192 @ 0x2000 8008256: 601a str r2, [r3, #0] 8008258: 68fb ldr r3, [r7, #12] 800825a: 681b ldr r3, [r3, #0] 800825c: 681a ldr r2, [r3, #0] 800825e: 68fb ldr r3, [r7, #12] 8008260: 681b ldr r3, [r3, #0] 8008262: f442 5200 orr.w r2, r2, #8192 @ 0x2000 8008266: 601a str r2, [r3, #0] } hspi->State = HAL_SPI_STATE_READY; 8008268: 68fb ldr r3, [r7, #12] 800826a: 2201 movs r2, #1 800826c: f883 205d strb.w r2, [r3, #93] @ 0x5d /* Process Unlocked */ __HAL_UNLOCK(hspi); 8008270: 68fb ldr r3, [r7, #12] 8008272: 2200 movs r2, #0 8008274: f883 205c strb.w r2, [r3, #92] @ 0x5c return HAL_TIMEOUT; 8008278: 2303 movs r3, #3 800827a: e010 b.n 800829e } /* If Systick is disabled or not incremented, deactivate timeout to go in disable loop procedure */ if (count == 0U) 800827c: 69bb ldr r3, [r7, #24] 800827e: 2b00 cmp r3, #0 8008280: d101 bne.n 8008286 { tmp_timeout = 0U; 8008282: 2300 movs r3, #0 8008284: 627b str r3, [r7, #36] @ 0x24 } count--; 8008286: 69bb ldr r3, [r7, #24] 8008288: 3b01 subs r3, #1 800828a: 61bb str r3, [r7, #24] while ((hspi->Instance->SR & Fifo) != State) 800828c: 68fb ldr r3, [r7, #12] 800828e: 681b ldr r3, [r3, #0] 8008290: 689a ldr r2, [r3, #8] 8008292: 68bb ldr r3, [r7, #8] 8008294: 4013 ands r3, r2 8008296: 687a ldr r2, [r7, #4] 8008298: 429a cmp r2, r3 800829a: d196 bne.n 80081ca } } return HAL_OK; 800829c: 2300 movs r3, #0 } 800829e: 4618 mov r0, r3 80082a0: 3728 adds r7, #40 @ 0x28 80082a2: 46bd mov sp, r7 80082a4: bd80 pop {r7, pc} 80082a6: bf00 nop 80082a8: 200000c4 .word 0x200000c4 080082ac : * @param Timeout Timeout duration * @param Tickstart tick start value * @retval HAL status */ static HAL_StatusTypeDef SPI_EndRxTransaction(SPI_HandleTypeDef *hspi, uint32_t Timeout, uint32_t Tickstart) { 80082ac: b580 push {r7, lr} 80082ae: b086 sub sp, #24 80082b0: af02 add r7, sp, #8 80082b2: 60f8 str r0, [r7, #12] 80082b4: 60b9 str r1, [r7, #8] 80082b6: 607a str r2, [r7, #4] if ((hspi->Init.Mode == SPI_MODE_MASTER) && ((hspi->Init.Direction == SPI_DIRECTION_1LINE) 80082b8: 68fb ldr r3, [r7, #12] 80082ba: 685b ldr r3, [r3, #4] 80082bc: f5b3 7f82 cmp.w r3, #260 @ 0x104 80082c0: d111 bne.n 80082e6 80082c2: 68fb ldr r3, [r7, #12] 80082c4: 689b ldr r3, [r3, #8] 80082c6: f5b3 4f00 cmp.w r3, #32768 @ 0x8000 80082ca: d004 beq.n 80082d6 || (hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY))) 80082cc: 68fb ldr r3, [r7, #12] 80082ce: 689b ldr r3, [r3, #8] 80082d0: f5b3 6f80 cmp.w r3, #1024 @ 0x400 80082d4: d107 bne.n 80082e6 { /* Disable SPI peripheral */ __HAL_SPI_DISABLE(hspi); 80082d6: 68fb ldr r3, [r7, #12] 80082d8: 681b ldr r3, [r3, #0] 80082da: 681a ldr r2, [r3, #0] 80082dc: 68fb ldr r3, [r7, #12] 80082de: 681b ldr r3, [r3, #0] 80082e0: f022 0240 bic.w r2, r2, #64 @ 0x40 80082e4: 601a str r2, [r3, #0] } /* Control the BSY flag */ if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_BSY, RESET, Timeout, Tickstart) != HAL_OK) 80082e6: 687b ldr r3, [r7, #4] 80082e8: 9300 str r3, [sp, #0] 80082ea: 68bb ldr r3, [r7, #8] 80082ec: 2200 movs r2, #0 80082ee: 2180 movs r1, #128 @ 0x80 80082f0: 68f8 ldr r0, [r7, #12] 80082f2: f7ff febd bl 8008070 80082f6: 4603 mov r3, r0 80082f8: 2b00 cmp r3, #0 80082fa: d007 beq.n 800830c { SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG); 80082fc: 68fb ldr r3, [r7, #12] 80082fe: 6e1b ldr r3, [r3, #96] @ 0x60 8008300: f043 0220 orr.w r2, r3, #32 8008304: 68fb ldr r3, [r7, #12] 8008306: 661a str r2, [r3, #96] @ 0x60 return HAL_TIMEOUT; 8008308: 2303 movs r3, #3 800830a: e023 b.n 8008354 } if ((hspi->Init.Mode == SPI_MODE_MASTER) && ((hspi->Init.Direction == SPI_DIRECTION_1LINE) 800830c: 68fb ldr r3, [r7, #12] 800830e: 685b ldr r3, [r3, #4] 8008310: f5b3 7f82 cmp.w r3, #260 @ 0x104 8008314: d11d bne.n 8008352 8008316: 68fb ldr r3, [r7, #12] 8008318: 689b ldr r3, [r3, #8] 800831a: f5b3 4f00 cmp.w r3, #32768 @ 0x8000 800831e: d004 beq.n 800832a || (hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY))) 8008320: 68fb ldr r3, [r7, #12] 8008322: 689b ldr r3, [r3, #8] 8008324: f5b3 6f80 cmp.w r3, #1024 @ 0x400 8008328: d113 bne.n 8008352 { /* Empty the FRLVL fifo */ if (SPI_WaitFifoStateUntilTimeout(hspi, SPI_FLAG_FRLVL, SPI_FRLVL_EMPTY, Timeout, Tickstart) != HAL_OK) 800832a: 687b ldr r3, [r7, #4] 800832c: 9300 str r3, [sp, #0] 800832e: 68bb ldr r3, [r7, #8] 8008330: 2200 movs r2, #0 8008332: f44f 61c0 mov.w r1, #1536 @ 0x600 8008336: 68f8 ldr r0, [r7, #12] 8008338: f7ff ff22 bl 8008180 800833c: 4603 mov r3, r0 800833e: 2b00 cmp r3, #0 8008340: d007 beq.n 8008352 { SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG); 8008342: 68fb ldr r3, [r7, #12] 8008344: 6e1b ldr r3, [r3, #96] @ 0x60 8008346: f043 0220 orr.w r2, r3, #32 800834a: 68fb ldr r3, [r7, #12] 800834c: 661a str r2, [r3, #96] @ 0x60 return HAL_TIMEOUT; 800834e: 2303 movs r3, #3 8008350: e000 b.n 8008354 } } return HAL_OK; 8008352: 2300 movs r3, #0 } 8008354: 4618 mov r0, r3 8008356: 3710 adds r7, #16 8008358: 46bd mov sp, r7 800835a: bd80 pop {r7, pc} 0800835c : * @param Timeout Timeout duration * @param Tickstart tick start value * @retval HAL status */ static HAL_StatusTypeDef SPI_EndRxTxTransaction(SPI_HandleTypeDef *hspi, uint32_t Timeout, uint32_t Tickstart) { 800835c: b580 push {r7, lr} 800835e: b086 sub sp, #24 8008360: af02 add r7, sp, #8 8008362: 60f8 str r0, [r7, #12] 8008364: 60b9 str r1, [r7, #8] 8008366: 607a str r2, [r7, #4] /* Control if the TX fifo is empty */ if (SPI_WaitFifoStateUntilTimeout(hspi, SPI_FLAG_FTLVL, SPI_FTLVL_EMPTY, Timeout, Tickstart) != HAL_OK) 8008368: 687b ldr r3, [r7, #4] 800836a: 9300 str r3, [sp, #0] 800836c: 68bb ldr r3, [r7, #8] 800836e: 2200 movs r2, #0 8008370: f44f 51c0 mov.w r1, #6144 @ 0x1800 8008374: 68f8 ldr r0, [r7, #12] 8008376: f7ff ff03 bl 8008180 800837a: 4603 mov r3, r0 800837c: 2b00 cmp r3, #0 800837e: d007 beq.n 8008390 { SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG); 8008380: 68fb ldr r3, [r7, #12] 8008382: 6e1b ldr r3, [r3, #96] @ 0x60 8008384: f043 0220 orr.w r2, r3, #32 8008388: 68fb ldr r3, [r7, #12] 800838a: 661a str r2, [r3, #96] @ 0x60 return HAL_TIMEOUT; 800838c: 2303 movs r3, #3 800838e: e027 b.n 80083e0 } /* Control the BSY flag */ if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_BSY, RESET, Timeout, Tickstart) != HAL_OK) 8008390: 687b ldr r3, [r7, #4] 8008392: 9300 str r3, [sp, #0] 8008394: 68bb ldr r3, [r7, #8] 8008396: 2200 movs r2, #0 8008398: 2180 movs r1, #128 @ 0x80 800839a: 68f8 ldr r0, [r7, #12] 800839c: f7ff fe68 bl 8008070 80083a0: 4603 mov r3, r0 80083a2: 2b00 cmp r3, #0 80083a4: d007 beq.n 80083b6 { SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG); 80083a6: 68fb ldr r3, [r7, #12] 80083a8: 6e1b ldr r3, [r3, #96] @ 0x60 80083aa: f043 0220 orr.w r2, r3, #32 80083ae: 68fb ldr r3, [r7, #12] 80083b0: 661a str r2, [r3, #96] @ 0x60 return HAL_TIMEOUT; 80083b2: 2303 movs r3, #3 80083b4: e014 b.n 80083e0 } /* Control if the RX fifo is empty */ if (SPI_WaitFifoStateUntilTimeout(hspi, SPI_FLAG_FRLVL, SPI_FRLVL_EMPTY, Timeout, Tickstart) != HAL_OK) 80083b6: 687b ldr r3, [r7, #4] 80083b8: 9300 str r3, [sp, #0] 80083ba: 68bb ldr r3, [r7, #8] 80083bc: 2200 movs r2, #0 80083be: f44f 61c0 mov.w r1, #1536 @ 0x600 80083c2: 68f8 ldr r0, [r7, #12] 80083c4: f7ff fedc bl 8008180 80083c8: 4603 mov r3, r0 80083ca: 2b00 cmp r3, #0 80083cc: d007 beq.n 80083de { SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG); 80083ce: 68fb ldr r3, [r7, #12] 80083d0: 6e1b ldr r3, [r3, #96] @ 0x60 80083d2: f043 0220 orr.w r2, r3, #32 80083d6: 68fb ldr r3, [r7, #12] 80083d8: 661a str r2, [r3, #96] @ 0x60 return HAL_TIMEOUT; 80083da: 2303 movs r3, #3 80083dc: e000 b.n 80083e0 } return HAL_OK; 80083de: 2300 movs r3, #0 } 80083e0: 4618 mov r0, r3 80083e2: 3710 adds r7, #16 80083e4: 46bd mov sp, r7 80083e6: bd80 pop {r7, pc} 080083e8 : * @param hspi pointer to a SPI_HandleTypeDef structure that contains * the configuration information for SPI module. * @retval None */ static void SPI_CloseRxTx_ISR(SPI_HandleTypeDef *hspi) { 80083e8: b580 push {r7, lr} 80083ea: b084 sub sp, #16 80083ec: af00 add r7, sp, #0 80083ee: 6078 str r0, [r7, #4] uint32_t tickstart; /* Init tickstart for timeout management */ tickstart = HAL_GetTick(); 80083f0: f7fb fc32 bl 8003c58 80083f4: 60f8 str r0, [r7, #12] /* Disable ERR interrupt */ __HAL_SPI_DISABLE_IT(hspi, SPI_IT_ERR); 80083f6: 687b ldr r3, [r7, #4] 80083f8: 681b ldr r3, [r3, #0] 80083fa: 685a ldr r2, [r3, #4] 80083fc: 687b ldr r3, [r7, #4] 80083fe: 681b ldr r3, [r3, #0] 8008400: f022 0220 bic.w r2, r2, #32 8008404: 605a str r2, [r3, #4] /* Check the end of the transaction */ if (SPI_EndRxTxTransaction(hspi, SPI_DEFAULT_TIMEOUT, tickstart) != HAL_OK) 8008406: 68fa ldr r2, [r7, #12] 8008408: 2164 movs r1, #100 @ 0x64 800840a: 6878 ldr r0, [r7, #4] 800840c: f7ff ffa6 bl 800835c 8008410: 4603 mov r3, r0 8008412: 2b00 cmp r3, #0 8008414: d005 beq.n 8008422 { SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG); 8008416: 687b ldr r3, [r7, #4] 8008418: 6e1b ldr r3, [r3, #96] @ 0x60 800841a: f043 0220 orr.w r2, r3, #32 800841e: 687b ldr r3, [r7, #4] 8008420: 661a str r2, [r3, #96] @ 0x60 #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ } else { #endif /* USE_SPI_CRC */ if (hspi->ErrorCode == HAL_SPI_ERROR_NONE) 8008422: 687b ldr r3, [r7, #4] 8008424: 6e1b ldr r3, [r3, #96] @ 0x60 8008426: 2b00 cmp r3, #0 8008428: d115 bne.n 8008456 { if (hspi->State == HAL_SPI_STATE_BUSY_RX) 800842a: 687b ldr r3, [r7, #4] 800842c: f893 305d ldrb.w r3, [r3, #93] @ 0x5d 8008430: b2db uxtb r3, r3 8008432: 2b04 cmp r3, #4 8008434: d107 bne.n 8008446 { hspi->State = HAL_SPI_STATE_READY; 8008436: 687b ldr r3, [r7, #4] 8008438: 2201 movs r2, #1 800843a: f883 205d strb.w r2, [r3, #93] @ 0x5d /* Call user Rx complete callback */ #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) hspi->RxCpltCallback(hspi); #else HAL_SPI_RxCpltCallback(hspi); 800843e: 6878 ldr r0, [r7, #4] 8008440: f003 fcda bl 800bdf8 #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ } #if (USE_SPI_CRC != 0U) } #endif /* USE_SPI_CRC */ } 8008444: e00e b.n 8008464 hspi->State = HAL_SPI_STATE_READY; 8008446: 687b ldr r3, [r7, #4] 8008448: 2201 movs r2, #1 800844a: f883 205d strb.w r2, [r3, #93] @ 0x5d HAL_SPI_TxRxCpltCallback(hspi); 800844e: 6878 ldr r0, [r7, #4] 8008450: f7ff fc46 bl 8007ce0 } 8008454: e006 b.n 8008464 hspi->State = HAL_SPI_STATE_READY; 8008456: 687b ldr r3, [r7, #4] 8008458: 2201 movs r2, #1 800845a: f883 205d strb.w r2, [r3, #93] @ 0x5d HAL_SPI_ErrorCallback(hspi); 800845e: 6878 ldr r0, [r7, #4] 8008460: f7ff fc48 bl 8007cf4 } 8008464: bf00 nop 8008466: 3710 adds r7, #16 8008468: 46bd mov sp, r7 800846a: bd80 pop {r7, pc} 0800846c : * @param hspi pointer to a SPI_HandleTypeDef structure that contains * the configuration information for SPI module. * @retval None */ static void SPI_CloseRx_ISR(SPI_HandleTypeDef *hspi) { 800846c: b580 push {r7, lr} 800846e: b082 sub sp, #8 8008470: af00 add r7, sp, #0 8008472: 6078 str r0, [r7, #4] /* Disable RXNE and ERR interrupt */ __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_RXNE | SPI_IT_ERR)); 8008474: 687b ldr r3, [r7, #4] 8008476: 681b ldr r3, [r3, #0] 8008478: 685a ldr r2, [r3, #4] 800847a: 687b ldr r3, [r7, #4] 800847c: 681b ldr r3, [r3, #0] 800847e: f022 0260 bic.w r2, r2, #96 @ 0x60 8008482: 605a str r2, [r3, #4] /* Check the end of the transaction */ if (SPI_EndRxTransaction(hspi, SPI_DEFAULT_TIMEOUT, HAL_GetTick()) != HAL_OK) 8008484: f7fb fbe8 bl 8003c58 8008488: 4603 mov r3, r0 800848a: 461a mov r2, r3 800848c: 2164 movs r1, #100 @ 0x64 800848e: 6878 ldr r0, [r7, #4] 8008490: f7ff ff0c bl 80082ac 8008494: 4603 mov r3, r0 8008496: 2b00 cmp r3, #0 8008498: d005 beq.n 80084a6 { SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG); 800849a: 687b ldr r3, [r7, #4] 800849c: 6e1b ldr r3, [r3, #96] @ 0x60 800849e: f043 0220 orr.w r2, r3, #32 80084a2: 687b ldr r3, [r7, #4] 80084a4: 661a str r2, [r3, #96] @ 0x60 } hspi->State = HAL_SPI_STATE_READY; 80084a6: 687b ldr r3, [r7, #4] 80084a8: 2201 movs r2, #1 80084aa: f883 205d strb.w r2, [r3, #93] @ 0x5d #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ } else { #endif /* USE_SPI_CRC */ if (hspi->ErrorCode == HAL_SPI_ERROR_NONE) 80084ae: 687b ldr r3, [r7, #4] 80084b0: 6e1b ldr r3, [r3, #96] @ 0x60 80084b2: 2b00 cmp r3, #0 80084b4: d103 bne.n 80084be { /* Call user Rx complete callback */ #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) hspi->RxCpltCallback(hspi); #else HAL_SPI_RxCpltCallback(hspi); 80084b6: 6878 ldr r0, [r7, #4] 80084b8: f003 fc9e bl 800bdf8 #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ } #if (USE_SPI_CRC != 0U) } #endif /* USE_SPI_CRC */ } 80084bc: e002 b.n 80084c4 HAL_SPI_ErrorCallback(hspi); 80084be: 6878 ldr r0, [r7, #4] 80084c0: f7ff fc18 bl 8007cf4 } 80084c4: bf00 nop 80084c6: 3708 adds r7, #8 80084c8: 46bd mov sp, r7 80084ca: bd80 pop {r7, pc} 080084cc : * @param hspi pointer to a SPI_HandleTypeDef structure that contains * the configuration information for SPI module. * @retval None */ static void SPI_CloseTx_ISR(SPI_HandleTypeDef *hspi) { 80084cc: b580 push {r7, lr} 80084ce: b084 sub sp, #16 80084d0: af00 add r7, sp, #0 80084d2: 6078 str r0, [r7, #4] uint32_t tickstart; /* Init tickstart for timeout management*/ tickstart = HAL_GetTick(); 80084d4: f7fb fbc0 bl 8003c58 80084d8: 60f8 str r0, [r7, #12] /* Disable TXE and ERR interrupt */ __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_ERR)); 80084da: 687b ldr r3, [r7, #4] 80084dc: 681b ldr r3, [r3, #0] 80084de: 685a ldr r2, [r3, #4] 80084e0: 687b ldr r3, [r7, #4] 80084e2: 681b ldr r3, [r3, #0] 80084e4: f022 02a0 bic.w r2, r2, #160 @ 0xa0 80084e8: 605a str r2, [r3, #4] /* Check the end of the transaction */ if (SPI_EndRxTxTransaction(hspi, SPI_DEFAULT_TIMEOUT, tickstart) != HAL_OK) 80084ea: 68fa ldr r2, [r7, #12] 80084ec: 2164 movs r1, #100 @ 0x64 80084ee: 6878 ldr r0, [r7, #4] 80084f0: f7ff ff34 bl 800835c 80084f4: 4603 mov r3, r0 80084f6: 2b00 cmp r3, #0 80084f8: d005 beq.n 8008506 { SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG); 80084fa: 687b ldr r3, [r7, #4] 80084fc: 6e1b ldr r3, [r3, #96] @ 0x60 80084fe: f043 0220 orr.w r2, r3, #32 8008502: 687b ldr r3, [r7, #4] 8008504: 661a str r2, [r3, #96] @ 0x60 } /* Clear overrun flag in 2 Lines communication mode because received is not read */ if (hspi->Init.Direction == SPI_DIRECTION_2LINES) 8008506: 687b ldr r3, [r7, #4] 8008508: 689b ldr r3, [r3, #8] 800850a: 2b00 cmp r3, #0 800850c: d10a bne.n 8008524 { __HAL_SPI_CLEAR_OVRFLAG(hspi); 800850e: 2300 movs r3, #0 8008510: 60bb str r3, [r7, #8] 8008512: 687b ldr r3, [r7, #4] 8008514: 681b ldr r3, [r3, #0] 8008516: 68db ldr r3, [r3, #12] 8008518: 60bb str r3, [r7, #8] 800851a: 687b ldr r3, [r7, #4] 800851c: 681b ldr r3, [r3, #0] 800851e: 689b ldr r3, [r3, #8] 8008520: 60bb str r3, [r7, #8] 8008522: 68bb ldr r3, [r7, #8] } hspi->State = HAL_SPI_STATE_READY; 8008524: 687b ldr r3, [r7, #4] 8008526: 2201 movs r2, #1 8008528: f883 205d strb.w r2, [r3, #93] @ 0x5d if (hspi->ErrorCode != HAL_SPI_ERROR_NONE) 800852c: 687b ldr r3, [r7, #4] 800852e: 6e1b ldr r3, [r3, #96] @ 0x60 8008530: 2b00 cmp r3, #0 8008532: d003 beq.n 800853c { /* Call user error callback */ #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) hspi->ErrorCallback(hspi); #else HAL_SPI_ErrorCallback(hspi); 8008534: 6878 ldr r0, [r7, #4] 8008536: f7ff fbdd bl 8007cf4 hspi->TxCpltCallback(hspi); #else HAL_SPI_TxCpltCallback(hspi); #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ } } 800853a: e002 b.n 8008542 HAL_SPI_TxCpltCallback(hspi); 800853c: 6878 ldr r0, [r7, #4] 800853e: f003 fc6f bl 800be20 } 8008542: bf00 nop 8008544: 3710 adds r7, #16 8008546: 46bd mov sp, r7 8008548: bd80 pop {r7, pc} 0800854a : * Ex: call @ref HAL_TIM_Base_DeInit() before HAL_TIM_Base_Init() * @param htim TIM Base handle * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_Base_Init(TIM_HandleTypeDef *htim) { 800854a: b580 push {r7, lr} 800854c: b082 sub sp, #8 800854e: af00 add r7, sp, #0 8008550: 6078 str r0, [r7, #4] /* Check the TIM handle allocation */ if (htim == NULL) 8008552: 687b ldr r3, [r7, #4] 8008554: 2b00 cmp r3, #0 8008556: d101 bne.n 800855c { return HAL_ERROR; 8008558: 2301 movs r3, #1 800855a: e049 b.n 80085f0 assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); assert_param(IS_TIM_PERIOD(htim, htim->Init.Period)); assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); if (htim->State == HAL_TIM_STATE_RESET) 800855c: 687b ldr r3, [r7, #4] 800855e: f893 303d ldrb.w r3, [r3, #61] @ 0x3d 8008562: b2db uxtb r3, r3 8008564: 2b00 cmp r3, #0 8008566: d106 bne.n 8008576 { /* Allocate lock resource and initialize it */ htim->Lock = HAL_UNLOCKED; 8008568: 687b ldr r3, [r7, #4] 800856a: 2200 movs r2, #0 800856c: f883 203c strb.w r2, [r3, #60] @ 0x3c } /* Init the low level hardware : GPIO, CLOCK, NVIC */ htim->Base_MspInitCallback(htim); #else /* Init the low level hardware : GPIO, CLOCK, NVIC */ HAL_TIM_Base_MspInit(htim); 8008570: 6878 ldr r0, [r7, #4] 8008572: f000 f841 bl 80085f8 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } /* Set the TIM state */ htim->State = HAL_TIM_STATE_BUSY; 8008576: 687b ldr r3, [r7, #4] 8008578: 2202 movs r2, #2 800857a: f883 203d strb.w r2, [r3, #61] @ 0x3d /* Set the Time Base configuration */ TIM_Base_SetConfig(htim->Instance, &htim->Init); 800857e: 687b ldr r3, [r7, #4] 8008580: 681a ldr r2, [r3, #0] 8008582: 687b ldr r3, [r7, #4] 8008584: 3304 adds r3, #4 8008586: 4619 mov r1, r3 8008588: 4610 mov r0, r2 800858a: f000 f9df bl 800894c /* Initialize the DMA burst operation state */ htim->DMABurstState = HAL_DMA_BURST_STATE_READY; 800858e: 687b ldr r3, [r7, #4] 8008590: 2201 movs r2, #1 8008592: f883 2048 strb.w r2, [r3, #72] @ 0x48 /* Initialize the TIM channels state */ TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); 8008596: 687b ldr r3, [r7, #4] 8008598: 2201 movs r2, #1 800859a: f883 203e strb.w r2, [r3, #62] @ 0x3e 800859e: 687b ldr r3, [r7, #4] 80085a0: 2201 movs r2, #1 80085a2: f883 203f strb.w r2, [r3, #63] @ 0x3f 80085a6: 687b ldr r3, [r7, #4] 80085a8: 2201 movs r2, #1 80085aa: f883 2040 strb.w r2, [r3, #64] @ 0x40 80085ae: 687b ldr r3, [r7, #4] 80085b0: 2201 movs r2, #1 80085b2: f883 2041 strb.w r2, [r3, #65] @ 0x41 80085b6: 687b ldr r3, [r7, #4] 80085b8: 2201 movs r2, #1 80085ba: f883 2042 strb.w r2, [r3, #66] @ 0x42 80085be: 687b ldr r3, [r7, #4] 80085c0: 2201 movs r2, #1 80085c2: f883 2043 strb.w r2, [r3, #67] @ 0x43 TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); 80085c6: 687b ldr r3, [r7, #4] 80085c8: 2201 movs r2, #1 80085ca: f883 2044 strb.w r2, [r3, #68] @ 0x44 80085ce: 687b ldr r3, [r7, #4] 80085d0: 2201 movs r2, #1 80085d2: f883 2045 strb.w r2, [r3, #69] @ 0x45 80085d6: 687b ldr r3, [r7, #4] 80085d8: 2201 movs r2, #1 80085da: f883 2046 strb.w r2, [r3, #70] @ 0x46 80085de: 687b ldr r3, [r7, #4] 80085e0: 2201 movs r2, #1 80085e2: f883 2047 strb.w r2, [r3, #71] @ 0x47 /* Initialize the TIM state*/ htim->State = HAL_TIM_STATE_READY; 80085e6: 687b ldr r3, [r7, #4] 80085e8: 2201 movs r2, #1 80085ea: f883 203d strb.w r2, [r3, #61] @ 0x3d return HAL_OK; 80085ee: 2300 movs r3, #0 } 80085f0: 4618 mov r0, r3 80085f2: 3708 adds r7, #8 80085f4: 46bd mov sp, r7 80085f6: bd80 pop {r7, pc} 080085f8 : * @brief Initializes the TIM Base MSP. * @param htim TIM Base handle * @retval None */ __weak void HAL_TIM_Base_MspInit(TIM_HandleTypeDef *htim) { 80085f8: b480 push {r7} 80085fa: b083 sub sp, #12 80085fc: af00 add r7, sp, #0 80085fe: 6078 str r0, [r7, #4] UNUSED(htim); /* NOTE : This function should not be modified, when the callback is needed, the HAL_TIM_Base_MspInit could be implemented in the user file */ } 8008600: bf00 nop 8008602: 370c adds r7, #12 8008604: 46bd mov sp, r7 8008606: f85d 7b04 ldr.w r7, [sp], #4 800860a: 4770 bx lr 0800860c : * @brief Starts the TIM Base generation in interrupt mode. * @param htim TIM Base handle * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_Base_Start_IT(TIM_HandleTypeDef *htim) { 800860c: b480 push {r7} 800860e: b085 sub sp, #20 8008610: af00 add r7, sp, #0 8008612: 6078 str r0, [r7, #4] /* Check the parameters */ assert_param(IS_TIM_INSTANCE(htim->Instance)); /* Check the TIM state */ if (htim->State != HAL_TIM_STATE_READY) 8008614: 687b ldr r3, [r7, #4] 8008616: f893 303d ldrb.w r3, [r3, #61] @ 0x3d 800861a: b2db uxtb r3, r3 800861c: 2b01 cmp r3, #1 800861e: d001 beq.n 8008624 { return HAL_ERROR; 8008620: 2301 movs r3, #1 8008622: e04f b.n 80086c4 } /* Set the TIM state */ htim->State = HAL_TIM_STATE_BUSY; 8008624: 687b ldr r3, [r7, #4] 8008626: 2202 movs r2, #2 8008628: f883 203d strb.w r2, [r3, #61] @ 0x3d /* Enable the TIM Update interrupt */ __HAL_TIM_ENABLE_IT(htim, TIM_IT_UPDATE); 800862c: 687b ldr r3, [r7, #4] 800862e: 681b ldr r3, [r3, #0] 8008630: 68da ldr r2, [r3, #12] 8008632: 687b ldr r3, [r7, #4] 8008634: 681b ldr r3, [r3, #0] 8008636: f042 0201 orr.w r2, r2, #1 800863a: 60da str r2, [r3, #12] /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */ if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) 800863c: 687b ldr r3, [r7, #4] 800863e: 681b ldr r3, [r3, #0] 8008640: 4a23 ldr r2, [pc, #140] @ (80086d0 ) 8008642: 4293 cmp r3, r2 8008644: d01d beq.n 8008682 8008646: 687b ldr r3, [r7, #4] 8008648: 681b ldr r3, [r3, #0] 800864a: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000 800864e: d018 beq.n 8008682 8008650: 687b ldr r3, [r7, #4] 8008652: 681b ldr r3, [r3, #0] 8008654: 4a1f ldr r2, [pc, #124] @ (80086d4 ) 8008656: 4293 cmp r3, r2 8008658: d013 beq.n 8008682 800865a: 687b ldr r3, [r7, #4] 800865c: 681b ldr r3, [r3, #0] 800865e: 4a1e ldr r2, [pc, #120] @ (80086d8 ) 8008660: 4293 cmp r3, r2 8008662: d00e beq.n 8008682 8008664: 687b ldr r3, [r7, #4] 8008666: 681b ldr r3, [r3, #0] 8008668: 4a1c ldr r2, [pc, #112] @ (80086dc ) 800866a: 4293 cmp r3, r2 800866c: d009 beq.n 8008682 800866e: 687b ldr r3, [r7, #4] 8008670: 681b ldr r3, [r3, #0] 8008672: 4a1b ldr r2, [pc, #108] @ (80086e0 ) 8008674: 4293 cmp r3, r2 8008676: d004 beq.n 8008682 8008678: 687b ldr r3, [r7, #4] 800867a: 681b ldr r3, [r3, #0] 800867c: 4a19 ldr r2, [pc, #100] @ (80086e4 ) 800867e: 4293 cmp r3, r2 8008680: d115 bne.n 80086ae { tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; 8008682: 687b ldr r3, [r7, #4] 8008684: 681b ldr r3, [r3, #0] 8008686: 689a ldr r2, [r3, #8] 8008688: 4b17 ldr r3, [pc, #92] @ (80086e8 ) 800868a: 4013 ands r3, r2 800868c: 60fb str r3, [r7, #12] if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) 800868e: 68fb ldr r3, [r7, #12] 8008690: 2b06 cmp r3, #6 8008692: d015 beq.n 80086c0 8008694: 68fb ldr r3, [r7, #12] 8008696: f5b3 3f80 cmp.w r3, #65536 @ 0x10000 800869a: d011 beq.n 80086c0 { __HAL_TIM_ENABLE(htim); 800869c: 687b ldr r3, [r7, #4] 800869e: 681b ldr r3, [r3, #0] 80086a0: 681a ldr r2, [r3, #0] 80086a2: 687b ldr r3, [r7, #4] 80086a4: 681b ldr r3, [r3, #0] 80086a6: f042 0201 orr.w r2, r2, #1 80086aa: 601a str r2, [r3, #0] if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) 80086ac: e008 b.n 80086c0 } } else { __HAL_TIM_ENABLE(htim); 80086ae: 687b ldr r3, [r7, #4] 80086b0: 681b ldr r3, [r3, #0] 80086b2: 681a ldr r2, [r3, #0] 80086b4: 687b ldr r3, [r7, #4] 80086b6: 681b ldr r3, [r3, #0] 80086b8: f042 0201 orr.w r2, r2, #1 80086bc: 601a str r2, [r3, #0] 80086be: e000 b.n 80086c2 if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) 80086c0: bf00 nop } /* Return function status */ return HAL_OK; 80086c2: 2300 movs r3, #0 } 80086c4: 4618 mov r0, r3 80086c6: 3714 adds r7, #20 80086c8: 46bd mov sp, r7 80086ca: f85d 7b04 ldr.w r7, [sp], #4 80086ce: 4770 bx lr 80086d0: 40012c00 .word 0x40012c00 80086d4: 40000400 .word 0x40000400 80086d8: 40000800 .word 0x40000800 80086dc: 40000c00 .word 0x40000c00 80086e0: 40013400 .word 0x40013400 80086e4: 40014000 .word 0x40014000 80086e8: 00010007 .word 0x00010007 080086ec : * @brief This function handles TIM interrupts requests. * @param htim TIM handle * @retval None */ void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim) { 80086ec: b580 push {r7, lr} 80086ee: b084 sub sp, #16 80086f0: af00 add r7, sp, #0 80086f2: 6078 str r0, [r7, #4] uint32_t itsource = htim->Instance->DIER; 80086f4: 687b ldr r3, [r7, #4] 80086f6: 681b ldr r3, [r3, #0] 80086f8: 68db ldr r3, [r3, #12] 80086fa: 60fb str r3, [r7, #12] uint32_t itflag = htim->Instance->SR; 80086fc: 687b ldr r3, [r7, #4] 80086fe: 681b ldr r3, [r3, #0] 8008700: 691b ldr r3, [r3, #16] 8008702: 60bb str r3, [r7, #8] /* Capture compare 1 event */ if ((itflag & (TIM_FLAG_CC1)) == (TIM_FLAG_CC1)) 8008704: 68bb ldr r3, [r7, #8] 8008706: f003 0302 and.w r3, r3, #2 800870a: 2b00 cmp r3, #0 800870c: d020 beq.n 8008750 { if ((itsource & (TIM_IT_CC1)) == (TIM_IT_CC1)) 800870e: 68fb ldr r3, [r7, #12] 8008710: f003 0302 and.w r3, r3, #2 8008714: 2b00 cmp r3, #0 8008716: d01b beq.n 8008750 { { __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_CC1); 8008718: 687b ldr r3, [r7, #4] 800871a: 681b ldr r3, [r3, #0] 800871c: f06f 0202 mvn.w r2, #2 8008720: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1; 8008722: 687b ldr r3, [r7, #4] 8008724: 2201 movs r2, #1 8008726: 771a strb r2, [r3, #28] /* Input capture event */ if ((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00U) 8008728: 687b ldr r3, [r7, #4] 800872a: 681b ldr r3, [r3, #0] 800872c: 699b ldr r3, [r3, #24] 800872e: f003 0303 and.w r3, r3, #3 8008732: 2b00 cmp r3, #0 8008734: d003 beq.n 800873e { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->IC_CaptureCallback(htim); #else HAL_TIM_IC_CaptureCallback(htim); 8008736: 6878 ldr r0, [r7, #4] 8008738: f000 f8e9 bl 800890e 800873c: e005 b.n 800874a { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->OC_DelayElapsedCallback(htim); htim->PWM_PulseFinishedCallback(htim); #else HAL_TIM_OC_DelayElapsedCallback(htim); 800873e: 6878 ldr r0, [r7, #4] 8008740: f000 f8db bl 80088fa HAL_TIM_PWM_PulseFinishedCallback(htim); 8008744: 6878 ldr r0, [r7, #4] 8008746: f000 f8ec bl 8008922 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; 800874a: 687b ldr r3, [r7, #4] 800874c: 2200 movs r2, #0 800874e: 771a strb r2, [r3, #28] } } } /* Capture compare 2 event */ if ((itflag & (TIM_FLAG_CC2)) == (TIM_FLAG_CC2)) 8008750: 68bb ldr r3, [r7, #8] 8008752: f003 0304 and.w r3, r3, #4 8008756: 2b00 cmp r3, #0 8008758: d020 beq.n 800879c { if ((itsource & (TIM_IT_CC2)) == (TIM_IT_CC2)) 800875a: 68fb ldr r3, [r7, #12] 800875c: f003 0304 and.w r3, r3, #4 8008760: 2b00 cmp r3, #0 8008762: d01b beq.n 800879c { __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_CC2); 8008764: 687b ldr r3, [r7, #4] 8008766: 681b ldr r3, [r3, #0] 8008768: f06f 0204 mvn.w r2, #4 800876c: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2; 800876e: 687b ldr r3, [r7, #4] 8008770: 2202 movs r2, #2 8008772: 771a strb r2, [r3, #28] /* Input capture event */ if ((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U) 8008774: 687b ldr r3, [r7, #4] 8008776: 681b ldr r3, [r3, #0] 8008778: 699b ldr r3, [r3, #24] 800877a: f403 7340 and.w r3, r3, #768 @ 0x300 800877e: 2b00 cmp r3, #0 8008780: d003 beq.n 800878a { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->IC_CaptureCallback(htim); #else HAL_TIM_IC_CaptureCallback(htim); 8008782: 6878 ldr r0, [r7, #4] 8008784: f000 f8c3 bl 800890e 8008788: e005 b.n 8008796 { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->OC_DelayElapsedCallback(htim); htim->PWM_PulseFinishedCallback(htim); #else HAL_TIM_OC_DelayElapsedCallback(htim); 800878a: 6878 ldr r0, [r7, #4] 800878c: f000 f8b5 bl 80088fa HAL_TIM_PWM_PulseFinishedCallback(htim); 8008790: 6878 ldr r0, [r7, #4] 8008792: f000 f8c6 bl 8008922 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; 8008796: 687b ldr r3, [r7, #4] 8008798: 2200 movs r2, #0 800879a: 771a strb r2, [r3, #28] } } /* Capture compare 3 event */ if ((itflag & (TIM_FLAG_CC3)) == (TIM_FLAG_CC3)) 800879c: 68bb ldr r3, [r7, #8] 800879e: f003 0308 and.w r3, r3, #8 80087a2: 2b00 cmp r3, #0 80087a4: d020 beq.n 80087e8 { if ((itsource & (TIM_IT_CC3)) == (TIM_IT_CC3)) 80087a6: 68fb ldr r3, [r7, #12] 80087a8: f003 0308 and.w r3, r3, #8 80087ac: 2b00 cmp r3, #0 80087ae: d01b beq.n 80087e8 { __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_CC3); 80087b0: 687b ldr r3, [r7, #4] 80087b2: 681b ldr r3, [r3, #0] 80087b4: f06f 0208 mvn.w r2, #8 80087b8: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3; 80087ba: 687b ldr r3, [r7, #4] 80087bc: 2204 movs r2, #4 80087be: 771a strb r2, [r3, #28] /* Input capture event */ if ((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U) 80087c0: 687b ldr r3, [r7, #4] 80087c2: 681b ldr r3, [r3, #0] 80087c4: 69db ldr r3, [r3, #28] 80087c6: f003 0303 and.w r3, r3, #3 80087ca: 2b00 cmp r3, #0 80087cc: d003 beq.n 80087d6 { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->IC_CaptureCallback(htim); #else HAL_TIM_IC_CaptureCallback(htim); 80087ce: 6878 ldr r0, [r7, #4] 80087d0: f000 f89d bl 800890e 80087d4: e005 b.n 80087e2 { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->OC_DelayElapsedCallback(htim); htim->PWM_PulseFinishedCallback(htim); #else HAL_TIM_OC_DelayElapsedCallback(htim); 80087d6: 6878 ldr r0, [r7, #4] 80087d8: f000 f88f bl 80088fa HAL_TIM_PWM_PulseFinishedCallback(htim); 80087dc: 6878 ldr r0, [r7, #4] 80087de: f000 f8a0 bl 8008922 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; 80087e2: 687b ldr r3, [r7, #4] 80087e4: 2200 movs r2, #0 80087e6: 771a strb r2, [r3, #28] } } /* Capture compare 4 event */ if ((itflag & (TIM_FLAG_CC4)) == (TIM_FLAG_CC4)) 80087e8: 68bb ldr r3, [r7, #8] 80087ea: f003 0310 and.w r3, r3, #16 80087ee: 2b00 cmp r3, #0 80087f0: d020 beq.n 8008834 { if ((itsource & (TIM_IT_CC4)) == (TIM_IT_CC4)) 80087f2: 68fb ldr r3, [r7, #12] 80087f4: f003 0310 and.w r3, r3, #16 80087f8: 2b00 cmp r3, #0 80087fa: d01b beq.n 8008834 { __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_CC4); 80087fc: 687b ldr r3, [r7, #4] 80087fe: 681b ldr r3, [r3, #0] 8008800: f06f 0210 mvn.w r2, #16 8008804: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4; 8008806: 687b ldr r3, [r7, #4] 8008808: 2208 movs r2, #8 800880a: 771a strb r2, [r3, #28] /* Input capture event */ if ((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U) 800880c: 687b ldr r3, [r7, #4] 800880e: 681b ldr r3, [r3, #0] 8008810: 69db ldr r3, [r3, #28] 8008812: f403 7340 and.w r3, r3, #768 @ 0x300 8008816: 2b00 cmp r3, #0 8008818: d003 beq.n 8008822 { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->IC_CaptureCallback(htim); #else HAL_TIM_IC_CaptureCallback(htim); 800881a: 6878 ldr r0, [r7, #4] 800881c: f000 f877 bl 800890e 8008820: e005 b.n 800882e { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->OC_DelayElapsedCallback(htim); htim->PWM_PulseFinishedCallback(htim); #else HAL_TIM_OC_DelayElapsedCallback(htim); 8008822: 6878 ldr r0, [r7, #4] 8008824: f000 f869 bl 80088fa HAL_TIM_PWM_PulseFinishedCallback(htim); 8008828: 6878 ldr r0, [r7, #4] 800882a: f000 f87a bl 8008922 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; 800882e: 687b ldr r3, [r7, #4] 8008830: 2200 movs r2, #0 8008832: 771a strb r2, [r3, #28] } } /* TIM Update event */ if ((itflag & (TIM_FLAG_UPDATE)) == (TIM_FLAG_UPDATE)) 8008834: 68bb ldr r3, [r7, #8] 8008836: f003 0301 and.w r3, r3, #1 800883a: 2b00 cmp r3, #0 800883c: d00c beq.n 8008858 { if ((itsource & (TIM_IT_UPDATE)) == (TIM_IT_UPDATE)) 800883e: 68fb ldr r3, [r7, #12] 8008840: f003 0301 and.w r3, r3, #1 8008844: 2b00 cmp r3, #0 8008846: d007 beq.n 8008858 { __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_UPDATE); 8008848: 687b ldr r3, [r7, #4] 800884a: 681b ldr r3, [r3, #0] 800884c: f06f 0201 mvn.w r2, #1 8008850: 611a str r2, [r3, #16] #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->PeriodElapsedCallback(htim); #else HAL_TIM_PeriodElapsedCallback(htim); 8008852: 6878 ldr r0, [r7, #4] 8008854: f7fa fca6 bl 80031a4 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } } /* TIM Break input event */ if (((itflag & (TIM_FLAG_BREAK)) == (TIM_FLAG_BREAK)) || \ 8008858: 68bb ldr r3, [r7, #8] 800885a: f003 0380 and.w r3, r3, #128 @ 0x80 800885e: 2b00 cmp r3, #0 8008860: d104 bne.n 800886c ((itflag & (TIM_FLAG_SYSTEM_BREAK)) == (TIM_FLAG_SYSTEM_BREAK))) 8008862: 68bb ldr r3, [r7, #8] 8008864: f403 5300 and.w r3, r3, #8192 @ 0x2000 if (((itflag & (TIM_FLAG_BREAK)) == (TIM_FLAG_BREAK)) || \ 8008868: 2b00 cmp r3, #0 800886a: d00c beq.n 8008886 { if ((itsource & (TIM_IT_BREAK)) == (TIM_IT_BREAK)) 800886c: 68fb ldr r3, [r7, #12] 800886e: f003 0380 and.w r3, r3, #128 @ 0x80 8008872: 2b00 cmp r3, #0 8008874: d007 beq.n 8008886 { __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_BREAK | TIM_FLAG_SYSTEM_BREAK); 8008876: 687b ldr r3, [r7, #4] 8008878: 681b ldr r3, [r3, #0] 800887a: f46f 5202 mvn.w r2, #8320 @ 0x2080 800887e: 611a str r2, [r3, #16] #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->BreakCallback(htim); #else HAL_TIMEx_BreakCallback(htim); 8008880: 6878 ldr r0, [r7, #4] 8008882: f000 f913 bl 8008aac #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } } /* TIM Break2 input event */ if ((itflag & (TIM_FLAG_BREAK2)) == (TIM_FLAG_BREAK2)) 8008886: 68bb ldr r3, [r7, #8] 8008888: f403 7380 and.w r3, r3, #256 @ 0x100 800888c: 2b00 cmp r3, #0 800888e: d00c beq.n 80088aa { if ((itsource & (TIM_IT_BREAK)) == (TIM_IT_BREAK)) 8008890: 68fb ldr r3, [r7, #12] 8008892: f003 0380 and.w r3, r3, #128 @ 0x80 8008896: 2b00 cmp r3, #0 8008898: d007 beq.n 80088aa { __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_BREAK2); 800889a: 687b ldr r3, [r7, #4] 800889c: 681b ldr r3, [r3, #0] 800889e: f46f 7280 mvn.w r2, #256 @ 0x100 80088a2: 611a str r2, [r3, #16] #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->Break2Callback(htim); #else HAL_TIMEx_Break2Callback(htim); 80088a4: 6878 ldr r0, [r7, #4] 80088a6: f000 f90b bl 8008ac0 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } } /* TIM Trigger detection event */ if ((itflag & (TIM_FLAG_TRIGGER)) == (TIM_FLAG_TRIGGER)) 80088aa: 68bb ldr r3, [r7, #8] 80088ac: f003 0340 and.w r3, r3, #64 @ 0x40 80088b0: 2b00 cmp r3, #0 80088b2: d00c beq.n 80088ce { if ((itsource & (TIM_IT_TRIGGER)) == (TIM_IT_TRIGGER)) 80088b4: 68fb ldr r3, [r7, #12] 80088b6: f003 0340 and.w r3, r3, #64 @ 0x40 80088ba: 2b00 cmp r3, #0 80088bc: d007 beq.n 80088ce { __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_TRIGGER); 80088be: 687b ldr r3, [r7, #4] 80088c0: 681b ldr r3, [r3, #0] 80088c2: f06f 0240 mvn.w r2, #64 @ 0x40 80088c6: 611a str r2, [r3, #16] #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->TriggerCallback(htim); #else HAL_TIM_TriggerCallback(htim); 80088c8: 6878 ldr r0, [r7, #4] 80088ca: f000 f834 bl 8008936 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } } /* TIM commutation event */ if ((itflag & (TIM_FLAG_COM)) == (TIM_FLAG_COM)) 80088ce: 68bb ldr r3, [r7, #8] 80088d0: f003 0320 and.w r3, r3, #32 80088d4: 2b00 cmp r3, #0 80088d6: d00c beq.n 80088f2 { if ((itsource & (TIM_IT_COM)) == (TIM_IT_COM)) 80088d8: 68fb ldr r3, [r7, #12] 80088da: f003 0320 and.w r3, r3, #32 80088de: 2b00 cmp r3, #0 80088e0: d007 beq.n 80088f2 { __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_COM); 80088e2: 687b ldr r3, [r7, #4] 80088e4: 681b ldr r3, [r3, #0] 80088e6: f06f 0220 mvn.w r2, #32 80088ea: 611a str r2, [r3, #16] #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->CommutationCallback(htim); #else HAL_TIMEx_CommutCallback(htim); 80088ec: 6878 ldr r0, [r7, #4] 80088ee: f000 f8d3 bl 8008a98 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } } } 80088f2: bf00 nop 80088f4: 3710 adds r7, #16 80088f6: 46bd mov sp, r7 80088f8: bd80 pop {r7, pc} 080088fa : * @brief Output Compare callback in non-blocking mode * @param htim TIM OC handle * @retval None */ __weak void HAL_TIM_OC_DelayElapsedCallback(TIM_HandleTypeDef *htim) { 80088fa: b480 push {r7} 80088fc: b083 sub sp, #12 80088fe: af00 add r7, sp, #0 8008900: 6078 str r0, [r7, #4] UNUSED(htim); /* NOTE : This function should not be modified, when the callback is needed, the HAL_TIM_OC_DelayElapsedCallback could be implemented in the user file */ } 8008902: bf00 nop 8008904: 370c adds r7, #12 8008906: 46bd mov sp, r7 8008908: f85d 7b04 ldr.w r7, [sp], #4 800890c: 4770 bx lr 0800890e : * @brief Input Capture callback in non-blocking mode * @param htim TIM IC handle * @retval None */ __weak void HAL_TIM_IC_CaptureCallback(TIM_HandleTypeDef *htim) { 800890e: b480 push {r7} 8008910: b083 sub sp, #12 8008912: af00 add r7, sp, #0 8008914: 6078 str r0, [r7, #4] UNUSED(htim); /* NOTE : This function should not be modified, when the callback is needed, the HAL_TIM_IC_CaptureCallback could be implemented in the user file */ } 8008916: bf00 nop 8008918: 370c adds r7, #12 800891a: 46bd mov sp, r7 800891c: f85d 7b04 ldr.w r7, [sp], #4 8008920: 4770 bx lr 08008922 : * @brief PWM Pulse finished callback in non-blocking mode * @param htim TIM handle * @retval None */ __weak void HAL_TIM_PWM_PulseFinishedCallback(TIM_HandleTypeDef *htim) { 8008922: b480 push {r7} 8008924: b083 sub sp, #12 8008926: af00 add r7, sp, #0 8008928: 6078 str r0, [r7, #4] UNUSED(htim); /* NOTE : This function should not be modified, when the callback is needed, the HAL_TIM_PWM_PulseFinishedCallback could be implemented in the user file */ } 800892a: bf00 nop 800892c: 370c adds r7, #12 800892e: 46bd mov sp, r7 8008930: f85d 7b04 ldr.w r7, [sp], #4 8008934: 4770 bx lr 08008936 : * @brief Hall Trigger detection callback in non-blocking mode * @param htim TIM handle * @retval None */ __weak void HAL_TIM_TriggerCallback(TIM_HandleTypeDef *htim) { 8008936: b480 push {r7} 8008938: b083 sub sp, #12 800893a: af00 add r7, sp, #0 800893c: 6078 str r0, [r7, #4] UNUSED(htim); /* NOTE : This function should not be modified, when the callback is needed, the HAL_TIM_TriggerCallback could be implemented in the user file */ } 800893e: bf00 nop 8008940: 370c adds r7, #12 8008942: 46bd mov sp, r7 8008944: f85d 7b04 ldr.w r7, [sp], #4 8008948: 4770 bx lr ... 0800894c : * @param TIMx TIM peripheral * @param Structure TIM Base configuration structure * @retval None */ void TIM_Base_SetConfig(TIM_TypeDef *TIMx, const TIM_Base_InitTypeDef *Structure) { 800894c: b480 push {r7} 800894e: b085 sub sp, #20 8008950: af00 add r7, sp, #0 8008952: 6078 str r0, [r7, #4] 8008954: 6039 str r1, [r7, #0] uint32_t tmpcr1; tmpcr1 = TIMx->CR1; 8008956: 687b ldr r3, [r7, #4] 8008958: 681b ldr r3, [r3, #0] 800895a: 60fb str r3, [r7, #12] /* Set TIM Time Base Unit parameters ---------------------------------------*/ if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx)) 800895c: 687b ldr r3, [r7, #4] 800895e: 4a46 ldr r2, [pc, #280] @ (8008a78 ) 8008960: 4293 cmp r3, r2 8008962: d013 beq.n 800898c 8008964: 687b ldr r3, [r7, #4] 8008966: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000 800896a: d00f beq.n 800898c 800896c: 687b ldr r3, [r7, #4] 800896e: 4a43 ldr r2, [pc, #268] @ (8008a7c ) 8008970: 4293 cmp r3, r2 8008972: d00b beq.n 800898c 8008974: 687b ldr r3, [r7, #4] 8008976: 4a42 ldr r2, [pc, #264] @ (8008a80 ) 8008978: 4293 cmp r3, r2 800897a: d007 beq.n 800898c 800897c: 687b ldr r3, [r7, #4] 800897e: 4a41 ldr r2, [pc, #260] @ (8008a84 ) 8008980: 4293 cmp r3, r2 8008982: d003 beq.n 800898c 8008984: 687b ldr r3, [r7, #4] 8008986: 4a40 ldr r2, [pc, #256] @ (8008a88 ) 8008988: 4293 cmp r3, r2 800898a: d108 bne.n 800899e { /* Select the Counter Mode */ tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS); 800898c: 68fb ldr r3, [r7, #12] 800898e: f023 0370 bic.w r3, r3, #112 @ 0x70 8008992: 60fb str r3, [r7, #12] tmpcr1 |= Structure->CounterMode; 8008994: 683b ldr r3, [r7, #0] 8008996: 685b ldr r3, [r3, #4] 8008998: 68fa ldr r2, [r7, #12] 800899a: 4313 orrs r3, r2 800899c: 60fb str r3, [r7, #12] } if (IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx)) 800899e: 687b ldr r3, [r7, #4] 80089a0: 4a35 ldr r2, [pc, #212] @ (8008a78 ) 80089a2: 4293 cmp r3, r2 80089a4: d01f beq.n 80089e6 80089a6: 687b ldr r3, [r7, #4] 80089a8: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000 80089ac: d01b beq.n 80089e6 80089ae: 687b ldr r3, [r7, #4] 80089b0: 4a32 ldr r2, [pc, #200] @ (8008a7c ) 80089b2: 4293 cmp r3, r2 80089b4: d017 beq.n 80089e6 80089b6: 687b ldr r3, [r7, #4] 80089b8: 4a31 ldr r2, [pc, #196] @ (8008a80 ) 80089ba: 4293 cmp r3, r2 80089bc: d013 beq.n 80089e6 80089be: 687b ldr r3, [r7, #4] 80089c0: 4a30 ldr r2, [pc, #192] @ (8008a84 ) 80089c2: 4293 cmp r3, r2 80089c4: d00f beq.n 80089e6 80089c6: 687b ldr r3, [r7, #4] 80089c8: 4a2f ldr r2, [pc, #188] @ (8008a88 ) 80089ca: 4293 cmp r3, r2 80089cc: d00b beq.n 80089e6 80089ce: 687b ldr r3, [r7, #4] 80089d0: 4a2e ldr r2, [pc, #184] @ (8008a8c ) 80089d2: 4293 cmp r3, r2 80089d4: d007 beq.n 80089e6 80089d6: 687b ldr r3, [r7, #4] 80089d8: 4a2d ldr r2, [pc, #180] @ (8008a90 ) 80089da: 4293 cmp r3, r2 80089dc: d003 beq.n 80089e6 80089de: 687b ldr r3, [r7, #4] 80089e0: 4a2c ldr r2, [pc, #176] @ (8008a94 ) 80089e2: 4293 cmp r3, r2 80089e4: d108 bne.n 80089f8 { /* Set the clock division */ tmpcr1 &= ~TIM_CR1_CKD; 80089e6: 68fb ldr r3, [r7, #12] 80089e8: f423 7340 bic.w r3, r3, #768 @ 0x300 80089ec: 60fb str r3, [r7, #12] tmpcr1 |= (uint32_t)Structure->ClockDivision; 80089ee: 683b ldr r3, [r7, #0] 80089f0: 68db ldr r3, [r3, #12] 80089f2: 68fa ldr r2, [r7, #12] 80089f4: 4313 orrs r3, r2 80089f6: 60fb str r3, [r7, #12] } /* Set the auto-reload preload */ MODIFY_REG(tmpcr1, TIM_CR1_ARPE, Structure->AutoReloadPreload); 80089f8: 68fb ldr r3, [r7, #12] 80089fa: f023 0280 bic.w r2, r3, #128 @ 0x80 80089fe: 683b ldr r3, [r7, #0] 8008a00: 695b ldr r3, [r3, #20] 8008a02: 4313 orrs r3, r2 8008a04: 60fb str r3, [r7, #12] TIMx->CR1 = tmpcr1; 8008a06: 687b ldr r3, [r7, #4] 8008a08: 68fa ldr r2, [r7, #12] 8008a0a: 601a str r2, [r3, #0] /* Set the Autoreload value */ TIMx->ARR = (uint32_t)Structure->Period ; 8008a0c: 683b ldr r3, [r7, #0] 8008a0e: 689a ldr r2, [r3, #8] 8008a10: 687b ldr r3, [r7, #4] 8008a12: 62da str r2, [r3, #44] @ 0x2c /* Set the Prescaler value */ TIMx->PSC = Structure->Prescaler; 8008a14: 683b ldr r3, [r7, #0] 8008a16: 681a ldr r2, [r3, #0] 8008a18: 687b ldr r3, [r7, #4] 8008a1a: 629a str r2, [r3, #40] @ 0x28 if (IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx)) 8008a1c: 687b ldr r3, [r7, #4] 8008a1e: 4a16 ldr r2, [pc, #88] @ (8008a78 ) 8008a20: 4293 cmp r3, r2 8008a22: d00f beq.n 8008a44 8008a24: 687b ldr r3, [r7, #4] 8008a26: 4a18 ldr r2, [pc, #96] @ (8008a88 ) 8008a28: 4293 cmp r3, r2 8008a2a: d00b beq.n 8008a44 8008a2c: 687b ldr r3, [r7, #4] 8008a2e: 4a17 ldr r2, [pc, #92] @ (8008a8c ) 8008a30: 4293 cmp r3, r2 8008a32: d007 beq.n 8008a44 8008a34: 687b ldr r3, [r7, #4] 8008a36: 4a16 ldr r2, [pc, #88] @ (8008a90 ) 8008a38: 4293 cmp r3, r2 8008a3a: d003 beq.n 8008a44 8008a3c: 687b ldr r3, [r7, #4] 8008a3e: 4a15 ldr r2, [pc, #84] @ (8008a94 ) 8008a40: 4293 cmp r3, r2 8008a42: d103 bne.n 8008a4c { /* Set the Repetition Counter value */ TIMx->RCR = Structure->RepetitionCounter; 8008a44: 683b ldr r3, [r7, #0] 8008a46: 691a ldr r2, [r3, #16] 8008a48: 687b ldr r3, [r7, #4] 8008a4a: 631a str r2, [r3, #48] @ 0x30 } /* Generate an update event to reload the Prescaler and the repetition counter (only for advanced timer) value immediately */ TIMx->EGR = TIM_EGR_UG; 8008a4c: 687b ldr r3, [r7, #4] 8008a4e: 2201 movs r2, #1 8008a50: 615a str r2, [r3, #20] /* Check if the update flag is set after the Update Generation, if so clear the UIF flag */ if (HAL_IS_BIT_SET(TIMx->SR, TIM_FLAG_UPDATE)) 8008a52: 687b ldr r3, [r7, #4] 8008a54: 691b ldr r3, [r3, #16] 8008a56: f003 0301 and.w r3, r3, #1 8008a5a: 2b01 cmp r3, #1 8008a5c: d105 bne.n 8008a6a { /* Clear the update flag */ CLEAR_BIT(TIMx->SR, TIM_FLAG_UPDATE); 8008a5e: 687b ldr r3, [r7, #4] 8008a60: 691b ldr r3, [r3, #16] 8008a62: f023 0201 bic.w r2, r3, #1 8008a66: 687b ldr r3, [r7, #4] 8008a68: 611a str r2, [r3, #16] } } 8008a6a: bf00 nop 8008a6c: 3714 adds r7, #20 8008a6e: 46bd mov sp, r7 8008a70: f85d 7b04 ldr.w r7, [sp], #4 8008a74: 4770 bx lr 8008a76: bf00 nop 8008a78: 40012c00 .word 0x40012c00 8008a7c: 40000400 .word 0x40000400 8008a80: 40000800 .word 0x40000800 8008a84: 40000c00 .word 0x40000c00 8008a88: 40013400 .word 0x40013400 8008a8c: 40014000 .word 0x40014000 8008a90: 40014400 .word 0x40014400 8008a94: 40014800 .word 0x40014800 08008a98 : * @brief Commutation callback in non-blocking mode * @param htim TIM handle * @retval None */ __weak void HAL_TIMEx_CommutCallback(TIM_HandleTypeDef *htim) { 8008a98: b480 push {r7} 8008a9a: b083 sub sp, #12 8008a9c: af00 add r7, sp, #0 8008a9e: 6078 str r0, [r7, #4] UNUSED(htim); /* NOTE : This function should not be modified, when the callback is needed, the HAL_TIMEx_CommutCallback could be implemented in the user file */ } 8008aa0: bf00 nop 8008aa2: 370c adds r7, #12 8008aa4: 46bd mov sp, r7 8008aa6: f85d 7b04 ldr.w r7, [sp], #4 8008aaa: 4770 bx lr 08008aac : * @brief Break detection callback in non-blocking mode * @param htim TIM handle * @retval None */ __weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim) { 8008aac: b480 push {r7} 8008aae: b083 sub sp, #12 8008ab0: af00 add r7, sp, #0 8008ab2: 6078 str r0, [r7, #4] UNUSED(htim); /* NOTE : This function should not be modified, when the callback is needed, the HAL_TIMEx_BreakCallback could be implemented in the user file */ } 8008ab4: bf00 nop 8008ab6: 370c adds r7, #12 8008ab8: 46bd mov sp, r7 8008aba: f85d 7b04 ldr.w r7, [sp], #4 8008abe: 4770 bx lr 08008ac0 : * @brief Break2 detection callback in non blocking mode * @param htim: TIM handle * @retval None */ __weak void HAL_TIMEx_Break2Callback(TIM_HandleTypeDef *htim) { 8008ac0: b480 push {r7} 8008ac2: b083 sub sp, #12 8008ac4: af00 add r7, sp, #0 8008ac6: 6078 str r0, [r7, #4] UNUSED(htim); /* NOTE : This function Should not be modified, when the callback is needed, the HAL_TIMEx_Break2Callback could be implemented in the user file */ } 8008ac8: bf00 nop 8008aca: 370c adds r7, #12 8008acc: 46bd mov sp, r7 8008ace: f85d 7b04 ldr.w r7, [sp], #4 8008ad2: 4770 bx lr 08008ad4 : * parameters in the UART_InitTypeDef and initialize the associated handle. * @param huart UART handle. * @retval HAL status */ HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart) { 8008ad4: b580 push {r7, lr} 8008ad6: b082 sub sp, #8 8008ad8: af00 add r7, sp, #0 8008ada: 6078 str r0, [r7, #4] /* Check the UART handle allocation */ if (huart == NULL) 8008adc: 687b ldr r3, [r7, #4] 8008ade: 2b00 cmp r3, #0 8008ae0: d101 bne.n 8008ae6 { return HAL_ERROR; 8008ae2: 2301 movs r3, #1 8008ae4: e040 b.n 8008b68 { /* Check the parameters */ assert_param((IS_UART_INSTANCE(huart->Instance)) || (IS_LPUART_INSTANCE(huart->Instance))); } if (huart->gState == HAL_UART_STATE_RESET) 8008ae6: 687b ldr r3, [r7, #4] 8008ae8: 6fdb ldr r3, [r3, #124] @ 0x7c 8008aea: 2b00 cmp r3, #0 8008aec: d106 bne.n 8008afc { /* Allocate lock resource and initialize it */ huart->Lock = HAL_UNLOCKED; 8008aee: 687b ldr r3, [r7, #4] 8008af0: 2200 movs r2, #0 8008af2: f883 2078 strb.w r2, [r3, #120] @ 0x78 /* Init the low level hardware */ huart->MspInitCallback(huart); #else /* Init the low level hardware : GPIO, CLOCK */ HAL_UART_MspInit(huart); 8008af6: 6878 ldr r0, [r7, #4] 8008af8: f7fa fd72 bl 80035e0 #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ } huart->gState = HAL_UART_STATE_BUSY; 8008afc: 687b ldr r3, [r7, #4] 8008afe: 2224 movs r2, #36 @ 0x24 8008b00: 67da str r2, [r3, #124] @ 0x7c __HAL_UART_DISABLE(huart); 8008b02: 687b ldr r3, [r7, #4] 8008b04: 681b ldr r3, [r3, #0] 8008b06: 681a ldr r2, [r3, #0] 8008b08: 687b ldr r3, [r7, #4] 8008b0a: 681b ldr r3, [r3, #0] 8008b0c: f022 0201 bic.w r2, r2, #1 8008b10: 601a str r2, [r3, #0] /* Perform advanced settings configuration */ /* For some items, configuration requires to be done prior TE and RE bits are set */ if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT) 8008b12: 687b ldr r3, [r7, #4] 8008b14: 6a5b ldr r3, [r3, #36] @ 0x24 8008b16: 2b00 cmp r3, #0 8008b18: d002 beq.n 8008b20 { UART_AdvFeatureConfig(huart); 8008b1a: 6878 ldr r0, [r7, #4] 8008b1c: f000 ff24 bl 8009968 } /* Set the UART Communication parameters */ if (UART_SetConfig(huart) == HAL_ERROR) 8008b20: 6878 ldr r0, [r7, #4] 8008b22: f000 fc69 bl 80093f8 8008b26: 4603 mov r3, r0 8008b28: 2b01 cmp r3, #1 8008b2a: d101 bne.n 8008b30 { return HAL_ERROR; 8008b2c: 2301 movs r3, #1 8008b2e: e01b b.n 8008b68 } /* In asynchronous mode, the following bits must be kept cleared: - LINEN and CLKEN bits in the USART_CR2 register, - SCEN, HDSEL and IREN bits in the USART_CR3 register.*/ CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN)); 8008b30: 687b ldr r3, [r7, #4] 8008b32: 681b ldr r3, [r3, #0] 8008b34: 685a ldr r2, [r3, #4] 8008b36: 687b ldr r3, [r7, #4] 8008b38: 681b ldr r3, [r3, #0] 8008b3a: f422 4290 bic.w r2, r2, #18432 @ 0x4800 8008b3e: 605a str r2, [r3, #4] CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN)); 8008b40: 687b ldr r3, [r7, #4] 8008b42: 681b ldr r3, [r3, #0] 8008b44: 689a ldr r2, [r3, #8] 8008b46: 687b ldr r3, [r7, #4] 8008b48: 681b ldr r3, [r3, #0] 8008b4a: f022 022a bic.w r2, r2, #42 @ 0x2a 8008b4e: 609a str r2, [r3, #8] __HAL_UART_ENABLE(huart); 8008b50: 687b ldr r3, [r7, #4] 8008b52: 681b ldr r3, [r3, #0] 8008b54: 681a ldr r2, [r3, #0] 8008b56: 687b ldr r3, [r7, #4] 8008b58: 681b ldr r3, [r3, #0] 8008b5a: f042 0201 orr.w r2, r2, #1 8008b5e: 601a str r2, [r3, #0] /* TEACK and/or REACK to check before moving huart->gState and huart->RxState to Ready */ return (UART_CheckIdleState(huart)); 8008b60: 6878 ldr r0, [r7, #4] 8008b62: f000 ffa3 bl 8009aac 8008b66: 4603 mov r3, r0 } 8008b68: 4618 mov r0, r3 8008b6a: 3708 adds r7, #8 8008b6c: 46bd mov sp, r7 8008b6e: bd80 pop {r7, pc} 08008b70 : * @param Size Amount of data elements (u8 or u16) to be received. * @param Timeout Timeout duration. * @retval HAL status */ HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout) { 8008b70: b580 push {r7, lr} 8008b72: b08a sub sp, #40 @ 0x28 8008b74: af02 add r7, sp, #8 8008b76: 60f8 str r0, [r7, #12] 8008b78: 60b9 str r1, [r7, #8] 8008b7a: 603b str r3, [r7, #0] 8008b7c: 4613 mov r3, r2 8008b7e: 80fb strh r3, [r7, #6] uint16_t *pdata16bits; uint16_t uhMask; uint32_t tickstart; /* Check that a Rx process is not already ongoing */ if (huart->RxState == HAL_UART_STATE_READY) 8008b80: 68fb ldr r3, [r7, #12] 8008b82: f8d3 3080 ldr.w r3, [r3, #128] @ 0x80 8008b86: 2b20 cmp r3, #32 8008b88: f040 80b6 bne.w 8008cf8 { if ((pData == NULL) || (Size == 0U)) 8008b8c: 68bb ldr r3, [r7, #8] 8008b8e: 2b00 cmp r3, #0 8008b90: d002 beq.n 8008b98 8008b92: 88fb ldrh r3, [r7, #6] 8008b94: 2b00 cmp r3, #0 8008b96: d101 bne.n 8008b9c { return HAL_ERROR; 8008b98: 2301 movs r3, #1 8008b9a: e0ae b.n 8008cfa } huart->ErrorCode = HAL_UART_ERROR_NONE; 8008b9c: 68fb ldr r3, [r7, #12] 8008b9e: 2200 movs r2, #0 8008ba0: f8c3 2084 str.w r2, [r3, #132] @ 0x84 huart->RxState = HAL_UART_STATE_BUSY_RX; 8008ba4: 68fb ldr r3, [r7, #12] 8008ba6: 2222 movs r2, #34 @ 0x22 8008ba8: f8c3 2080 str.w r2, [r3, #128] @ 0x80 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; 8008bac: 68fb ldr r3, [r7, #12] 8008bae: 2200 movs r2, #0 8008bb0: 661a str r2, [r3, #96] @ 0x60 /* Init tickstart for timeout management */ tickstart = HAL_GetTick(); 8008bb2: f7fb f851 bl 8003c58 8008bb6: 6178 str r0, [r7, #20] huart->RxXferSize = Size; 8008bb8: 68fb ldr r3, [r7, #12] 8008bba: 88fa ldrh r2, [r7, #6] 8008bbc: f8a3 2058 strh.w r2, [r3, #88] @ 0x58 huart->RxXferCount = Size; 8008bc0: 68fb ldr r3, [r7, #12] 8008bc2: 88fa ldrh r2, [r7, #6] 8008bc4: f8a3 205a strh.w r2, [r3, #90] @ 0x5a /* Computation of UART mask to apply to RDR register */ UART_MASK_COMPUTATION(huart); 8008bc8: 68fb ldr r3, [r7, #12] 8008bca: 689b ldr r3, [r3, #8] 8008bcc: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 8008bd0: d10e bne.n 8008bf0 8008bd2: 68fb ldr r3, [r7, #12] 8008bd4: 691b ldr r3, [r3, #16] 8008bd6: 2b00 cmp r3, #0 8008bd8: d105 bne.n 8008be6 8008bda: 68fb ldr r3, [r7, #12] 8008bdc: f240 12ff movw r2, #511 @ 0x1ff 8008be0: f8a3 205c strh.w r2, [r3, #92] @ 0x5c 8008be4: e02d b.n 8008c42 8008be6: 68fb ldr r3, [r7, #12] 8008be8: 22ff movs r2, #255 @ 0xff 8008bea: f8a3 205c strh.w r2, [r3, #92] @ 0x5c 8008bee: e028 b.n 8008c42 8008bf0: 68fb ldr r3, [r7, #12] 8008bf2: 689b ldr r3, [r3, #8] 8008bf4: 2b00 cmp r3, #0 8008bf6: d10d bne.n 8008c14 8008bf8: 68fb ldr r3, [r7, #12] 8008bfa: 691b ldr r3, [r3, #16] 8008bfc: 2b00 cmp r3, #0 8008bfe: d104 bne.n 8008c0a 8008c00: 68fb ldr r3, [r7, #12] 8008c02: 22ff movs r2, #255 @ 0xff 8008c04: f8a3 205c strh.w r2, [r3, #92] @ 0x5c 8008c08: e01b b.n 8008c42 8008c0a: 68fb ldr r3, [r7, #12] 8008c0c: 227f movs r2, #127 @ 0x7f 8008c0e: f8a3 205c strh.w r2, [r3, #92] @ 0x5c 8008c12: e016 b.n 8008c42 8008c14: 68fb ldr r3, [r7, #12] 8008c16: 689b ldr r3, [r3, #8] 8008c18: f1b3 5f80 cmp.w r3, #268435456 @ 0x10000000 8008c1c: d10d bne.n 8008c3a 8008c1e: 68fb ldr r3, [r7, #12] 8008c20: 691b ldr r3, [r3, #16] 8008c22: 2b00 cmp r3, #0 8008c24: d104 bne.n 8008c30 8008c26: 68fb ldr r3, [r7, #12] 8008c28: 227f movs r2, #127 @ 0x7f 8008c2a: f8a3 205c strh.w r2, [r3, #92] @ 0x5c 8008c2e: e008 b.n 8008c42 8008c30: 68fb ldr r3, [r7, #12] 8008c32: 223f movs r2, #63 @ 0x3f 8008c34: f8a3 205c strh.w r2, [r3, #92] @ 0x5c 8008c38: e003 b.n 8008c42 8008c3a: 68fb ldr r3, [r7, #12] 8008c3c: 2200 movs r2, #0 8008c3e: f8a3 205c strh.w r2, [r3, #92] @ 0x5c uhMask = huart->Mask; 8008c42: 68fb ldr r3, [r7, #12] 8008c44: f8b3 305c ldrh.w r3, [r3, #92] @ 0x5c 8008c48: 827b strh r3, [r7, #18] /* In case of 9bits/No Parity transfer, pRxData needs to be handled as a uint16_t pointer */ if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) 8008c4a: 68fb ldr r3, [r7, #12] 8008c4c: 689b ldr r3, [r3, #8] 8008c4e: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 8008c52: d108 bne.n 8008c66 8008c54: 68fb ldr r3, [r7, #12] 8008c56: 691b ldr r3, [r3, #16] 8008c58: 2b00 cmp r3, #0 8008c5a: d104 bne.n 8008c66 { pdata8bits = NULL; 8008c5c: 2300 movs r3, #0 8008c5e: 61fb str r3, [r7, #28] pdata16bits = (uint16_t *) pData; 8008c60: 68bb ldr r3, [r7, #8] 8008c62: 61bb str r3, [r7, #24] 8008c64: e003 b.n 8008c6e } else { pdata8bits = pData; 8008c66: 68bb ldr r3, [r7, #8] 8008c68: 61fb str r3, [r7, #28] pdata16bits = NULL; 8008c6a: 2300 movs r3, #0 8008c6c: 61bb str r3, [r7, #24] } /* as long as data have to be received */ while (huart->RxXferCount > 0U) 8008c6e: e037 b.n 8008ce0 { if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_RXNE, RESET, tickstart, Timeout) != HAL_OK) 8008c70: 683b ldr r3, [r7, #0] 8008c72: 9300 str r3, [sp, #0] 8008c74: 697b ldr r3, [r7, #20] 8008c76: 2200 movs r2, #0 8008c78: 2120 movs r1, #32 8008c7a: 68f8 ldr r0, [r7, #12] 8008c7c: f000 ffbe bl 8009bfc 8008c80: 4603 mov r3, r0 8008c82: 2b00 cmp r3, #0 8008c84: d005 beq.n 8008c92 { huart->RxState = HAL_UART_STATE_READY; 8008c86: 68fb ldr r3, [r7, #12] 8008c88: 2220 movs r2, #32 8008c8a: f8c3 2080 str.w r2, [r3, #128] @ 0x80 return HAL_TIMEOUT; 8008c8e: 2303 movs r3, #3 8008c90: e033 b.n 8008cfa } if (pdata8bits == NULL) 8008c92: 69fb ldr r3, [r7, #28] 8008c94: 2b00 cmp r3, #0 8008c96: d10c bne.n 8008cb2 { *pdata16bits = (uint16_t)(huart->Instance->RDR & uhMask); 8008c98: 68fb ldr r3, [r7, #12] 8008c9a: 681b ldr r3, [r3, #0] 8008c9c: 8c9b ldrh r3, [r3, #36] @ 0x24 8008c9e: b29a uxth r2, r3 8008ca0: 8a7b ldrh r3, [r7, #18] 8008ca2: 4013 ands r3, r2 8008ca4: b29a uxth r2, r3 8008ca6: 69bb ldr r3, [r7, #24] 8008ca8: 801a strh r2, [r3, #0] pdata16bits++; 8008caa: 69bb ldr r3, [r7, #24] 8008cac: 3302 adds r3, #2 8008cae: 61bb str r3, [r7, #24] 8008cb0: e00d b.n 8008cce } else { *pdata8bits = (uint8_t)(huart->Instance->RDR & (uint8_t)uhMask); 8008cb2: 68fb ldr r3, [r7, #12] 8008cb4: 681b ldr r3, [r3, #0] 8008cb6: 8c9b ldrh r3, [r3, #36] @ 0x24 8008cb8: b29b uxth r3, r3 8008cba: b2da uxtb r2, r3 8008cbc: 8a7b ldrh r3, [r7, #18] 8008cbe: b2db uxtb r3, r3 8008cc0: 4013 ands r3, r2 8008cc2: b2da uxtb r2, r3 8008cc4: 69fb ldr r3, [r7, #28] 8008cc6: 701a strb r2, [r3, #0] pdata8bits++; 8008cc8: 69fb ldr r3, [r7, #28] 8008cca: 3301 adds r3, #1 8008ccc: 61fb str r3, [r7, #28] } huart->RxXferCount--; 8008cce: 68fb ldr r3, [r7, #12] 8008cd0: f8b3 305a ldrh.w r3, [r3, #90] @ 0x5a 8008cd4: b29b uxth r3, r3 8008cd6: 3b01 subs r3, #1 8008cd8: b29a uxth r2, r3 8008cda: 68fb ldr r3, [r7, #12] 8008cdc: f8a3 205a strh.w r2, [r3, #90] @ 0x5a while (huart->RxXferCount > 0U) 8008ce0: 68fb ldr r3, [r7, #12] 8008ce2: f8b3 305a ldrh.w r3, [r3, #90] @ 0x5a 8008ce6: b29b uxth r3, r3 8008ce8: 2b00 cmp r3, #0 8008cea: d1c1 bne.n 8008c70 } /* At end of Rx process, restore huart->RxState to Ready */ huart->RxState = HAL_UART_STATE_READY; 8008cec: 68fb ldr r3, [r7, #12] 8008cee: 2220 movs r2, #32 8008cf0: f8c3 2080 str.w r2, [r3, #128] @ 0x80 return HAL_OK; 8008cf4: 2300 movs r3, #0 8008cf6: e000 b.n 8008cfa } else { return HAL_BUSY; 8008cf8: 2302 movs r3, #2 } } 8008cfa: 4618 mov r0, r3 8008cfc: 3720 adds r7, #32 8008cfe: 46bd mov sp, r7 8008d00: bd80 pop {r7, pc} ... 08008d04 : * @param pData Pointer to data buffer (u8 or u16 data elements). * @param Size Amount of data elements (u8 or u16) to be sent. * @retval HAL status */ HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size) { 8008d04: b480 push {r7} 8008d06: b08b sub sp, #44 @ 0x2c 8008d08: af00 add r7, sp, #0 8008d0a: 60f8 str r0, [r7, #12] 8008d0c: 60b9 str r1, [r7, #8] 8008d0e: 4613 mov r3, r2 8008d10: 80fb strh r3, [r7, #6] /* Check that a Tx process is not already ongoing */ if (huart->gState == HAL_UART_STATE_READY) 8008d12: 68fb ldr r3, [r7, #12] 8008d14: 6fdb ldr r3, [r3, #124] @ 0x7c 8008d16: 2b20 cmp r3, #32 8008d18: d147 bne.n 8008daa { if ((pData == NULL) || (Size == 0U)) 8008d1a: 68bb ldr r3, [r7, #8] 8008d1c: 2b00 cmp r3, #0 8008d1e: d002 beq.n 8008d26 8008d20: 88fb ldrh r3, [r7, #6] 8008d22: 2b00 cmp r3, #0 8008d24: d101 bne.n 8008d2a { return HAL_ERROR; 8008d26: 2301 movs r3, #1 8008d28: e040 b.n 8008dac } huart->pTxBuffPtr = pData; 8008d2a: 68fb ldr r3, [r7, #12] 8008d2c: 68ba ldr r2, [r7, #8] 8008d2e: 64da str r2, [r3, #76] @ 0x4c huart->TxXferSize = Size; 8008d30: 68fb ldr r3, [r7, #12] 8008d32: 88fa ldrh r2, [r7, #6] 8008d34: f8a3 2050 strh.w r2, [r3, #80] @ 0x50 huart->TxXferCount = Size; 8008d38: 68fb ldr r3, [r7, #12] 8008d3a: 88fa ldrh r2, [r7, #6] 8008d3c: f8a3 2052 strh.w r2, [r3, #82] @ 0x52 huart->TxISR = NULL; 8008d40: 68fb ldr r3, [r7, #12] 8008d42: 2200 movs r2, #0 8008d44: 66da str r2, [r3, #108] @ 0x6c huart->ErrorCode = HAL_UART_ERROR_NONE; 8008d46: 68fb ldr r3, [r7, #12] 8008d48: 2200 movs r2, #0 8008d4a: f8c3 2084 str.w r2, [r3, #132] @ 0x84 huart->gState = HAL_UART_STATE_BUSY_TX; 8008d4e: 68fb ldr r3, [r7, #12] 8008d50: 2221 movs r2, #33 @ 0x21 8008d52: 67da str r2, [r3, #124] @ 0x7c /* Enable the Transmit Data Register Empty interrupt */ ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_TXEIE_TXFNFIE); } #else /* Set the Tx ISR function pointer according to the data word length */ if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) 8008d54: 68fb ldr r3, [r7, #12] 8008d56: 689b ldr r3, [r3, #8] 8008d58: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 8008d5c: d107 bne.n 8008d6e 8008d5e: 68fb ldr r3, [r7, #12] 8008d60: 691b ldr r3, [r3, #16] 8008d62: 2b00 cmp r3, #0 8008d64: d103 bne.n 8008d6e { huart->TxISR = UART_TxISR_16BIT; 8008d66: 68fb ldr r3, [r7, #12] 8008d68: 4a13 ldr r2, [pc, #76] @ (8008db8 ) 8008d6a: 66da str r2, [r3, #108] @ 0x6c 8008d6c: e002 b.n 8008d74 } else { huart->TxISR = UART_TxISR_8BIT; 8008d6e: 68fb ldr r3, [r7, #12] 8008d70: 4a12 ldr r2, [pc, #72] @ (8008dbc ) 8008d72: 66da str r2, [r3, #108] @ 0x6c } /* Enable the Transmit Data Register Empty interrupt */ ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_TXEIE); 8008d74: 68fb ldr r3, [r7, #12] 8008d76: 681b ldr r3, [r3, #0] 8008d78: 617b str r3, [r7, #20] */ __STATIC_FORCEINLINE uint32_t __LDREXW(volatile uint32_t *addr) { uint32_t result; __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 8008d7a: 697b ldr r3, [r7, #20] 8008d7c: e853 3f00 ldrex r3, [r3] 8008d80: 613b str r3, [r7, #16] return(result); 8008d82: 693b ldr r3, [r7, #16] 8008d84: f043 0380 orr.w r3, r3, #128 @ 0x80 8008d88: 627b str r3, [r7, #36] @ 0x24 8008d8a: 68fb ldr r3, [r7, #12] 8008d8c: 681b ldr r3, [r3, #0] 8008d8e: 461a mov r2, r3 8008d90: 6a7b ldr r3, [r7, #36] @ 0x24 8008d92: 623b str r3, [r7, #32] 8008d94: 61fa str r2, [r7, #28] */ __STATIC_FORCEINLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr) { uint32_t result; __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 8008d96: 69f9 ldr r1, [r7, #28] 8008d98: 6a3a ldr r2, [r7, #32] 8008d9a: e841 2300 strex r3, r2, [r1] 8008d9e: 61bb str r3, [r7, #24] return(result); 8008da0: 69bb ldr r3, [r7, #24] 8008da2: 2b00 cmp r3, #0 8008da4: d1e6 bne.n 8008d74 #endif /* USART_CR1_FIFOEN */ return HAL_OK; 8008da6: 2300 movs r3, #0 8008da8: e000 b.n 8008dac } else { return HAL_BUSY; 8008daa: 2302 movs r3, #2 } } 8008dac: 4618 mov r0, r3 8008dae: 372c adds r7, #44 @ 0x2c 8008db0: 46bd mov sp, r7 8008db2: f85d 7b04 ldr.w r7, [sp], #4 8008db6: 4770 bx lr 8008db8: 08009e81 .word 0x08009e81 8008dbc: 08009dcb .word 0x08009dcb 08008dc0 : * @brief Handle UART interrupt request. * @param huart UART handle. * @retval None */ void HAL_UART_IRQHandler(UART_HandleTypeDef *huart) { 8008dc0: b580 push {r7, lr} 8008dc2: b0ba sub sp, #232 @ 0xe8 8008dc4: af00 add r7, sp, #0 8008dc6: 6078 str r0, [r7, #4] uint32_t isrflags = READ_REG(huart->Instance->ISR); 8008dc8: 687b ldr r3, [r7, #4] 8008dca: 681b ldr r3, [r3, #0] 8008dcc: 69db ldr r3, [r3, #28] 8008dce: f8c7 30e4 str.w r3, [r7, #228] @ 0xe4 uint32_t cr1its = READ_REG(huart->Instance->CR1); 8008dd2: 687b ldr r3, [r7, #4] 8008dd4: 681b ldr r3, [r3, #0] 8008dd6: 681b ldr r3, [r3, #0] 8008dd8: f8c7 30e0 str.w r3, [r7, #224] @ 0xe0 uint32_t cr3its = READ_REG(huart->Instance->CR3); 8008ddc: 687b ldr r3, [r7, #4] 8008dde: 681b ldr r3, [r3, #0] 8008de0: 689b ldr r3, [r3, #8] 8008de2: f8c7 30dc str.w r3, [r7, #220] @ 0xdc uint32_t errorflags; uint32_t errorcode; /* If no error occurs */ errorflags = (isrflags & (uint32_t)(USART_ISR_PE | USART_ISR_FE | USART_ISR_ORE | USART_ISR_NE | USART_ISR_RTOF)); 8008de6: f8d7 20e4 ldr.w r2, [r7, #228] @ 0xe4 8008dea: f640 030f movw r3, #2063 @ 0x80f 8008dee: 4013 ands r3, r2 8008df0: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8 if (errorflags == 0U) 8008df4: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8 8008df8: 2b00 cmp r3, #0 8008dfa: d115 bne.n 8008e28 #if defined(USART_CR1_FIFOEN) if (((isrflags & USART_ISR_RXNE_RXFNE) != 0U) && (((cr1its & USART_CR1_RXNEIE_RXFNEIE) != 0U) || ((cr3its & USART_CR3_RXFTIE) != 0U))) #else if (((isrflags & USART_ISR_RXNE) != 0U) 8008dfc: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 8008e00: f003 0320 and.w r3, r3, #32 8008e04: 2b00 cmp r3, #0 8008e06: d00f beq.n 8008e28 && ((cr1its & USART_CR1_RXNEIE) != 0U)) 8008e08: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 8008e0c: f003 0320 and.w r3, r3, #32 8008e10: 2b00 cmp r3, #0 8008e12: d009 beq.n 8008e28 #endif /* USART_CR1_FIFOEN */ { if (huart->RxISR != NULL) 8008e14: 687b ldr r3, [r7, #4] 8008e16: 6e9b ldr r3, [r3, #104] @ 0x68 8008e18: 2b00 cmp r3, #0 8008e1a: f000 82ca beq.w 80093b2 { huart->RxISR(huart); 8008e1e: 687b ldr r3, [r7, #4] 8008e20: 6e9b ldr r3, [r3, #104] @ 0x68 8008e22: 6878 ldr r0, [r7, #4] 8008e24: 4798 blx r3 } return; 8008e26: e2c4 b.n 80093b2 #if defined(USART_CR1_FIFOEN) if ((errorflags != 0U) && ((((cr3its & (USART_CR3_RXFTIE | USART_CR3_EIE)) != 0U) || ((cr1its & (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE | USART_CR1_RTOIE)) != 0U)))) #else if ((errorflags != 0U) 8008e28: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8 8008e2c: 2b00 cmp r3, #0 8008e2e: f000 8117 beq.w 8009060 && (((cr3its & USART_CR3_EIE) != 0U) 8008e32: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc 8008e36: f003 0301 and.w r3, r3, #1 8008e3a: 2b00 cmp r3, #0 8008e3c: d106 bne.n 8008e4c || ((cr1its & (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_RTOIE)) != 0U))) 8008e3e: f8d7 20e0 ldr.w r2, [r7, #224] @ 0xe0 8008e42: 4b85 ldr r3, [pc, #532] @ (8009058 ) 8008e44: 4013 ands r3, r2 8008e46: 2b00 cmp r3, #0 8008e48: f000 810a beq.w 8009060 #endif /* USART_CR1_FIFOEN */ { /* UART parity error interrupt occurred -------------------------------------*/ if (((isrflags & USART_ISR_PE) != 0U) && ((cr1its & USART_CR1_PEIE) != 0U)) 8008e4c: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 8008e50: f003 0301 and.w r3, r3, #1 8008e54: 2b00 cmp r3, #0 8008e56: d011 beq.n 8008e7c 8008e58: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 8008e5c: f403 7380 and.w r3, r3, #256 @ 0x100 8008e60: 2b00 cmp r3, #0 8008e62: d00b beq.n 8008e7c { __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_PEF); 8008e64: 687b ldr r3, [r7, #4] 8008e66: 681b ldr r3, [r3, #0] 8008e68: 2201 movs r2, #1 8008e6a: 621a str r2, [r3, #32] huart->ErrorCode |= HAL_UART_ERROR_PE; 8008e6c: 687b ldr r3, [r7, #4] 8008e6e: f8d3 3084 ldr.w r3, [r3, #132] @ 0x84 8008e72: f043 0201 orr.w r2, r3, #1 8008e76: 687b ldr r3, [r7, #4] 8008e78: f8c3 2084 str.w r2, [r3, #132] @ 0x84 } /* UART frame error interrupt occurred --------------------------------------*/ if (((isrflags & USART_ISR_FE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U)) 8008e7c: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 8008e80: f003 0302 and.w r3, r3, #2 8008e84: 2b00 cmp r3, #0 8008e86: d011 beq.n 8008eac 8008e88: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc 8008e8c: f003 0301 and.w r3, r3, #1 8008e90: 2b00 cmp r3, #0 8008e92: d00b beq.n 8008eac { __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_FEF); 8008e94: 687b ldr r3, [r7, #4] 8008e96: 681b ldr r3, [r3, #0] 8008e98: 2202 movs r2, #2 8008e9a: 621a str r2, [r3, #32] huart->ErrorCode |= HAL_UART_ERROR_FE; 8008e9c: 687b ldr r3, [r7, #4] 8008e9e: f8d3 3084 ldr.w r3, [r3, #132] @ 0x84 8008ea2: f043 0204 orr.w r2, r3, #4 8008ea6: 687b ldr r3, [r7, #4] 8008ea8: f8c3 2084 str.w r2, [r3, #132] @ 0x84 } /* UART noise error interrupt occurred --------------------------------------*/ if (((isrflags & USART_ISR_NE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U)) 8008eac: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 8008eb0: f003 0304 and.w r3, r3, #4 8008eb4: 2b00 cmp r3, #0 8008eb6: d011 beq.n 8008edc 8008eb8: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc 8008ebc: f003 0301 and.w r3, r3, #1 8008ec0: 2b00 cmp r3, #0 8008ec2: d00b beq.n 8008edc { __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_NEF); 8008ec4: 687b ldr r3, [r7, #4] 8008ec6: 681b ldr r3, [r3, #0] 8008ec8: 2204 movs r2, #4 8008eca: 621a str r2, [r3, #32] huart->ErrorCode |= HAL_UART_ERROR_NE; 8008ecc: 687b ldr r3, [r7, #4] 8008ece: f8d3 3084 ldr.w r3, [r3, #132] @ 0x84 8008ed2: f043 0202 orr.w r2, r3, #2 8008ed6: 687b ldr r3, [r7, #4] 8008ed8: f8c3 2084 str.w r2, [r3, #132] @ 0x84 #if defined(USART_CR1_FIFOEN) if (((isrflags & USART_ISR_ORE) != 0U) && (((cr1its & USART_CR1_RXNEIE_RXFNEIE) != 0U) || ((cr3its & (USART_CR3_RXFTIE | USART_CR3_EIE)) != 0U))) #else if (((isrflags & USART_ISR_ORE) != 0U) 8008edc: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 8008ee0: f003 0308 and.w r3, r3, #8 8008ee4: 2b00 cmp r3, #0 8008ee6: d017 beq.n 8008f18 && (((cr1its & USART_CR1_RXNEIE) != 0U) || 8008ee8: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 8008eec: f003 0320 and.w r3, r3, #32 8008ef0: 2b00 cmp r3, #0 8008ef2: d105 bne.n 8008f00 ((cr3its & USART_CR3_EIE) != 0U))) 8008ef4: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc 8008ef8: f003 0301 and.w r3, r3, #1 && (((cr1its & USART_CR1_RXNEIE) != 0U) || 8008efc: 2b00 cmp r3, #0 8008efe: d00b beq.n 8008f18 #endif /* USART_CR1_FIFOEN */ { __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF); 8008f00: 687b ldr r3, [r7, #4] 8008f02: 681b ldr r3, [r3, #0] 8008f04: 2208 movs r2, #8 8008f06: 621a str r2, [r3, #32] huart->ErrorCode |= HAL_UART_ERROR_ORE; 8008f08: 687b ldr r3, [r7, #4] 8008f0a: f8d3 3084 ldr.w r3, [r3, #132] @ 0x84 8008f0e: f043 0208 orr.w r2, r3, #8 8008f12: 687b ldr r3, [r7, #4] 8008f14: f8c3 2084 str.w r2, [r3, #132] @ 0x84 } /* UART Receiver Timeout interrupt occurred ---------------------------------*/ if (((isrflags & USART_ISR_RTOF) != 0U) && ((cr1its & USART_CR1_RTOIE) != 0U)) 8008f18: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 8008f1c: f403 6300 and.w r3, r3, #2048 @ 0x800 8008f20: 2b00 cmp r3, #0 8008f22: d012 beq.n 8008f4a 8008f24: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 8008f28: f003 6380 and.w r3, r3, #67108864 @ 0x4000000 8008f2c: 2b00 cmp r3, #0 8008f2e: d00c beq.n 8008f4a { __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_RTOF); 8008f30: 687b ldr r3, [r7, #4] 8008f32: 681b ldr r3, [r3, #0] 8008f34: f44f 6200 mov.w r2, #2048 @ 0x800 8008f38: 621a str r2, [r3, #32] huart->ErrorCode |= HAL_UART_ERROR_RTO; 8008f3a: 687b ldr r3, [r7, #4] 8008f3c: f8d3 3084 ldr.w r3, [r3, #132] @ 0x84 8008f40: f043 0220 orr.w r2, r3, #32 8008f44: 687b ldr r3, [r7, #4] 8008f46: f8c3 2084 str.w r2, [r3, #132] @ 0x84 } /* Call UART Error Call back function if need be ----------------------------*/ if (huart->ErrorCode != HAL_UART_ERROR_NONE) 8008f4a: 687b ldr r3, [r7, #4] 8008f4c: f8d3 3084 ldr.w r3, [r3, #132] @ 0x84 8008f50: 2b00 cmp r3, #0 8008f52: f000 8230 beq.w 80093b6 #if defined(USART_CR1_FIFOEN) if (((isrflags & USART_ISR_RXNE_RXFNE) != 0U) && (((cr1its & USART_CR1_RXNEIE_RXFNEIE) != 0U) || ((cr3its & USART_CR3_RXFTIE) != 0U))) #else if (((isrflags & USART_ISR_RXNE) != 0U) 8008f56: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 8008f5a: f003 0320 and.w r3, r3, #32 8008f5e: 2b00 cmp r3, #0 8008f60: d00d beq.n 8008f7e && ((cr1its & USART_CR1_RXNEIE) != 0U)) 8008f62: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 8008f66: f003 0320 and.w r3, r3, #32 8008f6a: 2b00 cmp r3, #0 8008f6c: d007 beq.n 8008f7e #endif /* USART_CR1_FIFOEN */ { if (huart->RxISR != NULL) 8008f6e: 687b ldr r3, [r7, #4] 8008f70: 6e9b ldr r3, [r3, #104] @ 0x68 8008f72: 2b00 cmp r3, #0 8008f74: d003 beq.n 8008f7e { huart->RxISR(huart); 8008f76: 687b ldr r3, [r7, #4] 8008f78: 6e9b ldr r3, [r3, #104] @ 0x68 8008f7a: 6878 ldr r0, [r7, #4] 8008f7c: 4798 blx r3 /* If Error is to be considered as blocking : - Receiver Timeout error in Reception - Overrun error in Reception - any error occurs in DMA mode reception */ errorcode = huart->ErrorCode; 8008f7e: 687b ldr r3, [r7, #4] 8008f80: f8d3 3084 ldr.w r3, [r3, #132] @ 0x84 8008f84: f8c7 30d4 str.w r3, [r7, #212] @ 0xd4 if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) || 8008f88: 687b ldr r3, [r7, #4] 8008f8a: 681b ldr r3, [r3, #0] 8008f8c: 689b ldr r3, [r3, #8] 8008f8e: f003 0340 and.w r3, r3, #64 @ 0x40 8008f92: 2b40 cmp r3, #64 @ 0x40 8008f94: d005 beq.n 8008fa2 ((errorcode & (HAL_UART_ERROR_RTO | HAL_UART_ERROR_ORE)) != 0U)) 8008f96: f8d7 30d4 ldr.w r3, [r7, #212] @ 0xd4 8008f9a: f003 0328 and.w r3, r3, #40 @ 0x28 if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) || 8008f9e: 2b00 cmp r3, #0 8008fa0: d04f beq.n 8009042 { /* Blocking error : transfer is aborted Set the UART state ready to be able to start again the process, Disable Rx Interrupts, and disable Rx DMA request, if ongoing */ UART_EndRxTransfer(huart); 8008fa2: 6878 ldr r0, [r7, #4] 8008fa4: f000 fe97 bl 8009cd6 /* Abort the UART DMA Rx channel if enabled */ if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) 8008fa8: 687b ldr r3, [r7, #4] 8008faa: 681b ldr r3, [r3, #0] 8008fac: 689b ldr r3, [r3, #8] 8008fae: f003 0340 and.w r3, r3, #64 @ 0x40 8008fb2: 2b40 cmp r3, #64 @ 0x40 8008fb4: d141 bne.n 800903a { /* Disable the UART DMA Rx request if enabled */ ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); 8008fb6: 687b ldr r3, [r7, #4] 8008fb8: 681b ldr r3, [r3, #0] 8008fba: 3308 adds r3, #8 8008fbc: f8c7 309c str.w r3, [r7, #156] @ 0x9c __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 8008fc0: f8d7 309c ldr.w r3, [r7, #156] @ 0x9c 8008fc4: e853 3f00 ldrex r3, [r3] 8008fc8: f8c7 3098 str.w r3, [r7, #152] @ 0x98 return(result); 8008fcc: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98 8008fd0: f023 0340 bic.w r3, r3, #64 @ 0x40 8008fd4: f8c7 30d0 str.w r3, [r7, #208] @ 0xd0 8008fd8: 687b ldr r3, [r7, #4] 8008fda: 681b ldr r3, [r3, #0] 8008fdc: 3308 adds r3, #8 8008fde: f8d7 20d0 ldr.w r2, [r7, #208] @ 0xd0 8008fe2: f8c7 20a8 str.w r2, [r7, #168] @ 0xa8 8008fe6: f8c7 30a4 str.w r3, [r7, #164] @ 0xa4 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 8008fea: f8d7 10a4 ldr.w r1, [r7, #164] @ 0xa4 8008fee: f8d7 20a8 ldr.w r2, [r7, #168] @ 0xa8 8008ff2: e841 2300 strex r3, r2, [r1] 8008ff6: f8c7 30a0 str.w r3, [r7, #160] @ 0xa0 return(result); 8008ffa: f8d7 30a0 ldr.w r3, [r7, #160] @ 0xa0 8008ffe: 2b00 cmp r3, #0 8009000: d1d9 bne.n 8008fb6 /* Abort the UART DMA Rx channel */ if (huart->hdmarx != NULL) 8009002: 687b ldr r3, [r7, #4] 8009004: 6f5b ldr r3, [r3, #116] @ 0x74 8009006: 2b00 cmp r3, #0 8009008: d013 beq.n 8009032 { /* Set the UART DMA Abort callback : will lead to call HAL_UART_ErrorCallback() at end of DMA abort procedure */ huart->hdmarx->XferAbortCallback = UART_DMAAbortOnError; 800900a: 687b ldr r3, [r7, #4] 800900c: 6f5b ldr r3, [r3, #116] @ 0x74 800900e: 4a13 ldr r2, [pc, #76] @ (800905c ) 8009010: 639a str r2, [r3, #56] @ 0x38 /* Abort DMA RX */ if (HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK) 8009012: 687b ldr r3, [r7, #4] 8009014: 6f5b ldr r3, [r3, #116] @ 0x74 8009016: 4618 mov r0, r3 8009018: f7fb f87a bl 8004110 800901c: 4603 mov r3, r0 800901e: 2b00 cmp r3, #0 8009020: d017 beq.n 8009052 { /* Call Directly huart->hdmarx->XferAbortCallback function in case of error */ huart->hdmarx->XferAbortCallback(huart->hdmarx); 8009022: 687b ldr r3, [r7, #4] 8009024: 6f5b ldr r3, [r3, #116] @ 0x74 8009026: 6b9b ldr r3, [r3, #56] @ 0x38 8009028: 687a ldr r2, [r7, #4] 800902a: 6f52 ldr r2, [r2, #116] @ 0x74 800902c: 4610 mov r0, r2 800902e: 4798 blx r3 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) 8009030: e00f b.n 8009052 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered error callback*/ huart->ErrorCallback(huart); #else /*Call legacy weak error callback*/ HAL_UART_ErrorCallback(huart); 8009032: 6878 ldr r0, [r7, #4] 8009034: f000 f9ca bl 80093cc if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) 8009038: e00b b.n 8009052 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered error callback*/ huart->ErrorCallback(huart); #else /*Call legacy weak error callback*/ HAL_UART_ErrorCallback(huart); 800903a: 6878 ldr r0, [r7, #4] 800903c: f000 f9c6 bl 80093cc if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) 8009040: e007 b.n 8009052 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered error callback*/ huart->ErrorCallback(huart); #else /*Call legacy weak error callback*/ HAL_UART_ErrorCallback(huart); 8009042: 6878 ldr r0, [r7, #4] 8009044: f000 f9c2 bl 80093cc #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ huart->ErrorCode = HAL_UART_ERROR_NONE; 8009048: 687b ldr r3, [r7, #4] 800904a: 2200 movs r2, #0 800904c: f8c3 2084 str.w r2, [r3, #132] @ 0x84 } } return; 8009050: e1b1 b.n 80093b6 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) 8009052: bf00 nop return; 8009054: e1af b.n 80093b6 8009056: bf00 nop 8009058: 04000120 .word 0x04000120 800905c: 08009d9f .word 0x08009d9f } /* End if some error occurs */ /* Check current reception Mode : If Reception till IDLE event has been selected : */ if ((huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) 8009060: 687b ldr r3, [r7, #4] 8009062: 6e1b ldr r3, [r3, #96] @ 0x60 8009064: 2b01 cmp r3, #1 8009066: f040 816a bne.w 800933e && ((isrflags & USART_ISR_IDLE) != 0U) 800906a: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 800906e: f003 0310 and.w r3, r3, #16 8009072: 2b00 cmp r3, #0 8009074: f000 8163 beq.w 800933e && ((cr1its & USART_ISR_IDLE) != 0U)) 8009078: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 800907c: f003 0310 and.w r3, r3, #16 8009080: 2b00 cmp r3, #0 8009082: f000 815c beq.w 800933e { __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF); 8009086: 687b ldr r3, [r7, #4] 8009088: 681b ldr r3, [r3, #0] 800908a: 2210 movs r2, #16 800908c: 621a str r2, [r3, #32] /* Check if DMA mode is enabled in UART */ if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) 800908e: 687b ldr r3, [r7, #4] 8009090: 681b ldr r3, [r3, #0] 8009092: 689b ldr r3, [r3, #8] 8009094: f003 0340 and.w r3, r3, #64 @ 0x40 8009098: 2b40 cmp r3, #64 @ 0x40 800909a: f040 80d4 bne.w 8009246 { /* DMA mode enabled */ /* Check received length : If all expected data are received, do nothing, (DMA cplt callback will be called). Otherwise, if at least one data has already been received, IDLE event is to be notified to user */ uint16_t nb_remaining_rx_data = (uint16_t) __HAL_DMA_GET_COUNTER(huart->hdmarx); 800909e: 687b ldr r3, [r7, #4] 80090a0: 6f5b ldr r3, [r3, #116] @ 0x74 80090a2: 681b ldr r3, [r3, #0] 80090a4: 685b ldr r3, [r3, #4] 80090a6: f8a7 30be strh.w r3, [r7, #190] @ 0xbe if ((nb_remaining_rx_data > 0U) 80090aa: f8b7 30be ldrh.w r3, [r7, #190] @ 0xbe 80090ae: 2b00 cmp r3, #0 80090b0: f000 80ad beq.w 800920e && (nb_remaining_rx_data < huart->RxXferSize)) 80090b4: 687b ldr r3, [r7, #4] 80090b6: f8b3 3058 ldrh.w r3, [r3, #88] @ 0x58 80090ba: f8b7 20be ldrh.w r2, [r7, #190] @ 0xbe 80090be: 429a cmp r2, r3 80090c0: f080 80a5 bcs.w 800920e { /* Reception is not complete */ huart->RxXferCount = nb_remaining_rx_data; 80090c4: 687b ldr r3, [r7, #4] 80090c6: f8b7 20be ldrh.w r2, [r7, #190] @ 0xbe 80090ca: f8a3 205a strh.w r2, [r3, #90] @ 0x5a /* In Normal mode, end DMA xfer and HAL UART Rx process*/ if (HAL_IS_BIT_CLR(huart->hdmarx->Instance->CCR, DMA_CCR_CIRC)) 80090ce: 687b ldr r3, [r7, #4] 80090d0: 6f5b ldr r3, [r3, #116] @ 0x74 80090d2: 681b ldr r3, [r3, #0] 80090d4: 681b ldr r3, [r3, #0] 80090d6: f003 0320 and.w r3, r3, #32 80090da: 2b00 cmp r3, #0 80090dc: f040 8086 bne.w 80091ec { /* Disable PE and ERR (Frame error, noise error, overrun error) interrupts */ ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE); 80090e0: 687b ldr r3, [r7, #4] 80090e2: 681b ldr r3, [r3, #0] 80090e4: f8c7 3088 str.w r3, [r7, #136] @ 0x88 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 80090e8: f8d7 3088 ldr.w r3, [r7, #136] @ 0x88 80090ec: e853 3f00 ldrex r3, [r3] 80090f0: f8c7 3084 str.w r3, [r7, #132] @ 0x84 return(result); 80090f4: f8d7 3084 ldr.w r3, [r7, #132] @ 0x84 80090f8: f423 7380 bic.w r3, r3, #256 @ 0x100 80090fc: f8c7 30b8 str.w r3, [r7, #184] @ 0xb8 8009100: 687b ldr r3, [r7, #4] 8009102: 681b ldr r3, [r3, #0] 8009104: 461a mov r2, r3 8009106: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8 800910a: f8c7 3094 str.w r3, [r7, #148] @ 0x94 800910e: f8c7 2090 str.w r2, [r7, #144] @ 0x90 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 8009112: f8d7 1090 ldr.w r1, [r7, #144] @ 0x90 8009116: f8d7 2094 ldr.w r2, [r7, #148] @ 0x94 800911a: e841 2300 strex r3, r2, [r1] 800911e: f8c7 308c str.w r3, [r7, #140] @ 0x8c return(result); 8009122: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c 8009126: 2b00 cmp r3, #0 8009128: d1da bne.n 80090e0 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); 800912a: 687b ldr r3, [r7, #4] 800912c: 681b ldr r3, [r3, #0] 800912e: 3308 adds r3, #8 8009130: 677b str r3, [r7, #116] @ 0x74 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 8009132: 6f7b ldr r3, [r7, #116] @ 0x74 8009134: e853 3f00 ldrex r3, [r3] 8009138: 673b str r3, [r7, #112] @ 0x70 return(result); 800913a: 6f3b ldr r3, [r7, #112] @ 0x70 800913c: f023 0301 bic.w r3, r3, #1 8009140: f8c7 30b4 str.w r3, [r7, #180] @ 0xb4 8009144: 687b ldr r3, [r7, #4] 8009146: 681b ldr r3, [r3, #0] 8009148: 3308 adds r3, #8 800914a: f8d7 20b4 ldr.w r2, [r7, #180] @ 0xb4 800914e: f8c7 2080 str.w r2, [r7, #128] @ 0x80 8009152: 67fb str r3, [r7, #124] @ 0x7c __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 8009154: 6ff9 ldr r1, [r7, #124] @ 0x7c 8009156: f8d7 2080 ldr.w r2, [r7, #128] @ 0x80 800915a: e841 2300 strex r3, r2, [r1] 800915e: 67bb str r3, [r7, #120] @ 0x78 return(result); 8009160: 6fbb ldr r3, [r7, #120] @ 0x78 8009162: 2b00 cmp r3, #0 8009164: d1e1 bne.n 800912a /* Disable the DMA transfer for the receiver request by resetting the DMAR bit in the UART CR3 register */ ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); 8009166: 687b ldr r3, [r7, #4] 8009168: 681b ldr r3, [r3, #0] 800916a: 3308 adds r3, #8 800916c: 663b str r3, [r7, #96] @ 0x60 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 800916e: 6e3b ldr r3, [r7, #96] @ 0x60 8009170: e853 3f00 ldrex r3, [r3] 8009174: 65fb str r3, [r7, #92] @ 0x5c return(result); 8009176: 6dfb ldr r3, [r7, #92] @ 0x5c 8009178: f023 0340 bic.w r3, r3, #64 @ 0x40 800917c: f8c7 30b0 str.w r3, [r7, #176] @ 0xb0 8009180: 687b ldr r3, [r7, #4] 8009182: 681b ldr r3, [r3, #0] 8009184: 3308 adds r3, #8 8009186: f8d7 20b0 ldr.w r2, [r7, #176] @ 0xb0 800918a: 66fa str r2, [r7, #108] @ 0x6c 800918c: 66bb str r3, [r7, #104] @ 0x68 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 800918e: 6eb9 ldr r1, [r7, #104] @ 0x68 8009190: 6efa ldr r2, [r7, #108] @ 0x6c 8009192: e841 2300 strex r3, r2, [r1] 8009196: 667b str r3, [r7, #100] @ 0x64 return(result); 8009198: 6e7b ldr r3, [r7, #100] @ 0x64 800919a: 2b00 cmp r3, #0 800919c: d1e3 bne.n 8009166 /* At end of Rx process, restore huart->RxState to Ready */ huart->RxState = HAL_UART_STATE_READY; 800919e: 687b ldr r3, [r7, #4] 80091a0: 2220 movs r2, #32 80091a2: f8c3 2080 str.w r2, [r3, #128] @ 0x80 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; 80091a6: 687b ldr r3, [r7, #4] 80091a8: 2200 movs r2, #0 80091aa: 661a str r2, [r3, #96] @ 0x60 ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); 80091ac: 687b ldr r3, [r7, #4] 80091ae: 681b ldr r3, [r3, #0] 80091b0: 64fb str r3, [r7, #76] @ 0x4c __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 80091b2: 6cfb ldr r3, [r7, #76] @ 0x4c 80091b4: e853 3f00 ldrex r3, [r3] 80091b8: 64bb str r3, [r7, #72] @ 0x48 return(result); 80091ba: 6cbb ldr r3, [r7, #72] @ 0x48 80091bc: f023 0310 bic.w r3, r3, #16 80091c0: f8c7 30ac str.w r3, [r7, #172] @ 0xac 80091c4: 687b ldr r3, [r7, #4] 80091c6: 681b ldr r3, [r3, #0] 80091c8: 461a mov r2, r3 80091ca: f8d7 30ac ldr.w r3, [r7, #172] @ 0xac 80091ce: 65bb str r3, [r7, #88] @ 0x58 80091d0: 657a str r2, [r7, #84] @ 0x54 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 80091d2: 6d79 ldr r1, [r7, #84] @ 0x54 80091d4: 6dba ldr r2, [r7, #88] @ 0x58 80091d6: e841 2300 strex r3, r2, [r1] 80091da: 653b str r3, [r7, #80] @ 0x50 return(result); 80091dc: 6d3b ldr r3, [r7, #80] @ 0x50 80091de: 2b00 cmp r3, #0 80091e0: d1e4 bne.n 80091ac /* Last bytes received, so no need as the abort is immediate */ (void)HAL_DMA_Abort(huart->hdmarx); 80091e2: 687b ldr r3, [r7, #4] 80091e4: 6f5b ldr r3, [r3, #116] @ 0x74 80091e6: 4618 mov r0, r3 80091e8: f7fa ff54 bl 8004094 } /* Initialize type of RxEvent that correspond to RxEvent callback execution; In this case, Rx Event type is Idle Event */ huart->RxEventType = HAL_UART_RXEVENT_IDLE; 80091ec: 687b ldr r3, [r7, #4] 80091ee: 2202 movs r2, #2 80091f0: 665a str r2, [r3, #100] @ 0x64 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered Rx Event callback*/ huart->RxEventCallback(huart, (huart->RxXferSize - huart->RxXferCount)); #else /*Call legacy weak Rx Event callback*/ HAL_UARTEx_RxEventCallback(huart, (huart->RxXferSize - huart->RxXferCount)); 80091f2: 687b ldr r3, [r7, #4] 80091f4: f8b3 2058 ldrh.w r2, [r3, #88] @ 0x58 80091f8: 687b ldr r3, [r7, #4] 80091fa: f8b3 305a ldrh.w r3, [r3, #90] @ 0x5a 80091fe: b29b uxth r3, r3 8009200: 1ad3 subs r3, r2, r3 8009202: b29b uxth r3, r3 8009204: 4619 mov r1, r3 8009206: 6878 ldr r0, [r7, #4] 8009208: f000 f8ea bl 80093e0 HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize); #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ } } } return; 800920c: e0d5 b.n 80093ba if (nb_remaining_rx_data == huart->RxXferSize) 800920e: 687b ldr r3, [r7, #4] 8009210: f8b3 3058 ldrh.w r3, [r3, #88] @ 0x58 8009214: f8b7 20be ldrh.w r2, [r7, #190] @ 0xbe 8009218: 429a cmp r2, r3 800921a: f040 80ce bne.w 80093ba if (HAL_IS_BIT_SET(huart->hdmarx->Instance->CCR, DMA_CCR_CIRC)) 800921e: 687b ldr r3, [r7, #4] 8009220: 6f5b ldr r3, [r3, #116] @ 0x74 8009222: 681b ldr r3, [r3, #0] 8009224: 681b ldr r3, [r3, #0] 8009226: f003 0320 and.w r3, r3, #32 800922a: 2b20 cmp r3, #32 800922c: f040 80c5 bne.w 80093ba huart->RxEventType = HAL_UART_RXEVENT_IDLE; 8009230: 687b ldr r3, [r7, #4] 8009232: 2202 movs r2, #2 8009234: 665a str r2, [r3, #100] @ 0x64 HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize); 8009236: 687b ldr r3, [r7, #4] 8009238: f8b3 3058 ldrh.w r3, [r3, #88] @ 0x58 800923c: 4619 mov r1, r3 800923e: 6878 ldr r0, [r7, #4] 8009240: f000 f8ce bl 80093e0 return; 8009244: e0b9 b.n 80093ba else { /* DMA mode not enabled */ /* Check received length : If all expected data are received, do nothing. Otherwise, if at least one data has already been received, IDLE event is to be notified to user */ uint16_t nb_rx_data = huart->RxXferSize - huart->RxXferCount; 8009246: 687b ldr r3, [r7, #4] 8009248: f8b3 2058 ldrh.w r2, [r3, #88] @ 0x58 800924c: 687b ldr r3, [r7, #4] 800924e: f8b3 305a ldrh.w r3, [r3, #90] @ 0x5a 8009252: b29b uxth r3, r3 8009254: 1ad3 subs r3, r2, r3 8009256: f8a7 30ce strh.w r3, [r7, #206] @ 0xce if ((huart->RxXferCount > 0U) 800925a: 687b ldr r3, [r7, #4] 800925c: f8b3 305a ldrh.w r3, [r3, #90] @ 0x5a 8009260: b29b uxth r3, r3 8009262: 2b00 cmp r3, #0 8009264: f000 80ab beq.w 80093be && (nb_rx_data > 0U)) 8009268: f8b7 30ce ldrh.w r3, [r7, #206] @ 0xce 800926c: 2b00 cmp r3, #0 800926e: f000 80a6 beq.w 80093be /* Disable the UART Error Interrupt:(Frame error, noise error, overrun error) and RX FIFO Threshold interrupt */ ATOMIC_CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE)); #else /* Disable the UART Parity Error Interrupt and RXNE interrupts */ ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE)); 8009272: 687b ldr r3, [r7, #4] 8009274: 681b ldr r3, [r3, #0] 8009276: 63bb str r3, [r7, #56] @ 0x38 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 8009278: 6bbb ldr r3, [r7, #56] @ 0x38 800927a: e853 3f00 ldrex r3, [r3] 800927e: 637b str r3, [r7, #52] @ 0x34 return(result); 8009280: 6b7b ldr r3, [r7, #52] @ 0x34 8009282: f423 7390 bic.w r3, r3, #288 @ 0x120 8009286: f8c7 30c8 str.w r3, [r7, #200] @ 0xc8 800928a: 687b ldr r3, [r7, #4] 800928c: 681b ldr r3, [r3, #0] 800928e: 461a mov r2, r3 8009290: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8 8009294: 647b str r3, [r7, #68] @ 0x44 8009296: 643a str r2, [r7, #64] @ 0x40 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 8009298: 6c39 ldr r1, [r7, #64] @ 0x40 800929a: 6c7a ldr r2, [r7, #68] @ 0x44 800929c: e841 2300 strex r3, r2, [r1] 80092a0: 63fb str r3, [r7, #60] @ 0x3c return(result); 80092a2: 6bfb ldr r3, [r7, #60] @ 0x3c 80092a4: 2b00 cmp r3, #0 80092a6: d1e4 bne.n 8009272 /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */ ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); 80092a8: 687b ldr r3, [r7, #4] 80092aa: 681b ldr r3, [r3, #0] 80092ac: 3308 adds r3, #8 80092ae: 627b str r3, [r7, #36] @ 0x24 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 80092b0: 6a7b ldr r3, [r7, #36] @ 0x24 80092b2: e853 3f00 ldrex r3, [r3] 80092b6: 623b str r3, [r7, #32] return(result); 80092b8: 6a3b ldr r3, [r7, #32] 80092ba: f023 0301 bic.w r3, r3, #1 80092be: f8c7 30c4 str.w r3, [r7, #196] @ 0xc4 80092c2: 687b ldr r3, [r7, #4] 80092c4: 681b ldr r3, [r3, #0] 80092c6: 3308 adds r3, #8 80092c8: f8d7 20c4 ldr.w r2, [r7, #196] @ 0xc4 80092cc: 633a str r2, [r7, #48] @ 0x30 80092ce: 62fb str r3, [r7, #44] @ 0x2c __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 80092d0: 6af9 ldr r1, [r7, #44] @ 0x2c 80092d2: 6b3a ldr r2, [r7, #48] @ 0x30 80092d4: e841 2300 strex r3, r2, [r1] 80092d8: 62bb str r3, [r7, #40] @ 0x28 return(result); 80092da: 6abb ldr r3, [r7, #40] @ 0x28 80092dc: 2b00 cmp r3, #0 80092de: d1e3 bne.n 80092a8 #endif /* USART_CR1_FIFOEN */ /* Rx process is completed, restore huart->RxState to Ready */ huart->RxState = HAL_UART_STATE_READY; 80092e0: 687b ldr r3, [r7, #4] 80092e2: 2220 movs r2, #32 80092e4: f8c3 2080 str.w r2, [r3, #128] @ 0x80 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; 80092e8: 687b ldr r3, [r7, #4] 80092ea: 2200 movs r2, #0 80092ec: 661a str r2, [r3, #96] @ 0x60 /* Clear RxISR function pointer */ huart->RxISR = NULL; 80092ee: 687b ldr r3, [r7, #4] 80092f0: 2200 movs r2, #0 80092f2: 669a str r2, [r3, #104] @ 0x68 ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); 80092f4: 687b ldr r3, [r7, #4] 80092f6: 681b ldr r3, [r3, #0] 80092f8: 613b str r3, [r7, #16] __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 80092fa: 693b ldr r3, [r7, #16] 80092fc: e853 3f00 ldrex r3, [r3] 8009300: 60fb str r3, [r7, #12] return(result); 8009302: 68fb ldr r3, [r7, #12] 8009304: f023 0310 bic.w r3, r3, #16 8009308: f8c7 30c0 str.w r3, [r7, #192] @ 0xc0 800930c: 687b ldr r3, [r7, #4] 800930e: 681b ldr r3, [r3, #0] 8009310: 461a mov r2, r3 8009312: f8d7 30c0 ldr.w r3, [r7, #192] @ 0xc0 8009316: 61fb str r3, [r7, #28] 8009318: 61ba str r2, [r7, #24] __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 800931a: 69b9 ldr r1, [r7, #24] 800931c: 69fa ldr r2, [r7, #28] 800931e: e841 2300 strex r3, r2, [r1] 8009322: 617b str r3, [r7, #20] return(result); 8009324: 697b ldr r3, [r7, #20] 8009326: 2b00 cmp r3, #0 8009328: d1e4 bne.n 80092f4 /* Initialize type of RxEvent that correspond to RxEvent callback execution; In this case, Rx Event type is Idle Event */ huart->RxEventType = HAL_UART_RXEVENT_IDLE; 800932a: 687b ldr r3, [r7, #4] 800932c: 2202 movs r2, #2 800932e: 665a str r2, [r3, #100] @ 0x64 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered Rx complete callback*/ huart->RxEventCallback(huart, nb_rx_data); #else /*Call legacy weak Rx Event callback*/ HAL_UARTEx_RxEventCallback(huart, nb_rx_data); 8009330: f8b7 30ce ldrh.w r3, [r7, #206] @ 0xce 8009334: 4619 mov r1, r3 8009336: 6878 ldr r0, [r7, #4] 8009338: f000 f852 bl 80093e0 #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ } return; 800933c: e03f b.n 80093be } } /* UART wakeup from Stop mode interrupt occurred ---------------------------*/ if (((isrflags & USART_ISR_WUF) != 0U) && ((cr3its & USART_CR3_WUFIE) != 0U)) 800933e: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 8009342: f403 1380 and.w r3, r3, #1048576 @ 0x100000 8009346: 2b00 cmp r3, #0 8009348: d00e beq.n 8009368 800934a: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc 800934e: f403 0380 and.w r3, r3, #4194304 @ 0x400000 8009352: 2b00 cmp r3, #0 8009354: d008 beq.n 8009368 { __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_WUF); 8009356: 687b ldr r3, [r7, #4] 8009358: 681b ldr r3, [r3, #0] 800935a: f44f 1280 mov.w r2, #1048576 @ 0x100000 800935e: 621a str r2, [r3, #32] #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /* Call registered Wakeup Callback */ huart->WakeupCallback(huart); #else /* Call legacy weak Wakeup Callback */ HAL_UARTEx_WakeupCallback(huart); 8009360: 6878 ldr r0, [r7, #4] 8009362: f000 fe17 bl 8009f94 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ return; 8009366: e02d b.n 80093c4 #if defined(USART_CR1_FIFOEN) if (((isrflags & USART_ISR_TXE_TXFNF) != 0U) && (((cr1its & USART_CR1_TXEIE_TXFNFIE) != 0U) || ((cr3its & USART_CR3_TXFTIE) != 0U))) #else if (((isrflags & USART_ISR_TXE) != 0U) 8009368: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 800936c: f003 0380 and.w r3, r3, #128 @ 0x80 8009370: 2b00 cmp r3, #0 8009372: d00e beq.n 8009392 && ((cr1its & USART_CR1_TXEIE) != 0U)) 8009374: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 8009378: f003 0380 and.w r3, r3, #128 @ 0x80 800937c: 2b00 cmp r3, #0 800937e: d008 beq.n 8009392 #endif /* USART_CR1_FIFOEN */ { if (huart->TxISR != NULL) 8009380: 687b ldr r3, [r7, #4] 8009382: 6edb ldr r3, [r3, #108] @ 0x6c 8009384: 2b00 cmp r3, #0 8009386: d01c beq.n 80093c2 { huart->TxISR(huart); 8009388: 687b ldr r3, [r7, #4] 800938a: 6edb ldr r3, [r3, #108] @ 0x6c 800938c: 6878 ldr r0, [r7, #4] 800938e: 4798 blx r3 } return; 8009390: e017 b.n 80093c2 } /* UART in mode Transmitter (transmission end) -----------------------------*/ if (((isrflags & USART_ISR_TC) != 0U) && ((cr1its & USART_CR1_TCIE) != 0U)) 8009392: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 8009396: f003 0340 and.w r3, r3, #64 @ 0x40 800939a: 2b00 cmp r3, #0 800939c: d012 beq.n 80093c4 800939e: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 80093a2: f003 0340 and.w r3, r3, #64 @ 0x40 80093a6: 2b00 cmp r3, #0 80093a8: d00c beq.n 80093c4 { UART_EndTransmit_IT(huart); 80093aa: 6878 ldr r0, [r7, #4] 80093ac: f000 fdc8 bl 8009f40 return; 80093b0: e008 b.n 80093c4 return; 80093b2: bf00 nop 80093b4: e006 b.n 80093c4 return; 80093b6: bf00 nop 80093b8: e004 b.n 80093c4 return; 80093ba: bf00 nop 80093bc: e002 b.n 80093c4 return; 80093be: bf00 nop 80093c0: e000 b.n 80093c4 return; 80093c2: bf00 nop HAL_UARTEx_RxFifoFullCallback(huart); #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ return; } #endif /* USART_CR1_FIFOEN */ } 80093c4: 37e8 adds r7, #232 @ 0xe8 80093c6: 46bd mov sp, r7 80093c8: bd80 pop {r7, pc} 80093ca: bf00 nop 080093cc : * @brief UART error callback. * @param huart UART handle. * @retval None */ __weak void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart) { 80093cc: b480 push {r7} 80093ce: b083 sub sp, #12 80093d0: af00 add r7, sp, #0 80093d2: 6078 str r0, [r7, #4] UNUSED(huart); /* NOTE : This function should not be modified, when the callback is needed, the HAL_UART_ErrorCallback can be implemented in the user file. */ } 80093d4: bf00 nop 80093d6: 370c adds r7, #12 80093d8: 46bd mov sp, r7 80093da: f85d 7b04 ldr.w r7, [sp], #4 80093de: 4770 bx lr 080093e0 : * @param Size Number of data available in application reception buffer (indicates a position in * reception buffer until which, data are available) * @retval None */ __weak void HAL_UARTEx_RxEventCallback(UART_HandleTypeDef *huart, uint16_t Size) { 80093e0: b480 push {r7} 80093e2: b083 sub sp, #12 80093e4: af00 add r7, sp, #0 80093e6: 6078 str r0, [r7, #4] 80093e8: 460b mov r3, r1 80093ea: 807b strh r3, [r7, #2] UNUSED(Size); /* NOTE : This function should not be modified, when the callback is needed, the HAL_UARTEx_RxEventCallback can be implemented in the user file. */ } 80093ec: bf00 nop 80093ee: 370c adds r7, #12 80093f0: 46bd mov sp, r7 80093f2: f85d 7b04 ldr.w r7, [sp], #4 80093f6: 4770 bx lr 080093f8 : * @brief Configure the UART peripheral. * @param huart UART handle. * @retval HAL status */ HAL_StatusTypeDef UART_SetConfig(UART_HandleTypeDef *huart) { 80093f8: e92d 4fb0 stmdb sp!, {r4, r5, r7, r8, r9, sl, fp, lr} 80093fc: b08a sub sp, #40 @ 0x28 80093fe: af00 add r7, sp, #0 8009400: 60f8 str r0, [r7, #12] uint32_t tmpreg; uint16_t brrtemp; UART_ClockSourceTypeDef clocksource; uint32_t usartdiv; HAL_StatusTypeDef ret = HAL_OK; 8009402: 2300 movs r3, #0 8009404: f887 3022 strb.w r3, [r7, #34] @ 0x22 * the UART Word Length, Parity, Mode and oversampling: * set the M bits according to huart->Init.WordLength value * set PCE and PS bits according to huart->Init.Parity value * set TE and RE bits according to huart->Init.Mode value * set OVER8 bit according to huart->Init.OverSampling value */ tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling ; 8009408: 68fb ldr r3, [r7, #12] 800940a: 689a ldr r2, [r3, #8] 800940c: 68fb ldr r3, [r7, #12] 800940e: 691b ldr r3, [r3, #16] 8009410: 431a orrs r2, r3 8009412: 68fb ldr r3, [r7, #12] 8009414: 695b ldr r3, [r3, #20] 8009416: 431a orrs r2, r3 8009418: 68fb ldr r3, [r7, #12] 800941a: 69db ldr r3, [r3, #28] 800941c: 4313 orrs r3, r2 800941e: 627b str r3, [r7, #36] @ 0x24 MODIFY_REG(huart->Instance->CR1, USART_CR1_FIELDS, tmpreg); 8009420: 68fb ldr r3, [r7, #12] 8009422: 681b ldr r3, [r3, #0] 8009424: 681a ldr r2, [r3, #0] 8009426: 4ba4 ldr r3, [pc, #656] @ (80096b8 ) 8009428: 4013 ands r3, r2 800942a: 68fa ldr r2, [r7, #12] 800942c: 6812 ldr r2, [r2, #0] 800942e: 6a79 ldr r1, [r7, #36] @ 0x24 8009430: 430b orrs r3, r1 8009432: 6013 str r3, [r2, #0] /*-------------------------- USART CR2 Configuration -----------------------*/ /* Configure the UART Stop Bits: Set STOP[13:12] bits according * to huart->Init.StopBits value */ MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits); 8009434: 68fb ldr r3, [r7, #12] 8009436: 681b ldr r3, [r3, #0] 8009438: 685b ldr r3, [r3, #4] 800943a: f423 5140 bic.w r1, r3, #12288 @ 0x3000 800943e: 68fb ldr r3, [r7, #12] 8009440: 68da ldr r2, [r3, #12] 8009442: 68fb ldr r3, [r7, #12] 8009444: 681b ldr r3, [r3, #0] 8009446: 430a orrs r2, r1 8009448: 605a str r2, [r3, #4] /* Configure * - UART HardWare Flow Control: set CTSE and RTSE bits according * to huart->Init.HwFlowCtl value * - one-bit sampling method versus three samples' majority rule according * to huart->Init.OneBitSampling (not applicable to LPUART) */ tmpreg = (uint32_t)huart->Init.HwFlowCtl; 800944a: 68fb ldr r3, [r7, #12] 800944c: 699b ldr r3, [r3, #24] 800944e: 627b str r3, [r7, #36] @ 0x24 if (!(UART_INSTANCE_LOWPOWER(huart))) 8009450: 68fb ldr r3, [r7, #12] 8009452: 681b ldr r3, [r3, #0] 8009454: 4a99 ldr r2, [pc, #612] @ (80096bc ) 8009456: 4293 cmp r3, r2 8009458: d004 beq.n 8009464 { tmpreg |= huart->Init.OneBitSampling; 800945a: 68fb ldr r3, [r7, #12] 800945c: 6a1b ldr r3, [r3, #32] 800945e: 6a7a ldr r2, [r7, #36] @ 0x24 8009460: 4313 orrs r3, r2 8009462: 627b str r3, [r7, #36] @ 0x24 } MODIFY_REG(huart->Instance->CR3, USART_CR3_FIELDS, tmpreg); 8009464: 68fb ldr r3, [r7, #12] 8009466: 681b ldr r3, [r3, #0] 8009468: 689b ldr r3, [r3, #8] 800946a: f423 6130 bic.w r1, r3, #2816 @ 0xb00 800946e: 68fb ldr r3, [r7, #12] 8009470: 681b ldr r3, [r3, #0] 8009472: 6a7a ldr r2, [r7, #36] @ 0x24 8009474: 430a orrs r2, r1 8009476: 609a str r2, [r3, #8] * - UART Clock Prescaler : set PRESCALER according to huart->Init.ClockPrescaler value */ MODIFY_REG(huart->Instance->PRESC, USART_PRESC_PRESCALER, huart->Init.ClockPrescaler); #endif /* USART_PRESC_PRESCALER */ /*-------------------------- USART BRR Configuration -----------------------*/ UART_GETCLOCKSOURCE(huart, clocksource); 8009478: 68fb ldr r3, [r7, #12] 800947a: 681b ldr r3, [r3, #0] 800947c: 4a90 ldr r2, [pc, #576] @ (80096c0 ) 800947e: 4293 cmp r3, r2 8009480: d126 bne.n 80094d0 8009482: 4b90 ldr r3, [pc, #576] @ (80096c4 ) 8009484: f8d3 3088 ldr.w r3, [r3, #136] @ 0x88 8009488: f003 0303 and.w r3, r3, #3 800948c: 2b03 cmp r3, #3 800948e: d81b bhi.n 80094c8 8009490: a201 add r2, pc, #4 @ (adr r2, 8009498 ) 8009492: f852 f023 ldr.w pc, [r2, r3, lsl #2] 8009496: bf00 nop 8009498: 080094a9 .word 0x080094a9 800949c: 080094b9 .word 0x080094b9 80094a0: 080094b1 .word 0x080094b1 80094a4: 080094c1 .word 0x080094c1 80094a8: 2301 movs r3, #1 80094aa: f887 3023 strb.w r3, [r7, #35] @ 0x23 80094ae: e116 b.n 80096de 80094b0: 2302 movs r3, #2 80094b2: f887 3023 strb.w r3, [r7, #35] @ 0x23 80094b6: e112 b.n 80096de 80094b8: 2304 movs r3, #4 80094ba: f887 3023 strb.w r3, [r7, #35] @ 0x23 80094be: e10e b.n 80096de 80094c0: 2308 movs r3, #8 80094c2: f887 3023 strb.w r3, [r7, #35] @ 0x23 80094c6: e10a b.n 80096de 80094c8: 2310 movs r3, #16 80094ca: f887 3023 strb.w r3, [r7, #35] @ 0x23 80094ce: e106 b.n 80096de 80094d0: 68fb ldr r3, [r7, #12] 80094d2: 681b ldr r3, [r3, #0] 80094d4: 4a7c ldr r2, [pc, #496] @ (80096c8 ) 80094d6: 4293 cmp r3, r2 80094d8: d138 bne.n 800954c 80094da: 4b7a ldr r3, [pc, #488] @ (80096c4 ) 80094dc: f8d3 3088 ldr.w r3, [r3, #136] @ 0x88 80094e0: f003 030c and.w r3, r3, #12 80094e4: 2b0c cmp r3, #12 80094e6: d82d bhi.n 8009544 80094e8: a201 add r2, pc, #4 @ (adr r2, 80094f0 ) 80094ea: f852 f023 ldr.w pc, [r2, r3, lsl #2] 80094ee: bf00 nop 80094f0: 08009525 .word 0x08009525 80094f4: 08009545 .word 0x08009545 80094f8: 08009545 .word 0x08009545 80094fc: 08009545 .word 0x08009545 8009500: 08009535 .word 0x08009535 8009504: 08009545 .word 0x08009545 8009508: 08009545 .word 0x08009545 800950c: 08009545 .word 0x08009545 8009510: 0800952d .word 0x0800952d 8009514: 08009545 .word 0x08009545 8009518: 08009545 .word 0x08009545 800951c: 08009545 .word 0x08009545 8009520: 0800953d .word 0x0800953d 8009524: 2300 movs r3, #0 8009526: f887 3023 strb.w r3, [r7, #35] @ 0x23 800952a: e0d8 b.n 80096de 800952c: 2302 movs r3, #2 800952e: f887 3023 strb.w r3, [r7, #35] @ 0x23 8009532: e0d4 b.n 80096de 8009534: 2304 movs r3, #4 8009536: f887 3023 strb.w r3, [r7, #35] @ 0x23 800953a: e0d0 b.n 80096de 800953c: 2308 movs r3, #8 800953e: f887 3023 strb.w r3, [r7, #35] @ 0x23 8009542: e0cc b.n 80096de 8009544: 2310 movs r3, #16 8009546: f887 3023 strb.w r3, [r7, #35] @ 0x23 800954a: e0c8 b.n 80096de 800954c: 68fb ldr r3, [r7, #12] 800954e: 681b ldr r3, [r3, #0] 8009550: 4a5e ldr r2, [pc, #376] @ (80096cc ) 8009552: 4293 cmp r3, r2 8009554: d125 bne.n 80095a2 8009556: 4b5b ldr r3, [pc, #364] @ (80096c4 ) 8009558: f8d3 3088 ldr.w r3, [r3, #136] @ 0x88 800955c: f003 0330 and.w r3, r3, #48 @ 0x30 8009560: 2b30 cmp r3, #48 @ 0x30 8009562: d016 beq.n 8009592 8009564: 2b30 cmp r3, #48 @ 0x30 8009566: d818 bhi.n 800959a 8009568: 2b20 cmp r3, #32 800956a: d00a beq.n 8009582 800956c: 2b20 cmp r3, #32 800956e: d814 bhi.n 800959a 8009570: 2b00 cmp r3, #0 8009572: d002 beq.n 800957a 8009574: 2b10 cmp r3, #16 8009576: d008 beq.n 800958a 8009578: e00f b.n 800959a 800957a: 2300 movs r3, #0 800957c: f887 3023 strb.w r3, [r7, #35] @ 0x23 8009580: e0ad b.n 80096de 8009582: 2302 movs r3, #2 8009584: f887 3023 strb.w r3, [r7, #35] @ 0x23 8009588: e0a9 b.n 80096de 800958a: 2304 movs r3, #4 800958c: f887 3023 strb.w r3, [r7, #35] @ 0x23 8009590: e0a5 b.n 80096de 8009592: 2308 movs r3, #8 8009594: f887 3023 strb.w r3, [r7, #35] @ 0x23 8009598: e0a1 b.n 80096de 800959a: 2310 movs r3, #16 800959c: f887 3023 strb.w r3, [r7, #35] @ 0x23 80095a0: e09d b.n 80096de 80095a2: 68fb ldr r3, [r7, #12] 80095a4: 681b ldr r3, [r3, #0] 80095a6: 4a4a ldr r2, [pc, #296] @ (80096d0 ) 80095a8: 4293 cmp r3, r2 80095aa: d125 bne.n 80095f8 80095ac: 4b45 ldr r3, [pc, #276] @ (80096c4 ) 80095ae: f8d3 3088 ldr.w r3, [r3, #136] @ 0x88 80095b2: f003 03c0 and.w r3, r3, #192 @ 0xc0 80095b6: 2bc0 cmp r3, #192 @ 0xc0 80095b8: d016 beq.n 80095e8 80095ba: 2bc0 cmp r3, #192 @ 0xc0 80095bc: d818 bhi.n 80095f0 80095be: 2b80 cmp r3, #128 @ 0x80 80095c0: d00a beq.n 80095d8 80095c2: 2b80 cmp r3, #128 @ 0x80 80095c4: d814 bhi.n 80095f0 80095c6: 2b00 cmp r3, #0 80095c8: d002 beq.n 80095d0 80095ca: 2b40 cmp r3, #64 @ 0x40 80095cc: d008 beq.n 80095e0 80095ce: e00f b.n 80095f0 80095d0: 2300 movs r3, #0 80095d2: f887 3023 strb.w r3, [r7, #35] @ 0x23 80095d6: e082 b.n 80096de 80095d8: 2302 movs r3, #2 80095da: f887 3023 strb.w r3, [r7, #35] @ 0x23 80095de: e07e b.n 80096de 80095e0: 2304 movs r3, #4 80095e2: f887 3023 strb.w r3, [r7, #35] @ 0x23 80095e6: e07a b.n 80096de 80095e8: 2308 movs r3, #8 80095ea: f887 3023 strb.w r3, [r7, #35] @ 0x23 80095ee: e076 b.n 80096de 80095f0: 2310 movs r3, #16 80095f2: f887 3023 strb.w r3, [r7, #35] @ 0x23 80095f6: e072 b.n 80096de 80095f8: 68fb ldr r3, [r7, #12] 80095fa: 681b ldr r3, [r3, #0] 80095fc: 4a35 ldr r2, [pc, #212] @ (80096d4 ) 80095fe: 4293 cmp r3, r2 8009600: d12a bne.n 8009658 8009602: 4b30 ldr r3, [pc, #192] @ (80096c4 ) 8009604: f8d3 3088 ldr.w r3, [r3, #136] @ 0x88 8009608: f403 7340 and.w r3, r3, #768 @ 0x300 800960c: f5b3 7f40 cmp.w r3, #768 @ 0x300 8009610: d01a beq.n 8009648 8009612: f5b3 7f40 cmp.w r3, #768 @ 0x300 8009616: d81b bhi.n 8009650 8009618: f5b3 7f00 cmp.w r3, #512 @ 0x200 800961c: d00c beq.n 8009638 800961e: f5b3 7f00 cmp.w r3, #512 @ 0x200 8009622: d815 bhi.n 8009650 8009624: 2b00 cmp r3, #0 8009626: d003 beq.n 8009630 8009628: f5b3 7f80 cmp.w r3, #256 @ 0x100 800962c: d008 beq.n 8009640 800962e: e00f b.n 8009650 8009630: 2300 movs r3, #0 8009632: f887 3023 strb.w r3, [r7, #35] @ 0x23 8009636: e052 b.n 80096de 8009638: 2302 movs r3, #2 800963a: f887 3023 strb.w r3, [r7, #35] @ 0x23 800963e: e04e b.n 80096de 8009640: 2304 movs r3, #4 8009642: f887 3023 strb.w r3, [r7, #35] @ 0x23 8009646: e04a b.n 80096de 8009648: 2308 movs r3, #8 800964a: f887 3023 strb.w r3, [r7, #35] @ 0x23 800964e: e046 b.n 80096de 8009650: 2310 movs r3, #16 8009652: f887 3023 strb.w r3, [r7, #35] @ 0x23 8009656: e042 b.n 80096de 8009658: 68fb ldr r3, [r7, #12] 800965a: 681b ldr r3, [r3, #0] 800965c: 4a17 ldr r2, [pc, #92] @ (80096bc ) 800965e: 4293 cmp r3, r2 8009660: d13a bne.n 80096d8 8009662: 4b18 ldr r3, [pc, #96] @ (80096c4 ) 8009664: f8d3 3088 ldr.w r3, [r3, #136] @ 0x88 8009668: f403 6340 and.w r3, r3, #3072 @ 0xc00 800966c: f5b3 6f40 cmp.w r3, #3072 @ 0xc00 8009670: d01a beq.n 80096a8 8009672: f5b3 6f40 cmp.w r3, #3072 @ 0xc00 8009676: d81b bhi.n 80096b0 8009678: f5b3 6f00 cmp.w r3, #2048 @ 0x800 800967c: d00c beq.n 8009698 800967e: f5b3 6f00 cmp.w r3, #2048 @ 0x800 8009682: d815 bhi.n 80096b0 8009684: 2b00 cmp r3, #0 8009686: d003 beq.n 8009690 8009688: f5b3 6f80 cmp.w r3, #1024 @ 0x400 800968c: d008 beq.n 80096a0 800968e: e00f b.n 80096b0 8009690: 2300 movs r3, #0 8009692: f887 3023 strb.w r3, [r7, #35] @ 0x23 8009696: e022 b.n 80096de 8009698: 2302 movs r3, #2 800969a: f887 3023 strb.w r3, [r7, #35] @ 0x23 800969e: e01e b.n 80096de 80096a0: 2304 movs r3, #4 80096a2: f887 3023 strb.w r3, [r7, #35] @ 0x23 80096a6: e01a b.n 80096de 80096a8: 2308 movs r3, #8 80096aa: f887 3023 strb.w r3, [r7, #35] @ 0x23 80096ae: e016 b.n 80096de 80096b0: 2310 movs r3, #16 80096b2: f887 3023 strb.w r3, [r7, #35] @ 0x23 80096b6: e012 b.n 80096de 80096b8: efff69f3 .word 0xefff69f3 80096bc: 40008000 .word 0x40008000 80096c0: 40013800 .word 0x40013800 80096c4: 40021000 .word 0x40021000 80096c8: 40004400 .word 0x40004400 80096cc: 40004800 .word 0x40004800 80096d0: 40004c00 .word 0x40004c00 80096d4: 40005000 .word 0x40005000 80096d8: 2310 movs r3, #16 80096da: f887 3023 strb.w r3, [r7, #35] @ 0x23 /* Check LPUART instance */ if (UART_INSTANCE_LOWPOWER(huart)) 80096de: 68fb ldr r3, [r7, #12] 80096e0: 681b ldr r3, [r3, #0] 80096e2: 4a9f ldr r2, [pc, #636] @ (8009960 ) 80096e4: 4293 cmp r3, r2 80096e6: d17a bne.n 80097de { /* Retrieve frequency clock */ switch (clocksource) 80096e8: f897 3023 ldrb.w r3, [r7, #35] @ 0x23 80096ec: 2b08 cmp r3, #8 80096ee: d824 bhi.n 800973a 80096f0: a201 add r2, pc, #4 @ (adr r2, 80096f8 ) 80096f2: f852 f023 ldr.w pc, [r2, r3, lsl #2] 80096f6: bf00 nop 80096f8: 0800971d .word 0x0800971d 80096fc: 0800973b .word 0x0800973b 8009700: 08009725 .word 0x08009725 8009704: 0800973b .word 0x0800973b 8009708: 0800972b .word 0x0800972b 800970c: 0800973b .word 0x0800973b 8009710: 0800973b .word 0x0800973b 8009714: 0800973b .word 0x0800973b 8009718: 08009733 .word 0x08009733 { case UART_CLOCKSOURCE_PCLK1: pclk = HAL_RCC_GetPCLK1Freq(); 800971c: f7fc fe58 bl 80063d0 8009720: 61f8 str r0, [r7, #28] break; 8009722: e010 b.n 8009746 case UART_CLOCKSOURCE_HSI: pclk = (uint32_t) HSI_VALUE; 8009724: 4b8f ldr r3, [pc, #572] @ (8009964 ) 8009726: 61fb str r3, [r7, #28] break; 8009728: e00d b.n 8009746 case UART_CLOCKSOURCE_SYSCLK: pclk = HAL_RCC_GetSysClockFreq(); 800972a: f7fc fdb9 bl 80062a0 800972e: 61f8 str r0, [r7, #28] break; 8009730: e009 b.n 8009746 case UART_CLOCKSOURCE_LSE: pclk = (uint32_t) LSE_VALUE; 8009732: f44f 4300 mov.w r3, #32768 @ 0x8000 8009736: 61fb str r3, [r7, #28] break; 8009738: e005 b.n 8009746 default: pclk = 0U; 800973a: 2300 movs r3, #0 800973c: 61fb str r3, [r7, #28] ret = HAL_ERROR; 800973e: 2301 movs r3, #1 8009740: f887 3022 strb.w r3, [r7, #34] @ 0x22 break; 8009744: bf00 nop } /* If proper clock source reported */ if (pclk != 0U) 8009746: 69fb ldr r3, [r7, #28] 8009748: 2b00 cmp r3, #0 800974a: f000 80fb beq.w 8009944 } /* if ( (lpuart_ker_ck_pres < (3 * huart->Init.BaudRate) ) || (lpuart_ker_ck_pres > (4096 * huart->Init.BaudRate) )) */ #else /* No Prescaler applicable */ /* Ensure that Frequency clock is in the range [3 * baudrate, 4096 * baudrate] */ if ((pclk < (3U * huart->Init.BaudRate)) || 800974e: 68fb ldr r3, [r7, #12] 8009750: 685a ldr r2, [r3, #4] 8009752: 4613 mov r3, r2 8009754: 005b lsls r3, r3, #1 8009756: 4413 add r3, r2 8009758: 69fa ldr r2, [r7, #28] 800975a: 429a cmp r2, r3 800975c: d305 bcc.n 800976a (pclk > (4096U * huart->Init.BaudRate))) 800975e: 68fb ldr r3, [r7, #12] 8009760: 685b ldr r3, [r3, #4] 8009762: 031b lsls r3, r3, #12 if ((pclk < (3U * huart->Init.BaudRate)) || 8009764: 69fa ldr r2, [r7, #28] 8009766: 429a cmp r2, r3 8009768: d903 bls.n 8009772 { ret = HAL_ERROR; 800976a: 2301 movs r3, #1 800976c: f887 3022 strb.w r3, [r7, #34] @ 0x22 8009770: e0e8 b.n 8009944 } else { usartdiv = (uint32_t)(UART_DIV_LPUART(pclk, huart->Init.BaudRate)); 8009772: 69fb ldr r3, [r7, #28] 8009774: 2200 movs r2, #0 8009776: 461c mov r4, r3 8009778: 4615 mov r5, r2 800977a: f04f 0200 mov.w r2, #0 800977e: f04f 0300 mov.w r3, #0 8009782: 022b lsls r3, r5, #8 8009784: ea43 6314 orr.w r3, r3, r4, lsr #24 8009788: 0222 lsls r2, r4, #8 800978a: 68f9 ldr r1, [r7, #12] 800978c: 6849 ldr r1, [r1, #4] 800978e: 0849 lsrs r1, r1, #1 8009790: 2000 movs r0, #0 8009792: 4688 mov r8, r1 8009794: 4681 mov r9, r0 8009796: eb12 0a08 adds.w sl, r2, r8 800979a: eb43 0b09 adc.w fp, r3, r9 800979e: 68fb ldr r3, [r7, #12] 80097a0: 685b ldr r3, [r3, #4] 80097a2: 2200 movs r2, #0 80097a4: 603b str r3, [r7, #0] 80097a6: 607a str r2, [r7, #4] 80097a8: e9d7 2300 ldrd r2, r3, [r7] 80097ac: 4650 mov r0, sl 80097ae: 4659 mov r1, fp 80097b0: f7f7 fa7a bl 8000ca8 <__aeabi_uldivmod> 80097b4: 4602 mov r2, r0 80097b6: 460b mov r3, r1 80097b8: 4613 mov r3, r2 80097ba: 61bb str r3, [r7, #24] if ((usartdiv >= LPUART_BRR_MIN) && (usartdiv <= LPUART_BRR_MAX)) 80097bc: 69bb ldr r3, [r7, #24] 80097be: f5b3 7f40 cmp.w r3, #768 @ 0x300 80097c2: d308 bcc.n 80097d6 80097c4: 69bb ldr r3, [r7, #24] 80097c6: f5b3 1f80 cmp.w r3, #1048576 @ 0x100000 80097ca: d204 bcs.n 80097d6 { huart->Instance->BRR = usartdiv; 80097cc: 68fb ldr r3, [r7, #12] 80097ce: 681b ldr r3, [r3, #0] 80097d0: 69ba ldr r2, [r7, #24] 80097d2: 60da str r2, [r3, #12] 80097d4: e0b6 b.n 8009944 } else { ret = HAL_ERROR; 80097d6: 2301 movs r3, #1 80097d8: f887 3022 strb.w r3, [r7, #34] @ 0x22 80097dc: e0b2 b.n 8009944 } /* if ( (pclk < (3 * huart->Init.BaudRate) ) || (pclk > (4096 * huart->Init.BaudRate) )) */ #endif /* USART_PRESC_PRESCALER */ } /* if (pclk != 0) */ } /* Check UART Over Sampling to set Baud Rate Register */ else if (huart->Init.OverSampling == UART_OVERSAMPLING_8) 80097de: 68fb ldr r3, [r7, #12] 80097e0: 69db ldr r3, [r3, #28] 80097e2: f5b3 4f00 cmp.w r3, #32768 @ 0x8000 80097e6: d15e bne.n 80098a6 { switch (clocksource) 80097e8: f897 3023 ldrb.w r3, [r7, #35] @ 0x23 80097ec: 2b08 cmp r3, #8 80097ee: d828 bhi.n 8009842 80097f0: a201 add r2, pc, #4 @ (adr r2, 80097f8 ) 80097f2: f852 f023 ldr.w pc, [r2, r3, lsl #2] 80097f6: bf00 nop 80097f8: 0800981d .word 0x0800981d 80097fc: 08009825 .word 0x08009825 8009800: 0800982d .word 0x0800982d 8009804: 08009843 .word 0x08009843 8009808: 08009833 .word 0x08009833 800980c: 08009843 .word 0x08009843 8009810: 08009843 .word 0x08009843 8009814: 08009843 .word 0x08009843 8009818: 0800983b .word 0x0800983b { case UART_CLOCKSOURCE_PCLK1: pclk = HAL_RCC_GetPCLK1Freq(); 800981c: f7fc fdd8 bl 80063d0 8009820: 61f8 str r0, [r7, #28] break; 8009822: e014 b.n 800984e case UART_CLOCKSOURCE_PCLK2: pclk = HAL_RCC_GetPCLK2Freq(); 8009824: f7fc fdea bl 80063fc 8009828: 61f8 str r0, [r7, #28] break; 800982a: e010 b.n 800984e case UART_CLOCKSOURCE_HSI: pclk = (uint32_t) HSI_VALUE; 800982c: 4b4d ldr r3, [pc, #308] @ (8009964 ) 800982e: 61fb str r3, [r7, #28] break; 8009830: e00d b.n 800984e case UART_CLOCKSOURCE_SYSCLK: pclk = HAL_RCC_GetSysClockFreq(); 8009832: f7fc fd35 bl 80062a0 8009836: 61f8 str r0, [r7, #28] break; 8009838: e009 b.n 800984e case UART_CLOCKSOURCE_LSE: pclk = (uint32_t) LSE_VALUE; 800983a: f44f 4300 mov.w r3, #32768 @ 0x8000 800983e: 61fb str r3, [r7, #28] break; 8009840: e005 b.n 800984e default: pclk = 0U; 8009842: 2300 movs r3, #0 8009844: 61fb str r3, [r7, #28] ret = HAL_ERROR; 8009846: 2301 movs r3, #1 8009848: f887 3022 strb.w r3, [r7, #34] @ 0x22 break; 800984c: bf00 nop } /* USARTDIV must be greater than or equal to 0d16 */ if (pclk != 0U) 800984e: 69fb ldr r3, [r7, #28] 8009850: 2b00 cmp r3, #0 8009852: d077 beq.n 8009944 { #if defined(USART_PRESC_PRESCALER) usartdiv = (uint32_t)(UART_DIV_SAMPLING8(pclk, huart->Init.BaudRate, huart->Init.ClockPrescaler)); #else usartdiv = (uint32_t)(UART_DIV_SAMPLING8(pclk, huart->Init.BaudRate)); 8009854: 69fb ldr r3, [r7, #28] 8009856: 005a lsls r2, r3, #1 8009858: 68fb ldr r3, [r7, #12] 800985a: 685b ldr r3, [r3, #4] 800985c: 085b lsrs r3, r3, #1 800985e: 441a add r2, r3 8009860: 68fb ldr r3, [r7, #12] 8009862: 685b ldr r3, [r3, #4] 8009864: fbb2 f3f3 udiv r3, r2, r3 8009868: 61bb str r3, [r7, #24] #endif /* USART_PRESC_PRESCALER */ if ((usartdiv >= UART_BRR_MIN) && (usartdiv <= UART_BRR_MAX)) 800986a: 69bb ldr r3, [r7, #24] 800986c: 2b0f cmp r3, #15 800986e: d916 bls.n 800989e 8009870: 69bb ldr r3, [r7, #24] 8009872: f5b3 3f80 cmp.w r3, #65536 @ 0x10000 8009876: d212 bcs.n 800989e { brrtemp = (uint16_t)(usartdiv & 0xFFF0U); 8009878: 69bb ldr r3, [r7, #24] 800987a: b29b uxth r3, r3 800987c: f023 030f bic.w r3, r3, #15 8009880: 82fb strh r3, [r7, #22] brrtemp |= (uint16_t)((usartdiv & (uint16_t)0x000FU) >> 1U); 8009882: 69bb ldr r3, [r7, #24] 8009884: 085b lsrs r3, r3, #1 8009886: b29b uxth r3, r3 8009888: f003 0307 and.w r3, r3, #7 800988c: b29a uxth r2, r3 800988e: 8afb ldrh r3, [r7, #22] 8009890: 4313 orrs r3, r2 8009892: 82fb strh r3, [r7, #22] huart->Instance->BRR = brrtemp; 8009894: 68fb ldr r3, [r7, #12] 8009896: 681b ldr r3, [r3, #0] 8009898: 8afa ldrh r2, [r7, #22] 800989a: 60da str r2, [r3, #12] 800989c: e052 b.n 8009944 } else { ret = HAL_ERROR; 800989e: 2301 movs r3, #1 80098a0: f887 3022 strb.w r3, [r7, #34] @ 0x22 80098a4: e04e b.n 8009944 } } } else { switch (clocksource) 80098a6: f897 3023 ldrb.w r3, [r7, #35] @ 0x23 80098aa: 2b08 cmp r3, #8 80098ac: d827 bhi.n 80098fe 80098ae: a201 add r2, pc, #4 @ (adr r2, 80098b4 ) 80098b0: f852 f023 ldr.w pc, [r2, r3, lsl #2] 80098b4: 080098d9 .word 0x080098d9 80098b8: 080098e1 .word 0x080098e1 80098bc: 080098e9 .word 0x080098e9 80098c0: 080098ff .word 0x080098ff 80098c4: 080098ef .word 0x080098ef 80098c8: 080098ff .word 0x080098ff 80098cc: 080098ff .word 0x080098ff 80098d0: 080098ff .word 0x080098ff 80098d4: 080098f7 .word 0x080098f7 { case UART_CLOCKSOURCE_PCLK1: pclk = HAL_RCC_GetPCLK1Freq(); 80098d8: f7fc fd7a bl 80063d0 80098dc: 61f8 str r0, [r7, #28] break; 80098de: e014 b.n 800990a case UART_CLOCKSOURCE_PCLK2: pclk = HAL_RCC_GetPCLK2Freq(); 80098e0: f7fc fd8c bl 80063fc 80098e4: 61f8 str r0, [r7, #28] break; 80098e6: e010 b.n 800990a case UART_CLOCKSOURCE_HSI: pclk = (uint32_t) HSI_VALUE; 80098e8: 4b1e ldr r3, [pc, #120] @ (8009964 ) 80098ea: 61fb str r3, [r7, #28] break; 80098ec: e00d b.n 800990a case UART_CLOCKSOURCE_SYSCLK: pclk = HAL_RCC_GetSysClockFreq(); 80098ee: f7fc fcd7 bl 80062a0 80098f2: 61f8 str r0, [r7, #28] break; 80098f4: e009 b.n 800990a case UART_CLOCKSOURCE_LSE: pclk = (uint32_t) LSE_VALUE; 80098f6: f44f 4300 mov.w r3, #32768 @ 0x8000 80098fa: 61fb str r3, [r7, #28] break; 80098fc: e005 b.n 800990a default: pclk = 0U; 80098fe: 2300 movs r3, #0 8009900: 61fb str r3, [r7, #28] ret = HAL_ERROR; 8009902: 2301 movs r3, #1 8009904: f887 3022 strb.w r3, [r7, #34] @ 0x22 break; 8009908: bf00 nop } if (pclk != 0U) 800990a: 69fb ldr r3, [r7, #28] 800990c: 2b00 cmp r3, #0 800990e: d019 beq.n 8009944 { /* USARTDIV must be greater than or equal to 0d16 */ #if defined(USART_PRESC_PRESCALER) usartdiv = (uint32_t)(UART_DIV_SAMPLING16(pclk, huart->Init.BaudRate, huart->Init.ClockPrescaler)); #else usartdiv = (uint32_t)(UART_DIV_SAMPLING16(pclk, huart->Init.BaudRate)); 8009910: 68fb ldr r3, [r7, #12] 8009912: 685b ldr r3, [r3, #4] 8009914: 085a lsrs r2, r3, #1 8009916: 69fb ldr r3, [r7, #28] 8009918: 441a add r2, r3 800991a: 68fb ldr r3, [r7, #12] 800991c: 685b ldr r3, [r3, #4] 800991e: fbb2 f3f3 udiv r3, r2, r3 8009922: 61bb str r3, [r7, #24] #endif /* USART_PRESC_PRESCALER */ if ((usartdiv >= UART_BRR_MIN) && (usartdiv <= UART_BRR_MAX)) 8009924: 69bb ldr r3, [r7, #24] 8009926: 2b0f cmp r3, #15 8009928: d909 bls.n 800993e 800992a: 69bb ldr r3, [r7, #24] 800992c: f5b3 3f80 cmp.w r3, #65536 @ 0x10000 8009930: d205 bcs.n 800993e { huart->Instance->BRR = (uint16_t)usartdiv; 8009932: 69bb ldr r3, [r7, #24] 8009934: b29a uxth r2, r3 8009936: 68fb ldr r3, [r7, #12] 8009938: 681b ldr r3, [r3, #0] 800993a: 60da str r2, [r3, #12] 800993c: e002 b.n 8009944 } else { ret = HAL_ERROR; 800993e: 2301 movs r3, #1 8009940: f887 3022 strb.w r3, [r7, #34] @ 0x22 huart->NbTxDataToProcess = 1; huart->NbRxDataToProcess = 1; #endif /* USART_CR1_FIFOEN */ /* Clear ISR function pointers */ huart->RxISR = NULL; 8009944: 68fb ldr r3, [r7, #12] 8009946: 2200 movs r2, #0 8009948: 669a str r2, [r3, #104] @ 0x68 huart->TxISR = NULL; 800994a: 68fb ldr r3, [r7, #12] 800994c: 2200 movs r2, #0 800994e: 66da str r2, [r3, #108] @ 0x6c return ret; 8009950: f897 3022 ldrb.w r3, [r7, #34] @ 0x22 } 8009954: 4618 mov r0, r3 8009956: 3728 adds r7, #40 @ 0x28 8009958: 46bd mov sp, r7 800995a: e8bd 8fb0 ldmia.w sp!, {r4, r5, r7, r8, r9, sl, fp, pc} 800995e: bf00 nop 8009960: 40008000 .word 0x40008000 8009964: 00f42400 .word 0x00f42400 08009968 : * @brief Configure the UART peripheral advanced features. * @param huart UART handle. * @retval None */ void UART_AdvFeatureConfig(UART_HandleTypeDef *huart) { 8009968: b480 push {r7} 800996a: b083 sub sp, #12 800996c: af00 add r7, sp, #0 800996e: 6078 str r0, [r7, #4] /* Check whether the set of advanced features to configure is properly set */ assert_param(IS_UART_ADVFEATURE_INIT(huart->AdvancedInit.AdvFeatureInit)); /* if required, configure RX/TX pins swap */ if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_SWAP_INIT)) 8009970: 687b ldr r3, [r7, #4] 8009972: 6a5b ldr r3, [r3, #36] @ 0x24 8009974: f003 0308 and.w r3, r3, #8 8009978: 2b00 cmp r3, #0 800997a: d00a beq.n 8009992 { assert_param(IS_UART_ADVFEATURE_SWAP(huart->AdvancedInit.Swap)); MODIFY_REG(huart->Instance->CR2, USART_CR2_SWAP, huart->AdvancedInit.Swap); 800997c: 687b ldr r3, [r7, #4] 800997e: 681b ldr r3, [r3, #0] 8009980: 685b ldr r3, [r3, #4] 8009982: f423 4100 bic.w r1, r3, #32768 @ 0x8000 8009986: 687b ldr r3, [r7, #4] 8009988: 6b5a ldr r2, [r3, #52] @ 0x34 800998a: 687b ldr r3, [r7, #4] 800998c: 681b ldr r3, [r3, #0] 800998e: 430a orrs r2, r1 8009990: 605a str r2, [r3, #4] } /* if required, configure TX pin active level inversion */ if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_TXINVERT_INIT)) 8009992: 687b ldr r3, [r7, #4] 8009994: 6a5b ldr r3, [r3, #36] @ 0x24 8009996: f003 0301 and.w r3, r3, #1 800999a: 2b00 cmp r3, #0 800999c: d00a beq.n 80099b4 { assert_param(IS_UART_ADVFEATURE_TXINV(huart->AdvancedInit.TxPinLevelInvert)); MODIFY_REG(huart->Instance->CR2, USART_CR2_TXINV, huart->AdvancedInit.TxPinLevelInvert); 800999e: 687b ldr r3, [r7, #4] 80099a0: 681b ldr r3, [r3, #0] 80099a2: 685b ldr r3, [r3, #4] 80099a4: f423 3100 bic.w r1, r3, #131072 @ 0x20000 80099a8: 687b ldr r3, [r7, #4] 80099aa: 6a9a ldr r2, [r3, #40] @ 0x28 80099ac: 687b ldr r3, [r7, #4] 80099ae: 681b ldr r3, [r3, #0] 80099b0: 430a orrs r2, r1 80099b2: 605a str r2, [r3, #4] } /* if required, configure RX pin active level inversion */ if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_RXINVERT_INIT)) 80099b4: 687b ldr r3, [r7, #4] 80099b6: 6a5b ldr r3, [r3, #36] @ 0x24 80099b8: f003 0302 and.w r3, r3, #2 80099bc: 2b00 cmp r3, #0 80099be: d00a beq.n 80099d6 { assert_param(IS_UART_ADVFEATURE_RXINV(huart->AdvancedInit.RxPinLevelInvert)); MODIFY_REG(huart->Instance->CR2, USART_CR2_RXINV, huart->AdvancedInit.RxPinLevelInvert); 80099c0: 687b ldr r3, [r7, #4] 80099c2: 681b ldr r3, [r3, #0] 80099c4: 685b ldr r3, [r3, #4] 80099c6: f423 3180 bic.w r1, r3, #65536 @ 0x10000 80099ca: 687b ldr r3, [r7, #4] 80099cc: 6ada ldr r2, [r3, #44] @ 0x2c 80099ce: 687b ldr r3, [r7, #4] 80099d0: 681b ldr r3, [r3, #0] 80099d2: 430a orrs r2, r1 80099d4: 605a str r2, [r3, #4] } /* if required, configure data inversion */ if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_DATAINVERT_INIT)) 80099d6: 687b ldr r3, [r7, #4] 80099d8: 6a5b ldr r3, [r3, #36] @ 0x24 80099da: f003 0304 and.w r3, r3, #4 80099de: 2b00 cmp r3, #0 80099e0: d00a beq.n 80099f8 { assert_param(IS_UART_ADVFEATURE_DATAINV(huart->AdvancedInit.DataInvert)); MODIFY_REG(huart->Instance->CR2, USART_CR2_DATAINV, huart->AdvancedInit.DataInvert); 80099e2: 687b ldr r3, [r7, #4] 80099e4: 681b ldr r3, [r3, #0] 80099e6: 685b ldr r3, [r3, #4] 80099e8: f423 2180 bic.w r1, r3, #262144 @ 0x40000 80099ec: 687b ldr r3, [r7, #4] 80099ee: 6b1a ldr r2, [r3, #48] @ 0x30 80099f0: 687b ldr r3, [r7, #4] 80099f2: 681b ldr r3, [r3, #0] 80099f4: 430a orrs r2, r1 80099f6: 605a str r2, [r3, #4] } /* if required, configure RX overrun detection disabling */ if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_RXOVERRUNDISABLE_INIT)) 80099f8: 687b ldr r3, [r7, #4] 80099fa: 6a5b ldr r3, [r3, #36] @ 0x24 80099fc: f003 0310 and.w r3, r3, #16 8009a00: 2b00 cmp r3, #0 8009a02: d00a beq.n 8009a1a { assert_param(IS_UART_OVERRUN(huart->AdvancedInit.OverrunDisable)); MODIFY_REG(huart->Instance->CR3, USART_CR3_OVRDIS, huart->AdvancedInit.OverrunDisable); 8009a04: 687b ldr r3, [r7, #4] 8009a06: 681b ldr r3, [r3, #0] 8009a08: 689b ldr r3, [r3, #8] 8009a0a: f423 5180 bic.w r1, r3, #4096 @ 0x1000 8009a0e: 687b ldr r3, [r7, #4] 8009a10: 6b9a ldr r2, [r3, #56] @ 0x38 8009a12: 687b ldr r3, [r7, #4] 8009a14: 681b ldr r3, [r3, #0] 8009a16: 430a orrs r2, r1 8009a18: 609a str r2, [r3, #8] } /* if required, configure DMA disabling on reception error */ if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_DMADISABLEONERROR_INIT)) 8009a1a: 687b ldr r3, [r7, #4] 8009a1c: 6a5b ldr r3, [r3, #36] @ 0x24 8009a1e: f003 0320 and.w r3, r3, #32 8009a22: 2b00 cmp r3, #0 8009a24: d00a beq.n 8009a3c { assert_param(IS_UART_ADVFEATURE_DMAONRXERROR(huart->AdvancedInit.DMADisableonRxError)); MODIFY_REG(huart->Instance->CR3, USART_CR3_DDRE, huart->AdvancedInit.DMADisableonRxError); 8009a26: 687b ldr r3, [r7, #4] 8009a28: 681b ldr r3, [r3, #0] 8009a2a: 689b ldr r3, [r3, #8] 8009a2c: f423 5100 bic.w r1, r3, #8192 @ 0x2000 8009a30: 687b ldr r3, [r7, #4] 8009a32: 6bda ldr r2, [r3, #60] @ 0x3c 8009a34: 687b ldr r3, [r7, #4] 8009a36: 681b ldr r3, [r3, #0] 8009a38: 430a orrs r2, r1 8009a3a: 609a str r2, [r3, #8] } /* if required, configure auto Baud rate detection scheme */ if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_AUTOBAUDRATE_INIT)) 8009a3c: 687b ldr r3, [r7, #4] 8009a3e: 6a5b ldr r3, [r3, #36] @ 0x24 8009a40: f003 0340 and.w r3, r3, #64 @ 0x40 8009a44: 2b00 cmp r3, #0 8009a46: d01a beq.n 8009a7e { assert_param(IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(huart->Instance)); assert_param(IS_UART_ADVFEATURE_AUTOBAUDRATE(huart->AdvancedInit.AutoBaudRateEnable)); MODIFY_REG(huart->Instance->CR2, USART_CR2_ABREN, huart->AdvancedInit.AutoBaudRateEnable); 8009a48: 687b ldr r3, [r7, #4] 8009a4a: 681b ldr r3, [r3, #0] 8009a4c: 685b ldr r3, [r3, #4] 8009a4e: f423 1180 bic.w r1, r3, #1048576 @ 0x100000 8009a52: 687b ldr r3, [r7, #4] 8009a54: 6c1a ldr r2, [r3, #64] @ 0x40 8009a56: 687b ldr r3, [r7, #4] 8009a58: 681b ldr r3, [r3, #0] 8009a5a: 430a orrs r2, r1 8009a5c: 605a str r2, [r3, #4] /* set auto Baudrate detection parameters if detection is enabled */ if (huart->AdvancedInit.AutoBaudRateEnable == UART_ADVFEATURE_AUTOBAUDRATE_ENABLE) 8009a5e: 687b ldr r3, [r7, #4] 8009a60: 6c1b ldr r3, [r3, #64] @ 0x40 8009a62: f5b3 1f80 cmp.w r3, #1048576 @ 0x100000 8009a66: d10a bne.n 8009a7e { assert_param(IS_UART_ADVFEATURE_AUTOBAUDRATEMODE(huart->AdvancedInit.AutoBaudRateMode)); MODIFY_REG(huart->Instance->CR2, USART_CR2_ABRMODE, huart->AdvancedInit.AutoBaudRateMode); 8009a68: 687b ldr r3, [r7, #4] 8009a6a: 681b ldr r3, [r3, #0] 8009a6c: 685b ldr r3, [r3, #4] 8009a6e: f423 01c0 bic.w r1, r3, #6291456 @ 0x600000 8009a72: 687b ldr r3, [r7, #4] 8009a74: 6c5a ldr r2, [r3, #68] @ 0x44 8009a76: 687b ldr r3, [r7, #4] 8009a78: 681b ldr r3, [r3, #0] 8009a7a: 430a orrs r2, r1 8009a7c: 605a str r2, [r3, #4] } } /* if required, configure MSB first on communication line */ if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_MSBFIRST_INIT)) 8009a7e: 687b ldr r3, [r7, #4] 8009a80: 6a5b ldr r3, [r3, #36] @ 0x24 8009a82: f003 0380 and.w r3, r3, #128 @ 0x80 8009a86: 2b00 cmp r3, #0 8009a88: d00a beq.n 8009aa0 { assert_param(IS_UART_ADVFEATURE_MSBFIRST(huart->AdvancedInit.MSBFirst)); MODIFY_REG(huart->Instance->CR2, USART_CR2_MSBFIRST, huart->AdvancedInit.MSBFirst); 8009a8a: 687b ldr r3, [r7, #4] 8009a8c: 681b ldr r3, [r3, #0] 8009a8e: 685b ldr r3, [r3, #4] 8009a90: f423 2100 bic.w r1, r3, #524288 @ 0x80000 8009a94: 687b ldr r3, [r7, #4] 8009a96: 6c9a ldr r2, [r3, #72] @ 0x48 8009a98: 687b ldr r3, [r7, #4] 8009a9a: 681b ldr r3, [r3, #0] 8009a9c: 430a orrs r2, r1 8009a9e: 605a str r2, [r3, #4] } } 8009aa0: bf00 nop 8009aa2: 370c adds r7, #12 8009aa4: 46bd mov sp, r7 8009aa6: f85d 7b04 ldr.w r7, [sp], #4 8009aaa: 4770 bx lr 08009aac : * @brief Check the UART Idle State. * @param huart UART handle. * @retval HAL status */ HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart) { 8009aac: b580 push {r7, lr} 8009aae: b098 sub sp, #96 @ 0x60 8009ab0: af02 add r7, sp, #8 8009ab2: 6078 str r0, [r7, #4] uint32_t tickstart; /* Initialize the UART ErrorCode */ huart->ErrorCode = HAL_UART_ERROR_NONE; 8009ab4: 687b ldr r3, [r7, #4] 8009ab6: 2200 movs r2, #0 8009ab8: f8c3 2084 str.w r2, [r3, #132] @ 0x84 /* Init tickstart for timeout management */ tickstart = HAL_GetTick(); 8009abc: f7fa f8cc bl 8003c58 8009ac0: 6578 str r0, [r7, #84] @ 0x54 /* Check if the Transmitter is enabled */ if ((huart->Instance->CR1 & USART_CR1_TE) == USART_CR1_TE) 8009ac2: 687b ldr r3, [r7, #4] 8009ac4: 681b ldr r3, [r3, #0] 8009ac6: 681b ldr r3, [r3, #0] 8009ac8: f003 0308 and.w r3, r3, #8 8009acc: 2b08 cmp r3, #8 8009ace: d12e bne.n 8009b2e { /* Wait until TEACK flag is set */ if (UART_WaitOnFlagUntilTimeout(huart, USART_ISR_TEACK, RESET, tickstart, HAL_UART_TIMEOUT_VALUE) != HAL_OK) 8009ad0: f06f 437e mvn.w r3, #4261412864 @ 0xfe000000 8009ad4: 9300 str r3, [sp, #0] 8009ad6: 6d7b ldr r3, [r7, #84] @ 0x54 8009ad8: 2200 movs r2, #0 8009ada: f44f 1100 mov.w r1, #2097152 @ 0x200000 8009ade: 6878 ldr r0, [r7, #4] 8009ae0: f000 f88c bl 8009bfc 8009ae4: 4603 mov r3, r0 8009ae6: 2b00 cmp r3, #0 8009ae8: d021 beq.n 8009b2e { /* Disable TXE interrupt for the interrupt process */ #if defined(USART_CR1_FIFOEN) ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE_TXFNFIE)); #else ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE)); 8009aea: 687b ldr r3, [r7, #4] 8009aec: 681b ldr r3, [r3, #0] 8009aee: 63bb str r3, [r7, #56] @ 0x38 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 8009af0: 6bbb ldr r3, [r7, #56] @ 0x38 8009af2: e853 3f00 ldrex r3, [r3] 8009af6: 637b str r3, [r7, #52] @ 0x34 return(result); 8009af8: 6b7b ldr r3, [r7, #52] @ 0x34 8009afa: f023 0380 bic.w r3, r3, #128 @ 0x80 8009afe: 653b str r3, [r7, #80] @ 0x50 8009b00: 687b ldr r3, [r7, #4] 8009b02: 681b ldr r3, [r3, #0] 8009b04: 461a mov r2, r3 8009b06: 6d3b ldr r3, [r7, #80] @ 0x50 8009b08: 647b str r3, [r7, #68] @ 0x44 8009b0a: 643a str r2, [r7, #64] @ 0x40 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 8009b0c: 6c39 ldr r1, [r7, #64] @ 0x40 8009b0e: 6c7a ldr r2, [r7, #68] @ 0x44 8009b10: e841 2300 strex r3, r2, [r1] 8009b14: 63fb str r3, [r7, #60] @ 0x3c return(result); 8009b16: 6bfb ldr r3, [r7, #60] @ 0x3c 8009b18: 2b00 cmp r3, #0 8009b1a: d1e6 bne.n 8009aea #endif /* USART_CR1_FIFOEN */ huart->gState = HAL_UART_STATE_READY; 8009b1c: 687b ldr r3, [r7, #4] 8009b1e: 2220 movs r2, #32 8009b20: 67da str r2, [r3, #124] @ 0x7c __HAL_UNLOCK(huart); 8009b22: 687b ldr r3, [r7, #4] 8009b24: 2200 movs r2, #0 8009b26: f883 2078 strb.w r2, [r3, #120] @ 0x78 /* Timeout occurred */ return HAL_TIMEOUT; 8009b2a: 2303 movs r3, #3 8009b2c: e062 b.n 8009bf4 } } /* Check if the Receiver is enabled */ if ((huart->Instance->CR1 & USART_CR1_RE) == USART_CR1_RE) 8009b2e: 687b ldr r3, [r7, #4] 8009b30: 681b ldr r3, [r3, #0] 8009b32: 681b ldr r3, [r3, #0] 8009b34: f003 0304 and.w r3, r3, #4 8009b38: 2b04 cmp r3, #4 8009b3a: d149 bne.n 8009bd0 { /* Wait until REACK flag is set */ if (UART_WaitOnFlagUntilTimeout(huart, USART_ISR_REACK, RESET, tickstart, HAL_UART_TIMEOUT_VALUE) != HAL_OK) 8009b3c: f06f 437e mvn.w r3, #4261412864 @ 0xfe000000 8009b40: 9300 str r3, [sp, #0] 8009b42: 6d7b ldr r3, [r7, #84] @ 0x54 8009b44: 2200 movs r2, #0 8009b46: f44f 0180 mov.w r1, #4194304 @ 0x400000 8009b4a: 6878 ldr r0, [r7, #4] 8009b4c: f000 f856 bl 8009bfc 8009b50: 4603 mov r3, r0 8009b52: 2b00 cmp r3, #0 8009b54: d03c beq.n 8009bd0 /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */ #if defined(USART_CR1_FIFOEN) ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE)); #else ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE)); 8009b56: 687b ldr r3, [r7, #4] 8009b58: 681b ldr r3, [r3, #0] 8009b5a: 627b str r3, [r7, #36] @ 0x24 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 8009b5c: 6a7b ldr r3, [r7, #36] @ 0x24 8009b5e: e853 3f00 ldrex r3, [r3] 8009b62: 623b str r3, [r7, #32] return(result); 8009b64: 6a3b ldr r3, [r7, #32] 8009b66: f423 7390 bic.w r3, r3, #288 @ 0x120 8009b6a: 64fb str r3, [r7, #76] @ 0x4c 8009b6c: 687b ldr r3, [r7, #4] 8009b6e: 681b ldr r3, [r3, #0] 8009b70: 461a mov r2, r3 8009b72: 6cfb ldr r3, [r7, #76] @ 0x4c 8009b74: 633b str r3, [r7, #48] @ 0x30 8009b76: 62fa str r2, [r7, #44] @ 0x2c __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 8009b78: 6af9 ldr r1, [r7, #44] @ 0x2c 8009b7a: 6b3a ldr r2, [r7, #48] @ 0x30 8009b7c: e841 2300 strex r3, r2, [r1] 8009b80: 62bb str r3, [r7, #40] @ 0x28 return(result); 8009b82: 6abb ldr r3, [r7, #40] @ 0x28 8009b84: 2b00 cmp r3, #0 8009b86: d1e6 bne.n 8009b56 #endif /* USART_CR1_FIFOEN */ ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); 8009b88: 687b ldr r3, [r7, #4] 8009b8a: 681b ldr r3, [r3, #0] 8009b8c: 3308 adds r3, #8 8009b8e: 613b str r3, [r7, #16] __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 8009b90: 693b ldr r3, [r7, #16] 8009b92: e853 3f00 ldrex r3, [r3] 8009b96: 60fb str r3, [r7, #12] return(result); 8009b98: 68fb ldr r3, [r7, #12] 8009b9a: f023 0301 bic.w r3, r3, #1 8009b9e: 64bb str r3, [r7, #72] @ 0x48 8009ba0: 687b ldr r3, [r7, #4] 8009ba2: 681b ldr r3, [r3, #0] 8009ba4: 3308 adds r3, #8 8009ba6: 6cba ldr r2, [r7, #72] @ 0x48 8009ba8: 61fa str r2, [r7, #28] 8009baa: 61bb str r3, [r7, #24] __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 8009bac: 69b9 ldr r1, [r7, #24] 8009bae: 69fa ldr r2, [r7, #28] 8009bb0: e841 2300 strex r3, r2, [r1] 8009bb4: 617b str r3, [r7, #20] return(result); 8009bb6: 697b ldr r3, [r7, #20] 8009bb8: 2b00 cmp r3, #0 8009bba: d1e5 bne.n 8009b88 huart->RxState = HAL_UART_STATE_READY; 8009bbc: 687b ldr r3, [r7, #4] 8009bbe: 2220 movs r2, #32 8009bc0: f8c3 2080 str.w r2, [r3, #128] @ 0x80 __HAL_UNLOCK(huart); 8009bc4: 687b ldr r3, [r7, #4] 8009bc6: 2200 movs r2, #0 8009bc8: f883 2078 strb.w r2, [r3, #120] @ 0x78 /* Timeout occurred */ return HAL_TIMEOUT; 8009bcc: 2303 movs r3, #3 8009bce: e011 b.n 8009bf4 } } /* Initialize the UART State */ huart->gState = HAL_UART_STATE_READY; 8009bd0: 687b ldr r3, [r7, #4] 8009bd2: 2220 movs r2, #32 8009bd4: 67da str r2, [r3, #124] @ 0x7c huart->RxState = HAL_UART_STATE_READY; 8009bd6: 687b ldr r3, [r7, #4] 8009bd8: 2220 movs r2, #32 8009bda: f8c3 2080 str.w r2, [r3, #128] @ 0x80 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; 8009bde: 687b ldr r3, [r7, #4] 8009be0: 2200 movs r2, #0 8009be2: 661a str r2, [r3, #96] @ 0x60 huart->RxEventType = HAL_UART_RXEVENT_TC; 8009be4: 687b ldr r3, [r7, #4] 8009be6: 2200 movs r2, #0 8009be8: 665a str r2, [r3, #100] @ 0x64 __HAL_UNLOCK(huart); 8009bea: 687b ldr r3, [r7, #4] 8009bec: 2200 movs r2, #0 8009bee: f883 2078 strb.w r2, [r3, #120] @ 0x78 return HAL_OK; 8009bf2: 2300 movs r3, #0 } 8009bf4: 4618 mov r0, r3 8009bf6: 3758 adds r7, #88 @ 0x58 8009bf8: 46bd mov sp, r7 8009bfa: bd80 pop {r7, pc} 08009bfc : * @param Timeout Timeout duration * @retval HAL status */ HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout) { 8009bfc: b580 push {r7, lr} 8009bfe: b084 sub sp, #16 8009c00: af00 add r7, sp, #0 8009c02: 60f8 str r0, [r7, #12] 8009c04: 60b9 str r1, [r7, #8] 8009c06: 603b str r3, [r7, #0] 8009c08: 4613 mov r3, r2 8009c0a: 71fb strb r3, [r7, #7] /* Wait until flag is set */ while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status) 8009c0c: e04f b.n 8009cae { /* Check for the Timeout */ if (Timeout != HAL_MAX_DELAY) 8009c0e: 69bb ldr r3, [r7, #24] 8009c10: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff 8009c14: d04b beq.n 8009cae { if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) 8009c16: f7fa f81f bl 8003c58 8009c1a: 4602 mov r2, r0 8009c1c: 683b ldr r3, [r7, #0] 8009c1e: 1ad3 subs r3, r2, r3 8009c20: 69ba ldr r2, [r7, #24] 8009c22: 429a cmp r2, r3 8009c24: d302 bcc.n 8009c2c 8009c26: 69bb ldr r3, [r7, #24] 8009c28: 2b00 cmp r3, #0 8009c2a: d101 bne.n 8009c30 { return HAL_TIMEOUT; 8009c2c: 2303 movs r3, #3 8009c2e: e04e b.n 8009cce } if ((READ_BIT(huart->Instance->CR1, USART_CR1_RE) != 0U) && (Flag != UART_FLAG_TXE) && (Flag != UART_FLAG_TC)) 8009c30: 68fb ldr r3, [r7, #12] 8009c32: 681b ldr r3, [r3, #0] 8009c34: 681b ldr r3, [r3, #0] 8009c36: f003 0304 and.w r3, r3, #4 8009c3a: 2b00 cmp r3, #0 8009c3c: d037 beq.n 8009cae 8009c3e: 68bb ldr r3, [r7, #8] 8009c40: 2b80 cmp r3, #128 @ 0x80 8009c42: d034 beq.n 8009cae 8009c44: 68bb ldr r3, [r7, #8] 8009c46: 2b40 cmp r3, #64 @ 0x40 8009c48: d031 beq.n 8009cae { if (__HAL_UART_GET_FLAG(huart, UART_FLAG_ORE) == SET) 8009c4a: 68fb ldr r3, [r7, #12] 8009c4c: 681b ldr r3, [r3, #0] 8009c4e: 69db ldr r3, [r3, #28] 8009c50: f003 0308 and.w r3, r3, #8 8009c54: 2b08 cmp r3, #8 8009c56: d110 bne.n 8009c7a { /* Clear Overrun Error flag*/ __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF); 8009c58: 68fb ldr r3, [r7, #12] 8009c5a: 681b ldr r3, [r3, #0] 8009c5c: 2208 movs r2, #8 8009c5e: 621a str r2, [r3, #32] /* Blocking error : transfer is aborted Set the UART state ready to be able to start again the process, Disable Rx Interrupts if ongoing */ UART_EndRxTransfer(huart); 8009c60: 68f8 ldr r0, [r7, #12] 8009c62: f000 f838 bl 8009cd6 huart->ErrorCode = HAL_UART_ERROR_ORE; 8009c66: 68fb ldr r3, [r7, #12] 8009c68: 2208 movs r2, #8 8009c6a: f8c3 2084 str.w r2, [r3, #132] @ 0x84 /* Process Unlocked */ __HAL_UNLOCK(huart); 8009c6e: 68fb ldr r3, [r7, #12] 8009c70: 2200 movs r2, #0 8009c72: f883 2078 strb.w r2, [r3, #120] @ 0x78 return HAL_ERROR; 8009c76: 2301 movs r3, #1 8009c78: e029 b.n 8009cce } if (__HAL_UART_GET_FLAG(huart, UART_FLAG_RTOF) == SET) 8009c7a: 68fb ldr r3, [r7, #12] 8009c7c: 681b ldr r3, [r3, #0] 8009c7e: 69db ldr r3, [r3, #28] 8009c80: f403 6300 and.w r3, r3, #2048 @ 0x800 8009c84: f5b3 6f00 cmp.w r3, #2048 @ 0x800 8009c88: d111 bne.n 8009cae { /* Clear Receiver Timeout flag*/ __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_RTOF); 8009c8a: 68fb ldr r3, [r7, #12] 8009c8c: 681b ldr r3, [r3, #0] 8009c8e: f44f 6200 mov.w r2, #2048 @ 0x800 8009c92: 621a str r2, [r3, #32] /* Blocking error : transfer is aborted Set the UART state ready to be able to start again the process, Disable Rx Interrupts if ongoing */ UART_EndRxTransfer(huart); 8009c94: 68f8 ldr r0, [r7, #12] 8009c96: f000 f81e bl 8009cd6 huart->ErrorCode = HAL_UART_ERROR_RTO; 8009c9a: 68fb ldr r3, [r7, #12] 8009c9c: 2220 movs r2, #32 8009c9e: f8c3 2084 str.w r2, [r3, #132] @ 0x84 /* Process Unlocked */ __HAL_UNLOCK(huart); 8009ca2: 68fb ldr r3, [r7, #12] 8009ca4: 2200 movs r2, #0 8009ca6: f883 2078 strb.w r2, [r3, #120] @ 0x78 return HAL_TIMEOUT; 8009caa: 2303 movs r3, #3 8009cac: e00f b.n 8009cce while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status) 8009cae: 68fb ldr r3, [r7, #12] 8009cb0: 681b ldr r3, [r3, #0] 8009cb2: 69da ldr r2, [r3, #28] 8009cb4: 68bb ldr r3, [r7, #8] 8009cb6: 4013 ands r3, r2 8009cb8: 68ba ldr r2, [r7, #8] 8009cba: 429a cmp r2, r3 8009cbc: bf0c ite eq 8009cbe: 2301 moveq r3, #1 8009cc0: 2300 movne r3, #0 8009cc2: b2db uxtb r3, r3 8009cc4: 461a mov r2, r3 8009cc6: 79fb ldrb r3, [r7, #7] 8009cc8: 429a cmp r2, r3 8009cca: d0a0 beq.n 8009c0e } } } } return HAL_OK; 8009ccc: 2300 movs r3, #0 } 8009cce: 4618 mov r0, r3 8009cd0: 3710 adds r7, #16 8009cd2: 46bd mov sp, r7 8009cd4: bd80 pop {r7, pc} 08009cd6 : * @brief End ongoing Rx transfer on UART peripheral (following error detection or Reception completion). * @param huart UART handle. * @retval None */ static void UART_EndRxTransfer(UART_HandleTypeDef *huart) { 8009cd6: b480 push {r7} 8009cd8: b095 sub sp, #84 @ 0x54 8009cda: af00 add r7, sp, #0 8009cdc: 6078 str r0, [r7, #4] /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */ #if defined(USART_CR1_FIFOEN) ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE)); ATOMIC_CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE)); #else ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE)); 8009cde: 687b ldr r3, [r7, #4] 8009ce0: 681b ldr r3, [r3, #0] 8009ce2: 637b str r3, [r7, #52] @ 0x34 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 8009ce4: 6b7b ldr r3, [r7, #52] @ 0x34 8009ce6: e853 3f00 ldrex r3, [r3] 8009cea: 633b str r3, [r7, #48] @ 0x30 return(result); 8009cec: 6b3b ldr r3, [r7, #48] @ 0x30 8009cee: f423 7390 bic.w r3, r3, #288 @ 0x120 8009cf2: 64fb str r3, [r7, #76] @ 0x4c 8009cf4: 687b ldr r3, [r7, #4] 8009cf6: 681b ldr r3, [r3, #0] 8009cf8: 461a mov r2, r3 8009cfa: 6cfb ldr r3, [r7, #76] @ 0x4c 8009cfc: 643b str r3, [r7, #64] @ 0x40 8009cfe: 63fa str r2, [r7, #60] @ 0x3c __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 8009d00: 6bf9 ldr r1, [r7, #60] @ 0x3c 8009d02: 6c3a ldr r2, [r7, #64] @ 0x40 8009d04: e841 2300 strex r3, r2, [r1] 8009d08: 63bb str r3, [r7, #56] @ 0x38 return(result); 8009d0a: 6bbb ldr r3, [r7, #56] @ 0x38 8009d0c: 2b00 cmp r3, #0 8009d0e: d1e6 bne.n 8009cde ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); 8009d10: 687b ldr r3, [r7, #4] 8009d12: 681b ldr r3, [r3, #0] 8009d14: 3308 adds r3, #8 8009d16: 623b str r3, [r7, #32] __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 8009d18: 6a3b ldr r3, [r7, #32] 8009d1a: e853 3f00 ldrex r3, [r3] 8009d1e: 61fb str r3, [r7, #28] return(result); 8009d20: 69fb ldr r3, [r7, #28] 8009d22: f023 0301 bic.w r3, r3, #1 8009d26: 64bb str r3, [r7, #72] @ 0x48 8009d28: 687b ldr r3, [r7, #4] 8009d2a: 681b ldr r3, [r3, #0] 8009d2c: 3308 adds r3, #8 8009d2e: 6cba ldr r2, [r7, #72] @ 0x48 8009d30: 62fa str r2, [r7, #44] @ 0x2c 8009d32: 62bb str r3, [r7, #40] @ 0x28 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 8009d34: 6ab9 ldr r1, [r7, #40] @ 0x28 8009d36: 6afa ldr r2, [r7, #44] @ 0x2c 8009d38: e841 2300 strex r3, r2, [r1] 8009d3c: 627b str r3, [r7, #36] @ 0x24 return(result); 8009d3e: 6a7b ldr r3, [r7, #36] @ 0x24 8009d40: 2b00 cmp r3, #0 8009d42: d1e5 bne.n 8009d10 #endif /* USART_CR1_FIFOEN */ /* In case of reception waiting for IDLE event, disable also the IDLE IE interrupt source */ if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) 8009d44: 687b ldr r3, [r7, #4] 8009d46: 6e1b ldr r3, [r3, #96] @ 0x60 8009d48: 2b01 cmp r3, #1 8009d4a: d118 bne.n 8009d7e { ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); 8009d4c: 687b ldr r3, [r7, #4] 8009d4e: 681b ldr r3, [r3, #0] 8009d50: 60fb str r3, [r7, #12] __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 8009d52: 68fb ldr r3, [r7, #12] 8009d54: e853 3f00 ldrex r3, [r3] 8009d58: 60bb str r3, [r7, #8] return(result); 8009d5a: 68bb ldr r3, [r7, #8] 8009d5c: f023 0310 bic.w r3, r3, #16 8009d60: 647b str r3, [r7, #68] @ 0x44 8009d62: 687b ldr r3, [r7, #4] 8009d64: 681b ldr r3, [r3, #0] 8009d66: 461a mov r2, r3 8009d68: 6c7b ldr r3, [r7, #68] @ 0x44 8009d6a: 61bb str r3, [r7, #24] 8009d6c: 617a str r2, [r7, #20] __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 8009d6e: 6979 ldr r1, [r7, #20] 8009d70: 69ba ldr r2, [r7, #24] 8009d72: e841 2300 strex r3, r2, [r1] 8009d76: 613b str r3, [r7, #16] return(result); 8009d78: 693b ldr r3, [r7, #16] 8009d7a: 2b00 cmp r3, #0 8009d7c: d1e6 bne.n 8009d4c } /* At end of Rx process, restore huart->RxState to Ready */ huart->RxState = HAL_UART_STATE_READY; 8009d7e: 687b ldr r3, [r7, #4] 8009d80: 2220 movs r2, #32 8009d82: f8c3 2080 str.w r2, [r3, #128] @ 0x80 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; 8009d86: 687b ldr r3, [r7, #4] 8009d88: 2200 movs r2, #0 8009d8a: 661a str r2, [r3, #96] @ 0x60 /* Reset RxIsr function pointer */ huart->RxISR = NULL; 8009d8c: 687b ldr r3, [r7, #4] 8009d8e: 2200 movs r2, #0 8009d90: 669a str r2, [r3, #104] @ 0x68 } 8009d92: bf00 nop 8009d94: 3754 adds r7, #84 @ 0x54 8009d96: 46bd mov sp, r7 8009d98: f85d 7b04 ldr.w r7, [sp], #4 8009d9c: 4770 bx lr 08009d9e : * (To be called at end of DMA Abort procedure following error occurrence). * @param hdma DMA handle. * @retval None */ static void UART_DMAAbortOnError(DMA_HandleTypeDef *hdma) { 8009d9e: b580 push {r7, lr} 8009da0: b084 sub sp, #16 8009da2: af00 add r7, sp, #0 8009da4: 6078 str r0, [r7, #4] UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent); 8009da6: 687b ldr r3, [r7, #4] 8009da8: 6a9b ldr r3, [r3, #40] @ 0x28 8009daa: 60fb str r3, [r7, #12] huart->RxXferCount = 0U; 8009dac: 68fb ldr r3, [r7, #12] 8009dae: 2200 movs r2, #0 8009db0: f8a3 205a strh.w r2, [r3, #90] @ 0x5a huart->TxXferCount = 0U; 8009db4: 68fb ldr r3, [r7, #12] 8009db6: 2200 movs r2, #0 8009db8: f8a3 2052 strh.w r2, [r3, #82] @ 0x52 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered error callback*/ huart->ErrorCallback(huart); #else /*Call legacy weak error callback*/ HAL_UART_ErrorCallback(huart); 8009dbc: 68f8 ldr r0, [r7, #12] 8009dbe: f7ff fb05 bl 80093cc #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ } 8009dc2: bf00 nop 8009dc4: 3710 adds r7, #16 8009dc6: 46bd mov sp, r7 8009dc8: bd80 pop {r7, pc} 08009dca : * interruptions have been enabled by HAL_UART_Transmit_IT(). * @param huart UART handle. * @retval None */ static void UART_TxISR_8BIT(UART_HandleTypeDef *huart) { 8009dca: b480 push {r7} 8009dcc: b08f sub sp, #60 @ 0x3c 8009dce: af00 add r7, sp, #0 8009dd0: 6078 str r0, [r7, #4] /* Check that a Tx process is ongoing */ if (huart->gState == HAL_UART_STATE_BUSY_TX) 8009dd2: 687b ldr r3, [r7, #4] 8009dd4: 6fdb ldr r3, [r3, #124] @ 0x7c 8009dd6: 2b21 cmp r3, #33 @ 0x21 8009dd8: d14c bne.n 8009e74 { if (huart->TxXferCount == 0U) 8009dda: 687b ldr r3, [r7, #4] 8009ddc: f8b3 3052 ldrh.w r3, [r3, #82] @ 0x52 8009de0: b29b uxth r3, r3 8009de2: 2b00 cmp r3, #0 8009de4: d132 bne.n 8009e4c { /* Disable the UART Transmit Data Register Empty Interrupt */ #if defined(USART_CR1_FIFOEN) ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_TXEIE_TXFNFIE); #else ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_TXEIE); 8009de6: 687b ldr r3, [r7, #4] 8009de8: 681b ldr r3, [r3, #0] 8009dea: 623b str r3, [r7, #32] __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 8009dec: 6a3b ldr r3, [r7, #32] 8009dee: e853 3f00 ldrex r3, [r3] 8009df2: 61fb str r3, [r7, #28] return(result); 8009df4: 69fb ldr r3, [r7, #28] 8009df6: f023 0380 bic.w r3, r3, #128 @ 0x80 8009dfa: 637b str r3, [r7, #52] @ 0x34 8009dfc: 687b ldr r3, [r7, #4] 8009dfe: 681b ldr r3, [r3, #0] 8009e00: 461a mov r2, r3 8009e02: 6b7b ldr r3, [r7, #52] @ 0x34 8009e04: 62fb str r3, [r7, #44] @ 0x2c 8009e06: 62ba str r2, [r7, #40] @ 0x28 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 8009e08: 6ab9 ldr r1, [r7, #40] @ 0x28 8009e0a: 6afa ldr r2, [r7, #44] @ 0x2c 8009e0c: e841 2300 strex r3, r2, [r1] 8009e10: 627b str r3, [r7, #36] @ 0x24 return(result); 8009e12: 6a7b ldr r3, [r7, #36] @ 0x24 8009e14: 2b00 cmp r3, #0 8009e16: d1e6 bne.n 8009de6 #endif /* USART_CR1_FIFOEN */ /* Enable the UART Transmit Complete Interrupt */ ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_TCIE); 8009e18: 687b ldr r3, [r7, #4] 8009e1a: 681b ldr r3, [r3, #0] 8009e1c: 60fb str r3, [r7, #12] __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 8009e1e: 68fb ldr r3, [r7, #12] 8009e20: e853 3f00 ldrex r3, [r3] 8009e24: 60bb str r3, [r7, #8] return(result); 8009e26: 68bb ldr r3, [r7, #8] 8009e28: f043 0340 orr.w r3, r3, #64 @ 0x40 8009e2c: 633b str r3, [r7, #48] @ 0x30 8009e2e: 687b ldr r3, [r7, #4] 8009e30: 681b ldr r3, [r3, #0] 8009e32: 461a mov r2, r3 8009e34: 6b3b ldr r3, [r7, #48] @ 0x30 8009e36: 61bb str r3, [r7, #24] 8009e38: 617a str r2, [r7, #20] __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 8009e3a: 6979 ldr r1, [r7, #20] 8009e3c: 69ba ldr r2, [r7, #24] 8009e3e: e841 2300 strex r3, r2, [r1] 8009e42: 613b str r3, [r7, #16] return(result); 8009e44: 693b ldr r3, [r7, #16] 8009e46: 2b00 cmp r3, #0 8009e48: d1e6 bne.n 8009e18 huart->Instance->TDR = (uint8_t)(*huart->pTxBuffPtr & (uint8_t)0xFF); huart->pTxBuffPtr++; huart->TxXferCount--; } } } 8009e4a: e013 b.n 8009e74 huart->Instance->TDR = (uint8_t)(*huart->pTxBuffPtr & (uint8_t)0xFF); 8009e4c: 687b ldr r3, [r7, #4] 8009e4e: 6cdb ldr r3, [r3, #76] @ 0x4c 8009e50: 781a ldrb r2, [r3, #0] 8009e52: 687b ldr r3, [r7, #4] 8009e54: 681b ldr r3, [r3, #0] 8009e56: 851a strh r2, [r3, #40] @ 0x28 huart->pTxBuffPtr++; 8009e58: 687b ldr r3, [r7, #4] 8009e5a: 6cdb ldr r3, [r3, #76] @ 0x4c 8009e5c: 1c5a adds r2, r3, #1 8009e5e: 687b ldr r3, [r7, #4] 8009e60: 64da str r2, [r3, #76] @ 0x4c huart->TxXferCount--; 8009e62: 687b ldr r3, [r7, #4] 8009e64: f8b3 3052 ldrh.w r3, [r3, #82] @ 0x52 8009e68: b29b uxth r3, r3 8009e6a: 3b01 subs r3, #1 8009e6c: b29a uxth r2, r3 8009e6e: 687b ldr r3, [r7, #4] 8009e70: f8a3 2052 strh.w r2, [r3, #82] @ 0x52 } 8009e74: bf00 nop 8009e76: 373c adds r7, #60 @ 0x3c 8009e78: 46bd mov sp, r7 8009e7a: f85d 7b04 ldr.w r7, [sp], #4 8009e7e: 4770 bx lr 08009e80 : * interruptions have been enabled by HAL_UART_Transmit_IT(). * @param huart UART handle. * @retval None */ static void UART_TxISR_16BIT(UART_HandleTypeDef *huart) { 8009e80: b480 push {r7} 8009e82: b091 sub sp, #68 @ 0x44 8009e84: af00 add r7, sp, #0 8009e86: 6078 str r0, [r7, #4] const uint16_t *tmp; /* Check that a Tx process is ongoing */ if (huart->gState == HAL_UART_STATE_BUSY_TX) 8009e88: 687b ldr r3, [r7, #4] 8009e8a: 6fdb ldr r3, [r3, #124] @ 0x7c 8009e8c: 2b21 cmp r3, #33 @ 0x21 8009e8e: d151 bne.n 8009f34 { if (huart->TxXferCount == 0U) 8009e90: 687b ldr r3, [r7, #4] 8009e92: f8b3 3052 ldrh.w r3, [r3, #82] @ 0x52 8009e96: b29b uxth r3, r3 8009e98: 2b00 cmp r3, #0 8009e9a: d132 bne.n 8009f02 { /* Disable the UART Transmit Data Register Empty Interrupt */ #if defined(USART_CR1_FIFOEN) ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_TXEIE_TXFNFIE); #else ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_TXEIE); 8009e9c: 687b ldr r3, [r7, #4] 8009e9e: 681b ldr r3, [r3, #0] 8009ea0: 627b str r3, [r7, #36] @ 0x24 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 8009ea2: 6a7b ldr r3, [r7, #36] @ 0x24 8009ea4: e853 3f00 ldrex r3, [r3] 8009ea8: 623b str r3, [r7, #32] return(result); 8009eaa: 6a3b ldr r3, [r7, #32] 8009eac: f023 0380 bic.w r3, r3, #128 @ 0x80 8009eb0: 63bb str r3, [r7, #56] @ 0x38 8009eb2: 687b ldr r3, [r7, #4] 8009eb4: 681b ldr r3, [r3, #0] 8009eb6: 461a mov r2, r3 8009eb8: 6bbb ldr r3, [r7, #56] @ 0x38 8009eba: 633b str r3, [r7, #48] @ 0x30 8009ebc: 62fa str r2, [r7, #44] @ 0x2c __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 8009ebe: 6af9 ldr r1, [r7, #44] @ 0x2c 8009ec0: 6b3a ldr r2, [r7, #48] @ 0x30 8009ec2: e841 2300 strex r3, r2, [r1] 8009ec6: 62bb str r3, [r7, #40] @ 0x28 return(result); 8009ec8: 6abb ldr r3, [r7, #40] @ 0x28 8009eca: 2b00 cmp r3, #0 8009ecc: d1e6 bne.n 8009e9c #endif /* USART_CR1_FIFOEN */ /* Enable the UART Transmit Complete Interrupt */ ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_TCIE); 8009ece: 687b ldr r3, [r7, #4] 8009ed0: 681b ldr r3, [r3, #0] 8009ed2: 613b str r3, [r7, #16] __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 8009ed4: 693b ldr r3, [r7, #16] 8009ed6: e853 3f00 ldrex r3, [r3] 8009eda: 60fb str r3, [r7, #12] return(result); 8009edc: 68fb ldr r3, [r7, #12] 8009ede: f043 0340 orr.w r3, r3, #64 @ 0x40 8009ee2: 637b str r3, [r7, #52] @ 0x34 8009ee4: 687b ldr r3, [r7, #4] 8009ee6: 681b ldr r3, [r3, #0] 8009ee8: 461a mov r2, r3 8009eea: 6b7b ldr r3, [r7, #52] @ 0x34 8009eec: 61fb str r3, [r7, #28] 8009eee: 61ba str r2, [r7, #24] __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 8009ef0: 69b9 ldr r1, [r7, #24] 8009ef2: 69fa ldr r2, [r7, #28] 8009ef4: e841 2300 strex r3, r2, [r1] 8009ef8: 617b str r3, [r7, #20] return(result); 8009efa: 697b ldr r3, [r7, #20] 8009efc: 2b00 cmp r3, #0 8009efe: d1e6 bne.n 8009ece huart->Instance->TDR = (((uint32_t)(*tmp)) & 0x01FFUL); huart->pTxBuffPtr += 2U; huart->TxXferCount--; } } } 8009f00: e018 b.n 8009f34 tmp = (const uint16_t *) huart->pTxBuffPtr; 8009f02: 687b ldr r3, [r7, #4] 8009f04: 6cdb ldr r3, [r3, #76] @ 0x4c 8009f06: 63fb str r3, [r7, #60] @ 0x3c huart->Instance->TDR = (((uint32_t)(*tmp)) & 0x01FFUL); 8009f08: 6bfb ldr r3, [r7, #60] @ 0x3c 8009f0a: 881a ldrh r2, [r3, #0] 8009f0c: 687b ldr r3, [r7, #4] 8009f0e: 681b ldr r3, [r3, #0] 8009f10: f3c2 0208 ubfx r2, r2, #0, #9 8009f14: b292 uxth r2, r2 8009f16: 851a strh r2, [r3, #40] @ 0x28 huart->pTxBuffPtr += 2U; 8009f18: 687b ldr r3, [r7, #4] 8009f1a: 6cdb ldr r3, [r3, #76] @ 0x4c 8009f1c: 1c9a adds r2, r3, #2 8009f1e: 687b ldr r3, [r7, #4] 8009f20: 64da str r2, [r3, #76] @ 0x4c huart->TxXferCount--; 8009f22: 687b ldr r3, [r7, #4] 8009f24: f8b3 3052 ldrh.w r3, [r3, #82] @ 0x52 8009f28: b29b uxth r3, r3 8009f2a: 3b01 subs r3, #1 8009f2c: b29a uxth r2, r3 8009f2e: 687b ldr r3, [r7, #4] 8009f30: f8a3 2052 strh.w r2, [r3, #82] @ 0x52 } 8009f34: bf00 nop 8009f36: 3744 adds r7, #68 @ 0x44 8009f38: 46bd mov sp, r7 8009f3a: f85d 7b04 ldr.w r7, [sp], #4 8009f3e: 4770 bx lr 08009f40 : * @param huart pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval None */ static void UART_EndTransmit_IT(UART_HandleTypeDef *huart) { 8009f40: b580 push {r7, lr} 8009f42: b088 sub sp, #32 8009f44: af00 add r7, sp, #0 8009f46: 6078 str r0, [r7, #4] /* Disable the UART Transmit Complete Interrupt */ ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_TCIE); 8009f48: 687b ldr r3, [r7, #4] 8009f4a: 681b ldr r3, [r3, #0] 8009f4c: 60fb str r3, [r7, #12] __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 8009f4e: 68fb ldr r3, [r7, #12] 8009f50: e853 3f00 ldrex r3, [r3] 8009f54: 60bb str r3, [r7, #8] return(result); 8009f56: 68bb ldr r3, [r7, #8] 8009f58: f023 0340 bic.w r3, r3, #64 @ 0x40 8009f5c: 61fb str r3, [r7, #28] 8009f5e: 687b ldr r3, [r7, #4] 8009f60: 681b ldr r3, [r3, #0] 8009f62: 461a mov r2, r3 8009f64: 69fb ldr r3, [r7, #28] 8009f66: 61bb str r3, [r7, #24] 8009f68: 617a str r2, [r7, #20] __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 8009f6a: 6979 ldr r1, [r7, #20] 8009f6c: 69ba ldr r2, [r7, #24] 8009f6e: e841 2300 strex r3, r2, [r1] 8009f72: 613b str r3, [r7, #16] return(result); 8009f74: 693b ldr r3, [r7, #16] 8009f76: 2b00 cmp r3, #0 8009f78: d1e6 bne.n 8009f48 /* Tx process is ended, restore huart->gState to Ready */ huart->gState = HAL_UART_STATE_READY; 8009f7a: 687b ldr r3, [r7, #4] 8009f7c: 2220 movs r2, #32 8009f7e: 67da str r2, [r3, #124] @ 0x7c /* Cleat TxISR function pointer */ huart->TxISR = NULL; 8009f80: 687b ldr r3, [r7, #4] 8009f82: 2200 movs r2, #0 8009f84: 66da str r2, [r3, #108] @ 0x6c #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered Tx complete callback*/ huart->TxCpltCallback(huart); #else /*Call legacy weak Tx complete callback*/ HAL_UART_TxCpltCallback(huart); 8009f86: 6878 ldr r0, [r7, #4] 8009f88: f7f9 f926 bl 80031d8 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ } 8009f8c: bf00 nop 8009f8e: 3720 adds r7, #32 8009f90: 46bd mov sp, r7 8009f92: bd80 pop {r7, pc} 08009f94 : * @brief UART wakeup from Stop mode callback. * @param huart UART handle. * @retval None */ __weak void HAL_UARTEx_WakeupCallback(UART_HandleTypeDef *huart) { 8009f94: b480 push {r7} 8009f96: b083 sub sp, #12 8009f98: af00 add r7, sp, #0 8009f9a: 6078 str r0, [r7, #4] UNUSED(huart); /* NOTE : This function should not be modified, when the callback is needed, the HAL_UARTEx_WakeupCallback can be implemented in the user file. */ } 8009f9c: bf00 nop 8009f9e: 370c adds r7, #12 8009fa0: 46bd mov sp, r7 8009fa2: f85d 7b04 ldr.w r7, [sp], #4 8009fa6: 4770 bx lr 08009fa8 : * @param cfg pointer to a USB_OTG_CfgTypeDef structure that contains * the configuration information for the specified USBx peripheral. * @retval HAL status */ HAL_StatusTypeDef USB_CoreInit(USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef cfg) { 8009fa8: b084 sub sp, #16 8009faa: b580 push {r7, lr} 8009fac: b084 sub sp, #16 8009fae: af00 add r7, sp, #0 8009fb0: 6078 str r0, [r7, #4] 8009fb2: f107 001c add.w r0, r7, #28 8009fb6: e880 000e stmia.w r0, {r1, r2, r3} HAL_StatusTypeDef ret; /* Select FS Embedded PHY */ USBx->GUSBCFG |= USB_OTG_GUSBCFG_PHYSEL; 8009fba: 687b ldr r3, [r7, #4] 8009fbc: 68db ldr r3, [r3, #12] 8009fbe: f043 0240 orr.w r2, r3, #64 @ 0x40 8009fc2: 687b ldr r3, [r7, #4] 8009fc4: 60da str r2, [r3, #12] /* Reset after a PHY select */ ret = USB_CoreReset(USBx); 8009fc6: 6878 ldr r0, [r7, #4] 8009fc8: f000 fa68 bl 800a49c 8009fcc: 4603 mov r3, r0 8009fce: 73fb strb r3, [r7, #15] if (cfg.battery_charging_enable == 0U) 8009fd0: f897 3025 ldrb.w r3, [r7, #37] @ 0x25 8009fd4: 2b00 cmp r3, #0 8009fd6: d106 bne.n 8009fe6 { /* Activate the USB Transceiver */ USBx->GCCFG |= USB_OTG_GCCFG_PWRDWN; 8009fd8: 687b ldr r3, [r7, #4] 8009fda: 6b9b ldr r3, [r3, #56] @ 0x38 8009fdc: f443 3280 orr.w r2, r3, #65536 @ 0x10000 8009fe0: 687b ldr r3, [r7, #4] 8009fe2: 639a str r2, [r3, #56] @ 0x38 8009fe4: e005 b.n 8009ff2 } else { /* Deactivate the USB Transceiver */ USBx->GCCFG &= ~(USB_OTG_GCCFG_PWRDWN); 8009fe6: 687b ldr r3, [r7, #4] 8009fe8: 6b9b ldr r3, [r3, #56] @ 0x38 8009fea: f423 3280 bic.w r2, r3, #65536 @ 0x10000 8009fee: 687b ldr r3, [r7, #4] 8009ff0: 639a str r2, [r3, #56] @ 0x38 } return ret; 8009ff2: 7bfb ldrb r3, [r7, #15] } 8009ff4: 4618 mov r0, r3 8009ff6: 3710 adds r7, #16 8009ff8: 46bd mov sp, r7 8009ffa: e8bd 4080 ldmia.w sp!, {r7, lr} 8009ffe: b004 add sp, #16 800a000: 4770 bx lr 0800a002 : * Disable the controller's Global Int in the AHB Config reg * @param USBx Selected device * @retval HAL status */ HAL_StatusTypeDef USB_DisableGlobalInt(USB_OTG_GlobalTypeDef *USBx) { 800a002: b480 push {r7} 800a004: b083 sub sp, #12 800a006: af00 add r7, sp, #0 800a008: 6078 str r0, [r7, #4] USBx->GAHBCFG &= ~USB_OTG_GAHBCFG_GINT; 800a00a: 687b ldr r3, [r7, #4] 800a00c: 689b ldr r3, [r3, #8] 800a00e: f023 0201 bic.w r2, r3, #1 800a012: 687b ldr r3, [r7, #4] 800a014: 609a str r2, [r3, #8] return HAL_OK; 800a016: 2300 movs r3, #0 } 800a018: 4618 mov r0, r3 800a01a: 370c adds r7, #12 800a01c: 46bd mov sp, r7 800a01e: f85d 7b04 ldr.w r7, [sp], #4 800a022: 4770 bx lr 0800a024 : * @arg USB_DEVICE_MODE Peripheral mode * @arg USB_HOST_MODE Host mode * @retval HAL status */ HAL_StatusTypeDef USB_SetCurrentMode(USB_OTG_GlobalTypeDef *USBx, USB_ModeTypeDef mode) { 800a024: b580 push {r7, lr} 800a026: b084 sub sp, #16 800a028: af00 add r7, sp, #0 800a02a: 6078 str r0, [r7, #4] 800a02c: 460b mov r3, r1 800a02e: 70fb strb r3, [r7, #3] uint32_t ms = 0U; 800a030: 2300 movs r3, #0 800a032: 60fb str r3, [r7, #12] USBx->GUSBCFG &= ~(USB_OTG_GUSBCFG_FHMOD | USB_OTG_GUSBCFG_FDMOD); 800a034: 687b ldr r3, [r7, #4] 800a036: 68db ldr r3, [r3, #12] 800a038: f023 42c0 bic.w r2, r3, #1610612736 @ 0x60000000 800a03c: 687b ldr r3, [r7, #4] 800a03e: 60da str r2, [r3, #12] if (mode == USB_HOST_MODE) 800a040: 78fb ldrb r3, [r7, #3] 800a042: 2b01 cmp r3, #1 800a044: d115 bne.n 800a072 { USBx->GUSBCFG |= USB_OTG_GUSBCFG_FHMOD; 800a046: 687b ldr r3, [r7, #4] 800a048: 68db ldr r3, [r3, #12] 800a04a: f043 5200 orr.w r2, r3, #536870912 @ 0x20000000 800a04e: 687b ldr r3, [r7, #4] 800a050: 60da str r2, [r3, #12] do { HAL_Delay(10U); 800a052: 200a movs r0, #10 800a054: f7f9 fe0c bl 8003c70 ms += 10U; 800a058: 68fb ldr r3, [r7, #12] 800a05a: 330a adds r3, #10 800a05c: 60fb str r3, [r7, #12] } while ((USB_GetMode(USBx) != (uint32_t)USB_HOST_MODE) && (ms < HAL_USB_CURRENT_MODE_MAX_DELAY_MS)); 800a05e: 6878 ldr r0, [r7, #4] 800a060: f000 fa0e bl 800a480 800a064: 4603 mov r3, r0 800a066: 2b01 cmp r3, #1 800a068: d01e beq.n 800a0a8 800a06a: 68fb ldr r3, [r7, #12] 800a06c: 2bc7 cmp r3, #199 @ 0xc7 800a06e: d9f0 bls.n 800a052 800a070: e01a b.n 800a0a8 } else if (mode == USB_DEVICE_MODE) 800a072: 78fb ldrb r3, [r7, #3] 800a074: 2b00 cmp r3, #0 800a076: d115 bne.n 800a0a4 { USBx->GUSBCFG |= USB_OTG_GUSBCFG_FDMOD; 800a078: 687b ldr r3, [r7, #4] 800a07a: 68db ldr r3, [r3, #12] 800a07c: f043 4280 orr.w r2, r3, #1073741824 @ 0x40000000 800a080: 687b ldr r3, [r7, #4] 800a082: 60da str r2, [r3, #12] do { HAL_Delay(10U); 800a084: 200a movs r0, #10 800a086: f7f9 fdf3 bl 8003c70 ms += 10U; 800a08a: 68fb ldr r3, [r7, #12] 800a08c: 330a adds r3, #10 800a08e: 60fb str r3, [r7, #12] } while ((USB_GetMode(USBx) != (uint32_t)USB_DEVICE_MODE) && (ms < HAL_USB_CURRENT_MODE_MAX_DELAY_MS)); 800a090: 6878 ldr r0, [r7, #4] 800a092: f000 f9f5 bl 800a480 800a096: 4603 mov r3, r0 800a098: 2b00 cmp r3, #0 800a09a: d005 beq.n 800a0a8 800a09c: 68fb ldr r3, [r7, #12] 800a09e: 2bc7 cmp r3, #199 @ 0xc7 800a0a0: d9f0 bls.n 800a084 800a0a2: e001 b.n 800a0a8 } else { return HAL_ERROR; 800a0a4: 2301 movs r3, #1 800a0a6: e005 b.n 800a0b4 } if (ms == HAL_USB_CURRENT_MODE_MAX_DELAY_MS) 800a0a8: 68fb ldr r3, [r7, #12] 800a0aa: 2bc8 cmp r3, #200 @ 0xc8 800a0ac: d101 bne.n 800a0b2 { return HAL_ERROR; 800a0ae: 2301 movs r3, #1 800a0b0: e000 b.n 800a0b4 } return HAL_OK; 800a0b2: 2300 movs r3, #0 } 800a0b4: 4618 mov r0, r3 800a0b6: 3710 adds r7, #16 800a0b8: 46bd mov sp, r7 800a0ba: bd80 pop {r7, pc} 0800a0bc : * @param cfg pointer to a USB_OTG_CfgTypeDef structure that contains * the configuration information for the specified USBx peripheral. * @retval HAL status */ HAL_StatusTypeDef USB_DevInit(USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef cfg) { 800a0bc: b084 sub sp, #16 800a0be: b580 push {r7, lr} 800a0c0: b086 sub sp, #24 800a0c2: af00 add r7, sp, #0 800a0c4: 6078 str r0, [r7, #4] 800a0c6: f107 0024 add.w r0, r7, #36 @ 0x24 800a0ca: e880 000e stmia.w r0, {r1, r2, r3} HAL_StatusTypeDef ret = HAL_OK; 800a0ce: 2300 movs r3, #0 800a0d0: 75fb strb r3, [r7, #23] uint32_t USBx_BASE = (uint32_t)USBx; 800a0d2: 687b ldr r3, [r7, #4] 800a0d4: 60fb str r3, [r7, #12] uint32_t i; for (i = 0U; i < 15U; i++) 800a0d6: 2300 movs r3, #0 800a0d8: 613b str r3, [r7, #16] 800a0da: e009 b.n 800a0f0 { USBx->DIEPTXF[i] = 0U; 800a0dc: 687a ldr r2, [r7, #4] 800a0de: 693b ldr r3, [r7, #16] 800a0e0: 3340 adds r3, #64 @ 0x40 800a0e2: 009b lsls r3, r3, #2 800a0e4: 4413 add r3, r2 800a0e6: 2200 movs r2, #0 800a0e8: 605a str r2, [r3, #4] for (i = 0U; i < 15U; i++) 800a0ea: 693b ldr r3, [r7, #16] 800a0ec: 3301 adds r3, #1 800a0ee: 613b str r3, [r7, #16] 800a0f0: 693b ldr r3, [r7, #16] 800a0f2: 2b0e cmp r3, #14 800a0f4: d9f2 bls.n 800a0dc } /* VBUS Sensing setup */ if (cfg.vbus_sensing_enable == 0U) 800a0f6: f897 302e ldrb.w r3, [r7, #46] @ 0x2e 800a0fa: 2b00 cmp r3, #0 800a0fc: d11c bne.n 800a138 { USBx_DEVICE->DCTL |= USB_OTG_DCTL_SDIS; 800a0fe: 68fb ldr r3, [r7, #12] 800a100: f503 6300 add.w r3, r3, #2048 @ 0x800 800a104: 685b ldr r3, [r3, #4] 800a106: 68fa ldr r2, [r7, #12] 800a108: f502 6200 add.w r2, r2, #2048 @ 0x800 800a10c: f043 0302 orr.w r3, r3, #2 800a110: 6053 str r3, [r2, #4] /* Deactivate VBUS Sensing B */ USBx->GCCFG &= ~USB_OTG_GCCFG_VBDEN; 800a112: 687b ldr r3, [r7, #4] 800a114: 6b9b ldr r3, [r3, #56] @ 0x38 800a116: f423 1200 bic.w r2, r3, #2097152 @ 0x200000 800a11a: 687b ldr r3, [r7, #4] 800a11c: 639a str r2, [r3, #56] @ 0x38 /* B-peripheral session valid override enable */ USBx->GOTGCTL |= USB_OTG_GOTGCTL_BVALOEN; 800a11e: 687b ldr r3, [r7, #4] 800a120: 681b ldr r3, [r3, #0] 800a122: f043 0240 orr.w r2, r3, #64 @ 0x40 800a126: 687b ldr r3, [r7, #4] 800a128: 601a str r2, [r3, #0] USBx->GOTGCTL |= USB_OTG_GOTGCTL_BVALOVAL; 800a12a: 687b ldr r3, [r7, #4] 800a12c: 681b ldr r3, [r3, #0] 800a12e: f043 0280 orr.w r2, r3, #128 @ 0x80 800a132: 687b ldr r3, [r7, #4] 800a134: 601a str r2, [r3, #0] 800a136: e005 b.n 800a144 } else { /* Enable HW VBUS sensing */ USBx->GCCFG |= USB_OTG_GCCFG_VBDEN; 800a138: 687b ldr r3, [r7, #4] 800a13a: 6b9b ldr r3, [r3, #56] @ 0x38 800a13c: f443 1200 orr.w r2, r3, #2097152 @ 0x200000 800a140: 687b ldr r3, [r7, #4] 800a142: 639a str r2, [r3, #56] @ 0x38 } /* Restart the Phy Clock */ USBx_PCGCCTL = 0U; 800a144: 68fb ldr r3, [r7, #12] 800a146: f503 6360 add.w r3, r3, #3584 @ 0xe00 800a14a: 461a mov r2, r3 800a14c: 2300 movs r3, #0 800a14e: 6013 str r3, [r2, #0] /* Set Core speed to Full speed mode */ (void)USB_SetDevSpeed(USBx, USB_OTG_SPEED_FULL); 800a150: 2103 movs r1, #3 800a152: 6878 ldr r0, [r7, #4] 800a154: f000 f95a bl 800a40c /* Flush the FIFOs */ if (USB_FlushTxFifo(USBx, 0x10U) != HAL_OK) /* all Tx FIFOs */ 800a158: 2110 movs r1, #16 800a15a: 6878 ldr r0, [r7, #4] 800a15c: f000 f8f6 bl 800a34c 800a160: 4603 mov r3, r0 800a162: 2b00 cmp r3, #0 800a164: d001 beq.n 800a16a { ret = HAL_ERROR; 800a166: 2301 movs r3, #1 800a168: 75fb strb r3, [r7, #23] } if (USB_FlushRxFifo(USBx) != HAL_OK) 800a16a: 6878 ldr r0, [r7, #4] 800a16c: f000 f920 bl 800a3b0 800a170: 4603 mov r3, r0 800a172: 2b00 cmp r3, #0 800a174: d001 beq.n 800a17a { ret = HAL_ERROR; 800a176: 2301 movs r3, #1 800a178: 75fb strb r3, [r7, #23] } /* Clear all pending Device Interrupts */ USBx_DEVICE->DIEPMSK = 0U; 800a17a: 68fb ldr r3, [r7, #12] 800a17c: f503 6300 add.w r3, r3, #2048 @ 0x800 800a180: 461a mov r2, r3 800a182: 2300 movs r3, #0 800a184: 6113 str r3, [r2, #16] USBx_DEVICE->DOEPMSK = 0U; 800a186: 68fb ldr r3, [r7, #12] 800a188: f503 6300 add.w r3, r3, #2048 @ 0x800 800a18c: 461a mov r2, r3 800a18e: 2300 movs r3, #0 800a190: 6153 str r3, [r2, #20] USBx_DEVICE->DAINTMSK = 0U; 800a192: 68fb ldr r3, [r7, #12] 800a194: f503 6300 add.w r3, r3, #2048 @ 0x800 800a198: 461a mov r2, r3 800a19a: 2300 movs r3, #0 800a19c: 61d3 str r3, [r2, #28] for (i = 0U; i < cfg.dev_endpoints; i++) 800a19e: 2300 movs r3, #0 800a1a0: 613b str r3, [r7, #16] 800a1a2: e043 b.n 800a22c { if ((USBx_INEP(i)->DIEPCTL & USB_OTG_DIEPCTL_EPENA) == USB_OTG_DIEPCTL_EPENA) 800a1a4: 693b ldr r3, [r7, #16] 800a1a6: 015a lsls r2, r3, #5 800a1a8: 68fb ldr r3, [r7, #12] 800a1aa: 4413 add r3, r2 800a1ac: f503 6310 add.w r3, r3, #2304 @ 0x900 800a1b0: 681b ldr r3, [r3, #0] 800a1b2: f003 4300 and.w r3, r3, #2147483648 @ 0x80000000 800a1b6: f1b3 4f00 cmp.w r3, #2147483648 @ 0x80000000 800a1ba: d118 bne.n 800a1ee { if (i == 0U) 800a1bc: 693b ldr r3, [r7, #16] 800a1be: 2b00 cmp r3, #0 800a1c0: d10a bne.n 800a1d8 { USBx_INEP(i)->DIEPCTL = USB_OTG_DIEPCTL_SNAK; 800a1c2: 693b ldr r3, [r7, #16] 800a1c4: 015a lsls r2, r3, #5 800a1c6: 68fb ldr r3, [r7, #12] 800a1c8: 4413 add r3, r2 800a1ca: f503 6310 add.w r3, r3, #2304 @ 0x900 800a1ce: 461a mov r2, r3 800a1d0: f04f 6300 mov.w r3, #134217728 @ 0x8000000 800a1d4: 6013 str r3, [r2, #0] 800a1d6: e013 b.n 800a200 } else { USBx_INEP(i)->DIEPCTL = USB_OTG_DIEPCTL_EPDIS | USB_OTG_DIEPCTL_SNAK; 800a1d8: 693b ldr r3, [r7, #16] 800a1da: 015a lsls r2, r3, #5 800a1dc: 68fb ldr r3, [r7, #12] 800a1de: 4413 add r3, r2 800a1e0: f503 6310 add.w r3, r3, #2304 @ 0x900 800a1e4: 461a mov r2, r3 800a1e6: f04f 4390 mov.w r3, #1207959552 @ 0x48000000 800a1ea: 6013 str r3, [r2, #0] 800a1ec: e008 b.n 800a200 } } else { USBx_INEP(i)->DIEPCTL = 0U; 800a1ee: 693b ldr r3, [r7, #16] 800a1f0: 015a lsls r2, r3, #5 800a1f2: 68fb ldr r3, [r7, #12] 800a1f4: 4413 add r3, r2 800a1f6: f503 6310 add.w r3, r3, #2304 @ 0x900 800a1fa: 461a mov r2, r3 800a1fc: 2300 movs r3, #0 800a1fe: 6013 str r3, [r2, #0] } USBx_INEP(i)->DIEPTSIZ = 0U; 800a200: 693b ldr r3, [r7, #16] 800a202: 015a lsls r2, r3, #5 800a204: 68fb ldr r3, [r7, #12] 800a206: 4413 add r3, r2 800a208: f503 6310 add.w r3, r3, #2304 @ 0x900 800a20c: 461a mov r2, r3 800a20e: 2300 movs r3, #0 800a210: 6113 str r3, [r2, #16] USBx_INEP(i)->DIEPINT = 0xFB7FU; 800a212: 693b ldr r3, [r7, #16] 800a214: 015a lsls r2, r3, #5 800a216: 68fb ldr r3, [r7, #12] 800a218: 4413 add r3, r2 800a21a: f503 6310 add.w r3, r3, #2304 @ 0x900 800a21e: 461a mov r2, r3 800a220: f64f 337f movw r3, #64383 @ 0xfb7f 800a224: 6093 str r3, [r2, #8] for (i = 0U; i < cfg.dev_endpoints; i++) 800a226: 693b ldr r3, [r7, #16] 800a228: 3301 adds r3, #1 800a22a: 613b str r3, [r7, #16] 800a22c: f897 3024 ldrb.w r3, [r7, #36] @ 0x24 800a230: 461a mov r2, r3 800a232: 693b ldr r3, [r7, #16] 800a234: 4293 cmp r3, r2 800a236: d3b5 bcc.n 800a1a4 } for (i = 0U; i < cfg.dev_endpoints; i++) 800a238: 2300 movs r3, #0 800a23a: 613b str r3, [r7, #16] 800a23c: e043 b.n 800a2c6 { if ((USBx_OUTEP(i)->DOEPCTL & USB_OTG_DOEPCTL_EPENA) == USB_OTG_DOEPCTL_EPENA) 800a23e: 693b ldr r3, [r7, #16] 800a240: 015a lsls r2, r3, #5 800a242: 68fb ldr r3, [r7, #12] 800a244: 4413 add r3, r2 800a246: f503 6330 add.w r3, r3, #2816 @ 0xb00 800a24a: 681b ldr r3, [r3, #0] 800a24c: f003 4300 and.w r3, r3, #2147483648 @ 0x80000000 800a250: f1b3 4f00 cmp.w r3, #2147483648 @ 0x80000000 800a254: d118 bne.n 800a288 { if (i == 0U) 800a256: 693b ldr r3, [r7, #16] 800a258: 2b00 cmp r3, #0 800a25a: d10a bne.n 800a272 { USBx_OUTEP(i)->DOEPCTL = USB_OTG_DOEPCTL_SNAK; 800a25c: 693b ldr r3, [r7, #16] 800a25e: 015a lsls r2, r3, #5 800a260: 68fb ldr r3, [r7, #12] 800a262: 4413 add r3, r2 800a264: f503 6330 add.w r3, r3, #2816 @ 0xb00 800a268: 461a mov r2, r3 800a26a: f04f 6300 mov.w r3, #134217728 @ 0x8000000 800a26e: 6013 str r3, [r2, #0] 800a270: e013 b.n 800a29a } else { USBx_OUTEP(i)->DOEPCTL = USB_OTG_DOEPCTL_EPDIS | USB_OTG_DOEPCTL_SNAK; 800a272: 693b ldr r3, [r7, #16] 800a274: 015a lsls r2, r3, #5 800a276: 68fb ldr r3, [r7, #12] 800a278: 4413 add r3, r2 800a27a: f503 6330 add.w r3, r3, #2816 @ 0xb00 800a27e: 461a mov r2, r3 800a280: f04f 4390 mov.w r3, #1207959552 @ 0x48000000 800a284: 6013 str r3, [r2, #0] 800a286: e008 b.n 800a29a } } else { USBx_OUTEP(i)->DOEPCTL = 0U; 800a288: 693b ldr r3, [r7, #16] 800a28a: 015a lsls r2, r3, #5 800a28c: 68fb ldr r3, [r7, #12] 800a28e: 4413 add r3, r2 800a290: f503 6330 add.w r3, r3, #2816 @ 0xb00 800a294: 461a mov r2, r3 800a296: 2300 movs r3, #0 800a298: 6013 str r3, [r2, #0] } USBx_OUTEP(i)->DOEPTSIZ = 0U; 800a29a: 693b ldr r3, [r7, #16] 800a29c: 015a lsls r2, r3, #5 800a29e: 68fb ldr r3, [r7, #12] 800a2a0: 4413 add r3, r2 800a2a2: f503 6330 add.w r3, r3, #2816 @ 0xb00 800a2a6: 461a mov r2, r3 800a2a8: 2300 movs r3, #0 800a2aa: 6113 str r3, [r2, #16] USBx_OUTEP(i)->DOEPINT = 0xFB7FU; 800a2ac: 693b ldr r3, [r7, #16] 800a2ae: 015a lsls r2, r3, #5 800a2b0: 68fb ldr r3, [r7, #12] 800a2b2: 4413 add r3, r2 800a2b4: f503 6330 add.w r3, r3, #2816 @ 0xb00 800a2b8: 461a mov r2, r3 800a2ba: f64f 337f movw r3, #64383 @ 0xfb7f 800a2be: 6093 str r3, [r2, #8] for (i = 0U; i < cfg.dev_endpoints; i++) 800a2c0: 693b ldr r3, [r7, #16] 800a2c2: 3301 adds r3, #1 800a2c4: 613b str r3, [r7, #16] 800a2c6: f897 3024 ldrb.w r3, [r7, #36] @ 0x24 800a2ca: 461a mov r2, r3 800a2cc: 693b ldr r3, [r7, #16] 800a2ce: 4293 cmp r3, r2 800a2d0: d3b5 bcc.n 800a23e } USBx_DEVICE->DIEPMSK &= ~(USB_OTG_DIEPMSK_TXFURM); 800a2d2: 68fb ldr r3, [r7, #12] 800a2d4: f503 6300 add.w r3, r3, #2048 @ 0x800 800a2d8: 691b ldr r3, [r3, #16] 800a2da: 68fa ldr r2, [r7, #12] 800a2dc: f502 6200 add.w r2, r2, #2048 @ 0x800 800a2e0: f423 7380 bic.w r3, r3, #256 @ 0x100 800a2e4: 6113 str r3, [r2, #16] /* Disable all interrupts. */ USBx->GINTMSK = 0U; 800a2e6: 687b ldr r3, [r7, #4] 800a2e8: 2200 movs r2, #0 800a2ea: 619a str r2, [r3, #24] /* Clear any pending interrupts */ USBx->GINTSTS = 0xBFFFFFFFU; 800a2ec: 687b ldr r3, [r7, #4] 800a2ee: f06f 4280 mvn.w r2, #1073741824 @ 0x40000000 800a2f2: 615a str r2, [r3, #20] /* Enable the common interrupts */ USBx->GINTMSK |= USB_OTG_GINTMSK_RXFLVLM; 800a2f4: 687b ldr r3, [r7, #4] 800a2f6: 699b ldr r3, [r3, #24] 800a2f8: f043 0210 orr.w r2, r3, #16 800a2fc: 687b ldr r3, [r7, #4] 800a2fe: 619a str r2, [r3, #24] /* Enable interrupts matching to the Device mode ONLY */ USBx->GINTMSK |= USB_OTG_GINTMSK_USBSUSPM | USB_OTG_GINTMSK_USBRST | 800a300: 687b ldr r3, [r7, #4] 800a302: 699a ldr r2, [r3, #24] 800a304: 4b10 ldr r3, [pc, #64] @ (800a348 ) 800a306: 4313 orrs r3, r2 800a308: 687a ldr r2, [r7, #4] 800a30a: 6193 str r3, [r2, #24] USB_OTG_GINTMSK_ENUMDNEM | USB_OTG_GINTMSK_IEPINT | USB_OTG_GINTMSK_OEPINT | USB_OTG_GINTMSK_IISOIXFRM | USB_OTG_GINTMSK_PXFRM_IISOOXFRM | USB_OTG_GINTMSK_WUIM; if (cfg.Sof_enable != 0U) 800a30c: f897 302a ldrb.w r3, [r7, #42] @ 0x2a 800a310: 2b00 cmp r3, #0 800a312: d005 beq.n 800a320 { USBx->GINTMSK |= USB_OTG_GINTMSK_SOFM; 800a314: 687b ldr r3, [r7, #4] 800a316: 699b ldr r3, [r3, #24] 800a318: f043 0208 orr.w r2, r3, #8 800a31c: 687b ldr r3, [r7, #4] 800a31e: 619a str r2, [r3, #24] } if (cfg.vbus_sensing_enable == 1U) 800a320: f897 302e ldrb.w r3, [r7, #46] @ 0x2e 800a324: 2b01 cmp r3, #1 800a326: d107 bne.n 800a338 { USBx->GINTMSK |= (USB_OTG_GINTMSK_SRQIM | USB_OTG_GINTMSK_OTGINT); 800a328: 687b ldr r3, [r7, #4] 800a32a: 699b ldr r3, [r3, #24] 800a32c: f043 4380 orr.w r3, r3, #1073741824 @ 0x40000000 800a330: f043 0304 orr.w r3, r3, #4 800a334: 687a ldr r2, [r7, #4] 800a336: 6193 str r3, [r2, #24] } return ret; 800a338: 7dfb ldrb r3, [r7, #23] } 800a33a: 4618 mov r0, r3 800a33c: 3718 adds r7, #24 800a33e: 46bd mov sp, r7 800a340: e8bd 4080 ldmia.w sp!, {r7, lr} 800a344: b004 add sp, #16 800a346: 4770 bx lr 800a348: 803c3800 .word 0x803c3800 0800a34c : * This parameter can be a value from 1 to 15 15 means Flush all Tx FIFOs * @retval HAL status */ HAL_StatusTypeDef USB_FlushTxFifo(USB_OTG_GlobalTypeDef *USBx, uint32_t num) { 800a34c: b480 push {r7} 800a34e: b085 sub sp, #20 800a350: af00 add r7, sp, #0 800a352: 6078 str r0, [r7, #4] 800a354: 6039 str r1, [r7, #0] __IO uint32_t count = 0U; 800a356: 2300 movs r3, #0 800a358: 60fb str r3, [r7, #12] /* Wait for AHB master IDLE state. */ do { count++; 800a35a: 68fb ldr r3, [r7, #12] 800a35c: 3301 adds r3, #1 800a35e: 60fb str r3, [r7, #12] if (count > HAL_USB_TIMEOUT) 800a360: 68fb ldr r3, [r7, #12] 800a362: f1b3 6f70 cmp.w r3, #251658240 @ 0xf000000 800a366: d901 bls.n 800a36c { return HAL_TIMEOUT; 800a368: 2303 movs r3, #3 800a36a: e01b b.n 800a3a4 } } while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_AHBIDL) == 0U); 800a36c: 687b ldr r3, [r7, #4] 800a36e: 691b ldr r3, [r3, #16] 800a370: 2b00 cmp r3, #0 800a372: daf2 bge.n 800a35a /* Flush TX Fifo */ count = 0U; 800a374: 2300 movs r3, #0 800a376: 60fb str r3, [r7, #12] USBx->GRSTCTL = (USB_OTG_GRSTCTL_TXFFLSH | (num << 6)); 800a378: 683b ldr r3, [r7, #0] 800a37a: 019b lsls r3, r3, #6 800a37c: f043 0220 orr.w r2, r3, #32 800a380: 687b ldr r3, [r7, #4] 800a382: 611a str r2, [r3, #16] do { count++; 800a384: 68fb ldr r3, [r7, #12] 800a386: 3301 adds r3, #1 800a388: 60fb str r3, [r7, #12] if (count > HAL_USB_TIMEOUT) 800a38a: 68fb ldr r3, [r7, #12] 800a38c: f1b3 6f70 cmp.w r3, #251658240 @ 0xf000000 800a390: d901 bls.n 800a396 { return HAL_TIMEOUT; 800a392: 2303 movs r3, #3 800a394: e006 b.n 800a3a4 } } while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_TXFFLSH) == USB_OTG_GRSTCTL_TXFFLSH); 800a396: 687b ldr r3, [r7, #4] 800a398: 691b ldr r3, [r3, #16] 800a39a: f003 0320 and.w r3, r3, #32 800a39e: 2b20 cmp r3, #32 800a3a0: d0f0 beq.n 800a384 return HAL_OK; 800a3a2: 2300 movs r3, #0 } 800a3a4: 4618 mov r0, r3 800a3a6: 3714 adds r7, #20 800a3a8: 46bd mov sp, r7 800a3aa: f85d 7b04 ldr.w r7, [sp], #4 800a3ae: 4770 bx lr 0800a3b0 : * @brief USB_FlushRxFifo Flush Rx FIFO * @param USBx Selected device * @retval HAL status */ HAL_StatusTypeDef USB_FlushRxFifo(USB_OTG_GlobalTypeDef *USBx) { 800a3b0: b480 push {r7} 800a3b2: b085 sub sp, #20 800a3b4: af00 add r7, sp, #0 800a3b6: 6078 str r0, [r7, #4] __IO uint32_t count = 0U; 800a3b8: 2300 movs r3, #0 800a3ba: 60fb str r3, [r7, #12] /* Wait for AHB master IDLE state. */ do { count++; 800a3bc: 68fb ldr r3, [r7, #12] 800a3be: 3301 adds r3, #1 800a3c0: 60fb str r3, [r7, #12] if (count > HAL_USB_TIMEOUT) 800a3c2: 68fb ldr r3, [r7, #12] 800a3c4: f1b3 6f70 cmp.w r3, #251658240 @ 0xf000000 800a3c8: d901 bls.n 800a3ce { return HAL_TIMEOUT; 800a3ca: 2303 movs r3, #3 800a3cc: e018 b.n 800a400 } } while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_AHBIDL) == 0U); 800a3ce: 687b ldr r3, [r7, #4] 800a3d0: 691b ldr r3, [r3, #16] 800a3d2: 2b00 cmp r3, #0 800a3d4: daf2 bge.n 800a3bc /* Flush RX Fifo */ count = 0U; 800a3d6: 2300 movs r3, #0 800a3d8: 60fb str r3, [r7, #12] USBx->GRSTCTL = USB_OTG_GRSTCTL_RXFFLSH; 800a3da: 687b ldr r3, [r7, #4] 800a3dc: 2210 movs r2, #16 800a3de: 611a str r2, [r3, #16] do { count++; 800a3e0: 68fb ldr r3, [r7, #12] 800a3e2: 3301 adds r3, #1 800a3e4: 60fb str r3, [r7, #12] if (count > HAL_USB_TIMEOUT) 800a3e6: 68fb ldr r3, [r7, #12] 800a3e8: f1b3 6f70 cmp.w r3, #251658240 @ 0xf000000 800a3ec: d901 bls.n 800a3f2 { return HAL_TIMEOUT; 800a3ee: 2303 movs r3, #3 800a3f0: e006 b.n 800a400 } } while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_RXFFLSH) == USB_OTG_GRSTCTL_RXFFLSH); 800a3f2: 687b ldr r3, [r7, #4] 800a3f4: 691b ldr r3, [r3, #16] 800a3f6: f003 0310 and.w r3, r3, #16 800a3fa: 2b10 cmp r3, #16 800a3fc: d0f0 beq.n 800a3e0 return HAL_OK; 800a3fe: 2300 movs r3, #0 } 800a400: 4618 mov r0, r3 800a402: 3714 adds r7, #20 800a404: 46bd mov sp, r7 800a406: f85d 7b04 ldr.w r7, [sp], #4 800a40a: 4770 bx lr 0800a40c : * This parameter can be one of these values: * @arg USB_OTG_SPEED_FULL: Full speed mode * @retval Hal status */ HAL_StatusTypeDef USB_SetDevSpeed(const USB_OTG_GlobalTypeDef *USBx, uint8_t speed) { 800a40c: b480 push {r7} 800a40e: b085 sub sp, #20 800a410: af00 add r7, sp, #0 800a412: 6078 str r0, [r7, #4] 800a414: 460b mov r3, r1 800a416: 70fb strb r3, [r7, #3] uint32_t USBx_BASE = (uint32_t)USBx; 800a418: 687b ldr r3, [r7, #4] 800a41a: 60fb str r3, [r7, #12] USBx_DEVICE->DCFG |= speed; 800a41c: 68fb ldr r3, [r7, #12] 800a41e: f503 6300 add.w r3, r3, #2048 @ 0x800 800a422: 681a ldr r2, [r3, #0] 800a424: 78fb ldrb r3, [r7, #3] 800a426: 68f9 ldr r1, [r7, #12] 800a428: f501 6100 add.w r1, r1, #2048 @ 0x800 800a42c: 4313 orrs r3, r2 800a42e: 600b str r3, [r1, #0] return HAL_OK; 800a430: 2300 movs r3, #0 } 800a432: 4618 mov r0, r3 800a434: 3714 adds r7, #20 800a436: 46bd mov sp, r7 800a438: f85d 7b04 ldr.w r7, [sp], #4 800a43c: 4770 bx lr 0800a43e : * @brief USB_DevDisconnect : Disconnect the USB device by disabling Rpu * @param USBx Selected device * @retval HAL status */ HAL_StatusTypeDef USB_DevDisconnect(const USB_OTG_GlobalTypeDef *USBx) { 800a43e: b480 push {r7} 800a440: b085 sub sp, #20 800a442: af00 add r7, sp, #0 800a444: 6078 str r0, [r7, #4] uint32_t USBx_BASE = (uint32_t)USBx; 800a446: 687b ldr r3, [r7, #4] 800a448: 60fb str r3, [r7, #12] /* In case phy is stopped, ensure to ungate and restore the phy CLK */ USBx_PCGCCTL &= ~(USB_OTG_PCGCCTL_STOPCLK | USB_OTG_PCGCCTL_GATECLK); 800a44a: 68fb ldr r3, [r7, #12] 800a44c: f503 6360 add.w r3, r3, #3584 @ 0xe00 800a450: 681b ldr r3, [r3, #0] 800a452: 68fa ldr r2, [r7, #12] 800a454: f502 6260 add.w r2, r2, #3584 @ 0xe00 800a458: f023 0303 bic.w r3, r3, #3 800a45c: 6013 str r3, [r2, #0] USBx_DEVICE->DCTL |= USB_OTG_DCTL_SDIS; 800a45e: 68fb ldr r3, [r7, #12] 800a460: f503 6300 add.w r3, r3, #2048 @ 0x800 800a464: 685b ldr r3, [r3, #4] 800a466: 68fa ldr r2, [r7, #12] 800a468: f502 6200 add.w r2, r2, #2048 @ 0x800 800a46c: f043 0302 orr.w r3, r3, #2 800a470: 6053 str r3, [r2, #4] return HAL_OK; 800a472: 2300 movs r3, #0 } 800a474: 4618 mov r0, r3 800a476: 3714 adds r7, #20 800a478: 46bd mov sp, r7 800a47a: f85d 7b04 ldr.w r7, [sp], #4 800a47e: 4770 bx lr 0800a480 : * This parameter can be one of these values: * 0 : Host * 1 : Device */ uint32_t USB_GetMode(const USB_OTG_GlobalTypeDef *USBx) { 800a480: b480 push {r7} 800a482: b083 sub sp, #12 800a484: af00 add r7, sp, #0 800a486: 6078 str r0, [r7, #4] return ((USBx->GINTSTS) & 0x1U); 800a488: 687b ldr r3, [r7, #4] 800a48a: 695b ldr r3, [r3, #20] 800a48c: f003 0301 and.w r3, r3, #1 } 800a490: 4618 mov r0, r3 800a492: 370c adds r7, #12 800a494: 46bd mov sp, r7 800a496: f85d 7b04 ldr.w r7, [sp], #4 800a49a: 4770 bx lr 0800a49c : * @brief Reset the USB Core (needed after USB clock settings change) * @param USBx Selected device * @retval HAL status */ static HAL_StatusTypeDef USB_CoreReset(USB_OTG_GlobalTypeDef *USBx) { 800a49c: b480 push {r7} 800a49e: b085 sub sp, #20 800a4a0: af00 add r7, sp, #0 800a4a2: 6078 str r0, [r7, #4] __IO uint32_t count = 0U; 800a4a4: 2300 movs r3, #0 800a4a6: 60fb str r3, [r7, #12] /* Wait for AHB master IDLE state. */ do { count++; 800a4a8: 68fb ldr r3, [r7, #12] 800a4aa: 3301 adds r3, #1 800a4ac: 60fb str r3, [r7, #12] if (count > HAL_USB_TIMEOUT) 800a4ae: 68fb ldr r3, [r7, #12] 800a4b0: f1b3 6f70 cmp.w r3, #251658240 @ 0xf000000 800a4b4: d901 bls.n 800a4ba { return HAL_TIMEOUT; 800a4b6: 2303 movs r3, #3 800a4b8: e01b b.n 800a4f2 } } while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_AHBIDL) == 0U); 800a4ba: 687b ldr r3, [r7, #4] 800a4bc: 691b ldr r3, [r3, #16] 800a4be: 2b00 cmp r3, #0 800a4c0: daf2 bge.n 800a4a8 /* Core Soft Reset */ count = 0U; 800a4c2: 2300 movs r3, #0 800a4c4: 60fb str r3, [r7, #12] USBx->GRSTCTL |= USB_OTG_GRSTCTL_CSRST; 800a4c6: 687b ldr r3, [r7, #4] 800a4c8: 691b ldr r3, [r3, #16] 800a4ca: f043 0201 orr.w r2, r3, #1 800a4ce: 687b ldr r3, [r7, #4] 800a4d0: 611a str r2, [r3, #16] do { count++; 800a4d2: 68fb ldr r3, [r7, #12] 800a4d4: 3301 adds r3, #1 800a4d6: 60fb str r3, [r7, #12] if (count > HAL_USB_TIMEOUT) 800a4d8: 68fb ldr r3, [r7, #12] 800a4da: f1b3 6f70 cmp.w r3, #251658240 @ 0xf000000 800a4de: d901 bls.n 800a4e4 { return HAL_TIMEOUT; 800a4e0: 2303 movs r3, #3 800a4e2: e006 b.n 800a4f2 } } while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_CSRST) == USB_OTG_GRSTCTL_CSRST); 800a4e4: 687b ldr r3, [r7, #4] 800a4e6: 691b ldr r3, [r3, #16] 800a4e8: f003 0301 and.w r3, r3, #1 800a4ec: 2b01 cmp r3, #1 800a4ee: d0f0 beq.n 800a4d2 return HAL_OK; 800a4f0: 2300 movs r3, #0 } 800a4f2: 4618 mov r0, r3 800a4f4: 3714 adds r7, #20 800a4f6: 46bd mov sp, r7 800a4f8: f85d 7b04 ldr.w r7, [sp], #4 800a4fc: 4770 bx lr 0800a4fe : * @param a: character to convert * @retval integer value. */ static uint8_t Hex2Num(char a) { 800a4fe: b480 push {r7} 800a500: b083 sub sp, #12 800a502: af00 add r7, sp, #0 800a504: 4603 mov r3, r0 800a506: 71fb strb r3, [r7, #7] if (a >= '0' && a <= '9') { /* Char is num */ 800a508: 79fb ldrb r3, [r7, #7] 800a50a: 2b2f cmp r3, #47 @ 0x2f 800a50c: d906 bls.n 800a51c 800a50e: 79fb ldrb r3, [r7, #7] 800a510: 2b39 cmp r3, #57 @ 0x39 800a512: d803 bhi.n 800a51c return a - '0'; 800a514: 79fb ldrb r3, [r7, #7] 800a516: 3b30 subs r3, #48 @ 0x30 800a518: b2db uxtb r3, r3 800a51a: e014 b.n 800a546 } else if (a >= 'a' && a <= 'f') { /* Char is lowercase character A - Z (hex) */ 800a51c: 79fb ldrb r3, [r7, #7] 800a51e: 2b60 cmp r3, #96 @ 0x60 800a520: d906 bls.n 800a530 800a522: 79fb ldrb r3, [r7, #7] 800a524: 2b66 cmp r3, #102 @ 0x66 800a526: d803 bhi.n 800a530 return (a - 'a') + 10; 800a528: 79fb ldrb r3, [r7, #7] 800a52a: 3b57 subs r3, #87 @ 0x57 800a52c: b2db uxtb r3, r3 800a52e: e00a b.n 800a546 } else if (a >= 'A' && a <= 'F') { /* Char is uppercase character A - Z (hex) */ 800a530: 79fb ldrb r3, [r7, #7] 800a532: 2b40 cmp r3, #64 @ 0x40 800a534: d906 bls.n 800a544 800a536: 79fb ldrb r3, [r7, #7] 800a538: 2b46 cmp r3, #70 @ 0x46 800a53a: d803 bhi.n 800a544 return (a - 'A') + 10; 800a53c: 79fb ldrb r3, [r7, #7] 800a53e: 3b37 subs r3, #55 @ 0x37 800a540: b2db uxtb r3, r3 800a542: e000 b.n 800a546 } return 0; 800a544: 2300 movs r3, #0 } 800a546: 4618 mov r0, r3 800a548: 370c adds r7, #12 800a54a: 46bd mov sp, r7 800a54c: f85d 7b04 ldr.w r7, [sp], #4 800a550: 4770 bx lr 0800a552 : * @param ptr: pointer to string * @param cnt: pointer to the number of parsed digit * @retval Hex value. */ static uint32_t ParseHexNumber(char* ptr, uint8_t* cnt) { 800a552: b580 push {r7, lr} 800a554: b084 sub sp, #16 800a556: af00 add r7, sp, #0 800a558: 6078 str r0, [r7, #4] 800a55a: 6039 str r1, [r7, #0] uint32_t sum = 0; 800a55c: 2300 movs r3, #0 800a55e: 60fb str r3, [r7, #12] uint8_t i = 0; 800a560: 2300 movs r3, #0 800a562: 72fb strb r3, [r7, #11] while (CHARISHEXNUM(*ptr)) { /* Parse number */ 800a564: e012 b.n 800a58c sum <<= 4; 800a566: 68fb ldr r3, [r7, #12] 800a568: 011b lsls r3, r3, #4 800a56a: 60fb str r3, [r7, #12] sum += Hex2Num(*ptr); 800a56c: 687b ldr r3, [r7, #4] 800a56e: 781b ldrb r3, [r3, #0] 800a570: 4618 mov r0, r3 800a572: f7ff ffc4 bl 800a4fe 800a576: 4603 mov r3, r0 800a578: 461a mov r2, r3 800a57a: 68fb ldr r3, [r7, #12] 800a57c: 4413 add r3, r2 800a57e: 60fb str r3, [r7, #12] ptr++; 800a580: 687b ldr r3, [r7, #4] 800a582: 3301 adds r3, #1 800a584: 607b str r3, [r7, #4] i++; 800a586: 7afb ldrb r3, [r7, #11] 800a588: 3301 adds r3, #1 800a58a: 72fb strb r3, [r7, #11] while (CHARISHEXNUM(*ptr)) { /* Parse number */ 800a58c: 687b ldr r3, [r7, #4] 800a58e: 781b ldrb r3, [r3, #0] 800a590: 2b2f cmp r3, #47 @ 0x2f 800a592: d903 bls.n 800a59c 800a594: 687b ldr r3, [r7, #4] 800a596: 781b ldrb r3, [r3, #0] 800a598: 2b39 cmp r3, #57 @ 0x39 800a59a: d9e4 bls.n 800a566 800a59c: 687b ldr r3, [r7, #4] 800a59e: 781b ldrb r3, [r3, #0] 800a5a0: 2b60 cmp r3, #96 @ 0x60 800a5a2: d903 bls.n 800a5ac 800a5a4: 687b ldr r3, [r7, #4] 800a5a6: 781b ldrb r3, [r3, #0] 800a5a8: 2b66 cmp r3, #102 @ 0x66 800a5aa: d9dc bls.n 800a566 800a5ac: 687b ldr r3, [r7, #4] 800a5ae: 781b ldrb r3, [r3, #0] 800a5b0: 2b40 cmp r3, #64 @ 0x40 800a5b2: d903 bls.n 800a5bc 800a5b4: 687b ldr r3, [r7, #4] 800a5b6: 781b ldrb r3, [r3, #0] 800a5b8: 2b46 cmp r3, #70 @ 0x46 800a5ba: d9d4 bls.n 800a566 } if (cnt != NULL) { /* Save number of characters used for number */ 800a5bc: 683b ldr r3, [r7, #0] 800a5be: 2b00 cmp r3, #0 800a5c0: d002 beq.n 800a5c8 *cnt = i; 800a5c2: 683b ldr r3, [r7, #0] 800a5c4: 7afa ldrb r2, [r7, #11] 800a5c6: 701a strb r2, [r3, #0] } return sum; /* Return number */ 800a5c8: 68fb ldr r3, [r7, #12] } 800a5ca: 4618 mov r0, r3 800a5cc: 3710 adds r7, #16 800a5ce: 46bd mov sp, r7 800a5d0: bd80 pop {r7, pc} 0800a5d2 : * @param ptr: pointer to string * @param cnt: pointer to the number of parsed digit * @retval integer value. */ static int32_t ParseNumber(char* ptr, uint8_t* cnt) { 800a5d2: b480 push {r7} 800a5d4: b085 sub sp, #20 800a5d6: af00 add r7, sp, #0 800a5d8: 6078 str r0, [r7, #4] 800a5da: 6039 str r1, [r7, #0] uint8_t minus = 0, i = 0; 800a5dc: 2300 movs r3, #0 800a5de: 73fb strb r3, [r7, #15] 800a5e0: 2300 movs r3, #0 800a5e2: 73bb strb r3, [r7, #14] int32_t sum = 0; 800a5e4: 2300 movs r3, #0 800a5e6: 60bb str r3, [r7, #8] if (*ptr == '-') { /* Check for minus character */ 800a5e8: 687b ldr r3, [r7, #4] 800a5ea: 781b ldrb r3, [r3, #0] 800a5ec: 2b2d cmp r3, #45 @ 0x2d 800a5ee: d119 bne.n 800a624 minus = 1; 800a5f0: 2301 movs r3, #1 800a5f2: 73fb strb r3, [r7, #15] ptr++; 800a5f4: 687b ldr r3, [r7, #4] 800a5f6: 3301 adds r3, #1 800a5f8: 607b str r3, [r7, #4] i++; 800a5fa: 7bbb ldrb r3, [r7, #14] 800a5fc: 3301 adds r3, #1 800a5fe: 73bb strb r3, [r7, #14] } while (CHARISNUM(*ptr)) { /* Parse number */ 800a600: e010 b.n 800a624 sum = 10 * sum + CHAR2NUM(*ptr); 800a602: 68ba ldr r2, [r7, #8] 800a604: 4613 mov r3, r2 800a606: 009b lsls r3, r3, #2 800a608: 4413 add r3, r2 800a60a: 005b lsls r3, r3, #1 800a60c: 461a mov r2, r3 800a60e: 687b ldr r3, [r7, #4] 800a610: 781b ldrb r3, [r3, #0] 800a612: 3b30 subs r3, #48 @ 0x30 800a614: 4413 add r3, r2 800a616: 60bb str r3, [r7, #8] ptr++; 800a618: 687b ldr r3, [r7, #4] 800a61a: 3301 adds r3, #1 800a61c: 607b str r3, [r7, #4] i++; 800a61e: 7bbb ldrb r3, [r7, #14] 800a620: 3301 adds r3, #1 800a622: 73bb strb r3, [r7, #14] while (CHARISNUM(*ptr)) { /* Parse number */ 800a624: 687b ldr r3, [r7, #4] 800a626: 781b ldrb r3, [r3, #0] 800a628: 2b2f cmp r3, #47 @ 0x2f 800a62a: d903 bls.n 800a634 800a62c: 687b ldr r3, [r7, #4] 800a62e: 781b ldrb r3, [r3, #0] 800a630: 2b39 cmp r3, #57 @ 0x39 800a632: d9e6 bls.n 800a602 } if (cnt != NULL) { /* Save number of characters used for number */ 800a634: 683b ldr r3, [r7, #0] 800a636: 2b00 cmp r3, #0 800a638: d002 beq.n 800a640 *cnt = i; 800a63a: 683b ldr r3, [r7, #0] 800a63c: 7bba ldrb r2, [r7, #14] 800a63e: 701a strb r2, [r3, #0] } if (minus) { /* Minus detected */ 800a640: 7bfb ldrb r3, [r7, #15] 800a642: 2b00 cmp r3, #0 800a644: d002 beq.n 800a64c return 0 - sum; 800a646: 68bb ldr r3, [r7, #8] 800a648: 425b negs r3, r3 800a64a: e000 b.n 800a64e } return sum; /* Return number */ 800a64c: 68bb ldr r3, [r7, #8] } 800a64e: 4618 mov r0, r3 800a650: 3714 adds r7, #20 800a652: 46bd mov sp, r7 800a654: f85d 7b04 ldr.w r7, [sp], #4 800a658: 4770 bx lr 0800a65a : * @param ptr: pointer to string * @param arr: pointer to MAC array * @retval None. */ static void ParseMAC(char* ptr, uint8_t* arr) { 800a65a: b580 push {r7, lr} 800a65c: b084 sub sp, #16 800a65e: af00 add r7, sp, #0 800a660: 6078 str r0, [r7, #4] 800a662: 6039 str r1, [r7, #0] uint8_t hexnum = 0, hexcnt; 800a664: 2300 movs r3, #0 800a666: 73fb strb r3, [r7, #15] while(* ptr) { 800a668: e019 b.n 800a69e hexcnt = 1; 800a66a: 2301 movs r3, #1 800a66c: 73bb strb r3, [r7, #14] if(*ptr != ':') 800a66e: 687b ldr r3, [r7, #4] 800a670: 781b ldrb r3, [r3, #0] 800a672: 2b3a cmp r3, #58 @ 0x3a 800a674: d00e beq.n 800a694 { arr[hexnum++] = ParseHexNumber(ptr, &hexcnt); 800a676: f107 030e add.w r3, r7, #14 800a67a: 4619 mov r1, r3 800a67c: 6878 ldr r0, [r7, #4] 800a67e: f7ff ff68 bl 800a552 800a682: 4601 mov r1, r0 800a684: 7bfb ldrb r3, [r7, #15] 800a686: 1c5a adds r2, r3, #1 800a688: 73fa strb r2, [r7, #15] 800a68a: 461a mov r2, r3 800a68c: 683b ldr r3, [r7, #0] 800a68e: 4413 add r3, r2 800a690: b2ca uxtb r2, r1 800a692: 701a strb r2, [r3, #0] } ptr = ptr + hexcnt; 800a694: 7bbb ldrb r3, [r7, #14] 800a696: 461a mov r2, r3 800a698: 687b ldr r3, [r7, #4] 800a69a: 4413 add r3, r2 800a69c: 607b str r3, [r7, #4] while(* ptr) { 800a69e: 687b ldr r3, [r7, #4] 800a6a0: 781b ldrb r3, [r3, #0] 800a6a2: 2b00 cmp r3, #0 800a6a4: d1e1 bne.n 800a66a } } 800a6a6: bf00 nop 800a6a8: bf00 nop 800a6aa: 3710 adds r7, #16 800a6ac: 46bd mov sp, r7 800a6ae: bd80 pop {r7, pc} 0800a6b0 : * @param ptr: pointer to string * @param arr: pointer to IP array * @retval None. */ static void ParseIP(char* ptr, uint8_t* arr) { 800a6b0: b580 push {r7, lr} 800a6b2: b084 sub sp, #16 800a6b4: af00 add r7, sp, #0 800a6b6: 6078 str r0, [r7, #4] 800a6b8: 6039 str r1, [r7, #0] uint8_t hexnum = 0, hexcnt; 800a6ba: 2300 movs r3, #0 800a6bc: 73fb strb r3, [r7, #15] while(* ptr) { 800a6be: e019 b.n 800a6f4 hexcnt = 1; 800a6c0: 2301 movs r3, #1 800a6c2: 73bb strb r3, [r7, #14] if(*ptr != '.') 800a6c4: 687b ldr r3, [r7, #4] 800a6c6: 781b ldrb r3, [r3, #0] 800a6c8: 2b2e cmp r3, #46 @ 0x2e 800a6ca: d00e beq.n 800a6ea { arr[hexnum++] = ParseNumber(ptr, &hexcnt); 800a6cc: f107 030e add.w r3, r7, #14 800a6d0: 4619 mov r1, r3 800a6d2: 6878 ldr r0, [r7, #4] 800a6d4: f7ff ff7d bl 800a5d2 800a6d8: 4601 mov r1, r0 800a6da: 7bfb ldrb r3, [r7, #15] 800a6dc: 1c5a adds r2, r3, #1 800a6de: 73fa strb r2, [r7, #15] 800a6e0: 461a mov r2, r3 800a6e2: 683b ldr r3, [r7, #0] 800a6e4: 4413 add r3, r2 800a6e6: b2ca uxtb r2, r1 800a6e8: 701a strb r2, [r3, #0] } ptr = ptr + hexcnt; 800a6ea: 7bbb ldrb r3, [r7, #14] 800a6ec: 461a mov r2, r3 800a6ee: 687b ldr r3, [r7, #4] 800a6f0: 4413 add r3, r2 800a6f2: 607b str r3, [r7, #4] while(* ptr) { 800a6f4: 687b ldr r3, [r7, #4] 800a6f6: 781b ldrb r3, [r3, #0] 800a6f8: 2b00 cmp r3, #0 800a6fa: d1e1 bne.n 800a6c0 } } 800a6fc: bf00 nop 800a6fe: bf00 nop 800a700: 3710 adds r7, #16 800a702: 46bd mov sp, r7 800a704: bd80 pop {r7, pc} ... 0800a708 : * @param Obj: pointer to module handle * @param ptr: pointer to string * @retval None. */ static void AT_ParseInfo(ES_WIFIObject_t *Obj,uint8_t *pdata) { 800a708: b580 push {r7, lr} 800a70a: b084 sub sp, #16 800a70c: af00 add r7, sp, #0 800a70e: 6078 str r0, [r7, #4] 800a710: 6039 str r1, [r7, #0] char *ptr; uint8_t num = 0; 800a712: 2300 movs r3, #0 800a714: 72fb strb r3, [r7, #11] ptr = strtok((char *)pdata + 2, ","); 800a716: 683b ldr r3, [r7, #0] 800a718: 3302 adds r3, #2 800a71a: 4934 ldr r1, [pc, #208] @ (800a7ec ) 800a71c: 4618 mov r0, r3 800a71e: f005 ff15 bl 801054c 800a722: 60f8 str r0, [r7, #12] while (ptr != NULL){ 800a724: e05a b.n 800a7dc switch (num++) { 800a726: 7afb ldrb r3, [r7, #11] 800a728: 1c5a adds r2, r3, #1 800a72a: 72fa strb r2, [r7, #11] 800a72c: 2b06 cmp r3, #6 800a72e: d84f bhi.n 800a7d0 800a730: a201 add r2, pc, #4 @ (adr r2, 800a738 ) 800a732: f852 f023 ldr.w pc, [r2, r3, lsl #2] 800a736: bf00 nop 800a738: 0800a755 .word 0x0800a755 800a73c: 0800a763 .word 0x0800a763 800a740: 0800a773 .word 0x0800a773 800a744: 0800a783 .word 0x0800a783 800a748: 0800a793 .word 0x0800a793 800a74c: 0800a7a3 .word 0x0800a7a3 800a750: 0800a7b7 .word 0x0800a7b7 case 0: strncpy((char *)Obj->Product_ID, ptr, ES_WIFI_PRODUCT_ID_SIZE); 800a754: 687b ldr r3, [r7, #4] 800a756: 2220 movs r2, #32 800a758: 68f9 ldr r1, [r7, #12] 800a75a: 4618 mov r0, r3 800a75c: f005 fee2 bl 8010524 break; 800a760: e037 b.n 800a7d2 case 1: strncpy((char *)Obj->FW_Rev, ptr, ES_WIFI_FW_REV_SIZE ); 800a762: 687b ldr r3, [r7, #4] 800a764: 3320 adds r3, #32 800a766: 2218 movs r2, #24 800a768: 68f9 ldr r1, [r7, #12] 800a76a: 4618 mov r0, r3 800a76c: f005 feda bl 8010524 break; 800a770: e02f b.n 800a7d2 case 2: strncpy((char *)Obj->API_Rev, ptr, ES_WIFI_API_REV_SIZE); 800a772: 687b ldr r3, [r7, #4] 800a774: 3338 adds r3, #56 @ 0x38 800a776: 2210 movs r2, #16 800a778: 68f9 ldr r1, [r7, #12] 800a77a: 4618 mov r0, r3 800a77c: f005 fed2 bl 8010524 break; 800a780: e027 b.n 800a7d2 case 3: strncpy((char *)Obj->Stack_Rev, ptr, ES_WIFI_STACK_REV_SIZE); 800a782: 687b ldr r3, [r7, #4] 800a784: 3348 adds r3, #72 @ 0x48 800a786: 2210 movs r2, #16 800a788: 68f9 ldr r1, [r7, #12] 800a78a: 4618 mov r0, r3 800a78c: f005 feca bl 8010524 break; 800a790: e01f b.n 800a7d2 case 4: strncpy((char *)Obj->RTOS_Rev, ptr, ES_WIFI_RTOS_REV_SIZE); 800a792: 687b ldr r3, [r7, #4] 800a794: 3358 adds r3, #88 @ 0x58 800a796: 2210 movs r2, #16 800a798: 68f9 ldr r1, [r7, #12] 800a79a: 4618 mov r0, r3 800a79c: f005 fec2 bl 8010524 break; 800a7a0: e017 b.n 800a7d2 case 5: Obj->CPU_Clock = ParseNumber(ptr, NULL); 800a7a2: 2100 movs r1, #0 800a7a4: 68f8 ldr r0, [r7, #12] 800a7a6: f7ff ff14 bl 800a5d2 800a7aa: 4603 mov r3, r0 800a7ac: 461a mov r2, r3 800a7ae: 687b ldr r3, [r7, #4] 800a7b0: f8c3 2088 str.w r2, [r3, #136] @ 0x88 break; 800a7b4: e00d b.n 800a7d2 case 6: ptr = strtok(ptr, "\r"); 800a7b6: 490e ldr r1, [pc, #56] @ (800a7f0 ) 800a7b8: 68f8 ldr r0, [r7, #12] 800a7ba: f005 fec7 bl 801054c 800a7be: 60f8 str r0, [r7, #12] strncpy((char *)Obj->Product_Name, ptr, ES_WIFI_PRODUCT_NAME_SIZE); 800a7c0: 687b ldr r3, [r7, #4] 800a7c2: 3368 adds r3, #104 @ 0x68 800a7c4: 2220 movs r2, #32 800a7c6: 68f9 ldr r1, [r7, #12] 800a7c8: 4618 mov r0, r3 800a7ca: f005 feab bl 8010524 break; 800a7ce: e000 b.n 800a7d2 default: break; 800a7d0: bf00 nop } ptr = strtok(NULL, ","); 800a7d2: 4906 ldr r1, [pc, #24] @ (800a7ec ) 800a7d4: 2000 movs r0, #0 800a7d6: f005 feb9 bl 801054c 800a7da: 60f8 str r0, [r7, #12] while (ptr != NULL){ 800a7dc: 68fb ldr r3, [r7, #12] 800a7de: 2b00 cmp r3, #0 800a7e0: d1a1 bne.n 800a726 } } 800a7e2: bf00 nop 800a7e4: bf00 nop 800a7e6: 3710 adds r7, #16 800a7e8: 46bd mov sp, r7 800a7ea: bd80 pop {r7, pc} 800a7ec: 08014a04 .word 0x08014a04 800a7f0: 08014a08 .word 0x08014a08 0800a7f4 : * @param NetSettings: settings * @param pdata: pointer to data * @retval None. */ static void AT_ParseConnSettings(char *pdata, ES_WIFI_Network_t *NetSettings) { 800a7f4: b580 push {r7, lr} 800a7f6: b084 sub sp, #16 800a7f8: af00 add r7, sp, #0 800a7fa: 6078 str r0, [r7, #4] 800a7fc: 6039 str r1, [r7, #0] uint8_t num = 0; 800a7fe: 2300 movs r3, #0 800a800: 73fb strb r3, [r7, #15] char *ptr; ptr = strtok(pdata + 2, ","); 800a802: 687b ldr r3, [r7, #4] 800a804: 3302 adds r3, #2 800a806: 4952 ldr r1, [pc, #328] @ (800a950 ) 800a808: 4618 mov r0, r3 800a80a: f005 fe9f bl 801054c 800a80e: 60b8 str r0, [r7, #8] while (ptr != NULL) { 800a810: e095 b.n 800a93e switch (num++) { 800a812: 7bfb ldrb r3, [r7, #15] 800a814: 1c5a adds r2, r3, #1 800a816: 73fa strb r2, [r7, #15] 800a818: 2b0b cmp r3, #11 800a81a: d87f bhi.n 800a91c 800a81c: a201 add r2, pc, #4 @ (adr r2, 800a824 ) 800a81e: f852 f023 ldr.w pc, [r2, r3, lsl #2] 800a822: bf00 nop 800a824: 0800a855 .word 0x0800a855 800a828: 0800a863 .word 0x0800a863 800a82c: 0800a873 .word 0x0800a873 800a830: 0800a887 .word 0x0800a887 800a834: 0800a89b .word 0x0800a89b 800a838: 0800a8af .word 0x0800a8af 800a83c: 0800a8bd .word 0x0800a8bd 800a840: 0800a8cb .word 0x0800a8cb 800a844: 0800a8d9 .word 0x0800a8d9 800a848: 0800a8e7 .word 0x0800a8e7 800a84c: 0800a8f5 .word 0x0800a8f5 800a850: 0800a909 .word 0x0800a909 case 0: strncpy((char *)NetSettings->SSID, ptr, ES_WIFI_MAX_SSID_NAME_SIZE + 1); 800a854: 683b ldr r3, [r7, #0] 800a856: 2221 movs r2, #33 @ 0x21 800a858: 68b9 ldr r1, [r7, #8] 800a85a: 4618 mov r0, r3 800a85c: f005 fe62 bl 8010524 break; 800a860: e05d b.n 800a91e case 1: strncpy((char *)NetSettings->pswd, ptr, ES_WIFI_MAX_PSWD_NAME_SIZE + 1); 800a862: 683b ldr r3, [r7, #0] 800a864: 3321 adds r3, #33 @ 0x21 800a866: 2221 movs r2, #33 @ 0x21 800a868: 68b9 ldr r1, [r7, #8] 800a86a: 4618 mov r0, r3 800a86c: f005 fe5a bl 8010524 break; 800a870: e055 b.n 800a91e case 2: NetSettings->Security = (ES_WIFI_SecurityType_t)ParseNumber(ptr, NULL); 800a872: 2100 movs r1, #0 800a874: 68b8 ldr r0, [r7, #8] 800a876: f7ff feac bl 800a5d2 800a87a: 4603 mov r3, r0 800a87c: b2da uxtb r2, r3 800a87e: 683b ldr r3, [r7, #0] 800a880: f883 2042 strb.w r2, [r3, #66] @ 0x42 break; 800a884: e04b b.n 800a91e case 3: NetSettings->DHCP_IsEnabled = ParseNumber(ptr, NULL); 800a886: 2100 movs r1, #0 800a888: 68b8 ldr r0, [r7, #8] 800a88a: f7ff fea2 bl 800a5d2 800a88e: 4603 mov r3, r0 800a890: b2da uxtb r2, r3 800a892: 683b ldr r3, [r7, #0] 800a894: f883 2043 strb.w r2, [r3, #67] @ 0x43 break; 800a898: e041 b.n 800a91e case 4: NetSettings->IP_Ver = (ES_WIFI_IPVer_t)ParseNumber(ptr, NULL); 800a89a: 2100 movs r1, #0 800a89c: 68b8 ldr r0, [r7, #8] 800a89e: f7ff fe98 bl 800a5d2 800a8a2: 4603 mov r3, r0 800a8a4: b2da uxtb r2, r3 800a8a6: 683b ldr r3, [r7, #0] 800a8a8: f883 2047 strb.w r2, [r3, #71] @ 0x47 break; 800a8ac: e037 b.n 800a91e case 5: ParseIP(ptr, NetSettings->IP_Addr); 800a8ae: 683b ldr r3, [r7, #0] 800a8b0: 3348 adds r3, #72 @ 0x48 800a8b2: 4619 mov r1, r3 800a8b4: 68b8 ldr r0, [r7, #8] 800a8b6: f7ff fefb bl 800a6b0 break; 800a8ba: e030 b.n 800a91e case 6: ParseIP(ptr, NetSettings->IP_Mask); 800a8bc: 683b ldr r3, [r7, #0] 800a8be: 334c adds r3, #76 @ 0x4c 800a8c0: 4619 mov r1, r3 800a8c2: 68b8 ldr r0, [r7, #8] 800a8c4: f7ff fef4 bl 800a6b0 break; 800a8c8: e029 b.n 800a91e case 7: ParseIP(ptr, NetSettings->Gateway_Addr); 800a8ca: 683b ldr r3, [r7, #0] 800a8cc: 3350 adds r3, #80 @ 0x50 800a8ce: 4619 mov r1, r3 800a8d0: 68b8 ldr r0, [r7, #8] 800a8d2: f7ff feed bl 800a6b0 break; 800a8d6: e022 b.n 800a91e case 8: ParseIP(ptr, NetSettings->DNS1); 800a8d8: 683b ldr r3, [r7, #0] 800a8da: 3354 adds r3, #84 @ 0x54 800a8dc: 4619 mov r1, r3 800a8de: 68b8 ldr r0, [r7, #8] 800a8e0: f7ff fee6 bl 800a6b0 break; 800a8e4: e01b b.n 800a91e case 9: ParseIP(ptr, NetSettings->DNS2); 800a8e6: 683b ldr r3, [r7, #0] 800a8e8: 3358 adds r3, #88 @ 0x58 800a8ea: 4619 mov r1, r3 800a8ec: 68b8 ldr r0, [r7, #8] 800a8ee: f7ff fedf bl 800a6b0 break; 800a8f2: e014 b.n 800a91e case 10: NetSettings->JoinRetries = ParseNumber(ptr, NULL); 800a8f4: 2100 movs r1, #0 800a8f6: 68b8 ldr r0, [r7, #8] 800a8f8: f7ff fe6b bl 800a5d2 800a8fc: 4603 mov r3, r0 800a8fe: b2da uxtb r2, r3 800a900: 683b ldr r3, [r7, #0] 800a902: f883 2044 strb.w r2, [r3, #68] @ 0x44 break; 800a906: e00a b.n 800a91e case 11: NetSettings->AutoConnect = ParseNumber(ptr, NULL); 800a908: 2100 movs r1, #0 800a90a: 68b8 ldr r0, [r7, #8] 800a90c: f7ff fe61 bl 800a5d2 800a910: 4603 mov r3, r0 800a912: b2da uxtb r2, r3 800a914: 683b ldr r3, [r7, #0] 800a916: f883 2046 strb.w r2, [r3, #70] @ 0x46 break; 800a91a: e000 b.n 800a91e default: break; 800a91c: bf00 nop } ptr = strtok(NULL, ","); 800a91e: 490c ldr r1, [pc, #48] @ (800a950 ) 800a920: 2000 movs r0, #0 800a922: f005 fe13 bl 801054c 800a926: 60b8 str r0, [r7, #8] if ((ptr != NULL) && (ptr[-1] == ',')) 800a928: 68bb ldr r3, [r7, #8] 800a92a: 2b00 cmp r3, #0 800a92c: d007 beq.n 800a93e 800a92e: 68bb ldr r3, [r7, #8] 800a930: 3b01 subs r3, #1 800a932: 781b ldrb r3, [r3, #0] 800a934: 2b2c cmp r3, #44 @ 0x2c 800a936: d102 bne.n 800a93e { /* Ignore empty fields */ num++; 800a938: 7bfb ldrb r3, [r7, #15] 800a93a: 3301 adds r3, #1 800a93c: 73fb strb r3, [r7, #15] while (ptr != NULL) { 800a93e: 68bb ldr r3, [r7, #8] 800a940: 2b00 cmp r3, #0 800a942: f47f af66 bne.w 800a812 } } } 800a946: bf00 nop 800a948: bf00 nop 800a94a: 3710 adds r7, #16 800a94c: 46bd mov sp, r7 800a94e: bd80 pop {r7, pc} 800a950: 08014a04 .word 0x08014a04 0800a954 : * @param pdata: pointer to data * @param isConnected: pointer to result * @retval None. */ static void AT_ParseIsConnected(char *pdata, uint8_t *isConnected) { 800a954: b480 push {r7} 800a956: b083 sub sp, #12 800a958: af00 add r7, sp, #0 800a95a: 6078 str r0, [r7, #4] 800a95c: 6039 str r1, [r7, #0] *isConnected = (pdata[2] == '1') ? 1 : 0; 800a95e: 687b ldr r3, [r7, #4] 800a960: 3302 adds r3, #2 800a962: 781b ldrb r3, [r3, #0] 800a964: 2b31 cmp r3, #49 @ 0x31 800a966: bf0c ite eq 800a968: 2301 moveq r3, #1 800a96a: 2300 movne r3, #0 800a96c: b2db uxtb r3, r3 800a96e: 461a mov r2, r3 800a970: 683b ldr r3, [r7, #0] 800a972: 701a strb r2, [r3, #0] } 800a974: bf00 nop 800a976: 370c adds r7, #12 800a978: 46bd mov sp, r7 800a97a: f85d 7b04 ldr.w r7, [sp], #4 800a97e: 4770 bx lr 0800a980 : * @param cmd: pointer to command string * @param pdata: pointer to returned data * @retval Operation Status. */ static ES_WIFI_Status_t AT_ExecuteCommand(ES_WIFIObject_t *Obj, uint8_t* cmd, uint8_t *pdata) { 800a980: b590 push {r4, r7, lr} 800a982: b087 sub sp, #28 800a984: af00 add r7, sp, #0 800a986: 60f8 str r0, [r7, #12] 800a988: 60b9 str r1, [r7, #8] 800a98a: 607a str r2, [r7, #4] int ret = 0; 800a98c: 2300 movs r3, #0 800a98e: 613b str r3, [r7, #16] int16_t recv_len = 0; 800a990: 2300 movs r3, #0 800a992: 82fb strh r3, [r7, #22] LOCK_WIFI(); ret = Obj->fops.IO_Send(cmd, strlen((char*)cmd), Obj->Timeout); 800a994: 68fb ldr r3, [r7, #12] 800a996: f8d3 4120 ldr.w r4, [r3, #288] @ 0x120 800a99a: 68b8 ldr r0, [r7, #8] 800a99c: f7f5 fc78 bl 8000290 800a9a0: 4603 mov r3, r0 800a9a2: b299 uxth r1, r3 800a9a4: 68fb ldr r3, [r7, #12] 800a9a6: f8d3 38f8 ldr.w r3, [r3, #2296] @ 0x8f8 800a9aa: 461a mov r2, r3 800a9ac: 68b8 ldr r0, [r7, #8] 800a9ae: 47a0 blx r4 800a9b0: 4603 mov r3, r0 800a9b2: 613b str r3, [r7, #16] if( ret > 0) 800a9b4: 693b ldr r3, [r7, #16] 800a9b6: 2b00 cmp r3, #0 800a9b8: dd3e ble.n 800aa38 { recv_len = Obj->fops.IO_Receive(pdata, ES_WIFI_DATA_SIZE, Obj->Timeout); 800a9ba: 68fb ldr r3, [r7, #12] 800a9bc: f8d3 3124 ldr.w r3, [r3, #292] @ 0x124 800a9c0: 68fa ldr r2, [r7, #12] 800a9c2: f8d2 28f8 ldr.w r2, [r2, #2296] @ 0x8f8 800a9c6: f44f 61fa mov.w r1, #2000 @ 0x7d0 800a9ca: 6878 ldr r0, [r7, #4] 800a9cc: 4798 blx r3 800a9ce: 4603 mov r3, r0 800a9d0: 82fb strh r3, [r7, #22] if((recv_len > 0) && (recv_len <= ES_WIFI_DATA_SIZE)) 800a9d2: f9b7 3016 ldrsh.w r3, [r7, #22] 800a9d6: 2b00 cmp r3, #0 800a9d8: dd27 ble.n 800aa2a 800a9da: f9b7 3016 ldrsh.w r3, [r7, #22] 800a9de: f5b3 6ffa cmp.w r3, #2000 @ 0x7d0 800a9e2: dc22 bgt.n 800aa2a { if (recv_len == ES_WIFI_DATA_SIZE) 800a9e4: f9b7 3016 ldrsh.w r3, [r7, #22] 800a9e8: f5b3 6ffa cmp.w r3, #2000 @ 0x7d0 800a9ec: d105 bne.n 800a9fa { // ES_WIFI_DATA_SIZE maybe too small !! recv_len--; 800a9ee: f9b7 3016 ldrsh.w r3, [r7, #22] 800a9f2: b29b uxth r3, r3 800a9f4: 3b01 subs r3, #1 800a9f6: b29b uxth r3, r3 800a9f8: 82fb strh r3, [r7, #22] } *(pdata + recv_len) = 0; 800a9fa: f9b7 3016 ldrsh.w r3, [r7, #22] 800a9fe: 687a ldr r2, [r7, #4] 800aa00: 4413 add r3, r2 800aa02: 2200 movs r2, #0 800aa04: 701a strb r2, [r3, #0] if(strstr((char *)pdata, AT_OK_STRING)) 800aa06: 490f ldr r1, [pc, #60] @ (800aa44 ) 800aa08: 6878 ldr r0, [r7, #4] 800aa0a: f005 fdfb bl 8010604 800aa0e: 4603 mov r3, r0 800aa10: 2b00 cmp r3, #0 800aa12: d001 beq.n 800aa18 { UNLOCK_WIFI(); return ES_WIFI_STATUS_OK; 800aa14: 2300 movs r3, #0 800aa16: e010 b.n 800aa3a } else if(strstr((char *)pdata, AT_ERROR_STRING)) 800aa18: 490b ldr r1, [pc, #44] @ (800aa48 ) 800aa1a: 6878 ldr r0, [r7, #4] 800aa1c: f005 fdf2 bl 8010604 800aa20: 4603 mov r3, r0 800aa22: 2b00 cmp r3, #0 800aa24: d001 beq.n 800aa2a { UNLOCK_WIFI(); return ES_WIFI_STATUS_UNEXPECTED_CLOSED_SOCKET; 800aa26: 2305 movs r3, #5 800aa28: e007 b.n 800aa3a } } if (recv_len == ES_WIFI_ERROR_STUFFING_FOREVER ) 800aa2a: f9b7 3016 ldrsh.w r3, [r7, #22] 800aa2e: f113 0f04 cmn.w r3, #4 800aa32: d101 bne.n 800aa38 { UNLOCK_WIFI(); return ES_WIFI_STATUS_MODULE_CRASH; 800aa34: 2306 movs r3, #6 800aa36: e000 b.n 800aa3a } } UNLOCK_WIFI(); return ES_WIFI_STATUS_IO_ERROR; 800aa38: 2304 movs r3, #4 } 800aa3a: 4618 mov r0, r3 800aa3c: 371c adds r7, #28 800aa3e: 46bd mov sp, r7 800aa40: bd90 pop {r4, r7, pc} 800aa42: bf00 nop 800aa44: 08014a18 .word 0x08014a18 800aa48: 08014a24 .word 0x08014a24 0800aa4c : * @param pdata: pointer to returned data * @retval Operation Status. */ static ES_WIFI_Status_t AT_RequestSendData(ES_WIFIObject_t *Obj, uint8_t* cmd, uint8_t *pcmd_data, uint16_t len, uint8_t *pdata) { 800aa4c: b580 push {r7, lr} 800aa4e: b086 sub sp, #24 800aa50: af00 add r7, sp, #0 800aa52: 60f8 str r0, [r7, #12] 800aa54: 60b9 str r1, [r7, #8] 800aa56: 607a str r2, [r7, #4] 800aa58: 807b strh r3, [r7, #2] int16_t send_len = 0; 800aa5a: 2300 movs r3, #0 800aa5c: 82fb strh r3, [r7, #22] int16_t recv_len = 0; 800aa5e: 2300 movs r3, #0 800aa60: 82bb strh r3, [r7, #20] uint16_t cmd_len = 0; 800aa62: 2300 movs r3, #0 800aa64: 827b strh r3, [r7, #18] uint16_t n ; LOCK_WIFI(); cmd_len = strlen((char*)cmd); 800aa66: 68b8 ldr r0, [r7, #8] 800aa68: f7f5 fc12 bl 8000290 800aa6c: 4603 mov r3, r0 800aa6e: 827b strh r3, [r7, #18] /* can send only even number of byte on first send */ if (cmd_len & 1) return ES_WIFI_STATUS_ERROR; 800aa70: 8a7b ldrh r3, [r7, #18] 800aa72: f003 0301 and.w r3, r3, #1 800aa76: 2b00 cmp r3, #0 800aa78: d001 beq.n 800aa7e 800aa7a: 2302 movs r3, #2 800aa7c: e053 b.n 800ab26 n=Obj->fops.IO_Send(cmd, cmd_len, Obj->Timeout); 800aa7e: 68fb ldr r3, [r7, #12] 800aa80: f8d3 3120 ldr.w r3, [r3, #288] @ 0x120 800aa84: 68fa ldr r2, [r7, #12] 800aa86: f8d2 28f8 ldr.w r2, [r2, #2296] @ 0x8f8 800aa8a: 8a79 ldrh r1, [r7, #18] 800aa8c: 68b8 ldr r0, [r7, #8] 800aa8e: 4798 blx r3 800aa90: 4603 mov r3, r0 800aa92: 823b strh r3, [r7, #16] if (n == cmd_len) 800aa94: 8a3a ldrh r2, [r7, #16] 800aa96: 8a7b ldrh r3, [r7, #18] 800aa98: 429a cmp r2, r3 800aa9a: d143 bne.n 800ab24 { send_len = Obj->fops.IO_Send(pcmd_data, len, Obj->Timeout); 800aa9c: 68fb ldr r3, [r7, #12] 800aa9e: f8d3 3120 ldr.w r3, [r3, #288] @ 0x120 800aaa2: 68fa ldr r2, [r7, #12] 800aaa4: f8d2 28f8 ldr.w r2, [r2, #2296] @ 0x8f8 800aaa8: 8879 ldrh r1, [r7, #2] 800aaaa: 6878 ldr r0, [r7, #4] 800aaac: 4798 blx r3 800aaae: 4603 mov r3, r0 800aab0: 82fb strh r3, [r7, #22] if (send_len == len) 800aab2: f9b7 2016 ldrsh.w r2, [r7, #22] 800aab6: 887b ldrh r3, [r7, #2] 800aab8: 429a cmp r2, r3 800aaba: d131 bne.n 800ab20 { recv_len = Obj->fops.IO_Receive(pdata, 0, Obj->Timeout); 800aabc: 68fb ldr r3, [r7, #12] 800aabe: f8d3 3124 ldr.w r3, [r3, #292] @ 0x124 800aac2: 68fa ldr r2, [r7, #12] 800aac4: f8d2 28f8 ldr.w r2, [r2, #2296] @ 0x8f8 800aac8: 2100 movs r1, #0 800aaca: 6a38 ldr r0, [r7, #32] 800aacc: 4798 blx r3 800aace: 4603 mov r3, r0 800aad0: 82bb strh r3, [r7, #20] if (recv_len > 0) 800aad2: f9b7 3014 ldrsh.w r3, [r7, #20] 800aad6: 2b00 cmp r3, #0 800aad8: dd19 ble.n 800ab0e { *(pdata+recv_len) = 0; 800aada: f9b7 3014 ldrsh.w r3, [r7, #20] 800aade: 6a3a ldr r2, [r7, #32] 800aae0: 4413 add r3, r2 800aae2: 2200 movs r2, #0 800aae4: 701a strb r2, [r3, #0] if(strstr((char *)pdata, AT_OK_STRING)) 800aae6: 4912 ldr r1, [pc, #72] @ (800ab30 ) 800aae8: 6a38 ldr r0, [r7, #32] 800aaea: f005 fd8b bl 8010604 800aaee: 4603 mov r3, r0 800aaf0: 2b00 cmp r3, #0 800aaf2: d001 beq.n 800aaf8 { UNLOCK_WIFI(); return ES_WIFI_STATUS_OK; 800aaf4: 2300 movs r3, #0 800aaf6: e016 b.n 800ab26 } else if(strstr((char *)pdata, AT_ERROR_STRING)) 800aaf8: 490e ldr r1, [pc, #56] @ (800ab34 ) 800aafa: 6a38 ldr r0, [r7, #32] 800aafc: f005 fd82 bl 8010604 800ab00: 4603 mov r3, r0 800ab02: 2b00 cmp r3, #0 800ab04: d001 beq.n 800ab0a { UNLOCK_WIFI(); return ES_WIFI_STATUS_UNEXPECTED_CLOSED_SOCKET; 800ab06: 2305 movs r3, #5 800ab08: e00d b.n 800ab26 } else { UNLOCK_WIFI(); return ES_WIFI_STATUS_ERROR; 800ab0a: 2302 movs r3, #2 800ab0c: e00b b.n 800ab26 } } UNLOCK_WIFI(); if (recv_len == ES_WIFI_ERROR_STUFFING_FOREVER ) 800ab0e: f9b7 3014 ldrsh.w r3, [r7, #20] 800ab12: f113 0f04 cmn.w r3, #4 800ab16: d101 bne.n 800ab1c { return ES_WIFI_STATUS_MODULE_CRASH; 800ab18: 2306 movs r3, #6 800ab1a: e004 b.n 800ab26 } return ES_WIFI_STATUS_ERROR; 800ab1c: 2302 movs r3, #2 800ab1e: e002 b.n 800ab26 } else { return ES_WIFI_STATUS_ERROR; 800ab20: 2302 movs r3, #2 800ab22: e000 b.n 800ab26 } } return ES_WIFI_STATUS_IO_ERROR; 800ab24: 2304 movs r3, #4 } 800ab26: 4618 mov r0, r3 800ab28: 3718 adds r7, #24 800ab2a: 46bd mov sp, r7 800ab2c: bd80 pop {r7, pc} 800ab2e: bf00 nop 800ab30: 08014a18 .word 0x08014a18 800ab34: 08014a24 .word 0x08014a24 0800ab38 : * @param Reqlen : requested Data length. * @param ReadData : pointer to received data length. * @retval Operation Status. */ static ES_WIFI_Status_t AT_RequestReceiveData(ES_WIFIObject_t *Obj, uint8_t* cmd, char *pdata, uint16_t Reqlen, uint16_t *ReadData) { 800ab38: b590 push {r4, r7, lr} 800ab3a: b087 sub sp, #28 800ab3c: af00 add r7, sp, #0 800ab3e: 60f8 str r0, [r7, #12] 800ab40: 60b9 str r1, [r7, #8] 800ab42: 607a str r2, [r7, #4] 800ab44: 807b strh r3, [r7, #2] int len; uint8_t *p=Obj->CmdData; 800ab46: 68fb ldr r3, [r7, #12] 800ab48: f503 7394 add.w r3, r3, #296 @ 0x128 800ab4c: 613b str r3, [r7, #16] LOCK_WIFI(); if(Obj->fops.IO_Send(cmd, strlen((char*)cmd), Obj->Timeout) > 0) 800ab4e: 68fb ldr r3, [r7, #12] 800ab50: f8d3 4120 ldr.w r4, [r3, #288] @ 0x120 800ab54: 68b8 ldr r0, [r7, #8] 800ab56: f7f5 fb9b bl 8000290 800ab5a: 4603 mov r3, r0 800ab5c: b299 uxth r1, r3 800ab5e: 68fb ldr r3, [r7, #12] 800ab60: f8d3 38f8 ldr.w r3, [r3, #2296] @ 0x8f8 800ab64: 461a mov r2, r3 800ab66: 68b8 ldr r0, [r7, #8] 800ab68: 47a0 blx r4 800ab6a: 4603 mov r3, r0 800ab6c: 2b00 cmp r3, #0 800ab6e: dd6f ble.n 800ac50 { len = Obj->fops.IO_Receive(p, 0 , Obj->Timeout); 800ab70: 68fb ldr r3, [r7, #12] 800ab72: f8d3 3124 ldr.w r3, [r3, #292] @ 0x124 800ab76: 68fa ldr r2, [r7, #12] 800ab78: f8d2 28f8 ldr.w r2, [r2, #2296] @ 0x8f8 800ab7c: 2100 movs r1, #0 800ab7e: 6938 ldr r0, [r7, #16] 800ab80: 4798 blx r3 800ab82: 4603 mov r3, r0 800ab84: 617b str r3, [r7, #20] if ((p[0]!='\r') || (p[1]!='\n')) 800ab86: 693b ldr r3, [r7, #16] 800ab88: 781b ldrb r3, [r3, #0] 800ab8a: 2b0d cmp r3, #13 800ab8c: d104 bne.n 800ab98 800ab8e: 693b ldr r3, [r7, #16] 800ab90: 3301 adds r3, #1 800ab92: 781b ldrb r3, [r3, #0] 800ab94: 2b0a cmp r3, #10 800ab96: d001 beq.n 800ab9c { return ES_WIFI_STATUS_IO_ERROR; 800ab98: 2304 movs r3, #4 800ab9a: e05a b.n 800ac52 } len-=2; 800ab9c: 697b ldr r3, [r7, #20] 800ab9e: 3b02 subs r3, #2 800aba0: 617b str r3, [r7, #20] p+=2; 800aba2: 693b ldr r3, [r7, #16] 800aba4: 3302 adds r3, #2 800aba6: 613b str r3, [r7, #16] if (len >= AT_OK_STRING_LEN) 800aba8: 697b ldr r3, [r7, #20] 800abaa: 2b07 cmp r3, #7 800abac: d94a bls.n 800ac44 { while(len && (p[len-1]==0x15)) len--; 800abae: e002 b.n 800abb6 800abb0: 697b ldr r3, [r7, #20] 800abb2: 3b01 subs r3, #1 800abb4: 617b str r3, [r7, #20] 800abb6: 697b ldr r3, [r7, #20] 800abb8: 2b00 cmp r3, #0 800abba: d006 beq.n 800abca 800abbc: 697b ldr r3, [r7, #20] 800abbe: 3b01 subs r3, #1 800abc0: 693a ldr r2, [r7, #16] 800abc2: 4413 add r3, r2 800abc4: 781b ldrb r3, [r3, #0] 800abc6: 2b15 cmp r3, #21 800abc8: d0f2 beq.n 800abb0 p[len] = '\0'; 800abca: 697b ldr r3, [r7, #20] 800abcc: 693a ldr r2, [r7, #16] 800abce: 4413 add r3, r2 800abd0: 2200 movs r2, #0 800abd2: 701a strb r2, [r3, #0] if(strstr( (char*) p + len - AT_OK_STRING_LEN, AT_OK_STRING)) 800abd4: 697b ldr r3, [r7, #20] 800abd6: 3b08 subs r3, #8 800abd8: 693a ldr r2, [r7, #16] 800abda: 4413 add r3, r2 800abdc: 491f ldr r1, [pc, #124] @ (800ac5c ) 800abde: 4618 mov r0, r3 800abe0: f005 fd10 bl 8010604 800abe4: 4603 mov r3, r0 800abe6: 2b00 cmp r3, #0 800abe8: d016 beq.n 800ac18 { *ReadData = len - AT_OK_STRING_LEN; 800abea: 697b ldr r3, [r7, #20] 800abec: b29b uxth r3, r3 800abee: 3b08 subs r3, #8 800abf0: b29a uxth r2, r3 800abf2: 6abb ldr r3, [r7, #40] @ 0x28 800abf4: 801a strh r2, [r3, #0] if (*ReadData > Reqlen) 800abf6: 6abb ldr r3, [r7, #40] @ 0x28 800abf8: 881b ldrh r3, [r3, #0] 800abfa: 887a ldrh r2, [r7, #2] 800abfc: 429a cmp r2, r3 800abfe: d202 bcs.n 800ac06 { *ReadData = Reqlen; 800ac00: 6abb ldr r3, [r7, #40] @ 0x28 800ac02: 887a ldrh r2, [r7, #2] 800ac04: 801a strh r2, [r3, #0] } memcpy(pdata, p, *ReadData); 800ac06: 6abb ldr r3, [r7, #40] @ 0x28 800ac08: 881b ldrh r3, [r3, #0] 800ac0a: 461a mov r2, r3 800ac0c: 6939 ldr r1, [r7, #16] 800ac0e: 6878 ldr r0, [r7, #4] 800ac10: f005 fd85 bl 801071e UNLOCK_WIFI(); return ES_WIFI_STATUS_OK; 800ac14: 2300 movs r3, #0 800ac16: e01c b.n 800ac52 } else if(memcmp((char *)p + len - AT_DELIMETER_LEN , AT_DELIMETER_STRING, AT_DELIMETER_LEN) == 0) 800ac18: 697b ldr r3, [r7, #20] 800ac1a: 3b04 subs r3, #4 800ac1c: 693a ldr r2, [r7, #16] 800ac1e: 4413 add r3, r2 800ac20: 2204 movs r2, #4 800ac22: 490f ldr r1, [pc, #60] @ (800ac60 ) 800ac24: 4618 mov r0, r3 800ac26: f005 fc53 bl 80104d0 800ac2a: 4603 mov r3, r0 800ac2c: 2b00 cmp r3, #0 800ac2e: d104 bne.n 800ac3a { *ReadData = 0; 800ac30: 6abb ldr r3, [r7, #40] @ 0x28 800ac32: 2200 movs r2, #0 800ac34: 801a strh r2, [r3, #0] UNLOCK_WIFI(); return ES_WIFI_STATUS_UNEXPECTED_CLOSED_SOCKET; 800ac36: 2305 movs r3, #5 800ac38: e00b b.n 800ac52 } UNLOCK_WIFI(); *ReadData = 0; 800ac3a: 6abb ldr r3, [r7, #40] @ 0x28 800ac3c: 2200 movs r2, #0 800ac3e: 801a strh r2, [r3, #0] return ES_WIFI_STATUS_UNEXPECTED_CLOSED_SOCKET; 800ac40: 2305 movs r3, #5 800ac42: e006 b.n 800ac52 } if (len == ES_WIFI_ERROR_STUFFING_FOREVER ) 800ac44: 697b ldr r3, [r7, #20] 800ac46: f113 0f04 cmn.w r3, #4 800ac4a: d101 bne.n 800ac50 { UNLOCK_WIFI(); return ES_WIFI_STATUS_MODULE_CRASH; 800ac4c: 2306 movs r3, #6 800ac4e: e000 b.n 800ac52 } } UNLOCK_WIFI(); return ES_WIFI_STATUS_IO_ERROR; 800ac50: 2304 movs r3, #4 } 800ac52: 4618 mov r0, r3 800ac54: 371c adds r7, #28 800ac56: 46bd mov sp, r7 800ac58: bd90 pop {r4, r7, pc} 800ac5a: bf00 nop 800ac5c: 08014a18 .word 0x08014a18 800ac60: 08014a2c .word 0x08014a2c 0800ac64 : * @brief Initialize WIFI module. * @param Obj: pointer to module handle * @retval Operation Status. */ ES_WIFI_Status_t ES_WIFI_Init(ES_WIFIObject_t *Obj) { 800ac64: b580 push {r7, lr} 800ac66: b084 sub sp, #16 800ac68: af00 add r7, sp, #0 800ac6a: 6078 str r0, [r7, #4] ES_WIFI_Status_t ret = ES_WIFI_STATUS_ERROR; 800ac6c: 2302 movs r3, #2 800ac6e: 73fb strb r3, [r7, #15] LOCK_WIFI(); Obj->Timeout = ES_WIFI_TIMEOUT; 800ac70: 687b ldr r3, [r7, #4] 800ac72: f247 5230 movw r2, #30000 @ 0x7530 800ac76: f8c3 28f8 str.w r2, [r3, #2296] @ 0x8f8 if (Obj->fops.IO_Init(ES_WIFI_INIT) == 0) 800ac7a: 687b ldr r3, [r7, #4] 800ac7c: f8d3 3114 ldr.w r3, [r3, #276] @ 0x114 800ac80: 2000 movs r0, #0 800ac82: 4798 blx r3 800ac84: 4603 mov r3, r0 800ac86: 2b00 cmp r3, #0 800ac88: d113 bne.n 800acb2 { ret = AT_ExecuteCommand(Obj,(uint8_t*)"I?\r\n", Obj->CmdData); 800ac8a: 687b ldr r3, [r7, #4] 800ac8c: f503 7394 add.w r3, r3, #296 @ 0x128 800ac90: 461a mov r2, r3 800ac92: 490a ldr r1, [pc, #40] @ (800acbc ) 800ac94: 6878 ldr r0, [r7, #4] 800ac96: f7ff fe73 bl 800a980 800ac9a: 4603 mov r3, r0 800ac9c: 73fb strb r3, [r7, #15] if(ret == ES_WIFI_STATUS_OK) 800ac9e: 7bfb ldrb r3, [r7, #15] 800aca0: 2b00 cmp r3, #0 800aca2: d106 bne.n 800acb2 { AT_ParseInfo (Obj, Obj->CmdData); 800aca4: 687b ldr r3, [r7, #4] 800aca6: f503 7394 add.w r3, r3, #296 @ 0x128 800acaa: 4619 mov r1, r3 800acac: 6878 ldr r0, [r7, #4] 800acae: f7ff fd2b bl 800a708 } } UNLOCK_WIFI(); return ret; 800acb2: 7bfb ldrb r3, [r7, #15] } 800acb4: 4618 mov r0, r3 800acb6: 3710 adds r7, #16 800acb8: 46bd mov sp, r7 800acba: bd80 pop {r7, pc} 800acbc: 08014a34 .word 0x08014a34 0800acc0 : ES_WIFI_Status_t ES_WIFI_RegisterBusIO(ES_WIFIObject_t *Obj, IO_Init_Func IO_Init, IO_DeInit_Func IO_DeInit, IO_Delay_Func IO_Delay, IO_Send_Func IO_Send, IO_Receive_Func IO_Receive) { 800acc0: b480 push {r7} 800acc2: b085 sub sp, #20 800acc4: af00 add r7, sp, #0 800acc6: 60f8 str r0, [r7, #12] 800acc8: 60b9 str r1, [r7, #8] 800acca: 607a str r2, [r7, #4] 800accc: 603b str r3, [r7, #0] if(!Obj || !IO_Init || !IO_DeInit || !IO_Send || !IO_Receive) 800acce: 68fb ldr r3, [r7, #12] 800acd0: 2b00 cmp r3, #0 800acd2: d00b beq.n 800acec 800acd4: 68bb ldr r3, [r7, #8] 800acd6: 2b00 cmp r3, #0 800acd8: d008 beq.n 800acec 800acda: 687b ldr r3, [r7, #4] 800acdc: 2b00 cmp r3, #0 800acde: d005 beq.n 800acec 800ace0: 69bb ldr r3, [r7, #24] 800ace2: 2b00 cmp r3, #0 800ace4: d002 beq.n 800acec 800ace6: 69fb ldr r3, [r7, #28] 800ace8: 2b00 cmp r3, #0 800acea: d101 bne.n 800acf0 { return ES_WIFI_STATUS_ERROR; 800acec: 2302 movs r3, #2 800acee: e014 b.n 800ad1a } Obj->fops.IO_Init = IO_Init; 800acf0: 68fb ldr r3, [r7, #12] 800acf2: 68ba ldr r2, [r7, #8] 800acf4: f8c3 2114 str.w r2, [r3, #276] @ 0x114 Obj->fops.IO_DeInit = IO_DeInit; 800acf8: 68fb ldr r3, [r7, #12] 800acfa: 687a ldr r2, [r7, #4] 800acfc: f8c3 2118 str.w r2, [r3, #280] @ 0x118 Obj->fops.IO_Send = IO_Send; 800ad00: 68fb ldr r3, [r7, #12] 800ad02: 69ba ldr r2, [r7, #24] 800ad04: f8c3 2120 str.w r2, [r3, #288] @ 0x120 Obj->fops.IO_Receive = IO_Receive; 800ad08: 68fb ldr r3, [r7, #12] 800ad0a: 69fa ldr r2, [r7, #28] 800ad0c: f8c3 2124 str.w r2, [r3, #292] @ 0x124 Obj->fops.IO_Delay = IO_Delay; 800ad10: 68fb ldr r3, [r7, #12] 800ad12: 683a ldr r2, [r7, #0] 800ad14: f8c3 211c str.w r2, [r3, #284] @ 0x11c return ES_WIFI_STATUS_OK; 800ad18: 2300 movs r3, #0 } 800ad1a: 4618 mov r0, r3 800ad1c: 3714 adds r7, #20 800ad1e: 46bd mov sp, r7 800ad20: f85d 7b04 ldr.w r7, [sp], #4 800ad24: 4770 bx lr ... 0800ad28 : * @retval Operation Status. */ ES_WIFI_Status_t ES_WIFI_Connect(ES_WIFIObject_t *Obj, const char* SSID, const char* Password, ES_WIFI_SecurityType_t SecType) { 800ad28: b580 push {r7, lr} 800ad2a: b086 sub sp, #24 800ad2c: af00 add r7, sp, #0 800ad2e: 60f8 str r0, [r7, #12] 800ad30: 60b9 str r1, [r7, #8] 800ad32: 607a str r2, [r7, #4] 800ad34: 70fb strb r3, [r7, #3] ES_WIFI_Status_t ret; LOCK_WIFI(); sprintf((char*)Obj->CmdData,"C1=%s\r", SSID); 800ad36: 68fb ldr r3, [r7, #12] 800ad38: f503 7394 add.w r3, r3, #296 @ 0x128 800ad3c: 68ba ldr r2, [r7, #8] 800ad3e: 4932 ldr r1, [pc, #200] @ (800ae08 ) 800ad40: 4618 mov r0, r3 800ad42: f005 fa9d bl 8010280 ret = AT_ExecuteCommand(Obj, Obj->CmdData, Obj->CmdData); 800ad46: 68fb ldr r3, [r7, #12] 800ad48: f503 7194 add.w r1, r3, #296 @ 0x128 800ad4c: 68fb ldr r3, [r7, #12] 800ad4e: f503 7394 add.w r3, r3, #296 @ 0x128 800ad52: 461a mov r2, r3 800ad54: 68f8 ldr r0, [r7, #12] 800ad56: f7ff fe13 bl 800a980 800ad5a: 4603 mov r3, r0 800ad5c: 75fb strb r3, [r7, #23] if(ret == ES_WIFI_STATUS_OK) 800ad5e: 7dfb ldrb r3, [r7, #23] 800ad60: 2b00 cmp r3, #0 800ad62: d14b bne.n 800adfc { sprintf((char*)Obj->CmdData,"C2=%s\r", Password); 800ad64: 68fb ldr r3, [r7, #12] 800ad66: f503 7394 add.w r3, r3, #296 @ 0x128 800ad6a: 687a ldr r2, [r7, #4] 800ad6c: 4927 ldr r1, [pc, #156] @ (800ae0c ) 800ad6e: 4618 mov r0, r3 800ad70: f005 fa86 bl 8010280 ret = AT_ExecuteCommand(Obj, Obj->CmdData, Obj->CmdData); 800ad74: 68fb ldr r3, [r7, #12] 800ad76: f503 7194 add.w r1, r3, #296 @ 0x128 800ad7a: 68fb ldr r3, [r7, #12] 800ad7c: f503 7394 add.w r3, r3, #296 @ 0x128 800ad80: 461a mov r2, r3 800ad82: 68f8 ldr r0, [r7, #12] 800ad84: f7ff fdfc bl 800a980 800ad88: 4603 mov r3, r0 800ad8a: 75fb strb r3, [r7, #23] if(ret == ES_WIFI_STATUS_OK) 800ad8c: 7dfb ldrb r3, [r7, #23] 800ad8e: 2b00 cmp r3, #0 800ad90: d134 bne.n 800adfc { Obj->Security = SecType; 800ad92: 68fb ldr r3, [r7, #12] 800ad94: 78fa ldrb r2, [r7, #3] 800ad96: f883 208c strb.w r2, [r3, #140] @ 0x8c sprintf((char*)Obj->CmdData,"C3=%d\r", (uint8_t)SecType); 800ad9a: 68fb ldr r3, [r7, #12] 800ad9c: f503 7394 add.w r3, r3, #296 @ 0x128 800ada0: 78fa ldrb r2, [r7, #3] 800ada2: 491b ldr r1, [pc, #108] @ (800ae10 ) 800ada4: 4618 mov r0, r3 800ada6: f005 fa6b bl 8010280 ret = AT_ExecuteCommand(Obj, Obj->CmdData, Obj->CmdData); 800adaa: 68fb ldr r3, [r7, #12] 800adac: f503 7194 add.w r1, r3, #296 @ 0x128 800adb0: 68fb ldr r3, [r7, #12] 800adb2: f503 7394 add.w r3, r3, #296 @ 0x128 800adb6: 461a mov r2, r3 800adb8: 68f8 ldr r0, [r7, #12] 800adba: f7ff fde1 bl 800a980 800adbe: 4603 mov r3, r0 800adc0: 75fb strb r3, [r7, #23] if(ret == ES_WIFI_STATUS_OK) 800adc2: 7dfb ldrb r3, [r7, #23] 800adc4: 2b00 cmp r3, #0 800adc6: d119 bne.n 800adfc { sprintf((char*)Obj->CmdData,"C0\r"); 800adc8: 68fb ldr r3, [r7, #12] 800adca: f503 7394 add.w r3, r3, #296 @ 0x128 800adce: 4911 ldr r1, [pc, #68] @ (800ae14 ) 800add0: 4618 mov r0, r3 800add2: f005 fa55 bl 8010280 ret = AT_ExecuteCommand(Obj, Obj->CmdData, Obj->CmdData); 800add6: 68fb ldr r3, [r7, #12] 800add8: f503 7194 add.w r1, r3, #296 @ 0x128 800addc: 68fb ldr r3, [r7, #12] 800adde: f503 7394 add.w r3, r3, #296 @ 0x128 800ade2: 461a mov r2, r3 800ade4: 68f8 ldr r0, [r7, #12] 800ade6: f7ff fdcb bl 800a980 800adea: 4603 mov r3, r0 800adec: 75fb strb r3, [r7, #23] if(ret == ES_WIFI_STATUS_OK) 800adee: 7dfb ldrb r3, [r7, #23] 800adf0: 2b00 cmp r3, #0 800adf2: d103 bne.n 800adfc { Obj->NetSettings.IsConnected = 1; 800adf4: 68fb ldr r3, [r7, #12] 800adf6: 2201 movs r2, #1 800adf8: f883 20d2 strb.w r2, [r3, #210] @ 0xd2 } } } } UNLOCK_WIFI(); return ret; 800adfc: 7dfb ldrb r3, [r7, #23] } 800adfe: 4618 mov r0, r3 800ae00: 3718 adds r7, #24 800ae02: 46bd mov sp, r7 800ae04: bd80 pop {r7, pc} 800ae06: bf00 nop 800ae08: 08014a4c .word 0x08014a4c 800ae0c: 08014a54 .word 0x08014a54 800ae10: 08014a5c .word 0x08014a5c 800ae14: 08014a64 .word 0x08014a64 0800ae18 : /** * @brief Check whether the module is connected to an access point. * @retval Operation Status. */ uint8_t ES_WIFI_IsConnected(ES_WIFIObject_t *Obj) { 800ae18: b580 push {r7, lr} 800ae1a: b084 sub sp, #16 800ae1c: af00 add r7, sp, #0 800ae1e: 6078 str r0, [r7, #4] ES_WIFI_Status_t ret ; LOCK_WIFI(); sprintf((char*)Obj->CmdData,"CS\r"); 800ae20: 687b ldr r3, [r7, #4] 800ae22: f503 7394 add.w r3, r3, #296 @ 0x128 800ae26: 4911 ldr r1, [pc, #68] @ (800ae6c ) 800ae28: 4618 mov r0, r3 800ae2a: f005 fa29 bl 8010280 ret = AT_ExecuteCommand(Obj, Obj->CmdData, Obj->CmdData); 800ae2e: 687b ldr r3, [r7, #4] 800ae30: f503 7194 add.w r1, r3, #296 @ 0x128 800ae34: 687b ldr r3, [r7, #4] 800ae36: f503 7394 add.w r3, r3, #296 @ 0x128 800ae3a: 461a mov r2, r3 800ae3c: 6878 ldr r0, [r7, #4] 800ae3e: f7ff fd9f bl 800a980 800ae42: 4603 mov r3, r0 800ae44: 73fb strb r3, [r7, #15] if(ret == ES_WIFI_STATUS_OK) 800ae46: 7bfb ldrb r3, [r7, #15] 800ae48: 2b00 cmp r3, #0 800ae4a: d108 bne.n 800ae5e { AT_ParseIsConnected((char *)Obj->CmdData, &(Obj->NetSettings.IsConnected)); 800ae4c: 687b ldr r3, [r7, #4] 800ae4e: f503 7294 add.w r2, r3, #296 @ 0x128 800ae52: 687b ldr r3, [r7, #4] 800ae54: 33d2 adds r3, #210 @ 0xd2 800ae56: 4619 mov r1, r3 800ae58: 4610 mov r0, r2 800ae5a: f7ff fd7b bl 800a954 } UNLOCK_WIFI(); return Obj->NetSettings.IsConnected; 800ae5e: 687b ldr r3, [r7, #4] 800ae60: f893 30d2 ldrb.w r3, [r3, #210] @ 0xd2 } 800ae64: 4618 mov r0, r3 800ae66: 3710 adds r7, #16 800ae68: 46bd mov sp, r7 800ae6a: bd80 pop {r7, pc} 800ae6c: 08014a68 .word 0x08014a68 0800ae70 : * @param Obj: pointer to module handle * @param Pointer to network setting structure. * @retval Operation Status. */ ES_WIFI_Status_t ES_WIFI_GetNetworkSettings(ES_WIFIObject_t *Obj) { 800ae70: b580 push {r7, lr} 800ae72: b084 sub sp, #16 800ae74: af00 add r7, sp, #0 800ae76: 6078 str r0, [r7, #4] ES_WIFI_Status_t ret; LOCK_WIFI(); sprintf((char*)Obj->CmdData,"C?\r"); 800ae78: 687b ldr r3, [r7, #4] 800ae7a: f503 7394 add.w r3, r3, #296 @ 0x128 800ae7e: 4910 ldr r1, [pc, #64] @ (800aec0 ) 800ae80: 4618 mov r0, r3 800ae82: f005 f9fd bl 8010280 ret = AT_ExecuteCommand(Obj, Obj->CmdData, Obj->CmdData); 800ae86: 687b ldr r3, [r7, #4] 800ae88: f503 7194 add.w r1, r3, #296 @ 0x128 800ae8c: 687b ldr r3, [r7, #4] 800ae8e: f503 7394 add.w r3, r3, #296 @ 0x128 800ae92: 461a mov r2, r3 800ae94: 6878 ldr r0, [r7, #4] 800ae96: f7ff fd73 bl 800a980 800ae9a: 4603 mov r3, r0 800ae9c: 73fb strb r3, [r7, #15] if(ret == ES_WIFI_STATUS_OK) 800ae9e: 7bfb ldrb r3, [r7, #15] 800aea0: 2b00 cmp r3, #0 800aea2: d108 bne.n 800aeb6 { AT_ParseConnSettings((char *)Obj->CmdData, &Obj->NetSettings); 800aea4: 687b ldr r3, [r7, #4] 800aea6: f503 7294 add.w r2, r3, #296 @ 0x128 800aeaa: 687b ldr r3, [r7, #4] 800aeac: 338d adds r3, #141 @ 0x8d 800aeae: 4619 mov r1, r3 800aeb0: 4610 mov r0, r2 800aeb2: f7ff fc9f bl 800a7f4 } UNLOCK_WIFI(); return ret; 800aeb6: 7bfb ldrb r3, [r7, #15] } 800aeb8: 4618 mov r0, r3 800aeba: 3710 adds r7, #16 800aebc: 46bd mov sp, r7 800aebe: bd80 pop {r7, pc} 800aec0: 08014a70 .word 0x08014a70 0800aec4 : * @param Obj: pointer to module handle * @param mac: pointer to the MAC address array. * @retval Operation Status. */ ES_WIFI_Status_t ES_WIFI_GetMACAddress(ES_WIFIObject_t *Obj, uint8_t *mac) { 800aec4: b580 push {r7, lr} 800aec6: b084 sub sp, #16 800aec8: af00 add r7, sp, #0 800aeca: 6078 str r0, [r7, #4] 800aecc: 6039 str r1, [r7, #0] ES_WIFI_Status_t ret ; char *ptr; LOCK_WIFI(); sprintf((char*)Obj->CmdData,"Z5\r"); 800aece: 687b ldr r3, [r7, #4] 800aed0: f503 7394 add.w r3, r3, #296 @ 0x128 800aed4: 4912 ldr r1, [pc, #72] @ (800af20 ) 800aed6: 4618 mov r0, r3 800aed8: f005 f9d2 bl 8010280 ret = AT_ExecuteCommand(Obj, Obj->CmdData, Obj->CmdData); 800aedc: 687b ldr r3, [r7, #4] 800aede: f503 7194 add.w r1, r3, #296 @ 0x128 800aee2: 687b ldr r3, [r7, #4] 800aee4: f503 7394 add.w r3, r3, #296 @ 0x128 800aee8: 461a mov r2, r3 800aeea: 6878 ldr r0, [r7, #4] 800aeec: f7ff fd48 bl 800a980 800aef0: 4603 mov r3, r0 800aef2: 73fb strb r3, [r7, #15] if(ret == ES_WIFI_STATUS_OK) 800aef4: 7bfb ldrb r3, [r7, #15] 800aef6: 2b00 cmp r3, #0 800aef8: d10c bne.n 800af14 { ptr = strtok((char *)(Obj->CmdData + 2), "\r\n"); 800aefa: 687b ldr r3, [r7, #4] 800aefc: f503 7394 add.w r3, r3, #296 @ 0x128 800af00: 3302 adds r3, #2 800af02: 4908 ldr r1, [pc, #32] @ (800af24 ) 800af04: 4618 mov r0, r3 800af06: f005 fb21 bl 801054c 800af0a: 60b8 str r0, [r7, #8] ParseMAC(ptr, mac) ; 800af0c: 6839 ldr r1, [r7, #0] 800af0e: 68b8 ldr r0, [r7, #8] 800af10: f7ff fba3 bl 800a65a } UNLOCK_WIFI(); return ret; 800af14: 7bfb ldrb r3, [r7, #15] } 800af16: 4618 mov r0, r3 800af18: 3710 adds r7, #16 800af1a: 46bd mov sp, r7 800af1c: bd80 pop {r7, pc} 800af1e: bf00 nop 800af20: 08014acc .word 0x08014acc 800af24: 08014ad0 .word 0x08014ad0 0800af28 : * @param Obj: pointer to module handle * @param conn: pointer to the connection structure * @retval Operation Status. */ ES_WIFI_Status_t ES_WIFI_StartServerSingleConn(ES_WIFIObject_t *Obj, ES_WIFI_Conn_t *conn) { 800af28: b580 push {r7, lr} 800af2a: b084 sub sp, #16 800af2c: af00 add r7, sp, #0 800af2e: 6078 str r0, [r7, #4] 800af30: 6039 str r1, [r7, #0] ES_WIFI_Status_t ret = ES_WIFI_STATUS_OK; 800af32: 2300 movs r3, #0 800af34: 73fb strb r3, [r7, #15] LOCK_WIFI(); sprintf((char*)Obj->CmdData,"P0=%d\r", conn->Number); 800af36: 687b ldr r3, [r7, #4] 800af38: f503 7094 add.w r0, r3, #296 @ 0x128 800af3c: 683b ldr r3, [r7, #0] 800af3e: 785b ldrb r3, [r3, #1] 800af40: 461a mov r2, r3 800af42: 4949 ldr r1, [pc, #292] @ (800b068 ) 800af44: f005 f99c bl 8010280 ret = AT_ExecuteCommand(Obj, Obj->CmdData, Obj->CmdData); 800af48: 687b ldr r3, [r7, #4] 800af4a: f503 7194 add.w r1, r3, #296 @ 0x128 800af4e: 687b ldr r3, [r7, #4] 800af50: f503 7394 add.w r3, r3, #296 @ 0x128 800af54: 461a mov r2, r3 800af56: 6878 ldr r0, [r7, #4] 800af58: f7ff fd12 bl 800a980 800af5c: 4603 mov r3, r0 800af5e: 73fb strb r3, [r7, #15] if(ret != ES_WIFI_STATUS_OK) 800af60: 7bfb ldrb r3, [r7, #15] 800af62: 2b00 cmp r3, #0 800af64: d001 beq.n 800af6a { UNLOCK_WIFI(); return ret; 800af66: 7bfb ldrb r3, [r7, #15] 800af68: e079 b.n 800b05e } if ((conn->Type != ES_WIFI_UDP_CONNECTION) && (conn->Type != ES_WIFI_UDP_LITE_CONNECTION)) 800af6a: 683b ldr r3, [r7, #0] 800af6c: 781b ldrb r3, [r3, #0] 800af6e: 2b01 cmp r3, #1 800af70: d016 beq.n 800afa0 800af72: 683b ldr r3, [r7, #0] 800af74: 781b ldrb r3, [r3, #0] 800af76: 2b02 cmp r3, #2 800af78: d012 beq.n 800afa0 { sprintf((char*)Obj->CmdData,"PK=1,3000\r"); 800af7a: 687b ldr r3, [r7, #4] 800af7c: f503 7394 add.w r3, r3, #296 @ 0x128 800af80: 493a ldr r1, [pc, #232] @ (800b06c ) 800af82: 4618 mov r0, r3 800af84: f005 f97c bl 8010280 ret = AT_ExecuteCommand(Obj, Obj->CmdData, Obj->CmdData); 800af88: 687b ldr r3, [r7, #4] 800af8a: f503 7194 add.w r1, r3, #296 @ 0x128 800af8e: 687b ldr r3, [r7, #4] 800af90: f503 7394 add.w r3, r3, #296 @ 0x128 800af94: 461a mov r2, r3 800af96: 6878 ldr r0, [r7, #4] 800af98: f7ff fcf2 bl 800a980 800af9c: 4603 mov r3, r0 800af9e: 73fb strb r3, [r7, #15] } if(ret == ES_WIFI_STATUS_OK) 800afa0: 7bfb ldrb r3, [r7, #15] 800afa2: 2b00 cmp r3, #0 800afa4: d15a bne.n 800b05c { sprintf((char*)Obj->CmdData,"P1=%d\r", conn->Type); 800afa6: 687b ldr r3, [r7, #4] 800afa8: f503 7094 add.w r0, r3, #296 @ 0x128 800afac: 683b ldr r3, [r7, #0] 800afae: 781b ldrb r3, [r3, #0] 800afb0: 461a mov r2, r3 800afb2: 492f ldr r1, [pc, #188] @ (800b070 ) 800afb4: f005 f964 bl 8010280 ret = AT_ExecuteCommand(Obj, Obj->CmdData, Obj->CmdData); 800afb8: 687b ldr r3, [r7, #4] 800afba: f503 7194 add.w r1, r3, #296 @ 0x128 800afbe: 687b ldr r3, [r7, #4] 800afc0: f503 7394 add.w r3, r3, #296 @ 0x128 800afc4: 461a mov r2, r3 800afc6: 6878 ldr r0, [r7, #4] 800afc8: f7ff fcda bl 800a980 800afcc: 4603 mov r3, r0 800afce: 73fb strb r3, [r7, #15] if(ret == ES_WIFI_STATUS_OK) 800afd0: 7bfb ldrb r3, [r7, #15] 800afd2: 2b00 cmp r3, #0 800afd4: d142 bne.n 800b05c { sprintf((char*)Obj->CmdData,"P8=%d\r", conn->Backlog); 800afd6: 687b ldr r3, [r7, #4] 800afd8: f503 7094 add.w r0, r3, #296 @ 0x128 800afdc: 683b ldr r3, [r7, #0] 800afde: 7c1b ldrb r3, [r3, #16] 800afe0: 461a mov r2, r3 800afe2: 4924 ldr r1, [pc, #144] @ (800b074 ) 800afe4: f005 f94c bl 8010280 ret = AT_ExecuteCommand(Obj, Obj->CmdData, Obj->CmdData); 800afe8: 687b ldr r3, [r7, #4] 800afea: f503 7194 add.w r1, r3, #296 @ 0x128 800afee: 687b ldr r3, [r7, #4] 800aff0: f503 7394 add.w r3, r3, #296 @ 0x128 800aff4: 461a mov r2, r3 800aff6: 6878 ldr r0, [r7, #4] 800aff8: f7ff fcc2 bl 800a980 800affc: 4603 mov r3, r0 800affe: 73fb strb r3, [r7, #15] if (ret == ES_WIFI_STATUS_OK) 800b000: 7bfb ldrb r3, [r7, #15] 800b002: 2b00 cmp r3, #0 800b004: d12a bne.n 800b05c { sprintf((char*)Obj->CmdData,"P2=%d\r", conn->LocalPort); 800b006: 687b ldr r3, [r7, #4] 800b008: f503 7094 add.w r0, r3, #296 @ 0x128 800b00c: 683b ldr r3, [r7, #0] 800b00e: 889b ldrh r3, [r3, #4] 800b010: 461a mov r2, r3 800b012: 4919 ldr r1, [pc, #100] @ (800b078 ) 800b014: f005 f934 bl 8010280 ret = AT_ExecuteCommand(Obj, Obj->CmdData, Obj->CmdData); 800b018: 687b ldr r3, [r7, #4] 800b01a: f503 7194 add.w r1, r3, #296 @ 0x128 800b01e: 687b ldr r3, [r7, #4] 800b020: f503 7394 add.w r3, r3, #296 @ 0x128 800b024: 461a mov r2, r3 800b026: 6878 ldr r0, [r7, #4] 800b028: f7ff fcaa bl 800a980 800b02c: 4603 mov r3, r0 800b02e: 73fb strb r3, [r7, #15] if (ret == ES_WIFI_STATUS_OK) 800b030: 7bfb ldrb r3, [r7, #15] 800b032: 2b00 cmp r3, #0 800b034: d112 bne.n 800b05c { // multi accept mode sprintf((char*)Obj->CmdData,"P5=11\r"); 800b036: 687b ldr r3, [r7, #4] 800b038: f503 7394 add.w r3, r3, #296 @ 0x128 800b03c: 490f ldr r1, [pc, #60] @ (800b07c ) 800b03e: 4618 mov r0, r3 800b040: f005 f91e bl 8010280 ret = AT_ExecuteCommand(Obj, Obj->CmdData, Obj->CmdData); 800b044: 687b ldr r3, [r7, #4] 800b046: f503 7194 add.w r1, r3, #296 @ 0x128 800b04a: 687b ldr r3, [r7, #4] 800b04c: f503 7394 add.w r3, r3, #296 @ 0x128 800b050: 461a mov r2, r3 800b052: 6878 ldr r0, [r7, #4] 800b054: f7ff fc94 bl 800a980 800b058: 4603 mov r3, r0 800b05a: 73fb strb r3, [r7, #15] } } } } UNLOCK_WIFI(); return ret; 800b05c: 7bfb ldrb r3, [r7, #15] } 800b05e: 4618 mov r0, r3 800b060: 3710 adds r7, #16 800b062: 46bd mov sp, r7 800b064: bd80 pop {r7, pc} 800b066: bf00 nop 800b068: 08014b34 .word 0x08014b34 800b06c: 08014b7c .word 0x08014b7c 800b070: 08014b3c .word 0x08014b3c 800b074: 08014b88 .word 0x08014b88 800b078: 08014b44 .word 0x08014b44 800b07c: 08014b90 .word 0x08014b90 0800b080 : * @param Obj: pointer to module handle * @param conn: pointer to the connection structure * @retval Operation Status. */ ES_WIFI_Status_t ES_WIFI_WaitServerConnection(ES_WIFIObject_t *Obj,uint32_t timeout,ES_WIFI_Conn_t *conn) { 800b080: b580 push {r7, lr} 800b082: b08a sub sp, #40 @ 0x28 800b084: af00 add r7, sp, #0 800b086: 60f8 str r0, [r7, #12] 800b088: 60b9 str r1, [r7, #8] 800b08a: 607a str r2, [r7, #4] ES_WIFI_Status_t ret = ES_WIFI_STATUS_OK; 800b08c: 2300 movs r3, #0 800b08e: f887 3023 strb.w r3, [r7, #35] @ 0x23 uint32_t t; uint32_t tlast; uint32_t tstart; char *ptr; tstart=HAL_GetTick(); 800b092: f7f8 fde1 bl 8003c58 800b096: 6278 str r0, [r7, #36] @ 0x24 tlast=tstart+timeout; 800b098: 6a7a ldr r2, [r7, #36] @ 0x24 800b09a: 68bb ldr r3, [r7, #8] 800b09c: 4413 add r3, r2 800b09e: 61fb str r3, [r7, #28] if (tlast < tstart ) 800b0a0: 69fa ldr r2, [r7, #28] 800b0a2: 6a7b ldr r3, [r7, #36] @ 0x24 800b0a4: 429a cmp r2, r3 800b0a6: d201 bcs.n 800b0ac { tstart=0; 800b0a8: 2300 movs r3, #0 800b0aa: 627b str r3, [r7, #36] @ 0x24 do { #if (ES_WIFI_USE_UART == 0) // mandatory to flush MR async messages memset(Obj->CmdData,0,sizeof(Obj->CmdData)); 800b0ac: 68fb ldr r3, [r7, #12] 800b0ae: f503 7394 add.w r3, r3, #296 @ 0x128 800b0b2: f44f 62fa mov.w r2, #2000 @ 0x7d0 800b0b6: 2100 movs r1, #0 800b0b8: 4618 mov r0, r3 800b0ba: f005 fa19 bl 80104f0 sprintf((char*)Obj->CmdData,"MR\r"); 800b0be: 68fb ldr r3, [r7, #12] 800b0c0: f503 7394 add.w r3, r3, #296 @ 0x128 800b0c4: 4972 ldr r1, [pc, #456] @ (800b290 ) 800b0c6: 4618 mov r0, r3 800b0c8: f005 f8da bl 8010280 ret = AT_ExecuteCommand(Obj, Obj->CmdData, Obj->CmdData); 800b0cc: 68fb ldr r3, [r7, #12] 800b0ce: f503 7194 add.w r1, r3, #296 @ 0x128 800b0d2: 68fb ldr r3, [r7, #12] 800b0d4: f503 7394 add.w r3, r3, #296 @ 0x128 800b0d8: 461a mov r2, r3 800b0da: 68f8 ldr r0, [r7, #12] 800b0dc: f7ff fc50 bl 800a980 800b0e0: 4603 mov r3, r0 800b0e2: f887 3023 strb.w r3, [r7, #35] @ 0x23 if(ret == ES_WIFI_STATUS_OK) 800b0e6: f897 3023 ldrb.w r3, [r7, #35] @ 0x23 800b0ea: 2b00 cmp r3, #0 800b0ec: d136 bne.n 800b15c { if((strstr((char *)Obj->CmdData, "[SOMA]")) && (strstr((char *)Obj->CmdData, "[EOMA]"))) 800b0ee: 68fb ldr r3, [r7, #12] 800b0f0: f503 7394 add.w r3, r3, #296 @ 0x128 800b0f4: 4967 ldr r1, [pc, #412] @ (800b294 ) 800b0f6: 4618 mov r0, r3 800b0f8: f005 fa84 bl 8010604 800b0fc: 4603 mov r3, r0 800b0fe: 2b00 cmp r3, #0 800b100: d03b beq.n 800b17a 800b102: 68fb ldr r3, [r7, #12] 800b104: f503 7394 add.w r3, r3, #296 @ 0x128 800b108: 4963 ldr r1, [pc, #396] @ (800b298 ) 800b10a: 4618 mov r0, r3 800b10c: f005 fa7a bl 8010604 800b110: 4603 mov r3, r0 800b112: 2b00 cmp r3, #0 800b114: d031 beq.n 800b17a { if(strstr((char *)Obj->CmdData, "Accepted")) 800b116: 68fb ldr r3, [r7, #12] 800b118: f503 7394 add.w r3, r3, #296 @ 0x128 800b11c: 495f ldr r1, [pc, #380] @ (800b29c ) 800b11e: 4618 mov r0, r3 800b120: f005 fa70 bl 8010604 800b124: 4603 mov r3, r0 800b126: 2b00 cmp r3, #0 800b128: d127 bne.n 800b17a { //printf("SOMA Accepted\n"); } else if(!strstr((char *)Obj->CmdData,"[SOMA][EOMA]")) 800b12a: 68fb ldr r3, [r7, #12] 800b12c: f503 7394 add.w r3, r3, #296 @ 0x128 800b130: 495b ldr r1, [pc, #364] @ (800b2a0 ) 800b132: 4618 mov r0, r3 800b134: f005 fa66 bl 8010604 800b138: 4603 mov r3, r0 800b13a: 2b00 cmp r3, #0 800b13c: d11d bne.n 800b17a { DEBUG("Bad MR stntax msg %s\n", Obj->CmdData); 800b13e: f240 7241 movw r2, #1857 @ 0x741 800b142: 4958 ldr r1, [pc, #352] @ (800b2a4 ) 800b144: 4858 ldr r0, [pc, #352] @ (800b2a8 ) 800b146: f004 fff5 bl 8010134 800b14a: 68fb ldr r3, [r7, #12] 800b14c: f503 7394 add.w r3, r3, #296 @ 0x128 800b150: 4619 mov r1, r3 800b152: 4856 ldr r0, [pc, #344] @ (800b2ac ) 800b154: f004 ffee bl 8010134 UNLOCK_WIFI(); return ES_WIFI_STATUS_ERROR; 800b158: 2302 movs r3, #2 800b15a: e095 b.n 800b288 } } } else { DEBUG("MR command failed %s\n", Obj->CmdData); 800b15c: f240 7249 movw r2, #1865 @ 0x749 800b160: 4950 ldr r1, [pc, #320] @ (800b2a4 ) 800b162: 4851 ldr r0, [pc, #324] @ (800b2a8 ) 800b164: f004 ffe6 bl 8010134 800b168: 68fb ldr r3, [r7, #12] 800b16a: f503 7394 add.w r3, r3, #296 @ 0x128 800b16e: 4619 mov r1, r3 800b170: 484f ldr r0, [pc, #316] @ (800b2b0 ) 800b172: f004 ffdf bl 8010134 UNLOCK_WIFI(); return ES_WIFI_STATUS_ERROR; 800b176: 2302 movs r3, #2 800b178: e086 b.n 800b288 } #endif memset(Obj->CmdData,0,sizeof(Obj->CmdData)); 800b17a: 68fb ldr r3, [r7, #12] 800b17c: f503 7394 add.w r3, r3, #296 @ 0x128 800b180: f44f 62fa mov.w r2, #2000 @ 0x7d0 800b184: 2100 movs r1, #0 800b186: 4618 mov r0, r3 800b188: f005 f9b2 bl 80104f0 sprintf((char*)Obj->CmdData,"P?\r"); 800b18c: 68fb ldr r3, [r7, #12] 800b18e: f503 7394 add.w r3, r3, #296 @ 0x128 800b192: 4948 ldr r1, [pc, #288] @ (800b2b4 ) 800b194: 4618 mov r0, r3 800b196: f005 f873 bl 8010280 ret = AT_ExecuteCommand(Obj, Obj->CmdData, Obj->CmdData); 800b19a: 68fb ldr r3, [r7, #12] 800b19c: f503 7194 add.w r1, r3, #296 @ 0x128 800b1a0: 68fb ldr r3, [r7, #12] 800b1a2: f503 7394 add.w r3, r3, #296 @ 0x128 800b1a6: 461a mov r2, r3 800b1a8: 68f8 ldr r0, [r7, #12] 800b1aa: f7ff fbe9 bl 800a980 800b1ae: 4603 mov r3, r0 800b1b0: f887 3023 strb.w r3, [r7, #35] @ 0x23 if(ret == ES_WIFI_STATUS_OK) 800b1b4: f897 3023 ldrb.w r3, [r7, #35] @ 0x23 800b1b8: 2b00 cmp r3, #0 800b1ba: d13f bne.n 800b23c { if (strncmp((char *)Obj->CmdData, "\r\n0,0.0.0.0,",12)!=0) 800b1bc: 68fb ldr r3, [r7, #12] 800b1be: f503 7394 add.w r3, r3, #296 @ 0x128 800b1c2: 220c movs r2, #12 800b1c4: 493c ldr r1, [pc, #240] @ (800b2b8 ) 800b1c6: 4618 mov r0, r3 800b1c8: f005 f99a bl 8010500 800b1cc: 4603 mov r3, r0 800b1ce: 2b00 cmp r3, #0 800b1d0: d043 beq.n 800b25a { ptr = strtok((char *)Obj->CmdData + 2, ","); 800b1d2: 68fb ldr r3, [r7, #12] 800b1d4: f503 7394 add.w r3, r3, #296 @ 0x128 800b1d8: 3302 adds r3, #2 800b1da: 4938 ldr r1, [pc, #224] @ (800b2bc ) 800b1dc: 4618 mov r0, r3 800b1de: f005 f9b5 bl 801054c 800b1e2: 6178 str r0, [r7, #20] ptr = strtok(0, ","); //port 800b1e4: 4935 ldr r1, [pc, #212] @ (800b2bc ) 800b1e6: 2000 movs r0, #0 800b1e8: f005 f9b0 bl 801054c 800b1ec: 6178 str r0, [r7, #20] ParseIP((char *)ptr, conn->RemoteIP); 800b1ee: 687b ldr r3, [r7, #4] 800b1f0: 3306 adds r3, #6 800b1f2: 4619 mov r1, r3 800b1f4: 6978 ldr r0, [r7, #20] 800b1f6: f7ff fa5b bl 800a6b0 ptr = strtok(0, ","); //port 800b1fa: 4930 ldr r1, [pc, #192] @ (800b2bc ) 800b1fc: 2000 movs r0, #0 800b1fe: f005 f9a5 bl 801054c 800b202: 6178 str r0, [r7, #20] conn->LocalPort=ParseNumber(ptr,0); 800b204: 2100 movs r1, #0 800b206: 6978 ldr r0, [r7, #20] 800b208: f7ff f9e3 bl 800a5d2 800b20c: 4603 mov r3, r0 800b20e: b29a uxth r2, r3 800b210: 687b ldr r3, [r7, #4] 800b212: 809a strh r2, [r3, #4] ptr = strtok(0, ","); //ip 800b214: 4929 ldr r1, [pc, #164] @ (800b2bc ) 800b216: 2000 movs r0, #0 800b218: f005 f998 bl 801054c 800b21c: 6178 str r0, [r7, #20] ptr = strtok(0, ","); //remote port 800b21e: 4927 ldr r1, [pc, #156] @ (800b2bc ) 800b220: 2000 movs r0, #0 800b222: f005 f993 bl 801054c 800b226: 6178 str r0, [r7, #20] conn->RemotePort=ParseNumber(ptr,0); 800b228: 2100 movs r1, #0 800b22a: 6978 ldr r0, [r7, #20] 800b22c: f7ff f9d1 bl 800a5d2 800b230: 4603 mov r3, r0 800b232: b29a uxth r2, r3 800b234: 687b ldr r3, [r7, #4] 800b236: 805a strh r2, [r3, #2] UNLOCK_WIFI(); return ES_WIFI_STATUS_OK; 800b238: 2300 movs r3, #0 800b23a: e025 b.n 800b288 } } else { DEBUG("P? command failed %s\n", Obj->CmdData); 800b23c: f240 7264 movw r2, #1892 @ 0x764 800b240: 4918 ldr r1, [pc, #96] @ (800b2a4 ) 800b242: 4819 ldr r0, [pc, #100] @ (800b2a8 ) 800b244: f004 ff76 bl 8010134 800b248: 68fb ldr r3, [r7, #12] 800b24a: f503 7394 add.w r3, r3, #296 @ 0x128 800b24e: 4619 mov r1, r3 800b250: 481b ldr r0, [pc, #108] @ (800b2c0 ) 800b252: f004 ff6f bl 8010134 UNLOCK_WIFI(); return ES_WIFI_STATUS_ERROR; 800b256: 2302 movs r3, #2 800b258: e016 b.n 800b288 } UNLOCK_WIFI(); Obj->fops.IO_Delay(100); 800b25a: 68fb ldr r3, [r7, #12] 800b25c: f8d3 311c ldr.w r3, [r3, #284] @ 0x11c 800b260: 2064 movs r0, #100 @ 0x64 800b262: 4798 blx r3 LOCK_WIFI(); t = HAL_GetTick(); 800b264: f7f8 fcf8 bl 8003c58 800b268: 61b8 str r0, [r7, #24] } while ((timeout==0) ||((t < tlast) || (t < tstart))); 800b26a: 68bb ldr r3, [r7, #8] 800b26c: 2b00 cmp r3, #0 800b26e: f43f af1d beq.w 800b0ac 800b272: 69ba ldr r2, [r7, #24] 800b274: 69fb ldr r3, [r7, #28] 800b276: 429a cmp r2, r3 800b278: f4ff af18 bcc.w 800b0ac 800b27c: 69ba ldr r2, [r7, #24] 800b27e: 6a7b ldr r3, [r7, #36] @ 0x24 800b280: 429a cmp r2, r3 800b282: f4ff af13 bcc.w 800b0ac return ES_WIFI_STATUS_TIMEOUT; 800b286: 2303 movs r3, #3 } 800b288: 4618 mov r0, r3 800b28a: 3728 adds r7, #40 @ 0x28 800b28c: 46bd mov sp, r7 800b28e: bd80 pop {r7, pc} 800b290: 08014a44 .word 0x08014a44 800b294: 08014b98 .word 0x08014b98 800b298: 08014ba0 .word 0x08014ba0 800b29c: 08014ba8 .word 0x08014ba8 800b2a0: 08014bb4 .word 0x08014bb4 800b2a4: 08014bc4 .word 0x08014bc4 800b2a8: 08014be0 .word 0x08014be0 800b2ac: 08014be8 .word 0x08014be8 800b2b0: 08014c00 .word 0x08014c00 800b2b4: 08014c18 .word 0x08014c18 800b2b8: 08014c1c .word 0x08014c1c 800b2bc: 08014a04 .word 0x08014a04 800b2c0: 08014c2c .word 0x08014c2c 0800b2c4 : * @param Obj: pointer to module handle * @param socket: server socket * @retval Operation Status. */ ES_WIFI_Status_t ES_WIFI_CloseServerConnection(ES_WIFIObject_t *Obj, int socket) { 800b2c4: b580 push {r7, lr} 800b2c6: b084 sub sp, #16 800b2c8: af00 add r7, sp, #0 800b2ca: 6078 str r0, [r7, #4] 800b2cc: 6039 str r1, [r7, #0] ES_WIFI_Status_t ret; LOCK_WIFI(); sprintf((char*)Obj->CmdData,"P0=%d\r", socket); 800b2ce: 687b ldr r3, [r7, #4] 800b2d0: f503 7394 add.w r3, r3, #296 @ 0x128 800b2d4: 683a ldr r2, [r7, #0] 800b2d6: 4925 ldr r1, [pc, #148] @ (800b36c ) 800b2d8: 4618 mov r0, r3 800b2da: f004 ffd1 bl 8010280 ret = AT_ExecuteCommand(Obj, Obj->CmdData, Obj->CmdData); 800b2de: 687b ldr r3, [r7, #4] 800b2e0: f503 7194 add.w r1, r3, #296 @ 0x128 800b2e4: 687b ldr r3, [r7, #4] 800b2e6: f503 7394 add.w r3, r3, #296 @ 0x128 800b2ea: 461a mov r2, r3 800b2ec: 6878 ldr r0, [r7, #4] 800b2ee: f7ff fb47 bl 800a980 800b2f2: 4603 mov r3, r0 800b2f4: 73fb strb r3, [r7, #15] if(ret != ES_WIFI_STATUS_OK) 800b2f6: 7bfb ldrb r3, [r7, #15] 800b2f8: 2b00 cmp r3, #0 800b2fa: d00e beq.n 800b31a { DEBUG(" Can not select socket %s\n", Obj->CmdData); 800b2fc: f44f 62f0 mov.w r2, #1920 @ 0x780 800b300: 491b ldr r1, [pc, #108] @ (800b370 ) 800b302: 481c ldr r0, [pc, #112] @ (800b374 ) 800b304: f004 ff16 bl 8010134 800b308: 687b ldr r3, [r7, #4] 800b30a: f503 7394 add.w r3, r3, #296 @ 0x128 800b30e: 4619 mov r1, r3 800b310: 4819 ldr r0, [pc, #100] @ (800b378 ) 800b312: f004 ff0f bl 8010134 UNLOCK_WIFI(); return ret; 800b316: 7bfb ldrb r3, [r7, #15] 800b318: e023 b.n 800b362 } sprintf((char*)Obj->CmdData,"P5=10\r"); 800b31a: 687b ldr r3, [r7, #4] 800b31c: f503 7394 add.w r3, r3, #296 @ 0x128 800b320: 4916 ldr r1, [pc, #88] @ (800b37c ) 800b322: 4618 mov r0, r3 800b324: f004 ffac bl 8010280 ret = AT_ExecuteCommand(Obj, Obj->CmdData, Obj->CmdData); 800b328: 687b ldr r3, [r7, #4] 800b32a: f503 7194 add.w r1, r3, #296 @ 0x128 800b32e: 687b ldr r3, [r7, #4] 800b330: f503 7394 add.w r3, r3, #296 @ 0x128 800b334: 461a mov r2, r3 800b336: 6878 ldr r0, [r7, #4] 800b338: f7ff fb22 bl 800a980 800b33c: 4603 mov r3, r0 800b33e: 73fb strb r3, [r7, #15] if(ret != ES_WIFI_STATUS_OK) 800b340: 7bfb ldrb r3, [r7, #15] 800b342: 2b00 cmp r3, #0 800b344: d00c beq.n 800b360 { DEBUG(" Open next failed %s\n", Obj->CmdData); 800b346: f240 7289 movw r2, #1929 @ 0x789 800b34a: 4909 ldr r1, [pc, #36] @ (800b370 ) 800b34c: 4809 ldr r0, [pc, #36] @ (800b374 ) 800b34e: f004 fef1 bl 8010134 800b352: 687b ldr r3, [r7, #4] 800b354: f503 7394 add.w r3, r3, #296 @ 0x128 800b358: 4619 mov r1, r3 800b35a: 4809 ldr r0, [pc, #36] @ (800b380 ) 800b35c: f004 feea bl 8010134 } UNLOCK_WIFI(); return ret; 800b360: 7bfb ldrb r3, [r7, #15] } 800b362: 4618 mov r0, r3 800b364: 3710 adds r7, #16 800b366: 46bd mov sp, r7 800b368: bd80 pop {r7, pc} 800b36a: bf00 nop 800b36c: 08014b34 .word 0x08014b34 800b370: 08014bc4 .word 0x08014bc4 800b374: 08014be0 .word 0x08014be0 800b378: 08014c44 .word 0x08014c44 800b37c: 08014c60 .word 0x08014c60 800b380: 08014c68 .word 0x08014c68 0800b384 : * @brief Stop a Server. * @param Obj: pointer to module handle * @retval Operation Status. */ ES_WIFI_Status_t ES_WIFI_StopServerSingleConn(ES_WIFIObject_t *Obj, int socket) { 800b384: b580 push {r7, lr} 800b386: b084 sub sp, #16 800b388: af00 add r7, sp, #0 800b38a: 6078 str r0, [r7, #4] 800b38c: 6039 str r1, [r7, #0] ES_WIFI_Status_t ret; LOCK_WIFI(); sprintf((char*)Obj->CmdData,"P0=%d\r", socket); 800b38e: 687b ldr r3, [r7, #4] 800b390: f503 7394 add.w r3, r3, #296 @ 0x128 800b394: 683a ldr r2, [r7, #0] 800b396: 4926 ldr r1, [pc, #152] @ (800b430 ) 800b398: 4618 mov r0, r3 800b39a: f004 ff71 bl 8010280 ret = AT_ExecuteCommand(Obj, Obj->CmdData, Obj->CmdData); 800b39e: 687b ldr r3, [r7, #4] 800b3a0: f503 7194 add.w r1, r3, #296 @ 0x128 800b3a4: 687b ldr r3, [r7, #4] 800b3a6: f503 7394 add.w r3, r3, #296 @ 0x128 800b3aa: 461a mov r2, r3 800b3ac: 6878 ldr r0, [r7, #4] 800b3ae: f7ff fae7 bl 800a980 800b3b2: 4603 mov r3, r0 800b3b4: 73fb strb r3, [r7, #15] if(ret != ES_WIFI_STATUS_OK) 800b3b6: 7bfb ldrb r3, [r7, #15] 800b3b8: 2b00 cmp r3, #0 800b3ba: d00e beq.n 800b3da { DEBUG("Selecting socket failed: %s\n", Obj->CmdData); 800b3bc: f240 729f movw r2, #1951 @ 0x79f 800b3c0: 491c ldr r1, [pc, #112] @ (800b434 ) 800b3c2: 481d ldr r0, [pc, #116] @ (800b438 ) 800b3c4: f004 feb6 bl 8010134 800b3c8: 687b ldr r3, [r7, #4] 800b3ca: f503 7394 add.w r3, r3, #296 @ 0x128 800b3ce: 4619 mov r1, r3 800b3d0: 481a ldr r0, [pc, #104] @ (800b43c ) 800b3d2: f004 feaf bl 8010134 UNLOCK_WIFI(); return ret; 800b3d6: 7bfb ldrb r3, [r7, #15] 800b3d8: e025 b.n 800b426 } sprintf((char*)Obj->CmdData,"P5=0\r"); 800b3da: 687b ldr r3, [r7, #4] 800b3dc: f503 7394 add.w r3, r3, #296 @ 0x128 800b3e0: 4917 ldr r1, [pc, #92] @ (800b440 ) 800b3e2: 4618 mov r0, r3 800b3e4: f004 ff4c bl 8010280 ret = AT_ExecuteCommand(Obj, Obj->CmdData, Obj->CmdData); 800b3e8: 687b ldr r3, [r7, #4] 800b3ea: f503 7194 add.w r1, r3, #296 @ 0x128 800b3ee: 687b ldr r3, [r7, #4] 800b3f0: f503 7394 add.w r3, r3, #296 @ 0x128 800b3f4: 461a mov r2, r3 800b3f6: 6878 ldr r0, [r7, #4] 800b3f8: f7ff fac2 bl 800a980 800b3fc: 4603 mov r3, r0 800b3fe: 73fb strb r3, [r7, #15] if(ret != ES_WIFI_STATUS_OK) 800b400: 7bfb ldrb r3, [r7, #15] 800b402: 2b00 cmp r3, #0 800b404: d00e beq.n 800b424 { DEBUG("Stopping server failed %s\n", Obj->CmdData); 800b406: f44f 62f5 mov.w r2, #1960 @ 0x7a8 800b40a: 490a ldr r1, [pc, #40] @ (800b434 ) 800b40c: 480a ldr r0, [pc, #40] @ (800b438 ) 800b40e: f004 fe91 bl 8010134 800b412: 687b ldr r3, [r7, #4] 800b414: f503 7394 add.w r3, r3, #296 @ 0x128 800b418: 4619 mov r1, r3 800b41a: 480a ldr r0, [pc, #40] @ (800b444 ) 800b41c: f004 fe8a bl 8010134 UNLOCK_WIFI(); return ret; 800b420: 7bfb ldrb r3, [r7, #15] 800b422: e000 b.n 800b426 } UNLOCK_WIFI(); return ret; 800b424: 7bfb ldrb r3, [r7, #15] } 800b426: 4618 mov r0, r3 800b428: 3710 adds r7, #16 800b42a: 46bd mov sp, r7 800b42c: bd80 pop {r7, pc} 800b42e: bf00 nop 800b430: 08014b34 .word 0x08014b34 800b434: 08014bc4 .word 0x08014bc4 800b438: 08014be0 .word 0x08014be0 800b43c: 08014c80 .word 0x08014c80 800b440: 08014ca0 .word 0x08014ca0 800b444: 08014ca8 .word 0x08014ca8 0800b448 : * @param pdata: pointer to data * @param len : length of the data to be sent * @retval Operation Status. */ ES_WIFI_Status_t ES_WIFI_SendData(ES_WIFIObject_t *Obj, uint8_t Socket, uint8_t *pdata, uint16_t Reqlen , uint16_t *SentLen , uint32_t Timeout) { 800b448: b580 push {r7, lr} 800b44a: b088 sub sp, #32 800b44c: af02 add r7, sp, #8 800b44e: 60f8 str r0, [r7, #12] 800b450: 607a str r2, [r7, #4] 800b452: 461a mov r2, r3 800b454: 460b mov r3, r1 800b456: 72fb strb r3, [r7, #11] 800b458: 4613 mov r3, r2 800b45a: 813b strh r3, [r7, #8] uint32_t wkgTimeOut; ES_WIFI_Status_t ret = ES_WIFI_STATUS_ERROR; 800b45c: 2302 movs r3, #2 800b45e: 74fb strb r3, [r7, #19] if (Timeout == 0) 800b460: 6a7b ldr r3, [r7, #36] @ 0x24 800b462: 2b00 cmp r3, #0 800b464: d102 bne.n 800b46c { wkgTimeOut = NET_DEFAULT_NOBLOCKING_WRITE_TIMEOUT; 800b466: 2301 movs r3, #1 800b468: 617b str r3, [r7, #20] 800b46a: e001 b.n 800b470 } else { wkgTimeOut = Timeout; 800b46c: 6a7b ldr r3, [r7, #36] @ 0x24 800b46e: 617b str r3, [r7, #20] } LOCK_WIFI(); if(Reqlen >= ES_WIFI_PAYLOAD_SIZE ) Reqlen= ES_WIFI_PAYLOAD_SIZE; 800b470: 893b ldrh r3, [r7, #8] 800b472: f5b3 6f96 cmp.w r3, #1200 @ 0x4b0 800b476: d302 bcc.n 800b47e 800b478: f44f 6396 mov.w r3, #1200 @ 0x4b0 800b47c: 813b strh r3, [r7, #8] *SentLen = Reqlen; 800b47e: 6a3b ldr r3, [r7, #32] 800b480: 893a ldrh r2, [r7, #8] 800b482: 801a strh r2, [r3, #0] sprintf((char*)Obj->CmdData,"P0=%d\r", Socket); 800b484: 68fb ldr r3, [r7, #12] 800b486: f503 7394 add.w r3, r3, #296 @ 0x128 800b48a: 7afa ldrb r2, [r7, #11] 800b48c: 4942 ldr r1, [pc, #264] @ (800b598 ) 800b48e: 4618 mov r0, r3 800b490: f004 fef6 bl 8010280 ret = AT_ExecuteCommand(Obj, Obj->CmdData, Obj->CmdData); 800b494: 68fb ldr r3, [r7, #12] 800b496: f503 7194 add.w r1, r3, #296 @ 0x128 800b49a: 68fb ldr r3, [r7, #12] 800b49c: f503 7394 add.w r3, r3, #296 @ 0x128 800b4a0: 461a mov r2, r3 800b4a2: 68f8 ldr r0, [r7, #12] 800b4a4: f7ff fa6c bl 800a980 800b4a8: 4603 mov r3, r0 800b4aa: 74fb strb r3, [r7, #19] if(ret == ES_WIFI_STATUS_OK) 800b4ac: 7cfb ldrb r3, [r7, #19] 800b4ae: 2b00 cmp r3, #0 800b4b0: d15e bne.n 800b570 { sprintf((char*)Obj->CmdData,"S2=%lu\r",wkgTimeOut); 800b4b2: 68fb ldr r3, [r7, #12] 800b4b4: f503 7394 add.w r3, r3, #296 @ 0x128 800b4b8: 697a ldr r2, [r7, #20] 800b4ba: 4938 ldr r1, [pc, #224] @ (800b59c ) 800b4bc: 4618 mov r0, r3 800b4be: f004 fedf bl 8010280 ret = AT_ExecuteCommand(Obj, Obj->CmdData, Obj->CmdData); 800b4c2: 68fb ldr r3, [r7, #12] 800b4c4: f503 7194 add.w r1, r3, #296 @ 0x128 800b4c8: 68fb ldr r3, [r7, #12] 800b4ca: f503 7394 add.w r3, r3, #296 @ 0x128 800b4ce: 461a mov r2, r3 800b4d0: 68f8 ldr r0, [r7, #12] 800b4d2: f7ff fa55 bl 800a980 800b4d6: 4603 mov r3, r0 800b4d8: 74fb strb r3, [r7, #19] if(ret == ES_WIFI_STATUS_OK) 800b4da: 7cfb ldrb r3, [r7, #19] 800b4dc: 2b00 cmp r3, #0 800b4de: d13d bne.n 800b55c { sprintf((char *)Obj->CmdData,"S3=%04d\r",Reqlen); 800b4e0: 68fb ldr r3, [r7, #12] 800b4e2: f503 7394 add.w r3, r3, #296 @ 0x128 800b4e6: 893a ldrh r2, [r7, #8] 800b4e8: 492d ldr r1, [pc, #180] @ (800b5a0 ) 800b4ea: 4618 mov r0, r3 800b4ec: f004 fec8 bl 8010280 ret = AT_RequestSendData(Obj, Obj->CmdData, pdata, Reqlen, Obj->CmdData); 800b4f0: 68fb ldr r3, [r7, #12] 800b4f2: f503 7194 add.w r1, r3, #296 @ 0x128 800b4f6: 68fb ldr r3, [r7, #12] 800b4f8: f503 7394 add.w r3, r3, #296 @ 0x128 800b4fc: 893a ldrh r2, [r7, #8] 800b4fe: 9300 str r3, [sp, #0] 800b500: 4613 mov r3, r2 800b502: 687a ldr r2, [r7, #4] 800b504: 68f8 ldr r0, [r7, #12] 800b506: f7ff faa1 bl 800aa4c 800b50a: 4603 mov r3, r0 800b50c: 74fb strb r3, [r7, #19] if(ret == ES_WIFI_STATUS_OK) 800b50e: 7cfb ldrb r3, [r7, #19] 800b510: 2b00 cmp r3, #0 800b512: d119 bne.n 800b548 { if(strstr((char *)Obj->CmdData,"-1\r\n")) 800b514: 68fb ldr r3, [r7, #12] 800b516: f503 7394 add.w r3, r3, #296 @ 0x128 800b51a: 4922 ldr r1, [pc, #136] @ (800b5a4 ) 800b51c: 4618 mov r0, r3 800b51e: f005 f871 bl 8010604 800b522: 4603 mov r3, r0 800b524: 2b00 cmp r3, #0 800b526: d02c beq.n 800b582 { DEBUG("Send Data detect error %s\n", (char *)Obj->CmdData); 800b528: f640 025c movw r2, #2140 @ 0x85c 800b52c: 491e ldr r1, [pc, #120] @ (800b5a8 ) 800b52e: 481f ldr r0, [pc, #124] @ (800b5ac ) 800b530: f004 fe00 bl 8010134 800b534: 68fb ldr r3, [r7, #12] 800b536: f503 7394 add.w r3, r3, #296 @ 0x128 800b53a: 4619 mov r1, r3 800b53c: 481c ldr r0, [pc, #112] @ (800b5b0 ) 800b53e: f004 fdf9 bl 8010134 ret = ES_WIFI_STATUS_ERROR; 800b542: 2302 movs r3, #2 800b544: 74fb strb r3, [r7, #19] 800b546: e01c b.n 800b582 } } else { DEBUG("Send Data command failed\n"); 800b548: f640 0262 movw r2, #2146 @ 0x862 800b54c: 4916 ldr r1, [pc, #88] @ (800b5a8 ) 800b54e: 4817 ldr r0, [pc, #92] @ (800b5ac ) 800b550: f004 fdf0 bl 8010134 800b554: 4817 ldr r0, [pc, #92] @ (800b5b4 ) 800b556: f004 fe55 bl 8010204 800b55a: e012 b.n 800b582 } } else { DEBUG("S2 command failed\n"); 800b55c: f640 0267 movw r2, #2151 @ 0x867 800b560: 4911 ldr r1, [pc, #68] @ (800b5a8 ) 800b562: 4812 ldr r0, [pc, #72] @ (800b5ac ) 800b564: f004 fde6 bl 8010134 800b568: 4813 ldr r0, [pc, #76] @ (800b5b8 ) 800b56a: f004 fe4b bl 8010204 800b56e: e008 b.n 800b582 } } else { DEBUG("P0 command failed\n"); 800b570: f640 026c movw r2, #2156 @ 0x86c 800b574: 490c ldr r1, [pc, #48] @ (800b5a8 ) 800b576: 480d ldr r0, [pc, #52] @ (800b5ac ) 800b578: f004 fddc bl 8010134 800b57c: 480f ldr r0, [pc, #60] @ (800b5bc ) 800b57e: f004 fe41 bl 8010204 } if (ret == ES_WIFI_STATUS_ERROR) 800b582: 7cfb ldrb r3, [r7, #19] 800b584: 2b02 cmp r3, #2 800b586: d102 bne.n 800b58e { *SentLen = 0; 800b588: 6a3b ldr r3, [r7, #32] 800b58a: 2200 movs r2, #0 800b58c: 801a strh r2, [r3, #0] } UNLOCK_WIFI(); return ret; 800b58e: 7cfb ldrb r3, [r7, #19] } 800b590: 4618 mov r0, r3 800b592: 3718 adds r7, #24 800b594: 46bd mov sp, r7 800b596: bd80 pop {r7, pc} 800b598: 08014b34 .word 0x08014b34 800b59c: 08014cec .word 0x08014cec 800b5a0: 08014cf4 .word 0x08014cf4 800b5a4: 08014d00 .word 0x08014d00 800b5a8: 08014bc4 .word 0x08014bc4 800b5ac: 08014be0 .word 0x08014be0 800b5b0: 08014d08 .word 0x08014d08 800b5b4: 08014d24 .word 0x08014d24 800b5b8: 08014d40 .word 0x08014d40 800b5bc: 08014d54 .word 0x08014d54 0800b5c0 : * @param pdata: pointer to data * @param len : pointer to the length of the data to be received * @retval Operation Status. */ ES_WIFI_Status_t ES_WIFI_ReceiveData(ES_WIFIObject_t *Obj, uint8_t Socket, uint8_t *pdata, uint16_t Reqlen, uint16_t *Receivedlen, uint32_t Timeout) { 800b5c0: b580 push {r7, lr} 800b5c2: b088 sub sp, #32 800b5c4: af02 add r7, sp, #8 800b5c6: 60f8 str r0, [r7, #12] 800b5c8: 607a str r2, [r7, #4] 800b5ca: 461a mov r2, r3 800b5cc: 460b mov r3, r1 800b5ce: 72fb strb r3, [r7, #11] 800b5d0: 4613 mov r3, r2 800b5d2: 813b strh r3, [r7, #8] uint32_t wkgTimeOut; ES_WIFI_Status_t ret = ES_WIFI_STATUS_ERROR; 800b5d4: 2302 movs r3, #2 800b5d6: 74fb strb r3, [r7, #19] if (Timeout == 0) 800b5d8: 6a7b ldr r3, [r7, #36] @ 0x24 800b5da: 2b00 cmp r3, #0 800b5dc: d102 bne.n 800b5e4 { wkgTimeOut = NET_DEFAULT_NOBLOCKING_READ_TIMEOUT; 800b5de: 2301 movs r3, #1 800b5e0: 617b str r3, [r7, #20] 800b5e2: e001 b.n 800b5e8 } else { wkgTimeOut = Timeout; 800b5e4: 6a7b ldr r3, [r7, #36] @ 0x24 800b5e6: 617b str r3, [r7, #20] } LOCK_WIFI(); if(Reqlen <= ES_WIFI_PAYLOAD_SIZE ) 800b5e8: 893b ldrh r3, [r7, #8] 800b5ea: f5b3 6f96 cmp.w r3, #1200 @ 0x4b0 800b5ee: f200 808b bhi.w 800b708 { sprintf((char*)Obj->CmdData,"P0=%d\r", Socket); 800b5f2: 68fb ldr r3, [r7, #12] 800b5f4: f503 7394 add.w r3, r3, #296 @ 0x128 800b5f8: 7afa ldrb r2, [r7, #11] 800b5fa: 4946 ldr r1, [pc, #280] @ (800b714 ) 800b5fc: 4618 mov r0, r3 800b5fe: f004 fe3f bl 8010280 ret = AT_ExecuteCommand(Obj, Obj->CmdData, Obj->CmdData); 800b602: 68fb ldr r3, [r7, #12] 800b604: f503 7194 add.w r1, r3, #296 @ 0x128 800b608: 68fb ldr r3, [r7, #12] 800b60a: f503 7394 add.w r3, r3, #296 @ 0x128 800b60e: 461a mov r2, r3 800b610: 68f8 ldr r0, [r7, #12] 800b612: f7ff f9b5 bl 800a980 800b616: 4603 mov r3, r0 800b618: 74fb strb r3, [r7, #19] if(ret == ES_WIFI_STATUS_OK) 800b61a: 7cfb ldrb r3, [r7, #19] 800b61c: 2b00 cmp r3, #0 800b61e: d165 bne.n 800b6ec { sprintf((char*)Obj->CmdData,"R1=%d\r", Reqlen); 800b620: 68fb ldr r3, [r7, #12] 800b622: f503 7394 add.w r3, r3, #296 @ 0x128 800b626: 893a ldrh r2, [r7, #8] 800b628: 493b ldr r1, [pc, #236] @ (800b718 ) 800b62a: 4618 mov r0, r3 800b62c: f004 fe28 bl 8010280 ret = AT_ExecuteCommand(Obj, Obj->CmdData, Obj->CmdData); 800b630: 68fb ldr r3, [r7, #12] 800b632: f503 7194 add.w r1, r3, #296 @ 0x128 800b636: 68fb ldr r3, [r7, #12] 800b638: f503 7394 add.w r3, r3, #296 @ 0x128 800b63c: 461a mov r2, r3 800b63e: 68f8 ldr r0, [r7, #12] 800b640: f7ff f99e bl 800a980 800b644: 4603 mov r3, r0 800b646: 74fb strb r3, [r7, #19] if(ret == ES_WIFI_STATUS_OK) 800b648: 7cfb ldrb r3, [r7, #19] 800b64a: 2b00 cmp r3, #0 800b64c: d141 bne.n 800b6d2 { sprintf((char*)Obj->CmdData,"R2=%lu\r", wkgTimeOut); 800b64e: 68fb ldr r3, [r7, #12] 800b650: f503 7394 add.w r3, r3, #296 @ 0x128 800b654: 697a ldr r2, [r7, #20] 800b656: 4931 ldr r1, [pc, #196] @ (800b71c ) 800b658: 4618 mov r0, r3 800b65a: f004 fe11 bl 8010280 ret = AT_ExecuteCommand(Obj, Obj->CmdData, Obj->CmdData); 800b65e: 68fb ldr r3, [r7, #12] 800b660: f503 7194 add.w r1, r3, #296 @ 0x128 800b664: 68fb ldr r3, [r7, #12] 800b666: f503 7394 add.w r3, r3, #296 @ 0x128 800b66a: 461a mov r2, r3 800b66c: 68f8 ldr r0, [r7, #12] 800b66e: f7ff f987 bl 800a980 800b672: 4603 mov r3, r0 800b674: 74fb strb r3, [r7, #19] if(ret == ES_WIFI_STATUS_OK) 800b676: 7cfb ldrb r3, [r7, #19] 800b678: 2b00 cmp r3, #0 800b67a: d120 bne.n 800b6be { sprintf((char*)Obj->CmdData,"R0\r"); 800b67c: 68fb ldr r3, [r7, #12] 800b67e: f503 7394 add.w r3, r3, #296 @ 0x128 800b682: 4927 ldr r1, [pc, #156] @ (800b720 ) 800b684: 4618 mov r0, r3 800b686: f004 fdfb bl 8010280 ret = AT_RequestReceiveData(Obj, Obj->CmdData, (char *)pdata, Reqlen, Receivedlen); 800b68a: 68fb ldr r3, [r7, #12] 800b68c: f503 7194 add.w r1, r3, #296 @ 0x128 800b690: 893a ldrh r2, [r7, #8] 800b692: 6a3b ldr r3, [r7, #32] 800b694: 9300 str r3, [sp, #0] 800b696: 4613 mov r3, r2 800b698: 687a ldr r2, [r7, #4] 800b69a: 68f8 ldr r0, [r7, #12] 800b69c: f7ff fa4c bl 800ab38 800b6a0: 4603 mov r3, r0 800b6a2: 74fb strb r3, [r7, #19] if (ret != ES_WIFI_STATUS_OK) 800b6a4: 7cfb ldrb r3, [r7, #19] 800b6a6: 2b00 cmp r3, #0 800b6a8: d02e beq.n 800b708 { DEBUG("AT_RequestReceiveData failed\n"); 800b6aa: f640 02fd movw r2, #2301 @ 0x8fd 800b6ae: 491d ldr r1, [pc, #116] @ (800b724 ) 800b6b0: 481d ldr r0, [pc, #116] @ (800b728 ) 800b6b2: f004 fd3f bl 8010134 800b6b6: 481d ldr r0, [pc, #116] @ (800b72c ) 800b6b8: f004 fda4 bl 8010204 800b6bc: e024 b.n 800b708 } } else { DEBUG("setting timeout failed\n"); 800b6be: f640 1202 movw r2, #2306 @ 0x902 800b6c2: 4918 ldr r1, [pc, #96] @ (800b724 ) 800b6c4: 4818 ldr r0, [pc, #96] @ (800b728 ) 800b6c6: f004 fd35 bl 8010134 800b6ca: 4819 ldr r0, [pc, #100] @ (800b730 ) 800b6cc: f004 fd9a bl 8010204 800b6d0: e01a b.n 800b708 } } else { DEBUG("setting requested len failed\n"); 800b6d2: f640 1207 movw r2, #2311 @ 0x907 800b6d6: 4913 ldr r1, [pc, #76] @ (800b724 ) 800b6d8: 4813 ldr r0, [pc, #76] @ (800b728 ) 800b6da: f004 fd2b bl 8010134 800b6de: 4815 ldr r0, [pc, #84] @ (800b734 ) 800b6e0: f004 fd90 bl 8010204 *Receivedlen = 0; 800b6e4: 6a3b ldr r3, [r7, #32] 800b6e6: 2200 movs r2, #0 800b6e8: 801a strh r2, [r3, #0] 800b6ea: e00d b.n 800b708 } } else { DEBUG("setting socket for read failed\n"); 800b6ec: f640 120d movw r2, #2317 @ 0x90d 800b6f0: 490c ldr r1, [pc, #48] @ (800b724 ) 800b6f2: 480d ldr r0, [pc, #52] @ (800b728 ) 800b6f4: f004 fd1e bl 8010134 800b6f8: 480f ldr r0, [pc, #60] @ (800b738 ) 800b6fa: f004 fd83 bl 8010204 issue15++; 800b6fe: 4b0f ldr r3, [pc, #60] @ (800b73c ) 800b700: 681b ldr r3, [r3, #0] 800b702: 3301 adds r3, #1 800b704: 4a0d ldr r2, [pc, #52] @ (800b73c ) 800b706: 6013 str r3, [r2, #0] } } UNLOCK_WIFI(); return ret; 800b708: 7cfb ldrb r3, [r7, #19] } 800b70a: 4618 mov r0, r3 800b70c: 3718 adds r7, #24 800b70e: 46bd mov sp, r7 800b710: bd80 pop {r7, pc} 800b712: bf00 nop 800b714: 08014b34 .word 0x08014b34 800b718: 08014d78 .word 0x08014d78 800b71c: 08014d80 .word 0x08014d80 800b720: 08014d88 .word 0x08014d88 800b724: 08014bc4 .word 0x08014bc4 800b728: 08014be0 .word 0x08014be0 800b72c: 08014d8c .word 0x08014d8c 800b730: 08014dac .word 0x08014dac 800b734: 08014dc4 .word 0x08014dc4 800b738: 08014de4 .word 0x08014de4 800b73c: 200012e4 .word 0x200012e4 0800b740 : * @brief Initialize SPI MSP * @param hspi: SPI handle * @retval None */ void SPI_WIFI_MspInit(SPI_HandleTypeDef* hspi) { 800b740: b580 push {r7, lr} 800b742: b08c sub sp, #48 @ 0x30 800b744: af00 add r7, sp, #0 800b746: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_Init; __HAL_RCC_SPI3_CLK_ENABLE(); 800b748: 4b57 ldr r3, [pc, #348] @ (800b8a8 ) 800b74a: 6d9b ldr r3, [r3, #88] @ 0x58 800b74c: 4a56 ldr r2, [pc, #344] @ (800b8a8 ) 800b74e: f443 4300 orr.w r3, r3, #32768 @ 0x8000 800b752: 6593 str r3, [r2, #88] @ 0x58 800b754: 4b54 ldr r3, [pc, #336] @ (800b8a8 ) 800b756: 6d9b ldr r3, [r3, #88] @ 0x58 800b758: f403 4300 and.w r3, r3, #32768 @ 0x8000 800b75c: 61bb str r3, [r7, #24] 800b75e: 69bb ldr r3, [r7, #24] __HAL_RCC_GPIOB_CLK_ENABLE(); 800b760: 4b51 ldr r3, [pc, #324] @ (800b8a8 ) 800b762: 6cdb ldr r3, [r3, #76] @ 0x4c 800b764: 4a50 ldr r2, [pc, #320] @ (800b8a8 ) 800b766: f043 0302 orr.w r3, r3, #2 800b76a: 64d3 str r3, [r2, #76] @ 0x4c 800b76c: 4b4e ldr r3, [pc, #312] @ (800b8a8 ) 800b76e: 6cdb ldr r3, [r3, #76] @ 0x4c 800b770: f003 0302 and.w r3, r3, #2 800b774: 617b str r3, [r7, #20] 800b776: 697b ldr r3, [r7, #20] __HAL_RCC_GPIOC_CLK_ENABLE(); 800b778: 4b4b ldr r3, [pc, #300] @ (800b8a8 ) 800b77a: 6cdb ldr r3, [r3, #76] @ 0x4c 800b77c: 4a4a ldr r2, [pc, #296] @ (800b8a8 ) 800b77e: f043 0304 orr.w r3, r3, #4 800b782: 64d3 str r3, [r2, #76] @ 0x4c 800b784: 4b48 ldr r3, [pc, #288] @ (800b8a8 ) 800b786: 6cdb ldr r3, [r3, #76] @ 0x4c 800b788: f003 0304 and.w r3, r3, #4 800b78c: 613b str r3, [r7, #16] 800b78e: 693b ldr r3, [r7, #16] __HAL_RCC_GPIOE_CLK_ENABLE(); 800b790: 4b45 ldr r3, [pc, #276] @ (800b8a8 ) 800b792: 6cdb ldr r3, [r3, #76] @ 0x4c 800b794: 4a44 ldr r2, [pc, #272] @ (800b8a8 ) 800b796: f043 0310 orr.w r3, r3, #16 800b79a: 64d3 str r3, [r2, #76] @ 0x4c 800b79c: 4b42 ldr r3, [pc, #264] @ (800b8a8 ) 800b79e: 6cdb ldr r3, [r3, #76] @ 0x4c 800b7a0: f003 0310 and.w r3, r3, #16 800b7a4: 60fb str r3, [r7, #12] 800b7a6: 68fb ldr r3, [r7, #12] /* configure Wake up pin */ HAL_GPIO_WritePin(GPIOB,GPIO_PIN_13, GPIO_PIN_RESET ); 800b7a8: 2200 movs r2, #0 800b7aa: f44f 5100 mov.w r1, #8192 @ 0x2000 800b7ae: 483f ldr r0, [pc, #252] @ (800b8ac ) 800b7b0: f7f8 ffa6 bl 8004700 GPIO_Init.Pin = GPIO_PIN_13; 800b7b4: f44f 5300 mov.w r3, #8192 @ 0x2000 800b7b8: 61fb str r3, [r7, #28] GPIO_Init.Mode = GPIO_MODE_OUTPUT_PP; 800b7ba: 2301 movs r3, #1 800b7bc: 623b str r3, [r7, #32] GPIO_Init.Pull = GPIO_NOPULL; 800b7be: 2300 movs r3, #0 800b7c0: 627b str r3, [r7, #36] @ 0x24 GPIO_Init.Speed = GPIO_SPEED_FREQ_LOW; 800b7c2: 2300 movs r3, #0 800b7c4: 62bb str r3, [r7, #40] @ 0x28 HAL_GPIO_Init(GPIOB, &GPIO_Init ); 800b7c6: f107 031c add.w r3, r7, #28 800b7ca: 4619 mov r1, r3 800b7cc: 4837 ldr r0, [pc, #220] @ (800b8ac ) 800b7ce: f7f8 fce1 bl 8004194 /* configure Data ready pin */ GPIO_Init.Pin = GPIO_PIN_1; 800b7d2: 2302 movs r3, #2 800b7d4: 61fb str r3, [r7, #28] GPIO_Init.Mode = GPIO_MODE_IT_RISING; 800b7d6: f44f 1388 mov.w r3, #1114112 @ 0x110000 800b7da: 623b str r3, [r7, #32] GPIO_Init.Pull = GPIO_NOPULL; 800b7dc: 2300 movs r3, #0 800b7de: 627b str r3, [r7, #36] @ 0x24 GPIO_Init.Speed = GPIO_SPEED_FREQ_LOW; 800b7e0: 2300 movs r3, #0 800b7e2: 62bb str r3, [r7, #40] @ 0x28 HAL_GPIO_Init(GPIOE, &GPIO_Init ); 800b7e4: f107 031c add.w r3, r7, #28 800b7e8: 4619 mov r1, r3 800b7ea: 4831 ldr r0, [pc, #196] @ (800b8b0 ) 800b7ec: f7f8 fcd2 bl 8004194 /* configure Reset pin */ GPIO_Init.Pin = GPIO_PIN_8; 800b7f0: f44f 7380 mov.w r3, #256 @ 0x100 800b7f4: 61fb str r3, [r7, #28] GPIO_Init.Mode = GPIO_MODE_OUTPUT_PP; 800b7f6: 2301 movs r3, #1 800b7f8: 623b str r3, [r7, #32] GPIO_Init.Pull = GPIO_NOPULL; 800b7fa: 2300 movs r3, #0 800b7fc: 627b str r3, [r7, #36] @ 0x24 GPIO_Init.Speed = GPIO_SPEED_FREQ_LOW; 800b7fe: 2300 movs r3, #0 800b800: 62bb str r3, [r7, #40] @ 0x28 GPIO_Init.Alternate = 0; 800b802: 2300 movs r3, #0 800b804: 62fb str r3, [r7, #44] @ 0x2c HAL_GPIO_Init(GPIOE, &GPIO_Init ); 800b806: f107 031c add.w r3, r7, #28 800b80a: 4619 mov r1, r3 800b80c: 4828 ldr r0, [pc, #160] @ (800b8b0 ) 800b80e: f7f8 fcc1 bl 8004194 /* configure SPI NSS pin pin */ HAL_GPIO_WritePin( GPIOE , GPIO_PIN_0, GPIO_PIN_SET ); 800b812: 2201 movs r2, #1 800b814: 2101 movs r1, #1 800b816: 4826 ldr r0, [pc, #152] @ (800b8b0 ) 800b818: f7f8 ff72 bl 8004700 GPIO_Init.Pin = GPIO_PIN_0; 800b81c: 2301 movs r3, #1 800b81e: 61fb str r3, [r7, #28] GPIO_Init.Mode = GPIO_MODE_OUTPUT_PP; 800b820: 2301 movs r3, #1 800b822: 623b str r3, [r7, #32] GPIO_Init.Pull = GPIO_NOPULL; 800b824: 2300 movs r3, #0 800b826: 627b str r3, [r7, #36] @ 0x24 GPIO_Init.Speed = GPIO_SPEED_FREQ_MEDIUM; 800b828: 2301 movs r3, #1 800b82a: 62bb str r3, [r7, #40] @ 0x28 HAL_GPIO_Init( GPIOE, &GPIO_Init ); 800b82c: f107 031c add.w r3, r7, #28 800b830: 4619 mov r1, r3 800b832: 481f ldr r0, [pc, #124] @ (800b8b0 ) 800b834: f7f8 fcae bl 8004194 /* configure SPI CLK pin */ GPIO_Init.Pin = GPIO_PIN_10; 800b838: f44f 6380 mov.w r3, #1024 @ 0x400 800b83c: 61fb str r3, [r7, #28] GPIO_Init.Mode = GPIO_MODE_AF_PP; 800b83e: 2302 movs r3, #2 800b840: 623b str r3, [r7, #32] GPIO_Init.Pull = GPIO_NOPULL; 800b842: 2300 movs r3, #0 800b844: 627b str r3, [r7, #36] @ 0x24 GPIO_Init.Speed = GPIO_SPEED_FREQ_MEDIUM; 800b846: 2301 movs r3, #1 800b848: 62bb str r3, [r7, #40] @ 0x28 GPIO_Init.Alternate = GPIO_AF6_SPI3; 800b84a: 2306 movs r3, #6 800b84c: 62fb str r3, [r7, #44] @ 0x2c HAL_GPIO_Init(GPIOC, &GPIO_Init ); 800b84e: f107 031c add.w r3, r7, #28 800b852: 4619 mov r1, r3 800b854: 4817 ldr r0, [pc, #92] @ (800b8b4 ) 800b856: f7f8 fc9d bl 8004194 /* configure SPI MOSI pin */ GPIO_Init.Pin = GPIO_PIN_12; 800b85a: f44f 5380 mov.w r3, #4096 @ 0x1000 800b85e: 61fb str r3, [r7, #28] GPIO_Init.Mode = GPIO_MODE_AF_PP; 800b860: 2302 movs r3, #2 800b862: 623b str r3, [r7, #32] GPIO_Init.Pull = GPIO_NOPULL; 800b864: 2300 movs r3, #0 800b866: 627b str r3, [r7, #36] @ 0x24 GPIO_Init.Speed = GPIO_SPEED_FREQ_MEDIUM; 800b868: 2301 movs r3, #1 800b86a: 62bb str r3, [r7, #40] @ 0x28 GPIO_Init.Alternate = GPIO_AF6_SPI3; 800b86c: 2306 movs r3, #6 800b86e: 62fb str r3, [r7, #44] @ 0x2c HAL_GPIO_Init( GPIOC, &GPIO_Init ); 800b870: f107 031c add.w r3, r7, #28 800b874: 4619 mov r1, r3 800b876: 480f ldr r0, [pc, #60] @ (800b8b4 ) 800b878: f7f8 fc8c bl 8004194 /* configure SPI MISO pin */ GPIO_Init.Pin = GPIO_PIN_11; 800b87c: f44f 6300 mov.w r3, #2048 @ 0x800 800b880: 61fb str r3, [r7, #28] GPIO_Init.Mode = GPIO_MODE_AF_PP; 800b882: 2302 movs r3, #2 800b884: 623b str r3, [r7, #32] GPIO_Init.Pull = GPIO_PULLUP; 800b886: 2301 movs r3, #1 800b888: 627b str r3, [r7, #36] @ 0x24 GPIO_Init.Speed = GPIO_SPEED_FREQ_MEDIUM; 800b88a: 2301 movs r3, #1 800b88c: 62bb str r3, [r7, #40] @ 0x28 GPIO_Init.Alternate = GPIO_AF6_SPI3; 800b88e: 2306 movs r3, #6 800b890: 62fb str r3, [r7, #44] @ 0x2c HAL_GPIO_Init( GPIOC,&GPIO_Init ); 800b892: f107 031c add.w r3, r7, #28 800b896: 4619 mov r1, r3 800b898: 4806 ldr r0, [pc, #24] @ (800b8b4 ) 800b89a: f7f8 fc7b bl 8004194 } 800b89e: bf00 nop 800b8a0: 3730 adds r7, #48 @ 0x30 800b8a2: 46bd mov sp, r7 800b8a4: bd80 pop {r7, pc} 800b8a6: bf00 nop 800b8a8: 40021000 .word 0x40021000 800b8ac: 48000400 .word 0x48000400 800b8b0: 48001000 .word 0x48001000 800b8b4: 48000800 .word 0x48000800 0800b8b8 : * @brief Initialize the SPI3 * @param None * @retval None */ int8_t SPI_WIFI_Init(uint16_t mode) { 800b8b8: b580 push {r7, lr} 800b8ba: b084 sub sp, #16 800b8bc: af00 add r7, sp, #0 800b8be: 4603 mov r3, r0 800b8c0: 80fb strh r3, [r7, #6] int8_t rc=0; 800b8c2: 2300 movs r3, #0 800b8c4: 73fb strb r3, [r7, #15] if (mode == ES_WIFI_INIT) 800b8c6: 88fb ldrh r3, [r7, #6] 800b8c8: 2b00 cmp r3, #0 800b8ca: d145 bne.n 800b958 { hspi.Instance = SPI3; 800b8cc: 4b27 ldr r3, [pc, #156] @ (800b96c ) 800b8ce: 4a28 ldr r2, [pc, #160] @ (800b970 ) 800b8d0: 601a str r2, [r3, #0] SPI_WIFI_MspInit(&hspi); 800b8d2: 4826 ldr r0, [pc, #152] @ (800b96c ) 800b8d4: f7ff ff34 bl 800b740 hspi.Init.Mode = SPI_MODE_MASTER; 800b8d8: 4b24 ldr r3, [pc, #144] @ (800b96c ) 800b8da: f44f 7282 mov.w r2, #260 @ 0x104 800b8de: 605a str r2, [r3, #4] hspi.Init.Direction = SPI_DIRECTION_2LINES; 800b8e0: 4b22 ldr r3, [pc, #136] @ (800b96c ) 800b8e2: 2200 movs r2, #0 800b8e4: 609a str r2, [r3, #8] hspi.Init.DataSize = SPI_DATASIZE_16BIT; 800b8e6: 4b21 ldr r3, [pc, #132] @ (800b96c ) 800b8e8: f44f 6270 mov.w r2, #3840 @ 0xf00 800b8ec: 60da str r2, [r3, #12] hspi.Init.CLKPolarity = SPI_POLARITY_LOW; 800b8ee: 4b1f ldr r3, [pc, #124] @ (800b96c ) 800b8f0: 2200 movs r2, #0 800b8f2: 611a str r2, [r3, #16] hspi.Init.CLKPhase = SPI_PHASE_1EDGE; 800b8f4: 4b1d ldr r3, [pc, #116] @ (800b96c ) 800b8f6: 2200 movs r2, #0 800b8f8: 615a str r2, [r3, #20] hspi.Init.NSS = SPI_NSS_SOFT; 800b8fa: 4b1c ldr r3, [pc, #112] @ (800b96c ) 800b8fc: f44f 7200 mov.w r2, #512 @ 0x200 800b900: 619a str r2, [r3, #24] hspi.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_8; /* 80/8= 10MHz (Inventek WIFI module supports up to 20MHz)*/ 800b902: 4b1a ldr r3, [pc, #104] @ (800b96c ) 800b904: 2210 movs r2, #16 800b906: 61da str r2, [r3, #28] hspi.Init.FirstBit = SPI_FIRSTBIT_MSB; 800b908: 4b18 ldr r3, [pc, #96] @ (800b96c ) 800b90a: 2200 movs r2, #0 800b90c: 621a str r2, [r3, #32] hspi.Init.TIMode = SPI_TIMODE_DISABLE; 800b90e: 4b17 ldr r3, [pc, #92] @ (800b96c ) 800b910: 2200 movs r2, #0 800b912: 625a str r2, [r3, #36] @ 0x24 hspi.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE; 800b914: 4b15 ldr r3, [pc, #84] @ (800b96c ) 800b916: 2200 movs r2, #0 800b918: 629a str r2, [r3, #40] @ 0x28 hspi.Init.CRCPolynomial = 0; 800b91a: 4b14 ldr r3, [pc, #80] @ (800b96c ) 800b91c: 2200 movs r2, #0 800b91e: 62da str r2, [r3, #44] @ 0x2c if(HAL_SPI_Init( &hspi ) != HAL_OK) 800b920: 4812 ldr r0, [pc, #72] @ (800b96c ) 800b922: f7fb fadf bl 8006ee4 800b926: 4603 mov r3, r0 800b928: 2b00 cmp r3, #0 800b92a: d002 beq.n 800b932 { return -1; 800b92c: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff 800b930: e018 b.n 800b964 } /* Enable Interrupt for Data Ready pin , GPIO_PIN1 */ HAL_NVIC_SetPriority((IRQn_Type)EXTI1_IRQn, SPI_INTERFACE_PRIO, 0x00); 800b932: 2200 movs r2, #0 800b934: 2100 movs r1, #0 800b936: 2007 movs r0, #7 800b938: f7f8 fa76 bl 8003e28 HAL_NVIC_EnableIRQ((IRQn_Type)EXTI1_IRQn); 800b93c: 2007 movs r0, #7 800b93e: f7f8 fa8f bl 8003e60 /* Enable Interrupt for SPI tx and rx */ HAL_NVIC_SetPriority((IRQn_Type)SPI3_IRQn, SPI_INTERFACE_PRIO, 0); 800b942: 2200 movs r2, #0 800b944: 2100 movs r1, #0 800b946: 2033 movs r0, #51 @ 0x33 800b948: f7f8 fa6e bl 8003e28 HAL_NVIC_EnableIRQ((IRQn_Type)SPI3_IRQn); 800b94c: 2033 movs r0, #51 @ 0x33 800b94e: f7f8 fa87 bl 8003e60 SEM_WAIT(spi_rx_sem, 1); SEM_WAIT(spi_tx_sem, 1); #endif /* first call used for calibration */ SPI_WIFI_DelayUs(10); 800b952: 200a movs r0, #10 800b954: f000 f9fe bl 800bd54 } rc= SPI_WIFI_ResetModule(); 800b958: f000 f80c bl 800b974 800b95c: 4603 mov r3, r0 800b95e: 73fb strb r3, [r7, #15] return rc; 800b960: f997 300f ldrsb.w r3, [r7, #15] } 800b964: 4618 mov r0, r3 800b966: 3710 adds r7, #16 800b968: 46bd mov sp, r7 800b96a: bd80 pop {r7, pc} 800b96c: 200012e8 .word 0x200012e8 800b970: 40003c00 .word 0x40003c00 0800b974 : int8_t SPI_WIFI_ResetModule(void) { 800b974: b580 push {r7, lr} 800b976: b084 sub sp, #16 800b978: af00 add r7, sp, #0 uint32_t tickstart = HAL_GetTick(); 800b97a: f7f8 f96d bl 8003c58 800b97e: 60b8 str r0, [r7, #8] uint8_t Prompt[6]; uint8_t count = 0; 800b980: 2300 movs r3, #0 800b982: 73fb strb r3, [r7, #15] HAL_StatusTypeDef Status; WIFI_RESET_MODULE(); 800b984: 2200 movs r2, #0 800b986: f44f 7180 mov.w r1, #256 @ 0x100 800b98a: 4830 ldr r0, [pc, #192] @ (800ba4c ) 800b98c: f7f8 feb8 bl 8004700 800b990: 200a movs r0, #10 800b992: f7f8 f96d bl 8003c70 800b996: 2201 movs r2, #1 800b998: f44f 7180 mov.w r1, #256 @ 0x100 800b99c: 482b ldr r0, [pc, #172] @ (800ba4c ) 800b99e: f7f8 feaf bl 8004700 800b9a2: f44f 70fa mov.w r0, #500 @ 0x1f4 800b9a6: f7f8 f963 bl 8003c70 WIFI_ENABLE_NSS(); 800b9aa: 2200 movs r2, #0 800b9ac: 2101 movs r1, #1 800b9ae: 4827 ldr r0, [pc, #156] @ (800ba4c ) 800b9b0: f7f8 fea6 bl 8004700 SPI_WIFI_DelayUs(15); 800b9b4: 200f movs r0, #15 800b9b6: f000 f9cd bl 800bd54 while (WIFI_IS_CMDDATA_READY()) 800b9ba: e020 b.n 800b9fe { Status = HAL_SPI_Receive(&hspi , &Prompt[count], 1, 0xFFFF); 800b9bc: 7bfb ldrb r3, [r7, #15] 800b9be: 463a mov r2, r7 800b9c0: 18d1 adds r1, r2, r3 800b9c2: f64f 73ff movw r3, #65535 @ 0xffff 800b9c6: 2201 movs r2, #1 800b9c8: 4821 ldr r0, [pc, #132] @ (800ba50 ) 800b9ca: f7fb fb56 bl 800707a 800b9ce: 4603 mov r3, r0 800b9d0: 71fb strb r3, [r7, #7] count += 2; 800b9d2: 7bfb ldrb r3, [r7, #15] 800b9d4: 3302 adds r3, #2 800b9d6: 73fb strb r3, [r7, #15] if(((HAL_GetTick() - tickstart ) > 0xFFFF) || (Status != HAL_OK)) 800b9d8: f7f8 f93e bl 8003c58 800b9dc: 4602 mov r2, r0 800b9de: 68bb ldr r3, [r7, #8] 800b9e0: 1ad3 subs r3, r2, r3 800b9e2: f5b3 3f80 cmp.w r3, #65536 @ 0x10000 800b9e6: d202 bcs.n 800b9ee 800b9e8: 79fb ldrb r3, [r7, #7] 800b9ea: 2b00 cmp r3, #0 800b9ec: d007 beq.n 800b9fe { WIFI_DISABLE_NSS(); 800b9ee: 2201 movs r2, #1 800b9f0: 2101 movs r1, #1 800b9f2: 4816 ldr r0, [pc, #88] @ (800ba4c ) 800b9f4: f7f8 fe84 bl 8004700 return -1; 800b9f8: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff 800b9fc: e021 b.n 800ba42 while (WIFI_IS_CMDDATA_READY()) 800b9fe: 2102 movs r1, #2 800ba00: 4812 ldr r0, [pc, #72] @ (800ba4c ) 800ba02: f7f8 fe65 bl 80046d0 800ba06: 4603 mov r3, r0 800ba08: 2b01 cmp r3, #1 800ba0a: d0d7 beq.n 800b9bc } } WIFI_DISABLE_NSS(); 800ba0c: 2201 movs r2, #1 800ba0e: 2101 movs r1, #1 800ba10: 480e ldr r0, [pc, #56] @ (800ba4c ) 800ba12: f7f8 fe75 bl 8004700 if((Prompt[0] != 0x15) ||(Prompt[1] != 0x15) ||(Prompt[2] != '\r')|| 800ba16: 783b ldrb r3, [r7, #0] 800ba18: 2b15 cmp r3, #21 800ba1a: d10e bne.n 800ba3a 800ba1c: 787b ldrb r3, [r7, #1] 800ba1e: 2b15 cmp r3, #21 800ba20: d10b bne.n 800ba3a 800ba22: 78bb ldrb r3, [r7, #2] 800ba24: 2b0d cmp r3, #13 800ba26: d108 bne.n 800ba3a (Prompt[3] != '\n') ||(Prompt[4] != '>') ||(Prompt[5] != ' ')) 800ba28: 78fb ldrb r3, [r7, #3] if((Prompt[0] != 0x15) ||(Prompt[1] != 0x15) ||(Prompt[2] != '\r')|| 800ba2a: 2b0a cmp r3, #10 800ba2c: d105 bne.n 800ba3a (Prompt[3] != '\n') ||(Prompt[4] != '>') ||(Prompt[5] != ' ')) 800ba2e: 793b ldrb r3, [r7, #4] 800ba30: 2b3e cmp r3, #62 @ 0x3e 800ba32: d102 bne.n 800ba3a 800ba34: 797b ldrb r3, [r7, #5] 800ba36: 2b20 cmp r3, #32 800ba38: d002 beq.n 800ba40 { return -1; 800ba3a: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff 800ba3e: e000 b.n 800ba42 } return 0; 800ba40: 2300 movs r3, #0 } 800ba42: 4618 mov r0, r3 800ba44: 3710 adds r7, #16 800ba46: 46bd mov sp, r7 800ba48: bd80 pop {r7, pc} 800ba4a: bf00 nop 800ba4c: 48001000 .word 0x48001000 800ba50: 200012e8 .word 0x200012e8 0800ba54 : * @brief DeInitialize the SPI * @param None * @retval None */ int8_t SPI_WIFI_DeInit(void) { 800ba54: b580 push {r7, lr} 800ba56: af00 add r7, sp, #0 HAL_SPI_DeInit( &hspi ); 800ba58: 4802 ldr r0, [pc, #8] @ (800ba64 ) 800ba5a: f7fb fae6 bl 800702a osMutexDelete(es_wifi_mutex); osSemaphoreDelete(spi_tx_sem); osSemaphoreDelete(spi_rx_sem); osSemaphoreDelete(cmddata_rdy_rising_sem); #endif return 0; 800ba5e: 2300 movs r3, #0 } 800ba60: 4618 mov r0, r3 800ba62: bd80 pop {r7, pc} 800ba64: 200012e8 .word 0x200012e8 0800ba68 : * @param timeout : send timeout in mS * @retval Length of received data (payload) */ int wait_cmddata_rdy_high(int timeout) { 800ba68: b580 push {r7, lr} 800ba6a: b084 sub sp, #16 800ba6c: af00 add r7, sp, #0 800ba6e: 6078 str r0, [r7, #4] int tickstart = HAL_GetTick(); 800ba70: f7f8 f8f2 bl 8003c58 800ba74: 4603 mov r3, r0 800ba76: 60fb str r3, [r7, #12] while (WIFI_IS_CMDDATA_READY()==0) 800ba78: e00a b.n 800ba90 { if((HAL_GetTick() - tickstart ) > timeout) 800ba7a: f7f8 f8ed bl 8003c58 800ba7e: 4602 mov r2, r0 800ba80: 68fb ldr r3, [r7, #12] 800ba82: 1ad2 subs r2, r2, r3 800ba84: 687b ldr r3, [r7, #4] 800ba86: 429a cmp r2, r3 800ba88: d902 bls.n 800ba90 { return -1; 800ba8a: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff 800ba8e: e007 b.n 800baa0 while (WIFI_IS_CMDDATA_READY()==0) 800ba90: 2102 movs r1, #2 800ba92: 4805 ldr r0, [pc, #20] @ (800baa8 ) 800ba94: f7f8 fe1c bl 80046d0 800ba98: 4603 mov r3, r0 800ba9a: 2b01 cmp r3, #1 800ba9c: d1ed bne.n 800ba7a } } return 0; 800ba9e: 2300 movs r3, #0 } 800baa0: 4618 mov r0, r3 800baa2: 3710 adds r7, #16 800baa4: 46bd mov sp, r7 800baa6: bd80 pop {r7, pc} 800baa8: 48001000 .word 0x48001000 0800baac : int wait_cmddata_rdy_rising_event(int timeout) { 800baac: b580 push {r7, lr} 800baae: b084 sub sp, #16 800bab0: af00 add r7, sp, #0 800bab2: 6078 str r0, [r7, #4] #ifdef SEM_WAIT return SEM_WAIT(cmddata_rdy_rising_sem, timeout); #else int tickstart = HAL_GetTick(); 800bab4: f7f8 f8d0 bl 8003c58 800bab8: 4603 mov r3, r0 800baba: 60fb str r3, [r7, #12] while (cmddata_rdy_rising_event==1) 800babc: e00a b.n 800bad4 { if((HAL_GetTick() - tickstart ) > timeout) 800babe: f7f8 f8cb bl 8003c58 800bac2: 4602 mov r2, r0 800bac4: 68fb ldr r3, [r7, #12] 800bac6: 1ad2 subs r2, r2, r3 800bac8: 687b ldr r3, [r7, #4] 800baca: 429a cmp r2, r3 800bacc: d902 bls.n 800bad4 { return -1; 800bace: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff 800bad2: e004 b.n 800bade while (cmddata_rdy_rising_event==1) 800bad4: 4b04 ldr r3, [pc, #16] @ (800bae8 ) 800bad6: 681b ldr r3, [r3, #0] 800bad8: 2b01 cmp r3, #1 800bada: d0f0 beq.n 800babe } } return 0; 800badc: 2300 movs r3, #0 #endif } 800bade: 4618 mov r0, r3 800bae0: 3710 adds r7, #16 800bae2: 46bd mov sp, r7 800bae4: bd80 pop {r7, pc} 800bae6: bf00 nop 800bae8: 20001354 .word 0x20001354 0800baec : int wait_spi_rx_event(int timeout) { 800baec: b580 push {r7, lr} 800baee: b084 sub sp, #16 800baf0: af00 add r7, sp, #0 800baf2: 6078 str r0, [r7, #4] #ifdef SEM_WAIT return SEM_WAIT(spi_rx_sem, timeout); #else int tickstart = HAL_GetTick(); 800baf4: f7f8 f8b0 bl 8003c58 800baf8: 4603 mov r3, r0 800bafa: 60fb str r3, [r7, #12] while (spi_rx_event==1) 800bafc: e00a b.n 800bb14 { if((HAL_GetTick() - tickstart ) > timeout) 800bafe: f7f8 f8ab bl 8003c58 800bb02: 4602 mov r2, r0 800bb04: 68fb ldr r3, [r7, #12] 800bb06: 1ad2 subs r2, r2, r3 800bb08: 687b ldr r3, [r7, #4] 800bb0a: 429a cmp r2, r3 800bb0c: d902 bls.n 800bb14 { return -1; 800bb0e: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff 800bb12: e004 b.n 800bb1e while (spi_rx_event==1) 800bb14: 4b04 ldr r3, [pc, #16] @ (800bb28 ) 800bb16: 681b ldr r3, [r3, #0] 800bb18: 2b01 cmp r3, #1 800bb1a: d0f0 beq.n 800bafe } } return 0; 800bb1c: 2300 movs r3, #0 #endif } 800bb1e: 4618 mov r0, r3 800bb20: 3710 adds r7, #16 800bb22: 46bd mov sp, r7 800bb24: bd80 pop {r7, pc} 800bb26: bf00 nop 800bb28: 2000134c .word 0x2000134c 0800bb2c : int wait_spi_tx_event(int timeout) { 800bb2c: b580 push {r7, lr} 800bb2e: b084 sub sp, #16 800bb30: af00 add r7, sp, #0 800bb32: 6078 str r0, [r7, #4] #ifdef SEM_WAIT return SEM_WAIT(spi_tx_sem, timeout); #else int tickstart = HAL_GetTick(); 800bb34: f7f8 f890 bl 8003c58 800bb38: 4603 mov r3, r0 800bb3a: 60fb str r3, [r7, #12] while (spi_tx_event==1) 800bb3c: e00a b.n 800bb54 { if((HAL_GetTick() - tickstart ) > timeout) 800bb3e: f7f8 f88b bl 8003c58 800bb42: 4602 mov r2, r0 800bb44: 68fb ldr r3, [r7, #12] 800bb46: 1ad2 subs r2, r2, r3 800bb48: 687b ldr r3, [r7, #4] 800bb4a: 429a cmp r2, r3 800bb4c: d902 bls.n 800bb54 { return -1; 800bb4e: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff 800bb52: e004 b.n 800bb5e while (spi_tx_event==1) 800bb54: 4b04 ldr r3, [pc, #16] @ (800bb68 ) 800bb56: 681b ldr r3, [r3, #0] 800bb58: 2b01 cmp r3, #1 800bb5a: d0f0 beq.n 800bb3e } } return 0; 800bb5c: 2300 movs r3, #0 #endif } 800bb5e: 4618 mov r0, r3 800bb60: 3710 adds r7, #16 800bb62: 46bd mov sp, r7 800bb64: bd80 pop {r7, pc} 800bb66: bf00 nop 800bb68: 20001350 .word 0x20001350 0800bb6c : int16_t SPI_WIFI_ReceiveData(uint8_t *pData, uint16_t len, uint32_t timeout) { 800bb6c: b580 push {r7, lr} 800bb6e: b086 sub sp, #24 800bb70: af00 add r7, sp, #0 800bb72: 60f8 str r0, [r7, #12] 800bb74: 460b mov r3, r1 800bb76: 607a str r2, [r7, #4] 800bb78: 817b strh r3, [r7, #10] int16_t length = 0; 800bb7a: 2300 movs r3, #0 800bb7c: 82fb strh r3, [r7, #22] uint8_t tmp[2]; WIFI_DISABLE_NSS(); 800bb7e: 2201 movs r2, #1 800bb80: 2101 movs r1, #1 800bb82: 4834 ldr r0, [pc, #208] @ (800bc54 ) 800bb84: f7f8 fdbc bl 8004700 UNLOCK_SPI(); SPI_WIFI_DelayUs(3); 800bb88: 2003 movs r0, #3 800bb8a: f000 f8e3 bl 800bd54 if (wait_cmddata_rdy_rising_event(timeout)<0) 800bb8e: 687b ldr r3, [r7, #4] 800bb90: 4618 mov r0, r3 800bb92: f7ff ff8b bl 800baac 800bb96: 4603 mov r3, r0 800bb98: 2b00 cmp r3, #0 800bb9a: da02 bge.n 800bba2 { return ES_WIFI_ERROR_WAITING_DRDY_FALLING; 800bb9c: f06f 0302 mvn.w r3, #2 800bba0: e054 b.n 800bc4c } LOCK_SPI(); WIFI_ENABLE_NSS(); 800bba2: 2200 movs r2, #0 800bba4: 2101 movs r1, #1 800bba6: 482b ldr r0, [pc, #172] @ (800bc54 ) 800bba8: f7f8 fdaa bl 8004700 SPI_WIFI_DelayUs(15); 800bbac: 200f movs r0, #15 800bbae: f000 f8d1 bl 800bd54 while (WIFI_IS_CMDDATA_READY()) 800bbb2: e03d b.n 800bc30 { if((length < len) || (!len)) 800bbb4: f9b7 2016 ldrsh.w r2, [r7, #22] 800bbb8: 897b ldrh r3, [r7, #10] 800bbba: 429a cmp r2, r3 800bbbc: db02 blt.n 800bbc4 800bbbe: 897b ldrh r3, [r7, #10] 800bbc0: 2b00 cmp r3, #0 800bbc2: d13c bne.n 800bc3e { spi_rx_event=1; 800bbc4: 4b24 ldr r3, [pc, #144] @ (800bc58 ) 800bbc6: 2201 movs r2, #1 800bbc8: 601a str r2, [r3, #0] if (HAL_SPI_Receive_IT(&hspi, tmp, 1) != HAL_OK) { 800bbca: f107 0314 add.w r3, r7, #20 800bbce: 2201 movs r2, #1 800bbd0: 4619 mov r1, r3 800bbd2: 4822 ldr r0, [pc, #136] @ (800bc5c ) 800bbd4: f7fb fe30 bl 8007838 800bbd8: 4603 mov r3, r0 800bbda: 2b00 cmp r3, #0 800bbdc: d007 beq.n 800bbee WIFI_DISABLE_NSS(); 800bbde: 2201 movs r2, #1 800bbe0: 2101 movs r1, #1 800bbe2: 481c ldr r0, [pc, #112] @ (800bc54 ) 800bbe4: f7f8 fd8c bl 8004700 UNLOCK_SPI(); return ES_WIFI_ERROR_SPI_FAILED; 800bbe8: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff 800bbec: e02e b.n 800bc4c } wait_spi_rx_event(timeout); 800bbee: 687b ldr r3, [r7, #4] 800bbf0: 4618 mov r0, r3 800bbf2: f7ff ff7b bl 800baec pData[0] = tmp[0]; 800bbf6: 7d3a ldrb r2, [r7, #20] 800bbf8: 68fb ldr r3, [r7, #12] 800bbfa: 701a strb r2, [r3, #0] pData[1] = tmp[1]; 800bbfc: 68fb ldr r3, [r7, #12] 800bbfe: 3301 adds r3, #1 800bc00: 7d7a ldrb r2, [r7, #21] 800bc02: 701a strb r2, [r3, #0] length += 2; 800bc04: 8afb ldrh r3, [r7, #22] 800bc06: 3302 adds r3, #2 800bc08: b29b uxth r3, r3 800bc0a: 82fb strh r3, [r7, #22] pData += 2; 800bc0c: 68fb ldr r3, [r7, #12] 800bc0e: 3302 adds r3, #2 800bc10: 60fb str r3, [r7, #12] if (length >= ES_WIFI_DATA_SIZE) { 800bc12: f9b7 3016 ldrsh.w r3, [r7, #22] 800bc16: f5b3 6ffa cmp.w r3, #2000 @ 0x7d0 800bc1a: db09 blt.n 800bc30 WIFI_DISABLE_NSS(); 800bc1c: 2201 movs r2, #1 800bc1e: 2101 movs r1, #1 800bc20: 480c ldr r0, [pc, #48] @ (800bc54 ) 800bc22: f7f8 fd6d bl 8004700 SPI_WIFI_ResetModule(); 800bc26: f7ff fea5 bl 800b974 UNLOCK_SPI(); return ES_WIFI_ERROR_STUFFING_FOREVER; 800bc2a: f06f 0303 mvn.w r3, #3 800bc2e: e00d b.n 800bc4c while (WIFI_IS_CMDDATA_READY()) 800bc30: 2102 movs r1, #2 800bc32: 4808 ldr r0, [pc, #32] @ (800bc54 ) 800bc34: f7f8 fd4c bl 80046d0 800bc38: 4603 mov r3, r0 800bc3a: 2b01 cmp r3, #1 800bc3c: d0ba beq.n 800bbb4 else { break; } } WIFI_DISABLE_NSS(); 800bc3e: 2201 movs r2, #1 800bc40: 2101 movs r1, #1 800bc42: 4804 ldr r0, [pc, #16] @ (800bc54 ) 800bc44: f7f8 fd5c bl 8004700 UNLOCK_SPI(); return length; 800bc48: f9b7 3016 ldrsh.w r3, [r7, #22] } 800bc4c: 4618 mov r0, r3 800bc4e: 3718 adds r7, #24 800bc50: 46bd mov sp, r7 800bc52: bd80 pop {r7, pc} 800bc54: 48001000 .word 0x48001000 800bc58: 2000134c .word 0x2000134c 800bc5c: 200012e8 .word 0x200012e8 0800bc60 : * @param len : Data length * @param timeout : send timeout in mS * @retval Length of sent data */ int16_t SPI_WIFI_SendData( uint8_t *pdata, uint16_t len, uint32_t timeout) { 800bc60: b580 push {r7, lr} 800bc62: b086 sub sp, #24 800bc64: af00 add r7, sp, #0 800bc66: 60f8 str r0, [r7, #12] 800bc68: 460b mov r3, r1 800bc6a: 607a str r2, [r7, #4] 800bc6c: 817b strh r3, [r7, #10] uint8_t Padding[2]; if (wait_cmddata_rdy_high(timeout)<0) 800bc6e: 687b ldr r3, [r7, #4] 800bc70: 4618 mov r0, r3 800bc72: f7ff fef9 bl 800ba68 800bc76: 4603 mov r3, r0 800bc78: 2b00 cmp r3, #0 800bc7a: da02 bge.n 800bc82 { return ES_WIFI_ERROR_SPI_FAILED; 800bc7c: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff 800bc80: e04f b.n 800bd22 } /* arm to detect rising event */ cmddata_rdy_rising_event=1; 800bc82: 4b2a ldr r3, [pc, #168] @ (800bd2c ) 800bc84: 2201 movs r2, #1 800bc86: 601a str r2, [r3, #0] LOCK_SPI(); WIFI_ENABLE_NSS(); 800bc88: 2200 movs r2, #0 800bc8a: 2101 movs r1, #1 800bc8c: 4828 ldr r0, [pc, #160] @ (800bd30 ) 800bc8e: f7f8 fd37 bl 8004700 SPI_WIFI_DelayUs(15); 800bc92: 200f movs r0, #15 800bc94: f000 f85e bl 800bd54 if (len > 1) 800bc98: 897b ldrh r3, [r7, #10] 800bc9a: 2b01 cmp r3, #1 800bc9c: d919 bls.n 800bcd2 { spi_tx_event=1; 800bc9e: 4b25 ldr r3, [pc, #148] @ (800bd34 ) 800bca0: 2201 movs r2, #1 800bca2: 601a str r2, [r3, #0] if( HAL_SPI_Transmit_IT(&hspi, (uint8_t *)pdata , len/2) != HAL_OK) 800bca4: 897b ldrh r3, [r7, #10] 800bca6: 085b lsrs r3, r3, #1 800bca8: b29b uxth r3, r3 800bcaa: 461a mov r2, r3 800bcac: 68f9 ldr r1, [r7, #12] 800bcae: 4822 ldr r0, [pc, #136] @ (800bd38 ) 800bcb0: f7fb fd3a bl 8007728 800bcb4: 4603 mov r3, r0 800bcb6: 2b00 cmp r3, #0 800bcb8: d007 beq.n 800bcca { WIFI_DISABLE_NSS(); 800bcba: 2201 movs r2, #1 800bcbc: 2101 movs r1, #1 800bcbe: 481c ldr r0, [pc, #112] @ (800bd30 ) 800bcc0: f7f8 fd1e bl 8004700 UNLOCK_SPI(); return ES_WIFI_ERROR_SPI_FAILED; 800bcc4: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff 800bcc8: e02b b.n 800bd22 } wait_spi_tx_event(timeout); 800bcca: 687b ldr r3, [r7, #4] 800bccc: 4618 mov r0, r3 800bcce: f7ff ff2d bl 800bb2c } if ( len & 1) 800bcd2: 897b ldrh r3, [r7, #10] 800bcd4: f003 0301 and.w r3, r3, #1 800bcd8: 2b00 cmp r3, #0 800bcda: d020 beq.n 800bd1e { Padding[0] = pdata[len-1]; 800bcdc: 897b ldrh r3, [r7, #10] 800bcde: 3b01 subs r3, #1 800bce0: 68fa ldr r2, [r7, #12] 800bce2: 4413 add r3, r2 800bce4: 781b ldrb r3, [r3, #0] 800bce6: 753b strb r3, [r7, #20] Padding[1] = '\n'; 800bce8: 230a movs r3, #10 800bcea: 757b strb r3, [r7, #21] spi_tx_event=1; 800bcec: 4b11 ldr r3, [pc, #68] @ (800bd34 ) 800bcee: 2201 movs r2, #1 800bcf0: 601a str r2, [r3, #0] if( HAL_SPI_Transmit_IT(&hspi, Padding, 1) != HAL_OK) 800bcf2: f107 0314 add.w r3, r7, #20 800bcf6: 2201 movs r2, #1 800bcf8: 4619 mov r1, r3 800bcfa: 480f ldr r0, [pc, #60] @ (800bd38 ) 800bcfc: f7fb fd14 bl 8007728 800bd00: 4603 mov r3, r0 800bd02: 2b00 cmp r3, #0 800bd04: d007 beq.n 800bd16 { WIFI_DISABLE_NSS(); 800bd06: 2201 movs r2, #1 800bd08: 2101 movs r1, #1 800bd0a: 4809 ldr r0, [pc, #36] @ (800bd30 ) 800bd0c: f7f8 fcf8 bl 8004700 UNLOCK_SPI(); return ES_WIFI_ERROR_SPI_FAILED; 800bd10: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff 800bd14: e005 b.n 800bd22 } wait_spi_tx_event(timeout); 800bd16: 687b ldr r3, [r7, #4] 800bd18: 4618 mov r0, r3 800bd1a: f7ff ff07 bl 800bb2c } return len; 800bd1e: f9b7 300a ldrsh.w r3, [r7, #10] } 800bd22: 4618 mov r0, r3 800bd24: 3718 adds r7, #24 800bd26: 46bd mov sp, r7 800bd28: bd80 pop {r7, pc} 800bd2a: bf00 nop 800bd2c: 20001354 .word 0x20001354 800bd30: 48001000 .word 0x48001000 800bd34: 20001350 .word 0x20001350 800bd38: 200012e8 .word 0x200012e8 0800bd3c : * @brief Delay * @param Delay in ms * @retval None */ void SPI_WIFI_Delay(uint32_t Delay) { 800bd3c: b580 push {r7, lr} 800bd3e: b082 sub sp, #8 800bd40: af00 add r7, sp, #0 800bd42: 6078 str r0, [r7, #4] HAL_Delay(Delay); 800bd44: 6878 ldr r0, [r7, #4] 800bd46: f7f7 ff93 bl 8003c70 } 800bd4a: bf00 nop 800bd4c: 3708 adds r7, #8 800bd4e: 46bd mov sp, r7 800bd50: bd80 pop {r7, pc} ... 0800bd54 : * @brief Delay * @param Delay in us * @retval None */ void SPI_WIFI_DelayUs(uint32_t n) { 800bd54: b580 push {r7, lr} 800bd56: b086 sub sp, #24 800bd58: af00 add r7, sp, #0 800bd5a: 6078 str r0, [r7, #4] volatile uint32_t ct = 0; 800bd5c: 2300 movs r3, #0 800bd5e: 60bb str r3, [r7, #8] uint32_t loop_per_us = 0; 800bd60: 2300 movs r3, #0 800bd62: 617b str r3, [r7, #20] static uint32_t cycle_per_loop = 0; /* calibration happen on first call for a duration of 1 ms * nbcycle per loop */ /* 10 cycle for STM32L4 */ if (cycle_per_loop == 0 ) 800bd64: 4b20 ldr r3, [pc, #128] @ (800bde8 ) 800bd66: 681b ldr r3, [r3, #0] 800bd68: 2b00 cmp r3, #0 800bd6a: d122 bne.n 800bdb2 { uint32_t cycle_per_ms = (SystemCoreClock/1000UL); 800bd6c: 4b1f ldr r3, [pc, #124] @ (800bdec ) 800bd6e: 681b ldr r3, [r3, #0] 800bd70: 4a1f ldr r2, [pc, #124] @ (800bdf0 ) 800bd72: fba2 2303 umull r2, r3, r2, r3 800bd76: 099b lsrs r3, r3, #6 800bd78: 613b str r3, [r7, #16] uint32_t t = 0; 800bd7a: 2300 movs r3, #0 800bd7c: 60fb str r3, [r7, #12] ct = cycle_per_ms; 800bd7e: 693b ldr r3, [r7, #16] 800bd80: 60bb str r3, [r7, #8] t = HAL_GetTick(); 800bd82: f7f7 ff69 bl 8003c58 800bd86: 60f8 str r0, [r7, #12] while(ct) ct--; 800bd88: e002 b.n 800bd90 800bd8a: 68bb ldr r3, [r7, #8] 800bd8c: 3b01 subs r3, #1 800bd8e: 60bb str r3, [r7, #8] 800bd90: 68bb ldr r3, [r7, #8] 800bd92: 2b00 cmp r3, #0 800bd94: d1f9 bne.n 800bd8a cycle_per_loop = HAL_GetTick()-t; 800bd96: f7f7 ff5f bl 8003c58 800bd9a: 4602 mov r2, r0 800bd9c: 68fb ldr r3, [r7, #12] 800bd9e: 1ad3 subs r3, r2, r3 800bda0: 4a11 ldr r2, [pc, #68] @ (800bde8 ) 800bda2: 6013 str r3, [r2, #0] if (cycle_per_loop == 0) cycle_per_loop = 1; 800bda4: 4b10 ldr r3, [pc, #64] @ (800bde8 ) 800bda6: 681b ldr r3, [r3, #0] 800bda8: 2b00 cmp r3, #0 800bdaa: d102 bne.n 800bdb2 800bdac: 4b0e ldr r3, [pc, #56] @ (800bde8 ) 800bdae: 2201 movs r2, #1 800bdb0: 601a str r2, [r3, #0] } loop_per_us = SystemCoreClock/1000000UL/cycle_per_loop; 800bdb2: 4b0e ldr r3, [pc, #56] @ (800bdec ) 800bdb4: 681b ldr r3, [r3, #0] 800bdb6: 4a0f ldr r2, [pc, #60] @ (800bdf4 ) 800bdb8: fba2 2303 umull r2, r3, r2, r3 800bdbc: 0c9a lsrs r2, r3, #18 800bdbe: 4b0a ldr r3, [pc, #40] @ (800bde8 ) 800bdc0: 681b ldr r3, [r3, #0] 800bdc2: fbb2 f3f3 udiv r3, r2, r3 800bdc6: 617b str r3, [r7, #20] ct = n * loop_per_us; 800bdc8: 687b ldr r3, [r7, #4] 800bdca: 697a ldr r2, [r7, #20] 800bdcc: fb02 f303 mul.w r3, r2, r3 800bdd0: 60bb str r3, [r7, #8] while(ct) ct--; 800bdd2: e002 b.n 800bdda 800bdd4: 68bb ldr r3, [r7, #8] 800bdd6: 3b01 subs r3, #1 800bdd8: 60bb str r3, [r7, #8] 800bdda: 68bb ldr r3, [r7, #8] 800bddc: 2b00 cmp r3, #0 800bdde: d1f9 bne.n 800bdd4 return; 800bde0: bf00 nop } 800bde2: 3718 adds r7, #24 800bde4: 46bd mov sp, r7 800bde6: bd80 pop {r7, pc} 800bde8: 20001358 .word 0x20001358 800bdec: 200000c4 .word 0x200000c4 800bdf0: 10624dd3 .word 0x10624dd3 800bdf4: 431bde83 .word 0x431bde83 0800bdf8 : * the configuration information for SPI module. * @retval None */ void HAL_SPI_RxCpltCallback(SPI_HandleTypeDef *hspi) { 800bdf8: b480 push {r7} 800bdfa: b083 sub sp, #12 800bdfc: af00 add r7, sp, #0 800bdfe: 6078 str r0, [r7, #4] if (spi_rx_event) 800be00: 4b06 ldr r3, [pc, #24] @ (800be1c ) 800be02: 681b ldr r3, [r3, #0] 800be04: 2b00 cmp r3, #0 800be06: d002 beq.n 800be0e { SEM_SIGNAL(spi_rx_sem); spi_rx_event = 0; 800be08: 4b04 ldr r3, [pc, #16] @ (800be1c ) 800be0a: 2200 movs r2, #0 800be0c: 601a str r2, [r3, #0] } } 800be0e: bf00 nop 800be10: 370c adds r7, #12 800be12: 46bd mov sp, r7 800be14: f85d 7b04 ldr.w r7, [sp], #4 800be18: 4770 bx lr 800be1a: bf00 nop 800be1c: 2000134c .word 0x2000134c 0800be20 : * @param hspi: pointer to a SPI_HandleTypeDef structure that contains * the configuration information for SPI module. * @retval None */ void HAL_SPI_TxCpltCallback(SPI_HandleTypeDef *hspi) { 800be20: b480 push {r7} 800be22: b083 sub sp, #12 800be24: af00 add r7, sp, #0 800be26: 6078 str r0, [r7, #4] if (spi_tx_event) 800be28: 4b06 ldr r3, [pc, #24] @ (800be44 ) 800be2a: 681b ldr r3, [r3, #0] 800be2c: 2b00 cmp r3, #0 800be2e: d002 beq.n 800be36 { SEM_SIGNAL(spi_tx_sem); spi_tx_event = 0; 800be30: 4b04 ldr r3, [pc, #16] @ (800be44 ) 800be32: 2200 movs r2, #0 800be34: 601a str r2, [r3, #0] } } 800be36: bf00 nop 800be38: 370c adds r7, #12 800be3a: 46bd mov sp, r7 800be3c: f85d 7b04 ldr.w r7, [sp], #4 800be40: 4770 bx lr 800be42: bf00 nop 800be44: 20001350 .word 0x20001350 0800be48 : * @brief Interrupt handler for Data RDY signal * @param None * @retval None */ void SPI_WIFI_ISR(void) { 800be48: b480 push {r7} 800be4a: af00 add r7, sp, #0 if (cmddata_rdy_rising_event==1) 800be4c: 4b05 ldr r3, [pc, #20] @ (800be64 ) 800be4e: 681b ldr r3, [r3, #0] 800be50: 2b01 cmp r3, #1 800be52: d102 bne.n 800be5a { SEM_SIGNAL(cmddata_rdy_rising_sem); cmddata_rdy_rising_event = 0; 800be54: 4b03 ldr r3, [pc, #12] @ (800be64 ) 800be56: 2200 movs r2, #0 800be58: 601a str r2, [r3, #0] } } 800be5a: bf00 nop 800be5c: 46bd mov sp, r7 800be5e: f85d 7b04 ldr.w r7, [sp], #4 800be62: 4770 bx lr 800be64: 20001354 .word 0x20001354 0800be68 : * @brief Initialize the WIFI core * @param None * @retval Operation status */ WIFI_Status_t WIFI_Init(void) { 800be68: b580 push {r7, lr} 800be6a: b084 sub sp, #16 800be6c: af02 add r7, sp, #8 WIFI_Status_t ret = WIFI_STATUS_ERROR; 800be6e: 2301 movs r3, #1 800be70: 71fb strb r3, [r7, #7] if(ES_WIFI_RegisterBusIO(&EsWifiObj, 800be72: 4b0d ldr r3, [pc, #52] @ (800bea8 ) 800be74: 9301 str r3, [sp, #4] 800be76: 4b0d ldr r3, [pc, #52] @ (800beac ) 800be78: 9300 str r3, [sp, #0] 800be7a: 4b0d ldr r3, [pc, #52] @ (800beb0 ) 800be7c: 4a0d ldr r2, [pc, #52] @ (800beb4 ) 800be7e: 490e ldr r1, [pc, #56] @ (800beb8 ) 800be80: 480e ldr r0, [pc, #56] @ (800bebc ) 800be82: f7fe ff1d bl 800acc0 800be86: 4603 mov r3, r0 800be88: 2b00 cmp r3, #0 800be8a: d107 bne.n 800be9c SPI_WIFI_DeInit, SPI_WIFI_Delay, SPI_WIFI_SendData, SPI_WIFI_ReceiveData) == ES_WIFI_STATUS_OK) { if(ES_WIFI_Init(&EsWifiObj) == ES_WIFI_STATUS_OK) 800be8c: 480b ldr r0, [pc, #44] @ (800bebc ) 800be8e: f7fe fee9 bl 800ac64 800be92: 4603 mov r3, r0 800be94: 2b00 cmp r3, #0 800be96: d101 bne.n 800be9c { ret = WIFI_STATUS_OK; 800be98: 2300 movs r3, #0 800be9a: 71fb strb r3, [r7, #7] } } return ret; 800be9c: 79fb ldrb r3, [r7, #7] } 800be9e: 4618 mov r0, r3 800bea0: 3708 adds r7, #8 800bea2: 46bd mov sp, r7 800bea4: bd80 pop {r7, pc} 800bea6: bf00 nop 800bea8: 0800bb6d .word 0x0800bb6d 800beac: 0800bc61 .word 0x0800bc61 800beb0: 0800bd3d .word 0x0800bd3d 800beb4: 0800ba55 .word 0x0800ba55 800beb8: 0800b8b9 .word 0x0800b8b9 800bebc: 2000135c .word 0x2000135c 0800bec0 : */ WIFI_Status_t WIFI_Connect( const char* SSID, const char* Password, WIFI_Ecn_t ecn) { 800bec0: b580 push {r7, lr} 800bec2: b086 sub sp, #24 800bec4: af00 add r7, sp, #0 800bec6: 60f8 str r0, [r7, #12] 800bec8: 60b9 str r1, [r7, #8] 800beca: 4613 mov r3, r2 800becc: 71fb strb r3, [r7, #7] WIFI_Status_t ret = WIFI_STATUS_ERROR; 800bece: 2301 movs r3, #1 800bed0: 75fb strb r3, [r7, #23] if(ES_WIFI_Connect(&EsWifiObj, SSID, Password, (ES_WIFI_SecurityType_t) ecn) == ES_WIFI_STATUS_OK) 800bed2: 79fb ldrb r3, [r7, #7] 800bed4: 68ba ldr r2, [r7, #8] 800bed6: 68f9 ldr r1, [r7, #12] 800bed8: 4809 ldr r0, [pc, #36] @ (800bf00 ) 800beda: f7fe ff25 bl 800ad28 800bede: 4603 mov r3, r0 800bee0: 2b00 cmp r3, #0 800bee2: d107 bne.n 800bef4 { if(ES_WIFI_GetNetworkSettings(&EsWifiObj) == ES_WIFI_STATUS_OK) 800bee4: 4806 ldr r0, [pc, #24] @ (800bf00 ) 800bee6: f7fe ffc3 bl 800ae70 800beea: 4603 mov r3, r0 800beec: 2b00 cmp r3, #0 800beee: d101 bne.n 800bef4 { ret = WIFI_STATUS_OK; 800bef0: 2300 movs r3, #0 800bef2: 75fb strb r3, [r7, #23] } } return ret; 800bef4: 7dfb ldrb r3, [r7, #23] } 800bef6: 4618 mov r0, r3 800bef8: 3718 adds r7, #24 800befa: 46bd mov sp, r7 800befc: bd80 pop {r7, pc} 800befe: bf00 nop 800bf00: 2000135c .word 0x2000135c 0800bf04 : /** * @brief This function retrieves the WiFi interface's MAC address. * @retval Operation Status. */ WIFI_Status_t WIFI_GetMAC_Address(uint8_t *mac) { 800bf04: b580 push {r7, lr} 800bf06: b084 sub sp, #16 800bf08: af00 add r7, sp, #0 800bf0a: 6078 str r0, [r7, #4] WIFI_Status_t ret = WIFI_STATUS_ERROR; 800bf0c: 2301 movs r3, #1 800bf0e: 73fb strb r3, [r7, #15] if(ES_WIFI_GetMACAddress(&EsWifiObj, mac) == ES_WIFI_STATUS_OK) 800bf10: 6879 ldr r1, [r7, #4] 800bf12: 4806 ldr r0, [pc, #24] @ (800bf2c ) 800bf14: f7fe ffd6 bl 800aec4 800bf18: 4603 mov r3, r0 800bf1a: 2b00 cmp r3, #0 800bf1c: d101 bne.n 800bf22 { ret = WIFI_STATUS_OK; 800bf1e: 2300 movs r3, #0 800bf20: 73fb strb r3, [r7, #15] } return ret; 800bf22: 7bfb ldrb r3, [r7, #15] } 800bf24: 4618 mov r0, r3 800bf26: 3710 adds r7, #16 800bf28: 46bd mov sp, r7 800bf2a: bd80 pop {r7, pc} 800bf2c: 2000135c .word 0x2000135c 0800bf30 : /** * @brief This function retrieves the WiFi interface's IP address. * @retval Operation Status. */ WIFI_Status_t WIFI_GetIP_Address (uint8_t *ipaddr) { 800bf30: b580 push {r7, lr} 800bf32: b084 sub sp, #16 800bf34: af00 add r7, sp, #0 800bf36: 6078 str r0, [r7, #4] WIFI_Status_t ret = WIFI_STATUS_ERROR; 800bf38: 2301 movs r3, #1 800bf3a: 73fb strb r3, [r7, #15] if (ES_WIFI_IsConnected(&EsWifiObj) == 1) 800bf3c: 4809 ldr r0, [pc, #36] @ (800bf64 ) 800bf3e: f7fe ff6b bl 800ae18 800bf42: 4603 mov r3, r0 800bf44: 2b01 cmp r3, #1 800bf46: d107 bne.n 800bf58 { memcpy(ipaddr, EsWifiObj.NetSettings.IP_Addr, 4); 800bf48: 4b06 ldr r3, [pc, #24] @ (800bf64 ) 800bf4a: f8d3 30d5 ldr.w r3, [r3, #213] @ 0xd5 800bf4e: 461a mov r2, r3 800bf50: 687b ldr r3, [r7, #4] 800bf52: 601a str r2, [r3, #0] ret = WIFI_STATUS_OK; 800bf54: 2300 movs r3, #0 800bf56: 73fb strb r3, [r7, #15] } return ret; 800bf58: 7bfb ldrb r3, [r7, #15] } 800bf5a: 4618 mov r0, r3 800bf5c: 3710 adds r7, #16 800bf5e: 46bd mov sp, r7 800bf60: bd80 pop {r7, pc} 800bf62: bf00 nop 800bf64: 2000135c .word 0x2000135c 0800bf68 : * @param name : name of the connection * @param port : Remote port * @retval Operation status */ WIFI_Status_t WIFI_StartServer(uint32_t socket, WIFI_Protocol_t protocol, uint16_t backlog ,const char *name, uint16_t port) { 800bf68: b580 push {r7, lr} 800bf6a: b08a sub sp, #40 @ 0x28 800bf6c: af00 add r7, sp, #0 800bf6e: 60f8 str r0, [r7, #12] 800bf70: 607b str r3, [r7, #4] 800bf72: 460b mov r3, r1 800bf74: 72fb strb r3, [r7, #11] 800bf76: 4613 mov r3, r2 800bf78: 813b strh r3, [r7, #8] WIFI_Status_t ret = WIFI_STATUS_ERROR; 800bf7a: 2301 movs r3, #1 800bf7c: f887 3027 strb.w r3, [r7, #39] @ 0x27 ES_WIFI_Conn_t conn; conn.Number = socket; 800bf80: 68fb ldr r3, [r7, #12] 800bf82: b2db uxtb r3, r3 800bf84: 747b strb r3, [r7, #17] conn.LocalPort = port; 800bf86: 8e3b ldrh r3, [r7, #48] @ 0x30 800bf88: 82bb strh r3, [r7, #20] conn.Type = (protocol == WIFI_TCP_PROTOCOL)? ES_WIFI_TCP_CONNECTION : ES_WIFI_UDP_CONNECTION; 800bf8a: 7afb ldrb r3, [r7, #11] 800bf8c: 2b00 cmp r3, #0 800bf8e: bf14 ite ne 800bf90: 2301 movne r3, #1 800bf92: 2300 moveq r3, #0 800bf94: b2db uxtb r3, r3 800bf96: 743b strb r3, [r7, #16] conn.Backlog = backlog; 800bf98: 893b ldrh r3, [r7, #8] 800bf9a: b2db uxtb r3, r3 800bf9c: f887 3020 strb.w r3, [r7, #32] if(ES_WIFI_StartServerSingleConn(&EsWifiObj, &conn)== ES_WIFI_STATUS_OK) 800bfa0: f107 0310 add.w r3, r7, #16 800bfa4: 4619 mov r1, r3 800bfa6: 4807 ldr r0, [pc, #28] @ (800bfc4 ) 800bfa8: f7fe ffbe bl 800af28 800bfac: 4603 mov r3, r0 800bfae: 2b00 cmp r3, #0 800bfb0: d102 bne.n 800bfb8 { ret = WIFI_STATUS_OK; 800bfb2: 2300 movs r3, #0 800bfb4: f887 3027 strb.w r3, [r7, #39] @ 0x27 } return ret; 800bfb8: f897 3027 ldrb.w r3, [r7, #39] @ 0x27 } 800bfbc: 4618 mov r0, r3 800bfbe: 3728 adds r7, #40 @ 0x28 800bfc0: 46bd mov sp, r7 800bfc2: bd80 pop {r7, pc} 800bfc4: 2000135c .word 0x2000135c 0800bfc8 : * @brief Wait for a client connection to the server * @param socket : socket * @retval Operation status */ WIFI_Status_t WIFI_WaitServerConnection(int socket,uint32_t Timeout,uint8_t *RemoteIp,uint16_t *RemotePort) { 800bfc8: b580 push {r7, lr} 800bfca: b08a sub sp, #40 @ 0x28 800bfcc: af00 add r7, sp, #0 800bfce: 60f8 str r0, [r7, #12] 800bfd0: 60b9 str r1, [r7, #8] 800bfd2: 607a str r2, [r7, #4] 800bfd4: 603b str r3, [r7, #0] ES_WIFI_Conn_t conn; ES_WIFI_Status_t ret; conn.Number = socket; 800bfd6: 68fb ldr r3, [r7, #12] 800bfd8: b2db uxtb r3, r3 800bfda: 747b strb r3, [r7, #17] ret = ES_WIFI_WaitServerConnection(&EsWifiObj,Timeout,&conn); 800bfdc: f107 0310 add.w r3, r7, #16 800bfe0: 461a mov r2, r3 800bfe2: 68b9 ldr r1, [r7, #8] 800bfe4: 4819 ldr r0, [pc, #100] @ (800c04c ) 800bfe6: f7ff f84b bl 800b080 800bfea: 4603 mov r3, r0 800bfec: f887 3027 strb.w r3, [r7, #39] @ 0x27 if (ES_WIFI_STATUS_OK == ret) 800bff0: f897 3027 ldrb.w r3, [r7, #39] @ 0x27 800bff4: 2b00 cmp r3, #0 800bff6: d10f bne.n 800c018 { if (RemotePort) *RemotePort=conn.RemotePort; 800bff8: 683b ldr r3, [r7, #0] 800bffa: 2b00 cmp r3, #0 800bffc: d002 beq.n 800c004 800bffe: 8a7a ldrh r2, [r7, #18] 800c000: 683b ldr r3, [r7, #0] 800c002: 801a strh r2, [r3, #0] if (RemoteIp) 800c004: 687b ldr r3, [r7, #4] 800c006: 2b00 cmp r3, #0 800c008: d004 beq.n 800c014 { memcpy(RemoteIp,conn.RemoteIP,sizeof(conn.RemoteIP)); 800c00a: f8d7 3016 ldr.w r3, [r7, #22] 800c00e: 461a mov r2, r3 800c010: 687b ldr r3, [r7, #4] 800c012: 601a str r2, [r3, #0] } return WIFI_STATUS_OK; 800c014: 2300 movs r3, #0 800c016: e014 b.n 800c042 } if (ES_WIFI_STATUS_TIMEOUT ==ret) 800c018: f897 3027 ldrb.w r3, [r7, #39] @ 0x27 800c01c: 2b03 cmp r3, #3 800c01e: d10f bne.n 800c040 { if (RemotePort) *RemotePort=0; 800c020: 683b ldr r3, [r7, #0] 800c022: 2b00 cmp r3, #0 800c024: d002 beq.n 800c02c 800c026: 683b ldr r3, [r7, #0] 800c028: 2200 movs r2, #0 800c02a: 801a strh r2, [r3, #0] if (RemoteIp) 800c02c: 687b ldr r3, [r7, #4] 800c02e: 2b00 cmp r3, #0 800c030: d004 beq.n 800c03c { memset(RemoteIp,0,sizeof(conn.RemoteIP)); 800c032: 2204 movs r2, #4 800c034: 2100 movs r1, #0 800c036: 6878 ldr r0, [r7, #4] 800c038: f004 fa5a bl 80104f0 } return WIFI_STATUS_TIMEOUT; 800c03c: 2305 movs r3, #5 800c03e: e000 b.n 800c042 } return WIFI_STATUS_ERROR; 800c040: 2301 movs r3, #1 } 800c042: 4618 mov r0, r3 800c044: 3728 adds r7, #40 @ 0x28 800c046: 46bd mov sp, r7 800c048: bd80 pop {r7, pc} 800c04a: bf00 nop 800c04c: 2000135c .word 0x2000135c 0800c050 : /** * @brief Close current connection from a client to the server * @retval Operation status */ WIFI_Status_t WIFI_CloseServerConnection(int socket) { 800c050: b580 push {r7, lr} 800c052: b084 sub sp, #16 800c054: af00 add r7, sp, #0 800c056: 6078 str r0, [r7, #4] WIFI_Status_t ret = WIFI_STATUS_ERROR; 800c058: 2301 movs r3, #1 800c05a: 73fb strb r3, [r7, #15] if (ES_WIFI_STATUS_OK == ES_WIFI_CloseServerConnection(&EsWifiObj,socket)) 800c05c: 6879 ldr r1, [r7, #4] 800c05e: 4806 ldr r0, [pc, #24] @ (800c078 ) 800c060: f7ff f930 bl 800b2c4 800c064: 4603 mov r3, r0 800c066: 2b00 cmp r3, #0 800c068: d101 bne.n 800c06e { ret = WIFI_STATUS_OK; 800c06a: 2300 movs r3, #0 800c06c: 73fb strb r3, [r7, #15] } return ret; 800c06e: 7bfb ldrb r3, [r7, #15] } 800c070: 4618 mov r0, r3 800c072: 3710 adds r7, #16 800c074: 46bd mov sp, r7 800c076: bd80 pop {r7, pc} 800c078: 2000135c .word 0x2000135c 0800c07c : * @brief Stop a server * @param socket : socket * @retval Operation status */ WIFI_Status_t WIFI_StopServer(uint32_t socket) { 800c07c: b580 push {r7, lr} 800c07e: b084 sub sp, #16 800c080: af00 add r7, sp, #0 800c082: 6078 str r0, [r7, #4] WIFI_Status_t ret = WIFI_STATUS_ERROR; 800c084: 2301 movs r3, #1 800c086: 73fb strb r3, [r7, #15] if(ES_WIFI_StopServerSingleConn(&EsWifiObj,socket)== ES_WIFI_STATUS_OK) 800c088: 687b ldr r3, [r7, #4] 800c08a: 4619 mov r1, r3 800c08c: 4806 ldr r0, [pc, #24] @ (800c0a8 ) 800c08e: f7ff f979 bl 800b384 800c092: 4603 mov r3, r0 800c094: 2b00 cmp r3, #0 800c096: d101 bne.n 800c09c { ret = WIFI_STATUS_OK; 800c098: 2300 movs r3, #0 800c09a: 73fb strb r3, [r7, #15] } return ret; 800c09c: 7bfb ldrb r3, [r7, #15] } 800c09e: 4618 mov r0, r3 800c0a0: 3710 adds r7, #16 800c0a2: 46bd mov sp, r7 800c0a4: bd80 pop {r7, pc} 800c0a6: bf00 nop 800c0a8: 2000135c .word 0x2000135c 0800c0ac : * @param SentDatalen : (OUT) length actually sent * @param Timeout : Socket write timeout (ms) * @retval Operation status */ WIFI_Status_t WIFI_SendData(uint8_t socket, uint8_t *pdata, uint16_t Reqlen, uint16_t *SentDatalen, uint32_t Timeout) { 800c0ac: b580 push {r7, lr} 800c0ae: b088 sub sp, #32 800c0b0: af02 add r7, sp, #8 800c0b2: 60b9 str r1, [r7, #8] 800c0b4: 607b str r3, [r7, #4] 800c0b6: 4603 mov r3, r0 800c0b8: 73fb strb r3, [r7, #15] 800c0ba: 4613 mov r3, r2 800c0bc: 81bb strh r3, [r7, #12] WIFI_Status_t ret = WIFI_STATUS_ERROR; 800c0be: 2301 movs r3, #1 800c0c0: 75fb strb r3, [r7, #23] if(ES_WIFI_SendData(&EsWifiObj, socket, pdata, Reqlen, SentDatalen, Timeout) == ES_WIFI_STATUS_OK) 800c0c2: 89ba ldrh r2, [r7, #12] 800c0c4: 7bf9 ldrb r1, [r7, #15] 800c0c6: 6a3b ldr r3, [r7, #32] 800c0c8: 9301 str r3, [sp, #4] 800c0ca: 687b ldr r3, [r7, #4] 800c0cc: 9300 str r3, [sp, #0] 800c0ce: 4613 mov r3, r2 800c0d0: 68ba ldr r2, [r7, #8] 800c0d2: 4806 ldr r0, [pc, #24] @ (800c0ec ) 800c0d4: f7ff f9b8 bl 800b448 800c0d8: 4603 mov r3, r0 800c0da: 2b00 cmp r3, #0 800c0dc: d101 bne.n 800c0e2 { ret = WIFI_STATUS_OK; 800c0de: 2300 movs r3, #0 800c0e0: 75fb strb r3, [r7, #23] } return ret; 800c0e2: 7dfb ldrb r3, [r7, #23] } 800c0e4: 4618 mov r0, r3 800c0e6: 3718 adds r7, #24 800c0e8: 46bd mov sp, r7 800c0ea: bd80 pop {r7, pc} 800c0ec: 2000135c .word 0x2000135c 0800c0f0 : * @param RcvDatalen : (OUT) length of the data actually received * @param Timeout : Socket read timeout (ms) * @retval Operation status */ WIFI_Status_t WIFI_ReceiveData(uint8_t socket, uint8_t *pdata, uint16_t Reqlen, uint16_t *RcvDatalen, uint32_t Timeout) { 800c0f0: b580 push {r7, lr} 800c0f2: b088 sub sp, #32 800c0f4: af02 add r7, sp, #8 800c0f6: 60b9 str r1, [r7, #8] 800c0f8: 607b str r3, [r7, #4] 800c0fa: 4603 mov r3, r0 800c0fc: 73fb strb r3, [r7, #15] 800c0fe: 4613 mov r3, r2 800c100: 81bb strh r3, [r7, #12] WIFI_Status_t ret = WIFI_STATUS_ERROR; 800c102: 2301 movs r3, #1 800c104: 75fb strb r3, [r7, #23] if(ES_WIFI_ReceiveData(&EsWifiObj, socket, pdata, Reqlen, RcvDatalen, Timeout) == ES_WIFI_STATUS_OK) 800c106: 89ba ldrh r2, [r7, #12] 800c108: 7bf9 ldrb r1, [r7, #15] 800c10a: 6a3b ldr r3, [r7, #32] 800c10c: 9301 str r3, [sp, #4] 800c10e: 687b ldr r3, [r7, #4] 800c110: 9300 str r3, [sp, #0] 800c112: 4613 mov r3, r2 800c114: 68ba ldr r2, [r7, #8] 800c116: 4806 ldr r0, [pc, #24] @ (800c130 ) 800c118: f7ff fa52 bl 800b5c0 800c11c: 4603 mov r3, r0 800c11e: 2b00 cmp r3, #0 800c120: d101 bne.n 800c126 { ret = WIFI_STATUS_OK; 800c122: 2300 movs r3, #0 800c124: 75fb strb r3, [r7, #23] } return ret; 800c126: 7dfb ldrb r3, [r7, #23] } 800c128: 4618 mov r0, r3 800c12a: 3718 adds r7, #24 800c12c: 46bd mov sp, r7 800c12e: bd80 pop {r7, pc} 800c130: 2000135c .word 0x2000135c 0800c134 <__NVIC_SetPriority>: { 800c134: b480 push {r7} 800c136: b083 sub sp, #12 800c138: af00 add r7, sp, #0 800c13a: 4603 mov r3, r0 800c13c: 6039 str r1, [r7, #0] 800c13e: 71fb strb r3, [r7, #7] if ((int32_t)(IRQn) >= 0) 800c140: f997 3007 ldrsb.w r3, [r7, #7] 800c144: 2b00 cmp r3, #0 800c146: db0a blt.n 800c15e <__NVIC_SetPriority+0x2a> NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 800c148: 683b ldr r3, [r7, #0] 800c14a: b2da uxtb r2, r3 800c14c: 490c ldr r1, [pc, #48] @ (800c180 <__NVIC_SetPriority+0x4c>) 800c14e: f997 3007 ldrsb.w r3, [r7, #7] 800c152: 0112 lsls r2, r2, #4 800c154: b2d2 uxtb r2, r2 800c156: 440b add r3, r1 800c158: f883 2300 strb.w r2, [r3, #768] @ 0x300 } 800c15c: e00a b.n 800c174 <__NVIC_SetPriority+0x40> SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 800c15e: 683b ldr r3, [r7, #0] 800c160: b2da uxtb r2, r3 800c162: 4908 ldr r1, [pc, #32] @ (800c184 <__NVIC_SetPriority+0x50>) 800c164: 79fb ldrb r3, [r7, #7] 800c166: f003 030f and.w r3, r3, #15 800c16a: 3b04 subs r3, #4 800c16c: 0112 lsls r2, r2, #4 800c16e: b2d2 uxtb r2, r2 800c170: 440b add r3, r1 800c172: 761a strb r2, [r3, #24] } 800c174: bf00 nop 800c176: 370c adds r7, #12 800c178: 46bd mov sp, r7 800c17a: f85d 7b04 ldr.w r7, [sp], #4 800c17e: 4770 bx lr 800c180: e000e100 .word 0xe000e100 800c184: e000ed00 .word 0xe000ed00 0800c188 : /* SysTick handler implementation that also clears overflow flag. */ #if (USE_CUSTOM_SYSTICK_HANDLER_IMPLEMENTATION == 0) void SysTick_Handler (void) { 800c188: b580 push {r7, lr} 800c18a: af00 add r7, sp, #0 /* Clear overflow flag */ SysTick->CTRL; 800c18c: 4b05 ldr r3, [pc, #20] @ (800c1a4 ) 800c18e: 681b ldr r3, [r3, #0] if (xTaskGetSchedulerState() != taskSCHEDULER_NOT_STARTED) { 800c190: f001 fe28 bl 800dde4 800c194: 4603 mov r3, r0 800c196: 2b01 cmp r3, #1 800c198: d001 beq.n 800c19e /* Call tick handler */ xPortSysTickHandler(); 800c19a: f002 fe25 bl 800ede8 } } 800c19e: bf00 nop 800c1a0: bd80 pop {r7, pc} 800c1a2: bf00 nop 800c1a4: e000e010 .word 0xe000e010 0800c1a8 : #endif /* SysTick */ /* Setup SVC to reset value. */ __STATIC_INLINE void SVC_Setup (void) { 800c1a8: b580 push {r7, lr} 800c1aa: af00 add r7, sp, #0 #if (__ARM_ARCH_7A__ == 0U) /* Service Call interrupt might be configured before kernel start */ /* and when its priority is lower or equal to BASEPRI, svc intruction */ /* causes a Hard Fault. */ NVIC_SetPriority (SVCall_IRQ_NBR, 0U); 800c1ac: 2100 movs r1, #0 800c1ae: f06f 0004 mvn.w r0, #4 800c1b2: f7ff ffbf bl 800c134 <__NVIC_SetPriority> #endif } 800c1b6: bf00 nop 800c1b8: bd80 pop {r7, pc} ... 0800c1bc : static uint32_t OS_Tick_GetOverflow (void); /* Get OS Tick interval */ static uint32_t OS_Tick_GetInterval (void); /*---------------------------------------------------------------------------*/ osStatus_t osKernelInitialize (void) { 800c1bc: b480 push {r7} 800c1be: b083 sub sp, #12 800c1c0: af00 add r7, sp, #0 __ASM volatile ("MRS %0, ipsr" : "=r" (result) ); 800c1c2: f3ef 8305 mrs r3, IPSR 800c1c6: 603b str r3, [r7, #0] return(result); 800c1c8: 683b ldr r3, [r7, #0] osStatus_t stat; if (IS_IRQ()) { 800c1ca: 2b00 cmp r3, #0 800c1cc: d003 beq.n 800c1d6 stat = osErrorISR; 800c1ce: f06f 0305 mvn.w r3, #5 800c1d2: 607b str r3, [r7, #4] 800c1d4: e00c b.n 800c1f0 } else { if (KernelState == osKernelInactive) { 800c1d6: 4b0a ldr r3, [pc, #40] @ (800c200 ) 800c1d8: 681b ldr r3, [r3, #0] 800c1da: 2b00 cmp r3, #0 800c1dc: d105 bne.n 800c1ea EvrFreeRTOSSetup(0U); #endif #if defined(USE_FreeRTOS_HEAP_5) && (HEAP_5_REGION_SETUP == 1) vPortDefineHeapRegions (configHEAP_5_REGIONS); #endif KernelState = osKernelReady; 800c1de: 4b08 ldr r3, [pc, #32] @ (800c200 ) 800c1e0: 2201 movs r2, #1 800c1e2: 601a str r2, [r3, #0] stat = osOK; 800c1e4: 2300 movs r3, #0 800c1e6: 607b str r3, [r7, #4] 800c1e8: e002 b.n 800c1f0 } else { stat = osError; 800c1ea: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff 800c1ee: 607b str r3, [r7, #4] } } return (stat); 800c1f0: 687b ldr r3, [r7, #4] } 800c1f2: 4618 mov r0, r3 800c1f4: 370c adds r7, #12 800c1f6: 46bd mov sp, r7 800c1f8: f85d 7b04 ldr.w r7, [sp], #4 800c1fc: 4770 bx lr 800c1fe: bf00 nop 800c200: 20001c5c .word 0x20001c5c 0800c204 : } return (state); } osStatus_t osKernelStart (void) { 800c204: b580 push {r7, lr} 800c206: b082 sub sp, #8 800c208: af00 add r7, sp, #0 __ASM volatile ("MRS %0, ipsr" : "=r" (result) ); 800c20a: f3ef 8305 mrs r3, IPSR 800c20e: 603b str r3, [r7, #0] return(result); 800c210: 683b ldr r3, [r7, #0] osStatus_t stat; if (IS_IRQ()) { 800c212: 2b00 cmp r3, #0 800c214: d003 beq.n 800c21e stat = osErrorISR; 800c216: f06f 0305 mvn.w r3, #5 800c21a: 607b str r3, [r7, #4] 800c21c: e010 b.n 800c240 } else { if (KernelState == osKernelReady) { 800c21e: 4b0b ldr r3, [pc, #44] @ (800c24c ) 800c220: 681b ldr r3, [r3, #0] 800c222: 2b01 cmp r3, #1 800c224: d109 bne.n 800c23a /* Ensure SVC priority is at the reset value */ SVC_Setup(); 800c226: f7ff ffbf bl 800c1a8 /* Change state to enable IRQ masking check */ KernelState = osKernelRunning; 800c22a: 4b08 ldr r3, [pc, #32] @ (800c24c ) 800c22c: 2202 movs r2, #2 800c22e: 601a str r2, [r3, #0] /* Start the kernel scheduler */ vTaskStartScheduler(); 800c230: f001 f98a bl 800d548 stat = osOK; 800c234: 2300 movs r3, #0 800c236: 607b str r3, [r7, #4] 800c238: e002 b.n 800c240 } else { stat = osError; 800c23a: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff 800c23e: 607b str r3, [r7, #4] } } return (stat); 800c240: 687b ldr r3, [r7, #4] } 800c242: 4618 mov r0, r3 800c244: 3708 adds r7, #8 800c246: 46bd mov sp, r7 800c248: bd80 pop {r7, pc} 800c24a: bf00 nop 800c24c: 20001c5c .word 0x20001c5c 0800c250 : /* vApplicationGetIdleTaskMemory gets called when configSUPPORT_STATIC_ALLOCATION equals to 1 and is required for static memory allocation support. */ __WEAK void vApplicationGetIdleTaskMemory (StaticTask_t **ppxIdleTaskTCBBuffer, StackType_t **ppxIdleTaskStackBuffer, uint32_t *pulIdleTaskStackSize) { 800c250: b480 push {r7} 800c252: b085 sub sp, #20 800c254: af00 add r7, sp, #0 800c256: 60f8 str r0, [r7, #12] 800c258: 60b9 str r1, [r7, #8] 800c25a: 607a str r2, [r7, #4] /* Idle task control block and stack */ static StaticTask_t Idle_TCB; static StackType_t Idle_Stack[configMINIMAL_STACK_SIZE]; *ppxIdleTaskTCBBuffer = &Idle_TCB; 800c25c: 68fb ldr r3, [r7, #12] 800c25e: 4a07 ldr r2, [pc, #28] @ (800c27c ) 800c260: 601a str r2, [r3, #0] *ppxIdleTaskStackBuffer = &Idle_Stack[0]; 800c262: 68bb ldr r3, [r7, #8] 800c264: 4a06 ldr r2, [pc, #24] @ (800c280 ) 800c266: 601a str r2, [r3, #0] *pulIdleTaskStackSize = (uint32_t)configMINIMAL_STACK_SIZE; 800c268: 687b ldr r3, [r7, #4] 800c26a: 2280 movs r2, #128 @ 0x80 800c26c: 601a str r2, [r3, #0] } 800c26e: bf00 nop 800c270: 3714 adds r7, #20 800c272: 46bd mov sp, r7 800c274: f85d 7b04 ldr.w r7, [sp], #4 800c278: 4770 bx lr 800c27a: bf00 nop 800c27c: 20001c60 .word 0x20001c60 800c280: 20001cbc .word 0x20001cbc 0800c284 : /* vApplicationGetTimerTaskMemory gets called when configSUPPORT_STATIC_ALLOCATION equals to 1 and is required for static memory allocation support. */ __WEAK void vApplicationGetTimerTaskMemory (StaticTask_t **ppxTimerTaskTCBBuffer, StackType_t **ppxTimerTaskStackBuffer, uint32_t *pulTimerTaskStackSize) { 800c284: b480 push {r7} 800c286: b085 sub sp, #20 800c288: af00 add r7, sp, #0 800c28a: 60f8 str r0, [r7, #12] 800c28c: 60b9 str r1, [r7, #8] 800c28e: 607a str r2, [r7, #4] /* Timer task control block and stack */ static StaticTask_t Timer_TCB; static StackType_t Timer_Stack[configTIMER_TASK_STACK_DEPTH]; *ppxTimerTaskTCBBuffer = &Timer_TCB; 800c290: 68fb ldr r3, [r7, #12] 800c292: 4a07 ldr r2, [pc, #28] @ (800c2b0 ) 800c294: 601a str r2, [r3, #0] *ppxTimerTaskStackBuffer = &Timer_Stack[0]; 800c296: 68bb ldr r3, [r7, #8] 800c298: 4a06 ldr r2, [pc, #24] @ (800c2b4 ) 800c29a: 601a str r2, [r3, #0] *pulTimerTaskStackSize = (uint32_t)configTIMER_TASK_STACK_DEPTH; 800c29c: 687b ldr r3, [r7, #4] 800c29e: f44f 7280 mov.w r2, #256 @ 0x100 800c2a2: 601a str r2, [r3, #0] } 800c2a4: bf00 nop 800c2a6: 3714 adds r7, #20 800c2a8: 46bd mov sp, r7 800c2aa: f85d 7b04 ldr.w r7, [sp], #4 800c2ae: 4770 bx lr 800c2b0: 20001ebc .word 0x20001ebc 800c2b4: 20001f18 .word 0x20001f18 0800c2b8 : /*----------------------------------------------------------- * PUBLIC LIST API documented in list.h *----------------------------------------------------------*/ void vListInitialise( List_t * const pxList ) { 800c2b8: b480 push {r7} 800c2ba: b083 sub sp, #12 800c2bc: af00 add r7, sp, #0 800c2be: 6078 str r0, [r7, #4] /* The list structure contains a list item which is used to mark the end of the list. To initialise the list the list end is inserted as the only list entry. */ pxList->pxIndex = ( ListItem_t * ) &( pxList->xListEnd ); /*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM. This is checked and valid. */ 800c2c0: 687b ldr r3, [r7, #4] 800c2c2: f103 0208 add.w r2, r3, #8 800c2c6: 687b ldr r3, [r7, #4] 800c2c8: 605a str r2, [r3, #4] /* The list end value is the highest possible value in the list to ensure it remains at the end of the list. */ pxList->xListEnd.xItemValue = portMAX_DELAY; 800c2ca: 687b ldr r3, [r7, #4] 800c2cc: f04f 32ff mov.w r2, #4294967295 @ 0xffffffff 800c2d0: 609a str r2, [r3, #8] /* The list end next and previous pointers point to itself so we know when the list is empty. */ pxList->xListEnd.pxNext = ( ListItem_t * ) &( pxList->xListEnd ); /*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM. This is checked and valid. */ 800c2d2: 687b ldr r3, [r7, #4] 800c2d4: f103 0208 add.w r2, r3, #8 800c2d8: 687b ldr r3, [r7, #4] 800c2da: 60da str r2, [r3, #12] pxList->xListEnd.pxPrevious = ( ListItem_t * ) &( pxList->xListEnd );/*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM. This is checked and valid. */ 800c2dc: 687b ldr r3, [r7, #4] 800c2de: f103 0208 add.w r2, r3, #8 800c2e2: 687b ldr r3, [r7, #4] 800c2e4: 611a str r2, [r3, #16] pxList->uxNumberOfItems = ( UBaseType_t ) 0U; 800c2e6: 687b ldr r3, [r7, #4] 800c2e8: 2200 movs r2, #0 800c2ea: 601a str r2, [r3, #0] /* Write known values into the list if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */ listSET_LIST_INTEGRITY_CHECK_1_VALUE( pxList ); listSET_LIST_INTEGRITY_CHECK_2_VALUE( pxList ); } 800c2ec: bf00 nop 800c2ee: 370c adds r7, #12 800c2f0: 46bd mov sp, r7 800c2f2: f85d 7b04 ldr.w r7, [sp], #4 800c2f6: 4770 bx lr 0800c2f8 : /*-----------------------------------------------------------*/ void vListInitialiseItem( ListItem_t * const pxItem ) { 800c2f8: b480 push {r7} 800c2fa: b083 sub sp, #12 800c2fc: af00 add r7, sp, #0 800c2fe: 6078 str r0, [r7, #4] /* Make sure the list item is not recorded as being on a list. */ pxItem->pxContainer = NULL; 800c300: 687b ldr r3, [r7, #4] 800c302: 2200 movs r2, #0 800c304: 611a str r2, [r3, #16] /* Write known values into the list item if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */ listSET_FIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem ); listSET_SECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem ); } 800c306: bf00 nop 800c308: 370c adds r7, #12 800c30a: 46bd mov sp, r7 800c30c: f85d 7b04 ldr.w r7, [sp], #4 800c310: 4770 bx lr 0800c312 : /*-----------------------------------------------------------*/ void vListInsertEnd( List_t * const pxList, ListItem_t * const pxNewListItem ) { 800c312: b480 push {r7} 800c314: b085 sub sp, #20 800c316: af00 add r7, sp, #0 800c318: 6078 str r0, [r7, #4] 800c31a: 6039 str r1, [r7, #0] ListItem_t * const pxIndex = pxList->pxIndex; 800c31c: 687b ldr r3, [r7, #4] 800c31e: 685b ldr r3, [r3, #4] 800c320: 60fb str r3, [r7, #12] listTEST_LIST_ITEM_INTEGRITY( pxNewListItem ); /* Insert a new list item into pxList, but rather than sort the list, makes the new list item the last item to be removed by a call to listGET_OWNER_OF_NEXT_ENTRY(). */ pxNewListItem->pxNext = pxIndex; 800c322: 683b ldr r3, [r7, #0] 800c324: 68fa ldr r2, [r7, #12] 800c326: 605a str r2, [r3, #4] pxNewListItem->pxPrevious = pxIndex->pxPrevious; 800c328: 68fb ldr r3, [r7, #12] 800c32a: 689a ldr r2, [r3, #8] 800c32c: 683b ldr r3, [r7, #0] 800c32e: 609a str r2, [r3, #8] /* Only used during decision coverage testing. */ mtCOVERAGE_TEST_DELAY(); pxIndex->pxPrevious->pxNext = pxNewListItem; 800c330: 68fb ldr r3, [r7, #12] 800c332: 689b ldr r3, [r3, #8] 800c334: 683a ldr r2, [r7, #0] 800c336: 605a str r2, [r3, #4] pxIndex->pxPrevious = pxNewListItem; 800c338: 68fb ldr r3, [r7, #12] 800c33a: 683a ldr r2, [r7, #0] 800c33c: 609a str r2, [r3, #8] /* Remember which list the item is in. */ pxNewListItem->pxContainer = pxList; 800c33e: 683b ldr r3, [r7, #0] 800c340: 687a ldr r2, [r7, #4] 800c342: 611a str r2, [r3, #16] ( pxList->uxNumberOfItems )++; 800c344: 687b ldr r3, [r7, #4] 800c346: 681b ldr r3, [r3, #0] 800c348: 1c5a adds r2, r3, #1 800c34a: 687b ldr r3, [r7, #4] 800c34c: 601a str r2, [r3, #0] } 800c34e: bf00 nop 800c350: 3714 adds r7, #20 800c352: 46bd mov sp, r7 800c354: f85d 7b04 ldr.w r7, [sp], #4 800c358: 4770 bx lr 0800c35a : /*-----------------------------------------------------------*/ void vListInsert( List_t * const pxList, ListItem_t * const pxNewListItem ) { 800c35a: b480 push {r7} 800c35c: b085 sub sp, #20 800c35e: af00 add r7, sp, #0 800c360: 6078 str r0, [r7, #4] 800c362: 6039 str r1, [r7, #0] ListItem_t *pxIterator; const TickType_t xValueOfInsertion = pxNewListItem->xItemValue; 800c364: 683b ldr r3, [r7, #0] 800c366: 681b ldr r3, [r3, #0] 800c368: 60bb str r3, [r7, #8] new list item should be placed after it. This ensures that TCBs which are stored in ready lists (all of which have the same xItemValue value) get a share of the CPU. However, if the xItemValue is the same as the back marker the iteration loop below will not end. Therefore the value is checked first, and the algorithm slightly modified if necessary. */ if( xValueOfInsertion == portMAX_DELAY ) 800c36a: 68bb ldr r3, [r7, #8] 800c36c: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff 800c370: d103 bne.n 800c37a { pxIterator = pxList->xListEnd.pxPrevious; 800c372: 687b ldr r3, [r7, #4] 800c374: 691b ldr r3, [r3, #16] 800c376: 60fb str r3, [r7, #12] 800c378: e00c b.n 800c394 4) Using a queue or semaphore before it has been initialised or before the scheduler has been started (are interrupts firing before vTaskStartScheduler() has been called?). **********************************************************************/ for( pxIterator = ( ListItem_t * ) &( pxList->xListEnd ); pxIterator->pxNext->xItemValue <= xValueOfInsertion; pxIterator = pxIterator->pxNext ) /*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM. This is checked and valid. *//*lint !e440 The iterator moves to a different value, not xValueOfInsertion. */ 800c37a: 687b ldr r3, [r7, #4] 800c37c: 3308 adds r3, #8 800c37e: 60fb str r3, [r7, #12] 800c380: e002 b.n 800c388 800c382: 68fb ldr r3, [r7, #12] 800c384: 685b ldr r3, [r3, #4] 800c386: 60fb str r3, [r7, #12] 800c388: 68fb ldr r3, [r7, #12] 800c38a: 685b ldr r3, [r3, #4] 800c38c: 681b ldr r3, [r3, #0] 800c38e: 68ba ldr r2, [r7, #8] 800c390: 429a cmp r2, r3 800c392: d2f6 bcs.n 800c382 /* There is nothing to do here, just iterating to the wanted insertion position. */ } } pxNewListItem->pxNext = pxIterator->pxNext; 800c394: 68fb ldr r3, [r7, #12] 800c396: 685a ldr r2, [r3, #4] 800c398: 683b ldr r3, [r7, #0] 800c39a: 605a str r2, [r3, #4] pxNewListItem->pxNext->pxPrevious = pxNewListItem; 800c39c: 683b ldr r3, [r7, #0] 800c39e: 685b ldr r3, [r3, #4] 800c3a0: 683a ldr r2, [r7, #0] 800c3a2: 609a str r2, [r3, #8] pxNewListItem->pxPrevious = pxIterator; 800c3a4: 683b ldr r3, [r7, #0] 800c3a6: 68fa ldr r2, [r7, #12] 800c3a8: 609a str r2, [r3, #8] pxIterator->pxNext = pxNewListItem; 800c3aa: 68fb ldr r3, [r7, #12] 800c3ac: 683a ldr r2, [r7, #0] 800c3ae: 605a str r2, [r3, #4] /* Remember which list the item is in. This allows fast removal of the item later. */ pxNewListItem->pxContainer = pxList; 800c3b0: 683b ldr r3, [r7, #0] 800c3b2: 687a ldr r2, [r7, #4] 800c3b4: 611a str r2, [r3, #16] ( pxList->uxNumberOfItems )++; 800c3b6: 687b ldr r3, [r7, #4] 800c3b8: 681b ldr r3, [r3, #0] 800c3ba: 1c5a adds r2, r3, #1 800c3bc: 687b ldr r3, [r7, #4] 800c3be: 601a str r2, [r3, #0] } 800c3c0: bf00 nop 800c3c2: 3714 adds r7, #20 800c3c4: 46bd mov sp, r7 800c3c6: f85d 7b04 ldr.w r7, [sp], #4 800c3ca: 4770 bx lr 0800c3cc : /*-----------------------------------------------------------*/ UBaseType_t uxListRemove( ListItem_t * const pxItemToRemove ) { 800c3cc: b480 push {r7} 800c3ce: b085 sub sp, #20 800c3d0: af00 add r7, sp, #0 800c3d2: 6078 str r0, [r7, #4] /* The list item knows which list it is in. Obtain the list from the list item. */ List_t * const pxList = pxItemToRemove->pxContainer; 800c3d4: 687b ldr r3, [r7, #4] 800c3d6: 691b ldr r3, [r3, #16] 800c3d8: 60fb str r3, [r7, #12] pxItemToRemove->pxNext->pxPrevious = pxItemToRemove->pxPrevious; 800c3da: 687b ldr r3, [r7, #4] 800c3dc: 685b ldr r3, [r3, #4] 800c3de: 687a ldr r2, [r7, #4] 800c3e0: 6892 ldr r2, [r2, #8] 800c3e2: 609a str r2, [r3, #8] pxItemToRemove->pxPrevious->pxNext = pxItemToRemove->pxNext; 800c3e4: 687b ldr r3, [r7, #4] 800c3e6: 689b ldr r3, [r3, #8] 800c3e8: 687a ldr r2, [r7, #4] 800c3ea: 6852 ldr r2, [r2, #4] 800c3ec: 605a str r2, [r3, #4] /* Only used during decision coverage testing. */ mtCOVERAGE_TEST_DELAY(); /* Make sure the index is left pointing to a valid item. */ if( pxList->pxIndex == pxItemToRemove ) 800c3ee: 68fb ldr r3, [r7, #12] 800c3f0: 685b ldr r3, [r3, #4] 800c3f2: 687a ldr r2, [r7, #4] 800c3f4: 429a cmp r2, r3 800c3f6: d103 bne.n 800c400 { pxList->pxIndex = pxItemToRemove->pxPrevious; 800c3f8: 687b ldr r3, [r7, #4] 800c3fa: 689a ldr r2, [r3, #8] 800c3fc: 68fb ldr r3, [r7, #12] 800c3fe: 605a str r2, [r3, #4] else { mtCOVERAGE_TEST_MARKER(); } pxItemToRemove->pxContainer = NULL; 800c400: 687b ldr r3, [r7, #4] 800c402: 2200 movs r2, #0 800c404: 611a str r2, [r3, #16] ( pxList->uxNumberOfItems )--; 800c406: 68fb ldr r3, [r7, #12] 800c408: 681b ldr r3, [r3, #0] 800c40a: 1e5a subs r2, r3, #1 800c40c: 68fb ldr r3, [r7, #12] 800c40e: 601a str r2, [r3, #0] return pxList->uxNumberOfItems; 800c410: 68fb ldr r3, [r7, #12] 800c412: 681b ldr r3, [r3, #0] } 800c414: 4618 mov r0, r3 800c416: 3714 adds r7, #20 800c418: 46bd mov sp, r7 800c41a: f85d 7b04 ldr.w r7, [sp], #4 800c41e: 4770 bx lr 0800c420 : } \ taskEXIT_CRITICAL() /*-----------------------------------------------------------*/ BaseType_t xQueueGenericReset( QueueHandle_t xQueue, BaseType_t xNewQueue ) { 800c420: b580 push {r7, lr} 800c422: b084 sub sp, #16 800c424: af00 add r7, sp, #0 800c426: 6078 str r0, [r7, #4] 800c428: 6039 str r1, [r7, #0] Queue_t * const pxQueue = xQueue; 800c42a: 687b ldr r3, [r7, #4] 800c42c: 60fb str r3, [r7, #12] configASSERT( pxQueue ); 800c42e: 68fb ldr r3, [r7, #12] 800c430: 2b00 cmp r3, #0 800c432: d10b bne.n 800c44c portFORCE_INLINE static void vPortRaiseBASEPRI( void ) { uint32_t ulNewBASEPRI; __asm volatile 800c434: f04f 0350 mov.w r3, #80 @ 0x50 800c438: f383 8811 msr BASEPRI, r3 800c43c: f3bf 8f6f isb sy 800c440: f3bf 8f4f dsb sy 800c444: 60bb str r3, [r7, #8] " msr basepri, %0 \n" \ " isb \n" \ " dsb \n" \ :"=r" (ulNewBASEPRI) : "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory" ); } 800c446: bf00 nop 800c448: bf00 nop 800c44a: e7fd b.n 800c448 taskENTER_CRITICAL(); 800c44c: f002 fc3c bl 800ecc8 { pxQueue->u.xQueue.pcTail = pxQueue->pcHead + ( pxQueue->uxLength * pxQueue->uxItemSize ); /*lint !e9016 Pointer arithmetic allowed on char types, especially when it assists conveying intent. */ 800c450: 68fb ldr r3, [r7, #12] 800c452: 681a ldr r2, [r3, #0] 800c454: 68fb ldr r3, [r7, #12] 800c456: 6bdb ldr r3, [r3, #60] @ 0x3c 800c458: 68f9 ldr r1, [r7, #12] 800c45a: 6c09 ldr r1, [r1, #64] @ 0x40 800c45c: fb01 f303 mul.w r3, r1, r3 800c460: 441a add r2, r3 800c462: 68fb ldr r3, [r7, #12] 800c464: 609a str r2, [r3, #8] pxQueue->uxMessagesWaiting = ( UBaseType_t ) 0U; 800c466: 68fb ldr r3, [r7, #12] 800c468: 2200 movs r2, #0 800c46a: 639a str r2, [r3, #56] @ 0x38 pxQueue->pcWriteTo = pxQueue->pcHead; 800c46c: 68fb ldr r3, [r7, #12] 800c46e: 681a ldr r2, [r3, #0] 800c470: 68fb ldr r3, [r7, #12] 800c472: 605a str r2, [r3, #4] pxQueue->u.xQueue.pcReadFrom = pxQueue->pcHead + ( ( pxQueue->uxLength - 1U ) * pxQueue->uxItemSize ); /*lint !e9016 Pointer arithmetic allowed on char types, especially when it assists conveying intent. */ 800c474: 68fb ldr r3, [r7, #12] 800c476: 681a ldr r2, [r3, #0] 800c478: 68fb ldr r3, [r7, #12] 800c47a: 6bdb ldr r3, [r3, #60] @ 0x3c 800c47c: 3b01 subs r3, #1 800c47e: 68f9 ldr r1, [r7, #12] 800c480: 6c09 ldr r1, [r1, #64] @ 0x40 800c482: fb01 f303 mul.w r3, r1, r3 800c486: 441a add r2, r3 800c488: 68fb ldr r3, [r7, #12] 800c48a: 60da str r2, [r3, #12] pxQueue->cRxLock = queueUNLOCKED; 800c48c: 68fb ldr r3, [r7, #12] 800c48e: 22ff movs r2, #255 @ 0xff 800c490: f883 2044 strb.w r2, [r3, #68] @ 0x44 pxQueue->cTxLock = queueUNLOCKED; 800c494: 68fb ldr r3, [r7, #12] 800c496: 22ff movs r2, #255 @ 0xff 800c498: f883 2045 strb.w r2, [r3, #69] @ 0x45 if( xNewQueue == pdFALSE ) 800c49c: 683b ldr r3, [r7, #0] 800c49e: 2b00 cmp r3, #0 800c4a0: d114 bne.n 800c4cc /* If there are tasks blocked waiting to read from the queue, then the tasks will remain blocked as after this function exits the queue will still be empty. If there are tasks blocked waiting to write to the queue, then one should be unblocked as after this function exits it will be possible to write to it. */ if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE ) 800c4a2: 68fb ldr r3, [r7, #12] 800c4a4: 691b ldr r3, [r3, #16] 800c4a6: 2b00 cmp r3, #0 800c4a8: d01a beq.n 800c4e0 { if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE ) 800c4aa: 68fb ldr r3, [r7, #12] 800c4ac: 3310 adds r3, #16 800c4ae: 4618 mov r0, r3 800c4b0: f001 fad8 bl 800da64 800c4b4: 4603 mov r3, r0 800c4b6: 2b00 cmp r3, #0 800c4b8: d012 beq.n 800c4e0 { queueYIELD_IF_USING_PREEMPTION(); 800c4ba: 4b0d ldr r3, [pc, #52] @ (800c4f0 ) 800c4bc: f04f 5280 mov.w r2, #268435456 @ 0x10000000 800c4c0: 601a str r2, [r3, #0] 800c4c2: f3bf 8f4f dsb sy 800c4c6: f3bf 8f6f isb sy 800c4ca: e009 b.n 800c4e0 } } else { /* Ensure the event queues start in the correct state. */ vListInitialise( &( pxQueue->xTasksWaitingToSend ) ); 800c4cc: 68fb ldr r3, [r7, #12] 800c4ce: 3310 adds r3, #16 800c4d0: 4618 mov r0, r3 800c4d2: f7ff fef1 bl 800c2b8 vListInitialise( &( pxQueue->xTasksWaitingToReceive ) ); 800c4d6: 68fb ldr r3, [r7, #12] 800c4d8: 3324 adds r3, #36 @ 0x24 800c4da: 4618 mov r0, r3 800c4dc: f7ff feec bl 800c2b8 } } taskEXIT_CRITICAL(); 800c4e0: f002 fc24 bl 800ed2c /* A value is returned for calling semantic consistency with previous versions. */ return pdPASS; 800c4e4: 2301 movs r3, #1 } 800c4e6: 4618 mov r0, r3 800c4e8: 3710 adds r7, #16 800c4ea: 46bd mov sp, r7 800c4ec: bd80 pop {r7, pc} 800c4ee: bf00 nop 800c4f0: e000ed04 .word 0xe000ed04 0800c4f4 : /*-----------------------------------------------------------*/ #if( configSUPPORT_STATIC_ALLOCATION == 1 ) QueueHandle_t xQueueGenericCreateStatic( const UBaseType_t uxQueueLength, const UBaseType_t uxItemSize, uint8_t *pucQueueStorage, StaticQueue_t *pxStaticQueue, const uint8_t ucQueueType ) { 800c4f4: b580 push {r7, lr} 800c4f6: b08e sub sp, #56 @ 0x38 800c4f8: af02 add r7, sp, #8 800c4fa: 60f8 str r0, [r7, #12] 800c4fc: 60b9 str r1, [r7, #8] 800c4fe: 607a str r2, [r7, #4] 800c500: 603b str r3, [r7, #0] Queue_t *pxNewQueue; configASSERT( uxQueueLength > ( UBaseType_t ) 0 ); 800c502: 68fb ldr r3, [r7, #12] 800c504: 2b00 cmp r3, #0 800c506: d10b bne.n 800c520 __asm volatile 800c508: f04f 0350 mov.w r3, #80 @ 0x50 800c50c: f383 8811 msr BASEPRI, r3 800c510: f3bf 8f6f isb sy 800c514: f3bf 8f4f dsb sy 800c518: 62bb str r3, [r7, #40] @ 0x28 } 800c51a: bf00 nop 800c51c: bf00 nop 800c51e: e7fd b.n 800c51c /* The StaticQueue_t structure and the queue storage area must be supplied. */ configASSERT( pxStaticQueue != NULL ); 800c520: 683b ldr r3, [r7, #0] 800c522: 2b00 cmp r3, #0 800c524: d10b bne.n 800c53e __asm volatile 800c526: f04f 0350 mov.w r3, #80 @ 0x50 800c52a: f383 8811 msr BASEPRI, r3 800c52e: f3bf 8f6f isb sy 800c532: f3bf 8f4f dsb sy 800c536: 627b str r3, [r7, #36] @ 0x24 } 800c538: bf00 nop 800c53a: bf00 nop 800c53c: e7fd b.n 800c53a /* A queue storage area should be provided if the item size is not 0, and should not be provided if the item size is 0. */ configASSERT( !( ( pucQueueStorage != NULL ) && ( uxItemSize == 0 ) ) ); 800c53e: 687b ldr r3, [r7, #4] 800c540: 2b00 cmp r3, #0 800c542: d002 beq.n 800c54a 800c544: 68bb ldr r3, [r7, #8] 800c546: 2b00 cmp r3, #0 800c548: d001 beq.n 800c54e 800c54a: 2301 movs r3, #1 800c54c: e000 b.n 800c550 800c54e: 2300 movs r3, #0 800c550: 2b00 cmp r3, #0 800c552: d10b bne.n 800c56c __asm volatile 800c554: f04f 0350 mov.w r3, #80 @ 0x50 800c558: f383 8811 msr BASEPRI, r3 800c55c: f3bf 8f6f isb sy 800c560: f3bf 8f4f dsb sy 800c564: 623b str r3, [r7, #32] } 800c566: bf00 nop 800c568: bf00 nop 800c56a: e7fd b.n 800c568 configASSERT( !( ( pucQueueStorage == NULL ) && ( uxItemSize != 0 ) ) ); 800c56c: 687b ldr r3, [r7, #4] 800c56e: 2b00 cmp r3, #0 800c570: d102 bne.n 800c578 800c572: 68bb ldr r3, [r7, #8] 800c574: 2b00 cmp r3, #0 800c576: d101 bne.n 800c57c 800c578: 2301 movs r3, #1 800c57a: e000 b.n 800c57e 800c57c: 2300 movs r3, #0 800c57e: 2b00 cmp r3, #0 800c580: d10b bne.n 800c59a __asm volatile 800c582: f04f 0350 mov.w r3, #80 @ 0x50 800c586: f383 8811 msr BASEPRI, r3 800c58a: f3bf 8f6f isb sy 800c58e: f3bf 8f4f dsb sy 800c592: 61fb str r3, [r7, #28] } 800c594: bf00 nop 800c596: bf00 nop 800c598: e7fd b.n 800c596 #if( configASSERT_DEFINED == 1 ) { /* Sanity check that the size of the structure used to declare a variable of type StaticQueue_t or StaticSemaphore_t equals the size of the real queue and semaphore structures. */ volatile size_t xSize = sizeof( StaticQueue_t ); 800c59a: 2350 movs r3, #80 @ 0x50 800c59c: 617b str r3, [r7, #20] configASSERT( xSize == sizeof( Queue_t ) ); 800c59e: 697b ldr r3, [r7, #20] 800c5a0: 2b50 cmp r3, #80 @ 0x50 800c5a2: d00b beq.n 800c5bc __asm volatile 800c5a4: f04f 0350 mov.w r3, #80 @ 0x50 800c5a8: f383 8811 msr BASEPRI, r3 800c5ac: f3bf 8f6f isb sy 800c5b0: f3bf 8f4f dsb sy 800c5b4: 61bb str r3, [r7, #24] } 800c5b6: bf00 nop 800c5b8: bf00 nop 800c5ba: e7fd b.n 800c5b8 ( void ) xSize; /* Keeps lint quiet when configASSERT() is not defined. */ 800c5bc: 697b ldr r3, [r7, #20] #endif /* configASSERT_DEFINED */ /* The address of a statically allocated queue was passed in, use it. The address of a statically allocated storage area was also passed in but is already set. */ pxNewQueue = ( Queue_t * ) pxStaticQueue; /*lint !e740 !e9087 Unusual cast is ok as the structures are designed to have the same alignment, and the size is checked by an assert. */ 800c5be: 683b ldr r3, [r7, #0] 800c5c0: 62fb str r3, [r7, #44] @ 0x2c if( pxNewQueue != NULL ) 800c5c2: 6afb ldr r3, [r7, #44] @ 0x2c 800c5c4: 2b00 cmp r3, #0 800c5c6: d00d beq.n 800c5e4 #if( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) { /* Queues can be allocated wither statically or dynamically, so note this queue was allocated statically in case the queue is later deleted. */ pxNewQueue->ucStaticallyAllocated = pdTRUE; 800c5c8: 6afb ldr r3, [r7, #44] @ 0x2c 800c5ca: 2201 movs r2, #1 800c5cc: f883 2046 strb.w r2, [r3, #70] @ 0x46 } #endif /* configSUPPORT_DYNAMIC_ALLOCATION */ prvInitialiseNewQueue( uxQueueLength, uxItemSize, pucQueueStorage, ucQueueType, pxNewQueue ); 800c5d0: f897 2038 ldrb.w r2, [r7, #56] @ 0x38 800c5d4: 6afb ldr r3, [r7, #44] @ 0x2c 800c5d6: 9300 str r3, [sp, #0] 800c5d8: 4613 mov r3, r2 800c5da: 687a ldr r2, [r7, #4] 800c5dc: 68b9 ldr r1, [r7, #8] 800c5de: 68f8 ldr r0, [r7, #12] 800c5e0: f000 f840 bl 800c664 { traceQUEUE_CREATE_FAILED( ucQueueType ); mtCOVERAGE_TEST_MARKER(); } return pxNewQueue; 800c5e4: 6afb ldr r3, [r7, #44] @ 0x2c } 800c5e6: 4618 mov r0, r3 800c5e8: 3730 adds r7, #48 @ 0x30 800c5ea: 46bd mov sp, r7 800c5ec: bd80 pop {r7, pc} 0800c5ee : /*-----------------------------------------------------------*/ #if( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) QueueHandle_t xQueueGenericCreate( const UBaseType_t uxQueueLength, const UBaseType_t uxItemSize, const uint8_t ucQueueType ) { 800c5ee: b580 push {r7, lr} 800c5f0: b08a sub sp, #40 @ 0x28 800c5f2: af02 add r7, sp, #8 800c5f4: 60f8 str r0, [r7, #12] 800c5f6: 60b9 str r1, [r7, #8] 800c5f8: 4613 mov r3, r2 800c5fa: 71fb strb r3, [r7, #7] Queue_t *pxNewQueue; size_t xQueueSizeInBytes; uint8_t *pucQueueStorage; configASSERT( uxQueueLength > ( UBaseType_t ) 0 ); 800c5fc: 68fb ldr r3, [r7, #12] 800c5fe: 2b00 cmp r3, #0 800c600: d10b bne.n 800c61a __asm volatile 800c602: f04f 0350 mov.w r3, #80 @ 0x50 800c606: f383 8811 msr BASEPRI, r3 800c60a: f3bf 8f6f isb sy 800c60e: f3bf 8f4f dsb sy 800c612: 613b str r3, [r7, #16] } 800c614: bf00 nop 800c616: bf00 nop 800c618: e7fd b.n 800c616 /* Allocate enough space to hold the maximum number of items that can be in the queue at any time. It is valid for uxItemSize to be zero in the case the queue is used as a semaphore. */ xQueueSizeInBytes = ( size_t ) ( uxQueueLength * uxItemSize ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */ 800c61a: 68fb ldr r3, [r7, #12] 800c61c: 68ba ldr r2, [r7, #8] 800c61e: fb02 f303 mul.w r3, r2, r3 800c622: 61fb str r3, [r7, #28] alignment requirements of the Queue_t structure - which in this case is an int8_t *. Therefore, whenever the stack alignment requirements are greater than or equal to the pointer to char requirements the cast is safe. In other cases alignment requirements are not strict (one or two bytes). */ pxNewQueue = ( Queue_t * ) pvPortMalloc( sizeof( Queue_t ) + xQueueSizeInBytes ); /*lint !e9087 !e9079 see comment above. */ 800c624: 69fb ldr r3, [r7, #28] 800c626: 3350 adds r3, #80 @ 0x50 800c628: 4618 mov r0, r3 800c62a: f002 fc6f bl 800ef0c 800c62e: 61b8 str r0, [r7, #24] if( pxNewQueue != NULL ) 800c630: 69bb ldr r3, [r7, #24] 800c632: 2b00 cmp r3, #0 800c634: d011 beq.n 800c65a { /* Jump past the queue structure to find the location of the queue storage area. */ pucQueueStorage = ( uint8_t * ) pxNewQueue; 800c636: 69bb ldr r3, [r7, #24] 800c638: 617b str r3, [r7, #20] pucQueueStorage += sizeof( Queue_t ); /*lint !e9016 Pointer arithmetic allowed on char types, especially when it assists conveying intent. */ 800c63a: 697b ldr r3, [r7, #20] 800c63c: 3350 adds r3, #80 @ 0x50 800c63e: 617b str r3, [r7, #20] #if( configSUPPORT_STATIC_ALLOCATION == 1 ) { /* Queues can be created either statically or dynamically, so note this task was created dynamically in case it is later deleted. */ pxNewQueue->ucStaticallyAllocated = pdFALSE; 800c640: 69bb ldr r3, [r7, #24] 800c642: 2200 movs r2, #0 800c644: f883 2046 strb.w r2, [r3, #70] @ 0x46 } #endif /* configSUPPORT_STATIC_ALLOCATION */ prvInitialiseNewQueue( uxQueueLength, uxItemSize, pucQueueStorage, ucQueueType, pxNewQueue ); 800c648: 79fa ldrb r2, [r7, #7] 800c64a: 69bb ldr r3, [r7, #24] 800c64c: 9300 str r3, [sp, #0] 800c64e: 4613 mov r3, r2 800c650: 697a ldr r2, [r7, #20] 800c652: 68b9 ldr r1, [r7, #8] 800c654: 68f8 ldr r0, [r7, #12] 800c656: f000 f805 bl 800c664 { traceQUEUE_CREATE_FAILED( ucQueueType ); mtCOVERAGE_TEST_MARKER(); } return pxNewQueue; 800c65a: 69bb ldr r3, [r7, #24] } 800c65c: 4618 mov r0, r3 800c65e: 3720 adds r7, #32 800c660: 46bd mov sp, r7 800c662: bd80 pop {r7, pc} 0800c664 : #endif /* configSUPPORT_STATIC_ALLOCATION */ /*-----------------------------------------------------------*/ static void prvInitialiseNewQueue( const UBaseType_t uxQueueLength, const UBaseType_t uxItemSize, uint8_t *pucQueueStorage, const uint8_t ucQueueType, Queue_t *pxNewQueue ) { 800c664: b580 push {r7, lr} 800c666: b084 sub sp, #16 800c668: af00 add r7, sp, #0 800c66a: 60f8 str r0, [r7, #12] 800c66c: 60b9 str r1, [r7, #8] 800c66e: 607a str r2, [r7, #4] 800c670: 70fb strb r3, [r7, #3] /* Remove compiler warnings about unused parameters should configUSE_TRACE_FACILITY not be set to 1. */ ( void ) ucQueueType; if( uxItemSize == ( UBaseType_t ) 0 ) 800c672: 68bb ldr r3, [r7, #8] 800c674: 2b00 cmp r3, #0 800c676: d103 bne.n 800c680 { /* No RAM was allocated for the queue storage area, but PC head cannot be set to NULL because NULL is used as a key to say the queue is used as a mutex. Therefore just set pcHead to point to the queue as a benign value that is known to be within the memory map. */ pxNewQueue->pcHead = ( int8_t * ) pxNewQueue; 800c678: 69bb ldr r3, [r7, #24] 800c67a: 69ba ldr r2, [r7, #24] 800c67c: 601a str r2, [r3, #0] 800c67e: e002 b.n 800c686 } else { /* Set the head to the start of the queue storage area. */ pxNewQueue->pcHead = ( int8_t * ) pucQueueStorage; 800c680: 69bb ldr r3, [r7, #24] 800c682: 687a ldr r2, [r7, #4] 800c684: 601a str r2, [r3, #0] } /* Initialise the queue members as described where the queue type is defined. */ pxNewQueue->uxLength = uxQueueLength; 800c686: 69bb ldr r3, [r7, #24] 800c688: 68fa ldr r2, [r7, #12] 800c68a: 63da str r2, [r3, #60] @ 0x3c pxNewQueue->uxItemSize = uxItemSize; 800c68c: 69bb ldr r3, [r7, #24] 800c68e: 68ba ldr r2, [r7, #8] 800c690: 641a str r2, [r3, #64] @ 0x40 ( void ) xQueueGenericReset( pxNewQueue, pdTRUE ); 800c692: 2101 movs r1, #1 800c694: 69b8 ldr r0, [r7, #24] 800c696: f7ff fec3 bl 800c420 #if ( configUSE_TRACE_FACILITY == 1 ) { pxNewQueue->ucQueueType = ucQueueType; 800c69a: 69bb ldr r3, [r7, #24] 800c69c: 78fa ldrb r2, [r7, #3] 800c69e: f883 204c strb.w r2, [r3, #76] @ 0x4c pxNewQueue->pxQueueSetContainer = NULL; } #endif /* configUSE_QUEUE_SETS */ traceQUEUE_CREATE( pxNewQueue ); } 800c6a2: bf00 nop 800c6a4: 3710 adds r7, #16 800c6a6: 46bd mov sp, r7 800c6a8: bd80 pop {r7, pc} ... 0800c6ac : #endif /* ( ( configUSE_COUNTING_SEMAPHORES == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) ) */ /*-----------------------------------------------------------*/ BaseType_t xQueueGenericSend( QueueHandle_t xQueue, const void * const pvItemToQueue, TickType_t xTicksToWait, const BaseType_t xCopyPosition ) { 800c6ac: b580 push {r7, lr} 800c6ae: b08e sub sp, #56 @ 0x38 800c6b0: af00 add r7, sp, #0 800c6b2: 60f8 str r0, [r7, #12] 800c6b4: 60b9 str r1, [r7, #8] 800c6b6: 607a str r2, [r7, #4] 800c6b8: 603b str r3, [r7, #0] BaseType_t xEntryTimeSet = pdFALSE, xYieldRequired; 800c6ba: 2300 movs r3, #0 800c6bc: 637b str r3, [r7, #52] @ 0x34 TimeOut_t xTimeOut; Queue_t * const pxQueue = xQueue; 800c6be: 68fb ldr r3, [r7, #12] 800c6c0: 633b str r3, [r7, #48] @ 0x30 configASSERT( pxQueue ); 800c6c2: 6b3b ldr r3, [r7, #48] @ 0x30 800c6c4: 2b00 cmp r3, #0 800c6c6: d10b bne.n 800c6e0 __asm volatile 800c6c8: f04f 0350 mov.w r3, #80 @ 0x50 800c6cc: f383 8811 msr BASEPRI, r3 800c6d0: f3bf 8f6f isb sy 800c6d4: f3bf 8f4f dsb sy 800c6d8: 62bb str r3, [r7, #40] @ 0x28 } 800c6da: bf00 nop 800c6dc: bf00 nop 800c6de: e7fd b.n 800c6dc configASSERT( !( ( pvItemToQueue == NULL ) && ( pxQueue->uxItemSize != ( UBaseType_t ) 0U ) ) ); 800c6e0: 68bb ldr r3, [r7, #8] 800c6e2: 2b00 cmp r3, #0 800c6e4: d103 bne.n 800c6ee 800c6e6: 6b3b ldr r3, [r7, #48] @ 0x30 800c6e8: 6c1b ldr r3, [r3, #64] @ 0x40 800c6ea: 2b00 cmp r3, #0 800c6ec: d101 bne.n 800c6f2 800c6ee: 2301 movs r3, #1 800c6f0: e000 b.n 800c6f4 800c6f2: 2300 movs r3, #0 800c6f4: 2b00 cmp r3, #0 800c6f6: d10b bne.n 800c710 __asm volatile 800c6f8: f04f 0350 mov.w r3, #80 @ 0x50 800c6fc: f383 8811 msr BASEPRI, r3 800c700: f3bf 8f6f isb sy 800c704: f3bf 8f4f dsb sy 800c708: 627b str r3, [r7, #36] @ 0x24 } 800c70a: bf00 nop 800c70c: bf00 nop 800c70e: e7fd b.n 800c70c configASSERT( !( ( xCopyPosition == queueOVERWRITE ) && ( pxQueue->uxLength != 1 ) ) ); 800c710: 683b ldr r3, [r7, #0] 800c712: 2b02 cmp r3, #2 800c714: d103 bne.n 800c71e 800c716: 6b3b ldr r3, [r7, #48] @ 0x30 800c718: 6bdb ldr r3, [r3, #60] @ 0x3c 800c71a: 2b01 cmp r3, #1 800c71c: d101 bne.n 800c722 800c71e: 2301 movs r3, #1 800c720: e000 b.n 800c724 800c722: 2300 movs r3, #0 800c724: 2b00 cmp r3, #0 800c726: d10b bne.n 800c740 __asm volatile 800c728: f04f 0350 mov.w r3, #80 @ 0x50 800c72c: f383 8811 msr BASEPRI, r3 800c730: f3bf 8f6f isb sy 800c734: f3bf 8f4f dsb sy 800c738: 623b str r3, [r7, #32] } 800c73a: bf00 nop 800c73c: bf00 nop 800c73e: e7fd b.n 800c73c #if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) ) { configASSERT( !( ( xTaskGetSchedulerState() == taskSCHEDULER_SUSPENDED ) && ( xTicksToWait != 0 ) ) ); 800c740: f001 fb50 bl 800dde4 800c744: 4603 mov r3, r0 800c746: 2b00 cmp r3, #0 800c748: d102 bne.n 800c750 800c74a: 687b ldr r3, [r7, #4] 800c74c: 2b00 cmp r3, #0 800c74e: d101 bne.n 800c754 800c750: 2301 movs r3, #1 800c752: e000 b.n 800c756 800c754: 2300 movs r3, #0 800c756: 2b00 cmp r3, #0 800c758: d10b bne.n 800c772 __asm volatile 800c75a: f04f 0350 mov.w r3, #80 @ 0x50 800c75e: f383 8811 msr BASEPRI, r3 800c762: f3bf 8f6f isb sy 800c766: f3bf 8f4f dsb sy 800c76a: 61fb str r3, [r7, #28] } 800c76c: bf00 nop 800c76e: bf00 nop 800c770: e7fd b.n 800c76e /*lint -save -e904 This function relaxes the coding standard somewhat to allow return statements within the function itself. This is done in the interest of execution time efficiency. */ for( ;; ) { taskENTER_CRITICAL(); 800c772: f002 faa9 bl 800ecc8 { /* Is there room on the queue now? The running task must be the highest priority task wanting to access the queue. If the head item in the queue is to be overwritten then it does not matter if the queue is full. */ if( ( pxQueue->uxMessagesWaiting < pxQueue->uxLength ) || ( xCopyPosition == queueOVERWRITE ) ) 800c776: 6b3b ldr r3, [r7, #48] @ 0x30 800c778: 6b9a ldr r2, [r3, #56] @ 0x38 800c77a: 6b3b ldr r3, [r7, #48] @ 0x30 800c77c: 6bdb ldr r3, [r3, #60] @ 0x3c 800c77e: 429a cmp r2, r3 800c780: d302 bcc.n 800c788 800c782: 683b ldr r3, [r7, #0] 800c784: 2b02 cmp r3, #2 800c786: d129 bne.n 800c7dc } } } #else /* configUSE_QUEUE_SETS */ { xYieldRequired = prvCopyDataToQueue( pxQueue, pvItemToQueue, xCopyPosition ); 800c788: 683a ldr r2, [r7, #0] 800c78a: 68b9 ldr r1, [r7, #8] 800c78c: 6b38 ldr r0, [r7, #48] @ 0x30 800c78e: f000 fbc7 bl 800cf20 800c792: 62f8 str r0, [r7, #44] @ 0x2c /* If there was a task waiting for data to arrive on the queue then unblock it now. */ if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE ) 800c794: 6b3b ldr r3, [r7, #48] @ 0x30 800c796: 6a5b ldr r3, [r3, #36] @ 0x24 800c798: 2b00 cmp r3, #0 800c79a: d010 beq.n 800c7be { if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE ) 800c79c: 6b3b ldr r3, [r7, #48] @ 0x30 800c79e: 3324 adds r3, #36 @ 0x24 800c7a0: 4618 mov r0, r3 800c7a2: f001 f95f bl 800da64 800c7a6: 4603 mov r3, r0 800c7a8: 2b00 cmp r3, #0 800c7aa: d013 beq.n 800c7d4 { /* The unblocked task has a priority higher than our own so yield immediately. Yes it is ok to do this from within the critical section - the kernel takes care of that. */ queueYIELD_IF_USING_PREEMPTION(); 800c7ac: 4b3f ldr r3, [pc, #252] @ (800c8ac ) 800c7ae: f04f 5280 mov.w r2, #268435456 @ 0x10000000 800c7b2: 601a str r2, [r3, #0] 800c7b4: f3bf 8f4f dsb sy 800c7b8: f3bf 8f6f isb sy 800c7bc: e00a b.n 800c7d4 else { mtCOVERAGE_TEST_MARKER(); } } else if( xYieldRequired != pdFALSE ) 800c7be: 6afb ldr r3, [r7, #44] @ 0x2c 800c7c0: 2b00 cmp r3, #0 800c7c2: d007 beq.n 800c7d4 { /* This path is a special case that will only get executed if the task was holding multiple mutexes and the mutexes were given back in an order that is different to that in which they were taken. */ queueYIELD_IF_USING_PREEMPTION(); 800c7c4: 4b39 ldr r3, [pc, #228] @ (800c8ac ) 800c7c6: f04f 5280 mov.w r2, #268435456 @ 0x10000000 800c7ca: 601a str r2, [r3, #0] 800c7cc: f3bf 8f4f dsb sy 800c7d0: f3bf 8f6f isb sy mtCOVERAGE_TEST_MARKER(); } } #endif /* configUSE_QUEUE_SETS */ taskEXIT_CRITICAL(); 800c7d4: f002 faaa bl 800ed2c return pdPASS; 800c7d8: 2301 movs r3, #1 800c7da: e063 b.n 800c8a4 } else { if( xTicksToWait == ( TickType_t ) 0 ) 800c7dc: 687b ldr r3, [r7, #4] 800c7de: 2b00 cmp r3, #0 800c7e0: d103 bne.n 800c7ea { /* The queue was full and no block time is specified (or the block time has expired) so leave now. */ taskEXIT_CRITICAL(); 800c7e2: f002 faa3 bl 800ed2c /* Return to the original privilege level before exiting the function. */ traceQUEUE_SEND_FAILED( pxQueue ); return errQUEUE_FULL; 800c7e6: 2300 movs r3, #0 800c7e8: e05c b.n 800c8a4 } else if( xEntryTimeSet == pdFALSE ) 800c7ea: 6b7b ldr r3, [r7, #52] @ 0x34 800c7ec: 2b00 cmp r3, #0 800c7ee: d106 bne.n 800c7fe { /* The queue was full and a block time was specified so configure the timeout structure. */ vTaskInternalSetTimeOutState( &xTimeOut ); 800c7f0: f107 0314 add.w r3, r7, #20 800c7f4: 4618 mov r0, r3 800c7f6: f001 f999 bl 800db2c xEntryTimeSet = pdTRUE; 800c7fa: 2301 movs r3, #1 800c7fc: 637b str r3, [r7, #52] @ 0x34 /* Entry time was already set. */ mtCOVERAGE_TEST_MARKER(); } } } taskEXIT_CRITICAL(); 800c7fe: f002 fa95 bl 800ed2c /* Interrupts and other tasks can send to and receive from the queue now the critical section has been exited. */ vTaskSuspendAll(); 800c802: f000 ff09 bl 800d618 prvLockQueue( pxQueue ); 800c806: f002 fa5f bl 800ecc8 800c80a: 6b3b ldr r3, [r7, #48] @ 0x30 800c80c: f893 3044 ldrb.w r3, [r3, #68] @ 0x44 800c810: b25b sxtb r3, r3 800c812: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff 800c816: d103 bne.n 800c820 800c818: 6b3b ldr r3, [r7, #48] @ 0x30 800c81a: 2200 movs r2, #0 800c81c: f883 2044 strb.w r2, [r3, #68] @ 0x44 800c820: 6b3b ldr r3, [r7, #48] @ 0x30 800c822: f893 3045 ldrb.w r3, [r3, #69] @ 0x45 800c826: b25b sxtb r3, r3 800c828: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff 800c82c: d103 bne.n 800c836 800c82e: 6b3b ldr r3, [r7, #48] @ 0x30 800c830: 2200 movs r2, #0 800c832: f883 2045 strb.w r2, [r3, #69] @ 0x45 800c836: f002 fa79 bl 800ed2c /* Update the timeout state to see if it has expired yet. */ if( xTaskCheckForTimeOut( &xTimeOut, &xTicksToWait ) == pdFALSE ) 800c83a: 1d3a adds r2, r7, #4 800c83c: f107 0314 add.w r3, r7, #20 800c840: 4611 mov r1, r2 800c842: 4618 mov r0, r3 800c844: f001 f988 bl 800db58 800c848: 4603 mov r3, r0 800c84a: 2b00 cmp r3, #0 800c84c: d124 bne.n 800c898 { if( prvIsQueueFull( pxQueue ) != pdFALSE ) 800c84e: 6b38 ldr r0, [r7, #48] @ 0x30 800c850: f000 fc5e bl 800d110 800c854: 4603 mov r3, r0 800c856: 2b00 cmp r3, #0 800c858: d018 beq.n 800c88c { traceBLOCKING_ON_QUEUE_SEND( pxQueue ); vTaskPlaceOnEventList( &( pxQueue->xTasksWaitingToSend ), xTicksToWait ); 800c85a: 6b3b ldr r3, [r7, #48] @ 0x30 800c85c: 3310 adds r3, #16 800c85e: 687a ldr r2, [r7, #4] 800c860: 4611 mov r1, r2 800c862: 4618 mov r0, r3 800c864: f001 f8ac bl 800d9c0 /* Unlocking the queue means queue events can effect the event list. It is possible that interrupts occurring now remove this task from the event list again - but as the scheduler is suspended the task will go onto the pending ready last instead of the actual ready list. */ prvUnlockQueue( pxQueue ); 800c868: 6b38 ldr r0, [r7, #48] @ 0x30 800c86a: f000 fbe9 bl 800d040 /* Resuming the scheduler will move tasks from the pending ready list into the ready list - so it is feasible that this task is already in a ready list before it yields - in which case the yield will not cause a context switch unless there is also a higher priority task in the pending ready list. */ if( xTaskResumeAll() == pdFALSE ) 800c86e: f000 fee1 bl 800d634 800c872: 4603 mov r3, r0 800c874: 2b00 cmp r3, #0 800c876: f47f af7c bne.w 800c772 { portYIELD_WITHIN_API(); 800c87a: 4b0c ldr r3, [pc, #48] @ (800c8ac ) 800c87c: f04f 5280 mov.w r2, #268435456 @ 0x10000000 800c880: 601a str r2, [r3, #0] 800c882: f3bf 8f4f dsb sy 800c886: f3bf 8f6f isb sy 800c88a: e772 b.n 800c772 } } else { /* Try again. */ prvUnlockQueue( pxQueue ); 800c88c: 6b38 ldr r0, [r7, #48] @ 0x30 800c88e: f000 fbd7 bl 800d040 ( void ) xTaskResumeAll(); 800c892: f000 fecf bl 800d634 800c896: e76c b.n 800c772 } } else { /* The timeout has expired. */ prvUnlockQueue( pxQueue ); 800c898: 6b38 ldr r0, [r7, #48] @ 0x30 800c89a: f000 fbd1 bl 800d040 ( void ) xTaskResumeAll(); 800c89e: f000 fec9 bl 800d634 traceQUEUE_SEND_FAILED( pxQueue ); return errQUEUE_FULL; 800c8a2: 2300 movs r3, #0 } } /*lint -restore */ } 800c8a4: 4618 mov r0, r3 800c8a6: 3738 adds r7, #56 @ 0x38 800c8a8: 46bd mov sp, r7 800c8aa: bd80 pop {r7, pc} 800c8ac: e000ed04 .word 0xe000ed04 0800c8b0 : /*-----------------------------------------------------------*/ BaseType_t xQueueGenericSendFromISR( QueueHandle_t xQueue, const void * const pvItemToQueue, BaseType_t * const pxHigherPriorityTaskWoken, const BaseType_t xCopyPosition ) { 800c8b0: b580 push {r7, lr} 800c8b2: b090 sub sp, #64 @ 0x40 800c8b4: af00 add r7, sp, #0 800c8b6: 60f8 str r0, [r7, #12] 800c8b8: 60b9 str r1, [r7, #8] 800c8ba: 607a str r2, [r7, #4] 800c8bc: 603b str r3, [r7, #0] BaseType_t xReturn; UBaseType_t uxSavedInterruptStatus; Queue_t * const pxQueue = xQueue; 800c8be: 68fb ldr r3, [r7, #12] 800c8c0: 63bb str r3, [r7, #56] @ 0x38 configASSERT( pxQueue ); 800c8c2: 6bbb ldr r3, [r7, #56] @ 0x38 800c8c4: 2b00 cmp r3, #0 800c8c6: d10b bne.n 800c8e0 __asm volatile 800c8c8: f04f 0350 mov.w r3, #80 @ 0x50 800c8cc: f383 8811 msr BASEPRI, r3 800c8d0: f3bf 8f6f isb sy 800c8d4: f3bf 8f4f dsb sy 800c8d8: 62bb str r3, [r7, #40] @ 0x28 } 800c8da: bf00 nop 800c8dc: bf00 nop 800c8de: e7fd b.n 800c8dc configASSERT( !( ( pvItemToQueue == NULL ) && ( pxQueue->uxItemSize != ( UBaseType_t ) 0U ) ) ); 800c8e0: 68bb ldr r3, [r7, #8] 800c8e2: 2b00 cmp r3, #0 800c8e4: d103 bne.n 800c8ee 800c8e6: 6bbb ldr r3, [r7, #56] @ 0x38 800c8e8: 6c1b ldr r3, [r3, #64] @ 0x40 800c8ea: 2b00 cmp r3, #0 800c8ec: d101 bne.n 800c8f2 800c8ee: 2301 movs r3, #1 800c8f0: e000 b.n 800c8f4 800c8f2: 2300 movs r3, #0 800c8f4: 2b00 cmp r3, #0 800c8f6: d10b bne.n 800c910 __asm volatile 800c8f8: f04f 0350 mov.w r3, #80 @ 0x50 800c8fc: f383 8811 msr BASEPRI, r3 800c900: f3bf 8f6f isb sy 800c904: f3bf 8f4f dsb sy 800c908: 627b str r3, [r7, #36] @ 0x24 } 800c90a: bf00 nop 800c90c: bf00 nop 800c90e: e7fd b.n 800c90c configASSERT( !( ( xCopyPosition == queueOVERWRITE ) && ( pxQueue->uxLength != 1 ) ) ); 800c910: 683b ldr r3, [r7, #0] 800c912: 2b02 cmp r3, #2 800c914: d103 bne.n 800c91e 800c916: 6bbb ldr r3, [r7, #56] @ 0x38 800c918: 6bdb ldr r3, [r3, #60] @ 0x3c 800c91a: 2b01 cmp r3, #1 800c91c: d101 bne.n 800c922 800c91e: 2301 movs r3, #1 800c920: e000 b.n 800c924 800c922: 2300 movs r3, #0 800c924: 2b00 cmp r3, #0 800c926: d10b bne.n 800c940 __asm volatile 800c928: f04f 0350 mov.w r3, #80 @ 0x50 800c92c: f383 8811 msr BASEPRI, r3 800c930: f3bf 8f6f isb sy 800c934: f3bf 8f4f dsb sy 800c938: 623b str r3, [r7, #32] } 800c93a: bf00 nop 800c93c: bf00 nop 800c93e: e7fd b.n 800c93c that have been assigned a priority at or (logically) below the maximum system call interrupt priority. FreeRTOS maintains a separate interrupt safe API to ensure interrupt entry is as fast and as simple as possible. More information (albeit Cortex-M specific) is provided on the following link: http://www.freertos.org/RTOS-Cortex-M3-M4.html */ portASSERT_IF_INTERRUPT_PRIORITY_INVALID(); 800c940: f002 faa2 bl 800ee88 portFORCE_INLINE static uint32_t ulPortRaiseBASEPRI( void ) { uint32_t ulOriginalBASEPRI, ulNewBASEPRI; __asm volatile 800c944: f3ef 8211 mrs r2, BASEPRI 800c948: f04f 0350 mov.w r3, #80 @ 0x50 800c94c: f383 8811 msr BASEPRI, r3 800c950: f3bf 8f6f isb sy 800c954: f3bf 8f4f dsb sy 800c958: 61fa str r2, [r7, #28] 800c95a: 61bb str r3, [r7, #24] :"=r" (ulOriginalBASEPRI), "=r" (ulNewBASEPRI) : "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory" ); /* This return will not be reached but is necessary to prevent compiler warnings. */ return ulOriginalBASEPRI; 800c95c: 69fb ldr r3, [r7, #28] /* Similar to xQueueGenericSend, except without blocking if there is no room in the queue. Also don't directly wake a task that was blocked on a queue read, instead return a flag to say whether a context switch is required or not (i.e. has a task with a higher priority than us been woken by this post). */ uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR(); 800c95e: 637b str r3, [r7, #52] @ 0x34 { if( ( pxQueue->uxMessagesWaiting < pxQueue->uxLength ) || ( xCopyPosition == queueOVERWRITE ) ) 800c960: 6bbb ldr r3, [r7, #56] @ 0x38 800c962: 6b9a ldr r2, [r3, #56] @ 0x38 800c964: 6bbb ldr r3, [r7, #56] @ 0x38 800c966: 6bdb ldr r3, [r3, #60] @ 0x3c 800c968: 429a cmp r2, r3 800c96a: d302 bcc.n 800c972 800c96c: 683b ldr r3, [r7, #0] 800c96e: 2b02 cmp r3, #2 800c970: d12f bne.n 800c9d2 { const int8_t cTxLock = pxQueue->cTxLock; 800c972: 6bbb ldr r3, [r7, #56] @ 0x38 800c974: f893 3045 ldrb.w r3, [r3, #69] @ 0x45 800c978: f887 3033 strb.w r3, [r7, #51] @ 0x33 const UBaseType_t uxPreviousMessagesWaiting = pxQueue->uxMessagesWaiting; 800c97c: 6bbb ldr r3, [r7, #56] @ 0x38 800c97e: 6b9b ldr r3, [r3, #56] @ 0x38 800c980: 62fb str r3, [r7, #44] @ 0x2c /* Semaphores use xQueueGiveFromISR(), so pxQueue will not be a semaphore or mutex. That means prvCopyDataToQueue() cannot result in a task disinheriting a priority and prvCopyDataToQueue() can be called here even though the disinherit function does not check if the scheduler is suspended before accessing the ready lists. */ ( void ) prvCopyDataToQueue( pxQueue, pvItemToQueue, xCopyPosition ); 800c982: 683a ldr r2, [r7, #0] 800c984: 68b9 ldr r1, [r7, #8] 800c986: 6bb8 ldr r0, [r7, #56] @ 0x38 800c988: f000 faca bl 800cf20 /* The event list is not altered if the queue is locked. This will be done when the queue is unlocked later. */ if( cTxLock == queueUNLOCKED ) 800c98c: f997 3033 ldrsb.w r3, [r7, #51] @ 0x33 800c990: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff 800c994: d112 bne.n 800c9bc } } } #else /* configUSE_QUEUE_SETS */ { if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE ) 800c996: 6bbb ldr r3, [r7, #56] @ 0x38 800c998: 6a5b ldr r3, [r3, #36] @ 0x24 800c99a: 2b00 cmp r3, #0 800c99c: d016 beq.n 800c9cc { if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE ) 800c99e: 6bbb ldr r3, [r7, #56] @ 0x38 800c9a0: 3324 adds r3, #36 @ 0x24 800c9a2: 4618 mov r0, r3 800c9a4: f001 f85e bl 800da64 800c9a8: 4603 mov r3, r0 800c9aa: 2b00 cmp r3, #0 800c9ac: d00e beq.n 800c9cc { /* The task waiting has a higher priority so record that a context switch is required. */ if( pxHigherPriorityTaskWoken != NULL ) 800c9ae: 687b ldr r3, [r7, #4] 800c9b0: 2b00 cmp r3, #0 800c9b2: d00b beq.n 800c9cc { *pxHigherPriorityTaskWoken = pdTRUE; 800c9b4: 687b ldr r3, [r7, #4] 800c9b6: 2201 movs r2, #1 800c9b8: 601a str r2, [r3, #0] 800c9ba: e007 b.n 800c9cc } else { /* Increment the lock count so the task that unlocks the queue knows that data was posted while it was locked. */ pxQueue->cTxLock = ( int8_t ) ( cTxLock + 1 ); 800c9bc: f897 3033 ldrb.w r3, [r7, #51] @ 0x33 800c9c0: 3301 adds r3, #1 800c9c2: b2db uxtb r3, r3 800c9c4: b25a sxtb r2, r3 800c9c6: 6bbb ldr r3, [r7, #56] @ 0x38 800c9c8: f883 2045 strb.w r2, [r3, #69] @ 0x45 } xReturn = pdPASS; 800c9cc: 2301 movs r3, #1 800c9ce: 63fb str r3, [r7, #60] @ 0x3c { 800c9d0: e001 b.n 800c9d6 } else { traceQUEUE_SEND_FROM_ISR_FAILED( pxQueue ); xReturn = errQUEUE_FULL; 800c9d2: 2300 movs r3, #0 800c9d4: 63fb str r3, [r7, #60] @ 0x3c 800c9d6: 6b7b ldr r3, [r7, #52] @ 0x34 800c9d8: 617b str r3, [r7, #20] } /*-----------------------------------------------------------*/ portFORCE_INLINE static void vPortSetBASEPRI( uint32_t ulNewMaskValue ) { __asm volatile 800c9da: 697b ldr r3, [r7, #20] 800c9dc: f383 8811 msr BASEPRI, r3 ( " msr basepri, %0 " :: "r" ( ulNewMaskValue ) : "memory" ); } 800c9e0: bf00 nop } } portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus ); return xReturn; 800c9e2: 6bfb ldr r3, [r7, #60] @ 0x3c } 800c9e4: 4618 mov r0, r3 800c9e6: 3740 adds r7, #64 @ 0x40 800c9e8: 46bd mov sp, r7 800c9ea: bd80 pop {r7, pc} 0800c9ec : /*-----------------------------------------------------------*/ BaseType_t xQueueGiveFromISR( QueueHandle_t xQueue, BaseType_t * const pxHigherPriorityTaskWoken ) { 800c9ec: b580 push {r7, lr} 800c9ee: b08e sub sp, #56 @ 0x38 800c9f0: af00 add r7, sp, #0 800c9f2: 6078 str r0, [r7, #4] 800c9f4: 6039 str r1, [r7, #0] BaseType_t xReturn; UBaseType_t uxSavedInterruptStatus; Queue_t * const pxQueue = xQueue; 800c9f6: 687b ldr r3, [r7, #4] 800c9f8: 633b str r3, [r7, #48] @ 0x30 item size is 0. Don't directly wake a task that was blocked on a queue read, instead return a flag to say whether a context switch is required or not (i.e. has a task with a higher priority than us been woken by this post). */ configASSERT( pxQueue ); 800c9fa: 6b3b ldr r3, [r7, #48] @ 0x30 800c9fc: 2b00 cmp r3, #0 800c9fe: d10b bne.n 800ca18 __asm volatile 800ca00: f04f 0350 mov.w r3, #80 @ 0x50 800ca04: f383 8811 msr BASEPRI, r3 800ca08: f3bf 8f6f isb sy 800ca0c: f3bf 8f4f dsb sy 800ca10: 623b str r3, [r7, #32] } 800ca12: bf00 nop 800ca14: bf00 nop 800ca16: e7fd b.n 800ca14 /* xQueueGenericSendFromISR() should be used instead of xQueueGiveFromISR() if the item size is not 0. */ configASSERT( pxQueue->uxItemSize == 0 ); 800ca18: 6b3b ldr r3, [r7, #48] @ 0x30 800ca1a: 6c1b ldr r3, [r3, #64] @ 0x40 800ca1c: 2b00 cmp r3, #0 800ca1e: d00b beq.n 800ca38 __asm volatile 800ca20: f04f 0350 mov.w r3, #80 @ 0x50 800ca24: f383 8811 msr BASEPRI, r3 800ca28: f3bf 8f6f isb sy 800ca2c: f3bf 8f4f dsb sy 800ca30: 61fb str r3, [r7, #28] } 800ca32: bf00 nop 800ca34: bf00 nop 800ca36: e7fd b.n 800ca34 /* Normally a mutex would not be given from an interrupt, especially if there is a mutex holder, as priority inheritance makes no sense for an interrupts, only tasks. */ configASSERT( !( ( pxQueue->uxQueueType == queueQUEUE_IS_MUTEX ) && ( pxQueue->u.xSemaphore.xMutexHolder != NULL ) ) ); 800ca38: 6b3b ldr r3, [r7, #48] @ 0x30 800ca3a: 681b ldr r3, [r3, #0] 800ca3c: 2b00 cmp r3, #0 800ca3e: d103 bne.n 800ca48 800ca40: 6b3b ldr r3, [r7, #48] @ 0x30 800ca42: 689b ldr r3, [r3, #8] 800ca44: 2b00 cmp r3, #0 800ca46: d101 bne.n 800ca4c 800ca48: 2301 movs r3, #1 800ca4a: e000 b.n 800ca4e 800ca4c: 2300 movs r3, #0 800ca4e: 2b00 cmp r3, #0 800ca50: d10b bne.n 800ca6a __asm volatile 800ca52: f04f 0350 mov.w r3, #80 @ 0x50 800ca56: f383 8811 msr BASEPRI, r3 800ca5a: f3bf 8f6f isb sy 800ca5e: f3bf 8f4f dsb sy 800ca62: 61bb str r3, [r7, #24] } 800ca64: bf00 nop 800ca66: bf00 nop 800ca68: e7fd b.n 800ca66 that have been assigned a priority at or (logically) below the maximum system call interrupt priority. FreeRTOS maintains a separate interrupt safe API to ensure interrupt entry is as fast and as simple as possible. More information (albeit Cortex-M specific) is provided on the following link: http://www.freertos.org/RTOS-Cortex-M3-M4.html */ portASSERT_IF_INTERRUPT_PRIORITY_INVALID(); 800ca6a: f002 fa0d bl 800ee88 __asm volatile 800ca6e: f3ef 8211 mrs r2, BASEPRI 800ca72: f04f 0350 mov.w r3, #80 @ 0x50 800ca76: f383 8811 msr BASEPRI, r3 800ca7a: f3bf 8f6f isb sy 800ca7e: f3bf 8f4f dsb sy 800ca82: 617a str r2, [r7, #20] 800ca84: 613b str r3, [r7, #16] return ulOriginalBASEPRI; 800ca86: 697b ldr r3, [r7, #20] uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR(); 800ca88: 62fb str r3, [r7, #44] @ 0x2c { const UBaseType_t uxMessagesWaiting = pxQueue->uxMessagesWaiting; 800ca8a: 6b3b ldr r3, [r7, #48] @ 0x30 800ca8c: 6b9b ldr r3, [r3, #56] @ 0x38 800ca8e: 62bb str r3, [r7, #40] @ 0x28 /* When the queue is used to implement a semaphore no data is ever moved through the queue but it is still valid to see if the queue 'has space'. */ if( uxMessagesWaiting < pxQueue->uxLength ) 800ca90: 6b3b ldr r3, [r7, #48] @ 0x30 800ca92: 6bdb ldr r3, [r3, #60] @ 0x3c 800ca94: 6aba ldr r2, [r7, #40] @ 0x28 800ca96: 429a cmp r2, r3 800ca98: d22b bcs.n 800caf2 { const int8_t cTxLock = pxQueue->cTxLock; 800ca9a: 6b3b ldr r3, [r7, #48] @ 0x30 800ca9c: f893 3045 ldrb.w r3, [r3, #69] @ 0x45 800caa0: f887 3027 strb.w r3, [r7, #39] @ 0x27 holder - and if there is a mutex holder then the mutex cannot be given from an ISR. As this is the ISR version of the function it can be assumed there is no mutex holder and no need to determine if priority disinheritance is needed. Simply increase the count of messages (semaphores) available. */ pxQueue->uxMessagesWaiting = uxMessagesWaiting + ( UBaseType_t ) 1; 800caa4: 6abb ldr r3, [r7, #40] @ 0x28 800caa6: 1c5a adds r2, r3, #1 800caa8: 6b3b ldr r3, [r7, #48] @ 0x30 800caaa: 639a str r2, [r3, #56] @ 0x38 /* The event list is not altered if the queue is locked. This will be done when the queue is unlocked later. */ if( cTxLock == queueUNLOCKED ) 800caac: f997 3027 ldrsb.w r3, [r7, #39] @ 0x27 800cab0: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff 800cab4: d112 bne.n 800cadc } } } #else /* configUSE_QUEUE_SETS */ { if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE ) 800cab6: 6b3b ldr r3, [r7, #48] @ 0x30 800cab8: 6a5b ldr r3, [r3, #36] @ 0x24 800caba: 2b00 cmp r3, #0 800cabc: d016 beq.n 800caec { if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE ) 800cabe: 6b3b ldr r3, [r7, #48] @ 0x30 800cac0: 3324 adds r3, #36 @ 0x24 800cac2: 4618 mov r0, r3 800cac4: f000 ffce bl 800da64 800cac8: 4603 mov r3, r0 800caca: 2b00 cmp r3, #0 800cacc: d00e beq.n 800caec { /* The task waiting has a higher priority so record that a context switch is required. */ if( pxHigherPriorityTaskWoken != NULL ) 800cace: 683b ldr r3, [r7, #0] 800cad0: 2b00 cmp r3, #0 800cad2: d00b beq.n 800caec { *pxHigherPriorityTaskWoken = pdTRUE; 800cad4: 683b ldr r3, [r7, #0] 800cad6: 2201 movs r2, #1 800cad8: 601a str r2, [r3, #0] 800cada: e007 b.n 800caec } else { /* Increment the lock count so the task that unlocks the queue knows that data was posted while it was locked. */ pxQueue->cTxLock = ( int8_t ) ( cTxLock + 1 ); 800cadc: f897 3027 ldrb.w r3, [r7, #39] @ 0x27 800cae0: 3301 adds r3, #1 800cae2: b2db uxtb r3, r3 800cae4: b25a sxtb r2, r3 800cae6: 6b3b ldr r3, [r7, #48] @ 0x30 800cae8: f883 2045 strb.w r2, [r3, #69] @ 0x45 } xReturn = pdPASS; 800caec: 2301 movs r3, #1 800caee: 637b str r3, [r7, #52] @ 0x34 800caf0: e001 b.n 800caf6 } else { traceQUEUE_SEND_FROM_ISR_FAILED( pxQueue ); xReturn = errQUEUE_FULL; 800caf2: 2300 movs r3, #0 800caf4: 637b str r3, [r7, #52] @ 0x34 800caf6: 6afb ldr r3, [r7, #44] @ 0x2c 800caf8: 60fb str r3, [r7, #12] __asm volatile 800cafa: 68fb ldr r3, [r7, #12] 800cafc: f383 8811 msr BASEPRI, r3 } 800cb00: bf00 nop } } portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus ); return xReturn; 800cb02: 6b7b ldr r3, [r7, #52] @ 0x34 } 800cb04: 4618 mov r0, r3 800cb06: 3738 adds r7, #56 @ 0x38 800cb08: 46bd mov sp, r7 800cb0a: bd80 pop {r7, pc} 0800cb0c : /*-----------------------------------------------------------*/ BaseType_t xQueueReceive( QueueHandle_t xQueue, void * const pvBuffer, TickType_t xTicksToWait ) { 800cb0c: b580 push {r7, lr} 800cb0e: b08c sub sp, #48 @ 0x30 800cb10: af00 add r7, sp, #0 800cb12: 60f8 str r0, [r7, #12] 800cb14: 60b9 str r1, [r7, #8] 800cb16: 607a str r2, [r7, #4] BaseType_t xEntryTimeSet = pdFALSE; 800cb18: 2300 movs r3, #0 800cb1a: 62fb str r3, [r7, #44] @ 0x2c TimeOut_t xTimeOut; Queue_t * const pxQueue = xQueue; 800cb1c: 68fb ldr r3, [r7, #12] 800cb1e: 62bb str r3, [r7, #40] @ 0x28 /* Check the pointer is not NULL. */ configASSERT( ( pxQueue ) ); 800cb20: 6abb ldr r3, [r7, #40] @ 0x28 800cb22: 2b00 cmp r3, #0 800cb24: d10b bne.n 800cb3e __asm volatile 800cb26: f04f 0350 mov.w r3, #80 @ 0x50 800cb2a: f383 8811 msr BASEPRI, r3 800cb2e: f3bf 8f6f isb sy 800cb32: f3bf 8f4f dsb sy 800cb36: 623b str r3, [r7, #32] } 800cb38: bf00 nop 800cb3a: bf00 nop 800cb3c: e7fd b.n 800cb3a /* The buffer into which data is received can only be NULL if the data size is zero (so no data is copied into the buffer. */ configASSERT( !( ( ( pvBuffer ) == NULL ) && ( ( pxQueue )->uxItemSize != ( UBaseType_t ) 0U ) ) ); 800cb3e: 68bb ldr r3, [r7, #8] 800cb40: 2b00 cmp r3, #0 800cb42: d103 bne.n 800cb4c 800cb44: 6abb ldr r3, [r7, #40] @ 0x28 800cb46: 6c1b ldr r3, [r3, #64] @ 0x40 800cb48: 2b00 cmp r3, #0 800cb4a: d101 bne.n 800cb50 800cb4c: 2301 movs r3, #1 800cb4e: e000 b.n 800cb52 800cb50: 2300 movs r3, #0 800cb52: 2b00 cmp r3, #0 800cb54: d10b bne.n 800cb6e __asm volatile 800cb56: f04f 0350 mov.w r3, #80 @ 0x50 800cb5a: f383 8811 msr BASEPRI, r3 800cb5e: f3bf 8f6f isb sy 800cb62: f3bf 8f4f dsb sy 800cb66: 61fb str r3, [r7, #28] } 800cb68: bf00 nop 800cb6a: bf00 nop 800cb6c: e7fd b.n 800cb6a /* Cannot block if the scheduler is suspended. */ #if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) ) { configASSERT( !( ( xTaskGetSchedulerState() == taskSCHEDULER_SUSPENDED ) && ( xTicksToWait != 0 ) ) ); 800cb6e: f001 f939 bl 800dde4 800cb72: 4603 mov r3, r0 800cb74: 2b00 cmp r3, #0 800cb76: d102 bne.n 800cb7e 800cb78: 687b ldr r3, [r7, #4] 800cb7a: 2b00 cmp r3, #0 800cb7c: d101 bne.n 800cb82 800cb7e: 2301 movs r3, #1 800cb80: e000 b.n 800cb84 800cb82: 2300 movs r3, #0 800cb84: 2b00 cmp r3, #0 800cb86: d10b bne.n 800cba0 __asm volatile 800cb88: f04f 0350 mov.w r3, #80 @ 0x50 800cb8c: f383 8811 msr BASEPRI, r3 800cb90: f3bf 8f6f isb sy 800cb94: f3bf 8f4f dsb sy 800cb98: 61bb str r3, [r7, #24] } 800cb9a: bf00 nop 800cb9c: bf00 nop 800cb9e: e7fd b.n 800cb9c /*lint -save -e904 This function relaxes the coding standard somewhat to allow return statements within the function itself. This is done in the interest of execution time efficiency. */ for( ;; ) { taskENTER_CRITICAL(); 800cba0: f002 f892 bl 800ecc8 { const UBaseType_t uxMessagesWaiting = pxQueue->uxMessagesWaiting; 800cba4: 6abb ldr r3, [r7, #40] @ 0x28 800cba6: 6b9b ldr r3, [r3, #56] @ 0x38 800cba8: 627b str r3, [r7, #36] @ 0x24 /* Is there data in the queue now? To be running the calling task must be the highest priority task wanting to access the queue. */ if( uxMessagesWaiting > ( UBaseType_t ) 0 ) 800cbaa: 6a7b ldr r3, [r7, #36] @ 0x24 800cbac: 2b00 cmp r3, #0 800cbae: d01f beq.n 800cbf0 { /* Data available, remove one item. */ prvCopyDataFromQueue( pxQueue, pvBuffer ); 800cbb0: 68b9 ldr r1, [r7, #8] 800cbb2: 6ab8 ldr r0, [r7, #40] @ 0x28 800cbb4: f000 fa1e bl 800cff4 traceQUEUE_RECEIVE( pxQueue ); pxQueue->uxMessagesWaiting = uxMessagesWaiting - ( UBaseType_t ) 1; 800cbb8: 6a7b ldr r3, [r7, #36] @ 0x24 800cbba: 1e5a subs r2, r3, #1 800cbbc: 6abb ldr r3, [r7, #40] @ 0x28 800cbbe: 639a str r2, [r3, #56] @ 0x38 /* There is now space in the queue, were any tasks waiting to post to the queue? If so, unblock the highest priority waiting task. */ if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE ) 800cbc0: 6abb ldr r3, [r7, #40] @ 0x28 800cbc2: 691b ldr r3, [r3, #16] 800cbc4: 2b00 cmp r3, #0 800cbc6: d00f beq.n 800cbe8 { if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE ) 800cbc8: 6abb ldr r3, [r7, #40] @ 0x28 800cbca: 3310 adds r3, #16 800cbcc: 4618 mov r0, r3 800cbce: f000 ff49 bl 800da64 800cbd2: 4603 mov r3, r0 800cbd4: 2b00 cmp r3, #0 800cbd6: d007 beq.n 800cbe8 { queueYIELD_IF_USING_PREEMPTION(); 800cbd8: 4b3c ldr r3, [pc, #240] @ (800cccc ) 800cbda: f04f 5280 mov.w r2, #268435456 @ 0x10000000 800cbde: 601a str r2, [r3, #0] 800cbe0: f3bf 8f4f dsb sy 800cbe4: f3bf 8f6f isb sy else { mtCOVERAGE_TEST_MARKER(); } taskEXIT_CRITICAL(); 800cbe8: f002 f8a0 bl 800ed2c return pdPASS; 800cbec: 2301 movs r3, #1 800cbee: e069 b.n 800ccc4 } else { if( xTicksToWait == ( TickType_t ) 0 ) 800cbf0: 687b ldr r3, [r7, #4] 800cbf2: 2b00 cmp r3, #0 800cbf4: d103 bne.n 800cbfe { /* The queue was empty and no block time is specified (or the block time has expired) so leave now. */ taskEXIT_CRITICAL(); 800cbf6: f002 f899 bl 800ed2c traceQUEUE_RECEIVE_FAILED( pxQueue ); return errQUEUE_EMPTY; 800cbfa: 2300 movs r3, #0 800cbfc: e062 b.n 800ccc4 } else if( xEntryTimeSet == pdFALSE ) 800cbfe: 6afb ldr r3, [r7, #44] @ 0x2c 800cc00: 2b00 cmp r3, #0 800cc02: d106 bne.n 800cc12 { /* The queue was empty and a block time was specified so configure the timeout structure. */ vTaskInternalSetTimeOutState( &xTimeOut ); 800cc04: f107 0310 add.w r3, r7, #16 800cc08: 4618 mov r0, r3 800cc0a: f000 ff8f bl 800db2c xEntryTimeSet = pdTRUE; 800cc0e: 2301 movs r3, #1 800cc10: 62fb str r3, [r7, #44] @ 0x2c /* Entry time was already set. */ mtCOVERAGE_TEST_MARKER(); } } } taskEXIT_CRITICAL(); 800cc12: f002 f88b bl 800ed2c /* Interrupts and other tasks can send to and receive from the queue now the critical section has been exited. */ vTaskSuspendAll(); 800cc16: f000 fcff bl 800d618 prvLockQueue( pxQueue ); 800cc1a: f002 f855 bl 800ecc8 800cc1e: 6abb ldr r3, [r7, #40] @ 0x28 800cc20: f893 3044 ldrb.w r3, [r3, #68] @ 0x44 800cc24: b25b sxtb r3, r3 800cc26: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff 800cc2a: d103 bne.n 800cc34 800cc2c: 6abb ldr r3, [r7, #40] @ 0x28 800cc2e: 2200 movs r2, #0 800cc30: f883 2044 strb.w r2, [r3, #68] @ 0x44 800cc34: 6abb ldr r3, [r7, #40] @ 0x28 800cc36: f893 3045 ldrb.w r3, [r3, #69] @ 0x45 800cc3a: b25b sxtb r3, r3 800cc3c: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff 800cc40: d103 bne.n 800cc4a 800cc42: 6abb ldr r3, [r7, #40] @ 0x28 800cc44: 2200 movs r2, #0 800cc46: f883 2045 strb.w r2, [r3, #69] @ 0x45 800cc4a: f002 f86f bl 800ed2c /* Update the timeout state to see if it has expired yet. */ if( xTaskCheckForTimeOut( &xTimeOut, &xTicksToWait ) == pdFALSE ) 800cc4e: 1d3a adds r2, r7, #4 800cc50: f107 0310 add.w r3, r7, #16 800cc54: 4611 mov r1, r2 800cc56: 4618 mov r0, r3 800cc58: f000 ff7e bl 800db58 800cc5c: 4603 mov r3, r0 800cc5e: 2b00 cmp r3, #0 800cc60: d123 bne.n 800ccaa { /* The timeout has not expired. If the queue is still empty place the task on the list of tasks waiting to receive from the queue. */ if( prvIsQueueEmpty( pxQueue ) != pdFALSE ) 800cc62: 6ab8 ldr r0, [r7, #40] @ 0x28 800cc64: f000 fa3e bl 800d0e4 800cc68: 4603 mov r3, r0 800cc6a: 2b00 cmp r3, #0 800cc6c: d017 beq.n 800cc9e { traceBLOCKING_ON_QUEUE_RECEIVE( pxQueue ); vTaskPlaceOnEventList( &( pxQueue->xTasksWaitingToReceive ), xTicksToWait ); 800cc6e: 6abb ldr r3, [r7, #40] @ 0x28 800cc70: 3324 adds r3, #36 @ 0x24 800cc72: 687a ldr r2, [r7, #4] 800cc74: 4611 mov r1, r2 800cc76: 4618 mov r0, r3 800cc78: f000 fea2 bl 800d9c0 prvUnlockQueue( pxQueue ); 800cc7c: 6ab8 ldr r0, [r7, #40] @ 0x28 800cc7e: f000 f9df bl 800d040 if( xTaskResumeAll() == pdFALSE ) 800cc82: f000 fcd7 bl 800d634 800cc86: 4603 mov r3, r0 800cc88: 2b00 cmp r3, #0 800cc8a: d189 bne.n 800cba0 { portYIELD_WITHIN_API(); 800cc8c: 4b0f ldr r3, [pc, #60] @ (800cccc ) 800cc8e: f04f 5280 mov.w r2, #268435456 @ 0x10000000 800cc92: 601a str r2, [r3, #0] 800cc94: f3bf 8f4f dsb sy 800cc98: f3bf 8f6f isb sy 800cc9c: e780 b.n 800cba0 } else { /* The queue contains data again. Loop back to try and read the data. */ prvUnlockQueue( pxQueue ); 800cc9e: 6ab8 ldr r0, [r7, #40] @ 0x28 800cca0: f000 f9ce bl 800d040 ( void ) xTaskResumeAll(); 800cca4: f000 fcc6 bl 800d634 800cca8: e77a b.n 800cba0 } else { /* Timed out. If there is no data in the queue exit, otherwise loop back and attempt to read the data. */ prvUnlockQueue( pxQueue ); 800ccaa: 6ab8 ldr r0, [r7, #40] @ 0x28 800ccac: f000 f9c8 bl 800d040 ( void ) xTaskResumeAll(); 800ccb0: f000 fcc0 bl 800d634 if( prvIsQueueEmpty( pxQueue ) != pdFALSE ) 800ccb4: 6ab8 ldr r0, [r7, #40] @ 0x28 800ccb6: f000 fa15 bl 800d0e4 800ccba: 4603 mov r3, r0 800ccbc: 2b00 cmp r3, #0 800ccbe: f43f af6f beq.w 800cba0 { traceQUEUE_RECEIVE_FAILED( pxQueue ); return errQUEUE_EMPTY; 800ccc2: 2300 movs r3, #0 { mtCOVERAGE_TEST_MARKER(); } } } /*lint -restore */ } 800ccc4: 4618 mov r0, r3 800ccc6: 3730 adds r7, #48 @ 0x30 800ccc8: 46bd mov sp, r7 800ccca: bd80 pop {r7, pc} 800cccc: e000ed04 .word 0xe000ed04 0800ccd0 : /*-----------------------------------------------------------*/ BaseType_t xQueueSemaphoreTake( QueueHandle_t xQueue, TickType_t xTicksToWait ) { 800ccd0: b580 push {r7, lr} 800ccd2: b08e sub sp, #56 @ 0x38 800ccd4: af00 add r7, sp, #0 800ccd6: 6078 str r0, [r7, #4] 800ccd8: 6039 str r1, [r7, #0] BaseType_t xEntryTimeSet = pdFALSE; 800ccda: 2300 movs r3, #0 800ccdc: 637b str r3, [r7, #52] @ 0x34 TimeOut_t xTimeOut; Queue_t * const pxQueue = xQueue; 800ccde: 687b ldr r3, [r7, #4] 800cce0: 62fb str r3, [r7, #44] @ 0x2c #if( configUSE_MUTEXES == 1 ) BaseType_t xInheritanceOccurred = pdFALSE; 800cce2: 2300 movs r3, #0 800cce4: 633b str r3, [r7, #48] @ 0x30 #endif /* Check the queue pointer is not NULL. */ configASSERT( ( pxQueue ) ); 800cce6: 6afb ldr r3, [r7, #44] @ 0x2c 800cce8: 2b00 cmp r3, #0 800ccea: d10b bne.n 800cd04 __asm volatile 800ccec: f04f 0350 mov.w r3, #80 @ 0x50 800ccf0: f383 8811 msr BASEPRI, r3 800ccf4: f3bf 8f6f isb sy 800ccf8: f3bf 8f4f dsb sy 800ccfc: 623b str r3, [r7, #32] } 800ccfe: bf00 nop 800cd00: bf00 nop 800cd02: e7fd b.n 800cd00 /* Check this really is a semaphore, in which case the item size will be 0. */ configASSERT( pxQueue->uxItemSize == 0 ); 800cd04: 6afb ldr r3, [r7, #44] @ 0x2c 800cd06: 6c1b ldr r3, [r3, #64] @ 0x40 800cd08: 2b00 cmp r3, #0 800cd0a: d00b beq.n 800cd24 __asm volatile 800cd0c: f04f 0350 mov.w r3, #80 @ 0x50 800cd10: f383 8811 msr BASEPRI, r3 800cd14: f3bf 8f6f isb sy 800cd18: f3bf 8f4f dsb sy 800cd1c: 61fb str r3, [r7, #28] } 800cd1e: bf00 nop 800cd20: bf00 nop 800cd22: e7fd b.n 800cd20 /* Cannot block if the scheduler is suspended. */ #if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) ) { configASSERT( !( ( xTaskGetSchedulerState() == taskSCHEDULER_SUSPENDED ) && ( xTicksToWait != 0 ) ) ); 800cd24: f001 f85e bl 800dde4 800cd28: 4603 mov r3, r0 800cd2a: 2b00 cmp r3, #0 800cd2c: d102 bne.n 800cd34 800cd2e: 683b ldr r3, [r7, #0] 800cd30: 2b00 cmp r3, #0 800cd32: d101 bne.n 800cd38 800cd34: 2301 movs r3, #1 800cd36: e000 b.n 800cd3a 800cd38: 2300 movs r3, #0 800cd3a: 2b00 cmp r3, #0 800cd3c: d10b bne.n 800cd56 __asm volatile 800cd3e: f04f 0350 mov.w r3, #80 @ 0x50 800cd42: f383 8811 msr BASEPRI, r3 800cd46: f3bf 8f6f isb sy 800cd4a: f3bf 8f4f dsb sy 800cd4e: 61bb str r3, [r7, #24] } 800cd50: bf00 nop 800cd52: bf00 nop 800cd54: e7fd b.n 800cd52 /*lint -save -e904 This function relaxes the coding standard somewhat to allow return statements within the function itself. This is done in the interest of execution time efficiency. */ for( ;; ) { taskENTER_CRITICAL(); 800cd56: f001 ffb7 bl 800ecc8 { /* Semaphores are queues with an item size of 0, and where the number of messages in the queue is the semaphore's count value. */ const UBaseType_t uxSemaphoreCount = pxQueue->uxMessagesWaiting; 800cd5a: 6afb ldr r3, [r7, #44] @ 0x2c 800cd5c: 6b9b ldr r3, [r3, #56] @ 0x38 800cd5e: 62bb str r3, [r7, #40] @ 0x28 /* Is there data in the queue now? To be running the calling task must be the highest priority task wanting to access the queue. */ if( uxSemaphoreCount > ( UBaseType_t ) 0 ) 800cd60: 6abb ldr r3, [r7, #40] @ 0x28 800cd62: 2b00 cmp r3, #0 800cd64: d024 beq.n 800cdb0 { traceQUEUE_RECEIVE( pxQueue ); /* Semaphores are queues with a data size of zero and where the messages waiting is the semaphore's count. Reduce the count. */ pxQueue->uxMessagesWaiting = uxSemaphoreCount - ( UBaseType_t ) 1; 800cd66: 6abb ldr r3, [r7, #40] @ 0x28 800cd68: 1e5a subs r2, r3, #1 800cd6a: 6afb ldr r3, [r7, #44] @ 0x2c 800cd6c: 639a str r2, [r3, #56] @ 0x38 #if ( configUSE_MUTEXES == 1 ) { if( pxQueue->uxQueueType == queueQUEUE_IS_MUTEX ) 800cd6e: 6afb ldr r3, [r7, #44] @ 0x2c 800cd70: 681b ldr r3, [r3, #0] 800cd72: 2b00 cmp r3, #0 800cd74: d104 bne.n 800cd80 { /* Record the information required to implement priority inheritance should it become necessary. */ pxQueue->u.xSemaphore.xMutexHolder = pvTaskIncrementMutexHeldCount(); 800cd76: f001 f9af bl 800e0d8 800cd7a: 4602 mov r2, r0 800cd7c: 6afb ldr r3, [r7, #44] @ 0x2c 800cd7e: 609a str r2, [r3, #8] } #endif /* configUSE_MUTEXES */ /* Check to see if other tasks are blocked waiting to give the semaphore, and if so, unblock the highest priority such task. */ if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE ) 800cd80: 6afb ldr r3, [r7, #44] @ 0x2c 800cd82: 691b ldr r3, [r3, #16] 800cd84: 2b00 cmp r3, #0 800cd86: d00f beq.n 800cda8 { if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE ) 800cd88: 6afb ldr r3, [r7, #44] @ 0x2c 800cd8a: 3310 adds r3, #16 800cd8c: 4618 mov r0, r3 800cd8e: f000 fe69 bl 800da64 800cd92: 4603 mov r3, r0 800cd94: 2b00 cmp r3, #0 800cd96: d007 beq.n 800cda8 { queueYIELD_IF_USING_PREEMPTION(); 800cd98: 4b54 ldr r3, [pc, #336] @ (800ceec ) 800cd9a: f04f 5280 mov.w r2, #268435456 @ 0x10000000 800cd9e: 601a str r2, [r3, #0] 800cda0: f3bf 8f4f dsb sy 800cda4: f3bf 8f6f isb sy else { mtCOVERAGE_TEST_MARKER(); } taskEXIT_CRITICAL(); 800cda8: f001 ffc0 bl 800ed2c return pdPASS; 800cdac: 2301 movs r3, #1 800cdae: e098 b.n 800cee2 } else { if( xTicksToWait == ( TickType_t ) 0 ) 800cdb0: 683b ldr r3, [r7, #0] 800cdb2: 2b00 cmp r3, #0 800cdb4: d112 bne.n 800cddc /* For inheritance to have occurred there must have been an initial timeout, and an adjusted timeout cannot become 0, as if it were 0 the function would have exited. */ #if( configUSE_MUTEXES == 1 ) { configASSERT( xInheritanceOccurred == pdFALSE ); 800cdb6: 6b3b ldr r3, [r7, #48] @ 0x30 800cdb8: 2b00 cmp r3, #0 800cdba: d00b beq.n 800cdd4 __asm volatile 800cdbc: f04f 0350 mov.w r3, #80 @ 0x50 800cdc0: f383 8811 msr BASEPRI, r3 800cdc4: f3bf 8f6f isb sy 800cdc8: f3bf 8f4f dsb sy 800cdcc: 617b str r3, [r7, #20] } 800cdce: bf00 nop 800cdd0: bf00 nop 800cdd2: e7fd b.n 800cdd0 } #endif /* configUSE_MUTEXES */ /* The semaphore count was 0 and no block time is specified (or the block time has expired) so exit now. */ taskEXIT_CRITICAL(); 800cdd4: f001 ffaa bl 800ed2c traceQUEUE_RECEIVE_FAILED( pxQueue ); return errQUEUE_EMPTY; 800cdd8: 2300 movs r3, #0 800cdda: e082 b.n 800cee2 } else if( xEntryTimeSet == pdFALSE ) 800cddc: 6b7b ldr r3, [r7, #52] @ 0x34 800cdde: 2b00 cmp r3, #0 800cde0: d106 bne.n 800cdf0 { /* The semaphore count was 0 and a block time was specified so configure the timeout structure ready to block. */ vTaskInternalSetTimeOutState( &xTimeOut ); 800cde2: f107 030c add.w r3, r7, #12 800cde6: 4618 mov r0, r3 800cde8: f000 fea0 bl 800db2c xEntryTimeSet = pdTRUE; 800cdec: 2301 movs r3, #1 800cdee: 637b str r3, [r7, #52] @ 0x34 /* Entry time was already set. */ mtCOVERAGE_TEST_MARKER(); } } } taskEXIT_CRITICAL(); 800cdf0: f001 ff9c bl 800ed2c /* Interrupts and other tasks can give to and take from the semaphore now the critical section has been exited. */ vTaskSuspendAll(); 800cdf4: f000 fc10 bl 800d618 prvLockQueue( pxQueue ); 800cdf8: f001 ff66 bl 800ecc8 800cdfc: 6afb ldr r3, [r7, #44] @ 0x2c 800cdfe: f893 3044 ldrb.w r3, [r3, #68] @ 0x44 800ce02: b25b sxtb r3, r3 800ce04: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff 800ce08: d103 bne.n 800ce12 800ce0a: 6afb ldr r3, [r7, #44] @ 0x2c 800ce0c: 2200 movs r2, #0 800ce0e: f883 2044 strb.w r2, [r3, #68] @ 0x44 800ce12: 6afb ldr r3, [r7, #44] @ 0x2c 800ce14: f893 3045 ldrb.w r3, [r3, #69] @ 0x45 800ce18: b25b sxtb r3, r3 800ce1a: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff 800ce1e: d103 bne.n 800ce28 800ce20: 6afb ldr r3, [r7, #44] @ 0x2c 800ce22: 2200 movs r2, #0 800ce24: f883 2045 strb.w r2, [r3, #69] @ 0x45 800ce28: f001 ff80 bl 800ed2c /* Update the timeout state to see if it has expired yet. */ if( xTaskCheckForTimeOut( &xTimeOut, &xTicksToWait ) == pdFALSE ) 800ce2c: 463a mov r2, r7 800ce2e: f107 030c add.w r3, r7, #12 800ce32: 4611 mov r1, r2 800ce34: 4618 mov r0, r3 800ce36: f000 fe8f bl 800db58 800ce3a: 4603 mov r3, r0 800ce3c: 2b00 cmp r3, #0 800ce3e: d132 bne.n 800cea6 { /* A block time is specified and not expired. If the semaphore count is 0 then enter the Blocked state to wait for a semaphore to become available. As semaphores are implemented with queues the queue being empty is equivalent to the semaphore count being 0. */ if( prvIsQueueEmpty( pxQueue ) != pdFALSE ) 800ce40: 6af8 ldr r0, [r7, #44] @ 0x2c 800ce42: f000 f94f bl 800d0e4 800ce46: 4603 mov r3, r0 800ce48: 2b00 cmp r3, #0 800ce4a: d026 beq.n 800ce9a { traceBLOCKING_ON_QUEUE_RECEIVE( pxQueue ); #if ( configUSE_MUTEXES == 1 ) { if( pxQueue->uxQueueType == queueQUEUE_IS_MUTEX ) 800ce4c: 6afb ldr r3, [r7, #44] @ 0x2c 800ce4e: 681b ldr r3, [r3, #0] 800ce50: 2b00 cmp r3, #0 800ce52: d109 bne.n 800ce68 { taskENTER_CRITICAL(); 800ce54: f001 ff38 bl 800ecc8 { xInheritanceOccurred = xTaskPriorityInherit( pxQueue->u.xSemaphore.xMutexHolder ); 800ce58: 6afb ldr r3, [r7, #44] @ 0x2c 800ce5a: 689b ldr r3, [r3, #8] 800ce5c: 4618 mov r0, r3 800ce5e: f000 ffdf bl 800de20 800ce62: 6338 str r0, [r7, #48] @ 0x30 } taskEXIT_CRITICAL(); 800ce64: f001 ff62 bl 800ed2c mtCOVERAGE_TEST_MARKER(); } } #endif vTaskPlaceOnEventList( &( pxQueue->xTasksWaitingToReceive ), xTicksToWait ); 800ce68: 6afb ldr r3, [r7, #44] @ 0x2c 800ce6a: 3324 adds r3, #36 @ 0x24 800ce6c: 683a ldr r2, [r7, #0] 800ce6e: 4611 mov r1, r2 800ce70: 4618 mov r0, r3 800ce72: f000 fda5 bl 800d9c0 prvUnlockQueue( pxQueue ); 800ce76: 6af8 ldr r0, [r7, #44] @ 0x2c 800ce78: f000 f8e2 bl 800d040 if( xTaskResumeAll() == pdFALSE ) 800ce7c: f000 fbda bl 800d634 800ce80: 4603 mov r3, r0 800ce82: 2b00 cmp r3, #0 800ce84: f47f af67 bne.w 800cd56 { portYIELD_WITHIN_API(); 800ce88: 4b18 ldr r3, [pc, #96] @ (800ceec ) 800ce8a: f04f 5280 mov.w r2, #268435456 @ 0x10000000 800ce8e: 601a str r2, [r3, #0] 800ce90: f3bf 8f4f dsb sy 800ce94: f3bf 8f6f isb sy 800ce98: e75d b.n 800cd56 } else { /* There was no timeout and the semaphore count was not 0, so attempt to take the semaphore again. */ prvUnlockQueue( pxQueue ); 800ce9a: 6af8 ldr r0, [r7, #44] @ 0x2c 800ce9c: f000 f8d0 bl 800d040 ( void ) xTaskResumeAll(); 800cea0: f000 fbc8 bl 800d634 800cea4: e757 b.n 800cd56 } } else { /* Timed out. */ prvUnlockQueue( pxQueue ); 800cea6: 6af8 ldr r0, [r7, #44] @ 0x2c 800cea8: f000 f8ca bl 800d040 ( void ) xTaskResumeAll(); 800ceac: f000 fbc2 bl 800d634 /* If the semaphore count is 0 exit now as the timeout has expired. Otherwise return to attempt to take the semaphore that is known to be available. As semaphores are implemented by queues the queue being empty is equivalent to the semaphore count being 0. */ if( prvIsQueueEmpty( pxQueue ) != pdFALSE ) 800ceb0: 6af8 ldr r0, [r7, #44] @ 0x2c 800ceb2: f000 f917 bl 800d0e4 800ceb6: 4603 mov r3, r0 800ceb8: 2b00 cmp r3, #0 800ceba: f43f af4c beq.w 800cd56 #if ( configUSE_MUTEXES == 1 ) { /* xInheritanceOccurred could only have be set if pxQueue->uxQueueType == queueQUEUE_IS_MUTEX so no need to test the mutex type again to check it is actually a mutex. */ if( xInheritanceOccurred != pdFALSE ) 800cebe: 6b3b ldr r3, [r7, #48] @ 0x30 800cec0: 2b00 cmp r3, #0 800cec2: d00d beq.n 800cee0 { taskENTER_CRITICAL(); 800cec4: f001 ff00 bl 800ecc8 /* This task blocking on the mutex caused another task to inherit this task's priority. Now this task has timed out the priority should be disinherited again, but only as low as the next highest priority task that is waiting for the same mutex. */ uxHighestWaitingPriority = prvGetDisinheritPriorityAfterTimeout( pxQueue ); 800cec8: 6af8 ldr r0, [r7, #44] @ 0x2c 800ceca: f000 f811 bl 800cef0 800cece: 6278 str r0, [r7, #36] @ 0x24 vTaskPriorityDisinheritAfterTimeout( pxQueue->u.xSemaphore.xMutexHolder, uxHighestWaitingPriority ); 800ced0: 6afb ldr r3, [r7, #44] @ 0x2c 800ced2: 689b ldr r3, [r3, #8] 800ced4: 6a79 ldr r1, [r7, #36] @ 0x24 800ced6: 4618 mov r0, r3 800ced8: f001 f87a bl 800dfd0 } taskEXIT_CRITICAL(); 800cedc: f001 ff26 bl 800ed2c } } #endif /* configUSE_MUTEXES */ traceQUEUE_RECEIVE_FAILED( pxQueue ); return errQUEUE_EMPTY; 800cee0: 2300 movs r3, #0 { mtCOVERAGE_TEST_MARKER(); } } } /*lint -restore */ } 800cee2: 4618 mov r0, r3 800cee4: 3738 adds r7, #56 @ 0x38 800cee6: 46bd mov sp, r7 800cee8: bd80 pop {r7, pc} 800ceea: bf00 nop 800ceec: e000ed04 .word 0xe000ed04 0800cef0 : /*-----------------------------------------------------------*/ #if( configUSE_MUTEXES == 1 ) static UBaseType_t prvGetDisinheritPriorityAfterTimeout( const Queue_t * const pxQueue ) { 800cef0: b480 push {r7} 800cef2: b085 sub sp, #20 800cef4: af00 add r7, sp, #0 800cef6: 6078 str r0, [r7, #4] priority, but the waiting task times out, then the holder should disinherit the priority - but only down to the highest priority of any other tasks that are waiting for the same mutex. For this purpose, return the priority of the highest priority task that is waiting for the mutex. */ if( listCURRENT_LIST_LENGTH( &( pxQueue->xTasksWaitingToReceive ) ) > 0U ) 800cef8: 687b ldr r3, [r7, #4] 800cefa: 6a5b ldr r3, [r3, #36] @ 0x24 800cefc: 2b00 cmp r3, #0 800cefe: d006 beq.n 800cf0e { uxHighestPriorityOfWaitingTasks = ( UBaseType_t ) configMAX_PRIORITIES - ( UBaseType_t ) listGET_ITEM_VALUE_OF_HEAD_ENTRY( &( pxQueue->xTasksWaitingToReceive ) ); 800cf00: 687b ldr r3, [r7, #4] 800cf02: 6b1b ldr r3, [r3, #48] @ 0x30 800cf04: 681b ldr r3, [r3, #0] 800cf06: f1c3 0338 rsb r3, r3, #56 @ 0x38 800cf0a: 60fb str r3, [r7, #12] 800cf0c: e001 b.n 800cf12 } else { uxHighestPriorityOfWaitingTasks = tskIDLE_PRIORITY; 800cf0e: 2300 movs r3, #0 800cf10: 60fb str r3, [r7, #12] } return uxHighestPriorityOfWaitingTasks; 800cf12: 68fb ldr r3, [r7, #12] } 800cf14: 4618 mov r0, r3 800cf16: 3714 adds r7, #20 800cf18: 46bd mov sp, r7 800cf1a: f85d 7b04 ldr.w r7, [sp], #4 800cf1e: 4770 bx lr 0800cf20 : #endif /* configUSE_MUTEXES */ /*-----------------------------------------------------------*/ static BaseType_t prvCopyDataToQueue( Queue_t * const pxQueue, const void *pvItemToQueue, const BaseType_t xPosition ) { 800cf20: b580 push {r7, lr} 800cf22: b086 sub sp, #24 800cf24: af00 add r7, sp, #0 800cf26: 60f8 str r0, [r7, #12] 800cf28: 60b9 str r1, [r7, #8] 800cf2a: 607a str r2, [r7, #4] BaseType_t xReturn = pdFALSE; 800cf2c: 2300 movs r3, #0 800cf2e: 617b str r3, [r7, #20] UBaseType_t uxMessagesWaiting; /* This function is called from a critical section. */ uxMessagesWaiting = pxQueue->uxMessagesWaiting; 800cf30: 68fb ldr r3, [r7, #12] 800cf32: 6b9b ldr r3, [r3, #56] @ 0x38 800cf34: 613b str r3, [r7, #16] if( pxQueue->uxItemSize == ( UBaseType_t ) 0 ) 800cf36: 68fb ldr r3, [r7, #12] 800cf38: 6c1b ldr r3, [r3, #64] @ 0x40 800cf3a: 2b00 cmp r3, #0 800cf3c: d10d bne.n 800cf5a { #if ( configUSE_MUTEXES == 1 ) { if( pxQueue->uxQueueType == queueQUEUE_IS_MUTEX ) 800cf3e: 68fb ldr r3, [r7, #12] 800cf40: 681b ldr r3, [r3, #0] 800cf42: 2b00 cmp r3, #0 800cf44: d14d bne.n 800cfe2 { /* The mutex is no longer being held. */ xReturn = xTaskPriorityDisinherit( pxQueue->u.xSemaphore.xMutexHolder ); 800cf46: 68fb ldr r3, [r7, #12] 800cf48: 689b ldr r3, [r3, #8] 800cf4a: 4618 mov r0, r3 800cf4c: f000 ffd0 bl 800def0 800cf50: 6178 str r0, [r7, #20] pxQueue->u.xSemaphore.xMutexHolder = NULL; 800cf52: 68fb ldr r3, [r7, #12] 800cf54: 2200 movs r2, #0 800cf56: 609a str r2, [r3, #8] 800cf58: e043 b.n 800cfe2 mtCOVERAGE_TEST_MARKER(); } } #endif /* configUSE_MUTEXES */ } else if( xPosition == queueSEND_TO_BACK ) 800cf5a: 687b ldr r3, [r7, #4] 800cf5c: 2b00 cmp r3, #0 800cf5e: d119 bne.n 800cf94 { ( void ) memcpy( ( void * ) pxQueue->pcWriteTo, pvItemToQueue, ( size_t ) pxQueue->uxItemSize ); /*lint !e961 !e418 !e9087 MISRA exception as the casts are only redundant for some ports, plus previous logic ensures a null pointer can only be passed to memcpy() if the copy size is 0. Cast to void required by function signature and safe as no alignment requirement and copy length specified in bytes. */ 800cf60: 68fb ldr r3, [r7, #12] 800cf62: 6858 ldr r0, [r3, #4] 800cf64: 68fb ldr r3, [r7, #12] 800cf66: 6c1b ldr r3, [r3, #64] @ 0x40 800cf68: 461a mov r2, r3 800cf6a: 68b9 ldr r1, [r7, #8] 800cf6c: f003 fbd7 bl 801071e pxQueue->pcWriteTo += pxQueue->uxItemSize; /*lint !e9016 Pointer arithmetic on char types ok, especially in this use case where it is the clearest way of conveying intent. */ 800cf70: 68fb ldr r3, [r7, #12] 800cf72: 685a ldr r2, [r3, #4] 800cf74: 68fb ldr r3, [r7, #12] 800cf76: 6c1b ldr r3, [r3, #64] @ 0x40 800cf78: 441a add r2, r3 800cf7a: 68fb ldr r3, [r7, #12] 800cf7c: 605a str r2, [r3, #4] if( pxQueue->pcWriteTo >= pxQueue->u.xQueue.pcTail ) /*lint !e946 MISRA exception justified as comparison of pointers is the cleanest solution. */ 800cf7e: 68fb ldr r3, [r7, #12] 800cf80: 685a ldr r2, [r3, #4] 800cf82: 68fb ldr r3, [r7, #12] 800cf84: 689b ldr r3, [r3, #8] 800cf86: 429a cmp r2, r3 800cf88: d32b bcc.n 800cfe2 { pxQueue->pcWriteTo = pxQueue->pcHead; 800cf8a: 68fb ldr r3, [r7, #12] 800cf8c: 681a ldr r2, [r3, #0] 800cf8e: 68fb ldr r3, [r7, #12] 800cf90: 605a str r2, [r3, #4] 800cf92: e026 b.n 800cfe2 mtCOVERAGE_TEST_MARKER(); } } else { ( void ) memcpy( ( void * ) pxQueue->u.xQueue.pcReadFrom, pvItemToQueue, ( size_t ) pxQueue->uxItemSize ); /*lint !e961 !e9087 !e418 MISRA exception as the casts are only redundant for some ports. Cast to void required by function signature and safe as no alignment requirement and copy length specified in bytes. Assert checks null pointer only used when length is 0. */ 800cf94: 68fb ldr r3, [r7, #12] 800cf96: 68d8 ldr r0, [r3, #12] 800cf98: 68fb ldr r3, [r7, #12] 800cf9a: 6c1b ldr r3, [r3, #64] @ 0x40 800cf9c: 461a mov r2, r3 800cf9e: 68b9 ldr r1, [r7, #8] 800cfa0: f003 fbbd bl 801071e pxQueue->u.xQueue.pcReadFrom -= pxQueue->uxItemSize; 800cfa4: 68fb ldr r3, [r7, #12] 800cfa6: 68da ldr r2, [r3, #12] 800cfa8: 68fb ldr r3, [r7, #12] 800cfaa: 6c1b ldr r3, [r3, #64] @ 0x40 800cfac: 425b negs r3, r3 800cfae: 441a add r2, r3 800cfb0: 68fb ldr r3, [r7, #12] 800cfb2: 60da str r2, [r3, #12] if( pxQueue->u.xQueue.pcReadFrom < pxQueue->pcHead ) /*lint !e946 MISRA exception justified as comparison of pointers is the cleanest solution. */ 800cfb4: 68fb ldr r3, [r7, #12] 800cfb6: 68da ldr r2, [r3, #12] 800cfb8: 68fb ldr r3, [r7, #12] 800cfba: 681b ldr r3, [r3, #0] 800cfbc: 429a cmp r2, r3 800cfbe: d207 bcs.n 800cfd0 { pxQueue->u.xQueue.pcReadFrom = ( pxQueue->u.xQueue.pcTail - pxQueue->uxItemSize ); 800cfc0: 68fb ldr r3, [r7, #12] 800cfc2: 689a ldr r2, [r3, #8] 800cfc4: 68fb ldr r3, [r7, #12] 800cfc6: 6c1b ldr r3, [r3, #64] @ 0x40 800cfc8: 425b negs r3, r3 800cfca: 441a add r2, r3 800cfcc: 68fb ldr r3, [r7, #12] 800cfce: 60da str r2, [r3, #12] else { mtCOVERAGE_TEST_MARKER(); } if( xPosition == queueOVERWRITE ) 800cfd0: 687b ldr r3, [r7, #4] 800cfd2: 2b02 cmp r3, #2 800cfd4: d105 bne.n 800cfe2 { if( uxMessagesWaiting > ( UBaseType_t ) 0 ) 800cfd6: 693b ldr r3, [r7, #16] 800cfd8: 2b00 cmp r3, #0 800cfda: d002 beq.n 800cfe2 { /* An item is not being added but overwritten, so subtract one from the recorded number of items in the queue so when one is added again below the number of recorded items remains correct. */ --uxMessagesWaiting; 800cfdc: 693b ldr r3, [r7, #16] 800cfde: 3b01 subs r3, #1 800cfe0: 613b str r3, [r7, #16] { mtCOVERAGE_TEST_MARKER(); } } pxQueue->uxMessagesWaiting = uxMessagesWaiting + ( UBaseType_t ) 1; 800cfe2: 693b ldr r3, [r7, #16] 800cfe4: 1c5a adds r2, r3, #1 800cfe6: 68fb ldr r3, [r7, #12] 800cfe8: 639a str r2, [r3, #56] @ 0x38 return xReturn; 800cfea: 697b ldr r3, [r7, #20] } 800cfec: 4618 mov r0, r3 800cfee: 3718 adds r7, #24 800cff0: 46bd mov sp, r7 800cff2: bd80 pop {r7, pc} 0800cff4 : /*-----------------------------------------------------------*/ static void prvCopyDataFromQueue( Queue_t * const pxQueue, void * const pvBuffer ) { 800cff4: b580 push {r7, lr} 800cff6: b082 sub sp, #8 800cff8: af00 add r7, sp, #0 800cffa: 6078 str r0, [r7, #4] 800cffc: 6039 str r1, [r7, #0] if( pxQueue->uxItemSize != ( UBaseType_t ) 0 ) 800cffe: 687b ldr r3, [r7, #4] 800d000: 6c1b ldr r3, [r3, #64] @ 0x40 800d002: 2b00 cmp r3, #0 800d004: d018 beq.n 800d038 { pxQueue->u.xQueue.pcReadFrom += pxQueue->uxItemSize; /*lint !e9016 Pointer arithmetic on char types ok, especially in this use case where it is the clearest way of conveying intent. */ 800d006: 687b ldr r3, [r7, #4] 800d008: 68da ldr r2, [r3, #12] 800d00a: 687b ldr r3, [r7, #4] 800d00c: 6c1b ldr r3, [r3, #64] @ 0x40 800d00e: 441a add r2, r3 800d010: 687b ldr r3, [r7, #4] 800d012: 60da str r2, [r3, #12] if( pxQueue->u.xQueue.pcReadFrom >= pxQueue->u.xQueue.pcTail ) /*lint !e946 MISRA exception justified as use of the relational operator is the cleanest solutions. */ 800d014: 687b ldr r3, [r7, #4] 800d016: 68da ldr r2, [r3, #12] 800d018: 687b ldr r3, [r7, #4] 800d01a: 689b ldr r3, [r3, #8] 800d01c: 429a cmp r2, r3 800d01e: d303 bcc.n 800d028 { pxQueue->u.xQueue.pcReadFrom = pxQueue->pcHead; 800d020: 687b ldr r3, [r7, #4] 800d022: 681a ldr r2, [r3, #0] 800d024: 687b ldr r3, [r7, #4] 800d026: 60da str r2, [r3, #12] } else { mtCOVERAGE_TEST_MARKER(); } ( void ) memcpy( ( void * ) pvBuffer, ( void * ) pxQueue->u.xQueue.pcReadFrom, ( size_t ) pxQueue->uxItemSize ); /*lint !e961 !e418 !e9087 MISRA exception as the casts are only redundant for some ports. Also previous logic ensures a null pointer can only be passed to memcpy() when the count is 0. Cast to void required by function signature and safe as no alignment requirement and copy length specified in bytes. */ 800d028: 687b ldr r3, [r7, #4] 800d02a: 68d9 ldr r1, [r3, #12] 800d02c: 687b ldr r3, [r7, #4] 800d02e: 6c1b ldr r3, [r3, #64] @ 0x40 800d030: 461a mov r2, r3 800d032: 6838 ldr r0, [r7, #0] 800d034: f003 fb73 bl 801071e } } 800d038: bf00 nop 800d03a: 3708 adds r7, #8 800d03c: 46bd mov sp, r7 800d03e: bd80 pop {r7, pc} 0800d040 : /*-----------------------------------------------------------*/ static void prvUnlockQueue( Queue_t * const pxQueue ) { 800d040: b580 push {r7, lr} 800d042: b084 sub sp, #16 800d044: af00 add r7, sp, #0 800d046: 6078 str r0, [r7, #4] /* The lock counts contains the number of extra data items placed or removed from the queue while the queue was locked. When a queue is locked items can be added or removed, but the event lists cannot be updated. */ taskENTER_CRITICAL(); 800d048: f001 fe3e bl 800ecc8 { int8_t cTxLock = pxQueue->cTxLock; 800d04c: 687b ldr r3, [r7, #4] 800d04e: f893 3045 ldrb.w r3, [r3, #69] @ 0x45 800d052: 73fb strb r3, [r7, #15] /* See if data was added to the queue while it was locked. */ while( cTxLock > queueLOCKED_UNMODIFIED ) 800d054: e011 b.n 800d07a } #else /* configUSE_QUEUE_SETS */ { /* Tasks that are removed from the event list will get added to the pending ready list as the scheduler is still suspended. */ if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE ) 800d056: 687b ldr r3, [r7, #4] 800d058: 6a5b ldr r3, [r3, #36] @ 0x24 800d05a: 2b00 cmp r3, #0 800d05c: d012 beq.n 800d084 { if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE ) 800d05e: 687b ldr r3, [r7, #4] 800d060: 3324 adds r3, #36 @ 0x24 800d062: 4618 mov r0, r3 800d064: f000 fcfe bl 800da64 800d068: 4603 mov r3, r0 800d06a: 2b00 cmp r3, #0 800d06c: d001 beq.n 800d072 { /* The task waiting has a higher priority so record that a context switch is required. */ vTaskMissedYield(); 800d06e: f000 fdd7 bl 800dc20 break; } } #endif /* configUSE_QUEUE_SETS */ --cTxLock; 800d072: 7bfb ldrb r3, [r7, #15] 800d074: 3b01 subs r3, #1 800d076: b2db uxtb r3, r3 800d078: 73fb strb r3, [r7, #15] while( cTxLock > queueLOCKED_UNMODIFIED ) 800d07a: f997 300f ldrsb.w r3, [r7, #15] 800d07e: 2b00 cmp r3, #0 800d080: dce9 bgt.n 800d056 800d082: e000 b.n 800d086 break; 800d084: bf00 nop } pxQueue->cTxLock = queueUNLOCKED; 800d086: 687b ldr r3, [r7, #4] 800d088: 22ff movs r2, #255 @ 0xff 800d08a: f883 2045 strb.w r2, [r3, #69] @ 0x45 } taskEXIT_CRITICAL(); 800d08e: f001 fe4d bl 800ed2c /* Do the same for the Rx lock. */ taskENTER_CRITICAL(); 800d092: f001 fe19 bl 800ecc8 { int8_t cRxLock = pxQueue->cRxLock; 800d096: 687b ldr r3, [r7, #4] 800d098: f893 3044 ldrb.w r3, [r3, #68] @ 0x44 800d09c: 73bb strb r3, [r7, #14] while( cRxLock > queueLOCKED_UNMODIFIED ) 800d09e: e011 b.n 800d0c4 { if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE ) 800d0a0: 687b ldr r3, [r7, #4] 800d0a2: 691b ldr r3, [r3, #16] 800d0a4: 2b00 cmp r3, #0 800d0a6: d012 beq.n 800d0ce { if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE ) 800d0a8: 687b ldr r3, [r7, #4] 800d0aa: 3310 adds r3, #16 800d0ac: 4618 mov r0, r3 800d0ae: f000 fcd9 bl 800da64 800d0b2: 4603 mov r3, r0 800d0b4: 2b00 cmp r3, #0 800d0b6: d001 beq.n 800d0bc { vTaskMissedYield(); 800d0b8: f000 fdb2 bl 800dc20 else { mtCOVERAGE_TEST_MARKER(); } --cRxLock; 800d0bc: 7bbb ldrb r3, [r7, #14] 800d0be: 3b01 subs r3, #1 800d0c0: b2db uxtb r3, r3 800d0c2: 73bb strb r3, [r7, #14] while( cRxLock > queueLOCKED_UNMODIFIED ) 800d0c4: f997 300e ldrsb.w r3, [r7, #14] 800d0c8: 2b00 cmp r3, #0 800d0ca: dce9 bgt.n 800d0a0 800d0cc: e000 b.n 800d0d0 } else { break; 800d0ce: bf00 nop } } pxQueue->cRxLock = queueUNLOCKED; 800d0d0: 687b ldr r3, [r7, #4] 800d0d2: 22ff movs r2, #255 @ 0xff 800d0d4: f883 2044 strb.w r2, [r3, #68] @ 0x44 } taskEXIT_CRITICAL(); 800d0d8: f001 fe28 bl 800ed2c } 800d0dc: bf00 nop 800d0de: 3710 adds r7, #16 800d0e0: 46bd mov sp, r7 800d0e2: bd80 pop {r7, pc} 0800d0e4 : /*-----------------------------------------------------------*/ static BaseType_t prvIsQueueEmpty( const Queue_t *pxQueue ) { 800d0e4: b580 push {r7, lr} 800d0e6: b084 sub sp, #16 800d0e8: af00 add r7, sp, #0 800d0ea: 6078 str r0, [r7, #4] BaseType_t xReturn; taskENTER_CRITICAL(); 800d0ec: f001 fdec bl 800ecc8 { if( pxQueue->uxMessagesWaiting == ( UBaseType_t ) 0 ) 800d0f0: 687b ldr r3, [r7, #4] 800d0f2: 6b9b ldr r3, [r3, #56] @ 0x38 800d0f4: 2b00 cmp r3, #0 800d0f6: d102 bne.n 800d0fe { xReturn = pdTRUE; 800d0f8: 2301 movs r3, #1 800d0fa: 60fb str r3, [r7, #12] 800d0fc: e001 b.n 800d102 } else { xReturn = pdFALSE; 800d0fe: 2300 movs r3, #0 800d100: 60fb str r3, [r7, #12] } } taskEXIT_CRITICAL(); 800d102: f001 fe13 bl 800ed2c return xReturn; 800d106: 68fb ldr r3, [r7, #12] } 800d108: 4618 mov r0, r3 800d10a: 3710 adds r7, #16 800d10c: 46bd mov sp, r7 800d10e: bd80 pop {r7, pc} 0800d110 : return xReturn; } /*lint !e818 xQueue could not be pointer to const because it is a typedef. */ /*-----------------------------------------------------------*/ static BaseType_t prvIsQueueFull( const Queue_t *pxQueue ) { 800d110: b580 push {r7, lr} 800d112: b084 sub sp, #16 800d114: af00 add r7, sp, #0 800d116: 6078 str r0, [r7, #4] BaseType_t xReturn; taskENTER_CRITICAL(); 800d118: f001 fdd6 bl 800ecc8 { if( pxQueue->uxMessagesWaiting == pxQueue->uxLength ) 800d11c: 687b ldr r3, [r7, #4] 800d11e: 6b9a ldr r2, [r3, #56] @ 0x38 800d120: 687b ldr r3, [r7, #4] 800d122: 6bdb ldr r3, [r3, #60] @ 0x3c 800d124: 429a cmp r2, r3 800d126: d102 bne.n 800d12e { xReturn = pdTRUE; 800d128: 2301 movs r3, #1 800d12a: 60fb str r3, [r7, #12] 800d12c: e001 b.n 800d132 } else { xReturn = pdFALSE; 800d12e: 2300 movs r3, #0 800d130: 60fb str r3, [r7, #12] } } taskEXIT_CRITICAL(); 800d132: f001 fdfb bl 800ed2c return xReturn; 800d136: 68fb ldr r3, [r7, #12] } 800d138: 4618 mov r0, r3 800d13a: 3710 adds r7, #16 800d13c: 46bd mov sp, r7 800d13e: bd80 pop {r7, pc} 0800d140 : /*-----------------------------------------------------------*/ #if ( configQUEUE_REGISTRY_SIZE > 0 ) void vQueueAddToRegistry( QueueHandle_t xQueue, const char *pcQueueName ) /*lint !e971 Unqualified char types are allowed for strings and single characters only. */ { 800d140: b480 push {r7} 800d142: b085 sub sp, #20 800d144: af00 add r7, sp, #0 800d146: 6078 str r0, [r7, #4] 800d148: 6039 str r1, [r7, #0] UBaseType_t ux; /* See if there is an empty space in the registry. A NULL name denotes a free slot. */ for( ux = ( UBaseType_t ) 0U; ux < ( UBaseType_t ) configQUEUE_REGISTRY_SIZE; ux++ ) 800d14a: 2300 movs r3, #0 800d14c: 60fb str r3, [r7, #12] 800d14e: e014 b.n 800d17a { if( xQueueRegistry[ ux ].pcQueueName == NULL ) 800d150: 4a0f ldr r2, [pc, #60] @ (800d190 ) 800d152: 68fb ldr r3, [r7, #12] 800d154: f852 3033 ldr.w r3, [r2, r3, lsl #3] 800d158: 2b00 cmp r3, #0 800d15a: d10b bne.n 800d174 { /* Store the information on this queue. */ xQueueRegistry[ ux ].pcQueueName = pcQueueName; 800d15c: 490c ldr r1, [pc, #48] @ (800d190 ) 800d15e: 68fb ldr r3, [r7, #12] 800d160: 683a ldr r2, [r7, #0] 800d162: f841 2033 str.w r2, [r1, r3, lsl #3] xQueueRegistry[ ux ].xHandle = xQueue; 800d166: 4a0a ldr r2, [pc, #40] @ (800d190 ) 800d168: 68fb ldr r3, [r7, #12] 800d16a: 00db lsls r3, r3, #3 800d16c: 4413 add r3, r2 800d16e: 687a ldr r2, [r7, #4] 800d170: 605a str r2, [r3, #4] traceQUEUE_REGISTRY_ADD( xQueue, pcQueueName ); break; 800d172: e006 b.n 800d182 for( ux = ( UBaseType_t ) 0U; ux < ( UBaseType_t ) configQUEUE_REGISTRY_SIZE; ux++ ) 800d174: 68fb ldr r3, [r7, #12] 800d176: 3301 adds r3, #1 800d178: 60fb str r3, [r7, #12] 800d17a: 68fb ldr r3, [r7, #12] 800d17c: 2b07 cmp r3, #7 800d17e: d9e7 bls.n 800d150 else { mtCOVERAGE_TEST_MARKER(); } } } 800d180: bf00 nop 800d182: bf00 nop 800d184: 3714 adds r7, #20 800d186: 46bd mov sp, r7 800d188: f85d 7b04 ldr.w r7, [sp], #4 800d18c: 4770 bx lr 800d18e: bf00 nop 800d190: 20002318 .word 0x20002318 0800d194 : /*-----------------------------------------------------------*/ #if ( configUSE_TIMERS == 1 ) void vQueueWaitForMessageRestricted( QueueHandle_t xQueue, TickType_t xTicksToWait, const BaseType_t xWaitIndefinitely ) { 800d194: b580 push {r7, lr} 800d196: b086 sub sp, #24 800d198: af00 add r7, sp, #0 800d19a: 60f8 str r0, [r7, #12] 800d19c: 60b9 str r1, [r7, #8] 800d19e: 607a str r2, [r7, #4] Queue_t * const pxQueue = xQueue; 800d1a0: 68fb ldr r3, [r7, #12] 800d1a2: 617b str r3, [r7, #20] will not actually cause the task to block, just place it on a blocked list. It will not block until the scheduler is unlocked - at which time a yield will be performed. If an item is added to the queue while the queue is locked, and the calling task blocks on the queue, then the calling task will be immediately unblocked when the queue is unlocked. */ prvLockQueue( pxQueue ); 800d1a4: f001 fd90 bl 800ecc8 800d1a8: 697b ldr r3, [r7, #20] 800d1aa: f893 3044 ldrb.w r3, [r3, #68] @ 0x44 800d1ae: b25b sxtb r3, r3 800d1b0: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff 800d1b4: d103 bne.n 800d1be 800d1b6: 697b ldr r3, [r7, #20] 800d1b8: 2200 movs r2, #0 800d1ba: f883 2044 strb.w r2, [r3, #68] @ 0x44 800d1be: 697b ldr r3, [r7, #20] 800d1c0: f893 3045 ldrb.w r3, [r3, #69] @ 0x45 800d1c4: b25b sxtb r3, r3 800d1c6: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff 800d1ca: d103 bne.n 800d1d4 800d1cc: 697b ldr r3, [r7, #20] 800d1ce: 2200 movs r2, #0 800d1d0: f883 2045 strb.w r2, [r3, #69] @ 0x45 800d1d4: f001 fdaa bl 800ed2c if( pxQueue->uxMessagesWaiting == ( UBaseType_t ) 0U ) 800d1d8: 697b ldr r3, [r7, #20] 800d1da: 6b9b ldr r3, [r3, #56] @ 0x38 800d1dc: 2b00 cmp r3, #0 800d1de: d106 bne.n 800d1ee { /* There is nothing in the queue, block for the specified period. */ vTaskPlaceOnEventListRestricted( &( pxQueue->xTasksWaitingToReceive ), xTicksToWait, xWaitIndefinitely ); 800d1e0: 697b ldr r3, [r7, #20] 800d1e2: 3324 adds r3, #36 @ 0x24 800d1e4: 687a ldr r2, [r7, #4] 800d1e6: 68b9 ldr r1, [r7, #8] 800d1e8: 4618 mov r0, r3 800d1ea: f000 fc0f bl 800da0c } else { mtCOVERAGE_TEST_MARKER(); } prvUnlockQueue( pxQueue ); 800d1ee: 6978 ldr r0, [r7, #20] 800d1f0: f7ff ff26 bl 800d040 } 800d1f4: bf00 nop 800d1f6: 3718 adds r7, #24 800d1f8: 46bd mov sp, r7 800d1fa: bd80 pop {r7, pc} 0800d1fc : const uint32_t ulStackDepth, void * const pvParameters, UBaseType_t uxPriority, StackType_t * const puxStackBuffer, StaticTask_t * const pxTaskBuffer ) { 800d1fc: b580 push {r7, lr} 800d1fe: b08e sub sp, #56 @ 0x38 800d200: af04 add r7, sp, #16 800d202: 60f8 str r0, [r7, #12] 800d204: 60b9 str r1, [r7, #8] 800d206: 607a str r2, [r7, #4] 800d208: 603b str r3, [r7, #0] TCB_t *pxNewTCB; TaskHandle_t xReturn; configASSERT( puxStackBuffer != NULL ); 800d20a: 6b7b ldr r3, [r7, #52] @ 0x34 800d20c: 2b00 cmp r3, #0 800d20e: d10b bne.n 800d228 __asm volatile 800d210: f04f 0350 mov.w r3, #80 @ 0x50 800d214: f383 8811 msr BASEPRI, r3 800d218: f3bf 8f6f isb sy 800d21c: f3bf 8f4f dsb sy 800d220: 623b str r3, [r7, #32] } 800d222: bf00 nop 800d224: bf00 nop 800d226: e7fd b.n 800d224 configASSERT( pxTaskBuffer != NULL ); 800d228: 6bbb ldr r3, [r7, #56] @ 0x38 800d22a: 2b00 cmp r3, #0 800d22c: d10b bne.n 800d246 __asm volatile 800d22e: f04f 0350 mov.w r3, #80 @ 0x50 800d232: f383 8811 msr BASEPRI, r3 800d236: f3bf 8f6f isb sy 800d23a: f3bf 8f4f dsb sy 800d23e: 61fb str r3, [r7, #28] } 800d240: bf00 nop 800d242: bf00 nop 800d244: e7fd b.n 800d242 #if( configASSERT_DEFINED == 1 ) { /* Sanity check that the size of the structure used to declare a variable of type StaticTask_t equals the size of the real task structure. */ volatile size_t xSize = sizeof( StaticTask_t ); 800d246: 235c movs r3, #92 @ 0x5c 800d248: 613b str r3, [r7, #16] configASSERT( xSize == sizeof( TCB_t ) ); 800d24a: 693b ldr r3, [r7, #16] 800d24c: 2b5c cmp r3, #92 @ 0x5c 800d24e: d00b beq.n 800d268 __asm volatile 800d250: f04f 0350 mov.w r3, #80 @ 0x50 800d254: f383 8811 msr BASEPRI, r3 800d258: f3bf 8f6f isb sy 800d25c: f3bf 8f4f dsb sy 800d260: 61bb str r3, [r7, #24] } 800d262: bf00 nop 800d264: bf00 nop 800d266: e7fd b.n 800d264 ( void ) xSize; /* Prevent lint warning when configASSERT() is not used. */ 800d268: 693b ldr r3, [r7, #16] } #endif /* configASSERT_DEFINED */ if( ( pxTaskBuffer != NULL ) && ( puxStackBuffer != NULL ) ) 800d26a: 6bbb ldr r3, [r7, #56] @ 0x38 800d26c: 2b00 cmp r3, #0 800d26e: d01e beq.n 800d2ae 800d270: 6b7b ldr r3, [r7, #52] @ 0x34 800d272: 2b00 cmp r3, #0 800d274: d01b beq.n 800d2ae { /* The memory used for the task's TCB and stack are passed into this function - use them. */ pxNewTCB = ( TCB_t * ) pxTaskBuffer; /*lint !e740 !e9087 Unusual cast is ok as the structures are designed to have the same alignment, and the size is checked by an assert. */ 800d276: 6bbb ldr r3, [r7, #56] @ 0x38 800d278: 627b str r3, [r7, #36] @ 0x24 pxNewTCB->pxStack = ( StackType_t * ) puxStackBuffer; 800d27a: 6a7b ldr r3, [r7, #36] @ 0x24 800d27c: 6b7a ldr r2, [r7, #52] @ 0x34 800d27e: 631a str r2, [r3, #48] @ 0x30 #if( tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE != 0 ) /*lint !e731 !e9029 Macro has been consolidated for readability reasons. */ { /* Tasks can be created statically or dynamically, so note this task was created statically in case the task is later deleted. */ pxNewTCB->ucStaticallyAllocated = tskSTATICALLY_ALLOCATED_STACK_AND_TCB; 800d280: 6a7b ldr r3, [r7, #36] @ 0x24 800d282: 2202 movs r2, #2 800d284: f883 2059 strb.w r2, [r3, #89] @ 0x59 } #endif /* tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE */ prvInitialiseNewTask( pxTaskCode, pcName, ulStackDepth, pvParameters, uxPriority, &xReturn, pxNewTCB, NULL ); 800d288: 2300 movs r3, #0 800d28a: 9303 str r3, [sp, #12] 800d28c: 6a7b ldr r3, [r7, #36] @ 0x24 800d28e: 9302 str r3, [sp, #8] 800d290: f107 0314 add.w r3, r7, #20 800d294: 9301 str r3, [sp, #4] 800d296: 6b3b ldr r3, [r7, #48] @ 0x30 800d298: 9300 str r3, [sp, #0] 800d29a: 683b ldr r3, [r7, #0] 800d29c: 687a ldr r2, [r7, #4] 800d29e: 68b9 ldr r1, [r7, #8] 800d2a0: 68f8 ldr r0, [r7, #12] 800d2a2: f000 f850 bl 800d346 prvAddNewTaskToReadyList( pxNewTCB ); 800d2a6: 6a78 ldr r0, [r7, #36] @ 0x24 800d2a8: f000 f8de bl 800d468 800d2ac: e001 b.n 800d2b2 } else { xReturn = NULL; 800d2ae: 2300 movs r3, #0 800d2b0: 617b str r3, [r7, #20] } return xReturn; 800d2b2: 697b ldr r3, [r7, #20] } 800d2b4: 4618 mov r0, r3 800d2b6: 3728 adds r7, #40 @ 0x28 800d2b8: 46bd mov sp, r7 800d2ba: bd80 pop {r7, pc} 0800d2bc : const char * const pcName, /*lint !e971 Unqualified char types are allowed for strings and single characters only. */ const configSTACK_DEPTH_TYPE usStackDepth, void * const pvParameters, UBaseType_t uxPriority, TaskHandle_t * const pxCreatedTask ) { 800d2bc: b580 push {r7, lr} 800d2be: b08c sub sp, #48 @ 0x30 800d2c0: af04 add r7, sp, #16 800d2c2: 60f8 str r0, [r7, #12] 800d2c4: 60b9 str r1, [r7, #8] 800d2c6: 603b str r3, [r7, #0] 800d2c8: 4613 mov r3, r2 800d2ca: 80fb strh r3, [r7, #6] #else /* portSTACK_GROWTH */ { StackType_t *pxStack; /* Allocate space for the stack used by the task being created. */ pxStack = pvPortMalloc( ( ( ( size_t ) usStackDepth ) * sizeof( StackType_t ) ) ); /*lint !e9079 All values returned by pvPortMalloc() have at least the alignment required by the MCU's stack and this allocation is the stack. */ 800d2cc: 88fb ldrh r3, [r7, #6] 800d2ce: 009b lsls r3, r3, #2 800d2d0: 4618 mov r0, r3 800d2d2: f001 fe1b bl 800ef0c 800d2d6: 6178 str r0, [r7, #20] if( pxStack != NULL ) 800d2d8: 697b ldr r3, [r7, #20] 800d2da: 2b00 cmp r3, #0 800d2dc: d00e beq.n 800d2fc { /* Allocate space for the TCB. */ pxNewTCB = ( TCB_t * ) pvPortMalloc( sizeof( TCB_t ) ); /*lint !e9087 !e9079 All values returned by pvPortMalloc() have at least the alignment required by the MCU's stack, and the first member of TCB_t is always a pointer to the task's stack. */ 800d2de: 205c movs r0, #92 @ 0x5c 800d2e0: f001 fe14 bl 800ef0c 800d2e4: 61f8 str r0, [r7, #28] if( pxNewTCB != NULL ) 800d2e6: 69fb ldr r3, [r7, #28] 800d2e8: 2b00 cmp r3, #0 800d2ea: d003 beq.n 800d2f4 { /* Store the stack location in the TCB. */ pxNewTCB->pxStack = pxStack; 800d2ec: 69fb ldr r3, [r7, #28] 800d2ee: 697a ldr r2, [r7, #20] 800d2f0: 631a str r2, [r3, #48] @ 0x30 800d2f2: e005 b.n 800d300 } else { /* The stack cannot be used as the TCB was not created. Free it again. */ vPortFree( pxStack ); 800d2f4: 6978 ldr r0, [r7, #20] 800d2f6: f001 fed7 bl 800f0a8 800d2fa: e001 b.n 800d300 } } else { pxNewTCB = NULL; 800d2fc: 2300 movs r3, #0 800d2fe: 61fb str r3, [r7, #28] } } #endif /* portSTACK_GROWTH */ if( pxNewTCB != NULL ) 800d300: 69fb ldr r3, [r7, #28] 800d302: 2b00 cmp r3, #0 800d304: d017 beq.n 800d336 { #if( tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE != 0 ) /*lint !e9029 !e731 Macro has been consolidated for readability reasons. */ { /* Tasks can be created statically or dynamically, so note this task was created dynamically in case it is later deleted. */ pxNewTCB->ucStaticallyAllocated = tskDYNAMICALLY_ALLOCATED_STACK_AND_TCB; 800d306: 69fb ldr r3, [r7, #28] 800d308: 2200 movs r2, #0 800d30a: f883 2059 strb.w r2, [r3, #89] @ 0x59 } #endif /* tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE */ prvInitialiseNewTask( pxTaskCode, pcName, ( uint32_t ) usStackDepth, pvParameters, uxPriority, pxCreatedTask, pxNewTCB, NULL ); 800d30e: 88fa ldrh r2, [r7, #6] 800d310: 2300 movs r3, #0 800d312: 9303 str r3, [sp, #12] 800d314: 69fb ldr r3, [r7, #28] 800d316: 9302 str r3, [sp, #8] 800d318: 6afb ldr r3, [r7, #44] @ 0x2c 800d31a: 9301 str r3, [sp, #4] 800d31c: 6abb ldr r3, [r7, #40] @ 0x28 800d31e: 9300 str r3, [sp, #0] 800d320: 683b ldr r3, [r7, #0] 800d322: 68b9 ldr r1, [r7, #8] 800d324: 68f8 ldr r0, [r7, #12] 800d326: f000 f80e bl 800d346 prvAddNewTaskToReadyList( pxNewTCB ); 800d32a: 69f8 ldr r0, [r7, #28] 800d32c: f000 f89c bl 800d468 xReturn = pdPASS; 800d330: 2301 movs r3, #1 800d332: 61bb str r3, [r7, #24] 800d334: e002 b.n 800d33c } else { xReturn = errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY; 800d336: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff 800d33a: 61bb str r3, [r7, #24] } return xReturn; 800d33c: 69bb ldr r3, [r7, #24] } 800d33e: 4618 mov r0, r3 800d340: 3720 adds r7, #32 800d342: 46bd mov sp, r7 800d344: bd80 pop {r7, pc} 0800d346 : void * const pvParameters, UBaseType_t uxPriority, TaskHandle_t * const pxCreatedTask, TCB_t *pxNewTCB, const MemoryRegion_t * const xRegions ) { 800d346: b580 push {r7, lr} 800d348: b088 sub sp, #32 800d34a: af00 add r7, sp, #0 800d34c: 60f8 str r0, [r7, #12] 800d34e: 60b9 str r1, [r7, #8] 800d350: 607a str r2, [r7, #4] 800d352: 603b str r3, [r7, #0] /* Avoid dependency on memset() if it is not required. */ #if( tskSET_NEW_STACKS_TO_KNOWN_VALUE == 1 ) { /* Fill the stack with a known value to assist debugging. */ ( void ) memset( pxNewTCB->pxStack, ( int ) tskSTACK_FILL_BYTE, ( size_t ) ulStackDepth * sizeof( StackType_t ) ); 800d354: 6b3b ldr r3, [r7, #48] @ 0x30 800d356: 6b18 ldr r0, [r3, #48] @ 0x30 800d358: 687b ldr r3, [r7, #4] 800d35a: 009b lsls r3, r3, #2 800d35c: 461a mov r2, r3 800d35e: 21a5 movs r1, #165 @ 0xa5 800d360: f003 f8c6 bl 80104f0 grows from high memory to low (as per the 80x86) or vice versa. portSTACK_GROWTH is used to make the result positive or negative as required by the port. */ #if( portSTACK_GROWTH < 0 ) { pxTopOfStack = &( pxNewTCB->pxStack[ ulStackDepth - ( uint32_t ) 1 ] ); 800d364: 6b3b ldr r3, [r7, #48] @ 0x30 800d366: 6b1a ldr r2, [r3, #48] @ 0x30 800d368: 687b ldr r3, [r7, #4] 800d36a: f103 4380 add.w r3, r3, #1073741824 @ 0x40000000 800d36e: 3b01 subs r3, #1 800d370: 009b lsls r3, r3, #2 800d372: 4413 add r3, r2 800d374: 61bb str r3, [r7, #24] pxTopOfStack = ( StackType_t * ) ( ( ( portPOINTER_SIZE_TYPE ) pxTopOfStack ) & ( ~( ( portPOINTER_SIZE_TYPE ) portBYTE_ALIGNMENT_MASK ) ) ); /*lint !e923 !e9033 !e9078 MISRA exception. Avoiding casts between pointers and integers is not practical. Size differences accounted for using portPOINTER_SIZE_TYPE type. Checked by assert(). */ 800d376: 69bb ldr r3, [r7, #24] 800d378: f023 0307 bic.w r3, r3, #7 800d37c: 61bb str r3, [r7, #24] /* Check the alignment of the calculated top of stack is correct. */ configASSERT( ( ( ( portPOINTER_SIZE_TYPE ) pxTopOfStack & ( portPOINTER_SIZE_TYPE ) portBYTE_ALIGNMENT_MASK ) == 0UL ) ); 800d37e: 69bb ldr r3, [r7, #24] 800d380: f003 0307 and.w r3, r3, #7 800d384: 2b00 cmp r3, #0 800d386: d00b beq.n 800d3a0 __asm volatile 800d388: f04f 0350 mov.w r3, #80 @ 0x50 800d38c: f383 8811 msr BASEPRI, r3 800d390: f3bf 8f6f isb sy 800d394: f3bf 8f4f dsb sy 800d398: 617b str r3, [r7, #20] } 800d39a: bf00 nop 800d39c: bf00 nop 800d39e: e7fd b.n 800d39c pxNewTCB->pxEndOfStack = pxNewTCB->pxStack + ( ulStackDepth - ( uint32_t ) 1 ); } #endif /* portSTACK_GROWTH */ /* Store the task name in the TCB. */ if( pcName != NULL ) 800d3a0: 68bb ldr r3, [r7, #8] 800d3a2: 2b00 cmp r3, #0 800d3a4: d01f beq.n 800d3e6 { for( x = ( UBaseType_t ) 0; x < ( UBaseType_t ) configMAX_TASK_NAME_LEN; x++ ) 800d3a6: 2300 movs r3, #0 800d3a8: 61fb str r3, [r7, #28] 800d3aa: e012 b.n 800d3d2 { pxNewTCB->pcTaskName[ x ] = pcName[ x ]; 800d3ac: 68ba ldr r2, [r7, #8] 800d3ae: 69fb ldr r3, [r7, #28] 800d3b0: 4413 add r3, r2 800d3b2: 7819 ldrb r1, [r3, #0] 800d3b4: 6b3a ldr r2, [r7, #48] @ 0x30 800d3b6: 69fb ldr r3, [r7, #28] 800d3b8: 4413 add r3, r2 800d3ba: 3334 adds r3, #52 @ 0x34 800d3bc: 460a mov r2, r1 800d3be: 701a strb r2, [r3, #0] /* Don't copy all configMAX_TASK_NAME_LEN if the string is shorter than configMAX_TASK_NAME_LEN characters just in case the memory after the string is not accessible (extremely unlikely). */ if( pcName[ x ] == ( char ) 0x00 ) 800d3c0: 68ba ldr r2, [r7, #8] 800d3c2: 69fb ldr r3, [r7, #28] 800d3c4: 4413 add r3, r2 800d3c6: 781b ldrb r3, [r3, #0] 800d3c8: 2b00 cmp r3, #0 800d3ca: d006 beq.n 800d3da for( x = ( UBaseType_t ) 0; x < ( UBaseType_t ) configMAX_TASK_NAME_LEN; x++ ) 800d3cc: 69fb ldr r3, [r7, #28] 800d3ce: 3301 adds r3, #1 800d3d0: 61fb str r3, [r7, #28] 800d3d2: 69fb ldr r3, [r7, #28] 800d3d4: 2b0f cmp r3, #15 800d3d6: d9e9 bls.n 800d3ac 800d3d8: e000 b.n 800d3dc { break; 800d3da: bf00 nop } } /* Ensure the name string is terminated in the case that the string length was greater or equal to configMAX_TASK_NAME_LEN. */ pxNewTCB->pcTaskName[ configMAX_TASK_NAME_LEN - 1 ] = '\0'; 800d3dc: 6b3b ldr r3, [r7, #48] @ 0x30 800d3de: 2200 movs r2, #0 800d3e0: f883 2043 strb.w r2, [r3, #67] @ 0x43 800d3e4: e003 b.n 800d3ee } else { /* The task has not been given a name, so just ensure there is a NULL terminator when it is read out. */ pxNewTCB->pcTaskName[ 0 ] = 0x00; 800d3e6: 6b3b ldr r3, [r7, #48] @ 0x30 800d3e8: 2200 movs r2, #0 800d3ea: f883 2034 strb.w r2, [r3, #52] @ 0x34 } /* This is used as an array index so must ensure it's not too large. First remove the privilege bit if one is present. */ if( uxPriority >= ( UBaseType_t ) configMAX_PRIORITIES ) 800d3ee: 6abb ldr r3, [r7, #40] @ 0x28 800d3f0: 2b37 cmp r3, #55 @ 0x37 800d3f2: d901 bls.n 800d3f8 { uxPriority = ( UBaseType_t ) configMAX_PRIORITIES - ( UBaseType_t ) 1U; 800d3f4: 2337 movs r3, #55 @ 0x37 800d3f6: 62bb str r3, [r7, #40] @ 0x28 else { mtCOVERAGE_TEST_MARKER(); } pxNewTCB->uxPriority = uxPriority; 800d3f8: 6b3b ldr r3, [r7, #48] @ 0x30 800d3fa: 6aba ldr r2, [r7, #40] @ 0x28 800d3fc: 62da str r2, [r3, #44] @ 0x2c #if ( configUSE_MUTEXES == 1 ) { pxNewTCB->uxBasePriority = uxPriority; 800d3fe: 6b3b ldr r3, [r7, #48] @ 0x30 800d400: 6aba ldr r2, [r7, #40] @ 0x28 800d402: 64da str r2, [r3, #76] @ 0x4c pxNewTCB->uxMutexesHeld = 0; 800d404: 6b3b ldr r3, [r7, #48] @ 0x30 800d406: 2200 movs r2, #0 800d408: 651a str r2, [r3, #80] @ 0x50 } #endif /* configUSE_MUTEXES */ vListInitialiseItem( &( pxNewTCB->xStateListItem ) ); 800d40a: 6b3b ldr r3, [r7, #48] @ 0x30 800d40c: 3304 adds r3, #4 800d40e: 4618 mov r0, r3 800d410: f7fe ff72 bl 800c2f8 vListInitialiseItem( &( pxNewTCB->xEventListItem ) ); 800d414: 6b3b ldr r3, [r7, #48] @ 0x30 800d416: 3318 adds r3, #24 800d418: 4618 mov r0, r3 800d41a: f7fe ff6d bl 800c2f8 /* Set the pxNewTCB as a link back from the ListItem_t. This is so we can get back to the containing TCB from a generic item in a list. */ listSET_LIST_ITEM_OWNER( &( pxNewTCB->xStateListItem ), pxNewTCB ); 800d41e: 6b3b ldr r3, [r7, #48] @ 0x30 800d420: 6b3a ldr r2, [r7, #48] @ 0x30 800d422: 611a str r2, [r3, #16] /* Event lists are always in priority order. */ listSET_LIST_ITEM_VALUE( &( pxNewTCB->xEventListItem ), ( TickType_t ) configMAX_PRIORITIES - ( TickType_t ) uxPriority ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */ 800d424: 6abb ldr r3, [r7, #40] @ 0x28 800d426: f1c3 0238 rsb r2, r3, #56 @ 0x38 800d42a: 6b3b ldr r3, [r7, #48] @ 0x30 800d42c: 619a str r2, [r3, #24] listSET_LIST_ITEM_OWNER( &( pxNewTCB->xEventListItem ), pxNewTCB ); 800d42e: 6b3b ldr r3, [r7, #48] @ 0x30 800d430: 6b3a ldr r2, [r7, #48] @ 0x30 800d432: 625a str r2, [r3, #36] @ 0x24 } #endif #if ( configUSE_TASK_NOTIFICATIONS == 1 ) { pxNewTCB->ulNotifiedValue = 0; 800d434: 6b3b ldr r3, [r7, #48] @ 0x30 800d436: 2200 movs r2, #0 800d438: 655a str r2, [r3, #84] @ 0x54 pxNewTCB->ucNotifyState = taskNOT_WAITING_NOTIFICATION; 800d43a: 6b3b ldr r3, [r7, #48] @ 0x30 800d43c: 2200 movs r2, #0 800d43e: f883 2058 strb.w r2, [r3, #88] @ 0x58 } #endif /* portSTACK_GROWTH */ } #else /* portHAS_STACK_OVERFLOW_CHECKING */ { pxNewTCB->pxTopOfStack = pxPortInitialiseStack( pxTopOfStack, pxTaskCode, pvParameters ); 800d442: 683a ldr r2, [r7, #0] 800d444: 68f9 ldr r1, [r7, #12] 800d446: 69b8 ldr r0, [r7, #24] 800d448: f001 fb0a bl 800ea60 800d44c: 4602 mov r2, r0 800d44e: 6b3b ldr r3, [r7, #48] @ 0x30 800d450: 601a str r2, [r3, #0] } #endif /* portHAS_STACK_OVERFLOW_CHECKING */ } #endif /* portUSING_MPU_WRAPPERS */ if( pxCreatedTask != NULL ) 800d452: 6afb ldr r3, [r7, #44] @ 0x2c 800d454: 2b00 cmp r3, #0 800d456: d002 beq.n 800d45e { /* Pass the handle out in an anonymous way. The handle can be used to change the created task's priority, delete the created task, etc.*/ *pxCreatedTask = ( TaskHandle_t ) pxNewTCB; 800d458: 6afb ldr r3, [r7, #44] @ 0x2c 800d45a: 6b3a ldr r2, [r7, #48] @ 0x30 800d45c: 601a str r2, [r3, #0] } else { mtCOVERAGE_TEST_MARKER(); } } 800d45e: bf00 nop 800d460: 3720 adds r7, #32 800d462: 46bd mov sp, r7 800d464: bd80 pop {r7, pc} ... 0800d468 : /*-----------------------------------------------------------*/ static void prvAddNewTaskToReadyList( TCB_t *pxNewTCB ) { 800d468: b580 push {r7, lr} 800d46a: b082 sub sp, #8 800d46c: af00 add r7, sp, #0 800d46e: 6078 str r0, [r7, #4] /* Ensure interrupts don't access the task lists while the lists are being updated. */ taskENTER_CRITICAL(); 800d470: f001 fc2a bl 800ecc8 { uxCurrentNumberOfTasks++; 800d474: 4b2d ldr r3, [pc, #180] @ (800d52c ) 800d476: 681b ldr r3, [r3, #0] 800d478: 3301 adds r3, #1 800d47a: 4a2c ldr r2, [pc, #176] @ (800d52c ) 800d47c: 6013 str r3, [r2, #0] if( pxCurrentTCB == NULL ) 800d47e: 4b2c ldr r3, [pc, #176] @ (800d530 ) 800d480: 681b ldr r3, [r3, #0] 800d482: 2b00 cmp r3, #0 800d484: d109 bne.n 800d49a { /* There are no other tasks, or all the other tasks are in the suspended state - make this the current task. */ pxCurrentTCB = pxNewTCB; 800d486: 4a2a ldr r2, [pc, #168] @ (800d530 ) 800d488: 687b ldr r3, [r7, #4] 800d48a: 6013 str r3, [r2, #0] if( uxCurrentNumberOfTasks == ( UBaseType_t ) 1 ) 800d48c: 4b27 ldr r3, [pc, #156] @ (800d52c ) 800d48e: 681b ldr r3, [r3, #0] 800d490: 2b01 cmp r3, #1 800d492: d110 bne.n 800d4b6 { /* This is the first task to be created so do the preliminary initialisation required. We will not recover if this call fails, but we will report the failure. */ prvInitialiseTaskLists(); 800d494: f000 fbe8 bl 800dc68 800d498: e00d b.n 800d4b6 else { /* If the scheduler is not already running, make this task the current task if it is the highest priority task to be created so far. */ if( xSchedulerRunning == pdFALSE ) 800d49a: 4b26 ldr r3, [pc, #152] @ (800d534 ) 800d49c: 681b ldr r3, [r3, #0] 800d49e: 2b00 cmp r3, #0 800d4a0: d109 bne.n 800d4b6 { if( pxCurrentTCB->uxPriority <= pxNewTCB->uxPriority ) 800d4a2: 4b23 ldr r3, [pc, #140] @ (800d530 ) 800d4a4: 681b ldr r3, [r3, #0] 800d4a6: 6ada ldr r2, [r3, #44] @ 0x2c 800d4a8: 687b ldr r3, [r7, #4] 800d4aa: 6adb ldr r3, [r3, #44] @ 0x2c 800d4ac: 429a cmp r2, r3 800d4ae: d802 bhi.n 800d4b6 { pxCurrentTCB = pxNewTCB; 800d4b0: 4a1f ldr r2, [pc, #124] @ (800d530 ) 800d4b2: 687b ldr r3, [r7, #4] 800d4b4: 6013 str r3, [r2, #0] { mtCOVERAGE_TEST_MARKER(); } } uxTaskNumber++; 800d4b6: 4b20 ldr r3, [pc, #128] @ (800d538 ) 800d4b8: 681b ldr r3, [r3, #0] 800d4ba: 3301 adds r3, #1 800d4bc: 4a1e ldr r2, [pc, #120] @ (800d538 ) 800d4be: 6013 str r3, [r2, #0] #if ( configUSE_TRACE_FACILITY == 1 ) { /* Add a counter into the TCB for tracing only. */ pxNewTCB->uxTCBNumber = uxTaskNumber; 800d4c0: 4b1d ldr r3, [pc, #116] @ (800d538 ) 800d4c2: 681a ldr r2, [r3, #0] 800d4c4: 687b ldr r3, [r7, #4] 800d4c6: 645a str r2, [r3, #68] @ 0x44 } #endif /* configUSE_TRACE_FACILITY */ traceTASK_CREATE( pxNewTCB ); prvAddTaskToReadyList( pxNewTCB ); 800d4c8: 687b ldr r3, [r7, #4] 800d4ca: 6ada ldr r2, [r3, #44] @ 0x2c 800d4cc: 4b1b ldr r3, [pc, #108] @ (800d53c ) 800d4ce: 681b ldr r3, [r3, #0] 800d4d0: 429a cmp r2, r3 800d4d2: d903 bls.n 800d4dc 800d4d4: 687b ldr r3, [r7, #4] 800d4d6: 6adb ldr r3, [r3, #44] @ 0x2c 800d4d8: 4a18 ldr r2, [pc, #96] @ (800d53c ) 800d4da: 6013 str r3, [r2, #0] 800d4dc: 687b ldr r3, [r7, #4] 800d4de: 6ada ldr r2, [r3, #44] @ 0x2c 800d4e0: 4613 mov r3, r2 800d4e2: 009b lsls r3, r3, #2 800d4e4: 4413 add r3, r2 800d4e6: 009b lsls r3, r3, #2 800d4e8: 4a15 ldr r2, [pc, #84] @ (800d540 ) 800d4ea: 441a add r2, r3 800d4ec: 687b ldr r3, [r7, #4] 800d4ee: 3304 adds r3, #4 800d4f0: 4619 mov r1, r3 800d4f2: 4610 mov r0, r2 800d4f4: f7fe ff0d bl 800c312 portSETUP_TCB( pxNewTCB ); } taskEXIT_CRITICAL(); 800d4f8: f001 fc18 bl 800ed2c if( xSchedulerRunning != pdFALSE ) 800d4fc: 4b0d ldr r3, [pc, #52] @ (800d534 ) 800d4fe: 681b ldr r3, [r3, #0] 800d500: 2b00 cmp r3, #0 800d502: d00e beq.n 800d522 { /* If the created task is of a higher priority than the current task then it should run now. */ if( pxCurrentTCB->uxPriority < pxNewTCB->uxPriority ) 800d504: 4b0a ldr r3, [pc, #40] @ (800d530 ) 800d506: 681b ldr r3, [r3, #0] 800d508: 6ada ldr r2, [r3, #44] @ 0x2c 800d50a: 687b ldr r3, [r7, #4] 800d50c: 6adb ldr r3, [r3, #44] @ 0x2c 800d50e: 429a cmp r2, r3 800d510: d207 bcs.n 800d522 { taskYIELD_IF_USING_PREEMPTION(); 800d512: 4b0c ldr r3, [pc, #48] @ (800d544 ) 800d514: f04f 5280 mov.w r2, #268435456 @ 0x10000000 800d518: 601a str r2, [r3, #0] 800d51a: f3bf 8f4f dsb sy 800d51e: f3bf 8f6f isb sy } else { mtCOVERAGE_TEST_MARKER(); } } 800d522: bf00 nop 800d524: 3708 adds r7, #8 800d526: 46bd mov sp, r7 800d528: bd80 pop {r7, pc} 800d52a: bf00 nop 800d52c: 2000282c .word 0x2000282c 800d530: 20002358 .word 0x20002358 800d534: 20002838 .word 0x20002838 800d538: 20002848 .word 0x20002848 800d53c: 20002834 .word 0x20002834 800d540: 2000235c .word 0x2000235c 800d544: e000ed04 .word 0xe000ed04 0800d548 : #endif /* ( ( INCLUDE_xTaskResumeFromISR == 1 ) && ( INCLUDE_vTaskSuspend == 1 ) ) */ /*-----------------------------------------------------------*/ void vTaskStartScheduler( void ) { 800d548: b580 push {r7, lr} 800d54a: b08a sub sp, #40 @ 0x28 800d54c: af04 add r7, sp, #16 BaseType_t xReturn; /* Add the idle task at the lowest priority. */ #if( configSUPPORT_STATIC_ALLOCATION == 1 ) { StaticTask_t *pxIdleTaskTCBBuffer = NULL; 800d54e: 2300 movs r3, #0 800d550: 60bb str r3, [r7, #8] StackType_t *pxIdleTaskStackBuffer = NULL; 800d552: 2300 movs r3, #0 800d554: 607b str r3, [r7, #4] uint32_t ulIdleTaskStackSize; /* The Idle task is created using user provided RAM - obtain the address of the RAM then create the idle task. */ vApplicationGetIdleTaskMemory( &pxIdleTaskTCBBuffer, &pxIdleTaskStackBuffer, &ulIdleTaskStackSize ); 800d556: 463a mov r2, r7 800d558: 1d39 adds r1, r7, #4 800d55a: f107 0308 add.w r3, r7, #8 800d55e: 4618 mov r0, r3 800d560: f7fe fe76 bl 800c250 xIdleTaskHandle = xTaskCreateStatic( prvIdleTask, 800d564: 6839 ldr r1, [r7, #0] 800d566: 687b ldr r3, [r7, #4] 800d568: 68ba ldr r2, [r7, #8] 800d56a: 9202 str r2, [sp, #8] 800d56c: 9301 str r3, [sp, #4] 800d56e: 2300 movs r3, #0 800d570: 9300 str r3, [sp, #0] 800d572: 2300 movs r3, #0 800d574: 460a mov r2, r1 800d576: 4922 ldr r1, [pc, #136] @ (800d600 ) 800d578: 4822 ldr r0, [pc, #136] @ (800d604 ) 800d57a: f7ff fe3f bl 800d1fc 800d57e: 4603 mov r3, r0 800d580: 4a21 ldr r2, [pc, #132] @ (800d608 ) 800d582: 6013 str r3, [r2, #0] ( void * ) NULL, /*lint !e961. The cast is not redundant for all compilers. */ portPRIVILEGE_BIT, /* In effect ( tskIDLE_PRIORITY | portPRIVILEGE_BIT ), but tskIDLE_PRIORITY is zero. */ pxIdleTaskStackBuffer, pxIdleTaskTCBBuffer ); /*lint !e961 MISRA exception, justified as it is not a redundant explicit cast to all supported compilers. */ if( xIdleTaskHandle != NULL ) 800d584: 4b20 ldr r3, [pc, #128] @ (800d608 ) 800d586: 681b ldr r3, [r3, #0] 800d588: 2b00 cmp r3, #0 800d58a: d002 beq.n 800d592 { xReturn = pdPASS; 800d58c: 2301 movs r3, #1 800d58e: 617b str r3, [r7, #20] 800d590: e001 b.n 800d596 } else { xReturn = pdFAIL; 800d592: 2300 movs r3, #0 800d594: 617b str r3, [r7, #20] } #endif /* configSUPPORT_STATIC_ALLOCATION */ #if ( configUSE_TIMERS == 1 ) { if( xReturn == pdPASS ) 800d596: 697b ldr r3, [r7, #20] 800d598: 2b01 cmp r3, #1 800d59a: d102 bne.n 800d5a2 { xReturn = xTimerCreateTimerTask(); 800d59c: f000 ff06 bl 800e3ac 800d5a0: 6178 str r0, [r7, #20] mtCOVERAGE_TEST_MARKER(); } } #endif /* configUSE_TIMERS */ if( xReturn == pdPASS ) 800d5a2: 697b ldr r3, [r7, #20] 800d5a4: 2b01 cmp r3, #1 800d5a6: d116 bne.n 800d5d6 __asm volatile 800d5a8: f04f 0350 mov.w r3, #80 @ 0x50 800d5ac: f383 8811 msr BASEPRI, r3 800d5b0: f3bf 8f6f isb sy 800d5b4: f3bf 8f4f dsb sy 800d5b8: 613b str r3, [r7, #16] } 800d5ba: bf00 nop for additional information. */ _impure_ptr = &( pxCurrentTCB->xNewLib_reent ); } #endif /* configUSE_NEWLIB_REENTRANT */ xNextTaskUnblockTime = portMAX_DELAY; 800d5bc: 4b13 ldr r3, [pc, #76] @ (800d60c ) 800d5be: f04f 32ff mov.w r2, #4294967295 @ 0xffffffff 800d5c2: 601a str r2, [r3, #0] xSchedulerRunning = pdTRUE; 800d5c4: 4b12 ldr r3, [pc, #72] @ (800d610 ) 800d5c6: 2201 movs r2, #1 800d5c8: 601a str r2, [r3, #0] xTickCount = ( TickType_t ) configINITIAL_TICK_COUNT; 800d5ca: 4b12 ldr r3, [pc, #72] @ (800d614 ) 800d5cc: 2200 movs r2, #0 800d5ce: 601a str r2, [r3, #0] traceTASK_SWITCHED_IN(); /* Setting up the timer tick is hardware specific and thus in the portable interface. */ if( xPortStartScheduler() != pdFALSE ) 800d5d0: f001 fad6 bl 800eb80 } /* Prevent compiler warnings if INCLUDE_xTaskGetIdleTaskHandle is set to 0, meaning xIdleTaskHandle is not used anywhere else. */ ( void ) xIdleTaskHandle; } 800d5d4: e00f b.n 800d5f6 configASSERT( xReturn != errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY ); 800d5d6: 697b ldr r3, [r7, #20] 800d5d8: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff 800d5dc: d10b bne.n 800d5f6 __asm volatile 800d5de: f04f 0350 mov.w r3, #80 @ 0x50 800d5e2: f383 8811 msr BASEPRI, r3 800d5e6: f3bf 8f6f isb sy 800d5ea: f3bf 8f4f dsb sy 800d5ee: 60fb str r3, [r7, #12] } 800d5f0: bf00 nop 800d5f2: bf00 nop 800d5f4: e7fd b.n 800d5f2 } 800d5f6: bf00 nop 800d5f8: 3718 adds r7, #24 800d5fa: 46bd mov sp, r7 800d5fc: bd80 pop {r7, pc} 800d5fe: bf00 nop 800d600: 08014e98 .word 0x08014e98 800d604: 0800dc39 .word 0x0800dc39 800d608: 20002850 .word 0x20002850 800d60c: 2000284c .word 0x2000284c 800d610: 20002838 .word 0x20002838 800d614: 20002830 .word 0x20002830 0800d618 : vPortEndScheduler(); } /*----------------------------------------------------------*/ void vTaskSuspendAll( void ) { 800d618: b480 push {r7} 800d61a: af00 add r7, sp, #0 do not otherwise exhibit real time behaviour. */ portSOFTWARE_BARRIER(); /* The scheduler is suspended if uxSchedulerSuspended is non-zero. An increment is used to allow calls to vTaskSuspendAll() to nest. */ ++uxSchedulerSuspended; 800d61c: 4b04 ldr r3, [pc, #16] @ (800d630 ) 800d61e: 681b ldr r3, [r3, #0] 800d620: 3301 adds r3, #1 800d622: 4a03 ldr r2, [pc, #12] @ (800d630 ) 800d624: 6013 str r3, [r2, #0] /* Enforces ordering for ports and optimised compilers that may otherwise place the above increment elsewhere. */ portMEMORY_BARRIER(); } 800d626: bf00 nop 800d628: 46bd mov sp, r7 800d62a: f85d 7b04 ldr.w r7, [sp], #4 800d62e: 4770 bx lr 800d630: 20002854 .word 0x20002854 0800d634 : #endif /* configUSE_TICKLESS_IDLE */ /*----------------------------------------------------------*/ BaseType_t xTaskResumeAll( void ) { 800d634: b580 push {r7, lr} 800d636: b084 sub sp, #16 800d638: af00 add r7, sp, #0 TCB_t *pxTCB = NULL; 800d63a: 2300 movs r3, #0 800d63c: 60fb str r3, [r7, #12] BaseType_t xAlreadyYielded = pdFALSE; 800d63e: 2300 movs r3, #0 800d640: 60bb str r3, [r7, #8] /* If uxSchedulerSuspended is zero then this function does not match a previous call to vTaskSuspendAll(). */ configASSERT( uxSchedulerSuspended ); 800d642: 4b42 ldr r3, [pc, #264] @ (800d74c ) 800d644: 681b ldr r3, [r3, #0] 800d646: 2b00 cmp r3, #0 800d648: d10b bne.n 800d662 __asm volatile 800d64a: f04f 0350 mov.w r3, #80 @ 0x50 800d64e: f383 8811 msr BASEPRI, r3 800d652: f3bf 8f6f isb sy 800d656: f3bf 8f4f dsb sy 800d65a: 603b str r3, [r7, #0] } 800d65c: bf00 nop 800d65e: bf00 nop 800d660: e7fd b.n 800d65e /* It is possible that an ISR caused a task to be removed from an event list while the scheduler was suspended. If this was the case then the removed task will have been added to the xPendingReadyList. Once the scheduler has been resumed it is safe to move all the pending ready tasks from this list into their appropriate ready list. */ taskENTER_CRITICAL(); 800d662: f001 fb31 bl 800ecc8 { --uxSchedulerSuspended; 800d666: 4b39 ldr r3, [pc, #228] @ (800d74c ) 800d668: 681b ldr r3, [r3, #0] 800d66a: 3b01 subs r3, #1 800d66c: 4a37 ldr r2, [pc, #220] @ (800d74c ) 800d66e: 6013 str r3, [r2, #0] if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE ) 800d670: 4b36 ldr r3, [pc, #216] @ (800d74c ) 800d672: 681b ldr r3, [r3, #0] 800d674: 2b00 cmp r3, #0 800d676: d162 bne.n 800d73e { if( uxCurrentNumberOfTasks > ( UBaseType_t ) 0U ) 800d678: 4b35 ldr r3, [pc, #212] @ (800d750 ) 800d67a: 681b ldr r3, [r3, #0] 800d67c: 2b00 cmp r3, #0 800d67e: d05e beq.n 800d73e { /* Move any readied tasks from the pending list into the appropriate ready list. */ while( listLIST_IS_EMPTY( &xPendingReadyList ) == pdFALSE ) 800d680: e02f b.n 800d6e2 { pxTCB = listGET_OWNER_OF_HEAD_ENTRY( ( &xPendingReadyList ) ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too. Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */ 800d682: 4b34 ldr r3, [pc, #208] @ (800d754 ) 800d684: 68db ldr r3, [r3, #12] 800d686: 68db ldr r3, [r3, #12] 800d688: 60fb str r3, [r7, #12] ( void ) uxListRemove( &( pxTCB->xEventListItem ) ); 800d68a: 68fb ldr r3, [r7, #12] 800d68c: 3318 adds r3, #24 800d68e: 4618 mov r0, r3 800d690: f7fe fe9c bl 800c3cc ( void ) uxListRemove( &( pxTCB->xStateListItem ) ); 800d694: 68fb ldr r3, [r7, #12] 800d696: 3304 adds r3, #4 800d698: 4618 mov r0, r3 800d69a: f7fe fe97 bl 800c3cc prvAddTaskToReadyList( pxTCB ); 800d69e: 68fb ldr r3, [r7, #12] 800d6a0: 6ada ldr r2, [r3, #44] @ 0x2c 800d6a2: 4b2d ldr r3, [pc, #180] @ (800d758 ) 800d6a4: 681b ldr r3, [r3, #0] 800d6a6: 429a cmp r2, r3 800d6a8: d903 bls.n 800d6b2 800d6aa: 68fb ldr r3, [r7, #12] 800d6ac: 6adb ldr r3, [r3, #44] @ 0x2c 800d6ae: 4a2a ldr r2, [pc, #168] @ (800d758 ) 800d6b0: 6013 str r3, [r2, #0] 800d6b2: 68fb ldr r3, [r7, #12] 800d6b4: 6ada ldr r2, [r3, #44] @ 0x2c 800d6b6: 4613 mov r3, r2 800d6b8: 009b lsls r3, r3, #2 800d6ba: 4413 add r3, r2 800d6bc: 009b lsls r3, r3, #2 800d6be: 4a27 ldr r2, [pc, #156] @ (800d75c ) 800d6c0: 441a add r2, r3 800d6c2: 68fb ldr r3, [r7, #12] 800d6c4: 3304 adds r3, #4 800d6c6: 4619 mov r1, r3 800d6c8: 4610 mov r0, r2 800d6ca: f7fe fe22 bl 800c312 /* If the moved task has a priority higher than the current task then a yield must be performed. */ if( pxTCB->uxPriority >= pxCurrentTCB->uxPriority ) 800d6ce: 68fb ldr r3, [r7, #12] 800d6d0: 6ada ldr r2, [r3, #44] @ 0x2c 800d6d2: 4b23 ldr r3, [pc, #140] @ (800d760 ) 800d6d4: 681b ldr r3, [r3, #0] 800d6d6: 6adb ldr r3, [r3, #44] @ 0x2c 800d6d8: 429a cmp r2, r3 800d6da: d302 bcc.n 800d6e2 { xYieldPending = pdTRUE; 800d6dc: 4b21 ldr r3, [pc, #132] @ (800d764 ) 800d6de: 2201 movs r2, #1 800d6e0: 601a str r2, [r3, #0] while( listLIST_IS_EMPTY( &xPendingReadyList ) == pdFALSE ) 800d6e2: 4b1c ldr r3, [pc, #112] @ (800d754 ) 800d6e4: 681b ldr r3, [r3, #0] 800d6e6: 2b00 cmp r3, #0 800d6e8: d1cb bne.n 800d682 { mtCOVERAGE_TEST_MARKER(); } } if( pxTCB != NULL ) 800d6ea: 68fb ldr r3, [r7, #12] 800d6ec: 2b00 cmp r3, #0 800d6ee: d001 beq.n 800d6f4 which may have prevented the next unblock time from being re-calculated, in which case re-calculate it now. Mainly important for low power tickless implementations, where this can prevent an unnecessary exit from low power state. */ prvResetNextTaskUnblockTime(); 800d6f0: f000 fb58 bl 800dda4 /* If any ticks occurred while the scheduler was suspended then they should be processed now. This ensures the tick count does not slip, and that any delayed tasks are resumed at the correct time. */ { TickType_t xPendedCounts = xPendedTicks; /* Non-volatile copy. */ 800d6f4: 4b1c ldr r3, [pc, #112] @ (800d768 ) 800d6f6: 681b ldr r3, [r3, #0] 800d6f8: 607b str r3, [r7, #4] if( xPendedCounts > ( TickType_t ) 0U ) 800d6fa: 687b ldr r3, [r7, #4] 800d6fc: 2b00 cmp r3, #0 800d6fe: d010 beq.n 800d722 { do { if( xTaskIncrementTick() != pdFALSE ) 800d700: f000 f846 bl 800d790 800d704: 4603 mov r3, r0 800d706: 2b00 cmp r3, #0 800d708: d002 beq.n 800d710 { xYieldPending = pdTRUE; 800d70a: 4b16 ldr r3, [pc, #88] @ (800d764 ) 800d70c: 2201 movs r2, #1 800d70e: 601a str r2, [r3, #0] } else { mtCOVERAGE_TEST_MARKER(); } --xPendedCounts; 800d710: 687b ldr r3, [r7, #4] 800d712: 3b01 subs r3, #1 800d714: 607b str r3, [r7, #4] } while( xPendedCounts > ( TickType_t ) 0U ); 800d716: 687b ldr r3, [r7, #4] 800d718: 2b00 cmp r3, #0 800d71a: d1f1 bne.n 800d700 xPendedTicks = 0; 800d71c: 4b12 ldr r3, [pc, #72] @ (800d768 ) 800d71e: 2200 movs r2, #0 800d720: 601a str r2, [r3, #0] { mtCOVERAGE_TEST_MARKER(); } } if( xYieldPending != pdFALSE ) 800d722: 4b10 ldr r3, [pc, #64] @ (800d764 ) 800d724: 681b ldr r3, [r3, #0] 800d726: 2b00 cmp r3, #0 800d728: d009 beq.n 800d73e { #if( configUSE_PREEMPTION != 0 ) { xAlreadyYielded = pdTRUE; 800d72a: 2301 movs r3, #1 800d72c: 60bb str r3, [r7, #8] } #endif taskYIELD_IF_USING_PREEMPTION(); 800d72e: 4b0f ldr r3, [pc, #60] @ (800d76c ) 800d730: f04f 5280 mov.w r2, #268435456 @ 0x10000000 800d734: 601a str r2, [r3, #0] 800d736: f3bf 8f4f dsb sy 800d73a: f3bf 8f6f isb sy else { mtCOVERAGE_TEST_MARKER(); } } taskEXIT_CRITICAL(); 800d73e: f001 faf5 bl 800ed2c return xAlreadyYielded; 800d742: 68bb ldr r3, [r7, #8] } 800d744: 4618 mov r0, r3 800d746: 3710 adds r7, #16 800d748: 46bd mov sp, r7 800d74a: bd80 pop {r7, pc} 800d74c: 20002854 .word 0x20002854 800d750: 2000282c .word 0x2000282c 800d754: 200027ec .word 0x200027ec 800d758: 20002834 .word 0x20002834 800d75c: 2000235c .word 0x2000235c 800d760: 20002358 .word 0x20002358 800d764: 20002840 .word 0x20002840 800d768: 2000283c .word 0x2000283c 800d76c: e000ed04 .word 0xe000ed04 0800d770 : /*-----------------------------------------------------------*/ TickType_t xTaskGetTickCount( void ) { 800d770: b480 push {r7} 800d772: b083 sub sp, #12 800d774: af00 add r7, sp, #0 TickType_t xTicks; /* Critical section required if running on a 16 bit processor. */ portTICK_TYPE_ENTER_CRITICAL(); { xTicks = xTickCount; 800d776: 4b05 ldr r3, [pc, #20] @ (800d78c ) 800d778: 681b ldr r3, [r3, #0] 800d77a: 607b str r3, [r7, #4] } portTICK_TYPE_EXIT_CRITICAL(); return xTicks; 800d77c: 687b ldr r3, [r7, #4] } 800d77e: 4618 mov r0, r3 800d780: 370c adds r7, #12 800d782: 46bd mov sp, r7 800d784: f85d 7b04 ldr.w r7, [sp], #4 800d788: 4770 bx lr 800d78a: bf00 nop 800d78c: 20002830 .word 0x20002830 0800d790 : #endif /* INCLUDE_xTaskAbortDelay */ /*----------------------------------------------------------*/ BaseType_t xTaskIncrementTick( void ) { 800d790: b580 push {r7, lr} 800d792: b086 sub sp, #24 800d794: af00 add r7, sp, #0 TCB_t * pxTCB; TickType_t xItemValue; BaseType_t xSwitchRequired = pdFALSE; 800d796: 2300 movs r3, #0 800d798: 617b str r3, [r7, #20] /* Called by the portable layer each time a tick interrupt occurs. Increments the tick then checks to see if the new tick value will cause any tasks to be unblocked. */ traceTASK_INCREMENT_TICK( xTickCount ); if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE ) 800d79a: 4b4f ldr r3, [pc, #316] @ (800d8d8 ) 800d79c: 681b ldr r3, [r3, #0] 800d79e: 2b00 cmp r3, #0 800d7a0: f040 8090 bne.w 800d8c4 { /* Minor optimisation. The tick count cannot change in this block. */ const TickType_t xConstTickCount = xTickCount + ( TickType_t ) 1; 800d7a4: 4b4d ldr r3, [pc, #308] @ (800d8dc ) 800d7a6: 681b ldr r3, [r3, #0] 800d7a8: 3301 adds r3, #1 800d7aa: 613b str r3, [r7, #16] /* Increment the RTOS tick, switching the delayed and overflowed delayed lists if it wraps to 0. */ xTickCount = xConstTickCount; 800d7ac: 4a4b ldr r2, [pc, #300] @ (800d8dc ) 800d7ae: 693b ldr r3, [r7, #16] 800d7b0: 6013 str r3, [r2, #0] if( xConstTickCount == ( TickType_t ) 0U ) /*lint !e774 'if' does not always evaluate to false as it is looking for an overflow. */ 800d7b2: 693b ldr r3, [r7, #16] 800d7b4: 2b00 cmp r3, #0 800d7b6: d121 bne.n 800d7fc { taskSWITCH_DELAYED_LISTS(); 800d7b8: 4b49 ldr r3, [pc, #292] @ (800d8e0 ) 800d7ba: 681b ldr r3, [r3, #0] 800d7bc: 681b ldr r3, [r3, #0] 800d7be: 2b00 cmp r3, #0 800d7c0: d00b beq.n 800d7da __asm volatile 800d7c2: f04f 0350 mov.w r3, #80 @ 0x50 800d7c6: f383 8811 msr BASEPRI, r3 800d7ca: f3bf 8f6f isb sy 800d7ce: f3bf 8f4f dsb sy 800d7d2: 603b str r3, [r7, #0] } 800d7d4: bf00 nop 800d7d6: bf00 nop 800d7d8: e7fd b.n 800d7d6 800d7da: 4b41 ldr r3, [pc, #260] @ (800d8e0 ) 800d7dc: 681b ldr r3, [r3, #0] 800d7de: 60fb str r3, [r7, #12] 800d7e0: 4b40 ldr r3, [pc, #256] @ (800d8e4 ) 800d7e2: 681b ldr r3, [r3, #0] 800d7e4: 4a3e ldr r2, [pc, #248] @ (800d8e0 ) 800d7e6: 6013 str r3, [r2, #0] 800d7e8: 4a3e ldr r2, [pc, #248] @ (800d8e4 ) 800d7ea: 68fb ldr r3, [r7, #12] 800d7ec: 6013 str r3, [r2, #0] 800d7ee: 4b3e ldr r3, [pc, #248] @ (800d8e8 ) 800d7f0: 681b ldr r3, [r3, #0] 800d7f2: 3301 adds r3, #1 800d7f4: 4a3c ldr r2, [pc, #240] @ (800d8e8 ) 800d7f6: 6013 str r3, [r2, #0] 800d7f8: f000 fad4 bl 800dda4 /* See if this tick has made a timeout expire. Tasks are stored in the queue in the order of their wake time - meaning once one task has been found whose block time has not expired there is no need to look any further down the list. */ if( xConstTickCount >= xNextTaskUnblockTime ) 800d7fc: 4b3b ldr r3, [pc, #236] @ (800d8ec ) 800d7fe: 681b ldr r3, [r3, #0] 800d800: 693a ldr r2, [r7, #16] 800d802: 429a cmp r2, r3 800d804: d349 bcc.n 800d89a { for( ;; ) { if( listLIST_IS_EMPTY( pxDelayedTaskList ) != pdFALSE ) 800d806: 4b36 ldr r3, [pc, #216] @ (800d8e0 ) 800d808: 681b ldr r3, [r3, #0] 800d80a: 681b ldr r3, [r3, #0] 800d80c: 2b00 cmp r3, #0 800d80e: d104 bne.n 800d81a /* The delayed list is empty. Set xNextTaskUnblockTime to the maximum possible value so it is extremely unlikely that the if( xTickCount >= xNextTaskUnblockTime ) test will pass next time through. */ xNextTaskUnblockTime = portMAX_DELAY; /*lint !e961 MISRA exception as the casts are only redundant for some ports. */ 800d810: 4b36 ldr r3, [pc, #216] @ (800d8ec ) 800d812: f04f 32ff mov.w r2, #4294967295 @ 0xffffffff 800d816: 601a str r2, [r3, #0] break; 800d818: e03f b.n 800d89a { /* The delayed list is not empty, get the value of the item at the head of the delayed list. This is the time at which the task at the head of the delayed list must be removed from the Blocked state. */ pxTCB = listGET_OWNER_OF_HEAD_ENTRY( pxDelayedTaskList ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too. Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */ 800d81a: 4b31 ldr r3, [pc, #196] @ (800d8e0 ) 800d81c: 681b ldr r3, [r3, #0] 800d81e: 68db ldr r3, [r3, #12] 800d820: 68db ldr r3, [r3, #12] 800d822: 60bb str r3, [r7, #8] xItemValue = listGET_LIST_ITEM_VALUE( &( pxTCB->xStateListItem ) ); 800d824: 68bb ldr r3, [r7, #8] 800d826: 685b ldr r3, [r3, #4] 800d828: 607b str r3, [r7, #4] if( xConstTickCount < xItemValue ) 800d82a: 693a ldr r2, [r7, #16] 800d82c: 687b ldr r3, [r7, #4] 800d82e: 429a cmp r2, r3 800d830: d203 bcs.n 800d83a /* It is not time to unblock this item yet, but the item value is the time at which the task at the head of the blocked list must be removed from the Blocked state - so record the item value in xNextTaskUnblockTime. */ xNextTaskUnblockTime = xItemValue; 800d832: 4a2e ldr r2, [pc, #184] @ (800d8ec ) 800d834: 687b ldr r3, [r7, #4] 800d836: 6013 str r3, [r2, #0] break; /*lint !e9011 Code structure here is deedmed easier to understand with multiple breaks. */ 800d838: e02f b.n 800d89a { mtCOVERAGE_TEST_MARKER(); } /* It is time to remove the item from the Blocked state. */ ( void ) uxListRemove( &( pxTCB->xStateListItem ) ); 800d83a: 68bb ldr r3, [r7, #8] 800d83c: 3304 adds r3, #4 800d83e: 4618 mov r0, r3 800d840: f7fe fdc4 bl 800c3cc /* Is the task waiting on an event also? If so remove it from the event list. */ if( listLIST_ITEM_CONTAINER( &( pxTCB->xEventListItem ) ) != NULL ) 800d844: 68bb ldr r3, [r7, #8] 800d846: 6a9b ldr r3, [r3, #40] @ 0x28 800d848: 2b00 cmp r3, #0 800d84a: d004 beq.n 800d856 { ( void ) uxListRemove( &( pxTCB->xEventListItem ) ); 800d84c: 68bb ldr r3, [r7, #8] 800d84e: 3318 adds r3, #24 800d850: 4618 mov r0, r3 800d852: f7fe fdbb bl 800c3cc mtCOVERAGE_TEST_MARKER(); } /* Place the unblocked task into the appropriate ready list. */ prvAddTaskToReadyList( pxTCB ); 800d856: 68bb ldr r3, [r7, #8] 800d858: 6ada ldr r2, [r3, #44] @ 0x2c 800d85a: 4b25 ldr r3, [pc, #148] @ (800d8f0 ) 800d85c: 681b ldr r3, [r3, #0] 800d85e: 429a cmp r2, r3 800d860: d903 bls.n 800d86a 800d862: 68bb ldr r3, [r7, #8] 800d864: 6adb ldr r3, [r3, #44] @ 0x2c 800d866: 4a22 ldr r2, [pc, #136] @ (800d8f0 ) 800d868: 6013 str r3, [r2, #0] 800d86a: 68bb ldr r3, [r7, #8] 800d86c: 6ada ldr r2, [r3, #44] @ 0x2c 800d86e: 4613 mov r3, r2 800d870: 009b lsls r3, r3, #2 800d872: 4413 add r3, r2 800d874: 009b lsls r3, r3, #2 800d876: 4a1f ldr r2, [pc, #124] @ (800d8f4 ) 800d878: 441a add r2, r3 800d87a: 68bb ldr r3, [r7, #8] 800d87c: 3304 adds r3, #4 800d87e: 4619 mov r1, r3 800d880: 4610 mov r0, r2 800d882: f7fe fd46 bl 800c312 { /* Preemption is on, but a context switch should only be performed if the unblocked task has a priority that is equal to or higher than the currently executing task. */ if( pxTCB->uxPriority >= pxCurrentTCB->uxPriority ) 800d886: 68bb ldr r3, [r7, #8] 800d888: 6ada ldr r2, [r3, #44] @ 0x2c 800d88a: 4b1b ldr r3, [pc, #108] @ (800d8f8 ) 800d88c: 681b ldr r3, [r3, #0] 800d88e: 6adb ldr r3, [r3, #44] @ 0x2c 800d890: 429a cmp r2, r3 800d892: d3b8 bcc.n 800d806 { xSwitchRequired = pdTRUE; 800d894: 2301 movs r3, #1 800d896: 617b str r3, [r7, #20] if( listLIST_IS_EMPTY( pxDelayedTaskList ) != pdFALSE ) 800d898: e7b5 b.n 800d806 /* Tasks of equal priority to the currently running task will share processing time (time slice) if preemption is on, and the application writer has not explicitly turned time slicing off. */ #if ( ( configUSE_PREEMPTION == 1 ) && ( configUSE_TIME_SLICING == 1 ) ) { if( listCURRENT_LIST_LENGTH( &( pxReadyTasksLists[ pxCurrentTCB->uxPriority ] ) ) > ( UBaseType_t ) 1 ) 800d89a: 4b17 ldr r3, [pc, #92] @ (800d8f8 ) 800d89c: 681b ldr r3, [r3, #0] 800d89e: 6ada ldr r2, [r3, #44] @ 0x2c 800d8a0: 4914 ldr r1, [pc, #80] @ (800d8f4 ) 800d8a2: 4613 mov r3, r2 800d8a4: 009b lsls r3, r3, #2 800d8a6: 4413 add r3, r2 800d8a8: 009b lsls r3, r3, #2 800d8aa: 440b add r3, r1 800d8ac: 681b ldr r3, [r3, #0] 800d8ae: 2b01 cmp r3, #1 800d8b0: d901 bls.n 800d8b6 { xSwitchRequired = pdTRUE; 800d8b2: 2301 movs r3, #1 800d8b4: 617b str r3, [r7, #20] } #endif /* configUSE_TICK_HOOK */ #if ( configUSE_PREEMPTION == 1 ) { if( xYieldPending != pdFALSE ) 800d8b6: 4b11 ldr r3, [pc, #68] @ (800d8fc ) 800d8b8: 681b ldr r3, [r3, #0] 800d8ba: 2b00 cmp r3, #0 800d8bc: d007 beq.n 800d8ce { xSwitchRequired = pdTRUE; 800d8be: 2301 movs r3, #1 800d8c0: 617b str r3, [r7, #20] 800d8c2: e004 b.n 800d8ce } #endif /* configUSE_PREEMPTION */ } else { ++xPendedTicks; 800d8c4: 4b0e ldr r3, [pc, #56] @ (800d900 ) 800d8c6: 681b ldr r3, [r3, #0] 800d8c8: 3301 adds r3, #1 800d8ca: 4a0d ldr r2, [pc, #52] @ (800d900 ) 800d8cc: 6013 str r3, [r2, #0] vApplicationTickHook(); } #endif } return xSwitchRequired; 800d8ce: 697b ldr r3, [r7, #20] } 800d8d0: 4618 mov r0, r3 800d8d2: 3718 adds r7, #24 800d8d4: 46bd mov sp, r7 800d8d6: bd80 pop {r7, pc} 800d8d8: 20002854 .word 0x20002854 800d8dc: 20002830 .word 0x20002830 800d8e0: 200027e4 .word 0x200027e4 800d8e4: 200027e8 .word 0x200027e8 800d8e8: 20002844 .word 0x20002844 800d8ec: 2000284c .word 0x2000284c 800d8f0: 20002834 .word 0x20002834 800d8f4: 2000235c .word 0x2000235c 800d8f8: 20002358 .word 0x20002358 800d8fc: 20002840 .word 0x20002840 800d900: 2000283c .word 0x2000283c 0800d904 : #endif /* configUSE_APPLICATION_TASK_TAG */ /*-----------------------------------------------------------*/ void vTaskSwitchContext( void ) { 800d904: b480 push {r7} 800d906: b085 sub sp, #20 800d908: af00 add r7, sp, #0 if( uxSchedulerSuspended != ( UBaseType_t ) pdFALSE ) 800d90a: 4b28 ldr r3, [pc, #160] @ (800d9ac ) 800d90c: 681b ldr r3, [r3, #0] 800d90e: 2b00 cmp r3, #0 800d910: d003 beq.n 800d91a { /* The scheduler is currently suspended - do not allow a context switch. */ xYieldPending = pdTRUE; 800d912: 4b27 ldr r3, [pc, #156] @ (800d9b0 ) 800d914: 2201 movs r2, #1 800d916: 601a str r2, [r3, #0] for additional information. */ _impure_ptr = &( pxCurrentTCB->xNewLib_reent ); } #endif /* configUSE_NEWLIB_REENTRANT */ } } 800d918: e042 b.n 800d9a0 xYieldPending = pdFALSE; 800d91a: 4b25 ldr r3, [pc, #148] @ (800d9b0 ) 800d91c: 2200 movs r2, #0 800d91e: 601a str r2, [r3, #0] taskSELECT_HIGHEST_PRIORITY_TASK(); /*lint !e9079 void * is used as this macro is used with timers and co-routines too. Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */ 800d920: 4b24 ldr r3, [pc, #144] @ (800d9b4 ) 800d922: 681b ldr r3, [r3, #0] 800d924: 60fb str r3, [r7, #12] 800d926: e011 b.n 800d94c 800d928: 68fb ldr r3, [r7, #12] 800d92a: 2b00 cmp r3, #0 800d92c: d10b bne.n 800d946 __asm volatile 800d92e: f04f 0350 mov.w r3, #80 @ 0x50 800d932: f383 8811 msr BASEPRI, r3 800d936: f3bf 8f6f isb sy 800d93a: f3bf 8f4f dsb sy 800d93e: 607b str r3, [r7, #4] } 800d940: bf00 nop 800d942: bf00 nop 800d944: e7fd b.n 800d942 800d946: 68fb ldr r3, [r7, #12] 800d948: 3b01 subs r3, #1 800d94a: 60fb str r3, [r7, #12] 800d94c: 491a ldr r1, [pc, #104] @ (800d9b8 ) 800d94e: 68fa ldr r2, [r7, #12] 800d950: 4613 mov r3, r2 800d952: 009b lsls r3, r3, #2 800d954: 4413 add r3, r2 800d956: 009b lsls r3, r3, #2 800d958: 440b add r3, r1 800d95a: 681b ldr r3, [r3, #0] 800d95c: 2b00 cmp r3, #0 800d95e: d0e3 beq.n 800d928 800d960: 68fa ldr r2, [r7, #12] 800d962: 4613 mov r3, r2 800d964: 009b lsls r3, r3, #2 800d966: 4413 add r3, r2 800d968: 009b lsls r3, r3, #2 800d96a: 4a13 ldr r2, [pc, #76] @ (800d9b8 ) 800d96c: 4413 add r3, r2 800d96e: 60bb str r3, [r7, #8] 800d970: 68bb ldr r3, [r7, #8] 800d972: 685b ldr r3, [r3, #4] 800d974: 685a ldr r2, [r3, #4] 800d976: 68bb ldr r3, [r7, #8] 800d978: 605a str r2, [r3, #4] 800d97a: 68bb ldr r3, [r7, #8] 800d97c: 685a ldr r2, [r3, #4] 800d97e: 68bb ldr r3, [r7, #8] 800d980: 3308 adds r3, #8 800d982: 429a cmp r2, r3 800d984: d104 bne.n 800d990 800d986: 68bb ldr r3, [r7, #8] 800d988: 685b ldr r3, [r3, #4] 800d98a: 685a ldr r2, [r3, #4] 800d98c: 68bb ldr r3, [r7, #8] 800d98e: 605a str r2, [r3, #4] 800d990: 68bb ldr r3, [r7, #8] 800d992: 685b ldr r3, [r3, #4] 800d994: 68db ldr r3, [r3, #12] 800d996: 4a09 ldr r2, [pc, #36] @ (800d9bc ) 800d998: 6013 str r3, [r2, #0] 800d99a: 4a06 ldr r2, [pc, #24] @ (800d9b4 ) 800d99c: 68fb ldr r3, [r7, #12] 800d99e: 6013 str r3, [r2, #0] } 800d9a0: bf00 nop 800d9a2: 3714 adds r7, #20 800d9a4: 46bd mov sp, r7 800d9a6: f85d 7b04 ldr.w r7, [sp], #4 800d9aa: 4770 bx lr 800d9ac: 20002854 .word 0x20002854 800d9b0: 20002840 .word 0x20002840 800d9b4: 20002834 .word 0x20002834 800d9b8: 2000235c .word 0x2000235c 800d9bc: 20002358 .word 0x20002358 0800d9c0 : /*-----------------------------------------------------------*/ void vTaskPlaceOnEventList( List_t * const pxEventList, const TickType_t xTicksToWait ) { 800d9c0: b580 push {r7, lr} 800d9c2: b084 sub sp, #16 800d9c4: af00 add r7, sp, #0 800d9c6: 6078 str r0, [r7, #4] 800d9c8: 6039 str r1, [r7, #0] configASSERT( pxEventList ); 800d9ca: 687b ldr r3, [r7, #4] 800d9cc: 2b00 cmp r3, #0 800d9ce: d10b bne.n 800d9e8 __asm volatile 800d9d0: f04f 0350 mov.w r3, #80 @ 0x50 800d9d4: f383 8811 msr BASEPRI, r3 800d9d8: f3bf 8f6f isb sy 800d9dc: f3bf 8f4f dsb sy 800d9e0: 60fb str r3, [r7, #12] } 800d9e2: bf00 nop 800d9e4: bf00 nop 800d9e6: e7fd b.n 800d9e4 /* Place the event list item of the TCB in the appropriate event list. This is placed in the list in priority order so the highest priority task is the first to be woken by the event. The queue that contains the event list is locked, preventing simultaneous access from interrupts. */ vListInsert( pxEventList, &( pxCurrentTCB->xEventListItem ) ); 800d9e8: 4b07 ldr r3, [pc, #28] @ (800da08 ) 800d9ea: 681b ldr r3, [r3, #0] 800d9ec: 3318 adds r3, #24 800d9ee: 4619 mov r1, r3 800d9f0: 6878 ldr r0, [r7, #4] 800d9f2: f7fe fcb2 bl 800c35a prvAddCurrentTaskToDelayedList( xTicksToWait, pdTRUE ); 800d9f6: 2101 movs r1, #1 800d9f8: 6838 ldr r0, [r7, #0] 800d9fa: f000 fc83 bl 800e304 } 800d9fe: bf00 nop 800da00: 3710 adds r7, #16 800da02: 46bd mov sp, r7 800da04: bd80 pop {r7, pc} 800da06: bf00 nop 800da08: 20002358 .word 0x20002358 0800da0c : /*-----------------------------------------------------------*/ #if( configUSE_TIMERS == 1 ) void vTaskPlaceOnEventListRestricted( List_t * const pxEventList, TickType_t xTicksToWait, const BaseType_t xWaitIndefinitely ) { 800da0c: b580 push {r7, lr} 800da0e: b086 sub sp, #24 800da10: af00 add r7, sp, #0 800da12: 60f8 str r0, [r7, #12] 800da14: 60b9 str r1, [r7, #8] 800da16: 607a str r2, [r7, #4] configASSERT( pxEventList ); 800da18: 68fb ldr r3, [r7, #12] 800da1a: 2b00 cmp r3, #0 800da1c: d10b bne.n 800da36 __asm volatile 800da1e: f04f 0350 mov.w r3, #80 @ 0x50 800da22: f383 8811 msr BASEPRI, r3 800da26: f3bf 8f6f isb sy 800da2a: f3bf 8f4f dsb sy 800da2e: 617b str r3, [r7, #20] } 800da30: bf00 nop 800da32: bf00 nop 800da34: e7fd b.n 800da32 /* Place the event list item of the TCB in the appropriate event list. In this case it is assume that this is the only task that is going to be waiting on this event list, so the faster vListInsertEnd() function can be used in place of vListInsert. */ vListInsertEnd( pxEventList, &( pxCurrentTCB->xEventListItem ) ); 800da36: 4b0a ldr r3, [pc, #40] @ (800da60 ) 800da38: 681b ldr r3, [r3, #0] 800da3a: 3318 adds r3, #24 800da3c: 4619 mov r1, r3 800da3e: 68f8 ldr r0, [r7, #12] 800da40: f7fe fc67 bl 800c312 /* If the task should block indefinitely then set the block time to a value that will be recognised as an indefinite delay inside the prvAddCurrentTaskToDelayedList() function. */ if( xWaitIndefinitely != pdFALSE ) 800da44: 687b ldr r3, [r7, #4] 800da46: 2b00 cmp r3, #0 800da48: d002 beq.n 800da50 { xTicksToWait = portMAX_DELAY; 800da4a: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff 800da4e: 60bb str r3, [r7, #8] } traceTASK_DELAY_UNTIL( ( xTickCount + xTicksToWait ) ); prvAddCurrentTaskToDelayedList( xTicksToWait, xWaitIndefinitely ); 800da50: 6879 ldr r1, [r7, #4] 800da52: 68b8 ldr r0, [r7, #8] 800da54: f000 fc56 bl 800e304 } 800da58: bf00 nop 800da5a: 3718 adds r7, #24 800da5c: 46bd mov sp, r7 800da5e: bd80 pop {r7, pc} 800da60: 20002358 .word 0x20002358 0800da64 : #endif /* configUSE_TIMERS */ /*-----------------------------------------------------------*/ BaseType_t xTaskRemoveFromEventList( const List_t * const pxEventList ) { 800da64: b580 push {r7, lr} 800da66: b086 sub sp, #24 800da68: af00 add r7, sp, #0 800da6a: 6078 str r0, [r7, #4] get called - the lock count on the queue will get modified instead. This means exclusive access to the event list is guaranteed here. This function assumes that a check has already been made to ensure that pxEventList is not empty. */ pxUnblockedTCB = listGET_OWNER_OF_HEAD_ENTRY( pxEventList ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too. Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */ 800da6c: 687b ldr r3, [r7, #4] 800da6e: 68db ldr r3, [r3, #12] 800da70: 68db ldr r3, [r3, #12] 800da72: 613b str r3, [r7, #16] configASSERT( pxUnblockedTCB ); 800da74: 693b ldr r3, [r7, #16] 800da76: 2b00 cmp r3, #0 800da78: d10b bne.n 800da92 __asm volatile 800da7a: f04f 0350 mov.w r3, #80 @ 0x50 800da7e: f383 8811 msr BASEPRI, r3 800da82: f3bf 8f6f isb sy 800da86: f3bf 8f4f dsb sy 800da8a: 60fb str r3, [r7, #12] } 800da8c: bf00 nop 800da8e: bf00 nop 800da90: e7fd b.n 800da8e ( void ) uxListRemove( &( pxUnblockedTCB->xEventListItem ) ); 800da92: 693b ldr r3, [r7, #16] 800da94: 3318 adds r3, #24 800da96: 4618 mov r0, r3 800da98: f7fe fc98 bl 800c3cc if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE ) 800da9c: 4b1d ldr r3, [pc, #116] @ (800db14 ) 800da9e: 681b ldr r3, [r3, #0] 800daa0: 2b00 cmp r3, #0 800daa2: d11d bne.n 800dae0 { ( void ) uxListRemove( &( pxUnblockedTCB->xStateListItem ) ); 800daa4: 693b ldr r3, [r7, #16] 800daa6: 3304 adds r3, #4 800daa8: 4618 mov r0, r3 800daaa: f7fe fc8f bl 800c3cc prvAddTaskToReadyList( pxUnblockedTCB ); 800daae: 693b ldr r3, [r7, #16] 800dab0: 6ada ldr r2, [r3, #44] @ 0x2c 800dab2: 4b19 ldr r3, [pc, #100] @ (800db18 ) 800dab4: 681b ldr r3, [r3, #0] 800dab6: 429a cmp r2, r3 800dab8: d903 bls.n 800dac2 800daba: 693b ldr r3, [r7, #16] 800dabc: 6adb ldr r3, [r3, #44] @ 0x2c 800dabe: 4a16 ldr r2, [pc, #88] @ (800db18 ) 800dac0: 6013 str r3, [r2, #0] 800dac2: 693b ldr r3, [r7, #16] 800dac4: 6ada ldr r2, [r3, #44] @ 0x2c 800dac6: 4613 mov r3, r2 800dac8: 009b lsls r3, r3, #2 800daca: 4413 add r3, r2 800dacc: 009b lsls r3, r3, #2 800dace: 4a13 ldr r2, [pc, #76] @ (800db1c ) 800dad0: 441a add r2, r3 800dad2: 693b ldr r3, [r7, #16] 800dad4: 3304 adds r3, #4 800dad6: 4619 mov r1, r3 800dad8: 4610 mov r0, r2 800dada: f7fe fc1a bl 800c312 800dade: e005 b.n 800daec } else { /* The delayed and ready lists cannot be accessed, so hold this task pending until the scheduler is resumed. */ vListInsertEnd( &( xPendingReadyList ), &( pxUnblockedTCB->xEventListItem ) ); 800dae0: 693b ldr r3, [r7, #16] 800dae2: 3318 adds r3, #24 800dae4: 4619 mov r1, r3 800dae6: 480e ldr r0, [pc, #56] @ (800db20 ) 800dae8: f7fe fc13 bl 800c312 } if( pxUnblockedTCB->uxPriority > pxCurrentTCB->uxPriority ) 800daec: 693b ldr r3, [r7, #16] 800daee: 6ada ldr r2, [r3, #44] @ 0x2c 800daf0: 4b0c ldr r3, [pc, #48] @ (800db24 ) 800daf2: 681b ldr r3, [r3, #0] 800daf4: 6adb ldr r3, [r3, #44] @ 0x2c 800daf6: 429a cmp r2, r3 800daf8: d905 bls.n 800db06 { /* Return true if the task removed from the event list has a higher priority than the calling task. This allows the calling task to know if it should force a context switch now. */ xReturn = pdTRUE; 800dafa: 2301 movs r3, #1 800dafc: 617b str r3, [r7, #20] /* Mark that a yield is pending in case the user is not using the "xHigherPriorityTaskWoken" parameter to an ISR safe FreeRTOS function. */ xYieldPending = pdTRUE; 800dafe: 4b0a ldr r3, [pc, #40] @ (800db28 ) 800db00: 2201 movs r2, #1 800db02: 601a str r2, [r3, #0] 800db04: e001 b.n 800db0a } else { xReturn = pdFALSE; 800db06: 2300 movs r3, #0 800db08: 617b str r3, [r7, #20] } return xReturn; 800db0a: 697b ldr r3, [r7, #20] } 800db0c: 4618 mov r0, r3 800db0e: 3718 adds r7, #24 800db10: 46bd mov sp, r7 800db12: bd80 pop {r7, pc} 800db14: 20002854 .word 0x20002854 800db18: 20002834 .word 0x20002834 800db1c: 2000235c .word 0x2000235c 800db20: 200027ec .word 0x200027ec 800db24: 20002358 .word 0x20002358 800db28: 20002840 .word 0x20002840 0800db2c : taskEXIT_CRITICAL(); } /*-----------------------------------------------------------*/ void vTaskInternalSetTimeOutState( TimeOut_t * const pxTimeOut ) { 800db2c: b480 push {r7} 800db2e: b083 sub sp, #12 800db30: af00 add r7, sp, #0 800db32: 6078 str r0, [r7, #4] /* For internal use only as it does not use a critical section. */ pxTimeOut->xOverflowCount = xNumOfOverflows; 800db34: 4b06 ldr r3, [pc, #24] @ (800db50 ) 800db36: 681a ldr r2, [r3, #0] 800db38: 687b ldr r3, [r7, #4] 800db3a: 601a str r2, [r3, #0] pxTimeOut->xTimeOnEntering = xTickCount; 800db3c: 4b05 ldr r3, [pc, #20] @ (800db54 ) 800db3e: 681a ldr r2, [r3, #0] 800db40: 687b ldr r3, [r7, #4] 800db42: 605a str r2, [r3, #4] } 800db44: bf00 nop 800db46: 370c adds r7, #12 800db48: 46bd mov sp, r7 800db4a: f85d 7b04 ldr.w r7, [sp], #4 800db4e: 4770 bx lr 800db50: 20002844 .word 0x20002844 800db54: 20002830 .word 0x20002830 0800db58 : /*-----------------------------------------------------------*/ BaseType_t xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, TickType_t * const pxTicksToWait ) { 800db58: b580 push {r7, lr} 800db5a: b088 sub sp, #32 800db5c: af00 add r7, sp, #0 800db5e: 6078 str r0, [r7, #4] 800db60: 6039 str r1, [r7, #0] BaseType_t xReturn; configASSERT( pxTimeOut ); 800db62: 687b ldr r3, [r7, #4] 800db64: 2b00 cmp r3, #0 800db66: d10b bne.n 800db80 __asm volatile 800db68: f04f 0350 mov.w r3, #80 @ 0x50 800db6c: f383 8811 msr BASEPRI, r3 800db70: f3bf 8f6f isb sy 800db74: f3bf 8f4f dsb sy 800db78: 613b str r3, [r7, #16] } 800db7a: bf00 nop 800db7c: bf00 nop 800db7e: e7fd b.n 800db7c configASSERT( pxTicksToWait ); 800db80: 683b ldr r3, [r7, #0] 800db82: 2b00 cmp r3, #0 800db84: d10b bne.n 800db9e __asm volatile 800db86: f04f 0350 mov.w r3, #80 @ 0x50 800db8a: f383 8811 msr BASEPRI, r3 800db8e: f3bf 8f6f isb sy 800db92: f3bf 8f4f dsb sy 800db96: 60fb str r3, [r7, #12] } 800db98: bf00 nop 800db9a: bf00 nop 800db9c: e7fd b.n 800db9a taskENTER_CRITICAL(); 800db9e: f001 f893 bl 800ecc8 { /* Minor optimisation. The tick count cannot change in this block. */ const TickType_t xConstTickCount = xTickCount; 800dba2: 4b1d ldr r3, [pc, #116] @ (800dc18 ) 800dba4: 681b ldr r3, [r3, #0] 800dba6: 61bb str r3, [r7, #24] const TickType_t xElapsedTime = xConstTickCount - pxTimeOut->xTimeOnEntering; 800dba8: 687b ldr r3, [r7, #4] 800dbaa: 685b ldr r3, [r3, #4] 800dbac: 69ba ldr r2, [r7, #24] 800dbae: 1ad3 subs r3, r2, r3 800dbb0: 617b str r3, [r7, #20] } else #endif #if ( INCLUDE_vTaskSuspend == 1 ) if( *pxTicksToWait == portMAX_DELAY ) 800dbb2: 683b ldr r3, [r7, #0] 800dbb4: 681b ldr r3, [r3, #0] 800dbb6: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff 800dbba: d102 bne.n 800dbc2 { /* If INCLUDE_vTaskSuspend is set to 1 and the block time specified is the maximum block time then the task should block indefinitely, and therefore never time out. */ xReturn = pdFALSE; 800dbbc: 2300 movs r3, #0 800dbbe: 61fb str r3, [r7, #28] 800dbc0: e023 b.n 800dc0a } else #endif if( ( xNumOfOverflows != pxTimeOut->xOverflowCount ) && ( xConstTickCount >= pxTimeOut->xTimeOnEntering ) ) /*lint !e525 Indentation preferred as is to make code within pre-processor directives clearer. */ 800dbc2: 687b ldr r3, [r7, #4] 800dbc4: 681a ldr r2, [r3, #0] 800dbc6: 4b15 ldr r3, [pc, #84] @ (800dc1c ) 800dbc8: 681b ldr r3, [r3, #0] 800dbca: 429a cmp r2, r3 800dbcc: d007 beq.n 800dbde 800dbce: 687b ldr r3, [r7, #4] 800dbd0: 685b ldr r3, [r3, #4] 800dbd2: 69ba ldr r2, [r7, #24] 800dbd4: 429a cmp r2, r3 800dbd6: d302 bcc.n 800dbde /* The tick count is greater than the time at which vTaskSetTimeout() was called, but has also overflowed since vTaskSetTimeOut() was called. It must have wrapped all the way around and gone past again. This passed since vTaskSetTimeout() was called. */ xReturn = pdTRUE; 800dbd8: 2301 movs r3, #1 800dbda: 61fb str r3, [r7, #28] 800dbdc: e015 b.n 800dc0a } else if( xElapsedTime < *pxTicksToWait ) /*lint !e961 Explicit casting is only redundant with some compilers, whereas others require it to prevent integer conversion errors. */ 800dbde: 683b ldr r3, [r7, #0] 800dbe0: 681b ldr r3, [r3, #0] 800dbe2: 697a ldr r2, [r7, #20] 800dbe4: 429a cmp r2, r3 800dbe6: d20b bcs.n 800dc00 { /* Not a genuine timeout. Adjust parameters for time remaining. */ *pxTicksToWait -= xElapsedTime; 800dbe8: 683b ldr r3, [r7, #0] 800dbea: 681a ldr r2, [r3, #0] 800dbec: 697b ldr r3, [r7, #20] 800dbee: 1ad2 subs r2, r2, r3 800dbf0: 683b ldr r3, [r7, #0] 800dbf2: 601a str r2, [r3, #0] vTaskInternalSetTimeOutState( pxTimeOut ); 800dbf4: 6878 ldr r0, [r7, #4] 800dbf6: f7ff ff99 bl 800db2c xReturn = pdFALSE; 800dbfa: 2300 movs r3, #0 800dbfc: 61fb str r3, [r7, #28] 800dbfe: e004 b.n 800dc0a } else { *pxTicksToWait = 0; 800dc00: 683b ldr r3, [r7, #0] 800dc02: 2200 movs r2, #0 800dc04: 601a str r2, [r3, #0] xReturn = pdTRUE; 800dc06: 2301 movs r3, #1 800dc08: 61fb str r3, [r7, #28] } } taskEXIT_CRITICAL(); 800dc0a: f001 f88f bl 800ed2c return xReturn; 800dc0e: 69fb ldr r3, [r7, #28] } 800dc10: 4618 mov r0, r3 800dc12: 3720 adds r7, #32 800dc14: 46bd mov sp, r7 800dc16: bd80 pop {r7, pc} 800dc18: 20002830 .word 0x20002830 800dc1c: 20002844 .word 0x20002844 0800dc20 : /*-----------------------------------------------------------*/ void vTaskMissedYield( void ) { 800dc20: b480 push {r7} 800dc22: af00 add r7, sp, #0 xYieldPending = pdTRUE; 800dc24: 4b03 ldr r3, [pc, #12] @ (800dc34 ) 800dc26: 2201 movs r2, #1 800dc28: 601a str r2, [r3, #0] } 800dc2a: bf00 nop 800dc2c: 46bd mov sp, r7 800dc2e: f85d 7b04 ldr.w r7, [sp], #4 800dc32: 4770 bx lr 800dc34: 20002840 .word 0x20002840 0800dc38 : * * void prvIdleTask( void *pvParameters ); * */ static portTASK_FUNCTION( prvIdleTask, pvParameters ) { 800dc38: b580 push {r7, lr} 800dc3a: b082 sub sp, #8 800dc3c: af00 add r7, sp, #0 800dc3e: 6078 str r0, [r7, #4] for( ;; ) { /* See if any tasks have deleted themselves - if so then the idle task is responsible for freeing the deleted task's TCB and stack. */ prvCheckTasksWaitingTermination(); 800dc40: f000 f852 bl 800dce8 A critical region is not required here as we are just reading from the list, and an occasional incorrect value will not matter. If the ready list at the idle priority contains more than one task then a task other than the idle task is ready to execute. */ if( listCURRENT_LIST_LENGTH( &( pxReadyTasksLists[ tskIDLE_PRIORITY ] ) ) > ( UBaseType_t ) 1 ) 800dc44: 4b06 ldr r3, [pc, #24] @ (800dc60 ) 800dc46: 681b ldr r3, [r3, #0] 800dc48: 2b01 cmp r3, #1 800dc4a: d9f9 bls.n 800dc40 { taskYIELD(); 800dc4c: 4b05 ldr r3, [pc, #20] @ (800dc64 ) 800dc4e: f04f 5280 mov.w r2, #268435456 @ 0x10000000 800dc52: 601a str r2, [r3, #0] 800dc54: f3bf 8f4f dsb sy 800dc58: f3bf 8f6f isb sy prvCheckTasksWaitingTermination(); 800dc5c: e7f0 b.n 800dc40 800dc5e: bf00 nop 800dc60: 2000235c .word 0x2000235c 800dc64: e000ed04 .word 0xe000ed04 0800dc68 : #endif /* portUSING_MPU_WRAPPERS */ /*-----------------------------------------------------------*/ static void prvInitialiseTaskLists( void ) { 800dc68: b580 push {r7, lr} 800dc6a: b082 sub sp, #8 800dc6c: af00 add r7, sp, #0 UBaseType_t uxPriority; for( uxPriority = ( UBaseType_t ) 0U; uxPriority < ( UBaseType_t ) configMAX_PRIORITIES; uxPriority++ ) 800dc6e: 2300 movs r3, #0 800dc70: 607b str r3, [r7, #4] 800dc72: e00c b.n 800dc8e { vListInitialise( &( pxReadyTasksLists[ uxPriority ] ) ); 800dc74: 687a ldr r2, [r7, #4] 800dc76: 4613 mov r3, r2 800dc78: 009b lsls r3, r3, #2 800dc7a: 4413 add r3, r2 800dc7c: 009b lsls r3, r3, #2 800dc7e: 4a12 ldr r2, [pc, #72] @ (800dcc8 ) 800dc80: 4413 add r3, r2 800dc82: 4618 mov r0, r3 800dc84: f7fe fb18 bl 800c2b8 for( uxPriority = ( UBaseType_t ) 0U; uxPriority < ( UBaseType_t ) configMAX_PRIORITIES; uxPriority++ ) 800dc88: 687b ldr r3, [r7, #4] 800dc8a: 3301 adds r3, #1 800dc8c: 607b str r3, [r7, #4] 800dc8e: 687b ldr r3, [r7, #4] 800dc90: 2b37 cmp r3, #55 @ 0x37 800dc92: d9ef bls.n 800dc74 } vListInitialise( &xDelayedTaskList1 ); 800dc94: 480d ldr r0, [pc, #52] @ (800dccc ) 800dc96: f7fe fb0f bl 800c2b8 vListInitialise( &xDelayedTaskList2 ); 800dc9a: 480d ldr r0, [pc, #52] @ (800dcd0 ) 800dc9c: f7fe fb0c bl 800c2b8 vListInitialise( &xPendingReadyList ); 800dca0: 480c ldr r0, [pc, #48] @ (800dcd4 ) 800dca2: f7fe fb09 bl 800c2b8 #if ( INCLUDE_vTaskDelete == 1 ) { vListInitialise( &xTasksWaitingTermination ); 800dca6: 480c ldr r0, [pc, #48] @ (800dcd8 ) 800dca8: f7fe fb06 bl 800c2b8 } #endif /* INCLUDE_vTaskDelete */ #if ( INCLUDE_vTaskSuspend == 1 ) { vListInitialise( &xSuspendedTaskList ); 800dcac: 480b ldr r0, [pc, #44] @ (800dcdc ) 800dcae: f7fe fb03 bl 800c2b8 } #endif /* INCLUDE_vTaskSuspend */ /* Start with pxDelayedTaskList using list1 and the pxOverflowDelayedTaskList using list2. */ pxDelayedTaskList = &xDelayedTaskList1; 800dcb2: 4b0b ldr r3, [pc, #44] @ (800dce0 ) 800dcb4: 4a05 ldr r2, [pc, #20] @ (800dccc ) 800dcb6: 601a str r2, [r3, #0] pxOverflowDelayedTaskList = &xDelayedTaskList2; 800dcb8: 4b0a ldr r3, [pc, #40] @ (800dce4 ) 800dcba: 4a05 ldr r2, [pc, #20] @ (800dcd0 ) 800dcbc: 601a str r2, [r3, #0] } 800dcbe: bf00 nop 800dcc0: 3708 adds r7, #8 800dcc2: 46bd mov sp, r7 800dcc4: bd80 pop {r7, pc} 800dcc6: bf00 nop 800dcc8: 2000235c .word 0x2000235c 800dccc: 200027bc .word 0x200027bc 800dcd0: 200027d0 .word 0x200027d0 800dcd4: 200027ec .word 0x200027ec 800dcd8: 20002800 .word 0x20002800 800dcdc: 20002818 .word 0x20002818 800dce0: 200027e4 .word 0x200027e4 800dce4: 200027e8 .word 0x200027e8 0800dce8 : /*-----------------------------------------------------------*/ static void prvCheckTasksWaitingTermination( void ) { 800dce8: b580 push {r7, lr} 800dcea: b082 sub sp, #8 800dcec: af00 add r7, sp, #0 { TCB_t *pxTCB; /* uxDeletedTasksWaitingCleanUp is used to prevent taskENTER_CRITICAL() being called too often in the idle task. */ while( uxDeletedTasksWaitingCleanUp > ( UBaseType_t ) 0U ) 800dcee: e019 b.n 800dd24 { taskENTER_CRITICAL(); 800dcf0: f000 ffea bl 800ecc8 { pxTCB = listGET_OWNER_OF_HEAD_ENTRY( ( &xTasksWaitingTermination ) ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too. Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */ 800dcf4: 4b10 ldr r3, [pc, #64] @ (800dd38 ) 800dcf6: 68db ldr r3, [r3, #12] 800dcf8: 68db ldr r3, [r3, #12] 800dcfa: 607b str r3, [r7, #4] ( void ) uxListRemove( &( pxTCB->xStateListItem ) ); 800dcfc: 687b ldr r3, [r7, #4] 800dcfe: 3304 adds r3, #4 800dd00: 4618 mov r0, r3 800dd02: f7fe fb63 bl 800c3cc --uxCurrentNumberOfTasks; 800dd06: 4b0d ldr r3, [pc, #52] @ (800dd3c ) 800dd08: 681b ldr r3, [r3, #0] 800dd0a: 3b01 subs r3, #1 800dd0c: 4a0b ldr r2, [pc, #44] @ (800dd3c ) 800dd0e: 6013 str r3, [r2, #0] --uxDeletedTasksWaitingCleanUp; 800dd10: 4b0b ldr r3, [pc, #44] @ (800dd40 ) 800dd12: 681b ldr r3, [r3, #0] 800dd14: 3b01 subs r3, #1 800dd16: 4a0a ldr r2, [pc, #40] @ (800dd40 ) 800dd18: 6013 str r3, [r2, #0] } taskEXIT_CRITICAL(); 800dd1a: f001 f807 bl 800ed2c prvDeleteTCB( pxTCB ); 800dd1e: 6878 ldr r0, [r7, #4] 800dd20: f000 f810 bl 800dd44 while( uxDeletedTasksWaitingCleanUp > ( UBaseType_t ) 0U ) 800dd24: 4b06 ldr r3, [pc, #24] @ (800dd40 ) 800dd26: 681b ldr r3, [r3, #0] 800dd28: 2b00 cmp r3, #0 800dd2a: d1e1 bne.n 800dcf0 } } #endif /* INCLUDE_vTaskDelete */ } 800dd2c: bf00 nop 800dd2e: bf00 nop 800dd30: 3708 adds r7, #8 800dd32: 46bd mov sp, r7 800dd34: bd80 pop {r7, pc} 800dd36: bf00 nop 800dd38: 20002800 .word 0x20002800 800dd3c: 2000282c .word 0x2000282c 800dd40: 20002814 .word 0x20002814 0800dd44 : /*-----------------------------------------------------------*/ #if ( INCLUDE_vTaskDelete == 1 ) static void prvDeleteTCB( TCB_t *pxTCB ) { 800dd44: b580 push {r7, lr} 800dd46: b084 sub sp, #16 800dd48: af00 add r7, sp, #0 800dd4a: 6078 str r0, [r7, #4] #elif( tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE != 0 ) /*lint !e731 !e9029 Macro has been consolidated for readability reasons. */ { /* The task could have been allocated statically or dynamically, so check what was statically allocated before trying to free the memory. */ if( pxTCB->ucStaticallyAllocated == tskDYNAMICALLY_ALLOCATED_STACK_AND_TCB ) 800dd4c: 687b ldr r3, [r7, #4] 800dd4e: f893 3059 ldrb.w r3, [r3, #89] @ 0x59 800dd52: 2b00 cmp r3, #0 800dd54: d108 bne.n 800dd68 { /* Both the stack and TCB were allocated dynamically, so both must be freed. */ vPortFree( pxTCB->pxStack ); 800dd56: 687b ldr r3, [r7, #4] 800dd58: 6b1b ldr r3, [r3, #48] @ 0x30 800dd5a: 4618 mov r0, r3 800dd5c: f001 f9a4 bl 800f0a8 vPortFree( pxTCB ); 800dd60: 6878 ldr r0, [r7, #4] 800dd62: f001 f9a1 bl 800f0a8 configASSERT( pxTCB->ucStaticallyAllocated == tskSTATICALLY_ALLOCATED_STACK_AND_TCB ); mtCOVERAGE_TEST_MARKER(); } } #endif /* configSUPPORT_DYNAMIC_ALLOCATION */ } 800dd66: e019 b.n 800dd9c else if( pxTCB->ucStaticallyAllocated == tskSTATICALLY_ALLOCATED_STACK_ONLY ) 800dd68: 687b ldr r3, [r7, #4] 800dd6a: f893 3059 ldrb.w r3, [r3, #89] @ 0x59 800dd6e: 2b01 cmp r3, #1 800dd70: d103 bne.n 800dd7a vPortFree( pxTCB ); 800dd72: 6878 ldr r0, [r7, #4] 800dd74: f001 f998 bl 800f0a8 } 800dd78: e010 b.n 800dd9c configASSERT( pxTCB->ucStaticallyAllocated == tskSTATICALLY_ALLOCATED_STACK_AND_TCB ); 800dd7a: 687b ldr r3, [r7, #4] 800dd7c: f893 3059 ldrb.w r3, [r3, #89] @ 0x59 800dd80: 2b02 cmp r3, #2 800dd82: d00b beq.n 800dd9c __asm volatile 800dd84: f04f 0350 mov.w r3, #80 @ 0x50 800dd88: f383 8811 msr BASEPRI, r3 800dd8c: f3bf 8f6f isb sy 800dd90: f3bf 8f4f dsb sy 800dd94: 60fb str r3, [r7, #12] } 800dd96: bf00 nop 800dd98: bf00 nop 800dd9a: e7fd b.n 800dd98 } 800dd9c: bf00 nop 800dd9e: 3710 adds r7, #16 800dda0: 46bd mov sp, r7 800dda2: bd80 pop {r7, pc} 0800dda4 : #endif /* INCLUDE_vTaskDelete */ /*-----------------------------------------------------------*/ static void prvResetNextTaskUnblockTime( void ) { 800dda4: b480 push {r7} 800dda6: b083 sub sp, #12 800dda8: af00 add r7, sp, #0 TCB_t *pxTCB; if( listLIST_IS_EMPTY( pxDelayedTaskList ) != pdFALSE ) 800ddaa: 4b0c ldr r3, [pc, #48] @ (800dddc ) 800ddac: 681b ldr r3, [r3, #0] 800ddae: 681b ldr r3, [r3, #0] 800ddb0: 2b00 cmp r3, #0 800ddb2: d104 bne.n 800ddbe { /* The new current delayed list is empty. Set xNextTaskUnblockTime to the maximum possible value so it is extremely unlikely that the if( xTickCount >= xNextTaskUnblockTime ) test will pass until there is an item in the delayed list. */ xNextTaskUnblockTime = portMAX_DELAY; 800ddb4: 4b0a ldr r3, [pc, #40] @ (800dde0 ) 800ddb6: f04f 32ff mov.w r2, #4294967295 @ 0xffffffff 800ddba: 601a str r2, [r3, #0] which the task at the head of the delayed list should be removed from the Blocked state. */ ( pxTCB ) = listGET_OWNER_OF_HEAD_ENTRY( pxDelayedTaskList ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too. Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */ xNextTaskUnblockTime = listGET_LIST_ITEM_VALUE( &( ( pxTCB )->xStateListItem ) ); } } 800ddbc: e008 b.n 800ddd0 ( pxTCB ) = listGET_OWNER_OF_HEAD_ENTRY( pxDelayedTaskList ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too. Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */ 800ddbe: 4b07 ldr r3, [pc, #28] @ (800dddc ) 800ddc0: 681b ldr r3, [r3, #0] 800ddc2: 68db ldr r3, [r3, #12] 800ddc4: 68db ldr r3, [r3, #12] 800ddc6: 607b str r3, [r7, #4] xNextTaskUnblockTime = listGET_LIST_ITEM_VALUE( &( ( pxTCB )->xStateListItem ) ); 800ddc8: 687b ldr r3, [r7, #4] 800ddca: 685b ldr r3, [r3, #4] 800ddcc: 4a04 ldr r2, [pc, #16] @ (800dde0 ) 800ddce: 6013 str r3, [r2, #0] } 800ddd0: bf00 nop 800ddd2: 370c adds r7, #12 800ddd4: 46bd mov sp, r7 800ddd6: f85d 7b04 ldr.w r7, [sp], #4 800ddda: 4770 bx lr 800dddc: 200027e4 .word 0x200027e4 800dde0: 2000284c .word 0x2000284c 0800dde4 : /*-----------------------------------------------------------*/ #if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) ) BaseType_t xTaskGetSchedulerState( void ) { 800dde4: b480 push {r7} 800dde6: b083 sub sp, #12 800dde8: af00 add r7, sp, #0 BaseType_t xReturn; if( xSchedulerRunning == pdFALSE ) 800ddea: 4b0b ldr r3, [pc, #44] @ (800de18 ) 800ddec: 681b ldr r3, [r3, #0] 800ddee: 2b00 cmp r3, #0 800ddf0: d102 bne.n 800ddf8 { xReturn = taskSCHEDULER_NOT_STARTED; 800ddf2: 2301 movs r3, #1 800ddf4: 607b str r3, [r7, #4] 800ddf6: e008 b.n 800de0a } else { if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE ) 800ddf8: 4b08 ldr r3, [pc, #32] @ (800de1c ) 800ddfa: 681b ldr r3, [r3, #0] 800ddfc: 2b00 cmp r3, #0 800ddfe: d102 bne.n 800de06 { xReturn = taskSCHEDULER_RUNNING; 800de00: 2302 movs r3, #2 800de02: 607b str r3, [r7, #4] 800de04: e001 b.n 800de0a } else { xReturn = taskSCHEDULER_SUSPENDED; 800de06: 2300 movs r3, #0 800de08: 607b str r3, [r7, #4] } } return xReturn; 800de0a: 687b ldr r3, [r7, #4] } 800de0c: 4618 mov r0, r3 800de0e: 370c adds r7, #12 800de10: 46bd mov sp, r7 800de12: f85d 7b04 ldr.w r7, [sp], #4 800de16: 4770 bx lr 800de18: 20002838 .word 0x20002838 800de1c: 20002854 .word 0x20002854 0800de20 : /*-----------------------------------------------------------*/ #if ( configUSE_MUTEXES == 1 ) BaseType_t xTaskPriorityInherit( TaskHandle_t const pxMutexHolder ) { 800de20: b580 push {r7, lr} 800de22: b084 sub sp, #16 800de24: af00 add r7, sp, #0 800de26: 6078 str r0, [r7, #4] TCB_t * const pxMutexHolderTCB = pxMutexHolder; 800de28: 687b ldr r3, [r7, #4] 800de2a: 60bb str r3, [r7, #8] BaseType_t xReturn = pdFALSE; 800de2c: 2300 movs r3, #0 800de2e: 60fb str r3, [r7, #12] /* If the mutex was given back by an interrupt while the queue was locked then the mutex holder might now be NULL. _RB_ Is this still needed as interrupts can no longer use mutexes? */ if( pxMutexHolder != NULL ) 800de30: 687b ldr r3, [r7, #4] 800de32: 2b00 cmp r3, #0 800de34: d051 beq.n 800deda { /* If the holder of the mutex has a priority below the priority of the task attempting to obtain the mutex then it will temporarily inherit the priority of the task attempting to obtain the mutex. */ if( pxMutexHolderTCB->uxPriority < pxCurrentTCB->uxPriority ) 800de36: 68bb ldr r3, [r7, #8] 800de38: 6ada ldr r2, [r3, #44] @ 0x2c 800de3a: 4b2a ldr r3, [pc, #168] @ (800dee4 ) 800de3c: 681b ldr r3, [r3, #0] 800de3e: 6adb ldr r3, [r3, #44] @ 0x2c 800de40: 429a cmp r2, r3 800de42: d241 bcs.n 800dec8 { /* Adjust the mutex holder state to account for its new priority. Only reset the event list item value if the value is not being used for anything else. */ if( ( listGET_LIST_ITEM_VALUE( &( pxMutexHolderTCB->xEventListItem ) ) & taskEVENT_LIST_ITEM_VALUE_IN_USE ) == 0UL ) 800de44: 68bb ldr r3, [r7, #8] 800de46: 699b ldr r3, [r3, #24] 800de48: 2b00 cmp r3, #0 800de4a: db06 blt.n 800de5a { listSET_LIST_ITEM_VALUE( &( pxMutexHolderTCB->xEventListItem ), ( TickType_t ) configMAX_PRIORITIES - ( TickType_t ) pxCurrentTCB->uxPriority ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */ 800de4c: 4b25 ldr r3, [pc, #148] @ (800dee4 ) 800de4e: 681b ldr r3, [r3, #0] 800de50: 6adb ldr r3, [r3, #44] @ 0x2c 800de52: f1c3 0238 rsb r2, r3, #56 @ 0x38 800de56: 68bb ldr r3, [r7, #8] 800de58: 619a str r2, [r3, #24] mtCOVERAGE_TEST_MARKER(); } /* If the task being modified is in the ready state it will need to be moved into a new list. */ if( listIS_CONTAINED_WITHIN( &( pxReadyTasksLists[ pxMutexHolderTCB->uxPriority ] ), &( pxMutexHolderTCB->xStateListItem ) ) != pdFALSE ) 800de5a: 68bb ldr r3, [r7, #8] 800de5c: 6959 ldr r1, [r3, #20] 800de5e: 68bb ldr r3, [r7, #8] 800de60: 6ada ldr r2, [r3, #44] @ 0x2c 800de62: 4613 mov r3, r2 800de64: 009b lsls r3, r3, #2 800de66: 4413 add r3, r2 800de68: 009b lsls r3, r3, #2 800de6a: 4a1f ldr r2, [pc, #124] @ (800dee8 ) 800de6c: 4413 add r3, r2 800de6e: 4299 cmp r1, r3 800de70: d122 bne.n 800deb8 { if( uxListRemove( &( pxMutexHolderTCB->xStateListItem ) ) == ( UBaseType_t ) 0 ) 800de72: 68bb ldr r3, [r7, #8] 800de74: 3304 adds r3, #4 800de76: 4618 mov r0, r3 800de78: f7fe faa8 bl 800c3cc { mtCOVERAGE_TEST_MARKER(); } /* Inherit the priority before being moved into the new list. */ pxMutexHolderTCB->uxPriority = pxCurrentTCB->uxPriority; 800de7c: 4b19 ldr r3, [pc, #100] @ (800dee4 ) 800de7e: 681b ldr r3, [r3, #0] 800de80: 6ada ldr r2, [r3, #44] @ 0x2c 800de82: 68bb ldr r3, [r7, #8] 800de84: 62da str r2, [r3, #44] @ 0x2c prvAddTaskToReadyList( pxMutexHolderTCB ); 800de86: 68bb ldr r3, [r7, #8] 800de88: 6ada ldr r2, [r3, #44] @ 0x2c 800de8a: 4b18 ldr r3, [pc, #96] @ (800deec ) 800de8c: 681b ldr r3, [r3, #0] 800de8e: 429a cmp r2, r3 800de90: d903 bls.n 800de9a 800de92: 68bb ldr r3, [r7, #8] 800de94: 6adb ldr r3, [r3, #44] @ 0x2c 800de96: 4a15 ldr r2, [pc, #84] @ (800deec ) 800de98: 6013 str r3, [r2, #0] 800de9a: 68bb ldr r3, [r7, #8] 800de9c: 6ada ldr r2, [r3, #44] @ 0x2c 800de9e: 4613 mov r3, r2 800dea0: 009b lsls r3, r3, #2 800dea2: 4413 add r3, r2 800dea4: 009b lsls r3, r3, #2 800dea6: 4a10 ldr r2, [pc, #64] @ (800dee8 ) 800dea8: 441a add r2, r3 800deaa: 68bb ldr r3, [r7, #8] 800deac: 3304 adds r3, #4 800deae: 4619 mov r1, r3 800deb0: 4610 mov r0, r2 800deb2: f7fe fa2e bl 800c312 800deb6: e004 b.n 800dec2 } else { /* Just inherit the priority. */ pxMutexHolderTCB->uxPriority = pxCurrentTCB->uxPriority; 800deb8: 4b0a ldr r3, [pc, #40] @ (800dee4 ) 800deba: 681b ldr r3, [r3, #0] 800debc: 6ada ldr r2, [r3, #44] @ 0x2c 800debe: 68bb ldr r3, [r7, #8] 800dec0: 62da str r2, [r3, #44] @ 0x2c } traceTASK_PRIORITY_INHERIT( pxMutexHolderTCB, pxCurrentTCB->uxPriority ); /* Inheritance occurred. */ xReturn = pdTRUE; 800dec2: 2301 movs r3, #1 800dec4: 60fb str r3, [r7, #12] 800dec6: e008 b.n 800deda } else { if( pxMutexHolderTCB->uxBasePriority < pxCurrentTCB->uxPriority ) 800dec8: 68bb ldr r3, [r7, #8] 800deca: 6cda ldr r2, [r3, #76] @ 0x4c 800decc: 4b05 ldr r3, [pc, #20] @ (800dee4 ) 800dece: 681b ldr r3, [r3, #0] 800ded0: 6adb ldr r3, [r3, #44] @ 0x2c 800ded2: 429a cmp r2, r3 800ded4: d201 bcs.n 800deda current priority of the mutex holder is not lower than the priority of the task attempting to take the mutex. Therefore the mutex holder must have already inherited a priority, but inheritance would have occurred if that had not been the case. */ xReturn = pdTRUE; 800ded6: 2301 movs r3, #1 800ded8: 60fb str r3, [r7, #12] else { mtCOVERAGE_TEST_MARKER(); } return xReturn; 800deda: 68fb ldr r3, [r7, #12] } 800dedc: 4618 mov r0, r3 800dede: 3710 adds r7, #16 800dee0: 46bd mov sp, r7 800dee2: bd80 pop {r7, pc} 800dee4: 20002358 .word 0x20002358 800dee8: 2000235c .word 0x2000235c 800deec: 20002834 .word 0x20002834 0800def0 : /*-----------------------------------------------------------*/ #if ( configUSE_MUTEXES == 1 ) BaseType_t xTaskPriorityDisinherit( TaskHandle_t const pxMutexHolder ) { 800def0: b580 push {r7, lr} 800def2: b086 sub sp, #24 800def4: af00 add r7, sp, #0 800def6: 6078 str r0, [r7, #4] TCB_t * const pxTCB = pxMutexHolder; 800def8: 687b ldr r3, [r7, #4] 800defa: 613b str r3, [r7, #16] BaseType_t xReturn = pdFALSE; 800defc: 2300 movs r3, #0 800defe: 617b str r3, [r7, #20] if( pxMutexHolder != NULL ) 800df00: 687b ldr r3, [r7, #4] 800df02: 2b00 cmp r3, #0 800df04: d058 beq.n 800dfb8 { /* A task can only have an inherited priority if it holds the mutex. If the mutex is held by a task then it cannot be given from an interrupt, and if a mutex is given by the holding task then it must be the running state task. */ configASSERT( pxTCB == pxCurrentTCB ); 800df06: 4b2f ldr r3, [pc, #188] @ (800dfc4 ) 800df08: 681b ldr r3, [r3, #0] 800df0a: 693a ldr r2, [r7, #16] 800df0c: 429a cmp r2, r3 800df0e: d00b beq.n 800df28 __asm volatile 800df10: f04f 0350 mov.w r3, #80 @ 0x50 800df14: f383 8811 msr BASEPRI, r3 800df18: f3bf 8f6f isb sy 800df1c: f3bf 8f4f dsb sy 800df20: 60fb str r3, [r7, #12] } 800df22: bf00 nop 800df24: bf00 nop 800df26: e7fd b.n 800df24 configASSERT( pxTCB->uxMutexesHeld ); 800df28: 693b ldr r3, [r7, #16] 800df2a: 6d1b ldr r3, [r3, #80] @ 0x50 800df2c: 2b00 cmp r3, #0 800df2e: d10b bne.n 800df48 __asm volatile 800df30: f04f 0350 mov.w r3, #80 @ 0x50 800df34: f383 8811 msr BASEPRI, r3 800df38: f3bf 8f6f isb sy 800df3c: f3bf 8f4f dsb sy 800df40: 60bb str r3, [r7, #8] } 800df42: bf00 nop 800df44: bf00 nop 800df46: e7fd b.n 800df44 ( pxTCB->uxMutexesHeld )--; 800df48: 693b ldr r3, [r7, #16] 800df4a: 6d1b ldr r3, [r3, #80] @ 0x50 800df4c: 1e5a subs r2, r3, #1 800df4e: 693b ldr r3, [r7, #16] 800df50: 651a str r2, [r3, #80] @ 0x50 /* Has the holder of the mutex inherited the priority of another task? */ if( pxTCB->uxPriority != pxTCB->uxBasePriority ) 800df52: 693b ldr r3, [r7, #16] 800df54: 6ada ldr r2, [r3, #44] @ 0x2c 800df56: 693b ldr r3, [r7, #16] 800df58: 6cdb ldr r3, [r3, #76] @ 0x4c 800df5a: 429a cmp r2, r3 800df5c: d02c beq.n 800dfb8 { /* Only disinherit if no other mutexes are held. */ if( pxTCB->uxMutexesHeld == ( UBaseType_t ) 0 ) 800df5e: 693b ldr r3, [r7, #16] 800df60: 6d1b ldr r3, [r3, #80] @ 0x50 800df62: 2b00 cmp r3, #0 800df64: d128 bne.n 800dfb8 /* A task can only have an inherited priority if it holds the mutex. If the mutex is held by a task then it cannot be given from an interrupt, and if a mutex is given by the holding task then it must be the running state task. Remove the holding task from the ready/delayed list. */ if( uxListRemove( &( pxTCB->xStateListItem ) ) == ( UBaseType_t ) 0 ) 800df66: 693b ldr r3, [r7, #16] 800df68: 3304 adds r3, #4 800df6a: 4618 mov r0, r3 800df6c: f7fe fa2e bl 800c3cc } /* Disinherit the priority before adding the task into the new ready list. */ traceTASK_PRIORITY_DISINHERIT( pxTCB, pxTCB->uxBasePriority ); pxTCB->uxPriority = pxTCB->uxBasePriority; 800df70: 693b ldr r3, [r7, #16] 800df72: 6cda ldr r2, [r3, #76] @ 0x4c 800df74: 693b ldr r3, [r7, #16] 800df76: 62da str r2, [r3, #44] @ 0x2c /* Reset the event list item value. It cannot be in use for any other purpose if this task is running, and it must be running to give back the mutex. */ listSET_LIST_ITEM_VALUE( &( pxTCB->xEventListItem ), ( TickType_t ) configMAX_PRIORITIES - ( TickType_t ) pxTCB->uxPriority ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */ 800df78: 693b ldr r3, [r7, #16] 800df7a: 6adb ldr r3, [r3, #44] @ 0x2c 800df7c: f1c3 0238 rsb r2, r3, #56 @ 0x38 800df80: 693b ldr r3, [r7, #16] 800df82: 619a str r2, [r3, #24] prvAddTaskToReadyList( pxTCB ); 800df84: 693b ldr r3, [r7, #16] 800df86: 6ada ldr r2, [r3, #44] @ 0x2c 800df88: 4b0f ldr r3, [pc, #60] @ (800dfc8 ) 800df8a: 681b ldr r3, [r3, #0] 800df8c: 429a cmp r2, r3 800df8e: d903 bls.n 800df98 800df90: 693b ldr r3, [r7, #16] 800df92: 6adb ldr r3, [r3, #44] @ 0x2c 800df94: 4a0c ldr r2, [pc, #48] @ (800dfc8 ) 800df96: 6013 str r3, [r2, #0] 800df98: 693b ldr r3, [r7, #16] 800df9a: 6ada ldr r2, [r3, #44] @ 0x2c 800df9c: 4613 mov r3, r2 800df9e: 009b lsls r3, r3, #2 800dfa0: 4413 add r3, r2 800dfa2: 009b lsls r3, r3, #2 800dfa4: 4a09 ldr r2, [pc, #36] @ (800dfcc ) 800dfa6: 441a add r2, r3 800dfa8: 693b ldr r3, [r7, #16] 800dfaa: 3304 adds r3, #4 800dfac: 4619 mov r1, r3 800dfae: 4610 mov r0, r2 800dfb0: f7fe f9af bl 800c312 in an order different to that in which they were taken. If a context switch did not occur when the first mutex was returned, even if a task was waiting on it, then a context switch should occur when the last mutex is returned whether a task is waiting on it or not. */ xReturn = pdTRUE; 800dfb4: 2301 movs r3, #1 800dfb6: 617b str r3, [r7, #20] else { mtCOVERAGE_TEST_MARKER(); } return xReturn; 800dfb8: 697b ldr r3, [r7, #20] } 800dfba: 4618 mov r0, r3 800dfbc: 3718 adds r7, #24 800dfbe: 46bd mov sp, r7 800dfc0: bd80 pop {r7, pc} 800dfc2: bf00 nop 800dfc4: 20002358 .word 0x20002358 800dfc8: 20002834 .word 0x20002834 800dfcc: 2000235c .word 0x2000235c 0800dfd0 : /*-----------------------------------------------------------*/ #if ( configUSE_MUTEXES == 1 ) void vTaskPriorityDisinheritAfterTimeout( TaskHandle_t const pxMutexHolder, UBaseType_t uxHighestPriorityWaitingTask ) { 800dfd0: b580 push {r7, lr} 800dfd2: b088 sub sp, #32 800dfd4: af00 add r7, sp, #0 800dfd6: 6078 str r0, [r7, #4] 800dfd8: 6039 str r1, [r7, #0] TCB_t * const pxTCB = pxMutexHolder; 800dfda: 687b ldr r3, [r7, #4] 800dfdc: 61bb str r3, [r7, #24] UBaseType_t uxPriorityUsedOnEntry, uxPriorityToUse; const UBaseType_t uxOnlyOneMutexHeld = ( UBaseType_t ) 1; 800dfde: 2301 movs r3, #1 800dfe0: 617b str r3, [r7, #20] if( pxMutexHolder != NULL ) 800dfe2: 687b ldr r3, [r7, #4] 800dfe4: 2b00 cmp r3, #0 800dfe6: d06c beq.n 800e0c2 { /* If pxMutexHolder is not NULL then the holder must hold at least one mutex. */ configASSERT( pxTCB->uxMutexesHeld ); 800dfe8: 69bb ldr r3, [r7, #24] 800dfea: 6d1b ldr r3, [r3, #80] @ 0x50 800dfec: 2b00 cmp r3, #0 800dfee: d10b bne.n 800e008 __asm volatile 800dff0: f04f 0350 mov.w r3, #80 @ 0x50 800dff4: f383 8811 msr BASEPRI, r3 800dff8: f3bf 8f6f isb sy 800dffc: f3bf 8f4f dsb sy 800e000: 60fb str r3, [r7, #12] } 800e002: bf00 nop 800e004: bf00 nop 800e006: e7fd b.n 800e004 /* Determine the priority to which the priority of the task that holds the mutex should be set. This will be the greater of the holding task's base priority and the priority of the highest priority task that is waiting to obtain the mutex. */ if( pxTCB->uxBasePriority < uxHighestPriorityWaitingTask ) 800e008: 69bb ldr r3, [r7, #24] 800e00a: 6cdb ldr r3, [r3, #76] @ 0x4c 800e00c: 683a ldr r2, [r7, #0] 800e00e: 429a cmp r2, r3 800e010: d902 bls.n 800e018 { uxPriorityToUse = uxHighestPriorityWaitingTask; 800e012: 683b ldr r3, [r7, #0] 800e014: 61fb str r3, [r7, #28] 800e016: e002 b.n 800e01e } else { uxPriorityToUse = pxTCB->uxBasePriority; 800e018: 69bb ldr r3, [r7, #24] 800e01a: 6cdb ldr r3, [r3, #76] @ 0x4c 800e01c: 61fb str r3, [r7, #28] } /* Does the priority need to change? */ if( pxTCB->uxPriority != uxPriorityToUse ) 800e01e: 69bb ldr r3, [r7, #24] 800e020: 6adb ldr r3, [r3, #44] @ 0x2c 800e022: 69fa ldr r2, [r7, #28] 800e024: 429a cmp r2, r3 800e026: d04c beq.n 800e0c2 { /* Only disinherit if no other mutexes are held. This is a simplification in the priority inheritance implementation. If the task that holds the mutex is also holding other mutexes then the other mutexes may have caused the priority inheritance. */ if( pxTCB->uxMutexesHeld == uxOnlyOneMutexHeld ) 800e028: 69bb ldr r3, [r7, #24] 800e02a: 6d1b ldr r3, [r3, #80] @ 0x50 800e02c: 697a ldr r2, [r7, #20] 800e02e: 429a cmp r2, r3 800e030: d147 bne.n 800e0c2 { /* If a task has timed out because it already holds the mutex it was trying to obtain then it cannot of inherited its own priority. */ configASSERT( pxTCB != pxCurrentTCB ); 800e032: 4b26 ldr r3, [pc, #152] @ (800e0cc ) 800e034: 681b ldr r3, [r3, #0] 800e036: 69ba ldr r2, [r7, #24] 800e038: 429a cmp r2, r3 800e03a: d10b bne.n 800e054 __asm volatile 800e03c: f04f 0350 mov.w r3, #80 @ 0x50 800e040: f383 8811 msr BASEPRI, r3 800e044: f3bf 8f6f isb sy 800e048: f3bf 8f4f dsb sy 800e04c: 60bb str r3, [r7, #8] } 800e04e: bf00 nop 800e050: bf00 nop 800e052: e7fd b.n 800e050 /* Disinherit the priority, remembering the previous priority to facilitate determining the subject task's state. */ traceTASK_PRIORITY_DISINHERIT( pxTCB, pxTCB->uxBasePriority ); uxPriorityUsedOnEntry = pxTCB->uxPriority; 800e054: 69bb ldr r3, [r7, #24] 800e056: 6adb ldr r3, [r3, #44] @ 0x2c 800e058: 613b str r3, [r7, #16] pxTCB->uxPriority = uxPriorityToUse; 800e05a: 69bb ldr r3, [r7, #24] 800e05c: 69fa ldr r2, [r7, #28] 800e05e: 62da str r2, [r3, #44] @ 0x2c /* Only reset the event list item value if the value is not being used for anything else. */ if( ( listGET_LIST_ITEM_VALUE( &( pxTCB->xEventListItem ) ) & taskEVENT_LIST_ITEM_VALUE_IN_USE ) == 0UL ) 800e060: 69bb ldr r3, [r7, #24] 800e062: 699b ldr r3, [r3, #24] 800e064: 2b00 cmp r3, #0 800e066: db04 blt.n 800e072 { listSET_LIST_ITEM_VALUE( &( pxTCB->xEventListItem ), ( TickType_t ) configMAX_PRIORITIES - ( TickType_t ) uxPriorityToUse ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */ 800e068: 69fb ldr r3, [r7, #28] 800e06a: f1c3 0238 rsb r2, r3, #56 @ 0x38 800e06e: 69bb ldr r3, [r7, #24] 800e070: 619a str r2, [r3, #24] then the task that holds the mutex could be in either the Ready, Blocked or Suspended states. Only remove the task from its current state list if it is in the Ready state as the task's priority is going to change and there is one Ready list per priority. */ if( listIS_CONTAINED_WITHIN( &( pxReadyTasksLists[ uxPriorityUsedOnEntry ] ), &( pxTCB->xStateListItem ) ) != pdFALSE ) 800e072: 69bb ldr r3, [r7, #24] 800e074: 6959 ldr r1, [r3, #20] 800e076: 693a ldr r2, [r7, #16] 800e078: 4613 mov r3, r2 800e07a: 009b lsls r3, r3, #2 800e07c: 4413 add r3, r2 800e07e: 009b lsls r3, r3, #2 800e080: 4a13 ldr r2, [pc, #76] @ (800e0d0 ) 800e082: 4413 add r3, r2 800e084: 4299 cmp r1, r3 800e086: d11c bne.n 800e0c2 { if( uxListRemove( &( pxTCB->xStateListItem ) ) == ( UBaseType_t ) 0 ) 800e088: 69bb ldr r3, [r7, #24] 800e08a: 3304 adds r3, #4 800e08c: 4618 mov r0, r3 800e08e: f7fe f99d bl 800c3cc else { mtCOVERAGE_TEST_MARKER(); } prvAddTaskToReadyList( pxTCB ); 800e092: 69bb ldr r3, [r7, #24] 800e094: 6ada ldr r2, [r3, #44] @ 0x2c 800e096: 4b0f ldr r3, [pc, #60] @ (800e0d4 ) 800e098: 681b ldr r3, [r3, #0] 800e09a: 429a cmp r2, r3 800e09c: d903 bls.n 800e0a6 800e09e: 69bb ldr r3, [r7, #24] 800e0a0: 6adb ldr r3, [r3, #44] @ 0x2c 800e0a2: 4a0c ldr r2, [pc, #48] @ (800e0d4 ) 800e0a4: 6013 str r3, [r2, #0] 800e0a6: 69bb ldr r3, [r7, #24] 800e0a8: 6ada ldr r2, [r3, #44] @ 0x2c 800e0aa: 4613 mov r3, r2 800e0ac: 009b lsls r3, r3, #2 800e0ae: 4413 add r3, r2 800e0b0: 009b lsls r3, r3, #2 800e0b2: 4a07 ldr r2, [pc, #28] @ (800e0d0 ) 800e0b4: 441a add r2, r3 800e0b6: 69bb ldr r3, [r7, #24] 800e0b8: 3304 adds r3, #4 800e0ba: 4619 mov r1, r3 800e0bc: 4610 mov r0, r2 800e0be: f7fe f928 bl 800c312 } else { mtCOVERAGE_TEST_MARKER(); } } 800e0c2: bf00 nop 800e0c4: 3720 adds r7, #32 800e0c6: 46bd mov sp, r7 800e0c8: bd80 pop {r7, pc} 800e0ca: bf00 nop 800e0cc: 20002358 .word 0x20002358 800e0d0: 2000235c .word 0x2000235c 800e0d4: 20002834 .word 0x20002834 0800e0d8 : /*-----------------------------------------------------------*/ #if ( configUSE_MUTEXES == 1 ) TaskHandle_t pvTaskIncrementMutexHeldCount( void ) { 800e0d8: b480 push {r7} 800e0da: af00 add r7, sp, #0 /* If xSemaphoreCreateMutex() is called before any tasks have been created then pxCurrentTCB will be NULL. */ if( pxCurrentTCB != NULL ) 800e0dc: 4b07 ldr r3, [pc, #28] @ (800e0fc ) 800e0de: 681b ldr r3, [r3, #0] 800e0e0: 2b00 cmp r3, #0 800e0e2: d004 beq.n 800e0ee { ( pxCurrentTCB->uxMutexesHeld )++; 800e0e4: 4b05 ldr r3, [pc, #20] @ (800e0fc ) 800e0e6: 681b ldr r3, [r3, #0] 800e0e8: 6d1a ldr r2, [r3, #80] @ 0x50 800e0ea: 3201 adds r2, #1 800e0ec: 651a str r2, [r3, #80] @ 0x50 } return pxCurrentTCB; 800e0ee: 4b03 ldr r3, [pc, #12] @ (800e0fc ) 800e0f0: 681b ldr r3, [r3, #0] } 800e0f2: 4618 mov r0, r3 800e0f4: 46bd mov sp, r7 800e0f6: f85d 7b04 ldr.w r7, [sp], #4 800e0fa: 4770 bx lr 800e0fc: 20002358 .word 0x20002358 0800e100 : /*-----------------------------------------------------------*/ #if( configUSE_TASK_NOTIFICATIONS == 1 ) uint32_t ulTaskNotifyTake( BaseType_t xClearCountOnExit, TickType_t xTicksToWait ) { 800e100: b580 push {r7, lr} 800e102: b084 sub sp, #16 800e104: af00 add r7, sp, #0 800e106: 6078 str r0, [r7, #4] 800e108: 6039 str r1, [r7, #0] uint32_t ulReturn; taskENTER_CRITICAL(); 800e10a: f000 fddd bl 800ecc8 { /* Only block if the notification count is not already non-zero. */ if( pxCurrentTCB->ulNotifiedValue == 0UL ) 800e10e: 4b1e ldr r3, [pc, #120] @ (800e188 ) 800e110: 681b ldr r3, [r3, #0] 800e112: 6d5b ldr r3, [r3, #84] @ 0x54 800e114: 2b00 cmp r3, #0 800e116: d113 bne.n 800e140 { /* Mark this task as waiting for a notification. */ pxCurrentTCB->ucNotifyState = taskWAITING_NOTIFICATION; 800e118: 4b1b ldr r3, [pc, #108] @ (800e188 ) 800e11a: 681b ldr r3, [r3, #0] 800e11c: 2201 movs r2, #1 800e11e: f883 2058 strb.w r2, [r3, #88] @ 0x58 if( xTicksToWait > ( TickType_t ) 0 ) 800e122: 683b ldr r3, [r7, #0] 800e124: 2b00 cmp r3, #0 800e126: d00b beq.n 800e140 { prvAddCurrentTaskToDelayedList( xTicksToWait, pdTRUE ); 800e128: 2101 movs r1, #1 800e12a: 6838 ldr r0, [r7, #0] 800e12c: f000 f8ea bl 800e304 /* All ports are written to allow a yield in a critical section (some will yield immediately, others wait until the critical section exits) - but it is not something that application code should ever do. */ portYIELD_WITHIN_API(); 800e130: 4b16 ldr r3, [pc, #88] @ (800e18c ) 800e132: f04f 5280 mov.w r2, #268435456 @ 0x10000000 800e136: 601a str r2, [r3, #0] 800e138: f3bf 8f4f dsb sy 800e13c: f3bf 8f6f isb sy else { mtCOVERAGE_TEST_MARKER(); } } taskEXIT_CRITICAL(); 800e140: f000 fdf4 bl 800ed2c taskENTER_CRITICAL(); 800e144: f000 fdc0 bl 800ecc8 { traceTASK_NOTIFY_TAKE(); ulReturn = pxCurrentTCB->ulNotifiedValue; 800e148: 4b0f ldr r3, [pc, #60] @ (800e188 ) 800e14a: 681b ldr r3, [r3, #0] 800e14c: 6d5b ldr r3, [r3, #84] @ 0x54 800e14e: 60fb str r3, [r7, #12] if( ulReturn != 0UL ) 800e150: 68fb ldr r3, [r7, #12] 800e152: 2b00 cmp r3, #0 800e154: d00c beq.n 800e170 { if( xClearCountOnExit != pdFALSE ) 800e156: 687b ldr r3, [r7, #4] 800e158: 2b00 cmp r3, #0 800e15a: d004 beq.n 800e166 { pxCurrentTCB->ulNotifiedValue = 0UL; 800e15c: 4b0a ldr r3, [pc, #40] @ (800e188 ) 800e15e: 681b ldr r3, [r3, #0] 800e160: 2200 movs r2, #0 800e162: 655a str r2, [r3, #84] @ 0x54 800e164: e004 b.n 800e170 } else { pxCurrentTCB->ulNotifiedValue = ulReturn - ( uint32_t ) 1; 800e166: 4b08 ldr r3, [pc, #32] @ (800e188 ) 800e168: 681b ldr r3, [r3, #0] 800e16a: 68fa ldr r2, [r7, #12] 800e16c: 3a01 subs r2, #1 800e16e: 655a str r2, [r3, #84] @ 0x54 else { mtCOVERAGE_TEST_MARKER(); } pxCurrentTCB->ucNotifyState = taskNOT_WAITING_NOTIFICATION; 800e170: 4b05 ldr r3, [pc, #20] @ (800e188 ) 800e172: 681b ldr r3, [r3, #0] 800e174: 2200 movs r2, #0 800e176: f883 2058 strb.w r2, [r3, #88] @ 0x58 } taskEXIT_CRITICAL(); 800e17a: f000 fdd7 bl 800ed2c return ulReturn; 800e17e: 68fb ldr r3, [r7, #12] } 800e180: 4618 mov r0, r3 800e182: 3710 adds r7, #16 800e184: 46bd mov sp, r7 800e186: bd80 pop {r7, pc} 800e188: 20002358 .word 0x20002358 800e18c: e000ed04 .word 0xe000ed04 0800e190 : /*-----------------------------------------------------------*/ #if( configUSE_TASK_NOTIFICATIONS == 1 ) BaseType_t xTaskGenericNotify( TaskHandle_t xTaskToNotify, uint32_t ulValue, eNotifyAction eAction, uint32_t *pulPreviousNotificationValue ) { 800e190: b580 push {r7, lr} 800e192: b08a sub sp, #40 @ 0x28 800e194: af00 add r7, sp, #0 800e196: 60f8 str r0, [r7, #12] 800e198: 60b9 str r1, [r7, #8] 800e19a: 603b str r3, [r7, #0] 800e19c: 4613 mov r3, r2 800e19e: 71fb strb r3, [r7, #7] TCB_t * pxTCB; BaseType_t xReturn = pdPASS; 800e1a0: 2301 movs r3, #1 800e1a2: 627b str r3, [r7, #36] @ 0x24 uint8_t ucOriginalNotifyState; configASSERT( xTaskToNotify ); 800e1a4: 68fb ldr r3, [r7, #12] 800e1a6: 2b00 cmp r3, #0 800e1a8: d10b bne.n 800e1c2 __asm volatile 800e1aa: f04f 0350 mov.w r3, #80 @ 0x50 800e1ae: f383 8811 msr BASEPRI, r3 800e1b2: f3bf 8f6f isb sy 800e1b6: f3bf 8f4f dsb sy 800e1ba: 61bb str r3, [r7, #24] } 800e1bc: bf00 nop 800e1be: bf00 nop 800e1c0: e7fd b.n 800e1be pxTCB = xTaskToNotify; 800e1c2: 68fb ldr r3, [r7, #12] 800e1c4: 623b str r3, [r7, #32] taskENTER_CRITICAL(); 800e1c6: f000 fd7f bl 800ecc8 { if( pulPreviousNotificationValue != NULL ) 800e1ca: 683b ldr r3, [r7, #0] 800e1cc: 2b00 cmp r3, #0 800e1ce: d003 beq.n 800e1d8 { *pulPreviousNotificationValue = pxTCB->ulNotifiedValue; 800e1d0: 6a3b ldr r3, [r7, #32] 800e1d2: 6d5a ldr r2, [r3, #84] @ 0x54 800e1d4: 683b ldr r3, [r7, #0] 800e1d6: 601a str r2, [r3, #0] } ucOriginalNotifyState = pxTCB->ucNotifyState; 800e1d8: 6a3b ldr r3, [r7, #32] 800e1da: f893 3058 ldrb.w r3, [r3, #88] @ 0x58 800e1de: 77fb strb r3, [r7, #31] pxTCB->ucNotifyState = taskNOTIFICATION_RECEIVED; 800e1e0: 6a3b ldr r3, [r7, #32] 800e1e2: 2202 movs r2, #2 800e1e4: f883 2058 strb.w r2, [r3, #88] @ 0x58 switch( eAction ) 800e1e8: 79fb ldrb r3, [r7, #7] 800e1ea: 2b04 cmp r3, #4 800e1ec: d827 bhi.n 800e23e 800e1ee: a201 add r2, pc, #4 @ (adr r2, 800e1f4 ) 800e1f0: f852 f023 ldr.w pc, [r2, r3, lsl #2] 800e1f4: 0800e261 .word 0x0800e261 800e1f8: 0800e209 .word 0x0800e209 800e1fc: 0800e217 .word 0x0800e217 800e200: 0800e223 .word 0x0800e223 800e204: 0800e22b .word 0x0800e22b { case eSetBits : pxTCB->ulNotifiedValue |= ulValue; 800e208: 6a3b ldr r3, [r7, #32] 800e20a: 6d5a ldr r2, [r3, #84] @ 0x54 800e20c: 68bb ldr r3, [r7, #8] 800e20e: 431a orrs r2, r3 800e210: 6a3b ldr r3, [r7, #32] 800e212: 655a str r2, [r3, #84] @ 0x54 break; 800e214: e027 b.n 800e266 case eIncrement : ( pxTCB->ulNotifiedValue )++; 800e216: 6a3b ldr r3, [r7, #32] 800e218: 6d5b ldr r3, [r3, #84] @ 0x54 800e21a: 1c5a adds r2, r3, #1 800e21c: 6a3b ldr r3, [r7, #32] 800e21e: 655a str r2, [r3, #84] @ 0x54 break; 800e220: e021 b.n 800e266 case eSetValueWithOverwrite : pxTCB->ulNotifiedValue = ulValue; 800e222: 6a3b ldr r3, [r7, #32] 800e224: 68ba ldr r2, [r7, #8] 800e226: 655a str r2, [r3, #84] @ 0x54 break; 800e228: e01d b.n 800e266 case eSetValueWithoutOverwrite : if( ucOriginalNotifyState != taskNOTIFICATION_RECEIVED ) 800e22a: 7ffb ldrb r3, [r7, #31] 800e22c: 2b02 cmp r3, #2 800e22e: d003 beq.n 800e238 { pxTCB->ulNotifiedValue = ulValue; 800e230: 6a3b ldr r3, [r7, #32] 800e232: 68ba ldr r2, [r7, #8] 800e234: 655a str r2, [r3, #84] @ 0x54 else { /* The value could not be written to the task. */ xReturn = pdFAIL; } break; 800e236: e016 b.n 800e266 xReturn = pdFAIL; 800e238: 2300 movs r3, #0 800e23a: 627b str r3, [r7, #36] @ 0x24 break; 800e23c: e013 b.n 800e266 default: /* Should not get here if all enums are handled. Artificially force an assert by testing a value the compiler can't assume is const. */ configASSERT( pxTCB->ulNotifiedValue == ~0UL ); 800e23e: 6a3b ldr r3, [r7, #32] 800e240: 6d5b ldr r3, [r3, #84] @ 0x54 800e242: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff 800e246: d00d beq.n 800e264 __asm volatile 800e248: f04f 0350 mov.w r3, #80 @ 0x50 800e24c: f383 8811 msr BASEPRI, r3 800e250: f3bf 8f6f isb sy 800e254: f3bf 8f4f dsb sy 800e258: 617b str r3, [r7, #20] } 800e25a: bf00 nop 800e25c: bf00 nop 800e25e: e7fd b.n 800e25c break; 800e260: bf00 nop 800e262: e000 b.n 800e266 break; 800e264: bf00 nop traceTASK_NOTIFY(); /* If the task is in the blocked state specifically to wait for a notification then unblock it now. */ if( ucOriginalNotifyState == taskWAITING_NOTIFICATION ) 800e266: 7ffb ldrb r3, [r7, #31] 800e268: 2b01 cmp r3, #1 800e26a: d13b bne.n 800e2e4 { ( void ) uxListRemove( &( pxTCB->xStateListItem ) ); 800e26c: 6a3b ldr r3, [r7, #32] 800e26e: 3304 adds r3, #4 800e270: 4618 mov r0, r3 800e272: f7fe f8ab bl 800c3cc prvAddTaskToReadyList( pxTCB ); 800e276: 6a3b ldr r3, [r7, #32] 800e278: 6ada ldr r2, [r3, #44] @ 0x2c 800e27a: 4b1e ldr r3, [pc, #120] @ (800e2f4 ) 800e27c: 681b ldr r3, [r3, #0] 800e27e: 429a cmp r2, r3 800e280: d903 bls.n 800e28a 800e282: 6a3b ldr r3, [r7, #32] 800e284: 6adb ldr r3, [r3, #44] @ 0x2c 800e286: 4a1b ldr r2, [pc, #108] @ (800e2f4 ) 800e288: 6013 str r3, [r2, #0] 800e28a: 6a3b ldr r3, [r7, #32] 800e28c: 6ada ldr r2, [r3, #44] @ 0x2c 800e28e: 4613 mov r3, r2 800e290: 009b lsls r3, r3, #2 800e292: 4413 add r3, r2 800e294: 009b lsls r3, r3, #2 800e296: 4a18 ldr r2, [pc, #96] @ (800e2f8 ) 800e298: 441a add r2, r3 800e29a: 6a3b ldr r3, [r7, #32] 800e29c: 3304 adds r3, #4 800e29e: 4619 mov r1, r3 800e2a0: 4610 mov r0, r2 800e2a2: f7fe f836 bl 800c312 /* The task should not have been on an event list. */ configASSERT( listLIST_ITEM_CONTAINER( &( pxTCB->xEventListItem ) ) == NULL ); 800e2a6: 6a3b ldr r3, [r7, #32] 800e2a8: 6a9b ldr r3, [r3, #40] @ 0x28 800e2aa: 2b00 cmp r3, #0 800e2ac: d00b beq.n 800e2c6 __asm volatile 800e2ae: f04f 0350 mov.w r3, #80 @ 0x50 800e2b2: f383 8811 msr BASEPRI, r3 800e2b6: f3bf 8f6f isb sy 800e2ba: f3bf 8f4f dsb sy 800e2be: 613b str r3, [r7, #16] } 800e2c0: bf00 nop 800e2c2: bf00 nop 800e2c4: e7fd b.n 800e2c2 earliest possible time. */ prvResetNextTaskUnblockTime(); } #endif if( pxTCB->uxPriority > pxCurrentTCB->uxPriority ) 800e2c6: 6a3b ldr r3, [r7, #32] 800e2c8: 6ada ldr r2, [r3, #44] @ 0x2c 800e2ca: 4b0c ldr r3, [pc, #48] @ (800e2fc ) 800e2cc: 681b ldr r3, [r3, #0] 800e2ce: 6adb ldr r3, [r3, #44] @ 0x2c 800e2d0: 429a cmp r2, r3 800e2d2: d907 bls.n 800e2e4 { /* The notified task has a priority above the currently executing task so a yield is required. */ taskYIELD_IF_USING_PREEMPTION(); 800e2d4: 4b0a ldr r3, [pc, #40] @ (800e300 ) 800e2d6: f04f 5280 mov.w r2, #268435456 @ 0x10000000 800e2da: 601a str r2, [r3, #0] 800e2dc: f3bf 8f4f dsb sy 800e2e0: f3bf 8f6f isb sy else { mtCOVERAGE_TEST_MARKER(); } } taskEXIT_CRITICAL(); 800e2e4: f000 fd22 bl 800ed2c return xReturn; 800e2e8: 6a7b ldr r3, [r7, #36] @ 0x24 } 800e2ea: 4618 mov r0, r3 800e2ec: 3728 adds r7, #40 @ 0x28 800e2ee: 46bd mov sp, r7 800e2f0: bd80 pop {r7, pc} 800e2f2: bf00 nop 800e2f4: 20002834 .word 0x20002834 800e2f8: 2000235c .word 0x2000235c 800e2fc: 20002358 .word 0x20002358 800e300: e000ed04 .word 0xe000ed04 0800e304 : #endif /*-----------------------------------------------------------*/ static void prvAddCurrentTaskToDelayedList( TickType_t xTicksToWait, const BaseType_t xCanBlockIndefinitely ) { 800e304: b580 push {r7, lr} 800e306: b084 sub sp, #16 800e308: af00 add r7, sp, #0 800e30a: 6078 str r0, [r7, #4] 800e30c: 6039 str r1, [r7, #0] TickType_t xTimeToWake; const TickType_t xConstTickCount = xTickCount; 800e30e: 4b21 ldr r3, [pc, #132] @ (800e394 ) 800e310: 681b ldr r3, [r3, #0] 800e312: 60fb str r3, [r7, #12] } #endif /* Remove the task from the ready list before adding it to the blocked list as the same list item is used for both lists. */ if( uxListRemove( &( pxCurrentTCB->xStateListItem ) ) == ( UBaseType_t ) 0 ) 800e314: 4b20 ldr r3, [pc, #128] @ (800e398 ) 800e316: 681b ldr r3, [r3, #0] 800e318: 3304 adds r3, #4 800e31a: 4618 mov r0, r3 800e31c: f7fe f856 bl 800c3cc mtCOVERAGE_TEST_MARKER(); } #if ( INCLUDE_vTaskSuspend == 1 ) { if( ( xTicksToWait == portMAX_DELAY ) && ( xCanBlockIndefinitely != pdFALSE ) ) 800e320: 687b ldr r3, [r7, #4] 800e322: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff 800e326: d10a bne.n 800e33e 800e328: 683b ldr r3, [r7, #0] 800e32a: 2b00 cmp r3, #0 800e32c: d007 beq.n 800e33e { /* Add the task to the suspended task list instead of a delayed task list to ensure it is not woken by a timing event. It will block indefinitely. */ vListInsertEnd( &xSuspendedTaskList, &( pxCurrentTCB->xStateListItem ) ); 800e32e: 4b1a ldr r3, [pc, #104] @ (800e398 ) 800e330: 681b ldr r3, [r3, #0] 800e332: 3304 adds r3, #4 800e334: 4619 mov r1, r3 800e336: 4819 ldr r0, [pc, #100] @ (800e39c ) 800e338: f7fd ffeb bl 800c312 /* Avoid compiler warning when INCLUDE_vTaskSuspend is not 1. */ ( void ) xCanBlockIndefinitely; } #endif /* INCLUDE_vTaskSuspend */ } 800e33c: e026 b.n 800e38c xTimeToWake = xConstTickCount + xTicksToWait; 800e33e: 68fa ldr r2, [r7, #12] 800e340: 687b ldr r3, [r7, #4] 800e342: 4413 add r3, r2 800e344: 60bb str r3, [r7, #8] listSET_LIST_ITEM_VALUE( &( pxCurrentTCB->xStateListItem ), xTimeToWake ); 800e346: 4b14 ldr r3, [pc, #80] @ (800e398 ) 800e348: 681b ldr r3, [r3, #0] 800e34a: 68ba ldr r2, [r7, #8] 800e34c: 605a str r2, [r3, #4] if( xTimeToWake < xConstTickCount ) 800e34e: 68ba ldr r2, [r7, #8] 800e350: 68fb ldr r3, [r7, #12] 800e352: 429a cmp r2, r3 800e354: d209 bcs.n 800e36a vListInsert( pxOverflowDelayedTaskList, &( pxCurrentTCB->xStateListItem ) ); 800e356: 4b12 ldr r3, [pc, #72] @ (800e3a0 ) 800e358: 681a ldr r2, [r3, #0] 800e35a: 4b0f ldr r3, [pc, #60] @ (800e398 ) 800e35c: 681b ldr r3, [r3, #0] 800e35e: 3304 adds r3, #4 800e360: 4619 mov r1, r3 800e362: 4610 mov r0, r2 800e364: f7fd fff9 bl 800c35a } 800e368: e010 b.n 800e38c vListInsert( pxDelayedTaskList, &( pxCurrentTCB->xStateListItem ) ); 800e36a: 4b0e ldr r3, [pc, #56] @ (800e3a4 ) 800e36c: 681a ldr r2, [r3, #0] 800e36e: 4b0a ldr r3, [pc, #40] @ (800e398 ) 800e370: 681b ldr r3, [r3, #0] 800e372: 3304 adds r3, #4 800e374: 4619 mov r1, r3 800e376: 4610 mov r0, r2 800e378: f7fd ffef bl 800c35a if( xTimeToWake < xNextTaskUnblockTime ) 800e37c: 4b0a ldr r3, [pc, #40] @ (800e3a8 ) 800e37e: 681b ldr r3, [r3, #0] 800e380: 68ba ldr r2, [r7, #8] 800e382: 429a cmp r2, r3 800e384: d202 bcs.n 800e38c xNextTaskUnblockTime = xTimeToWake; 800e386: 4a08 ldr r2, [pc, #32] @ (800e3a8 ) 800e388: 68bb ldr r3, [r7, #8] 800e38a: 6013 str r3, [r2, #0] } 800e38c: bf00 nop 800e38e: 3710 adds r7, #16 800e390: 46bd mov sp, r7 800e392: bd80 pop {r7, pc} 800e394: 20002830 .word 0x20002830 800e398: 20002358 .word 0x20002358 800e39c: 20002818 .word 0x20002818 800e3a0: 200027e8 .word 0x200027e8 800e3a4: 200027e4 .word 0x200027e4 800e3a8: 2000284c .word 0x2000284c 0800e3ac : TimerCallbackFunction_t pxCallbackFunction, Timer_t *pxNewTimer ) PRIVILEGED_FUNCTION; /*-----------------------------------------------------------*/ BaseType_t xTimerCreateTimerTask( void ) { 800e3ac: b580 push {r7, lr} 800e3ae: b08a sub sp, #40 @ 0x28 800e3b0: af04 add r7, sp, #16 BaseType_t xReturn = pdFAIL; 800e3b2: 2300 movs r3, #0 800e3b4: 617b str r3, [r7, #20] /* This function is called when the scheduler is started if configUSE_TIMERS is set to 1. Check that the infrastructure used by the timer service task has been created/initialised. If timers have already been created then the initialisation will already have been performed. */ prvCheckForValidListAndQueue(); 800e3b6: f000 fb13 bl 800e9e0 if( xTimerQueue != NULL ) 800e3ba: 4b1d ldr r3, [pc, #116] @ (800e430 ) 800e3bc: 681b ldr r3, [r3, #0] 800e3be: 2b00 cmp r3, #0 800e3c0: d021 beq.n 800e406 { #if( configSUPPORT_STATIC_ALLOCATION == 1 ) { StaticTask_t *pxTimerTaskTCBBuffer = NULL; 800e3c2: 2300 movs r3, #0 800e3c4: 60fb str r3, [r7, #12] StackType_t *pxTimerTaskStackBuffer = NULL; 800e3c6: 2300 movs r3, #0 800e3c8: 60bb str r3, [r7, #8] uint32_t ulTimerTaskStackSize; vApplicationGetTimerTaskMemory( &pxTimerTaskTCBBuffer, &pxTimerTaskStackBuffer, &ulTimerTaskStackSize ); 800e3ca: 1d3a adds r2, r7, #4 800e3cc: f107 0108 add.w r1, r7, #8 800e3d0: f107 030c add.w r3, r7, #12 800e3d4: 4618 mov r0, r3 800e3d6: f7fd ff55 bl 800c284 xTimerTaskHandle = xTaskCreateStatic( prvTimerTask, 800e3da: 6879 ldr r1, [r7, #4] 800e3dc: 68bb ldr r3, [r7, #8] 800e3de: 68fa ldr r2, [r7, #12] 800e3e0: 9202 str r2, [sp, #8] 800e3e2: 9301 str r3, [sp, #4] 800e3e4: 2302 movs r3, #2 800e3e6: 9300 str r3, [sp, #0] 800e3e8: 2300 movs r3, #0 800e3ea: 460a mov r2, r1 800e3ec: 4911 ldr r1, [pc, #68] @ (800e434 ) 800e3ee: 4812 ldr r0, [pc, #72] @ (800e438 ) 800e3f0: f7fe ff04 bl 800d1fc 800e3f4: 4603 mov r3, r0 800e3f6: 4a11 ldr r2, [pc, #68] @ (800e43c ) 800e3f8: 6013 str r3, [r2, #0] NULL, ( ( UBaseType_t ) configTIMER_TASK_PRIORITY ) | portPRIVILEGE_BIT, pxTimerTaskStackBuffer, pxTimerTaskTCBBuffer ); if( xTimerTaskHandle != NULL ) 800e3fa: 4b10 ldr r3, [pc, #64] @ (800e43c ) 800e3fc: 681b ldr r3, [r3, #0] 800e3fe: 2b00 cmp r3, #0 800e400: d001 beq.n 800e406 { xReturn = pdPASS; 800e402: 2301 movs r3, #1 800e404: 617b str r3, [r7, #20] else { mtCOVERAGE_TEST_MARKER(); } configASSERT( xReturn ); 800e406: 697b ldr r3, [r7, #20] 800e408: 2b00 cmp r3, #0 800e40a: d10b bne.n 800e424 __asm volatile 800e40c: f04f 0350 mov.w r3, #80 @ 0x50 800e410: f383 8811 msr BASEPRI, r3 800e414: f3bf 8f6f isb sy 800e418: f3bf 8f4f dsb sy 800e41c: 613b str r3, [r7, #16] } 800e41e: bf00 nop 800e420: bf00 nop 800e422: e7fd b.n 800e420 return xReturn; 800e424: 697b ldr r3, [r7, #20] } 800e426: 4618 mov r0, r3 800e428: 3718 adds r7, #24 800e42a: 46bd mov sp, r7 800e42c: bd80 pop {r7, pc} 800e42e: bf00 nop 800e430: 20002888 .word 0x20002888 800e434: 08014ea0 .word 0x08014ea0 800e438: 0800e579 .word 0x0800e579 800e43c: 2000288c .word 0x2000288c 0800e440 : } } /*-----------------------------------------------------------*/ BaseType_t xTimerGenericCommand( TimerHandle_t xTimer, const BaseType_t xCommandID, const TickType_t xOptionalValue, BaseType_t * const pxHigherPriorityTaskWoken, const TickType_t xTicksToWait ) { 800e440: b580 push {r7, lr} 800e442: b08a sub sp, #40 @ 0x28 800e444: af00 add r7, sp, #0 800e446: 60f8 str r0, [r7, #12] 800e448: 60b9 str r1, [r7, #8] 800e44a: 607a str r2, [r7, #4] 800e44c: 603b str r3, [r7, #0] BaseType_t xReturn = pdFAIL; 800e44e: 2300 movs r3, #0 800e450: 627b str r3, [r7, #36] @ 0x24 DaemonTaskMessage_t xMessage; configASSERT( xTimer ); 800e452: 68fb ldr r3, [r7, #12] 800e454: 2b00 cmp r3, #0 800e456: d10b bne.n 800e470 __asm volatile 800e458: f04f 0350 mov.w r3, #80 @ 0x50 800e45c: f383 8811 msr BASEPRI, r3 800e460: f3bf 8f6f isb sy 800e464: f3bf 8f4f dsb sy 800e468: 623b str r3, [r7, #32] } 800e46a: bf00 nop 800e46c: bf00 nop 800e46e: e7fd b.n 800e46c /* Send a message to the timer service task to perform a particular action on a particular timer definition. */ if( xTimerQueue != NULL ) 800e470: 4b19 ldr r3, [pc, #100] @ (800e4d8 ) 800e472: 681b ldr r3, [r3, #0] 800e474: 2b00 cmp r3, #0 800e476: d02a beq.n 800e4ce { /* Send a command to the timer service task to start the xTimer timer. */ xMessage.xMessageID = xCommandID; 800e478: 68bb ldr r3, [r7, #8] 800e47a: 613b str r3, [r7, #16] xMessage.u.xTimerParameters.xMessageValue = xOptionalValue; 800e47c: 687b ldr r3, [r7, #4] 800e47e: 617b str r3, [r7, #20] xMessage.u.xTimerParameters.pxTimer = xTimer; 800e480: 68fb ldr r3, [r7, #12] 800e482: 61bb str r3, [r7, #24] if( xCommandID < tmrFIRST_FROM_ISR_COMMAND ) 800e484: 68bb ldr r3, [r7, #8] 800e486: 2b05 cmp r3, #5 800e488: dc18 bgt.n 800e4bc { if( xTaskGetSchedulerState() == taskSCHEDULER_RUNNING ) 800e48a: f7ff fcab bl 800dde4 800e48e: 4603 mov r3, r0 800e490: 2b02 cmp r3, #2 800e492: d109 bne.n 800e4a8 { xReturn = xQueueSendToBack( xTimerQueue, &xMessage, xTicksToWait ); 800e494: 4b10 ldr r3, [pc, #64] @ (800e4d8 ) 800e496: 6818 ldr r0, [r3, #0] 800e498: f107 0110 add.w r1, r7, #16 800e49c: 2300 movs r3, #0 800e49e: 6b3a ldr r2, [r7, #48] @ 0x30 800e4a0: f7fe f904 bl 800c6ac 800e4a4: 6278 str r0, [r7, #36] @ 0x24 800e4a6: e012 b.n 800e4ce } else { xReturn = xQueueSendToBack( xTimerQueue, &xMessage, tmrNO_DELAY ); 800e4a8: 4b0b ldr r3, [pc, #44] @ (800e4d8 ) 800e4aa: 6818 ldr r0, [r3, #0] 800e4ac: f107 0110 add.w r1, r7, #16 800e4b0: 2300 movs r3, #0 800e4b2: 2200 movs r2, #0 800e4b4: f7fe f8fa bl 800c6ac 800e4b8: 6278 str r0, [r7, #36] @ 0x24 800e4ba: e008 b.n 800e4ce } } else { xReturn = xQueueSendToBackFromISR( xTimerQueue, &xMessage, pxHigherPriorityTaskWoken ); 800e4bc: 4b06 ldr r3, [pc, #24] @ (800e4d8 ) 800e4be: 6818 ldr r0, [r3, #0] 800e4c0: f107 0110 add.w r1, r7, #16 800e4c4: 2300 movs r3, #0 800e4c6: 683a ldr r2, [r7, #0] 800e4c8: f7fe f9f2 bl 800c8b0 800e4cc: 6278 str r0, [r7, #36] @ 0x24 else { mtCOVERAGE_TEST_MARKER(); } return xReturn; 800e4ce: 6a7b ldr r3, [r7, #36] @ 0x24 } 800e4d0: 4618 mov r0, r3 800e4d2: 3728 adds r7, #40 @ 0x28 800e4d4: 46bd mov sp, r7 800e4d6: bd80 pop {r7, pc} 800e4d8: 20002888 .word 0x20002888 0800e4dc : return pxTimer->pcTimerName; } /*-----------------------------------------------------------*/ static void prvProcessExpiredTimer( const TickType_t xNextExpireTime, const TickType_t xTimeNow ) { 800e4dc: b580 push {r7, lr} 800e4de: b088 sub sp, #32 800e4e0: af02 add r7, sp, #8 800e4e2: 6078 str r0, [r7, #4] 800e4e4: 6039 str r1, [r7, #0] BaseType_t xResult; Timer_t * const pxTimer = ( Timer_t * ) listGET_OWNER_OF_HEAD_ENTRY( pxCurrentTimerList ); /*lint !e9087 !e9079 void * is used as this macro is used with tasks and co-routines too. Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */ 800e4e6: 4b23 ldr r3, [pc, #140] @ (800e574 ) 800e4e8: 681b ldr r3, [r3, #0] 800e4ea: 68db ldr r3, [r3, #12] 800e4ec: 68db ldr r3, [r3, #12] 800e4ee: 617b str r3, [r7, #20] /* Remove the timer from the list of active timers. A check has already been performed to ensure the list is not empty. */ ( void ) uxListRemove( &( pxTimer->xTimerListItem ) ); 800e4f0: 697b ldr r3, [r7, #20] 800e4f2: 3304 adds r3, #4 800e4f4: 4618 mov r0, r3 800e4f6: f7fd ff69 bl 800c3cc traceTIMER_EXPIRED( pxTimer ); /* If the timer is an auto-reload timer then calculate the next expiry time and re-insert the timer in the list of active timers. */ if( ( pxTimer->ucStatus & tmrSTATUS_IS_AUTORELOAD ) != 0 ) 800e4fa: 697b ldr r3, [r7, #20] 800e4fc: f893 3028 ldrb.w r3, [r3, #40] @ 0x28 800e500: f003 0304 and.w r3, r3, #4 800e504: 2b00 cmp r3, #0 800e506: d023 beq.n 800e550 { /* The timer is inserted into a list using a time relative to anything other than the current time. It will therefore be inserted into the correct list relative to the time this task thinks it is now. */ if( prvInsertTimerInActiveList( pxTimer, ( xNextExpireTime + pxTimer->xTimerPeriodInTicks ), xTimeNow, xNextExpireTime ) != pdFALSE ) 800e508: 697b ldr r3, [r7, #20] 800e50a: 699a ldr r2, [r3, #24] 800e50c: 687b ldr r3, [r7, #4] 800e50e: 18d1 adds r1, r2, r3 800e510: 687b ldr r3, [r7, #4] 800e512: 683a ldr r2, [r7, #0] 800e514: 6978 ldr r0, [r7, #20] 800e516: f000 f8d5 bl 800e6c4 800e51a: 4603 mov r3, r0 800e51c: 2b00 cmp r3, #0 800e51e: d020 beq.n 800e562 { /* The timer expired before it was added to the active timer list. Reload it now. */ xResult = xTimerGenericCommand( pxTimer, tmrCOMMAND_START_DONT_TRACE, xNextExpireTime, NULL, tmrNO_DELAY ); 800e520: 2300 movs r3, #0 800e522: 9300 str r3, [sp, #0] 800e524: 2300 movs r3, #0 800e526: 687a ldr r2, [r7, #4] 800e528: 2100 movs r1, #0 800e52a: 6978 ldr r0, [r7, #20] 800e52c: f7ff ff88 bl 800e440 800e530: 6138 str r0, [r7, #16] configASSERT( xResult ); 800e532: 693b ldr r3, [r7, #16] 800e534: 2b00 cmp r3, #0 800e536: d114 bne.n 800e562 __asm volatile 800e538: f04f 0350 mov.w r3, #80 @ 0x50 800e53c: f383 8811 msr BASEPRI, r3 800e540: f3bf 8f6f isb sy 800e544: f3bf 8f4f dsb sy 800e548: 60fb str r3, [r7, #12] } 800e54a: bf00 nop 800e54c: bf00 nop 800e54e: e7fd b.n 800e54c mtCOVERAGE_TEST_MARKER(); } } else { pxTimer->ucStatus &= ~tmrSTATUS_IS_ACTIVE; 800e550: 697b ldr r3, [r7, #20] 800e552: f893 3028 ldrb.w r3, [r3, #40] @ 0x28 800e556: f023 0301 bic.w r3, r3, #1 800e55a: b2da uxtb r2, r3 800e55c: 697b ldr r3, [r7, #20] 800e55e: f883 2028 strb.w r2, [r3, #40] @ 0x28 mtCOVERAGE_TEST_MARKER(); } /* Call the timer callback. */ pxTimer->pxCallbackFunction( ( TimerHandle_t ) pxTimer ); 800e562: 697b ldr r3, [r7, #20] 800e564: 6a1b ldr r3, [r3, #32] 800e566: 6978 ldr r0, [r7, #20] 800e568: 4798 blx r3 } 800e56a: bf00 nop 800e56c: 3718 adds r7, #24 800e56e: 46bd mov sp, r7 800e570: bd80 pop {r7, pc} 800e572: bf00 nop 800e574: 20002880 .word 0x20002880 0800e578 : /*-----------------------------------------------------------*/ static portTASK_FUNCTION( prvTimerTask, pvParameters ) { 800e578: b580 push {r7, lr} 800e57a: b084 sub sp, #16 800e57c: af00 add r7, sp, #0 800e57e: 6078 str r0, [r7, #4] for( ;; ) { /* Query the timers list to see if it contains any timers, and if so, obtain the time at which the next timer will expire. */ xNextExpireTime = prvGetNextExpireTime( &xListWasEmpty ); 800e580: f107 0308 add.w r3, r7, #8 800e584: 4618 mov r0, r3 800e586: f000 f859 bl 800e63c 800e58a: 60f8 str r0, [r7, #12] /* If a timer has expired, process it. Otherwise, block this task until either a timer does expire, or a command is received. */ prvProcessTimerOrBlockTask( xNextExpireTime, xListWasEmpty ); 800e58c: 68bb ldr r3, [r7, #8] 800e58e: 4619 mov r1, r3 800e590: 68f8 ldr r0, [r7, #12] 800e592: f000 f805 bl 800e5a0 /* Empty the command queue. */ prvProcessReceivedCommands(); 800e596: f000 f8d7 bl 800e748 xNextExpireTime = prvGetNextExpireTime( &xListWasEmpty ); 800e59a: bf00 nop 800e59c: e7f0 b.n 800e580 ... 0800e5a0 : } } /*-----------------------------------------------------------*/ static void prvProcessTimerOrBlockTask( const TickType_t xNextExpireTime, BaseType_t xListWasEmpty ) { 800e5a0: b580 push {r7, lr} 800e5a2: b084 sub sp, #16 800e5a4: af00 add r7, sp, #0 800e5a6: 6078 str r0, [r7, #4] 800e5a8: 6039 str r1, [r7, #0] TickType_t xTimeNow; BaseType_t xTimerListsWereSwitched; vTaskSuspendAll(); 800e5aa: f7ff f835 bl 800d618 /* Obtain the time now to make an assessment as to whether the timer has expired or not. If obtaining the time causes the lists to switch then don't process this timer as any timers that remained in the list when the lists were switched will have been processed within the prvSampleTimeNow() function. */ xTimeNow = prvSampleTimeNow( &xTimerListsWereSwitched ); 800e5ae: f107 0308 add.w r3, r7, #8 800e5b2: 4618 mov r0, r3 800e5b4: f000 f866 bl 800e684 800e5b8: 60f8 str r0, [r7, #12] if( xTimerListsWereSwitched == pdFALSE ) 800e5ba: 68bb ldr r3, [r7, #8] 800e5bc: 2b00 cmp r3, #0 800e5be: d130 bne.n 800e622 { /* The tick count has not overflowed, has the timer expired? */ if( ( xListWasEmpty == pdFALSE ) && ( xNextExpireTime <= xTimeNow ) ) 800e5c0: 683b ldr r3, [r7, #0] 800e5c2: 2b00 cmp r3, #0 800e5c4: d10a bne.n 800e5dc 800e5c6: 687a ldr r2, [r7, #4] 800e5c8: 68fb ldr r3, [r7, #12] 800e5ca: 429a cmp r2, r3 800e5cc: d806 bhi.n 800e5dc { ( void ) xTaskResumeAll(); 800e5ce: f7ff f831 bl 800d634 prvProcessExpiredTimer( xNextExpireTime, xTimeNow ); 800e5d2: 68f9 ldr r1, [r7, #12] 800e5d4: 6878 ldr r0, [r7, #4] 800e5d6: f7ff ff81 bl 800e4dc else { ( void ) xTaskResumeAll(); } } } 800e5da: e024 b.n 800e626 if( xListWasEmpty != pdFALSE ) 800e5dc: 683b ldr r3, [r7, #0] 800e5de: 2b00 cmp r3, #0 800e5e0: d008 beq.n 800e5f4 xListWasEmpty = listLIST_IS_EMPTY( pxOverflowTimerList ); 800e5e2: 4b13 ldr r3, [pc, #76] @ (800e630 ) 800e5e4: 681b ldr r3, [r3, #0] 800e5e6: 681b ldr r3, [r3, #0] 800e5e8: 2b00 cmp r3, #0 800e5ea: d101 bne.n 800e5f0 800e5ec: 2301 movs r3, #1 800e5ee: e000 b.n 800e5f2 800e5f0: 2300 movs r3, #0 800e5f2: 603b str r3, [r7, #0] vQueueWaitForMessageRestricted( xTimerQueue, ( xNextExpireTime - xTimeNow ), xListWasEmpty ); 800e5f4: 4b0f ldr r3, [pc, #60] @ (800e634 ) 800e5f6: 6818 ldr r0, [r3, #0] 800e5f8: 687a ldr r2, [r7, #4] 800e5fa: 68fb ldr r3, [r7, #12] 800e5fc: 1ad3 subs r3, r2, r3 800e5fe: 683a ldr r2, [r7, #0] 800e600: 4619 mov r1, r3 800e602: f7fe fdc7 bl 800d194 if( xTaskResumeAll() == pdFALSE ) 800e606: f7ff f815 bl 800d634 800e60a: 4603 mov r3, r0 800e60c: 2b00 cmp r3, #0 800e60e: d10a bne.n 800e626 portYIELD_WITHIN_API(); 800e610: 4b09 ldr r3, [pc, #36] @ (800e638 ) 800e612: f04f 5280 mov.w r2, #268435456 @ 0x10000000 800e616: 601a str r2, [r3, #0] 800e618: f3bf 8f4f dsb sy 800e61c: f3bf 8f6f isb sy } 800e620: e001 b.n 800e626 ( void ) xTaskResumeAll(); 800e622: f7ff f807 bl 800d634 } 800e626: bf00 nop 800e628: 3710 adds r7, #16 800e62a: 46bd mov sp, r7 800e62c: bd80 pop {r7, pc} 800e62e: bf00 nop 800e630: 20002884 .word 0x20002884 800e634: 20002888 .word 0x20002888 800e638: e000ed04 .word 0xe000ed04 0800e63c : /*-----------------------------------------------------------*/ static TickType_t prvGetNextExpireTime( BaseType_t * const pxListWasEmpty ) { 800e63c: b480 push {r7} 800e63e: b085 sub sp, #20 800e640: af00 add r7, sp, #0 800e642: 6078 str r0, [r7, #4] the timer with the nearest expiry time will expire. If there are no active timers then just set the next expire time to 0. That will cause this task to unblock when the tick count overflows, at which point the timer lists will be switched and the next expiry time can be re-assessed. */ *pxListWasEmpty = listLIST_IS_EMPTY( pxCurrentTimerList ); 800e644: 4b0e ldr r3, [pc, #56] @ (800e680 ) 800e646: 681b ldr r3, [r3, #0] 800e648: 681b ldr r3, [r3, #0] 800e64a: 2b00 cmp r3, #0 800e64c: d101 bne.n 800e652 800e64e: 2201 movs r2, #1 800e650: e000 b.n 800e654 800e652: 2200 movs r2, #0 800e654: 687b ldr r3, [r7, #4] 800e656: 601a str r2, [r3, #0] if( *pxListWasEmpty == pdFALSE ) 800e658: 687b ldr r3, [r7, #4] 800e65a: 681b ldr r3, [r3, #0] 800e65c: 2b00 cmp r3, #0 800e65e: d105 bne.n 800e66c { xNextExpireTime = listGET_ITEM_VALUE_OF_HEAD_ENTRY( pxCurrentTimerList ); 800e660: 4b07 ldr r3, [pc, #28] @ (800e680 ) 800e662: 681b ldr r3, [r3, #0] 800e664: 68db ldr r3, [r3, #12] 800e666: 681b ldr r3, [r3, #0] 800e668: 60fb str r3, [r7, #12] 800e66a: e001 b.n 800e670 } else { /* Ensure the task unblocks when the tick count rolls over. */ xNextExpireTime = ( TickType_t ) 0U; 800e66c: 2300 movs r3, #0 800e66e: 60fb str r3, [r7, #12] } return xNextExpireTime; 800e670: 68fb ldr r3, [r7, #12] } 800e672: 4618 mov r0, r3 800e674: 3714 adds r7, #20 800e676: 46bd mov sp, r7 800e678: f85d 7b04 ldr.w r7, [sp], #4 800e67c: 4770 bx lr 800e67e: bf00 nop 800e680: 20002880 .word 0x20002880 0800e684 : /*-----------------------------------------------------------*/ static TickType_t prvSampleTimeNow( BaseType_t * const pxTimerListsWereSwitched ) { 800e684: b580 push {r7, lr} 800e686: b084 sub sp, #16 800e688: af00 add r7, sp, #0 800e68a: 6078 str r0, [r7, #4] TickType_t xTimeNow; PRIVILEGED_DATA static TickType_t xLastTime = ( TickType_t ) 0U; /*lint !e956 Variable is only accessible to one task. */ xTimeNow = xTaskGetTickCount(); 800e68c: f7ff f870 bl 800d770 800e690: 60f8 str r0, [r7, #12] if( xTimeNow < xLastTime ) 800e692: 4b0b ldr r3, [pc, #44] @ (800e6c0 ) 800e694: 681b ldr r3, [r3, #0] 800e696: 68fa ldr r2, [r7, #12] 800e698: 429a cmp r2, r3 800e69a: d205 bcs.n 800e6a8 { prvSwitchTimerLists(); 800e69c: f000 f93a bl 800e914 *pxTimerListsWereSwitched = pdTRUE; 800e6a0: 687b ldr r3, [r7, #4] 800e6a2: 2201 movs r2, #1 800e6a4: 601a str r2, [r3, #0] 800e6a6: e002 b.n 800e6ae } else { *pxTimerListsWereSwitched = pdFALSE; 800e6a8: 687b ldr r3, [r7, #4] 800e6aa: 2200 movs r2, #0 800e6ac: 601a str r2, [r3, #0] } xLastTime = xTimeNow; 800e6ae: 4a04 ldr r2, [pc, #16] @ (800e6c0 ) 800e6b0: 68fb ldr r3, [r7, #12] 800e6b2: 6013 str r3, [r2, #0] return xTimeNow; 800e6b4: 68fb ldr r3, [r7, #12] } 800e6b6: 4618 mov r0, r3 800e6b8: 3710 adds r7, #16 800e6ba: 46bd mov sp, r7 800e6bc: bd80 pop {r7, pc} 800e6be: bf00 nop 800e6c0: 20002890 .word 0x20002890 0800e6c4 : /*-----------------------------------------------------------*/ static BaseType_t prvInsertTimerInActiveList( Timer_t * const pxTimer, const TickType_t xNextExpiryTime, const TickType_t xTimeNow, const TickType_t xCommandTime ) { 800e6c4: b580 push {r7, lr} 800e6c6: b086 sub sp, #24 800e6c8: af00 add r7, sp, #0 800e6ca: 60f8 str r0, [r7, #12] 800e6cc: 60b9 str r1, [r7, #8] 800e6ce: 607a str r2, [r7, #4] 800e6d0: 603b str r3, [r7, #0] BaseType_t xProcessTimerNow = pdFALSE; 800e6d2: 2300 movs r3, #0 800e6d4: 617b str r3, [r7, #20] listSET_LIST_ITEM_VALUE( &( pxTimer->xTimerListItem ), xNextExpiryTime ); 800e6d6: 68fb ldr r3, [r7, #12] 800e6d8: 68ba ldr r2, [r7, #8] 800e6da: 605a str r2, [r3, #4] listSET_LIST_ITEM_OWNER( &( pxTimer->xTimerListItem ), pxTimer ); 800e6dc: 68fb ldr r3, [r7, #12] 800e6de: 68fa ldr r2, [r7, #12] 800e6e0: 611a str r2, [r3, #16] if( xNextExpiryTime <= xTimeNow ) 800e6e2: 68ba ldr r2, [r7, #8] 800e6e4: 687b ldr r3, [r7, #4] 800e6e6: 429a cmp r2, r3 800e6e8: d812 bhi.n 800e710 { /* Has the expiry time elapsed between the command to start/reset a timer was issued, and the time the command was processed? */ if( ( ( TickType_t ) ( xTimeNow - xCommandTime ) ) >= pxTimer->xTimerPeriodInTicks ) /*lint !e961 MISRA exception as the casts are only redundant for some ports. */ 800e6ea: 687a ldr r2, [r7, #4] 800e6ec: 683b ldr r3, [r7, #0] 800e6ee: 1ad2 subs r2, r2, r3 800e6f0: 68fb ldr r3, [r7, #12] 800e6f2: 699b ldr r3, [r3, #24] 800e6f4: 429a cmp r2, r3 800e6f6: d302 bcc.n 800e6fe { /* The time between a command being issued and the command being processed actually exceeds the timers period. */ xProcessTimerNow = pdTRUE; 800e6f8: 2301 movs r3, #1 800e6fa: 617b str r3, [r7, #20] 800e6fc: e01b b.n 800e736 } else { vListInsert( pxOverflowTimerList, &( pxTimer->xTimerListItem ) ); 800e6fe: 4b10 ldr r3, [pc, #64] @ (800e740 ) 800e700: 681a ldr r2, [r3, #0] 800e702: 68fb ldr r3, [r7, #12] 800e704: 3304 adds r3, #4 800e706: 4619 mov r1, r3 800e708: 4610 mov r0, r2 800e70a: f7fd fe26 bl 800c35a 800e70e: e012 b.n 800e736 } } else { if( ( xTimeNow < xCommandTime ) && ( xNextExpiryTime >= xCommandTime ) ) 800e710: 687a ldr r2, [r7, #4] 800e712: 683b ldr r3, [r7, #0] 800e714: 429a cmp r2, r3 800e716: d206 bcs.n 800e726 800e718: 68ba ldr r2, [r7, #8] 800e71a: 683b ldr r3, [r7, #0] 800e71c: 429a cmp r2, r3 800e71e: d302 bcc.n 800e726 { /* If, since the command was issued, the tick count has overflowed but the expiry time has not, then the timer must have already passed its expiry time and should be processed immediately. */ xProcessTimerNow = pdTRUE; 800e720: 2301 movs r3, #1 800e722: 617b str r3, [r7, #20] 800e724: e007 b.n 800e736 } else { vListInsert( pxCurrentTimerList, &( pxTimer->xTimerListItem ) ); 800e726: 4b07 ldr r3, [pc, #28] @ (800e744 ) 800e728: 681a ldr r2, [r3, #0] 800e72a: 68fb ldr r3, [r7, #12] 800e72c: 3304 adds r3, #4 800e72e: 4619 mov r1, r3 800e730: 4610 mov r0, r2 800e732: f7fd fe12 bl 800c35a } } return xProcessTimerNow; 800e736: 697b ldr r3, [r7, #20] } 800e738: 4618 mov r0, r3 800e73a: 3718 adds r7, #24 800e73c: 46bd mov sp, r7 800e73e: bd80 pop {r7, pc} 800e740: 20002884 .word 0x20002884 800e744: 20002880 .word 0x20002880 0800e748 : /*-----------------------------------------------------------*/ static void prvProcessReceivedCommands( void ) { 800e748: b580 push {r7, lr} 800e74a: b08e sub sp, #56 @ 0x38 800e74c: af02 add r7, sp, #8 DaemonTaskMessage_t xMessage; Timer_t *pxTimer; BaseType_t xTimerListsWereSwitched, xResult; TickType_t xTimeNow; while( xQueueReceive( xTimerQueue, &xMessage, tmrNO_DELAY ) != pdFAIL ) /*lint !e603 xMessage does not have to be initialised as it is passed out, not in, and it is not used unless xQueueReceive() returns pdTRUE. */ 800e74e: e0ce b.n 800e8ee { #if ( INCLUDE_xTimerPendFunctionCall == 1 ) { /* Negative commands are pended function calls rather than timer commands. */ if( xMessage.xMessageID < ( BaseType_t ) 0 ) 800e750: 687b ldr r3, [r7, #4] 800e752: 2b00 cmp r3, #0 800e754: da19 bge.n 800e78a { const CallbackParameters_t * const pxCallback = &( xMessage.u.xCallbackParameters ); 800e756: 1d3b adds r3, r7, #4 800e758: 3304 adds r3, #4 800e75a: 62fb str r3, [r7, #44] @ 0x2c /* The timer uses the xCallbackParameters member to request a callback be executed. Check the callback is not NULL. */ configASSERT( pxCallback ); 800e75c: 6afb ldr r3, [r7, #44] @ 0x2c 800e75e: 2b00 cmp r3, #0 800e760: d10b bne.n 800e77a __asm volatile 800e762: f04f 0350 mov.w r3, #80 @ 0x50 800e766: f383 8811 msr BASEPRI, r3 800e76a: f3bf 8f6f isb sy 800e76e: f3bf 8f4f dsb sy 800e772: 61fb str r3, [r7, #28] } 800e774: bf00 nop 800e776: bf00 nop 800e778: e7fd b.n 800e776 /* Call the function. */ pxCallback->pxCallbackFunction( pxCallback->pvParameter1, pxCallback->ulParameter2 ); 800e77a: 6afb ldr r3, [r7, #44] @ 0x2c 800e77c: 681b ldr r3, [r3, #0] 800e77e: 6afa ldr r2, [r7, #44] @ 0x2c 800e780: 6850 ldr r0, [r2, #4] 800e782: 6afa ldr r2, [r7, #44] @ 0x2c 800e784: 6892 ldr r2, [r2, #8] 800e786: 4611 mov r1, r2 800e788: 4798 blx r3 } #endif /* INCLUDE_xTimerPendFunctionCall */ /* Commands that are positive are timer commands rather than pended function calls. */ if( xMessage.xMessageID >= ( BaseType_t ) 0 ) 800e78a: 687b ldr r3, [r7, #4] 800e78c: 2b00 cmp r3, #0 800e78e: f2c0 80ae blt.w 800e8ee { /* The messages uses the xTimerParameters member to work on a software timer. */ pxTimer = xMessage.u.xTimerParameters.pxTimer; 800e792: 68fb ldr r3, [r7, #12] 800e794: 62bb str r3, [r7, #40] @ 0x28 if( listIS_CONTAINED_WITHIN( NULL, &( pxTimer->xTimerListItem ) ) == pdFALSE ) /*lint !e961. The cast is only redundant when NULL is passed into the macro. */ 800e796: 6abb ldr r3, [r7, #40] @ 0x28 800e798: 695b ldr r3, [r3, #20] 800e79a: 2b00 cmp r3, #0 800e79c: d004 beq.n 800e7a8 { /* The timer is in a list, remove it. */ ( void ) uxListRemove( &( pxTimer->xTimerListItem ) ); 800e79e: 6abb ldr r3, [r7, #40] @ 0x28 800e7a0: 3304 adds r3, #4 800e7a2: 4618 mov r0, r3 800e7a4: f7fd fe12 bl 800c3cc it must be present in the function call. prvSampleTimeNow() must be called after the message is received from xTimerQueue so there is no possibility of a higher priority task adding a message to the message queue with a time that is ahead of the timer daemon task (because it pre-empted the timer daemon task after the xTimeNow value was set). */ xTimeNow = prvSampleTimeNow( &xTimerListsWereSwitched ); 800e7a8: 463b mov r3, r7 800e7aa: 4618 mov r0, r3 800e7ac: f7ff ff6a bl 800e684 800e7b0: 6278 str r0, [r7, #36] @ 0x24 switch( xMessage.xMessageID ) 800e7b2: 687b ldr r3, [r7, #4] 800e7b4: 2b09 cmp r3, #9 800e7b6: f200 8097 bhi.w 800e8e8 800e7ba: a201 add r2, pc, #4 @ (adr r2, 800e7c0 ) 800e7bc: f852 f023 ldr.w pc, [r2, r3, lsl #2] 800e7c0: 0800e7e9 .word 0x0800e7e9 800e7c4: 0800e7e9 .word 0x0800e7e9 800e7c8: 0800e7e9 .word 0x0800e7e9 800e7cc: 0800e85f .word 0x0800e85f 800e7d0: 0800e873 .word 0x0800e873 800e7d4: 0800e8bf .word 0x0800e8bf 800e7d8: 0800e7e9 .word 0x0800e7e9 800e7dc: 0800e7e9 .word 0x0800e7e9 800e7e0: 0800e85f .word 0x0800e85f 800e7e4: 0800e873 .word 0x0800e873 case tmrCOMMAND_START_FROM_ISR : case tmrCOMMAND_RESET : case tmrCOMMAND_RESET_FROM_ISR : case tmrCOMMAND_START_DONT_TRACE : /* Start or restart a timer. */ pxTimer->ucStatus |= tmrSTATUS_IS_ACTIVE; 800e7e8: 6abb ldr r3, [r7, #40] @ 0x28 800e7ea: f893 3028 ldrb.w r3, [r3, #40] @ 0x28 800e7ee: f043 0301 orr.w r3, r3, #1 800e7f2: b2da uxtb r2, r3 800e7f4: 6abb ldr r3, [r7, #40] @ 0x28 800e7f6: f883 2028 strb.w r2, [r3, #40] @ 0x28 if( prvInsertTimerInActiveList( pxTimer, xMessage.u.xTimerParameters.xMessageValue + pxTimer->xTimerPeriodInTicks, xTimeNow, xMessage.u.xTimerParameters.xMessageValue ) != pdFALSE ) 800e7fa: 68ba ldr r2, [r7, #8] 800e7fc: 6abb ldr r3, [r7, #40] @ 0x28 800e7fe: 699b ldr r3, [r3, #24] 800e800: 18d1 adds r1, r2, r3 800e802: 68bb ldr r3, [r7, #8] 800e804: 6a7a ldr r2, [r7, #36] @ 0x24 800e806: 6ab8 ldr r0, [r7, #40] @ 0x28 800e808: f7ff ff5c bl 800e6c4 800e80c: 4603 mov r3, r0 800e80e: 2b00 cmp r3, #0 800e810: d06c beq.n 800e8ec { /* The timer expired before it was added to the active timer list. Process it now. */ pxTimer->pxCallbackFunction( ( TimerHandle_t ) pxTimer ); 800e812: 6abb ldr r3, [r7, #40] @ 0x28 800e814: 6a1b ldr r3, [r3, #32] 800e816: 6ab8 ldr r0, [r7, #40] @ 0x28 800e818: 4798 blx r3 traceTIMER_EXPIRED( pxTimer ); if( ( pxTimer->ucStatus & tmrSTATUS_IS_AUTORELOAD ) != 0 ) 800e81a: 6abb ldr r3, [r7, #40] @ 0x28 800e81c: f893 3028 ldrb.w r3, [r3, #40] @ 0x28 800e820: f003 0304 and.w r3, r3, #4 800e824: 2b00 cmp r3, #0 800e826: d061 beq.n 800e8ec { xResult = xTimerGenericCommand( pxTimer, tmrCOMMAND_START_DONT_TRACE, xMessage.u.xTimerParameters.xMessageValue + pxTimer->xTimerPeriodInTicks, NULL, tmrNO_DELAY ); 800e828: 68ba ldr r2, [r7, #8] 800e82a: 6abb ldr r3, [r7, #40] @ 0x28 800e82c: 699b ldr r3, [r3, #24] 800e82e: 441a add r2, r3 800e830: 2300 movs r3, #0 800e832: 9300 str r3, [sp, #0] 800e834: 2300 movs r3, #0 800e836: 2100 movs r1, #0 800e838: 6ab8 ldr r0, [r7, #40] @ 0x28 800e83a: f7ff fe01 bl 800e440 800e83e: 6238 str r0, [r7, #32] configASSERT( xResult ); 800e840: 6a3b ldr r3, [r7, #32] 800e842: 2b00 cmp r3, #0 800e844: d152 bne.n 800e8ec __asm volatile 800e846: f04f 0350 mov.w r3, #80 @ 0x50 800e84a: f383 8811 msr BASEPRI, r3 800e84e: f3bf 8f6f isb sy 800e852: f3bf 8f4f dsb sy 800e856: 61bb str r3, [r7, #24] } 800e858: bf00 nop 800e85a: bf00 nop 800e85c: e7fd b.n 800e85a break; case tmrCOMMAND_STOP : case tmrCOMMAND_STOP_FROM_ISR : /* The timer has already been removed from the active list. */ pxTimer->ucStatus &= ~tmrSTATUS_IS_ACTIVE; 800e85e: 6abb ldr r3, [r7, #40] @ 0x28 800e860: f893 3028 ldrb.w r3, [r3, #40] @ 0x28 800e864: f023 0301 bic.w r3, r3, #1 800e868: b2da uxtb r2, r3 800e86a: 6abb ldr r3, [r7, #40] @ 0x28 800e86c: f883 2028 strb.w r2, [r3, #40] @ 0x28 break; 800e870: e03d b.n 800e8ee case tmrCOMMAND_CHANGE_PERIOD : case tmrCOMMAND_CHANGE_PERIOD_FROM_ISR : pxTimer->ucStatus |= tmrSTATUS_IS_ACTIVE; 800e872: 6abb ldr r3, [r7, #40] @ 0x28 800e874: f893 3028 ldrb.w r3, [r3, #40] @ 0x28 800e878: f043 0301 orr.w r3, r3, #1 800e87c: b2da uxtb r2, r3 800e87e: 6abb ldr r3, [r7, #40] @ 0x28 800e880: f883 2028 strb.w r2, [r3, #40] @ 0x28 pxTimer->xTimerPeriodInTicks = xMessage.u.xTimerParameters.xMessageValue; 800e884: 68ba ldr r2, [r7, #8] 800e886: 6abb ldr r3, [r7, #40] @ 0x28 800e888: 619a str r2, [r3, #24] configASSERT( ( pxTimer->xTimerPeriodInTicks > 0 ) ); 800e88a: 6abb ldr r3, [r7, #40] @ 0x28 800e88c: 699b ldr r3, [r3, #24] 800e88e: 2b00 cmp r3, #0 800e890: d10b bne.n 800e8aa __asm volatile 800e892: f04f 0350 mov.w r3, #80 @ 0x50 800e896: f383 8811 msr BASEPRI, r3 800e89a: f3bf 8f6f isb sy 800e89e: f3bf 8f4f dsb sy 800e8a2: 617b str r3, [r7, #20] } 800e8a4: bf00 nop 800e8a6: bf00 nop 800e8a8: e7fd b.n 800e8a6 be longer or shorter than the old one. The command time is therefore set to the current time, and as the period cannot be zero the next expiry time can only be in the future, meaning (unlike for the xTimerStart() case above) there is no fail case that needs to be handled here. */ ( void ) prvInsertTimerInActiveList( pxTimer, ( xTimeNow + pxTimer->xTimerPeriodInTicks ), xTimeNow, xTimeNow ); 800e8aa: 6abb ldr r3, [r7, #40] @ 0x28 800e8ac: 699a ldr r2, [r3, #24] 800e8ae: 6a7b ldr r3, [r7, #36] @ 0x24 800e8b0: 18d1 adds r1, r2, r3 800e8b2: 6a7b ldr r3, [r7, #36] @ 0x24 800e8b4: 6a7a ldr r2, [r7, #36] @ 0x24 800e8b6: 6ab8 ldr r0, [r7, #40] @ 0x28 800e8b8: f7ff ff04 bl 800e6c4 break; 800e8bc: e017 b.n 800e8ee #if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) { /* The timer has already been removed from the active list, just free up the memory if the memory was dynamically allocated. */ if( ( pxTimer->ucStatus & tmrSTATUS_IS_STATICALLY_ALLOCATED ) == ( uint8_t ) 0 ) 800e8be: 6abb ldr r3, [r7, #40] @ 0x28 800e8c0: f893 3028 ldrb.w r3, [r3, #40] @ 0x28 800e8c4: f003 0302 and.w r3, r3, #2 800e8c8: 2b00 cmp r3, #0 800e8ca: d103 bne.n 800e8d4 { vPortFree( pxTimer ); 800e8cc: 6ab8 ldr r0, [r7, #40] @ 0x28 800e8ce: f000 fbeb bl 800f0a8 no need to free the memory - just mark the timer as "not active". */ pxTimer->ucStatus &= ~tmrSTATUS_IS_ACTIVE; } #endif /* configSUPPORT_DYNAMIC_ALLOCATION */ break; 800e8d2: e00c b.n 800e8ee pxTimer->ucStatus &= ~tmrSTATUS_IS_ACTIVE; 800e8d4: 6abb ldr r3, [r7, #40] @ 0x28 800e8d6: f893 3028 ldrb.w r3, [r3, #40] @ 0x28 800e8da: f023 0301 bic.w r3, r3, #1 800e8de: b2da uxtb r2, r3 800e8e0: 6abb ldr r3, [r7, #40] @ 0x28 800e8e2: f883 2028 strb.w r2, [r3, #40] @ 0x28 break; 800e8e6: e002 b.n 800e8ee default : /* Don't expect to get here. */ break; 800e8e8: bf00 nop 800e8ea: e000 b.n 800e8ee break; 800e8ec: bf00 nop while( xQueueReceive( xTimerQueue, &xMessage, tmrNO_DELAY ) != pdFAIL ) /*lint !e603 xMessage does not have to be initialised as it is passed out, not in, and it is not used unless xQueueReceive() returns pdTRUE. */ 800e8ee: 4b08 ldr r3, [pc, #32] @ (800e910 ) 800e8f0: 681b ldr r3, [r3, #0] 800e8f2: 1d39 adds r1, r7, #4 800e8f4: 2200 movs r2, #0 800e8f6: 4618 mov r0, r3 800e8f8: f7fe f908 bl 800cb0c 800e8fc: 4603 mov r3, r0 800e8fe: 2b00 cmp r3, #0 800e900: f47f af26 bne.w 800e750 } } } } 800e904: bf00 nop 800e906: bf00 nop 800e908: 3730 adds r7, #48 @ 0x30 800e90a: 46bd mov sp, r7 800e90c: bd80 pop {r7, pc} 800e90e: bf00 nop 800e910: 20002888 .word 0x20002888 0800e914 : /*-----------------------------------------------------------*/ static void prvSwitchTimerLists( void ) { 800e914: b580 push {r7, lr} 800e916: b088 sub sp, #32 800e918: af02 add r7, sp, #8 /* The tick count has overflowed. The timer lists must be switched. If there are any timers still referenced from the current timer list then they must have expired and should be processed before the lists are switched. */ while( listLIST_IS_EMPTY( pxCurrentTimerList ) == pdFALSE ) 800e91a: e049 b.n 800e9b0 { xNextExpireTime = listGET_ITEM_VALUE_OF_HEAD_ENTRY( pxCurrentTimerList ); 800e91c: 4b2e ldr r3, [pc, #184] @ (800e9d8 ) 800e91e: 681b ldr r3, [r3, #0] 800e920: 68db ldr r3, [r3, #12] 800e922: 681b ldr r3, [r3, #0] 800e924: 613b str r3, [r7, #16] /* Remove the timer from the list. */ pxTimer = ( Timer_t * ) listGET_OWNER_OF_HEAD_ENTRY( pxCurrentTimerList ); /*lint !e9087 !e9079 void * is used as this macro is used with tasks and co-routines too. Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */ 800e926: 4b2c ldr r3, [pc, #176] @ (800e9d8 ) 800e928: 681b ldr r3, [r3, #0] 800e92a: 68db ldr r3, [r3, #12] 800e92c: 68db ldr r3, [r3, #12] 800e92e: 60fb str r3, [r7, #12] ( void ) uxListRemove( &( pxTimer->xTimerListItem ) ); 800e930: 68fb ldr r3, [r7, #12] 800e932: 3304 adds r3, #4 800e934: 4618 mov r0, r3 800e936: f7fd fd49 bl 800c3cc traceTIMER_EXPIRED( pxTimer ); /* Execute its callback, then send a command to restart the timer if it is an auto-reload timer. It cannot be restarted here as the lists have not yet been switched. */ pxTimer->pxCallbackFunction( ( TimerHandle_t ) pxTimer ); 800e93a: 68fb ldr r3, [r7, #12] 800e93c: 6a1b ldr r3, [r3, #32] 800e93e: 68f8 ldr r0, [r7, #12] 800e940: 4798 blx r3 if( ( pxTimer->ucStatus & tmrSTATUS_IS_AUTORELOAD ) != 0 ) 800e942: 68fb ldr r3, [r7, #12] 800e944: f893 3028 ldrb.w r3, [r3, #40] @ 0x28 800e948: f003 0304 and.w r3, r3, #4 800e94c: 2b00 cmp r3, #0 800e94e: d02f beq.n 800e9b0 the timer going into the same timer list then it has already expired and the timer should be re-inserted into the current list so it is processed again within this loop. Otherwise a command should be sent to restart the timer to ensure it is only inserted into a list after the lists have been swapped. */ xReloadTime = ( xNextExpireTime + pxTimer->xTimerPeriodInTicks ); 800e950: 68fb ldr r3, [r7, #12] 800e952: 699b ldr r3, [r3, #24] 800e954: 693a ldr r2, [r7, #16] 800e956: 4413 add r3, r2 800e958: 60bb str r3, [r7, #8] if( xReloadTime > xNextExpireTime ) 800e95a: 68ba ldr r2, [r7, #8] 800e95c: 693b ldr r3, [r7, #16] 800e95e: 429a cmp r2, r3 800e960: d90e bls.n 800e980 { listSET_LIST_ITEM_VALUE( &( pxTimer->xTimerListItem ), xReloadTime ); 800e962: 68fb ldr r3, [r7, #12] 800e964: 68ba ldr r2, [r7, #8] 800e966: 605a str r2, [r3, #4] listSET_LIST_ITEM_OWNER( &( pxTimer->xTimerListItem ), pxTimer ); 800e968: 68fb ldr r3, [r7, #12] 800e96a: 68fa ldr r2, [r7, #12] 800e96c: 611a str r2, [r3, #16] vListInsert( pxCurrentTimerList, &( pxTimer->xTimerListItem ) ); 800e96e: 4b1a ldr r3, [pc, #104] @ (800e9d8 ) 800e970: 681a ldr r2, [r3, #0] 800e972: 68fb ldr r3, [r7, #12] 800e974: 3304 adds r3, #4 800e976: 4619 mov r1, r3 800e978: 4610 mov r0, r2 800e97a: f7fd fcee bl 800c35a 800e97e: e017 b.n 800e9b0 } else { xResult = xTimerGenericCommand( pxTimer, tmrCOMMAND_START_DONT_TRACE, xNextExpireTime, NULL, tmrNO_DELAY ); 800e980: 2300 movs r3, #0 800e982: 9300 str r3, [sp, #0] 800e984: 2300 movs r3, #0 800e986: 693a ldr r2, [r7, #16] 800e988: 2100 movs r1, #0 800e98a: 68f8 ldr r0, [r7, #12] 800e98c: f7ff fd58 bl 800e440 800e990: 6078 str r0, [r7, #4] configASSERT( xResult ); 800e992: 687b ldr r3, [r7, #4] 800e994: 2b00 cmp r3, #0 800e996: d10b bne.n 800e9b0 __asm volatile 800e998: f04f 0350 mov.w r3, #80 @ 0x50 800e99c: f383 8811 msr BASEPRI, r3 800e9a0: f3bf 8f6f isb sy 800e9a4: f3bf 8f4f dsb sy 800e9a8: 603b str r3, [r7, #0] } 800e9aa: bf00 nop 800e9ac: bf00 nop 800e9ae: e7fd b.n 800e9ac while( listLIST_IS_EMPTY( pxCurrentTimerList ) == pdFALSE ) 800e9b0: 4b09 ldr r3, [pc, #36] @ (800e9d8 ) 800e9b2: 681b ldr r3, [r3, #0] 800e9b4: 681b ldr r3, [r3, #0] 800e9b6: 2b00 cmp r3, #0 800e9b8: d1b0 bne.n 800e91c { mtCOVERAGE_TEST_MARKER(); } } pxTemp = pxCurrentTimerList; 800e9ba: 4b07 ldr r3, [pc, #28] @ (800e9d8 ) 800e9bc: 681b ldr r3, [r3, #0] 800e9be: 617b str r3, [r7, #20] pxCurrentTimerList = pxOverflowTimerList; 800e9c0: 4b06 ldr r3, [pc, #24] @ (800e9dc ) 800e9c2: 681b ldr r3, [r3, #0] 800e9c4: 4a04 ldr r2, [pc, #16] @ (800e9d8 ) 800e9c6: 6013 str r3, [r2, #0] pxOverflowTimerList = pxTemp; 800e9c8: 4a04 ldr r2, [pc, #16] @ (800e9dc ) 800e9ca: 697b ldr r3, [r7, #20] 800e9cc: 6013 str r3, [r2, #0] } 800e9ce: bf00 nop 800e9d0: 3718 adds r7, #24 800e9d2: 46bd mov sp, r7 800e9d4: bd80 pop {r7, pc} 800e9d6: bf00 nop 800e9d8: 20002880 .word 0x20002880 800e9dc: 20002884 .word 0x20002884 0800e9e0 : /*-----------------------------------------------------------*/ static void prvCheckForValidListAndQueue( void ) { 800e9e0: b580 push {r7, lr} 800e9e2: b082 sub sp, #8 800e9e4: af02 add r7, sp, #8 /* Check that the list from which active timers are referenced, and the queue used to communicate with the timer service, have been initialised. */ taskENTER_CRITICAL(); 800e9e6: f000 f96f bl 800ecc8 { if( xTimerQueue == NULL ) 800e9ea: 4b15 ldr r3, [pc, #84] @ (800ea40 ) 800e9ec: 681b ldr r3, [r3, #0] 800e9ee: 2b00 cmp r3, #0 800e9f0: d120 bne.n 800ea34 { vListInitialise( &xActiveTimerList1 ); 800e9f2: 4814 ldr r0, [pc, #80] @ (800ea44 ) 800e9f4: f7fd fc60 bl 800c2b8 vListInitialise( &xActiveTimerList2 ); 800e9f8: 4813 ldr r0, [pc, #76] @ (800ea48 ) 800e9fa: f7fd fc5d bl 800c2b8 pxCurrentTimerList = &xActiveTimerList1; 800e9fe: 4b13 ldr r3, [pc, #76] @ (800ea4c ) 800ea00: 4a10 ldr r2, [pc, #64] @ (800ea44 ) 800ea02: 601a str r2, [r3, #0] pxOverflowTimerList = &xActiveTimerList2; 800ea04: 4b12 ldr r3, [pc, #72] @ (800ea50 ) 800ea06: 4a10 ldr r2, [pc, #64] @ (800ea48 ) 800ea08: 601a str r2, [r3, #0] /* The timer queue is allocated statically in case configSUPPORT_DYNAMIC_ALLOCATION is 0. */ static StaticQueue_t xStaticTimerQueue; /*lint !e956 Ok to declare in this manner to prevent additional conditional compilation guards in other locations. */ static uint8_t ucStaticTimerQueueStorage[ ( size_t ) configTIMER_QUEUE_LENGTH * sizeof( DaemonTaskMessage_t ) ]; /*lint !e956 Ok to declare in this manner to prevent additional conditional compilation guards in other locations. */ xTimerQueue = xQueueCreateStatic( ( UBaseType_t ) configTIMER_QUEUE_LENGTH, ( UBaseType_t ) sizeof( DaemonTaskMessage_t ), &( ucStaticTimerQueueStorage[ 0 ] ), &xStaticTimerQueue ); 800ea0a: 2300 movs r3, #0 800ea0c: 9300 str r3, [sp, #0] 800ea0e: 4b11 ldr r3, [pc, #68] @ (800ea54 ) 800ea10: 4a11 ldr r2, [pc, #68] @ (800ea58 ) 800ea12: 2110 movs r1, #16 800ea14: 200a movs r0, #10 800ea16: f7fd fd6d bl 800c4f4 800ea1a: 4603 mov r3, r0 800ea1c: 4a08 ldr r2, [pc, #32] @ (800ea40 ) 800ea1e: 6013 str r3, [r2, #0] } #endif #if ( configQUEUE_REGISTRY_SIZE > 0 ) { if( xTimerQueue != NULL ) 800ea20: 4b07 ldr r3, [pc, #28] @ (800ea40 ) 800ea22: 681b ldr r3, [r3, #0] 800ea24: 2b00 cmp r3, #0 800ea26: d005 beq.n 800ea34 { vQueueAddToRegistry( xTimerQueue, "TmrQ" ); 800ea28: 4b05 ldr r3, [pc, #20] @ (800ea40 ) 800ea2a: 681b ldr r3, [r3, #0] 800ea2c: 490b ldr r1, [pc, #44] @ (800ea5c ) 800ea2e: 4618 mov r0, r3 800ea30: f7fe fb86 bl 800d140 else { mtCOVERAGE_TEST_MARKER(); } } taskEXIT_CRITICAL(); 800ea34: f000 f97a bl 800ed2c } 800ea38: bf00 nop 800ea3a: 46bd mov sp, r7 800ea3c: bd80 pop {r7, pc} 800ea3e: bf00 nop 800ea40: 20002888 .word 0x20002888 800ea44: 20002858 .word 0x20002858 800ea48: 2000286c .word 0x2000286c 800ea4c: 20002880 .word 0x20002880 800ea50: 20002884 .word 0x20002884 800ea54: 20002934 .word 0x20002934 800ea58: 20002894 .word 0x20002894 800ea5c: 08014ea8 .word 0x08014ea8 0800ea60 : /* * See header file for description. */ StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters ) { 800ea60: b480 push {r7} 800ea62: b085 sub sp, #20 800ea64: af00 add r7, sp, #0 800ea66: 60f8 str r0, [r7, #12] 800ea68: 60b9 str r1, [r7, #8] 800ea6a: 607a str r2, [r7, #4] /* Simulate the stack frame as it would be created by a context switch interrupt. */ /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts, and to ensure alignment. */ pxTopOfStack--; 800ea6c: 68fb ldr r3, [r7, #12] 800ea6e: 3b04 subs r3, #4 800ea70: 60fb str r3, [r7, #12] *pxTopOfStack = portINITIAL_XPSR; /* xPSR */ 800ea72: 68fb ldr r3, [r7, #12] 800ea74: f04f 7280 mov.w r2, #16777216 @ 0x1000000 800ea78: 601a str r2, [r3, #0] pxTopOfStack--; 800ea7a: 68fb ldr r3, [r7, #12] 800ea7c: 3b04 subs r3, #4 800ea7e: 60fb str r3, [r7, #12] *pxTopOfStack = ( ( StackType_t ) pxCode ) & portSTART_ADDRESS_MASK; /* PC */ 800ea80: 68bb ldr r3, [r7, #8] 800ea82: f023 0201 bic.w r2, r3, #1 800ea86: 68fb ldr r3, [r7, #12] 800ea88: 601a str r2, [r3, #0] pxTopOfStack--; 800ea8a: 68fb ldr r3, [r7, #12] 800ea8c: 3b04 subs r3, #4 800ea8e: 60fb str r3, [r7, #12] *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR */ 800ea90: 4a0c ldr r2, [pc, #48] @ (800eac4 ) 800ea92: 68fb ldr r3, [r7, #12] 800ea94: 601a str r2, [r3, #0] /* Save code space by skipping register initialisation. */ pxTopOfStack -= 5; /* R12, R3, R2 and R1. */ 800ea96: 68fb ldr r3, [r7, #12] 800ea98: 3b14 subs r3, #20 800ea9a: 60fb str r3, [r7, #12] *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */ 800ea9c: 687a ldr r2, [r7, #4] 800ea9e: 68fb ldr r3, [r7, #12] 800eaa0: 601a str r2, [r3, #0] /* A save method is being used that requires each task to maintain its own exec return value. */ pxTopOfStack--; 800eaa2: 68fb ldr r3, [r7, #12] 800eaa4: 3b04 subs r3, #4 800eaa6: 60fb str r3, [r7, #12] *pxTopOfStack = portINITIAL_EXC_RETURN; 800eaa8: 68fb ldr r3, [r7, #12] 800eaaa: f06f 0202 mvn.w r2, #2 800eaae: 601a str r2, [r3, #0] pxTopOfStack -= 8; /* R11, R10, R9, R8, R7, R6, R5 and R4. */ 800eab0: 68fb ldr r3, [r7, #12] 800eab2: 3b20 subs r3, #32 800eab4: 60fb str r3, [r7, #12] return pxTopOfStack; 800eab6: 68fb ldr r3, [r7, #12] } 800eab8: 4618 mov r0, r3 800eaba: 3714 adds r7, #20 800eabc: 46bd mov sp, r7 800eabe: f85d 7b04 ldr.w r7, [sp], #4 800eac2: 4770 bx lr 800eac4: 0800eac9 .word 0x0800eac9 0800eac8 : /*-----------------------------------------------------------*/ static void prvTaskExitError( void ) { 800eac8: b480 push {r7} 800eaca: b085 sub sp, #20 800eacc: af00 add r7, sp, #0 volatile uint32_t ulDummy = 0; 800eace: 2300 movs r3, #0 800ead0: 607b str r3, [r7, #4] its caller as there is nothing to return to. If a task wants to exit it should instead call vTaskDelete( NULL ). Artificially force an assert() to be triggered if configASSERT() is defined, then stop here so application writers can catch the error. */ configASSERT( uxCriticalNesting == ~0UL ); 800ead2: 4b13 ldr r3, [pc, #76] @ (800eb20 ) 800ead4: 681b ldr r3, [r3, #0] 800ead6: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff 800eada: d00b beq.n 800eaf4 __asm volatile 800eadc: f04f 0350 mov.w r3, #80 @ 0x50 800eae0: f383 8811 msr BASEPRI, r3 800eae4: f3bf 8f6f isb sy 800eae8: f3bf 8f4f dsb sy 800eaec: 60fb str r3, [r7, #12] } 800eaee: bf00 nop 800eaf0: bf00 nop 800eaf2: e7fd b.n 800eaf0 __asm volatile 800eaf4: f04f 0350 mov.w r3, #80 @ 0x50 800eaf8: f383 8811 msr BASEPRI, r3 800eafc: f3bf 8f6f isb sy 800eb00: f3bf 8f4f dsb sy 800eb04: 60bb str r3, [r7, #8] } 800eb06: bf00 nop portDISABLE_INTERRUPTS(); while( ulDummy == 0 ) 800eb08: bf00 nop 800eb0a: 687b ldr r3, [r7, #4] 800eb0c: 2b00 cmp r3, #0 800eb0e: d0fc beq.n 800eb0a about code appearing after this function is called - making ulDummy volatile makes the compiler think the function could return and therefore not output an 'unreachable code' warning for code that appears after it. */ } } 800eb10: bf00 nop 800eb12: bf00 nop 800eb14: 3714 adds r7, #20 800eb16: 46bd mov sp, r7 800eb18: f85d 7b04 ldr.w r7, [sp], #4 800eb1c: 4770 bx lr 800eb1e: bf00 nop 800eb20: 200000d0 .word 0x200000d0 ... 0800eb30 : /*-----------------------------------------------------------*/ void vPortSVCHandler( void ) { __asm volatile ( 800eb30: 4b07 ldr r3, [pc, #28] @ (800eb50 ) 800eb32: 6819 ldr r1, [r3, #0] 800eb34: 6808 ldr r0, [r1, #0] 800eb36: e8b0 4ff0 ldmia.w r0!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 800eb3a: f380 8809 msr PSP, r0 800eb3e: f3bf 8f6f isb sy 800eb42: f04f 0000 mov.w r0, #0 800eb46: f380 8811 msr BASEPRI, r0 800eb4a: 4770 bx lr 800eb4c: f3af 8000 nop.w 0800eb50 : 800eb50: 20002358 .word 0x20002358 " bx r14 \n" " \n" " .align 4 \n" "pxCurrentTCBConst2: .word pxCurrentTCB \n" ); } 800eb54: bf00 nop 800eb56: bf00 nop 0800eb58 : { /* Start the first task. This also clears the bit that indicates the FPU is in use in case the FPU was used before the scheduler was started - which would otherwise result in the unnecessary leaving of space in the SVC stack for lazy saving of FPU registers. */ __asm volatile( 800eb58: 4808 ldr r0, [pc, #32] @ (800eb7c ) 800eb5a: 6800 ldr r0, [r0, #0] 800eb5c: 6800 ldr r0, [r0, #0] 800eb5e: f380 8808 msr MSP, r0 800eb62: f04f 0000 mov.w r0, #0 800eb66: f380 8814 msr CONTROL, r0 800eb6a: b662 cpsie i 800eb6c: b661 cpsie f 800eb6e: f3bf 8f4f dsb sy 800eb72: f3bf 8f6f isb sy 800eb76: df00 svc 0 800eb78: bf00 nop " dsb \n" " isb \n" " svc 0 \n" /* System call to start first task. */ " nop \n" ); } 800eb7a: bf00 nop 800eb7c: e000ed08 .word 0xe000ed08 0800eb80 : /* * See header file for description. */ BaseType_t xPortStartScheduler( void ) { 800eb80: b580 push {r7, lr} 800eb82: b086 sub sp, #24 800eb84: af00 add r7, sp, #0 configASSERT( configMAX_SYSCALL_INTERRUPT_PRIORITY ); /* This port can be used on all revisions of the Cortex-M7 core other than the r0p1 parts. r0p1 parts should use the port from the /source/portable/GCC/ARM_CM7/r0p1 directory. */ configASSERT( portCPUID != portCORTEX_M7_r0p1_ID ); 800eb86: 4b47 ldr r3, [pc, #284] @ (800eca4 ) 800eb88: 681b ldr r3, [r3, #0] 800eb8a: 4a47 ldr r2, [pc, #284] @ (800eca8 ) 800eb8c: 4293 cmp r3, r2 800eb8e: d10b bne.n 800eba8 __asm volatile 800eb90: f04f 0350 mov.w r3, #80 @ 0x50 800eb94: f383 8811 msr BASEPRI, r3 800eb98: f3bf 8f6f isb sy 800eb9c: f3bf 8f4f dsb sy 800eba0: 60fb str r3, [r7, #12] } 800eba2: bf00 nop 800eba4: bf00 nop 800eba6: e7fd b.n 800eba4 configASSERT( portCPUID != portCORTEX_M7_r0p0_ID ); 800eba8: 4b3e ldr r3, [pc, #248] @ (800eca4 ) 800ebaa: 681b ldr r3, [r3, #0] 800ebac: 4a3f ldr r2, [pc, #252] @ (800ecac ) 800ebae: 4293 cmp r3, r2 800ebb0: d10b bne.n 800ebca __asm volatile 800ebb2: f04f 0350 mov.w r3, #80 @ 0x50 800ebb6: f383 8811 msr BASEPRI, r3 800ebba: f3bf 8f6f isb sy 800ebbe: f3bf 8f4f dsb sy 800ebc2: 613b str r3, [r7, #16] } 800ebc4: bf00 nop 800ebc6: bf00 nop 800ebc8: e7fd b.n 800ebc6 #if( configASSERT_DEFINED == 1 ) { volatile uint32_t ulOriginalPriority; volatile uint8_t * const pucFirstUserPriorityRegister = ( volatile uint8_t * const ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER ); 800ebca: 4b39 ldr r3, [pc, #228] @ (800ecb0 ) 800ebcc: 617b str r3, [r7, #20] functions can be called. ISR safe functions are those that end in "FromISR". FreeRTOS maintains separate thread and ISR API functions to ensure interrupt entry is as fast and simple as possible. Save the interrupt priority value that is about to be clobbered. */ ulOriginalPriority = *pucFirstUserPriorityRegister; 800ebce: 697b ldr r3, [r7, #20] 800ebd0: 781b ldrb r3, [r3, #0] 800ebd2: b2db uxtb r3, r3 800ebd4: 607b str r3, [r7, #4] /* Determine the number of priority bits available. First write to all possible bits. */ *pucFirstUserPriorityRegister = portMAX_8_BIT_VALUE; 800ebd6: 697b ldr r3, [r7, #20] 800ebd8: 22ff movs r2, #255 @ 0xff 800ebda: 701a strb r2, [r3, #0] /* Read the value back to see how many bits stuck. */ ucMaxPriorityValue = *pucFirstUserPriorityRegister; 800ebdc: 697b ldr r3, [r7, #20] 800ebde: 781b ldrb r3, [r3, #0] 800ebe0: b2db uxtb r3, r3 800ebe2: 70fb strb r3, [r7, #3] /* Use the same mask on the maximum system call priority. */ ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue; 800ebe4: 78fb ldrb r3, [r7, #3] 800ebe6: b2db uxtb r3, r3 800ebe8: f003 0350 and.w r3, r3, #80 @ 0x50 800ebec: b2da uxtb r2, r3 800ebee: 4b31 ldr r3, [pc, #196] @ (800ecb4 ) 800ebf0: 701a strb r2, [r3, #0] /* Calculate the maximum acceptable priority group value for the number of bits read back. */ ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS; 800ebf2: 4b31 ldr r3, [pc, #196] @ (800ecb8 ) 800ebf4: 2207 movs r2, #7 800ebf6: 601a str r2, [r3, #0] while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE ) 800ebf8: e009 b.n 800ec0e { ulMaxPRIGROUPValue--; 800ebfa: 4b2f ldr r3, [pc, #188] @ (800ecb8 ) 800ebfc: 681b ldr r3, [r3, #0] 800ebfe: 3b01 subs r3, #1 800ec00: 4a2d ldr r2, [pc, #180] @ (800ecb8 ) 800ec02: 6013 str r3, [r2, #0] ucMaxPriorityValue <<= ( uint8_t ) 0x01; 800ec04: 78fb ldrb r3, [r7, #3] 800ec06: b2db uxtb r3, r3 800ec08: 005b lsls r3, r3, #1 800ec0a: b2db uxtb r3, r3 800ec0c: 70fb strb r3, [r7, #3] while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE ) 800ec0e: 78fb ldrb r3, [r7, #3] 800ec10: b2db uxtb r3, r3 800ec12: f003 0380 and.w r3, r3, #128 @ 0x80 800ec16: 2b80 cmp r3, #128 @ 0x80 800ec18: d0ef beq.n 800ebfa #ifdef configPRIO_BITS { /* Check the FreeRTOS configuration that defines the number of priority bits matches the number of priority bits actually queried from the hardware. */ configASSERT( ( portMAX_PRIGROUP_BITS - ulMaxPRIGROUPValue ) == configPRIO_BITS ); 800ec1a: 4b27 ldr r3, [pc, #156] @ (800ecb8 ) 800ec1c: 681b ldr r3, [r3, #0] 800ec1e: f1c3 0307 rsb r3, r3, #7 800ec22: 2b04 cmp r3, #4 800ec24: d00b beq.n 800ec3e __asm volatile 800ec26: f04f 0350 mov.w r3, #80 @ 0x50 800ec2a: f383 8811 msr BASEPRI, r3 800ec2e: f3bf 8f6f isb sy 800ec32: f3bf 8f4f dsb sy 800ec36: 60bb str r3, [r7, #8] } 800ec38: bf00 nop 800ec3a: bf00 nop 800ec3c: e7fd b.n 800ec3a } #endif /* Shift the priority group value back to its position within the AIRCR register. */ ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT; 800ec3e: 4b1e ldr r3, [pc, #120] @ (800ecb8 ) 800ec40: 681b ldr r3, [r3, #0] 800ec42: 021b lsls r3, r3, #8 800ec44: 4a1c ldr r2, [pc, #112] @ (800ecb8 ) 800ec46: 6013 str r3, [r2, #0] ulMaxPRIGROUPValue &= portPRIORITY_GROUP_MASK; 800ec48: 4b1b ldr r3, [pc, #108] @ (800ecb8 ) 800ec4a: 681b ldr r3, [r3, #0] 800ec4c: f403 63e0 and.w r3, r3, #1792 @ 0x700 800ec50: 4a19 ldr r2, [pc, #100] @ (800ecb8 ) 800ec52: 6013 str r3, [r2, #0] /* Restore the clobbered interrupt priority register to its original value. */ *pucFirstUserPriorityRegister = ulOriginalPriority; 800ec54: 687b ldr r3, [r7, #4] 800ec56: b2da uxtb r2, r3 800ec58: 697b ldr r3, [r7, #20] 800ec5a: 701a strb r2, [r3, #0] } #endif /* conifgASSERT_DEFINED */ /* Make PendSV and SysTick the lowest priority interrupts. */ portNVIC_SYSPRI2_REG |= portNVIC_PENDSV_PRI; 800ec5c: 4b17 ldr r3, [pc, #92] @ (800ecbc ) 800ec5e: 681b ldr r3, [r3, #0] 800ec60: 4a16 ldr r2, [pc, #88] @ (800ecbc ) 800ec62: f443 0370 orr.w r3, r3, #15728640 @ 0xf00000 800ec66: 6013 str r3, [r2, #0] portNVIC_SYSPRI2_REG |= portNVIC_SYSTICK_PRI; 800ec68: 4b14 ldr r3, [pc, #80] @ (800ecbc ) 800ec6a: 681b ldr r3, [r3, #0] 800ec6c: 4a13 ldr r2, [pc, #76] @ (800ecbc ) 800ec6e: f043 4370 orr.w r3, r3, #4026531840 @ 0xf0000000 800ec72: 6013 str r3, [r2, #0] /* Start the timer that generates the tick ISR. Interrupts are disabled here already. */ vPortSetupTimerInterrupt(); 800ec74: f000 f8da bl 800ee2c /* Initialise the critical nesting count ready for the first task. */ uxCriticalNesting = 0; 800ec78: 4b11 ldr r3, [pc, #68] @ (800ecc0 ) 800ec7a: 2200 movs r2, #0 800ec7c: 601a str r2, [r3, #0] /* Ensure the VFP is enabled - it should be anyway. */ vPortEnableVFP(); 800ec7e: f000 f8f9 bl 800ee74 /* Lazy save always. */ *( portFPCCR ) |= portASPEN_AND_LSPEN_BITS; 800ec82: 4b10 ldr r3, [pc, #64] @ (800ecc4 ) 800ec84: 681b ldr r3, [r3, #0] 800ec86: 4a0f ldr r2, [pc, #60] @ (800ecc4 ) 800ec88: f043 4340 orr.w r3, r3, #3221225472 @ 0xc0000000 800ec8c: 6013 str r3, [r2, #0] /* Start the first task. */ prvPortStartFirstTask(); 800ec8e: f7ff ff63 bl 800eb58 exit error function to prevent compiler warnings about a static function not being called in the case that the application writer overrides this functionality by defining configTASK_RETURN_ADDRESS. Call vTaskSwitchContext() so link time optimisation does not remove the symbol. */ vTaskSwitchContext(); 800ec92: f7fe fe37 bl 800d904 prvTaskExitError(); 800ec96: f7ff ff17 bl 800eac8 /* Should not get here! */ return 0; 800ec9a: 2300 movs r3, #0 } 800ec9c: 4618 mov r0, r3 800ec9e: 3718 adds r7, #24 800eca0: 46bd mov sp, r7 800eca2: bd80 pop {r7, pc} 800eca4: e000ed00 .word 0xe000ed00 800eca8: 410fc271 .word 0x410fc271 800ecac: 410fc270 .word 0x410fc270 800ecb0: e000e400 .word 0xe000e400 800ecb4: 20002984 .word 0x20002984 800ecb8: 20002988 .word 0x20002988 800ecbc: e000ed20 .word 0xe000ed20 800ecc0: 200000d0 .word 0x200000d0 800ecc4: e000ef34 .word 0xe000ef34 0800ecc8 : configASSERT( uxCriticalNesting == 1000UL ); } /*-----------------------------------------------------------*/ void vPortEnterCritical( void ) { 800ecc8: b480 push {r7} 800ecca: b083 sub sp, #12 800eccc: af00 add r7, sp, #0 __asm volatile 800ecce: f04f 0350 mov.w r3, #80 @ 0x50 800ecd2: f383 8811 msr BASEPRI, r3 800ecd6: f3bf 8f6f isb sy 800ecda: f3bf 8f4f dsb sy 800ecde: 607b str r3, [r7, #4] } 800ece0: bf00 nop portDISABLE_INTERRUPTS(); uxCriticalNesting++; 800ece2: 4b10 ldr r3, [pc, #64] @ (800ed24 ) 800ece4: 681b ldr r3, [r3, #0] 800ece6: 3301 adds r3, #1 800ece8: 4a0e ldr r2, [pc, #56] @ (800ed24 ) 800ecea: 6013 str r3, [r2, #0] /* This is not the interrupt safe version of the enter critical function so assert() if it is being called from an interrupt context. Only API functions that end in "FromISR" can be used in an interrupt. Only assert if the critical nesting count is 1 to protect against recursive calls if the assert function also uses a critical section. */ if( uxCriticalNesting == 1 ) 800ecec: 4b0d ldr r3, [pc, #52] @ (800ed24 ) 800ecee: 681b ldr r3, [r3, #0] 800ecf0: 2b01 cmp r3, #1 800ecf2: d110 bne.n 800ed16 { configASSERT( ( portNVIC_INT_CTRL_REG & portVECTACTIVE_MASK ) == 0 ); 800ecf4: 4b0c ldr r3, [pc, #48] @ (800ed28 ) 800ecf6: 681b ldr r3, [r3, #0] 800ecf8: b2db uxtb r3, r3 800ecfa: 2b00 cmp r3, #0 800ecfc: d00b beq.n 800ed16 __asm volatile 800ecfe: f04f 0350 mov.w r3, #80 @ 0x50 800ed02: f383 8811 msr BASEPRI, r3 800ed06: f3bf 8f6f isb sy 800ed0a: f3bf 8f4f dsb sy 800ed0e: 603b str r3, [r7, #0] } 800ed10: bf00 nop 800ed12: bf00 nop 800ed14: e7fd b.n 800ed12 } } 800ed16: bf00 nop 800ed18: 370c adds r7, #12 800ed1a: 46bd mov sp, r7 800ed1c: f85d 7b04 ldr.w r7, [sp], #4 800ed20: 4770 bx lr 800ed22: bf00 nop 800ed24: 200000d0 .word 0x200000d0 800ed28: e000ed04 .word 0xe000ed04 0800ed2c : /*-----------------------------------------------------------*/ void vPortExitCritical( void ) { 800ed2c: b480 push {r7} 800ed2e: b083 sub sp, #12 800ed30: af00 add r7, sp, #0 configASSERT( uxCriticalNesting ); 800ed32: 4b12 ldr r3, [pc, #72] @ (800ed7c ) 800ed34: 681b ldr r3, [r3, #0] 800ed36: 2b00 cmp r3, #0 800ed38: d10b bne.n 800ed52 __asm volatile 800ed3a: f04f 0350 mov.w r3, #80 @ 0x50 800ed3e: f383 8811 msr BASEPRI, r3 800ed42: f3bf 8f6f isb sy 800ed46: f3bf 8f4f dsb sy 800ed4a: 607b str r3, [r7, #4] } 800ed4c: bf00 nop 800ed4e: bf00 nop 800ed50: e7fd b.n 800ed4e uxCriticalNesting--; 800ed52: 4b0a ldr r3, [pc, #40] @ (800ed7c ) 800ed54: 681b ldr r3, [r3, #0] 800ed56: 3b01 subs r3, #1 800ed58: 4a08 ldr r2, [pc, #32] @ (800ed7c ) 800ed5a: 6013 str r3, [r2, #0] if( uxCriticalNesting == 0 ) 800ed5c: 4b07 ldr r3, [pc, #28] @ (800ed7c ) 800ed5e: 681b ldr r3, [r3, #0] 800ed60: 2b00 cmp r3, #0 800ed62: d105 bne.n 800ed70 800ed64: 2300 movs r3, #0 800ed66: 603b str r3, [r7, #0] __asm volatile 800ed68: 683b ldr r3, [r7, #0] 800ed6a: f383 8811 msr BASEPRI, r3 } 800ed6e: bf00 nop { portENABLE_INTERRUPTS(); } } 800ed70: bf00 nop 800ed72: 370c adds r7, #12 800ed74: 46bd mov sp, r7 800ed76: f85d 7b04 ldr.w r7, [sp], #4 800ed7a: 4770 bx lr 800ed7c: 200000d0 .word 0x200000d0 0800ed80 : void xPortPendSVHandler( void ) { /* This is a naked function. */ __asm volatile 800ed80: f3ef 8009 mrs r0, PSP 800ed84: f3bf 8f6f isb sy 800ed88: 4b15 ldr r3, [pc, #84] @ (800ede0 ) 800ed8a: 681a ldr r2, [r3, #0] 800ed8c: f01e 0f10 tst.w lr, #16 800ed90: bf08 it eq 800ed92: ed20 8a10 vstmdbeq r0!, {s16-s31} 800ed96: e920 4ff0 stmdb r0!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 800ed9a: 6010 str r0, [r2, #0] 800ed9c: e92d 0009 stmdb sp!, {r0, r3} 800eda0: f04f 0050 mov.w r0, #80 @ 0x50 800eda4: f380 8811 msr BASEPRI, r0 800eda8: f3bf 8f4f dsb sy 800edac: f3bf 8f6f isb sy 800edb0: f7fe fda8 bl 800d904 800edb4: f04f 0000 mov.w r0, #0 800edb8: f380 8811 msr BASEPRI, r0 800edbc: bc09 pop {r0, r3} 800edbe: 6819 ldr r1, [r3, #0] 800edc0: 6808 ldr r0, [r1, #0] 800edc2: e8b0 4ff0 ldmia.w r0!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 800edc6: f01e 0f10 tst.w lr, #16 800edca: bf08 it eq 800edcc: ecb0 8a10 vldmiaeq r0!, {s16-s31} 800edd0: f380 8809 msr PSP, r0 800edd4: f3bf 8f6f isb sy 800edd8: 4770 bx lr 800edda: bf00 nop 800eddc: f3af 8000 nop.w 0800ede0 : 800ede0: 20002358 .word 0x20002358 " \n" " .align 4 \n" "pxCurrentTCBConst: .word pxCurrentTCB \n" ::"i"(configMAX_SYSCALL_INTERRUPT_PRIORITY) ); } 800ede4: bf00 nop 800ede6: bf00 nop 0800ede8 : /*-----------------------------------------------------------*/ void xPortSysTickHandler( void ) { 800ede8: b580 push {r7, lr} 800edea: b082 sub sp, #8 800edec: af00 add r7, sp, #0 __asm volatile 800edee: f04f 0350 mov.w r3, #80 @ 0x50 800edf2: f383 8811 msr BASEPRI, r3 800edf6: f3bf 8f6f isb sy 800edfa: f3bf 8f4f dsb sy 800edfe: 607b str r3, [r7, #4] } 800ee00: bf00 nop save and then restore the interrupt mask value as its value is already known. */ portDISABLE_INTERRUPTS(); { /* Increment the RTOS tick. */ if( xTaskIncrementTick() != pdFALSE ) 800ee02: f7fe fcc5 bl 800d790 800ee06: 4603 mov r3, r0 800ee08: 2b00 cmp r3, #0 800ee0a: d003 beq.n 800ee14 { /* A context switch is required. Context switching is performed in the PendSV interrupt. Pend the PendSV interrupt. */ portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; 800ee0c: 4b06 ldr r3, [pc, #24] @ (800ee28 ) 800ee0e: f04f 5280 mov.w r2, #268435456 @ 0x10000000 800ee12: 601a str r2, [r3, #0] 800ee14: 2300 movs r3, #0 800ee16: 603b str r3, [r7, #0] __asm volatile 800ee18: 683b ldr r3, [r7, #0] 800ee1a: f383 8811 msr BASEPRI, r3 } 800ee1e: bf00 nop } } portENABLE_INTERRUPTS(); } 800ee20: bf00 nop 800ee22: 3708 adds r7, #8 800ee24: 46bd mov sp, r7 800ee26: bd80 pop {r7, pc} 800ee28: e000ed04 .word 0xe000ed04 0800ee2c : /* * Setup the systick timer to generate the tick interrupts at the required * frequency. */ __attribute__(( weak )) void vPortSetupTimerInterrupt( void ) { 800ee2c: b480 push {r7} 800ee2e: af00 add r7, sp, #0 ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ ); } #endif /* configUSE_TICKLESS_IDLE */ /* Stop and clear the SysTick. */ portNVIC_SYSTICK_CTRL_REG = 0UL; 800ee30: 4b0b ldr r3, [pc, #44] @ (800ee60 ) 800ee32: 2200 movs r2, #0 800ee34: 601a str r2, [r3, #0] portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL; 800ee36: 4b0b ldr r3, [pc, #44] @ (800ee64 ) 800ee38: 2200 movs r2, #0 800ee3a: 601a str r2, [r3, #0] /* Configure SysTick to interrupt at the requested rate. */ portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL; 800ee3c: 4b0a ldr r3, [pc, #40] @ (800ee68 ) 800ee3e: 681b ldr r3, [r3, #0] 800ee40: 4a0a ldr r2, [pc, #40] @ (800ee6c ) 800ee42: fba2 2303 umull r2, r3, r2, r3 800ee46: 099b lsrs r3, r3, #6 800ee48: 4a09 ldr r2, [pc, #36] @ (800ee70 ) 800ee4a: 3b01 subs r3, #1 800ee4c: 6013 str r3, [r2, #0] portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT ); 800ee4e: 4b04 ldr r3, [pc, #16] @ (800ee60 ) 800ee50: 2207 movs r2, #7 800ee52: 601a str r2, [r3, #0] } 800ee54: bf00 nop 800ee56: 46bd mov sp, r7 800ee58: f85d 7b04 ldr.w r7, [sp], #4 800ee5c: 4770 bx lr 800ee5e: bf00 nop 800ee60: e000e010 .word 0xe000e010 800ee64: e000e018 .word 0xe000e018 800ee68: 200000c4 .word 0x200000c4 800ee6c: 10624dd3 .word 0x10624dd3 800ee70: e000e014 .word 0xe000e014 0800ee74 : /*-----------------------------------------------------------*/ /* This is a naked function. */ static void vPortEnableVFP( void ) { __asm volatile 800ee74: f8df 000c ldr.w r0, [pc, #12] @ 800ee84 800ee78: 6801 ldr r1, [r0, #0] 800ee7a: f441 0170 orr.w r1, r1, #15728640 @ 0xf00000 800ee7e: 6001 str r1, [r0, #0] 800ee80: 4770 bx lr " \n" " orr r1, r1, #( 0xf << 20 ) \n" /* Enable CP10 and CP11 coprocessors, then save back. */ " str r1, [r0] \n" " bx r14 " ); } 800ee82: bf00 nop 800ee84: e000ed88 .word 0xe000ed88 0800ee88 : /*-----------------------------------------------------------*/ #if( configASSERT_DEFINED == 1 ) void vPortValidateInterruptPriority( void ) { 800ee88: b480 push {r7} 800ee8a: b085 sub sp, #20 800ee8c: af00 add r7, sp, #0 uint32_t ulCurrentInterrupt; uint8_t ucCurrentPriority; /* Obtain the number of the currently executing interrupt. */ __asm volatile( "mrs %0, ipsr" : "=r"( ulCurrentInterrupt ) :: "memory" ); 800ee8e: f3ef 8305 mrs r3, IPSR 800ee92: 60fb str r3, [r7, #12] /* Is the interrupt number a user defined interrupt? */ if( ulCurrentInterrupt >= portFIRST_USER_INTERRUPT_NUMBER ) 800ee94: 68fb ldr r3, [r7, #12] 800ee96: 2b0f cmp r3, #15 800ee98: d915 bls.n 800eec6 { /* Look up the interrupt's priority. */ ucCurrentPriority = pcInterruptPriorityRegisters[ ulCurrentInterrupt ]; 800ee9a: 4a18 ldr r2, [pc, #96] @ (800eefc ) 800ee9c: 68fb ldr r3, [r7, #12] 800ee9e: 4413 add r3, r2 800eea0: 781b ldrb r3, [r3, #0] 800eea2: 72fb strb r3, [r7, #11] interrupt entry is as fast and simple as possible. The following links provide detailed information: http://www.freertos.org/RTOS-Cortex-M3-M4.html http://www.freertos.org/FAQHelp.html */ configASSERT( ucCurrentPriority >= ucMaxSysCallPriority ); 800eea4: 4b16 ldr r3, [pc, #88] @ (800ef00 ) 800eea6: 781b ldrb r3, [r3, #0] 800eea8: 7afa ldrb r2, [r7, #11] 800eeaa: 429a cmp r2, r3 800eeac: d20b bcs.n 800eec6 __asm volatile 800eeae: f04f 0350 mov.w r3, #80 @ 0x50 800eeb2: f383 8811 msr BASEPRI, r3 800eeb6: f3bf 8f6f isb sy 800eeba: f3bf 8f4f dsb sy 800eebe: 607b str r3, [r7, #4] } 800eec0: bf00 nop 800eec2: bf00 nop 800eec4: e7fd b.n 800eec2 configuration then the correct setting can be achieved on all Cortex-M devices by calling NVIC_SetPriorityGrouping( 0 ); before starting the scheduler. Note however that some vendor specific peripheral libraries assume a non-zero priority group setting, in which cases using a value of zero will result in unpredictable behaviour. */ configASSERT( ( portAIRCR_REG & portPRIORITY_GROUP_MASK ) <= ulMaxPRIGROUPValue ); 800eec6: 4b0f ldr r3, [pc, #60] @ (800ef04 ) 800eec8: 681b ldr r3, [r3, #0] 800eeca: f403 62e0 and.w r2, r3, #1792 @ 0x700 800eece: 4b0e ldr r3, [pc, #56] @ (800ef08 ) 800eed0: 681b ldr r3, [r3, #0] 800eed2: 429a cmp r2, r3 800eed4: d90b bls.n 800eeee __asm volatile 800eed6: f04f 0350 mov.w r3, #80 @ 0x50 800eeda: f383 8811 msr BASEPRI, r3 800eede: f3bf 8f6f isb sy 800eee2: f3bf 8f4f dsb sy 800eee6: 603b str r3, [r7, #0] } 800eee8: bf00 nop 800eeea: bf00 nop 800eeec: e7fd b.n 800eeea } 800eeee: bf00 nop 800eef0: 3714 adds r7, #20 800eef2: 46bd mov sp, r7 800eef4: f85d 7b04 ldr.w r7, [sp], #4 800eef8: 4770 bx lr 800eefa: bf00 nop 800eefc: e000e3f0 .word 0xe000e3f0 800ef00: 20002984 .word 0x20002984 800ef04: e000ed0c .word 0xe000ed0c 800ef08: 20002988 .word 0x20002988 0800ef0c : static size_t xBlockAllocatedBit = 0; /*-----------------------------------------------------------*/ void *pvPortMalloc( size_t xWantedSize ) { 800ef0c: b580 push {r7, lr} 800ef0e: b08a sub sp, #40 @ 0x28 800ef10: af00 add r7, sp, #0 800ef12: 6078 str r0, [r7, #4] BlockLink_t *pxBlock, *pxPreviousBlock, *pxNewBlockLink; void *pvReturn = NULL; 800ef14: 2300 movs r3, #0 800ef16: 61fb str r3, [r7, #28] vTaskSuspendAll(); 800ef18: f7fe fb7e bl 800d618 { /* If this is the first call to malloc then the heap will require initialisation to setup the list of free blocks. */ if( pxEnd == NULL ) 800ef1c: 4b5c ldr r3, [pc, #368] @ (800f090 ) 800ef1e: 681b ldr r3, [r3, #0] 800ef20: 2b00 cmp r3, #0 800ef22: d101 bne.n 800ef28 { prvHeapInit(); 800ef24: f000 f924 bl 800f170 /* Check the requested block size is not so large that the top bit is set. The top bit of the block size member of the BlockLink_t structure is used to determine who owns the block - the application or the kernel, so it must be free. */ if( ( xWantedSize & xBlockAllocatedBit ) == 0 ) 800ef28: 4b5a ldr r3, [pc, #360] @ (800f094 ) 800ef2a: 681a ldr r2, [r3, #0] 800ef2c: 687b ldr r3, [r7, #4] 800ef2e: 4013 ands r3, r2 800ef30: 2b00 cmp r3, #0 800ef32: f040 8095 bne.w 800f060 { /* The wanted size is increased so it can contain a BlockLink_t structure in addition to the requested amount of bytes. */ if( xWantedSize > 0 ) 800ef36: 687b ldr r3, [r7, #4] 800ef38: 2b00 cmp r3, #0 800ef3a: d01e beq.n 800ef7a { xWantedSize += xHeapStructSize; 800ef3c: 2208 movs r2, #8 800ef3e: 687b ldr r3, [r7, #4] 800ef40: 4413 add r3, r2 800ef42: 607b str r3, [r7, #4] /* Ensure that blocks are always aligned to the required number of bytes. */ if( ( xWantedSize & portBYTE_ALIGNMENT_MASK ) != 0x00 ) 800ef44: 687b ldr r3, [r7, #4] 800ef46: f003 0307 and.w r3, r3, #7 800ef4a: 2b00 cmp r3, #0 800ef4c: d015 beq.n 800ef7a { /* Byte alignment required. */ xWantedSize += ( portBYTE_ALIGNMENT - ( xWantedSize & portBYTE_ALIGNMENT_MASK ) ); 800ef4e: 687b ldr r3, [r7, #4] 800ef50: f023 0307 bic.w r3, r3, #7 800ef54: 3308 adds r3, #8 800ef56: 607b str r3, [r7, #4] configASSERT( ( xWantedSize & portBYTE_ALIGNMENT_MASK ) == 0 ); 800ef58: 687b ldr r3, [r7, #4] 800ef5a: f003 0307 and.w r3, r3, #7 800ef5e: 2b00 cmp r3, #0 800ef60: d00b beq.n 800ef7a __asm volatile 800ef62: f04f 0350 mov.w r3, #80 @ 0x50 800ef66: f383 8811 msr BASEPRI, r3 800ef6a: f3bf 8f6f isb sy 800ef6e: f3bf 8f4f dsb sy 800ef72: 617b str r3, [r7, #20] } 800ef74: bf00 nop 800ef76: bf00 nop 800ef78: e7fd b.n 800ef76 else { mtCOVERAGE_TEST_MARKER(); } if( ( xWantedSize > 0 ) && ( xWantedSize <= xFreeBytesRemaining ) ) 800ef7a: 687b ldr r3, [r7, #4] 800ef7c: 2b00 cmp r3, #0 800ef7e: d06f beq.n 800f060 800ef80: 4b45 ldr r3, [pc, #276] @ (800f098 ) 800ef82: 681b ldr r3, [r3, #0] 800ef84: 687a ldr r2, [r7, #4] 800ef86: 429a cmp r2, r3 800ef88: d86a bhi.n 800f060 { /* Traverse the list from the start (lowest address) block until one of adequate size is found. */ pxPreviousBlock = &xStart; 800ef8a: 4b44 ldr r3, [pc, #272] @ (800f09c ) 800ef8c: 623b str r3, [r7, #32] pxBlock = xStart.pxNextFreeBlock; 800ef8e: 4b43 ldr r3, [pc, #268] @ (800f09c ) 800ef90: 681b ldr r3, [r3, #0] 800ef92: 627b str r3, [r7, #36] @ 0x24 while( ( pxBlock->xBlockSize < xWantedSize ) && ( pxBlock->pxNextFreeBlock != NULL ) ) 800ef94: e004 b.n 800efa0 { pxPreviousBlock = pxBlock; 800ef96: 6a7b ldr r3, [r7, #36] @ 0x24 800ef98: 623b str r3, [r7, #32] pxBlock = pxBlock->pxNextFreeBlock; 800ef9a: 6a7b ldr r3, [r7, #36] @ 0x24 800ef9c: 681b ldr r3, [r3, #0] 800ef9e: 627b str r3, [r7, #36] @ 0x24 while( ( pxBlock->xBlockSize < xWantedSize ) && ( pxBlock->pxNextFreeBlock != NULL ) ) 800efa0: 6a7b ldr r3, [r7, #36] @ 0x24 800efa2: 685b ldr r3, [r3, #4] 800efa4: 687a ldr r2, [r7, #4] 800efa6: 429a cmp r2, r3 800efa8: d903 bls.n 800efb2 800efaa: 6a7b ldr r3, [r7, #36] @ 0x24 800efac: 681b ldr r3, [r3, #0] 800efae: 2b00 cmp r3, #0 800efb0: d1f1 bne.n 800ef96 } /* If the end marker was reached then a block of adequate size was not found. */ if( pxBlock != pxEnd ) 800efb2: 4b37 ldr r3, [pc, #220] @ (800f090 ) 800efb4: 681b ldr r3, [r3, #0] 800efb6: 6a7a ldr r2, [r7, #36] @ 0x24 800efb8: 429a cmp r2, r3 800efba: d051 beq.n 800f060 { /* Return the memory space pointed to - jumping over the BlockLink_t structure at its start. */ pvReturn = ( void * ) ( ( ( uint8_t * ) pxPreviousBlock->pxNextFreeBlock ) + xHeapStructSize ); 800efbc: 6a3b ldr r3, [r7, #32] 800efbe: 681b ldr r3, [r3, #0] 800efc0: 2208 movs r2, #8 800efc2: 4413 add r3, r2 800efc4: 61fb str r3, [r7, #28] /* This block is being returned for use so must be taken out of the list of free blocks. */ pxPreviousBlock->pxNextFreeBlock = pxBlock->pxNextFreeBlock; 800efc6: 6a7b ldr r3, [r7, #36] @ 0x24 800efc8: 681a ldr r2, [r3, #0] 800efca: 6a3b ldr r3, [r7, #32] 800efcc: 601a str r2, [r3, #0] /* If the block is larger than required it can be split into two. */ if( ( pxBlock->xBlockSize - xWantedSize ) > heapMINIMUM_BLOCK_SIZE ) 800efce: 6a7b ldr r3, [r7, #36] @ 0x24 800efd0: 685a ldr r2, [r3, #4] 800efd2: 687b ldr r3, [r7, #4] 800efd4: 1ad2 subs r2, r2, r3 800efd6: 2308 movs r3, #8 800efd8: 005b lsls r3, r3, #1 800efda: 429a cmp r2, r3 800efdc: d920 bls.n 800f020 { /* This block is to be split into two. Create a new block following the number of bytes requested. The void cast is used to prevent byte alignment warnings from the compiler. */ pxNewBlockLink = ( void * ) ( ( ( uint8_t * ) pxBlock ) + xWantedSize ); 800efde: 6a7a ldr r2, [r7, #36] @ 0x24 800efe0: 687b ldr r3, [r7, #4] 800efe2: 4413 add r3, r2 800efe4: 61bb str r3, [r7, #24] configASSERT( ( ( ( size_t ) pxNewBlockLink ) & portBYTE_ALIGNMENT_MASK ) == 0 ); 800efe6: 69bb ldr r3, [r7, #24] 800efe8: f003 0307 and.w r3, r3, #7 800efec: 2b00 cmp r3, #0 800efee: d00b beq.n 800f008 __asm volatile 800eff0: f04f 0350 mov.w r3, #80 @ 0x50 800eff4: f383 8811 msr BASEPRI, r3 800eff8: f3bf 8f6f isb sy 800effc: f3bf 8f4f dsb sy 800f000: 613b str r3, [r7, #16] } 800f002: bf00 nop 800f004: bf00 nop 800f006: e7fd b.n 800f004 /* Calculate the sizes of two blocks split from the single block. */ pxNewBlockLink->xBlockSize = pxBlock->xBlockSize - xWantedSize; 800f008: 6a7b ldr r3, [r7, #36] @ 0x24 800f00a: 685a ldr r2, [r3, #4] 800f00c: 687b ldr r3, [r7, #4] 800f00e: 1ad2 subs r2, r2, r3 800f010: 69bb ldr r3, [r7, #24] 800f012: 605a str r2, [r3, #4] pxBlock->xBlockSize = xWantedSize; 800f014: 6a7b ldr r3, [r7, #36] @ 0x24 800f016: 687a ldr r2, [r7, #4] 800f018: 605a str r2, [r3, #4] /* Insert the new block into the list of free blocks. */ prvInsertBlockIntoFreeList( pxNewBlockLink ); 800f01a: 69b8 ldr r0, [r7, #24] 800f01c: f000 f90a bl 800f234 else { mtCOVERAGE_TEST_MARKER(); } xFreeBytesRemaining -= pxBlock->xBlockSize; 800f020: 4b1d ldr r3, [pc, #116] @ (800f098 ) 800f022: 681a ldr r2, [r3, #0] 800f024: 6a7b ldr r3, [r7, #36] @ 0x24 800f026: 685b ldr r3, [r3, #4] 800f028: 1ad3 subs r3, r2, r3 800f02a: 4a1b ldr r2, [pc, #108] @ (800f098 ) 800f02c: 6013 str r3, [r2, #0] if( xFreeBytesRemaining < xMinimumEverFreeBytesRemaining ) 800f02e: 4b1a ldr r3, [pc, #104] @ (800f098 ) 800f030: 681a ldr r2, [r3, #0] 800f032: 4b1b ldr r3, [pc, #108] @ (800f0a0 ) 800f034: 681b ldr r3, [r3, #0] 800f036: 429a cmp r2, r3 800f038: d203 bcs.n 800f042 { xMinimumEverFreeBytesRemaining = xFreeBytesRemaining; 800f03a: 4b17 ldr r3, [pc, #92] @ (800f098 ) 800f03c: 681b ldr r3, [r3, #0] 800f03e: 4a18 ldr r2, [pc, #96] @ (800f0a0 ) 800f040: 6013 str r3, [r2, #0] mtCOVERAGE_TEST_MARKER(); } /* The block is being returned - it is allocated and owned by the application and has no "next" block. */ pxBlock->xBlockSize |= xBlockAllocatedBit; 800f042: 6a7b ldr r3, [r7, #36] @ 0x24 800f044: 685a ldr r2, [r3, #4] 800f046: 4b13 ldr r3, [pc, #76] @ (800f094 ) 800f048: 681b ldr r3, [r3, #0] 800f04a: 431a orrs r2, r3 800f04c: 6a7b ldr r3, [r7, #36] @ 0x24 800f04e: 605a str r2, [r3, #4] pxBlock->pxNextFreeBlock = NULL; 800f050: 6a7b ldr r3, [r7, #36] @ 0x24 800f052: 2200 movs r2, #0 800f054: 601a str r2, [r3, #0] xNumberOfSuccessfulAllocations++; 800f056: 4b13 ldr r3, [pc, #76] @ (800f0a4 ) 800f058: 681b ldr r3, [r3, #0] 800f05a: 3301 adds r3, #1 800f05c: 4a11 ldr r2, [pc, #68] @ (800f0a4 ) 800f05e: 6013 str r3, [r2, #0] mtCOVERAGE_TEST_MARKER(); } traceMALLOC( pvReturn, xWantedSize ); } ( void ) xTaskResumeAll(); 800f060: f7fe fae8 bl 800d634 mtCOVERAGE_TEST_MARKER(); } } #endif configASSERT( ( ( ( size_t ) pvReturn ) & ( size_t ) portBYTE_ALIGNMENT_MASK ) == 0 ); 800f064: 69fb ldr r3, [r7, #28] 800f066: f003 0307 and.w r3, r3, #7 800f06a: 2b00 cmp r3, #0 800f06c: d00b beq.n 800f086 __asm volatile 800f06e: f04f 0350 mov.w r3, #80 @ 0x50 800f072: f383 8811 msr BASEPRI, r3 800f076: f3bf 8f6f isb sy 800f07a: f3bf 8f4f dsb sy 800f07e: 60fb str r3, [r7, #12] } 800f080: bf00 nop 800f082: bf00 nop 800f084: e7fd b.n 800f082 return pvReturn; 800f086: 69fb ldr r3, [r7, #28] } 800f088: 4618 mov r0, r3 800f08a: 3728 adds r7, #40 @ 0x28 800f08c: 46bd mov sp, r7 800f08e: bd80 pop {r7, pc} 800f090: 2000354c .word 0x2000354c 800f094: 20003560 .word 0x20003560 800f098: 20003550 .word 0x20003550 800f09c: 20003544 .word 0x20003544 800f0a0: 20003554 .word 0x20003554 800f0a4: 20003558 .word 0x20003558 0800f0a8 : /*-----------------------------------------------------------*/ void vPortFree( void *pv ) { 800f0a8: b580 push {r7, lr} 800f0aa: b086 sub sp, #24 800f0ac: af00 add r7, sp, #0 800f0ae: 6078 str r0, [r7, #4] uint8_t *puc = ( uint8_t * ) pv; 800f0b0: 687b ldr r3, [r7, #4] 800f0b2: 617b str r3, [r7, #20] BlockLink_t *pxLink; if( pv != NULL ) 800f0b4: 687b ldr r3, [r7, #4] 800f0b6: 2b00 cmp r3, #0 800f0b8: d04f beq.n 800f15a { /* The memory being freed will have an BlockLink_t structure immediately before it. */ puc -= xHeapStructSize; 800f0ba: 2308 movs r3, #8 800f0bc: 425b negs r3, r3 800f0be: 697a ldr r2, [r7, #20] 800f0c0: 4413 add r3, r2 800f0c2: 617b str r3, [r7, #20] /* This casting is to keep the compiler from issuing warnings. */ pxLink = ( void * ) puc; 800f0c4: 697b ldr r3, [r7, #20] 800f0c6: 613b str r3, [r7, #16] /* Check the block is actually allocated. */ configASSERT( ( pxLink->xBlockSize & xBlockAllocatedBit ) != 0 ); 800f0c8: 693b ldr r3, [r7, #16] 800f0ca: 685a ldr r2, [r3, #4] 800f0cc: 4b25 ldr r3, [pc, #148] @ (800f164 ) 800f0ce: 681b ldr r3, [r3, #0] 800f0d0: 4013 ands r3, r2 800f0d2: 2b00 cmp r3, #0 800f0d4: d10b bne.n 800f0ee __asm volatile 800f0d6: f04f 0350 mov.w r3, #80 @ 0x50 800f0da: f383 8811 msr BASEPRI, r3 800f0de: f3bf 8f6f isb sy 800f0e2: f3bf 8f4f dsb sy 800f0e6: 60fb str r3, [r7, #12] } 800f0e8: bf00 nop 800f0ea: bf00 nop 800f0ec: e7fd b.n 800f0ea configASSERT( pxLink->pxNextFreeBlock == NULL ); 800f0ee: 693b ldr r3, [r7, #16] 800f0f0: 681b ldr r3, [r3, #0] 800f0f2: 2b00 cmp r3, #0 800f0f4: d00b beq.n 800f10e __asm volatile 800f0f6: f04f 0350 mov.w r3, #80 @ 0x50 800f0fa: f383 8811 msr BASEPRI, r3 800f0fe: f3bf 8f6f isb sy 800f102: f3bf 8f4f dsb sy 800f106: 60bb str r3, [r7, #8] } 800f108: bf00 nop 800f10a: bf00 nop 800f10c: e7fd b.n 800f10a if( ( pxLink->xBlockSize & xBlockAllocatedBit ) != 0 ) 800f10e: 693b ldr r3, [r7, #16] 800f110: 685a ldr r2, [r3, #4] 800f112: 4b14 ldr r3, [pc, #80] @ (800f164 ) 800f114: 681b ldr r3, [r3, #0] 800f116: 4013 ands r3, r2 800f118: 2b00 cmp r3, #0 800f11a: d01e beq.n 800f15a { if( pxLink->pxNextFreeBlock == NULL ) 800f11c: 693b ldr r3, [r7, #16] 800f11e: 681b ldr r3, [r3, #0] 800f120: 2b00 cmp r3, #0 800f122: d11a bne.n 800f15a { /* The block is being returned to the heap - it is no longer allocated. */ pxLink->xBlockSize &= ~xBlockAllocatedBit; 800f124: 693b ldr r3, [r7, #16] 800f126: 685a ldr r2, [r3, #4] 800f128: 4b0e ldr r3, [pc, #56] @ (800f164 ) 800f12a: 681b ldr r3, [r3, #0] 800f12c: 43db mvns r3, r3 800f12e: 401a ands r2, r3 800f130: 693b ldr r3, [r7, #16] 800f132: 605a str r2, [r3, #4] vTaskSuspendAll(); 800f134: f7fe fa70 bl 800d618 { /* Add this block to the list of free blocks. */ xFreeBytesRemaining += pxLink->xBlockSize; 800f138: 693b ldr r3, [r7, #16] 800f13a: 685a ldr r2, [r3, #4] 800f13c: 4b0a ldr r3, [pc, #40] @ (800f168 ) 800f13e: 681b ldr r3, [r3, #0] 800f140: 4413 add r3, r2 800f142: 4a09 ldr r2, [pc, #36] @ (800f168 ) 800f144: 6013 str r3, [r2, #0] traceFREE( pv, pxLink->xBlockSize ); prvInsertBlockIntoFreeList( ( ( BlockLink_t * ) pxLink ) ); 800f146: 6938 ldr r0, [r7, #16] 800f148: f000 f874 bl 800f234 xNumberOfSuccessfulFrees++; 800f14c: 4b07 ldr r3, [pc, #28] @ (800f16c ) 800f14e: 681b ldr r3, [r3, #0] 800f150: 3301 adds r3, #1 800f152: 4a06 ldr r2, [pc, #24] @ (800f16c ) 800f154: 6013 str r3, [r2, #0] } ( void ) xTaskResumeAll(); 800f156: f7fe fa6d bl 800d634 else { mtCOVERAGE_TEST_MARKER(); } } } 800f15a: bf00 nop 800f15c: 3718 adds r7, #24 800f15e: 46bd mov sp, r7 800f160: bd80 pop {r7, pc} 800f162: bf00 nop 800f164: 20003560 .word 0x20003560 800f168: 20003550 .word 0x20003550 800f16c: 2000355c .word 0x2000355c 0800f170 : /* This just exists to keep the linker quiet. */ } /*-----------------------------------------------------------*/ static void prvHeapInit( void ) { 800f170: b480 push {r7} 800f172: b085 sub sp, #20 800f174: af00 add r7, sp, #0 BlockLink_t *pxFirstFreeBlock; uint8_t *pucAlignedHeap; size_t uxAddress; size_t xTotalHeapSize = configTOTAL_HEAP_SIZE; 800f176: f640 33b8 movw r3, #3000 @ 0xbb8 800f17a: 60bb str r3, [r7, #8] /* Ensure the heap starts on a correctly aligned boundary. */ uxAddress = ( size_t ) ucHeap; 800f17c: 4b27 ldr r3, [pc, #156] @ (800f21c ) 800f17e: 60fb str r3, [r7, #12] if( ( uxAddress & portBYTE_ALIGNMENT_MASK ) != 0 ) 800f180: 68fb ldr r3, [r7, #12] 800f182: f003 0307 and.w r3, r3, #7 800f186: 2b00 cmp r3, #0 800f188: d00c beq.n 800f1a4 { uxAddress += ( portBYTE_ALIGNMENT - 1 ); 800f18a: 68fb ldr r3, [r7, #12] 800f18c: 3307 adds r3, #7 800f18e: 60fb str r3, [r7, #12] uxAddress &= ~( ( size_t ) portBYTE_ALIGNMENT_MASK ); 800f190: 68fb ldr r3, [r7, #12] 800f192: f023 0307 bic.w r3, r3, #7 800f196: 60fb str r3, [r7, #12] xTotalHeapSize -= uxAddress - ( size_t ) ucHeap; 800f198: 68ba ldr r2, [r7, #8] 800f19a: 68fb ldr r3, [r7, #12] 800f19c: 1ad3 subs r3, r2, r3 800f19e: 4a1f ldr r2, [pc, #124] @ (800f21c ) 800f1a0: 4413 add r3, r2 800f1a2: 60bb str r3, [r7, #8] } pucAlignedHeap = ( uint8_t * ) uxAddress; 800f1a4: 68fb ldr r3, [r7, #12] 800f1a6: 607b str r3, [r7, #4] /* xStart is used to hold a pointer to the first item in the list of free blocks. The void cast is used to prevent compiler warnings. */ xStart.pxNextFreeBlock = ( void * ) pucAlignedHeap; 800f1a8: 4a1d ldr r2, [pc, #116] @ (800f220 ) 800f1aa: 687b ldr r3, [r7, #4] 800f1ac: 6013 str r3, [r2, #0] xStart.xBlockSize = ( size_t ) 0; 800f1ae: 4b1c ldr r3, [pc, #112] @ (800f220 ) 800f1b0: 2200 movs r2, #0 800f1b2: 605a str r2, [r3, #4] /* pxEnd is used to mark the end of the list of free blocks and is inserted at the end of the heap space. */ uxAddress = ( ( size_t ) pucAlignedHeap ) + xTotalHeapSize; 800f1b4: 687b ldr r3, [r7, #4] 800f1b6: 68ba ldr r2, [r7, #8] 800f1b8: 4413 add r3, r2 800f1ba: 60fb str r3, [r7, #12] uxAddress -= xHeapStructSize; 800f1bc: 2208 movs r2, #8 800f1be: 68fb ldr r3, [r7, #12] 800f1c0: 1a9b subs r3, r3, r2 800f1c2: 60fb str r3, [r7, #12] uxAddress &= ~( ( size_t ) portBYTE_ALIGNMENT_MASK ); 800f1c4: 68fb ldr r3, [r7, #12] 800f1c6: f023 0307 bic.w r3, r3, #7 800f1ca: 60fb str r3, [r7, #12] pxEnd = ( void * ) uxAddress; 800f1cc: 68fb ldr r3, [r7, #12] 800f1ce: 4a15 ldr r2, [pc, #84] @ (800f224 ) 800f1d0: 6013 str r3, [r2, #0] pxEnd->xBlockSize = 0; 800f1d2: 4b14 ldr r3, [pc, #80] @ (800f224 ) 800f1d4: 681b ldr r3, [r3, #0] 800f1d6: 2200 movs r2, #0 800f1d8: 605a str r2, [r3, #4] pxEnd->pxNextFreeBlock = NULL; 800f1da: 4b12 ldr r3, [pc, #72] @ (800f224 ) 800f1dc: 681b ldr r3, [r3, #0] 800f1de: 2200 movs r2, #0 800f1e0: 601a str r2, [r3, #0] /* To start with there is a single free block that is sized to take up the entire heap space, minus the space taken by pxEnd. */ pxFirstFreeBlock = ( void * ) pucAlignedHeap; 800f1e2: 687b ldr r3, [r7, #4] 800f1e4: 603b str r3, [r7, #0] pxFirstFreeBlock->xBlockSize = uxAddress - ( size_t ) pxFirstFreeBlock; 800f1e6: 683b ldr r3, [r7, #0] 800f1e8: 68fa ldr r2, [r7, #12] 800f1ea: 1ad2 subs r2, r2, r3 800f1ec: 683b ldr r3, [r7, #0] 800f1ee: 605a str r2, [r3, #4] pxFirstFreeBlock->pxNextFreeBlock = pxEnd; 800f1f0: 4b0c ldr r3, [pc, #48] @ (800f224 ) 800f1f2: 681a ldr r2, [r3, #0] 800f1f4: 683b ldr r3, [r7, #0] 800f1f6: 601a str r2, [r3, #0] /* Only one block exists - and it covers the entire usable heap space. */ xMinimumEverFreeBytesRemaining = pxFirstFreeBlock->xBlockSize; 800f1f8: 683b ldr r3, [r7, #0] 800f1fa: 685b ldr r3, [r3, #4] 800f1fc: 4a0a ldr r2, [pc, #40] @ (800f228 ) 800f1fe: 6013 str r3, [r2, #0] xFreeBytesRemaining = pxFirstFreeBlock->xBlockSize; 800f200: 683b ldr r3, [r7, #0] 800f202: 685b ldr r3, [r3, #4] 800f204: 4a09 ldr r2, [pc, #36] @ (800f22c ) 800f206: 6013 str r3, [r2, #0] /* Work out the position of the top bit in a size_t variable. */ xBlockAllocatedBit = ( ( size_t ) 1 ) << ( ( sizeof( size_t ) * heapBITS_PER_BYTE ) - 1 ); 800f208: 4b09 ldr r3, [pc, #36] @ (800f230 ) 800f20a: f04f 4200 mov.w r2, #2147483648 @ 0x80000000 800f20e: 601a str r2, [r3, #0] } 800f210: bf00 nop 800f212: 3714 adds r7, #20 800f214: 46bd mov sp, r7 800f216: f85d 7b04 ldr.w r7, [sp], #4 800f21a: 4770 bx lr 800f21c: 2000298c .word 0x2000298c 800f220: 20003544 .word 0x20003544 800f224: 2000354c .word 0x2000354c 800f228: 20003554 .word 0x20003554 800f22c: 20003550 .word 0x20003550 800f230: 20003560 .word 0x20003560 0800f234 : /*-----------------------------------------------------------*/ static void prvInsertBlockIntoFreeList( BlockLink_t *pxBlockToInsert ) { 800f234: b480 push {r7} 800f236: b085 sub sp, #20 800f238: af00 add r7, sp, #0 800f23a: 6078 str r0, [r7, #4] BlockLink_t *pxIterator; uint8_t *puc; /* Iterate through the list until a block is found that has a higher address than the block being inserted. */ for( pxIterator = &xStart; pxIterator->pxNextFreeBlock < pxBlockToInsert; pxIterator = pxIterator->pxNextFreeBlock ) 800f23c: 4b28 ldr r3, [pc, #160] @ (800f2e0 ) 800f23e: 60fb str r3, [r7, #12] 800f240: e002 b.n 800f248 800f242: 68fb ldr r3, [r7, #12] 800f244: 681b ldr r3, [r3, #0] 800f246: 60fb str r3, [r7, #12] 800f248: 68fb ldr r3, [r7, #12] 800f24a: 681b ldr r3, [r3, #0] 800f24c: 687a ldr r2, [r7, #4] 800f24e: 429a cmp r2, r3 800f250: d8f7 bhi.n 800f242 /* Nothing to do here, just iterate to the right position. */ } /* Do the block being inserted, and the block it is being inserted after make a contiguous block of memory? */ puc = ( uint8_t * ) pxIterator; 800f252: 68fb ldr r3, [r7, #12] 800f254: 60bb str r3, [r7, #8] if( ( puc + pxIterator->xBlockSize ) == ( uint8_t * ) pxBlockToInsert ) 800f256: 68fb ldr r3, [r7, #12] 800f258: 685b ldr r3, [r3, #4] 800f25a: 68ba ldr r2, [r7, #8] 800f25c: 4413 add r3, r2 800f25e: 687a ldr r2, [r7, #4] 800f260: 429a cmp r2, r3 800f262: d108 bne.n 800f276 { pxIterator->xBlockSize += pxBlockToInsert->xBlockSize; 800f264: 68fb ldr r3, [r7, #12] 800f266: 685a ldr r2, [r3, #4] 800f268: 687b ldr r3, [r7, #4] 800f26a: 685b ldr r3, [r3, #4] 800f26c: 441a add r2, r3 800f26e: 68fb ldr r3, [r7, #12] 800f270: 605a str r2, [r3, #4] pxBlockToInsert = pxIterator; 800f272: 68fb ldr r3, [r7, #12] 800f274: 607b str r3, [r7, #4] mtCOVERAGE_TEST_MARKER(); } /* Do the block being inserted, and the block it is being inserted before make a contiguous block of memory? */ puc = ( uint8_t * ) pxBlockToInsert; 800f276: 687b ldr r3, [r7, #4] 800f278: 60bb str r3, [r7, #8] if( ( puc + pxBlockToInsert->xBlockSize ) == ( uint8_t * ) pxIterator->pxNextFreeBlock ) 800f27a: 687b ldr r3, [r7, #4] 800f27c: 685b ldr r3, [r3, #4] 800f27e: 68ba ldr r2, [r7, #8] 800f280: 441a add r2, r3 800f282: 68fb ldr r3, [r7, #12] 800f284: 681b ldr r3, [r3, #0] 800f286: 429a cmp r2, r3 800f288: d118 bne.n 800f2bc { if( pxIterator->pxNextFreeBlock != pxEnd ) 800f28a: 68fb ldr r3, [r7, #12] 800f28c: 681a ldr r2, [r3, #0] 800f28e: 4b15 ldr r3, [pc, #84] @ (800f2e4 ) 800f290: 681b ldr r3, [r3, #0] 800f292: 429a cmp r2, r3 800f294: d00d beq.n 800f2b2 { /* Form one big block from the two blocks. */ pxBlockToInsert->xBlockSize += pxIterator->pxNextFreeBlock->xBlockSize; 800f296: 687b ldr r3, [r7, #4] 800f298: 685a ldr r2, [r3, #4] 800f29a: 68fb ldr r3, [r7, #12] 800f29c: 681b ldr r3, [r3, #0] 800f29e: 685b ldr r3, [r3, #4] 800f2a0: 441a add r2, r3 800f2a2: 687b ldr r3, [r7, #4] 800f2a4: 605a str r2, [r3, #4] pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock->pxNextFreeBlock; 800f2a6: 68fb ldr r3, [r7, #12] 800f2a8: 681b ldr r3, [r3, #0] 800f2aa: 681a ldr r2, [r3, #0] 800f2ac: 687b ldr r3, [r7, #4] 800f2ae: 601a str r2, [r3, #0] 800f2b0: e008 b.n 800f2c4 } else { pxBlockToInsert->pxNextFreeBlock = pxEnd; 800f2b2: 4b0c ldr r3, [pc, #48] @ (800f2e4 ) 800f2b4: 681a ldr r2, [r3, #0] 800f2b6: 687b ldr r3, [r7, #4] 800f2b8: 601a str r2, [r3, #0] 800f2ba: e003 b.n 800f2c4 } } else { pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock; 800f2bc: 68fb ldr r3, [r7, #12] 800f2be: 681a ldr r2, [r3, #0] 800f2c0: 687b ldr r3, [r7, #4] 800f2c2: 601a str r2, [r3, #0] /* If the block being inserted plugged a gab, so was merged with the block before and the block after, then it's pxNextFreeBlock pointer will have already been set, and should not be set here as that would make it point to itself. */ if( pxIterator != pxBlockToInsert ) 800f2c4: 68fa ldr r2, [r7, #12] 800f2c6: 687b ldr r3, [r7, #4] 800f2c8: 429a cmp r2, r3 800f2ca: d002 beq.n 800f2d2 { pxIterator->pxNextFreeBlock = pxBlockToInsert; 800f2cc: 68fb ldr r3, [r7, #12] 800f2ce: 687a ldr r2, [r7, #4] 800f2d0: 601a str r2, [r3, #0] } else { mtCOVERAGE_TEST_MARKER(); } } 800f2d2: bf00 nop 800f2d4: 3714 adds r7, #20 800f2d6: 46bd mov sp, r7 800f2d8: f85d 7b04 ldr.w r7, [sp], #4 800f2dc: 4770 bx lr 800f2de: bf00 nop 800f2e0: 20003544 .word 0x20003544 800f2e4: 2000354c .word 0x2000354c 0800f2e8 <__cvt>: 800f2e8: e92d 47ff stmdb sp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, lr} 800f2ec: ec57 6b10 vmov r6, r7, d0 800f2f0: 2f00 cmp r7, #0 800f2f2: 460c mov r4, r1 800f2f4: 4619 mov r1, r3 800f2f6: 463b mov r3, r7 800f2f8: bfbb ittet lt 800f2fa: f107 4300 addlt.w r3, r7, #2147483648 @ 0x80000000 800f2fe: 461f movlt r7, r3 800f300: 2300 movge r3, #0 800f302: 232d movlt r3, #45 @ 0x2d 800f304: 700b strb r3, [r1, #0] 800f306: 9b0d ldr r3, [sp, #52] @ 0x34 800f308: f8dd a030 ldr.w sl, [sp, #48] @ 0x30 800f30c: 4691 mov r9, r2 800f30e: f023 0820 bic.w r8, r3, #32 800f312: bfbc itt lt 800f314: 4632 movlt r2, r6 800f316: 4616 movlt r6, r2 800f318: f1b8 0f46 cmp.w r8, #70 @ 0x46 800f31c: d005 beq.n 800f32a <__cvt+0x42> 800f31e: f1b8 0f45 cmp.w r8, #69 @ 0x45 800f322: d100 bne.n 800f326 <__cvt+0x3e> 800f324: 3401 adds r4, #1 800f326: 2102 movs r1, #2 800f328: e000 b.n 800f32c <__cvt+0x44> 800f32a: 2103 movs r1, #3 800f32c: ab03 add r3, sp, #12 800f32e: 9301 str r3, [sp, #4] 800f330: ab02 add r3, sp, #8 800f332: 9300 str r3, [sp, #0] 800f334: ec47 6b10 vmov d0, r6, r7 800f338: 4653 mov r3, sl 800f33a: 4622 mov r2, r4 800f33c: f001 faac bl 8010898 <_dtoa_r> 800f340: f1b8 0f47 cmp.w r8, #71 @ 0x47 800f344: 4605 mov r5, r0 800f346: d119 bne.n 800f37c <__cvt+0x94> 800f348: f019 0f01 tst.w r9, #1 800f34c: d00e beq.n 800f36c <__cvt+0x84> 800f34e: eb00 0904 add.w r9, r0, r4 800f352: 2200 movs r2, #0 800f354: 2300 movs r3, #0 800f356: 4630 mov r0, r6 800f358: 4639 mov r1, r7 800f35a: f7f1 fbc5 bl 8000ae8 <__aeabi_dcmpeq> 800f35e: b108 cbz r0, 800f364 <__cvt+0x7c> 800f360: f8cd 900c str.w r9, [sp, #12] 800f364: 2230 movs r2, #48 @ 0x30 800f366: 9b03 ldr r3, [sp, #12] 800f368: 454b cmp r3, r9 800f36a: d31e bcc.n 800f3aa <__cvt+0xc2> 800f36c: 9b03 ldr r3, [sp, #12] 800f36e: 9a0e ldr r2, [sp, #56] @ 0x38 800f370: 1b5b subs r3, r3, r5 800f372: 4628 mov r0, r5 800f374: 6013 str r3, [r2, #0] 800f376: b004 add sp, #16 800f378: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 800f37c: f1b8 0f46 cmp.w r8, #70 @ 0x46 800f380: eb00 0904 add.w r9, r0, r4 800f384: d1e5 bne.n 800f352 <__cvt+0x6a> 800f386: 7803 ldrb r3, [r0, #0] 800f388: 2b30 cmp r3, #48 @ 0x30 800f38a: d10a bne.n 800f3a2 <__cvt+0xba> 800f38c: 2200 movs r2, #0 800f38e: 2300 movs r3, #0 800f390: 4630 mov r0, r6 800f392: 4639 mov r1, r7 800f394: f7f1 fba8 bl 8000ae8 <__aeabi_dcmpeq> 800f398: b918 cbnz r0, 800f3a2 <__cvt+0xba> 800f39a: f1c4 0401 rsb r4, r4, #1 800f39e: f8ca 4000 str.w r4, [sl] 800f3a2: f8da 3000 ldr.w r3, [sl] 800f3a6: 4499 add r9, r3 800f3a8: e7d3 b.n 800f352 <__cvt+0x6a> 800f3aa: 1c59 adds r1, r3, #1 800f3ac: 9103 str r1, [sp, #12] 800f3ae: 701a strb r2, [r3, #0] 800f3b0: e7d9 b.n 800f366 <__cvt+0x7e> 0800f3b2 <__exponent>: 800f3b2: b5f7 push {r0, r1, r2, r4, r5, r6, r7, lr} 800f3b4: 2900 cmp r1, #0 800f3b6: bfba itte lt 800f3b8: 4249 neglt r1, r1 800f3ba: 232d movlt r3, #45 @ 0x2d 800f3bc: 232b movge r3, #43 @ 0x2b 800f3be: 2909 cmp r1, #9 800f3c0: 7002 strb r2, [r0, #0] 800f3c2: 7043 strb r3, [r0, #1] 800f3c4: dd29 ble.n 800f41a <__exponent+0x68> 800f3c6: f10d 0307 add.w r3, sp, #7 800f3ca: 461d mov r5, r3 800f3cc: 270a movs r7, #10 800f3ce: 461a mov r2, r3 800f3d0: fbb1 f6f7 udiv r6, r1, r7 800f3d4: fb07 1416 mls r4, r7, r6, r1 800f3d8: 3430 adds r4, #48 @ 0x30 800f3da: f802 4c01 strb.w r4, [r2, #-1] 800f3de: 460c mov r4, r1 800f3e0: 2c63 cmp r4, #99 @ 0x63 800f3e2: f103 33ff add.w r3, r3, #4294967295 @ 0xffffffff 800f3e6: 4631 mov r1, r6 800f3e8: dcf1 bgt.n 800f3ce <__exponent+0x1c> 800f3ea: 3130 adds r1, #48 @ 0x30 800f3ec: 1e94 subs r4, r2, #2 800f3ee: f803 1c01 strb.w r1, [r3, #-1] 800f3f2: 1c41 adds r1, r0, #1 800f3f4: 4623 mov r3, r4 800f3f6: 42ab cmp r3, r5 800f3f8: d30a bcc.n 800f410 <__exponent+0x5e> 800f3fa: f10d 0309 add.w r3, sp, #9 800f3fe: 1a9b subs r3, r3, r2 800f400: 42ac cmp r4, r5 800f402: bf88 it hi 800f404: 2300 movhi r3, #0 800f406: 3302 adds r3, #2 800f408: 4403 add r3, r0 800f40a: 1a18 subs r0, r3, r0 800f40c: b003 add sp, #12 800f40e: bdf0 pop {r4, r5, r6, r7, pc} 800f410: f813 6b01 ldrb.w r6, [r3], #1 800f414: f801 6f01 strb.w r6, [r1, #1]! 800f418: e7ed b.n 800f3f6 <__exponent+0x44> 800f41a: 2330 movs r3, #48 @ 0x30 800f41c: 3130 adds r1, #48 @ 0x30 800f41e: 7083 strb r3, [r0, #2] 800f420: 70c1 strb r1, [r0, #3] 800f422: 1d03 adds r3, r0, #4 800f424: e7f1 b.n 800f40a <__exponent+0x58> ... 0800f428 <_printf_float>: 800f428: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 800f42c: b08d sub sp, #52 @ 0x34 800f42e: 460c mov r4, r1 800f430: f8dd 8058 ldr.w r8, [sp, #88] @ 0x58 800f434: 4616 mov r6, r2 800f436: 461f mov r7, r3 800f438: 4605 mov r5, r0 800f43a: f001 f8f9 bl 8010630 <_localeconv_r> 800f43e: 6803 ldr r3, [r0, #0] 800f440: 9304 str r3, [sp, #16] 800f442: 4618 mov r0, r3 800f444: f7f0 ff24 bl 8000290 800f448: 2300 movs r3, #0 800f44a: 930a str r3, [sp, #40] @ 0x28 800f44c: f8d8 3000 ldr.w r3, [r8] 800f450: 9005 str r0, [sp, #20] 800f452: 3307 adds r3, #7 800f454: f023 0307 bic.w r3, r3, #7 800f458: f103 0208 add.w r2, r3, #8 800f45c: f894 a018 ldrb.w sl, [r4, #24] 800f460: f8d4 b000 ldr.w fp, [r4] 800f464: f8c8 2000 str.w r2, [r8] 800f468: e9d3 8900 ldrd r8, r9, [r3] 800f46c: f029 4300 bic.w r3, r9, #2147483648 @ 0x80000000 800f470: 9307 str r3, [sp, #28] 800f472: f8cd 8018 str.w r8, [sp, #24] 800f476: e9c4 8912 strd r8, r9, [r4, #72] @ 0x48 800f47a: e9dd 0106 ldrd r0, r1, [sp, #24] 800f47e: 4b9c ldr r3, [pc, #624] @ (800f6f0 <_printf_float+0x2c8>) 800f480: f04f 32ff mov.w r2, #4294967295 @ 0xffffffff 800f484: f7f1 fb62 bl 8000b4c <__aeabi_dcmpun> 800f488: bb70 cbnz r0, 800f4e8 <_printf_float+0xc0> 800f48a: e9dd 0106 ldrd r0, r1, [sp, #24] 800f48e: 4b98 ldr r3, [pc, #608] @ (800f6f0 <_printf_float+0x2c8>) 800f490: f04f 32ff mov.w r2, #4294967295 @ 0xffffffff 800f494: f7f1 fb3c bl 8000b10 <__aeabi_dcmple> 800f498: bb30 cbnz r0, 800f4e8 <_printf_float+0xc0> 800f49a: 2200 movs r2, #0 800f49c: 2300 movs r3, #0 800f49e: 4640 mov r0, r8 800f4a0: 4649 mov r1, r9 800f4a2: f7f1 fb2b bl 8000afc <__aeabi_dcmplt> 800f4a6: b110 cbz r0, 800f4ae <_printf_float+0x86> 800f4a8: 232d movs r3, #45 @ 0x2d 800f4aa: f884 3043 strb.w r3, [r4, #67] @ 0x43 800f4ae: 4a91 ldr r2, [pc, #580] @ (800f6f4 <_printf_float+0x2cc>) 800f4b0: 4b91 ldr r3, [pc, #580] @ (800f6f8 <_printf_float+0x2d0>) 800f4b2: f1ba 0f47 cmp.w sl, #71 @ 0x47 800f4b6: bf8c ite hi 800f4b8: 4690 movhi r8, r2 800f4ba: 4698 movls r8, r3 800f4bc: 2303 movs r3, #3 800f4be: 6123 str r3, [r4, #16] 800f4c0: f02b 0304 bic.w r3, fp, #4 800f4c4: 6023 str r3, [r4, #0] 800f4c6: f04f 0900 mov.w r9, #0 800f4ca: 9700 str r7, [sp, #0] 800f4cc: 4633 mov r3, r6 800f4ce: aa0b add r2, sp, #44 @ 0x2c 800f4d0: 4621 mov r1, r4 800f4d2: 4628 mov r0, r5 800f4d4: f000 f9d2 bl 800f87c <_printf_common> 800f4d8: 3001 adds r0, #1 800f4da: f040 808d bne.w 800f5f8 <_printf_float+0x1d0> 800f4de: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff 800f4e2: b00d add sp, #52 @ 0x34 800f4e4: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} 800f4e8: 4642 mov r2, r8 800f4ea: 464b mov r3, r9 800f4ec: 4640 mov r0, r8 800f4ee: 4649 mov r1, r9 800f4f0: f7f1 fb2c bl 8000b4c <__aeabi_dcmpun> 800f4f4: b140 cbz r0, 800f508 <_printf_float+0xe0> 800f4f6: 464b mov r3, r9 800f4f8: 2b00 cmp r3, #0 800f4fa: bfbc itt lt 800f4fc: 232d movlt r3, #45 @ 0x2d 800f4fe: f884 3043 strblt.w r3, [r4, #67] @ 0x43 800f502: 4a7e ldr r2, [pc, #504] @ (800f6fc <_printf_float+0x2d4>) 800f504: 4b7e ldr r3, [pc, #504] @ (800f700 <_printf_float+0x2d8>) 800f506: e7d4 b.n 800f4b2 <_printf_float+0x8a> 800f508: 6863 ldr r3, [r4, #4] 800f50a: f00a 02df and.w r2, sl, #223 @ 0xdf 800f50e: 9206 str r2, [sp, #24] 800f510: 1c5a adds r2, r3, #1 800f512: d13b bne.n 800f58c <_printf_float+0x164> 800f514: 2306 movs r3, #6 800f516: 6063 str r3, [r4, #4] 800f518: f44b 6280 orr.w r2, fp, #1024 @ 0x400 800f51c: 2300 movs r3, #0 800f51e: 6022 str r2, [r4, #0] 800f520: 9303 str r3, [sp, #12] 800f522: ab0a add r3, sp, #40 @ 0x28 800f524: e9cd a301 strd sl, r3, [sp, #4] 800f528: ab09 add r3, sp, #36 @ 0x24 800f52a: 9300 str r3, [sp, #0] 800f52c: 6861 ldr r1, [r4, #4] 800f52e: ec49 8b10 vmov d0, r8, r9 800f532: f10d 0323 add.w r3, sp, #35 @ 0x23 800f536: 4628 mov r0, r5 800f538: f7ff fed6 bl 800f2e8 <__cvt> 800f53c: 9b06 ldr r3, [sp, #24] 800f53e: 9909 ldr r1, [sp, #36] @ 0x24 800f540: 2b47 cmp r3, #71 @ 0x47 800f542: 4680 mov r8, r0 800f544: d129 bne.n 800f59a <_printf_float+0x172> 800f546: 1cc8 adds r0, r1, #3 800f548: db02 blt.n 800f550 <_printf_float+0x128> 800f54a: 6863 ldr r3, [r4, #4] 800f54c: 4299 cmp r1, r3 800f54e: dd41 ble.n 800f5d4 <_printf_float+0x1ac> 800f550: f1aa 0a02 sub.w sl, sl, #2 800f554: fa5f fa8a uxtb.w sl, sl 800f558: 3901 subs r1, #1 800f55a: 4652 mov r2, sl 800f55c: f104 0050 add.w r0, r4, #80 @ 0x50 800f560: 9109 str r1, [sp, #36] @ 0x24 800f562: f7ff ff26 bl 800f3b2 <__exponent> 800f566: 9a0a ldr r2, [sp, #40] @ 0x28 800f568: 1813 adds r3, r2, r0 800f56a: 2a01 cmp r2, #1 800f56c: 4681 mov r9, r0 800f56e: 6123 str r3, [r4, #16] 800f570: dc02 bgt.n 800f578 <_printf_float+0x150> 800f572: 6822 ldr r2, [r4, #0] 800f574: 07d2 lsls r2, r2, #31 800f576: d501 bpl.n 800f57c <_printf_float+0x154> 800f578: 3301 adds r3, #1 800f57a: 6123 str r3, [r4, #16] 800f57c: f89d 3023 ldrb.w r3, [sp, #35] @ 0x23 800f580: 2b00 cmp r3, #0 800f582: d0a2 beq.n 800f4ca <_printf_float+0xa2> 800f584: 232d movs r3, #45 @ 0x2d 800f586: f884 3043 strb.w r3, [r4, #67] @ 0x43 800f58a: e79e b.n 800f4ca <_printf_float+0xa2> 800f58c: 9a06 ldr r2, [sp, #24] 800f58e: 2a47 cmp r2, #71 @ 0x47 800f590: d1c2 bne.n 800f518 <_printf_float+0xf0> 800f592: 2b00 cmp r3, #0 800f594: d1c0 bne.n 800f518 <_printf_float+0xf0> 800f596: 2301 movs r3, #1 800f598: e7bd b.n 800f516 <_printf_float+0xee> 800f59a: f1ba 0f65 cmp.w sl, #101 @ 0x65 800f59e: d9db bls.n 800f558 <_printf_float+0x130> 800f5a0: f1ba 0f66 cmp.w sl, #102 @ 0x66 800f5a4: d118 bne.n 800f5d8 <_printf_float+0x1b0> 800f5a6: 2900 cmp r1, #0 800f5a8: 6863 ldr r3, [r4, #4] 800f5aa: dd0b ble.n 800f5c4 <_printf_float+0x19c> 800f5ac: 6121 str r1, [r4, #16] 800f5ae: b913 cbnz r3, 800f5b6 <_printf_float+0x18e> 800f5b0: 6822 ldr r2, [r4, #0] 800f5b2: 07d0 lsls r0, r2, #31 800f5b4: d502 bpl.n 800f5bc <_printf_float+0x194> 800f5b6: 3301 adds r3, #1 800f5b8: 440b add r3, r1 800f5ba: 6123 str r3, [r4, #16] 800f5bc: 65a1 str r1, [r4, #88] @ 0x58 800f5be: f04f 0900 mov.w r9, #0 800f5c2: e7db b.n 800f57c <_printf_float+0x154> 800f5c4: b913 cbnz r3, 800f5cc <_printf_float+0x1a4> 800f5c6: 6822 ldr r2, [r4, #0] 800f5c8: 07d2 lsls r2, r2, #31 800f5ca: d501 bpl.n 800f5d0 <_printf_float+0x1a8> 800f5cc: 3302 adds r3, #2 800f5ce: e7f4 b.n 800f5ba <_printf_float+0x192> 800f5d0: 2301 movs r3, #1 800f5d2: e7f2 b.n 800f5ba <_printf_float+0x192> 800f5d4: f04f 0a67 mov.w sl, #103 @ 0x67 800f5d8: 9b0a ldr r3, [sp, #40] @ 0x28 800f5da: 4299 cmp r1, r3 800f5dc: db05 blt.n 800f5ea <_printf_float+0x1c2> 800f5de: 6823 ldr r3, [r4, #0] 800f5e0: 6121 str r1, [r4, #16] 800f5e2: 07d8 lsls r0, r3, #31 800f5e4: d5ea bpl.n 800f5bc <_printf_float+0x194> 800f5e6: 1c4b adds r3, r1, #1 800f5e8: e7e7 b.n 800f5ba <_printf_float+0x192> 800f5ea: 2900 cmp r1, #0 800f5ec: bfd4 ite le 800f5ee: f1c1 0202 rsble r2, r1, #2 800f5f2: 2201 movgt r2, #1 800f5f4: 4413 add r3, r2 800f5f6: e7e0 b.n 800f5ba <_printf_float+0x192> 800f5f8: 6823 ldr r3, [r4, #0] 800f5fa: 055a lsls r2, r3, #21 800f5fc: d407 bmi.n 800f60e <_printf_float+0x1e6> 800f5fe: 6923 ldr r3, [r4, #16] 800f600: 4642 mov r2, r8 800f602: 4631 mov r1, r6 800f604: 4628 mov r0, r5 800f606: 47b8 blx r7 800f608: 3001 adds r0, #1 800f60a: d12b bne.n 800f664 <_printf_float+0x23c> 800f60c: e767 b.n 800f4de <_printf_float+0xb6> 800f60e: f1ba 0f65 cmp.w sl, #101 @ 0x65 800f612: f240 80dd bls.w 800f7d0 <_printf_float+0x3a8> 800f616: e9d4 0112 ldrd r0, r1, [r4, #72] @ 0x48 800f61a: 2200 movs r2, #0 800f61c: 2300 movs r3, #0 800f61e: f7f1 fa63 bl 8000ae8 <__aeabi_dcmpeq> 800f622: 2800 cmp r0, #0 800f624: d033 beq.n 800f68e <_printf_float+0x266> 800f626: 4a37 ldr r2, [pc, #220] @ (800f704 <_printf_float+0x2dc>) 800f628: 2301 movs r3, #1 800f62a: 4631 mov r1, r6 800f62c: 4628 mov r0, r5 800f62e: 47b8 blx r7 800f630: 3001 adds r0, #1 800f632: f43f af54 beq.w 800f4de <_printf_float+0xb6> 800f636: e9dd 3809 ldrd r3, r8, [sp, #36] @ 0x24 800f63a: 4543 cmp r3, r8 800f63c: db02 blt.n 800f644 <_printf_float+0x21c> 800f63e: 6823 ldr r3, [r4, #0] 800f640: 07d8 lsls r0, r3, #31 800f642: d50f bpl.n 800f664 <_printf_float+0x23c> 800f644: e9dd 2304 ldrd r2, r3, [sp, #16] 800f648: 4631 mov r1, r6 800f64a: 4628 mov r0, r5 800f64c: 47b8 blx r7 800f64e: 3001 adds r0, #1 800f650: f43f af45 beq.w 800f4de <_printf_float+0xb6> 800f654: f04f 0900 mov.w r9, #0 800f658: f108 38ff add.w r8, r8, #4294967295 @ 0xffffffff 800f65c: f104 0a1a add.w sl, r4, #26 800f660: 45c8 cmp r8, r9 800f662: dc09 bgt.n 800f678 <_printf_float+0x250> 800f664: 6823 ldr r3, [r4, #0] 800f666: 079b lsls r3, r3, #30 800f668: f100 8103 bmi.w 800f872 <_printf_float+0x44a> 800f66c: 68e0 ldr r0, [r4, #12] 800f66e: 9b0b ldr r3, [sp, #44] @ 0x2c 800f670: 4298 cmp r0, r3 800f672: bfb8 it lt 800f674: 4618 movlt r0, r3 800f676: e734 b.n 800f4e2 <_printf_float+0xba> 800f678: 2301 movs r3, #1 800f67a: 4652 mov r2, sl 800f67c: 4631 mov r1, r6 800f67e: 4628 mov r0, r5 800f680: 47b8 blx r7 800f682: 3001 adds r0, #1 800f684: f43f af2b beq.w 800f4de <_printf_float+0xb6> 800f688: f109 0901 add.w r9, r9, #1 800f68c: e7e8 b.n 800f660 <_printf_float+0x238> 800f68e: 9b09 ldr r3, [sp, #36] @ 0x24 800f690: 2b00 cmp r3, #0 800f692: dc39 bgt.n 800f708 <_printf_float+0x2e0> 800f694: 4a1b ldr r2, [pc, #108] @ (800f704 <_printf_float+0x2dc>) 800f696: 2301 movs r3, #1 800f698: 4631 mov r1, r6 800f69a: 4628 mov r0, r5 800f69c: 47b8 blx r7 800f69e: 3001 adds r0, #1 800f6a0: f43f af1d beq.w 800f4de <_printf_float+0xb6> 800f6a4: e9dd 3909 ldrd r3, r9, [sp, #36] @ 0x24 800f6a8: ea59 0303 orrs.w r3, r9, r3 800f6ac: d102 bne.n 800f6b4 <_printf_float+0x28c> 800f6ae: 6823 ldr r3, [r4, #0] 800f6b0: 07d9 lsls r1, r3, #31 800f6b2: d5d7 bpl.n 800f664 <_printf_float+0x23c> 800f6b4: e9dd 2304 ldrd r2, r3, [sp, #16] 800f6b8: 4631 mov r1, r6 800f6ba: 4628 mov r0, r5 800f6bc: 47b8 blx r7 800f6be: 3001 adds r0, #1 800f6c0: f43f af0d beq.w 800f4de <_printf_float+0xb6> 800f6c4: f04f 0a00 mov.w sl, #0 800f6c8: f104 0b1a add.w fp, r4, #26 800f6cc: 9b09 ldr r3, [sp, #36] @ 0x24 800f6ce: 425b negs r3, r3 800f6d0: 4553 cmp r3, sl 800f6d2: dc01 bgt.n 800f6d8 <_printf_float+0x2b0> 800f6d4: 464b mov r3, r9 800f6d6: e793 b.n 800f600 <_printf_float+0x1d8> 800f6d8: 2301 movs r3, #1 800f6da: 465a mov r2, fp 800f6dc: 4631 mov r1, r6 800f6de: 4628 mov r0, r5 800f6e0: 47b8 blx r7 800f6e2: 3001 adds r0, #1 800f6e4: f43f aefb beq.w 800f4de <_printf_float+0xb6> 800f6e8: f10a 0a01 add.w sl, sl, #1 800f6ec: e7ee b.n 800f6cc <_printf_float+0x2a4> 800f6ee: bf00 nop 800f6f0: 7fefffff .word 0x7fefffff 800f6f4: 08014f08 .word 0x08014f08 800f6f8: 08014f04 .word 0x08014f04 800f6fc: 08014f10 .word 0x08014f10 800f700: 08014f0c .word 0x08014f0c 800f704: 080150e0 .word 0x080150e0 800f708: 6da3 ldr r3, [r4, #88] @ 0x58 800f70a: f8dd a028 ldr.w sl, [sp, #40] @ 0x28 800f70e: 4553 cmp r3, sl 800f710: bfa8 it ge 800f712: 4653 movge r3, sl 800f714: 2b00 cmp r3, #0 800f716: 4699 mov r9, r3 800f718: dc36 bgt.n 800f788 <_printf_float+0x360> 800f71a: f04f 0b00 mov.w fp, #0 800f71e: ea29 79e9 bic.w r9, r9, r9, asr #31 800f722: f104 021a add.w r2, r4, #26 800f726: 6da3 ldr r3, [r4, #88] @ 0x58 800f728: 9306 str r3, [sp, #24] 800f72a: eba3 0309 sub.w r3, r3, r9 800f72e: 455b cmp r3, fp 800f730: dc31 bgt.n 800f796 <_printf_float+0x36e> 800f732: 9b09 ldr r3, [sp, #36] @ 0x24 800f734: 459a cmp sl, r3 800f736: dc3a bgt.n 800f7ae <_printf_float+0x386> 800f738: 6823 ldr r3, [r4, #0] 800f73a: 07da lsls r2, r3, #31 800f73c: d437 bmi.n 800f7ae <_printf_float+0x386> 800f73e: 9b09 ldr r3, [sp, #36] @ 0x24 800f740: ebaa 0903 sub.w r9, sl, r3 800f744: 9b06 ldr r3, [sp, #24] 800f746: ebaa 0303 sub.w r3, sl, r3 800f74a: 4599 cmp r9, r3 800f74c: bfa8 it ge 800f74e: 4699 movge r9, r3 800f750: f1b9 0f00 cmp.w r9, #0 800f754: dc33 bgt.n 800f7be <_printf_float+0x396> 800f756: f04f 0800 mov.w r8, #0 800f75a: ea29 79e9 bic.w r9, r9, r9, asr #31 800f75e: f104 0b1a add.w fp, r4, #26 800f762: 9b09 ldr r3, [sp, #36] @ 0x24 800f764: ebaa 0303 sub.w r3, sl, r3 800f768: eba3 0309 sub.w r3, r3, r9 800f76c: 4543 cmp r3, r8 800f76e: f77f af79 ble.w 800f664 <_printf_float+0x23c> 800f772: 2301 movs r3, #1 800f774: 465a mov r2, fp 800f776: 4631 mov r1, r6 800f778: 4628 mov r0, r5 800f77a: 47b8 blx r7 800f77c: 3001 adds r0, #1 800f77e: f43f aeae beq.w 800f4de <_printf_float+0xb6> 800f782: f108 0801 add.w r8, r8, #1 800f786: e7ec b.n 800f762 <_printf_float+0x33a> 800f788: 4642 mov r2, r8 800f78a: 4631 mov r1, r6 800f78c: 4628 mov r0, r5 800f78e: 47b8 blx r7 800f790: 3001 adds r0, #1 800f792: d1c2 bne.n 800f71a <_printf_float+0x2f2> 800f794: e6a3 b.n 800f4de <_printf_float+0xb6> 800f796: 2301 movs r3, #1 800f798: 4631 mov r1, r6 800f79a: 4628 mov r0, r5 800f79c: 9206 str r2, [sp, #24] 800f79e: 47b8 blx r7 800f7a0: 3001 adds r0, #1 800f7a2: f43f ae9c beq.w 800f4de <_printf_float+0xb6> 800f7a6: 9a06 ldr r2, [sp, #24] 800f7a8: f10b 0b01 add.w fp, fp, #1 800f7ac: e7bb b.n 800f726 <_printf_float+0x2fe> 800f7ae: e9dd 2304 ldrd r2, r3, [sp, #16] 800f7b2: 4631 mov r1, r6 800f7b4: 4628 mov r0, r5 800f7b6: 47b8 blx r7 800f7b8: 3001 adds r0, #1 800f7ba: d1c0 bne.n 800f73e <_printf_float+0x316> 800f7bc: e68f b.n 800f4de <_printf_float+0xb6> 800f7be: 9a06 ldr r2, [sp, #24] 800f7c0: 464b mov r3, r9 800f7c2: 4442 add r2, r8 800f7c4: 4631 mov r1, r6 800f7c6: 4628 mov r0, r5 800f7c8: 47b8 blx r7 800f7ca: 3001 adds r0, #1 800f7cc: d1c3 bne.n 800f756 <_printf_float+0x32e> 800f7ce: e686 b.n 800f4de <_printf_float+0xb6> 800f7d0: f8dd a028 ldr.w sl, [sp, #40] @ 0x28 800f7d4: f1ba 0f01 cmp.w sl, #1 800f7d8: dc01 bgt.n 800f7de <_printf_float+0x3b6> 800f7da: 07db lsls r3, r3, #31 800f7dc: d536 bpl.n 800f84c <_printf_float+0x424> 800f7de: 2301 movs r3, #1 800f7e0: 4642 mov r2, r8 800f7e2: 4631 mov r1, r6 800f7e4: 4628 mov r0, r5 800f7e6: 47b8 blx r7 800f7e8: 3001 adds r0, #1 800f7ea: f43f ae78 beq.w 800f4de <_printf_float+0xb6> 800f7ee: e9dd 2304 ldrd r2, r3, [sp, #16] 800f7f2: 4631 mov r1, r6 800f7f4: 4628 mov r0, r5 800f7f6: 47b8 blx r7 800f7f8: 3001 adds r0, #1 800f7fa: f43f ae70 beq.w 800f4de <_printf_float+0xb6> 800f7fe: e9d4 0112 ldrd r0, r1, [r4, #72] @ 0x48 800f802: 2200 movs r2, #0 800f804: 2300 movs r3, #0 800f806: f10a 3aff add.w sl, sl, #4294967295 @ 0xffffffff 800f80a: f7f1 f96d bl 8000ae8 <__aeabi_dcmpeq> 800f80e: b9c0 cbnz r0, 800f842 <_printf_float+0x41a> 800f810: 4653 mov r3, sl 800f812: f108 0201 add.w r2, r8, #1 800f816: 4631 mov r1, r6 800f818: 4628 mov r0, r5 800f81a: 47b8 blx r7 800f81c: 3001 adds r0, #1 800f81e: d10c bne.n 800f83a <_printf_float+0x412> 800f820: e65d b.n 800f4de <_printf_float+0xb6> 800f822: 2301 movs r3, #1 800f824: 465a mov r2, fp 800f826: 4631 mov r1, r6 800f828: 4628 mov r0, r5 800f82a: 47b8 blx r7 800f82c: 3001 adds r0, #1 800f82e: f43f ae56 beq.w 800f4de <_printf_float+0xb6> 800f832: f108 0801 add.w r8, r8, #1 800f836: 45d0 cmp r8, sl 800f838: dbf3 blt.n 800f822 <_printf_float+0x3fa> 800f83a: 464b mov r3, r9 800f83c: f104 0250 add.w r2, r4, #80 @ 0x50 800f840: e6df b.n 800f602 <_printf_float+0x1da> 800f842: f04f 0800 mov.w r8, #0 800f846: f104 0b1a add.w fp, r4, #26 800f84a: e7f4 b.n 800f836 <_printf_float+0x40e> 800f84c: 2301 movs r3, #1 800f84e: 4642 mov r2, r8 800f850: e7e1 b.n 800f816 <_printf_float+0x3ee> 800f852: 2301 movs r3, #1 800f854: 464a mov r2, r9 800f856: 4631 mov r1, r6 800f858: 4628 mov r0, r5 800f85a: 47b8 blx r7 800f85c: 3001 adds r0, #1 800f85e: f43f ae3e beq.w 800f4de <_printf_float+0xb6> 800f862: f108 0801 add.w r8, r8, #1 800f866: 68e3 ldr r3, [r4, #12] 800f868: 990b ldr r1, [sp, #44] @ 0x2c 800f86a: 1a5b subs r3, r3, r1 800f86c: 4543 cmp r3, r8 800f86e: dcf0 bgt.n 800f852 <_printf_float+0x42a> 800f870: e6fc b.n 800f66c <_printf_float+0x244> 800f872: f04f 0800 mov.w r8, #0 800f876: f104 0919 add.w r9, r4, #25 800f87a: e7f4 b.n 800f866 <_printf_float+0x43e> 0800f87c <_printf_common>: 800f87c: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} 800f880: 4616 mov r6, r2 800f882: 4698 mov r8, r3 800f884: 688a ldr r2, [r1, #8] 800f886: 690b ldr r3, [r1, #16] 800f888: f8dd 9020 ldr.w r9, [sp, #32] 800f88c: 4293 cmp r3, r2 800f88e: bfb8 it lt 800f890: 4613 movlt r3, r2 800f892: 6033 str r3, [r6, #0] 800f894: f891 2043 ldrb.w r2, [r1, #67] @ 0x43 800f898: 4607 mov r7, r0 800f89a: 460c mov r4, r1 800f89c: b10a cbz r2, 800f8a2 <_printf_common+0x26> 800f89e: 3301 adds r3, #1 800f8a0: 6033 str r3, [r6, #0] 800f8a2: 6823 ldr r3, [r4, #0] 800f8a4: 0699 lsls r1, r3, #26 800f8a6: bf42 ittt mi 800f8a8: 6833 ldrmi r3, [r6, #0] 800f8aa: 3302 addmi r3, #2 800f8ac: 6033 strmi r3, [r6, #0] 800f8ae: 6825 ldr r5, [r4, #0] 800f8b0: f015 0506 ands.w r5, r5, #6 800f8b4: d106 bne.n 800f8c4 <_printf_common+0x48> 800f8b6: f104 0a19 add.w sl, r4, #25 800f8ba: 68e3 ldr r3, [r4, #12] 800f8bc: 6832 ldr r2, [r6, #0] 800f8be: 1a9b subs r3, r3, r2 800f8c0: 42ab cmp r3, r5 800f8c2: dc26 bgt.n 800f912 <_printf_common+0x96> 800f8c4: f894 3043 ldrb.w r3, [r4, #67] @ 0x43 800f8c8: 6822 ldr r2, [r4, #0] 800f8ca: 3b00 subs r3, #0 800f8cc: bf18 it ne 800f8ce: 2301 movne r3, #1 800f8d0: 0692 lsls r2, r2, #26 800f8d2: d42b bmi.n 800f92c <_printf_common+0xb0> 800f8d4: f104 0243 add.w r2, r4, #67 @ 0x43 800f8d8: 4641 mov r1, r8 800f8da: 4638 mov r0, r7 800f8dc: 47c8 blx r9 800f8de: 3001 adds r0, #1 800f8e0: d01e beq.n 800f920 <_printf_common+0xa4> 800f8e2: 6823 ldr r3, [r4, #0] 800f8e4: 6922 ldr r2, [r4, #16] 800f8e6: f003 0306 and.w r3, r3, #6 800f8ea: 2b04 cmp r3, #4 800f8ec: bf02 ittt eq 800f8ee: 68e5 ldreq r5, [r4, #12] 800f8f0: 6833 ldreq r3, [r6, #0] 800f8f2: 1aed subeq r5, r5, r3 800f8f4: 68a3 ldr r3, [r4, #8] 800f8f6: bf0c ite eq 800f8f8: ea25 75e5 biceq.w r5, r5, r5, asr #31 800f8fc: 2500 movne r5, #0 800f8fe: 4293 cmp r3, r2 800f900: bfc4 itt gt 800f902: 1a9b subgt r3, r3, r2 800f904: 18ed addgt r5, r5, r3 800f906: 2600 movs r6, #0 800f908: 341a adds r4, #26 800f90a: 42b5 cmp r5, r6 800f90c: d11a bne.n 800f944 <_printf_common+0xc8> 800f90e: 2000 movs r0, #0 800f910: e008 b.n 800f924 <_printf_common+0xa8> 800f912: 2301 movs r3, #1 800f914: 4652 mov r2, sl 800f916: 4641 mov r1, r8 800f918: 4638 mov r0, r7 800f91a: 47c8 blx r9 800f91c: 3001 adds r0, #1 800f91e: d103 bne.n 800f928 <_printf_common+0xac> 800f920: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff 800f924: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 800f928: 3501 adds r5, #1 800f92a: e7c6 b.n 800f8ba <_printf_common+0x3e> 800f92c: 18e1 adds r1, r4, r3 800f92e: 1c5a adds r2, r3, #1 800f930: 2030 movs r0, #48 @ 0x30 800f932: f881 0043 strb.w r0, [r1, #67] @ 0x43 800f936: 4422 add r2, r4 800f938: f894 1045 ldrb.w r1, [r4, #69] @ 0x45 800f93c: f882 1043 strb.w r1, [r2, #67] @ 0x43 800f940: 3302 adds r3, #2 800f942: e7c7 b.n 800f8d4 <_printf_common+0x58> 800f944: 2301 movs r3, #1 800f946: 4622 mov r2, r4 800f948: 4641 mov r1, r8 800f94a: 4638 mov r0, r7 800f94c: 47c8 blx r9 800f94e: 3001 adds r0, #1 800f950: d0e6 beq.n 800f920 <_printf_common+0xa4> 800f952: 3601 adds r6, #1 800f954: e7d9 b.n 800f90a <_printf_common+0x8e> ... 0800f958 <_printf_i>: 800f958: e92d 47ff stmdb sp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, lr} 800f95c: 7e0f ldrb r7, [r1, #24] 800f95e: 9e0c ldr r6, [sp, #48] @ 0x30 800f960: 2f78 cmp r7, #120 @ 0x78 800f962: 4691 mov r9, r2 800f964: 4680 mov r8, r0 800f966: 460c mov r4, r1 800f968: 469a mov sl, r3 800f96a: f101 0243 add.w r2, r1, #67 @ 0x43 800f96e: d807 bhi.n 800f980 <_printf_i+0x28> 800f970: 2f62 cmp r7, #98 @ 0x62 800f972: d80a bhi.n 800f98a <_printf_i+0x32> 800f974: 2f00 cmp r7, #0 800f976: f000 80d1 beq.w 800fb1c <_printf_i+0x1c4> 800f97a: 2f58 cmp r7, #88 @ 0x58 800f97c: f000 80b8 beq.w 800faf0 <_printf_i+0x198> 800f980: f104 0642 add.w r6, r4, #66 @ 0x42 800f984: f884 7042 strb.w r7, [r4, #66] @ 0x42 800f988: e03a b.n 800fa00 <_printf_i+0xa8> 800f98a: f1a7 0363 sub.w r3, r7, #99 @ 0x63 800f98e: 2b15 cmp r3, #21 800f990: d8f6 bhi.n 800f980 <_printf_i+0x28> 800f992: a101 add r1, pc, #4 @ (adr r1, 800f998 <_printf_i+0x40>) 800f994: f851 f023 ldr.w pc, [r1, r3, lsl #2] 800f998: 0800f9f1 .word 0x0800f9f1 800f99c: 0800fa05 .word 0x0800fa05 800f9a0: 0800f981 .word 0x0800f981 800f9a4: 0800f981 .word 0x0800f981 800f9a8: 0800f981 .word 0x0800f981 800f9ac: 0800f981 .word 0x0800f981 800f9b0: 0800fa05 .word 0x0800fa05 800f9b4: 0800f981 .word 0x0800f981 800f9b8: 0800f981 .word 0x0800f981 800f9bc: 0800f981 .word 0x0800f981 800f9c0: 0800f981 .word 0x0800f981 800f9c4: 0800fb03 .word 0x0800fb03 800f9c8: 0800fa2f .word 0x0800fa2f 800f9cc: 0800fabd .word 0x0800fabd 800f9d0: 0800f981 .word 0x0800f981 800f9d4: 0800f981 .word 0x0800f981 800f9d8: 0800fb25 .word 0x0800fb25 800f9dc: 0800f981 .word 0x0800f981 800f9e0: 0800fa2f .word 0x0800fa2f 800f9e4: 0800f981 .word 0x0800f981 800f9e8: 0800f981 .word 0x0800f981 800f9ec: 0800fac5 .word 0x0800fac5 800f9f0: 6833 ldr r3, [r6, #0] 800f9f2: 1d1a adds r2, r3, #4 800f9f4: 681b ldr r3, [r3, #0] 800f9f6: 6032 str r2, [r6, #0] 800f9f8: f104 0642 add.w r6, r4, #66 @ 0x42 800f9fc: f884 3042 strb.w r3, [r4, #66] @ 0x42 800fa00: 2301 movs r3, #1 800fa02: e09c b.n 800fb3e <_printf_i+0x1e6> 800fa04: 6833 ldr r3, [r6, #0] 800fa06: 6820 ldr r0, [r4, #0] 800fa08: 1d19 adds r1, r3, #4 800fa0a: 6031 str r1, [r6, #0] 800fa0c: 0606 lsls r6, r0, #24 800fa0e: d501 bpl.n 800fa14 <_printf_i+0xbc> 800fa10: 681d ldr r5, [r3, #0] 800fa12: e003 b.n 800fa1c <_printf_i+0xc4> 800fa14: 0645 lsls r5, r0, #25 800fa16: d5fb bpl.n 800fa10 <_printf_i+0xb8> 800fa18: f9b3 5000 ldrsh.w r5, [r3] 800fa1c: 2d00 cmp r5, #0 800fa1e: da03 bge.n 800fa28 <_printf_i+0xd0> 800fa20: 232d movs r3, #45 @ 0x2d 800fa22: 426d negs r5, r5 800fa24: f884 3043 strb.w r3, [r4, #67] @ 0x43 800fa28: 4858 ldr r0, [pc, #352] @ (800fb8c <_printf_i+0x234>) 800fa2a: 230a movs r3, #10 800fa2c: e011 b.n 800fa52 <_printf_i+0xfa> 800fa2e: 6821 ldr r1, [r4, #0] 800fa30: 6833 ldr r3, [r6, #0] 800fa32: 0608 lsls r0, r1, #24 800fa34: f853 5b04 ldr.w r5, [r3], #4 800fa38: d402 bmi.n 800fa40 <_printf_i+0xe8> 800fa3a: 0649 lsls r1, r1, #25 800fa3c: bf48 it mi 800fa3e: b2ad uxthmi r5, r5 800fa40: 2f6f cmp r7, #111 @ 0x6f 800fa42: 4852 ldr r0, [pc, #328] @ (800fb8c <_printf_i+0x234>) 800fa44: 6033 str r3, [r6, #0] 800fa46: bf14 ite ne 800fa48: 230a movne r3, #10 800fa4a: 2308 moveq r3, #8 800fa4c: 2100 movs r1, #0 800fa4e: f884 1043 strb.w r1, [r4, #67] @ 0x43 800fa52: 6866 ldr r6, [r4, #4] 800fa54: 60a6 str r6, [r4, #8] 800fa56: 2e00 cmp r6, #0 800fa58: db05 blt.n 800fa66 <_printf_i+0x10e> 800fa5a: 6821 ldr r1, [r4, #0] 800fa5c: 432e orrs r6, r5 800fa5e: f021 0104 bic.w r1, r1, #4 800fa62: 6021 str r1, [r4, #0] 800fa64: d04b beq.n 800fafe <_printf_i+0x1a6> 800fa66: 4616 mov r6, r2 800fa68: fbb5 f1f3 udiv r1, r5, r3 800fa6c: fb03 5711 mls r7, r3, r1, r5 800fa70: 5dc7 ldrb r7, [r0, r7] 800fa72: f806 7d01 strb.w r7, [r6, #-1]! 800fa76: 462f mov r7, r5 800fa78: 42bb cmp r3, r7 800fa7a: 460d mov r5, r1 800fa7c: d9f4 bls.n 800fa68 <_printf_i+0x110> 800fa7e: 2b08 cmp r3, #8 800fa80: d10b bne.n 800fa9a <_printf_i+0x142> 800fa82: 6823 ldr r3, [r4, #0] 800fa84: 07df lsls r7, r3, #31 800fa86: d508 bpl.n 800fa9a <_printf_i+0x142> 800fa88: 6923 ldr r3, [r4, #16] 800fa8a: 6861 ldr r1, [r4, #4] 800fa8c: 4299 cmp r1, r3 800fa8e: bfde ittt le 800fa90: 2330 movle r3, #48 @ 0x30 800fa92: f806 3c01 strble.w r3, [r6, #-1] 800fa96: f106 36ff addle.w r6, r6, #4294967295 @ 0xffffffff 800fa9a: 1b92 subs r2, r2, r6 800fa9c: 6122 str r2, [r4, #16] 800fa9e: f8cd a000 str.w sl, [sp] 800faa2: 464b mov r3, r9 800faa4: aa03 add r2, sp, #12 800faa6: 4621 mov r1, r4 800faa8: 4640 mov r0, r8 800faaa: f7ff fee7 bl 800f87c <_printf_common> 800faae: 3001 adds r0, #1 800fab0: d14a bne.n 800fb48 <_printf_i+0x1f0> 800fab2: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff 800fab6: b004 add sp, #16 800fab8: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 800fabc: 6823 ldr r3, [r4, #0] 800fabe: f043 0320 orr.w r3, r3, #32 800fac2: 6023 str r3, [r4, #0] 800fac4: 4832 ldr r0, [pc, #200] @ (800fb90 <_printf_i+0x238>) 800fac6: 2778 movs r7, #120 @ 0x78 800fac8: f884 7045 strb.w r7, [r4, #69] @ 0x45 800facc: 6823 ldr r3, [r4, #0] 800face: 6831 ldr r1, [r6, #0] 800fad0: 061f lsls r7, r3, #24 800fad2: f851 5b04 ldr.w r5, [r1], #4 800fad6: d402 bmi.n 800fade <_printf_i+0x186> 800fad8: 065f lsls r7, r3, #25 800fada: bf48 it mi 800fadc: b2ad uxthmi r5, r5 800fade: 6031 str r1, [r6, #0] 800fae0: 07d9 lsls r1, r3, #31 800fae2: bf44 itt mi 800fae4: f043 0320 orrmi.w r3, r3, #32 800fae8: 6023 strmi r3, [r4, #0] 800faea: b11d cbz r5, 800faf4 <_printf_i+0x19c> 800faec: 2310 movs r3, #16 800faee: e7ad b.n 800fa4c <_printf_i+0xf4> 800faf0: 4826 ldr r0, [pc, #152] @ (800fb8c <_printf_i+0x234>) 800faf2: e7e9 b.n 800fac8 <_printf_i+0x170> 800faf4: 6823 ldr r3, [r4, #0] 800faf6: f023 0320 bic.w r3, r3, #32 800fafa: 6023 str r3, [r4, #0] 800fafc: e7f6 b.n 800faec <_printf_i+0x194> 800fafe: 4616 mov r6, r2 800fb00: e7bd b.n 800fa7e <_printf_i+0x126> 800fb02: 6833 ldr r3, [r6, #0] 800fb04: 6825 ldr r5, [r4, #0] 800fb06: 6961 ldr r1, [r4, #20] 800fb08: 1d18 adds r0, r3, #4 800fb0a: 6030 str r0, [r6, #0] 800fb0c: 062e lsls r6, r5, #24 800fb0e: 681b ldr r3, [r3, #0] 800fb10: d501 bpl.n 800fb16 <_printf_i+0x1be> 800fb12: 6019 str r1, [r3, #0] 800fb14: e002 b.n 800fb1c <_printf_i+0x1c4> 800fb16: 0668 lsls r0, r5, #25 800fb18: d5fb bpl.n 800fb12 <_printf_i+0x1ba> 800fb1a: 8019 strh r1, [r3, #0] 800fb1c: 2300 movs r3, #0 800fb1e: 6123 str r3, [r4, #16] 800fb20: 4616 mov r6, r2 800fb22: e7bc b.n 800fa9e <_printf_i+0x146> 800fb24: 6833 ldr r3, [r6, #0] 800fb26: 1d1a adds r2, r3, #4 800fb28: 6032 str r2, [r6, #0] 800fb2a: 681e ldr r6, [r3, #0] 800fb2c: 6862 ldr r2, [r4, #4] 800fb2e: 2100 movs r1, #0 800fb30: 4630 mov r0, r6 800fb32: f7f0 fb5d bl 80001f0 800fb36: b108 cbz r0, 800fb3c <_printf_i+0x1e4> 800fb38: 1b80 subs r0, r0, r6 800fb3a: 6060 str r0, [r4, #4] 800fb3c: 6863 ldr r3, [r4, #4] 800fb3e: 6123 str r3, [r4, #16] 800fb40: 2300 movs r3, #0 800fb42: f884 3043 strb.w r3, [r4, #67] @ 0x43 800fb46: e7aa b.n 800fa9e <_printf_i+0x146> 800fb48: 6923 ldr r3, [r4, #16] 800fb4a: 4632 mov r2, r6 800fb4c: 4649 mov r1, r9 800fb4e: 4640 mov r0, r8 800fb50: 47d0 blx sl 800fb52: 3001 adds r0, #1 800fb54: d0ad beq.n 800fab2 <_printf_i+0x15a> 800fb56: 6823 ldr r3, [r4, #0] 800fb58: 079b lsls r3, r3, #30 800fb5a: d413 bmi.n 800fb84 <_printf_i+0x22c> 800fb5c: 68e0 ldr r0, [r4, #12] 800fb5e: 9b03 ldr r3, [sp, #12] 800fb60: 4298 cmp r0, r3 800fb62: bfb8 it lt 800fb64: 4618 movlt r0, r3 800fb66: e7a6 b.n 800fab6 <_printf_i+0x15e> 800fb68: 2301 movs r3, #1 800fb6a: 4632 mov r2, r6 800fb6c: 4649 mov r1, r9 800fb6e: 4640 mov r0, r8 800fb70: 47d0 blx sl 800fb72: 3001 adds r0, #1 800fb74: d09d beq.n 800fab2 <_printf_i+0x15a> 800fb76: 3501 adds r5, #1 800fb78: 68e3 ldr r3, [r4, #12] 800fb7a: 9903 ldr r1, [sp, #12] 800fb7c: 1a5b subs r3, r3, r1 800fb7e: 42ab cmp r3, r5 800fb80: dcf2 bgt.n 800fb68 <_printf_i+0x210> 800fb82: e7eb b.n 800fb5c <_printf_i+0x204> 800fb84: 2500 movs r5, #0 800fb86: f104 0619 add.w r6, r4, #25 800fb8a: e7f5 b.n 800fb78 <_printf_i+0x220> 800fb8c: 08014f14 .word 0x08014f14 800fb90: 08014f25 .word 0x08014f25 0800fb94 <_scanf_float>: 800fb94: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 800fb98: b087 sub sp, #28 800fb9a: 4691 mov r9, r2 800fb9c: 9303 str r3, [sp, #12] 800fb9e: 688b ldr r3, [r1, #8] 800fba0: 1e5a subs r2, r3, #1 800fba2: f5b2 7fae cmp.w r2, #348 @ 0x15c 800fba6: bf81 itttt hi 800fba8: f46f 75ae mvnhi.w r5, #348 @ 0x15c 800fbac: eb03 0b05 addhi.w fp, r3, r5 800fbb0: f240 135d movwhi r3, #349 @ 0x15d 800fbb4: 608b strhi r3, [r1, #8] 800fbb6: 680b ldr r3, [r1, #0] 800fbb8: 460a mov r2, r1 800fbba: f04f 0500 mov.w r5, #0 800fbbe: f443 63f0 orr.w r3, r3, #1920 @ 0x780 800fbc2: f842 3b1c str.w r3, [r2], #28 800fbc6: e9cd 5504 strd r5, r5, [sp, #16] 800fbca: 4680 mov r8, r0 800fbcc: 460c mov r4, r1 800fbce: bf98 it ls 800fbd0: f04f 0b00 movls.w fp, #0 800fbd4: 9201 str r2, [sp, #4] 800fbd6: 4616 mov r6, r2 800fbd8: 46aa mov sl, r5 800fbda: 462f mov r7, r5 800fbdc: 9502 str r5, [sp, #8] 800fbde: 68a2 ldr r2, [r4, #8] 800fbe0: b15a cbz r2, 800fbfa <_scanf_float+0x66> 800fbe2: f8d9 3000 ldr.w r3, [r9] 800fbe6: 781b ldrb r3, [r3, #0] 800fbe8: 2b4e cmp r3, #78 @ 0x4e 800fbea: d863 bhi.n 800fcb4 <_scanf_float+0x120> 800fbec: 2b40 cmp r3, #64 @ 0x40 800fbee: d83b bhi.n 800fc68 <_scanf_float+0xd4> 800fbf0: f1a3 012b sub.w r1, r3, #43 @ 0x2b 800fbf4: b2c8 uxtb r0, r1 800fbf6: 280e cmp r0, #14 800fbf8: d939 bls.n 800fc6e <_scanf_float+0xda> 800fbfa: b11f cbz r7, 800fc04 <_scanf_float+0x70> 800fbfc: 6823 ldr r3, [r4, #0] 800fbfe: f423 7380 bic.w r3, r3, #256 @ 0x100 800fc02: 6023 str r3, [r4, #0] 800fc04: f10a 3aff add.w sl, sl, #4294967295 @ 0xffffffff 800fc08: f1ba 0f01 cmp.w sl, #1 800fc0c: f200 8114 bhi.w 800fe38 <_scanf_float+0x2a4> 800fc10: 9b01 ldr r3, [sp, #4] 800fc12: 429e cmp r6, r3 800fc14: f200 8105 bhi.w 800fe22 <_scanf_float+0x28e> 800fc18: 2001 movs r0, #1 800fc1a: b007 add sp, #28 800fc1c: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} 800fc20: f1a3 0261 sub.w r2, r3, #97 @ 0x61 800fc24: 2a0d cmp r2, #13 800fc26: d8e8 bhi.n 800fbfa <_scanf_float+0x66> 800fc28: a101 add r1, pc, #4 @ (adr r1, 800fc30 <_scanf_float+0x9c>) 800fc2a: f851 f022 ldr.w pc, [r1, r2, lsl #2] 800fc2e: bf00 nop 800fc30: 0800fd79 .word 0x0800fd79 800fc34: 0800fbfb .word 0x0800fbfb 800fc38: 0800fbfb .word 0x0800fbfb 800fc3c: 0800fbfb .word 0x0800fbfb 800fc40: 0800fdd5 .word 0x0800fdd5 800fc44: 0800fdaf .word 0x0800fdaf 800fc48: 0800fbfb .word 0x0800fbfb 800fc4c: 0800fbfb .word 0x0800fbfb 800fc50: 0800fd87 .word 0x0800fd87 800fc54: 0800fbfb .word 0x0800fbfb 800fc58: 0800fbfb .word 0x0800fbfb 800fc5c: 0800fbfb .word 0x0800fbfb 800fc60: 0800fbfb .word 0x0800fbfb 800fc64: 0800fd43 .word 0x0800fd43 800fc68: f1a3 0241 sub.w r2, r3, #65 @ 0x41 800fc6c: e7da b.n 800fc24 <_scanf_float+0x90> 800fc6e: 290e cmp r1, #14 800fc70: d8c3 bhi.n 800fbfa <_scanf_float+0x66> 800fc72: a001 add r0, pc, #4 @ (adr r0, 800fc78 <_scanf_float+0xe4>) 800fc74: f850 f021 ldr.w pc, [r0, r1, lsl #2] 800fc78: 0800fd33 .word 0x0800fd33 800fc7c: 0800fbfb .word 0x0800fbfb 800fc80: 0800fd33 .word 0x0800fd33 800fc84: 0800fdc3 .word 0x0800fdc3 800fc88: 0800fbfb .word 0x0800fbfb 800fc8c: 0800fcd5 .word 0x0800fcd5 800fc90: 0800fd19 .word 0x0800fd19 800fc94: 0800fd19 .word 0x0800fd19 800fc98: 0800fd19 .word 0x0800fd19 800fc9c: 0800fd19 .word 0x0800fd19 800fca0: 0800fd19 .word 0x0800fd19 800fca4: 0800fd19 .word 0x0800fd19 800fca8: 0800fd19 .word 0x0800fd19 800fcac: 0800fd19 .word 0x0800fd19 800fcb0: 0800fd19 .word 0x0800fd19 800fcb4: 2b6e cmp r3, #110 @ 0x6e 800fcb6: d809 bhi.n 800fccc <_scanf_float+0x138> 800fcb8: 2b60 cmp r3, #96 @ 0x60 800fcba: d8b1 bhi.n 800fc20 <_scanf_float+0x8c> 800fcbc: 2b54 cmp r3, #84 @ 0x54 800fcbe: d07b beq.n 800fdb8 <_scanf_float+0x224> 800fcc0: 2b59 cmp r3, #89 @ 0x59 800fcc2: d19a bne.n 800fbfa <_scanf_float+0x66> 800fcc4: 2d07 cmp r5, #7 800fcc6: d198 bne.n 800fbfa <_scanf_float+0x66> 800fcc8: 2508 movs r5, #8 800fcca: e02f b.n 800fd2c <_scanf_float+0x198> 800fccc: 2b74 cmp r3, #116 @ 0x74 800fcce: d073 beq.n 800fdb8 <_scanf_float+0x224> 800fcd0: 2b79 cmp r3, #121 @ 0x79 800fcd2: e7f6 b.n 800fcc2 <_scanf_float+0x12e> 800fcd4: 6821 ldr r1, [r4, #0] 800fcd6: 05c8 lsls r0, r1, #23 800fcd8: d51e bpl.n 800fd18 <_scanf_float+0x184> 800fcda: f021 0180 bic.w r1, r1, #128 @ 0x80 800fcde: 6021 str r1, [r4, #0] 800fce0: 3701 adds r7, #1 800fce2: f1bb 0f00 cmp.w fp, #0 800fce6: d003 beq.n 800fcf0 <_scanf_float+0x15c> 800fce8: 3201 adds r2, #1 800fcea: f10b 3bff add.w fp, fp, #4294967295 @ 0xffffffff 800fcee: 60a2 str r2, [r4, #8] 800fcf0: 68a3 ldr r3, [r4, #8] 800fcf2: 3b01 subs r3, #1 800fcf4: 60a3 str r3, [r4, #8] 800fcf6: 6923 ldr r3, [r4, #16] 800fcf8: 3301 adds r3, #1 800fcfa: 6123 str r3, [r4, #16] 800fcfc: f8d9 3004 ldr.w r3, [r9, #4] 800fd00: 3b01 subs r3, #1 800fd02: 2b00 cmp r3, #0 800fd04: f8c9 3004 str.w r3, [r9, #4] 800fd08: f340 8082 ble.w 800fe10 <_scanf_float+0x27c> 800fd0c: f8d9 3000 ldr.w r3, [r9] 800fd10: 3301 adds r3, #1 800fd12: f8c9 3000 str.w r3, [r9] 800fd16: e762 b.n 800fbde <_scanf_float+0x4a> 800fd18: eb1a 0105 adds.w r1, sl, r5 800fd1c: f47f af6d bne.w 800fbfa <_scanf_float+0x66> 800fd20: 6822 ldr r2, [r4, #0] 800fd22: f422 72c0 bic.w r2, r2, #384 @ 0x180 800fd26: 6022 str r2, [r4, #0] 800fd28: 460d mov r5, r1 800fd2a: 468a mov sl, r1 800fd2c: f806 3b01 strb.w r3, [r6], #1 800fd30: e7de b.n 800fcf0 <_scanf_float+0x15c> 800fd32: 6822 ldr r2, [r4, #0] 800fd34: 0610 lsls r0, r2, #24 800fd36: f57f af60 bpl.w 800fbfa <_scanf_float+0x66> 800fd3a: f022 0280 bic.w r2, r2, #128 @ 0x80 800fd3e: 6022 str r2, [r4, #0] 800fd40: e7f4 b.n 800fd2c <_scanf_float+0x198> 800fd42: f1ba 0f00 cmp.w sl, #0 800fd46: d10c bne.n 800fd62 <_scanf_float+0x1ce> 800fd48: b977 cbnz r7, 800fd68 <_scanf_float+0x1d4> 800fd4a: 6822 ldr r2, [r4, #0] 800fd4c: f402 61e0 and.w r1, r2, #1792 @ 0x700 800fd50: f5b1 6fe0 cmp.w r1, #1792 @ 0x700 800fd54: d108 bne.n 800fd68 <_scanf_float+0x1d4> 800fd56: f422 62f0 bic.w r2, r2, #1920 @ 0x780 800fd5a: 6022 str r2, [r4, #0] 800fd5c: f04f 0a01 mov.w sl, #1 800fd60: e7e4 b.n 800fd2c <_scanf_float+0x198> 800fd62: f1ba 0f02 cmp.w sl, #2 800fd66: d050 beq.n 800fe0a <_scanf_float+0x276> 800fd68: 2d01 cmp r5, #1 800fd6a: d002 beq.n 800fd72 <_scanf_float+0x1de> 800fd6c: 2d04 cmp r5, #4 800fd6e: f47f af44 bne.w 800fbfa <_scanf_float+0x66> 800fd72: 3501 adds r5, #1 800fd74: b2ed uxtb r5, r5 800fd76: e7d9 b.n 800fd2c <_scanf_float+0x198> 800fd78: f1ba 0f01 cmp.w sl, #1 800fd7c: f47f af3d bne.w 800fbfa <_scanf_float+0x66> 800fd80: f04f 0a02 mov.w sl, #2 800fd84: e7d2 b.n 800fd2c <_scanf_float+0x198> 800fd86: b975 cbnz r5, 800fda6 <_scanf_float+0x212> 800fd88: 2f00 cmp r7, #0 800fd8a: f47f af37 bne.w 800fbfc <_scanf_float+0x68> 800fd8e: 6822 ldr r2, [r4, #0] 800fd90: f402 61e0 and.w r1, r2, #1792 @ 0x700 800fd94: f5b1 6fe0 cmp.w r1, #1792 @ 0x700 800fd98: f040 8103 bne.w 800ffa2 <_scanf_float+0x40e> 800fd9c: f422 62f0 bic.w r2, r2, #1920 @ 0x780 800fda0: 6022 str r2, [r4, #0] 800fda2: 2501 movs r5, #1 800fda4: e7c2 b.n 800fd2c <_scanf_float+0x198> 800fda6: 2d03 cmp r5, #3 800fda8: d0e3 beq.n 800fd72 <_scanf_float+0x1de> 800fdaa: 2d05 cmp r5, #5 800fdac: e7df b.n 800fd6e <_scanf_float+0x1da> 800fdae: 2d02 cmp r5, #2 800fdb0: f47f af23 bne.w 800fbfa <_scanf_float+0x66> 800fdb4: 2503 movs r5, #3 800fdb6: e7b9 b.n 800fd2c <_scanf_float+0x198> 800fdb8: 2d06 cmp r5, #6 800fdba: f47f af1e bne.w 800fbfa <_scanf_float+0x66> 800fdbe: 2507 movs r5, #7 800fdc0: e7b4 b.n 800fd2c <_scanf_float+0x198> 800fdc2: 6822 ldr r2, [r4, #0] 800fdc4: 0591 lsls r1, r2, #22 800fdc6: f57f af18 bpl.w 800fbfa <_scanf_float+0x66> 800fdca: f422 7220 bic.w r2, r2, #640 @ 0x280 800fdce: 6022 str r2, [r4, #0] 800fdd0: 9702 str r7, [sp, #8] 800fdd2: e7ab b.n 800fd2c <_scanf_float+0x198> 800fdd4: 6822 ldr r2, [r4, #0] 800fdd6: f402 61a0 and.w r1, r2, #1280 @ 0x500 800fdda: f5b1 6f80 cmp.w r1, #1024 @ 0x400 800fdde: d005 beq.n 800fdec <_scanf_float+0x258> 800fde0: 0550 lsls r0, r2, #21 800fde2: f57f af0a bpl.w 800fbfa <_scanf_float+0x66> 800fde6: 2f00 cmp r7, #0 800fde8: f000 80db beq.w 800ffa2 <_scanf_float+0x40e> 800fdec: 0591 lsls r1, r2, #22 800fdee: bf58 it pl 800fdf0: 9902 ldrpl r1, [sp, #8] 800fdf2: f422 62f0 bic.w r2, r2, #1920 @ 0x780 800fdf6: bf58 it pl 800fdf8: 1a79 subpl r1, r7, r1 800fdfa: f442 72c0 orr.w r2, r2, #384 @ 0x180 800fdfe: bf58 it pl 800fe00: e9cd 1604 strdpl r1, r6, [sp, #16] 800fe04: 6022 str r2, [r4, #0] 800fe06: 2700 movs r7, #0 800fe08: e790 b.n 800fd2c <_scanf_float+0x198> 800fe0a: f04f 0a03 mov.w sl, #3 800fe0e: e78d b.n 800fd2c <_scanf_float+0x198> 800fe10: f8d4 3180 ldr.w r3, [r4, #384] @ 0x180 800fe14: 4649 mov r1, r9 800fe16: 4640 mov r0, r8 800fe18: 4798 blx r3 800fe1a: 2800 cmp r0, #0 800fe1c: f43f aedf beq.w 800fbde <_scanf_float+0x4a> 800fe20: e6eb b.n 800fbfa <_scanf_float+0x66> 800fe22: f8d4 317c ldr.w r3, [r4, #380] @ 0x17c 800fe26: f816 1d01 ldrb.w r1, [r6, #-1]! 800fe2a: 464a mov r2, r9 800fe2c: 4640 mov r0, r8 800fe2e: 4798 blx r3 800fe30: 6923 ldr r3, [r4, #16] 800fe32: 3b01 subs r3, #1 800fe34: 6123 str r3, [r4, #16] 800fe36: e6eb b.n 800fc10 <_scanf_float+0x7c> 800fe38: 1e6b subs r3, r5, #1 800fe3a: 2b06 cmp r3, #6 800fe3c: d824 bhi.n 800fe88 <_scanf_float+0x2f4> 800fe3e: 2d02 cmp r5, #2 800fe40: d836 bhi.n 800feb0 <_scanf_float+0x31c> 800fe42: 9b01 ldr r3, [sp, #4] 800fe44: 429e cmp r6, r3 800fe46: f67f aee7 bls.w 800fc18 <_scanf_float+0x84> 800fe4a: f8d4 317c ldr.w r3, [r4, #380] @ 0x17c 800fe4e: f816 1d01 ldrb.w r1, [r6, #-1]! 800fe52: 464a mov r2, r9 800fe54: 4640 mov r0, r8 800fe56: 4798 blx r3 800fe58: 6923 ldr r3, [r4, #16] 800fe5a: 3b01 subs r3, #1 800fe5c: 6123 str r3, [r4, #16] 800fe5e: e7f0 b.n 800fe42 <_scanf_float+0x2ae> 800fe60: f8d4 317c ldr.w r3, [r4, #380] @ 0x17c 800fe64: f81b 1d01 ldrb.w r1, [fp, #-1]! 800fe68: 464a mov r2, r9 800fe6a: 4640 mov r0, r8 800fe6c: 4798 blx r3 800fe6e: 6923 ldr r3, [r4, #16] 800fe70: 3b01 subs r3, #1 800fe72: 6123 str r3, [r4, #16] 800fe74: f10a 3aff add.w sl, sl, #4294967295 @ 0xffffffff 800fe78: fa5f fa8a uxtb.w sl, sl 800fe7c: f1ba 0f02 cmp.w sl, #2 800fe80: d1ee bne.n 800fe60 <_scanf_float+0x2cc> 800fe82: 3d03 subs r5, #3 800fe84: b2ed uxtb r5, r5 800fe86: 1b76 subs r6, r6, r5 800fe88: 6823 ldr r3, [r4, #0] 800fe8a: 05da lsls r2, r3, #23 800fe8c: d530 bpl.n 800fef0 <_scanf_float+0x35c> 800fe8e: 055b lsls r3, r3, #21 800fe90: d511 bpl.n 800feb6 <_scanf_float+0x322> 800fe92: 9b01 ldr r3, [sp, #4] 800fe94: 429e cmp r6, r3 800fe96: f67f aebf bls.w 800fc18 <_scanf_float+0x84> 800fe9a: f8d4 317c ldr.w r3, [r4, #380] @ 0x17c 800fe9e: f816 1d01 ldrb.w r1, [r6, #-1]! 800fea2: 464a mov r2, r9 800fea4: 4640 mov r0, r8 800fea6: 4798 blx r3 800fea8: 6923 ldr r3, [r4, #16] 800feaa: 3b01 subs r3, #1 800feac: 6123 str r3, [r4, #16] 800feae: e7f0 b.n 800fe92 <_scanf_float+0x2fe> 800feb0: 46aa mov sl, r5 800feb2: 46b3 mov fp, r6 800feb4: e7de b.n 800fe74 <_scanf_float+0x2e0> 800feb6: f816 1c01 ldrb.w r1, [r6, #-1] 800feba: 6923 ldr r3, [r4, #16] 800febc: 2965 cmp r1, #101 @ 0x65 800febe: f103 33ff add.w r3, r3, #4294967295 @ 0xffffffff 800fec2: f106 35ff add.w r5, r6, #4294967295 @ 0xffffffff 800fec6: 6123 str r3, [r4, #16] 800fec8: d00c beq.n 800fee4 <_scanf_float+0x350> 800feca: 2945 cmp r1, #69 @ 0x45 800fecc: d00a beq.n 800fee4 <_scanf_float+0x350> 800fece: f8d4 317c ldr.w r3, [r4, #380] @ 0x17c 800fed2: 464a mov r2, r9 800fed4: 4640 mov r0, r8 800fed6: 4798 blx r3 800fed8: 6923 ldr r3, [r4, #16] 800feda: f816 1c02 ldrb.w r1, [r6, #-2] 800fede: 3b01 subs r3, #1 800fee0: 1eb5 subs r5, r6, #2 800fee2: 6123 str r3, [r4, #16] 800fee4: f8d4 317c ldr.w r3, [r4, #380] @ 0x17c 800fee8: 464a mov r2, r9 800feea: 4640 mov r0, r8 800feec: 4798 blx r3 800feee: 462e mov r6, r5 800fef0: 6822 ldr r2, [r4, #0] 800fef2: f012 0210 ands.w r2, r2, #16 800fef6: d001 beq.n 800fefc <_scanf_float+0x368> 800fef8: 2000 movs r0, #0 800fefa: e68e b.n 800fc1a <_scanf_float+0x86> 800fefc: 7032 strb r2, [r6, #0] 800fefe: 6823 ldr r3, [r4, #0] 800ff00: f403 63c0 and.w r3, r3, #1536 @ 0x600 800ff04: f5b3 6f80 cmp.w r3, #1024 @ 0x400 800ff08: d125 bne.n 800ff56 <_scanf_float+0x3c2> 800ff0a: 9b02 ldr r3, [sp, #8] 800ff0c: 429f cmp r7, r3 800ff0e: d00a beq.n 800ff26 <_scanf_float+0x392> 800ff10: 1bda subs r2, r3, r7 800ff12: f204 136f addw r3, r4, #367 @ 0x16f 800ff16: 429e cmp r6, r3 800ff18: bf28 it cs 800ff1a: f504 76b7 addcs.w r6, r4, #366 @ 0x16e 800ff1e: 4922 ldr r1, [pc, #136] @ (800ffa8 <_scanf_float+0x414>) 800ff20: 4630 mov r0, r6 800ff22: f000 f9ad bl 8010280 800ff26: 9901 ldr r1, [sp, #4] 800ff28: 2200 movs r2, #0 800ff2a: 4640 mov r0, r8 800ff2c: f002 fe30 bl 8012b90 <_strtod_r> 800ff30: 9b03 ldr r3, [sp, #12] 800ff32: 6821 ldr r1, [r4, #0] 800ff34: 681b ldr r3, [r3, #0] 800ff36: f011 0f02 tst.w r1, #2 800ff3a: ec57 6b10 vmov r6, r7, d0 800ff3e: f103 0204 add.w r2, r3, #4 800ff42: d015 beq.n 800ff70 <_scanf_float+0x3dc> 800ff44: 9903 ldr r1, [sp, #12] 800ff46: 600a str r2, [r1, #0] 800ff48: 681b ldr r3, [r3, #0] 800ff4a: e9c3 6700 strd r6, r7, [r3] 800ff4e: 68e3 ldr r3, [r4, #12] 800ff50: 3301 adds r3, #1 800ff52: 60e3 str r3, [r4, #12] 800ff54: e7d0 b.n 800fef8 <_scanf_float+0x364> 800ff56: 9b04 ldr r3, [sp, #16] 800ff58: 2b00 cmp r3, #0 800ff5a: d0e4 beq.n 800ff26 <_scanf_float+0x392> 800ff5c: 9905 ldr r1, [sp, #20] 800ff5e: 230a movs r3, #10 800ff60: 3101 adds r1, #1 800ff62: 4640 mov r0, r8 800ff64: f002 fe94 bl 8012c90 <_strtol_r> 800ff68: 9b04 ldr r3, [sp, #16] 800ff6a: 9e05 ldr r6, [sp, #20] 800ff6c: 1ac2 subs r2, r0, r3 800ff6e: e7d0 b.n 800ff12 <_scanf_float+0x37e> 800ff70: f011 0f04 tst.w r1, #4 800ff74: 9903 ldr r1, [sp, #12] 800ff76: 600a str r2, [r1, #0] 800ff78: d1e6 bne.n 800ff48 <_scanf_float+0x3b4> 800ff7a: 681d ldr r5, [r3, #0] 800ff7c: 4632 mov r2, r6 800ff7e: 463b mov r3, r7 800ff80: 4630 mov r0, r6 800ff82: 4639 mov r1, r7 800ff84: f7f0 fde2 bl 8000b4c <__aeabi_dcmpun> 800ff88: b128 cbz r0, 800ff96 <_scanf_float+0x402> 800ff8a: 4808 ldr r0, [pc, #32] @ (800ffac <_scanf_float+0x418>) 800ff8c: f000 fbd6 bl 801073c 800ff90: ed85 0a00 vstr s0, [r5] 800ff94: e7db b.n 800ff4e <_scanf_float+0x3ba> 800ff96: 4630 mov r0, r6 800ff98: 4639 mov r1, r7 800ff9a: f7f0 fe35 bl 8000c08 <__aeabi_d2f> 800ff9e: 6028 str r0, [r5, #0] 800ffa0: e7d5 b.n 800ff4e <_scanf_float+0x3ba> 800ffa2: 2700 movs r7, #0 800ffa4: e62e b.n 800fc04 <_scanf_float+0x70> 800ffa6: bf00 nop 800ffa8: 08014f36 .word 0x08014f36 800ffac: 08014fe7 .word 0x08014fe7 0800ffb0 : 800ffb0: 2300 movs r3, #0 800ffb2: b510 push {r4, lr} 800ffb4: 4604 mov r4, r0 800ffb6: e9c0 3300 strd r3, r3, [r0] 800ffba: e9c0 3304 strd r3, r3, [r0, #16] 800ffbe: 6083 str r3, [r0, #8] 800ffc0: 8181 strh r1, [r0, #12] 800ffc2: 6643 str r3, [r0, #100] @ 0x64 800ffc4: 81c2 strh r2, [r0, #14] 800ffc6: 6183 str r3, [r0, #24] 800ffc8: 4619 mov r1, r3 800ffca: 2208 movs r2, #8 800ffcc: 305c adds r0, #92 @ 0x5c 800ffce: f000 fa8f bl 80104f0 800ffd2: 4b0d ldr r3, [pc, #52] @ (8010008 ) 800ffd4: 6263 str r3, [r4, #36] @ 0x24 800ffd6: 4b0d ldr r3, [pc, #52] @ (801000c ) 800ffd8: 62a3 str r3, [r4, #40] @ 0x28 800ffda: 4b0d ldr r3, [pc, #52] @ (8010010 ) 800ffdc: 62e3 str r3, [r4, #44] @ 0x2c 800ffde: 4b0d ldr r3, [pc, #52] @ (8010014 ) 800ffe0: 6323 str r3, [r4, #48] @ 0x30 800ffe2: 4b0d ldr r3, [pc, #52] @ (8010018 ) 800ffe4: 6224 str r4, [r4, #32] 800ffe6: 429c cmp r4, r3 800ffe8: d006 beq.n 800fff8 800ffea: f103 0268 add.w r2, r3, #104 @ 0x68 800ffee: 4294 cmp r4, r2 800fff0: d002 beq.n 800fff8 800fff2: 33d0 adds r3, #208 @ 0xd0 800fff4: 429c cmp r4, r3 800fff6: d105 bne.n 8010004 800fff8: f104 0058 add.w r0, r4, #88 @ 0x58 800fffc: e8bd 4010 ldmia.w sp!, {r4, lr} 8010000: f000 bb8a b.w 8010718 <__retarget_lock_init_recursive> 8010004: bd10 pop {r4, pc} 8010006: bf00 nop 8010008: 0801031d .word 0x0801031d 801000c: 08010343 .word 0x08010343 8010010: 0801037b .word 0x0801037b 8010014: 0801039f .word 0x0801039f 8010018: 20003564 .word 0x20003564 0801001c : 801001c: 4a02 ldr r2, [pc, #8] @ (8010028 ) 801001e: 4903 ldr r1, [pc, #12] @ (801002c ) 8010020: 4803 ldr r0, [pc, #12] @ (8010030 ) 8010022: f000 b869 b.w 80100f8 <_fwalk_sglue> 8010026: bf00 nop 8010028: 200000d4 .word 0x200000d4 801002c: 0801390d .word 0x0801390d 8010030: 200000e4 .word 0x200000e4 08010034 : 8010034: 6841 ldr r1, [r0, #4] 8010036: 4b0c ldr r3, [pc, #48] @ (8010068 ) 8010038: 4299 cmp r1, r3 801003a: b510 push {r4, lr} 801003c: 4604 mov r4, r0 801003e: d001 beq.n 8010044 8010040: f003 fc64 bl 801390c <_fflush_r> 8010044: 68a1 ldr r1, [r4, #8] 8010046: 4b09 ldr r3, [pc, #36] @ (801006c ) 8010048: 4299 cmp r1, r3 801004a: d002 beq.n 8010052 801004c: 4620 mov r0, r4 801004e: f003 fc5d bl 801390c <_fflush_r> 8010052: 68e1 ldr r1, [r4, #12] 8010054: 4b06 ldr r3, [pc, #24] @ (8010070 ) 8010056: 4299 cmp r1, r3 8010058: d004 beq.n 8010064 801005a: 4620 mov r0, r4 801005c: e8bd 4010 ldmia.w sp!, {r4, lr} 8010060: f003 bc54 b.w 801390c <_fflush_r> 8010064: bd10 pop {r4, pc} 8010066: bf00 nop 8010068: 20003564 .word 0x20003564 801006c: 200035cc .word 0x200035cc 8010070: 20003634 .word 0x20003634 08010074 : 8010074: b510 push {r4, lr} 8010076: 4b0b ldr r3, [pc, #44] @ (80100a4 ) 8010078: 4c0b ldr r4, [pc, #44] @ (80100a8 ) 801007a: 4a0c ldr r2, [pc, #48] @ (80100ac ) 801007c: 601a str r2, [r3, #0] 801007e: 4620 mov r0, r4 8010080: 2200 movs r2, #0 8010082: 2104 movs r1, #4 8010084: f7ff ff94 bl 800ffb0 8010088: f104 0068 add.w r0, r4, #104 @ 0x68 801008c: 2201 movs r2, #1 801008e: 2109 movs r1, #9 8010090: f7ff ff8e bl 800ffb0 8010094: f104 00d0 add.w r0, r4, #208 @ 0xd0 8010098: 2202 movs r2, #2 801009a: e8bd 4010 ldmia.w sp!, {r4, lr} 801009e: 2112 movs r1, #18 80100a0: f7ff bf86 b.w 800ffb0 80100a4: 2000369c .word 0x2000369c 80100a8: 20003564 .word 0x20003564 80100ac: 0801001d .word 0x0801001d 080100b0 <__sfp_lock_acquire>: 80100b0: 4801 ldr r0, [pc, #4] @ (80100b8 <__sfp_lock_acquire+0x8>) 80100b2: f000 bb32 b.w 801071a <__retarget_lock_acquire_recursive> 80100b6: bf00 nop 80100b8: 200036a5 .word 0x200036a5 080100bc <__sfp_lock_release>: 80100bc: 4801 ldr r0, [pc, #4] @ (80100c4 <__sfp_lock_release+0x8>) 80100be: f000 bb2d b.w 801071c <__retarget_lock_release_recursive> 80100c2: bf00 nop 80100c4: 200036a5 .word 0x200036a5 080100c8 <__sinit>: 80100c8: b510 push {r4, lr} 80100ca: 4604 mov r4, r0 80100cc: f7ff fff0 bl 80100b0 <__sfp_lock_acquire> 80100d0: 6a23 ldr r3, [r4, #32] 80100d2: b11b cbz r3, 80100dc <__sinit+0x14> 80100d4: e8bd 4010 ldmia.w sp!, {r4, lr} 80100d8: f7ff bff0 b.w 80100bc <__sfp_lock_release> 80100dc: 4b04 ldr r3, [pc, #16] @ (80100f0 <__sinit+0x28>) 80100de: 6223 str r3, [r4, #32] 80100e0: 4b04 ldr r3, [pc, #16] @ (80100f4 <__sinit+0x2c>) 80100e2: 681b ldr r3, [r3, #0] 80100e4: 2b00 cmp r3, #0 80100e6: d1f5 bne.n 80100d4 <__sinit+0xc> 80100e8: f7ff ffc4 bl 8010074 80100ec: e7f2 b.n 80100d4 <__sinit+0xc> 80100ee: bf00 nop 80100f0: 08010035 .word 0x08010035 80100f4: 2000369c .word 0x2000369c 080100f8 <_fwalk_sglue>: 80100f8: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr} 80100fc: 4607 mov r7, r0 80100fe: 4688 mov r8, r1 8010100: 4614 mov r4, r2 8010102: 2600 movs r6, #0 8010104: e9d4 9501 ldrd r9, r5, [r4, #4] 8010108: f1b9 0901 subs.w r9, r9, #1 801010c: d505 bpl.n 801011a <_fwalk_sglue+0x22> 801010e: 6824 ldr r4, [r4, #0] 8010110: 2c00 cmp r4, #0 8010112: d1f7 bne.n 8010104 <_fwalk_sglue+0xc> 8010114: 4630 mov r0, r6 8010116: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc} 801011a: 89ab ldrh r3, [r5, #12] 801011c: 2b01 cmp r3, #1 801011e: d907 bls.n 8010130 <_fwalk_sglue+0x38> 8010120: f9b5 300e ldrsh.w r3, [r5, #14] 8010124: 3301 adds r3, #1 8010126: d003 beq.n 8010130 <_fwalk_sglue+0x38> 8010128: 4629 mov r1, r5 801012a: 4638 mov r0, r7 801012c: 47c0 blx r8 801012e: 4306 orrs r6, r0 8010130: 3568 adds r5, #104 @ 0x68 8010132: e7e9 b.n 8010108 <_fwalk_sglue+0x10> 08010134 : 8010134: b40f push {r0, r1, r2, r3} 8010136: b507 push {r0, r1, r2, lr} 8010138: 4906 ldr r1, [pc, #24] @ (8010154 ) 801013a: ab04 add r3, sp, #16 801013c: 6808 ldr r0, [r1, #0] 801013e: f853 2b04 ldr.w r2, [r3], #4 8010142: 6881 ldr r1, [r0, #8] 8010144: 9301 str r3, [sp, #4] 8010146: f003 f8f7 bl 8013338 <_vfiprintf_r> 801014a: b003 add sp, #12 801014c: f85d eb04 ldr.w lr, [sp], #4 8010150: b004 add sp, #16 8010152: 4770 bx lr 8010154: 200000e0 .word 0x200000e0 08010158 <_puts_r>: 8010158: 6a03 ldr r3, [r0, #32] 801015a: b570 push {r4, r5, r6, lr} 801015c: 6884 ldr r4, [r0, #8] 801015e: 4605 mov r5, r0 8010160: 460e mov r6, r1 8010162: b90b cbnz r3, 8010168 <_puts_r+0x10> 8010164: f7ff ffb0 bl 80100c8 <__sinit> 8010168: 6e63 ldr r3, [r4, #100] @ 0x64 801016a: 07db lsls r3, r3, #31 801016c: d405 bmi.n 801017a <_puts_r+0x22> 801016e: 89a3 ldrh r3, [r4, #12] 8010170: 0598 lsls r0, r3, #22 8010172: d402 bmi.n 801017a <_puts_r+0x22> 8010174: 6da0 ldr r0, [r4, #88] @ 0x58 8010176: f000 fad0 bl 801071a <__retarget_lock_acquire_recursive> 801017a: 89a3 ldrh r3, [r4, #12] 801017c: 0719 lsls r1, r3, #28 801017e: d502 bpl.n 8010186 <_puts_r+0x2e> 8010180: 6923 ldr r3, [r4, #16] 8010182: 2b00 cmp r3, #0 8010184: d135 bne.n 80101f2 <_puts_r+0x9a> 8010186: 4621 mov r1, r4 8010188: 4628 mov r0, r5 801018a: f000 f94b bl 8010424 <__swsetup_r> 801018e: b380 cbz r0, 80101f2 <_puts_r+0x9a> 8010190: f04f 35ff mov.w r5, #4294967295 @ 0xffffffff 8010194: 6e63 ldr r3, [r4, #100] @ 0x64 8010196: 07da lsls r2, r3, #31 8010198: d405 bmi.n 80101a6 <_puts_r+0x4e> 801019a: 89a3 ldrh r3, [r4, #12] 801019c: 059b lsls r3, r3, #22 801019e: d402 bmi.n 80101a6 <_puts_r+0x4e> 80101a0: 6da0 ldr r0, [r4, #88] @ 0x58 80101a2: f000 fabb bl 801071c <__retarget_lock_release_recursive> 80101a6: 4628 mov r0, r5 80101a8: bd70 pop {r4, r5, r6, pc} 80101aa: 2b00 cmp r3, #0 80101ac: da04 bge.n 80101b8 <_puts_r+0x60> 80101ae: 69a2 ldr r2, [r4, #24] 80101b0: 429a cmp r2, r3 80101b2: dc17 bgt.n 80101e4 <_puts_r+0x8c> 80101b4: 290a cmp r1, #10 80101b6: d015 beq.n 80101e4 <_puts_r+0x8c> 80101b8: 6823 ldr r3, [r4, #0] 80101ba: 1c5a adds r2, r3, #1 80101bc: 6022 str r2, [r4, #0] 80101be: 7019 strb r1, [r3, #0] 80101c0: 68a3 ldr r3, [r4, #8] 80101c2: f816 1f01 ldrb.w r1, [r6, #1]! 80101c6: 3b01 subs r3, #1 80101c8: 60a3 str r3, [r4, #8] 80101ca: 2900 cmp r1, #0 80101cc: d1ed bne.n 80101aa <_puts_r+0x52> 80101ce: 2b00 cmp r3, #0 80101d0: da11 bge.n 80101f6 <_puts_r+0x9e> 80101d2: 4622 mov r2, r4 80101d4: 210a movs r1, #10 80101d6: 4628 mov r0, r5 80101d8: f000 f8e5 bl 80103a6 <__swbuf_r> 80101dc: 3001 adds r0, #1 80101de: d0d7 beq.n 8010190 <_puts_r+0x38> 80101e0: 250a movs r5, #10 80101e2: e7d7 b.n 8010194 <_puts_r+0x3c> 80101e4: 4622 mov r2, r4 80101e6: 4628 mov r0, r5 80101e8: f000 f8dd bl 80103a6 <__swbuf_r> 80101ec: 3001 adds r0, #1 80101ee: d1e7 bne.n 80101c0 <_puts_r+0x68> 80101f0: e7ce b.n 8010190 <_puts_r+0x38> 80101f2: 3e01 subs r6, #1 80101f4: e7e4 b.n 80101c0 <_puts_r+0x68> 80101f6: 6823 ldr r3, [r4, #0] 80101f8: 1c5a adds r2, r3, #1 80101fa: 6022 str r2, [r4, #0] 80101fc: 220a movs r2, #10 80101fe: 701a strb r2, [r3, #0] 8010200: e7ee b.n 80101e0 <_puts_r+0x88> ... 08010204 : 8010204: 4b02 ldr r3, [pc, #8] @ (8010210 ) 8010206: 4601 mov r1, r0 8010208: 6818 ldr r0, [r3, #0] 801020a: f7ff bfa5 b.w 8010158 <_puts_r> 801020e: bf00 nop 8010210: 200000e0 .word 0x200000e0 08010214 : 8010214: b40c push {r2, r3} 8010216: b530 push {r4, r5, lr} 8010218: 4b18 ldr r3, [pc, #96] @ (801027c ) 801021a: 1e0c subs r4, r1, #0 801021c: 681d ldr r5, [r3, #0] 801021e: b09d sub sp, #116 @ 0x74 8010220: da08 bge.n 8010234 8010222: 238b movs r3, #139 @ 0x8b 8010224: 602b str r3, [r5, #0] 8010226: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff 801022a: b01d add sp, #116 @ 0x74 801022c: e8bd 4030 ldmia.w sp!, {r4, r5, lr} 8010230: b002 add sp, #8 8010232: 4770 bx lr 8010234: f44f 7302 mov.w r3, #520 @ 0x208 8010238: f8ad 3014 strh.w r3, [sp, #20] 801023c: f04f 0300 mov.w r3, #0 8010240: 931b str r3, [sp, #108] @ 0x6c 8010242: bf14 ite ne 8010244: f104 33ff addne.w r3, r4, #4294967295 @ 0xffffffff 8010248: 4623 moveq r3, r4 801024a: 9304 str r3, [sp, #16] 801024c: 9307 str r3, [sp, #28] 801024e: f64f 73ff movw r3, #65535 @ 0xffff 8010252: 9002 str r0, [sp, #8] 8010254: 9006 str r0, [sp, #24] 8010256: f8ad 3016 strh.w r3, [sp, #22] 801025a: 9a20 ldr r2, [sp, #128] @ 0x80 801025c: ab21 add r3, sp, #132 @ 0x84 801025e: a902 add r1, sp, #8 8010260: 4628 mov r0, r5 8010262: 9301 str r3, [sp, #4] 8010264: f002 fd72 bl 8012d4c <_svfiprintf_r> 8010268: 1c43 adds r3, r0, #1 801026a: bfbc itt lt 801026c: 238b movlt r3, #139 @ 0x8b 801026e: 602b strlt r3, [r5, #0] 8010270: 2c00 cmp r4, #0 8010272: d0da beq.n 801022a 8010274: 9b02 ldr r3, [sp, #8] 8010276: 2200 movs r2, #0 8010278: 701a strb r2, [r3, #0] 801027a: e7d6 b.n 801022a 801027c: 200000e0 .word 0x200000e0 08010280 : 8010280: b40e push {r1, r2, r3} 8010282: b510 push {r4, lr} 8010284: b09d sub sp, #116 @ 0x74 8010286: ab1f add r3, sp, #124 @ 0x7c 8010288: 9002 str r0, [sp, #8] 801028a: 9006 str r0, [sp, #24] 801028c: f06f 4100 mvn.w r1, #2147483648 @ 0x80000000 8010290: 480a ldr r0, [pc, #40] @ (80102bc ) 8010292: 9107 str r1, [sp, #28] 8010294: 9104 str r1, [sp, #16] 8010296: 490a ldr r1, [pc, #40] @ (80102c0 ) 8010298: f853 2b04 ldr.w r2, [r3], #4 801029c: 9105 str r1, [sp, #20] 801029e: 2400 movs r4, #0 80102a0: a902 add r1, sp, #8 80102a2: 6800 ldr r0, [r0, #0] 80102a4: 9301 str r3, [sp, #4] 80102a6: 941b str r4, [sp, #108] @ 0x6c 80102a8: f002 fd50 bl 8012d4c <_svfiprintf_r> 80102ac: 9b02 ldr r3, [sp, #8] 80102ae: 701c strb r4, [r3, #0] 80102b0: b01d add sp, #116 @ 0x74 80102b2: e8bd 4010 ldmia.w sp!, {r4, lr} 80102b6: b003 add sp, #12 80102b8: 4770 bx lr 80102ba: bf00 nop 80102bc: 200000e0 .word 0x200000e0 80102c0: ffff0208 .word 0xffff0208 080102c4 : 80102c4: b40e push {r1, r2, r3} 80102c6: b570 push {r4, r5, r6, lr} 80102c8: b09d sub sp, #116 @ 0x74 80102ca: ac21 add r4, sp, #132 @ 0x84 80102cc: 2500 movs r5, #0 80102ce: f44f 7201 mov.w r2, #516 @ 0x204 80102d2: f854 6b04 ldr.w r6, [r4], #4 80102d6: f8ad 2014 strh.w r2, [sp, #20] 80102da: 951b str r5, [sp, #108] @ 0x6c 80102dc: 9002 str r0, [sp, #8] 80102de: 9006 str r0, [sp, #24] 80102e0: f7ef ffd6 bl 8000290 80102e4: 4b0b ldr r3, [pc, #44] @ (8010314 ) 80102e6: 9003 str r0, [sp, #12] 80102e8: 9007 str r0, [sp, #28] 80102ea: 480b ldr r0, [pc, #44] @ (8010318 ) 80102ec: 930b str r3, [sp, #44] @ 0x2c 80102ee: f64f 73ff movw r3, #65535 @ 0xffff 80102f2: f8ad 3016 strh.w r3, [sp, #22] 80102f6: 4632 mov r2, r6 80102f8: 4623 mov r3, r4 80102fa: a902 add r1, sp, #8 80102fc: 6800 ldr r0, [r0, #0] 80102fe: 950f str r5, [sp, #60] @ 0x3c 8010300: 9514 str r5, [sp, #80] @ 0x50 8010302: 9401 str r4, [sp, #4] 8010304: f002 fe78 bl 8012ff8 <__ssvfiscanf_r> 8010308: b01d add sp, #116 @ 0x74 801030a: e8bd 4070 ldmia.w sp!, {r4, r5, r6, lr} 801030e: b003 add sp, #12 8010310: 4770 bx lr 8010312: bf00 nop 8010314: 0801033f .word 0x0801033f 8010318: 200000e0 .word 0x200000e0 0801031c <__sread>: 801031c: b510 push {r4, lr} 801031e: 460c mov r4, r1 8010320: f9b1 100e ldrsh.w r1, [r1, #14] 8010324: f000 f9aa bl 801067c <_read_r> 8010328: 2800 cmp r0, #0 801032a: bfab itete ge 801032c: 6d63 ldrge r3, [r4, #84] @ 0x54 801032e: 89a3 ldrhlt r3, [r4, #12] 8010330: 181b addge r3, r3, r0 8010332: f423 5380 biclt.w r3, r3, #4096 @ 0x1000 8010336: bfac ite ge 8010338: 6563 strge r3, [r4, #84] @ 0x54 801033a: 81a3 strhlt r3, [r4, #12] 801033c: bd10 pop {r4, pc} 0801033e <__seofread>: 801033e: 2000 movs r0, #0 8010340: 4770 bx lr 08010342 <__swrite>: 8010342: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} 8010346: 461f mov r7, r3 8010348: 898b ldrh r3, [r1, #12] 801034a: 05db lsls r3, r3, #23 801034c: 4605 mov r5, r0 801034e: 460c mov r4, r1 8010350: 4616 mov r6, r2 8010352: d505 bpl.n 8010360 <__swrite+0x1e> 8010354: f9b1 100e ldrsh.w r1, [r1, #14] 8010358: 2302 movs r3, #2 801035a: 2200 movs r2, #0 801035c: f000 f97c bl 8010658 <_lseek_r> 8010360: 89a3 ldrh r3, [r4, #12] 8010362: f9b4 100e ldrsh.w r1, [r4, #14] 8010366: f423 5380 bic.w r3, r3, #4096 @ 0x1000 801036a: 81a3 strh r3, [r4, #12] 801036c: 4632 mov r2, r6 801036e: 463b mov r3, r7 8010370: 4628 mov r0, r5 8010372: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr} 8010376: f000 b993 b.w 80106a0 <_write_r> 0801037a <__sseek>: 801037a: b510 push {r4, lr} 801037c: 460c mov r4, r1 801037e: f9b1 100e ldrsh.w r1, [r1, #14] 8010382: f000 f969 bl 8010658 <_lseek_r> 8010386: 1c43 adds r3, r0, #1 8010388: 89a3 ldrh r3, [r4, #12] 801038a: bf15 itete ne 801038c: 6560 strne r0, [r4, #84] @ 0x54 801038e: f423 5380 biceq.w r3, r3, #4096 @ 0x1000 8010392: f443 5380 orrne.w r3, r3, #4096 @ 0x1000 8010396: 81a3 strheq r3, [r4, #12] 8010398: bf18 it ne 801039a: 81a3 strhne r3, [r4, #12] 801039c: bd10 pop {r4, pc} 0801039e <__sclose>: 801039e: f9b1 100e ldrsh.w r1, [r1, #14] 80103a2: f000 b949 b.w 8010638 <_close_r> 080103a6 <__swbuf_r>: 80103a6: b5f8 push {r3, r4, r5, r6, r7, lr} 80103a8: 460e mov r6, r1 80103aa: 4614 mov r4, r2 80103ac: 4605 mov r5, r0 80103ae: b118 cbz r0, 80103b8 <__swbuf_r+0x12> 80103b0: 6a03 ldr r3, [r0, #32] 80103b2: b90b cbnz r3, 80103b8 <__swbuf_r+0x12> 80103b4: f7ff fe88 bl 80100c8 <__sinit> 80103b8: 69a3 ldr r3, [r4, #24] 80103ba: 60a3 str r3, [r4, #8] 80103bc: 89a3 ldrh r3, [r4, #12] 80103be: 071a lsls r2, r3, #28 80103c0: d501 bpl.n 80103c6 <__swbuf_r+0x20> 80103c2: 6923 ldr r3, [r4, #16] 80103c4: b943 cbnz r3, 80103d8 <__swbuf_r+0x32> 80103c6: 4621 mov r1, r4 80103c8: 4628 mov r0, r5 80103ca: f000 f82b bl 8010424 <__swsetup_r> 80103ce: b118 cbz r0, 80103d8 <__swbuf_r+0x32> 80103d0: f04f 37ff mov.w r7, #4294967295 @ 0xffffffff 80103d4: 4638 mov r0, r7 80103d6: bdf8 pop {r3, r4, r5, r6, r7, pc} 80103d8: 6823 ldr r3, [r4, #0] 80103da: 6922 ldr r2, [r4, #16] 80103dc: 1a98 subs r0, r3, r2 80103de: 6963 ldr r3, [r4, #20] 80103e0: b2f6 uxtb r6, r6 80103e2: 4283 cmp r3, r0 80103e4: 4637 mov r7, r6 80103e6: dc05 bgt.n 80103f4 <__swbuf_r+0x4e> 80103e8: 4621 mov r1, r4 80103ea: 4628 mov r0, r5 80103ec: f003 fa8e bl 801390c <_fflush_r> 80103f0: 2800 cmp r0, #0 80103f2: d1ed bne.n 80103d0 <__swbuf_r+0x2a> 80103f4: 68a3 ldr r3, [r4, #8] 80103f6: 3b01 subs r3, #1 80103f8: 60a3 str r3, [r4, #8] 80103fa: 6823 ldr r3, [r4, #0] 80103fc: 1c5a adds r2, r3, #1 80103fe: 6022 str r2, [r4, #0] 8010400: 701e strb r6, [r3, #0] 8010402: 6962 ldr r2, [r4, #20] 8010404: 1c43 adds r3, r0, #1 8010406: 429a cmp r2, r3 8010408: d004 beq.n 8010414 <__swbuf_r+0x6e> 801040a: 89a3 ldrh r3, [r4, #12] 801040c: 07db lsls r3, r3, #31 801040e: d5e1 bpl.n 80103d4 <__swbuf_r+0x2e> 8010410: 2e0a cmp r6, #10 8010412: d1df bne.n 80103d4 <__swbuf_r+0x2e> 8010414: 4621 mov r1, r4 8010416: 4628 mov r0, r5 8010418: f003 fa78 bl 801390c <_fflush_r> 801041c: 2800 cmp r0, #0 801041e: d0d9 beq.n 80103d4 <__swbuf_r+0x2e> 8010420: e7d6 b.n 80103d0 <__swbuf_r+0x2a> ... 08010424 <__swsetup_r>: 8010424: b538 push {r3, r4, r5, lr} 8010426: 4b29 ldr r3, [pc, #164] @ (80104cc <__swsetup_r+0xa8>) 8010428: 4605 mov r5, r0 801042a: 6818 ldr r0, [r3, #0] 801042c: 460c mov r4, r1 801042e: b118 cbz r0, 8010438 <__swsetup_r+0x14> 8010430: 6a03 ldr r3, [r0, #32] 8010432: b90b cbnz r3, 8010438 <__swsetup_r+0x14> 8010434: f7ff fe48 bl 80100c8 <__sinit> 8010438: f9b4 300c ldrsh.w r3, [r4, #12] 801043c: 0719 lsls r1, r3, #28 801043e: d422 bmi.n 8010486 <__swsetup_r+0x62> 8010440: 06da lsls r2, r3, #27 8010442: d407 bmi.n 8010454 <__swsetup_r+0x30> 8010444: 2209 movs r2, #9 8010446: 602a str r2, [r5, #0] 8010448: f043 0340 orr.w r3, r3, #64 @ 0x40 801044c: 81a3 strh r3, [r4, #12] 801044e: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff 8010452: e033 b.n 80104bc <__swsetup_r+0x98> 8010454: 0758 lsls r0, r3, #29 8010456: d512 bpl.n 801047e <__swsetup_r+0x5a> 8010458: 6b61 ldr r1, [r4, #52] @ 0x34 801045a: b141 cbz r1, 801046e <__swsetup_r+0x4a> 801045c: f104 0344 add.w r3, r4, #68 @ 0x44 8010460: 4299 cmp r1, r3 8010462: d002 beq.n 801046a <__swsetup_r+0x46> 8010464: 4628 mov r0, r5 8010466: f000 ffe7 bl 8011438 <_free_r> 801046a: 2300 movs r3, #0 801046c: 6363 str r3, [r4, #52] @ 0x34 801046e: 89a3 ldrh r3, [r4, #12] 8010470: f023 0324 bic.w r3, r3, #36 @ 0x24 8010474: 81a3 strh r3, [r4, #12] 8010476: 2300 movs r3, #0 8010478: 6063 str r3, [r4, #4] 801047a: 6923 ldr r3, [r4, #16] 801047c: 6023 str r3, [r4, #0] 801047e: 89a3 ldrh r3, [r4, #12] 8010480: f043 0308 orr.w r3, r3, #8 8010484: 81a3 strh r3, [r4, #12] 8010486: 6923 ldr r3, [r4, #16] 8010488: b94b cbnz r3, 801049e <__swsetup_r+0x7a> 801048a: 89a3 ldrh r3, [r4, #12] 801048c: f403 7320 and.w r3, r3, #640 @ 0x280 8010490: f5b3 7f00 cmp.w r3, #512 @ 0x200 8010494: d003 beq.n 801049e <__swsetup_r+0x7a> 8010496: 4621 mov r1, r4 8010498: 4628 mov r0, r5 801049a: f003 fa97 bl 80139cc <__smakebuf_r> 801049e: f9b4 300c ldrsh.w r3, [r4, #12] 80104a2: f013 0201 ands.w r2, r3, #1 80104a6: d00a beq.n 80104be <__swsetup_r+0x9a> 80104a8: 2200 movs r2, #0 80104aa: 60a2 str r2, [r4, #8] 80104ac: 6962 ldr r2, [r4, #20] 80104ae: 4252 negs r2, r2 80104b0: 61a2 str r2, [r4, #24] 80104b2: 6922 ldr r2, [r4, #16] 80104b4: b942 cbnz r2, 80104c8 <__swsetup_r+0xa4> 80104b6: f013 0080 ands.w r0, r3, #128 @ 0x80 80104ba: d1c5 bne.n 8010448 <__swsetup_r+0x24> 80104bc: bd38 pop {r3, r4, r5, pc} 80104be: 0799 lsls r1, r3, #30 80104c0: bf58 it pl 80104c2: 6962 ldrpl r2, [r4, #20] 80104c4: 60a2 str r2, [r4, #8] 80104c6: e7f4 b.n 80104b2 <__swsetup_r+0x8e> 80104c8: 2000 movs r0, #0 80104ca: e7f7 b.n 80104bc <__swsetup_r+0x98> 80104cc: 200000e0 .word 0x200000e0 080104d0 : 80104d0: b510 push {r4, lr} 80104d2: 3901 subs r1, #1 80104d4: 4402 add r2, r0 80104d6: 4290 cmp r0, r2 80104d8: d101 bne.n 80104de 80104da: 2000 movs r0, #0 80104dc: e005 b.n 80104ea 80104de: 7803 ldrb r3, [r0, #0] 80104e0: f811 4f01 ldrb.w r4, [r1, #1]! 80104e4: 42a3 cmp r3, r4 80104e6: d001 beq.n 80104ec 80104e8: 1b18 subs r0, r3, r4 80104ea: bd10 pop {r4, pc} 80104ec: 3001 adds r0, #1 80104ee: e7f2 b.n 80104d6 080104f0 : 80104f0: 4402 add r2, r0 80104f2: 4603 mov r3, r0 80104f4: 4293 cmp r3, r2 80104f6: d100 bne.n 80104fa 80104f8: 4770 bx lr 80104fa: f803 1b01 strb.w r1, [r3], #1 80104fe: e7f9 b.n 80104f4 08010500 : 8010500: b510 push {r4, lr} 8010502: b16a cbz r2, 8010520 8010504: 3901 subs r1, #1 8010506: 1884 adds r4, r0, r2 8010508: f810 2b01 ldrb.w r2, [r0], #1 801050c: f811 3f01 ldrb.w r3, [r1, #1]! 8010510: 429a cmp r2, r3 8010512: d103 bne.n 801051c 8010514: 42a0 cmp r0, r4 8010516: d001 beq.n 801051c 8010518: 2a00 cmp r2, #0 801051a: d1f5 bne.n 8010508 801051c: 1ad0 subs r0, r2, r3 801051e: bd10 pop {r4, pc} 8010520: 4610 mov r0, r2 8010522: e7fc b.n 801051e 08010524 : 8010524: b510 push {r4, lr} 8010526: 3901 subs r1, #1 8010528: 4603 mov r3, r0 801052a: b132 cbz r2, 801053a 801052c: f811 4f01 ldrb.w r4, [r1, #1]! 8010530: f803 4b01 strb.w r4, [r3], #1 8010534: 3a01 subs r2, #1 8010536: 2c00 cmp r4, #0 8010538: d1f7 bne.n 801052a 801053a: 441a add r2, r3 801053c: 2100 movs r1, #0 801053e: 4293 cmp r3, r2 8010540: d100 bne.n 8010544 8010542: bd10 pop {r4, pc} 8010544: f803 1b01 strb.w r1, [r3], #1 8010548: e7f9 b.n 801053e ... 0801054c : 801054c: 4b16 ldr r3, [pc, #88] @ (80105a8 ) 801054e: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} 8010552: 681f ldr r7, [r3, #0] 8010554: 6c7c ldr r4, [r7, #68] @ 0x44 8010556: 4605 mov r5, r0 8010558: 460e mov r6, r1 801055a: b9ec cbnz r4, 8010598 801055c: 2050 movs r0, #80 @ 0x50 801055e: f000 ffb5 bl 80114cc 8010562: 4602 mov r2, r0 8010564: 6478 str r0, [r7, #68] @ 0x44 8010566: b920 cbnz r0, 8010572 8010568: 4b10 ldr r3, [pc, #64] @ (80105ac ) 801056a: 4811 ldr r0, [pc, #68] @ (80105b0 ) 801056c: 215b movs r1, #91 @ 0x5b 801056e: f000 f8eb bl 8010748 <__assert_func> 8010572: e9c0 4400 strd r4, r4, [r0] 8010576: e9c0 4402 strd r4, r4, [r0, #8] 801057a: e9c0 4404 strd r4, r4, [r0, #16] 801057e: e9c0 440a strd r4, r4, [r0, #40] @ 0x28 8010582: e9c0 440c strd r4, r4, [r0, #48] @ 0x30 8010586: e9c0 440e strd r4, r4, [r0, #56] @ 0x38 801058a: e9c0 4410 strd r4, r4, [r0, #64] @ 0x40 801058e: e9c0 4412 strd r4, r4, [r0, #72] @ 0x48 8010592: 6184 str r4, [r0, #24] 8010594: 7704 strb r4, [r0, #28] 8010596: 6244 str r4, [r0, #36] @ 0x24 8010598: 6c7a ldr r2, [r7, #68] @ 0x44 801059a: 4631 mov r1, r6 801059c: 4628 mov r0, r5 801059e: 2301 movs r3, #1 80105a0: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr} 80105a4: f000 b806 b.w 80105b4 <__strtok_r> 80105a8: 200000e0 .word 0x200000e0 80105ac: 08014f3b .word 0x08014f3b 80105b0: 08014f52 .word 0x08014f52 080105b4 <__strtok_r>: 80105b4: b5f0 push {r4, r5, r6, r7, lr} 80105b6: 4604 mov r4, r0 80105b8: b908 cbnz r0, 80105be <__strtok_r+0xa> 80105ba: 6814 ldr r4, [r2, #0] 80105bc: b144 cbz r4, 80105d0 <__strtok_r+0x1c> 80105be: 4620 mov r0, r4 80105c0: f814 5b01 ldrb.w r5, [r4], #1 80105c4: 460f mov r7, r1 80105c6: f817 6b01 ldrb.w r6, [r7], #1 80105ca: b91e cbnz r6, 80105d4 <__strtok_r+0x20> 80105cc: b965 cbnz r5, 80105e8 <__strtok_r+0x34> 80105ce: 6015 str r5, [r2, #0] 80105d0: 2000 movs r0, #0 80105d2: e005 b.n 80105e0 <__strtok_r+0x2c> 80105d4: 42b5 cmp r5, r6 80105d6: d1f6 bne.n 80105c6 <__strtok_r+0x12> 80105d8: 2b00 cmp r3, #0 80105da: d1f0 bne.n 80105be <__strtok_r+0xa> 80105dc: 6014 str r4, [r2, #0] 80105de: 7003 strb r3, [r0, #0] 80105e0: bdf0 pop {r4, r5, r6, r7, pc} 80105e2: 461c mov r4, r3 80105e4: e00c b.n 8010600 <__strtok_r+0x4c> 80105e6: b91d cbnz r5, 80105f0 <__strtok_r+0x3c> 80105e8: 4627 mov r7, r4 80105ea: f814 3b01 ldrb.w r3, [r4], #1 80105ee: 460e mov r6, r1 80105f0: f816 5b01 ldrb.w r5, [r6], #1 80105f4: 42ab cmp r3, r5 80105f6: d1f6 bne.n 80105e6 <__strtok_r+0x32> 80105f8: 2b00 cmp r3, #0 80105fa: d0f2 beq.n 80105e2 <__strtok_r+0x2e> 80105fc: 2300 movs r3, #0 80105fe: 703b strb r3, [r7, #0] 8010600: 6014 str r4, [r2, #0] 8010602: e7ed b.n 80105e0 <__strtok_r+0x2c> 08010604 : 8010604: 780a ldrb r2, [r1, #0] 8010606: b570 push {r4, r5, r6, lr} 8010608: b96a cbnz r2, 8010626 801060a: bd70 pop {r4, r5, r6, pc} 801060c: 429a cmp r2, r3 801060e: d109 bne.n 8010624 8010610: 460c mov r4, r1 8010612: 4605 mov r5, r0 8010614: f814 3f01 ldrb.w r3, [r4, #1]! 8010618: 2b00 cmp r3, #0 801061a: d0f6 beq.n 801060a 801061c: f815 6f01 ldrb.w r6, [r5, #1]! 8010620: 429e cmp r6, r3 8010622: d0f7 beq.n 8010614 8010624: 3001 adds r0, #1 8010626: 7803 ldrb r3, [r0, #0] 8010628: 2b00 cmp r3, #0 801062a: d1ef bne.n 801060c 801062c: 4618 mov r0, r3 801062e: e7ec b.n 801060a 08010630 <_localeconv_r>: 8010630: 4800 ldr r0, [pc, #0] @ (8010634 <_localeconv_r+0x4>) 8010632: 4770 bx lr 8010634: 20000220 .word 0x20000220 08010638 <_close_r>: 8010638: b538 push {r3, r4, r5, lr} 801063a: 4d06 ldr r5, [pc, #24] @ (8010654 <_close_r+0x1c>) 801063c: 2300 movs r3, #0 801063e: 4604 mov r4, r0 8010640: 4608 mov r0, r1 8010642: 602b str r3, [r5, #0] 8010644: f7f3 fa36 bl 8003ab4 <_close> 8010648: 1c43 adds r3, r0, #1 801064a: d102 bne.n 8010652 <_close_r+0x1a> 801064c: 682b ldr r3, [r5, #0] 801064e: b103 cbz r3, 8010652 <_close_r+0x1a> 8010650: 6023 str r3, [r4, #0] 8010652: bd38 pop {r3, r4, r5, pc} 8010654: 200036a0 .word 0x200036a0 08010658 <_lseek_r>: 8010658: b538 push {r3, r4, r5, lr} 801065a: 4d07 ldr r5, [pc, #28] @ (8010678 <_lseek_r+0x20>) 801065c: 4604 mov r4, r0 801065e: 4608 mov r0, r1 8010660: 4611 mov r1, r2 8010662: 2200 movs r2, #0 8010664: 602a str r2, [r5, #0] 8010666: 461a mov r2, r3 8010668: f7f3 fa4b bl 8003b02 <_lseek> 801066c: 1c43 adds r3, r0, #1 801066e: d102 bne.n 8010676 <_lseek_r+0x1e> 8010670: 682b ldr r3, [r5, #0] 8010672: b103 cbz r3, 8010676 <_lseek_r+0x1e> 8010674: 6023 str r3, [r4, #0] 8010676: bd38 pop {r3, r4, r5, pc} 8010678: 200036a0 .word 0x200036a0 0801067c <_read_r>: 801067c: b538 push {r3, r4, r5, lr} 801067e: 4d07 ldr r5, [pc, #28] @ (801069c <_read_r+0x20>) 8010680: 4604 mov r4, r0 8010682: 4608 mov r0, r1 8010684: 4611 mov r1, r2 8010686: 2200 movs r2, #0 8010688: 602a str r2, [r5, #0] 801068a: 461a mov r2, r3 801068c: f7f3 f9d9 bl 8003a42 <_read> 8010690: 1c43 adds r3, r0, #1 8010692: d102 bne.n 801069a <_read_r+0x1e> 8010694: 682b ldr r3, [r5, #0] 8010696: b103 cbz r3, 801069a <_read_r+0x1e> 8010698: 6023 str r3, [r4, #0] 801069a: bd38 pop {r3, r4, r5, pc} 801069c: 200036a0 .word 0x200036a0 080106a0 <_write_r>: 80106a0: b538 push {r3, r4, r5, lr} 80106a2: 4d07 ldr r5, [pc, #28] @ (80106c0 <_write_r+0x20>) 80106a4: 4604 mov r4, r0 80106a6: 4608 mov r0, r1 80106a8: 4611 mov r1, r2 80106aa: 2200 movs r2, #0 80106ac: 602a str r2, [r5, #0] 80106ae: 461a mov r2, r3 80106b0: f7f3 f9e4 bl 8003a7c <_write> 80106b4: 1c43 adds r3, r0, #1 80106b6: d102 bne.n 80106be <_write_r+0x1e> 80106b8: 682b ldr r3, [r5, #0] 80106ba: b103 cbz r3, 80106be <_write_r+0x1e> 80106bc: 6023 str r3, [r4, #0] 80106be: bd38 pop {r3, r4, r5, pc} 80106c0: 200036a0 .word 0x200036a0 080106c4 <__errno>: 80106c4: 4b01 ldr r3, [pc, #4] @ (80106cc <__errno+0x8>) 80106c6: 6818 ldr r0, [r3, #0] 80106c8: 4770 bx lr 80106ca: bf00 nop 80106cc: 200000e0 .word 0x200000e0 080106d0 <__libc_init_array>: 80106d0: b570 push {r4, r5, r6, lr} 80106d2: 4d0d ldr r5, [pc, #52] @ (8010708 <__libc_init_array+0x38>) 80106d4: 4c0d ldr r4, [pc, #52] @ (801070c <__libc_init_array+0x3c>) 80106d6: 1b64 subs r4, r4, r5 80106d8: 10a4 asrs r4, r4, #2 80106da: 2600 movs r6, #0 80106dc: 42a6 cmp r6, r4 80106de: d109 bne.n 80106f4 <__libc_init_array+0x24> 80106e0: 4d0b ldr r5, [pc, #44] @ (8010710 <__libc_init_array+0x40>) 80106e2: 4c0c ldr r4, [pc, #48] @ (8010714 <__libc_init_array+0x44>) 80106e4: f003 fed6 bl 8014494 <_init> 80106e8: 1b64 subs r4, r4, r5 80106ea: 10a4 asrs r4, r4, #2 80106ec: 2600 movs r6, #0 80106ee: 42a6 cmp r6, r4 80106f0: d105 bne.n 80106fe <__libc_init_array+0x2e> 80106f2: bd70 pop {r4, r5, r6, pc} 80106f4: f855 3b04 ldr.w r3, [r5], #4 80106f8: 4798 blx r3 80106fa: 3601 adds r6, #1 80106fc: e7ee b.n 80106dc <__libc_init_array+0xc> 80106fe: f855 3b04 ldr.w r3, [r5], #4 8010702: 4798 blx r3 8010704: 3601 adds r6, #1 8010706: e7f2 b.n 80106ee <__libc_init_array+0x1e> 8010708: 080153ac .word 0x080153ac 801070c: 080153ac .word 0x080153ac 8010710: 080153ac .word 0x080153ac 8010714: 080153b0 .word 0x080153b0 08010718 <__retarget_lock_init_recursive>: 8010718: 4770 bx lr 0801071a <__retarget_lock_acquire_recursive>: 801071a: 4770 bx lr 0801071c <__retarget_lock_release_recursive>: 801071c: 4770 bx lr 0801071e : 801071e: 440a add r2, r1 8010720: 4291 cmp r1, r2 8010722: f100 33ff add.w r3, r0, #4294967295 @ 0xffffffff 8010726: d100 bne.n 801072a 8010728: 4770 bx lr 801072a: b510 push {r4, lr} 801072c: f811 4b01 ldrb.w r4, [r1], #1 8010730: f803 4f01 strb.w r4, [r3, #1]! 8010734: 4291 cmp r1, r2 8010736: d1f9 bne.n 801072c 8010738: bd10 pop {r4, pc} ... 0801073c : 801073c: ed9f 0a01 vldr s0, [pc, #4] @ 8010744 8010740: 4770 bx lr 8010742: bf00 nop 8010744: 7fc00000 .word 0x7fc00000 08010748 <__assert_func>: 8010748: b51f push {r0, r1, r2, r3, r4, lr} 801074a: 4614 mov r4, r2 801074c: 461a mov r2, r3 801074e: 4b09 ldr r3, [pc, #36] @ (8010774 <__assert_func+0x2c>) 8010750: 681b ldr r3, [r3, #0] 8010752: 4605 mov r5, r0 8010754: 68d8 ldr r0, [r3, #12] 8010756: b14c cbz r4, 801076c <__assert_func+0x24> 8010758: 4b07 ldr r3, [pc, #28] @ (8010778 <__assert_func+0x30>) 801075a: 9100 str r1, [sp, #0] 801075c: e9cd 3401 strd r3, r4, [sp, #4] 8010760: 4906 ldr r1, [pc, #24] @ (801077c <__assert_func+0x34>) 8010762: 462b mov r3, r5 8010764: f003 f8fa bl 801395c 8010768: f003 fa36 bl 8013bd8 801076c: 4b04 ldr r3, [pc, #16] @ (8010780 <__assert_func+0x38>) 801076e: 461c mov r4, r3 8010770: e7f3 b.n 801075a <__assert_func+0x12> 8010772: bf00 nop 8010774: 200000e0 .word 0x200000e0 8010778: 08014fac .word 0x08014fac 801077c: 08014fb9 .word 0x08014fb9 8010780: 08014fe7 .word 0x08014fe7 08010784 : 8010784: e92d 4ff7 stmdb sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr} 8010788: 6903 ldr r3, [r0, #16] 801078a: 690c ldr r4, [r1, #16] 801078c: 42a3 cmp r3, r4 801078e: 4607 mov r7, r0 8010790: db7e blt.n 8010890 8010792: 3c01 subs r4, #1 8010794: f101 0814 add.w r8, r1, #20 8010798: 00a3 lsls r3, r4, #2 801079a: f100 0514 add.w r5, r0, #20 801079e: 9300 str r3, [sp, #0] 80107a0: eb05 0384 add.w r3, r5, r4, lsl #2 80107a4: 9301 str r3, [sp, #4] 80107a6: f858 3024 ldr.w r3, [r8, r4, lsl #2] 80107aa: f855 2024 ldr.w r2, [r5, r4, lsl #2] 80107ae: 3301 adds r3, #1 80107b0: 429a cmp r2, r3 80107b2: eb08 0984 add.w r9, r8, r4, lsl #2 80107b6: fbb2 f6f3 udiv r6, r2, r3 80107ba: d32e bcc.n 801081a 80107bc: f04f 0a00 mov.w sl, #0 80107c0: 46c4 mov ip, r8 80107c2: 46ae mov lr, r5 80107c4: 46d3 mov fp, sl 80107c6: f85c 3b04 ldr.w r3, [ip], #4 80107ca: b298 uxth r0, r3 80107cc: fb06 a000 mla r0, r6, r0, sl 80107d0: 0c02 lsrs r2, r0, #16 80107d2: 0c1b lsrs r3, r3, #16 80107d4: fb06 2303 mla r3, r6, r3, r2 80107d8: f8de 2000 ldr.w r2, [lr] 80107dc: b280 uxth r0, r0 80107de: b292 uxth r2, r2 80107e0: 1a12 subs r2, r2, r0 80107e2: 445a add r2, fp 80107e4: f8de 0000 ldr.w r0, [lr] 80107e8: ea4f 4a13 mov.w sl, r3, lsr #16 80107ec: b29b uxth r3, r3 80107ee: ebc3 4322 rsb r3, r3, r2, asr #16 80107f2: eb03 4310 add.w r3, r3, r0, lsr #16 80107f6: b292 uxth r2, r2 80107f8: ea42 4203 orr.w r2, r2, r3, lsl #16 80107fc: 45e1 cmp r9, ip 80107fe: f84e 2b04 str.w r2, [lr], #4 8010802: ea4f 4b23 mov.w fp, r3, asr #16 8010806: d2de bcs.n 80107c6 8010808: 9b00 ldr r3, [sp, #0] 801080a: 58eb ldr r3, [r5, r3] 801080c: b92b cbnz r3, 801081a 801080e: 9b01 ldr r3, [sp, #4] 8010810: 3b04 subs r3, #4 8010812: 429d cmp r5, r3 8010814: 461a mov r2, r3 8010816: d32f bcc.n 8010878 8010818: 613c str r4, [r7, #16] 801081a: 4638 mov r0, r7 801081c: f001 f9c8 bl 8011bb0 <__mcmp> 8010820: 2800 cmp r0, #0 8010822: db25 blt.n 8010870 8010824: 4629 mov r1, r5 8010826: 2000 movs r0, #0 8010828: f858 2b04 ldr.w r2, [r8], #4 801082c: f8d1 c000 ldr.w ip, [r1] 8010830: fa1f fe82 uxth.w lr, r2 8010834: fa1f f38c uxth.w r3, ip 8010838: eba3 030e sub.w r3, r3, lr 801083c: 4403 add r3, r0 801083e: 0c12 lsrs r2, r2, #16 8010840: ebc2 4223 rsb r2, r2, r3, asr #16 8010844: eb02 421c add.w r2, r2, ip, lsr #16 8010848: b29b uxth r3, r3 801084a: ea43 4302 orr.w r3, r3, r2, lsl #16 801084e: 45c1 cmp r9, r8 8010850: f841 3b04 str.w r3, [r1], #4 8010854: ea4f 4022 mov.w r0, r2, asr #16 8010858: d2e6 bcs.n 8010828 801085a: f855 2024 ldr.w r2, [r5, r4, lsl #2] 801085e: eb05 0384 add.w r3, r5, r4, lsl #2 8010862: b922 cbnz r2, 801086e 8010864: 3b04 subs r3, #4 8010866: 429d cmp r5, r3 8010868: 461a mov r2, r3 801086a: d30b bcc.n 8010884 801086c: 613c str r4, [r7, #16] 801086e: 3601 adds r6, #1 8010870: 4630 mov r0, r6 8010872: b003 add sp, #12 8010874: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} 8010878: 6812 ldr r2, [r2, #0] 801087a: 3b04 subs r3, #4 801087c: 2a00 cmp r2, #0 801087e: d1cb bne.n 8010818 8010880: 3c01 subs r4, #1 8010882: e7c6 b.n 8010812 8010884: 6812 ldr r2, [r2, #0] 8010886: 3b04 subs r3, #4 8010888: 2a00 cmp r2, #0 801088a: d1ef bne.n 801086c 801088c: 3c01 subs r4, #1 801088e: e7ea b.n 8010866 8010890: 2000 movs r0, #0 8010892: e7ee b.n 8010872 8010894: 0000 movs r0, r0 ... 08010898 <_dtoa_r>: 8010898: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 801089c: 69c7 ldr r7, [r0, #28] 801089e: b097 sub sp, #92 @ 0x5c 80108a0: ed8d 0b04 vstr d0, [sp, #16] 80108a4: ec55 4b10 vmov r4, r5, d0 80108a8: 9e20 ldr r6, [sp, #128] @ 0x80 80108aa: 9107 str r1, [sp, #28] 80108ac: 4681 mov r9, r0 80108ae: 920c str r2, [sp, #48] @ 0x30 80108b0: 9311 str r3, [sp, #68] @ 0x44 80108b2: b97f cbnz r7, 80108d4 <_dtoa_r+0x3c> 80108b4: 2010 movs r0, #16 80108b6: f000 fe09 bl 80114cc 80108ba: 4602 mov r2, r0 80108bc: f8c9 001c str.w r0, [r9, #28] 80108c0: b920 cbnz r0, 80108cc <_dtoa_r+0x34> 80108c2: 4ba9 ldr r3, [pc, #676] @ (8010b68 <_dtoa_r+0x2d0>) 80108c4: 21ef movs r1, #239 @ 0xef 80108c6: 48a9 ldr r0, [pc, #676] @ (8010b6c <_dtoa_r+0x2d4>) 80108c8: f7ff ff3e bl 8010748 <__assert_func> 80108cc: e9c0 7701 strd r7, r7, [r0, #4] 80108d0: 6007 str r7, [r0, #0] 80108d2: 60c7 str r7, [r0, #12] 80108d4: f8d9 301c ldr.w r3, [r9, #28] 80108d8: 6819 ldr r1, [r3, #0] 80108da: b159 cbz r1, 80108f4 <_dtoa_r+0x5c> 80108dc: 685a ldr r2, [r3, #4] 80108de: 604a str r2, [r1, #4] 80108e0: 2301 movs r3, #1 80108e2: 4093 lsls r3, r2 80108e4: 608b str r3, [r1, #8] 80108e6: 4648 mov r0, r9 80108e8: f000 fee6 bl 80116b8 <_Bfree> 80108ec: f8d9 301c ldr.w r3, [r9, #28] 80108f0: 2200 movs r2, #0 80108f2: 601a str r2, [r3, #0] 80108f4: 1e2b subs r3, r5, #0 80108f6: bfb9 ittee lt 80108f8: f023 4300 biclt.w r3, r3, #2147483648 @ 0x80000000 80108fc: 9305 strlt r3, [sp, #20] 80108fe: 2300 movge r3, #0 8010900: 6033 strge r3, [r6, #0] 8010902: 9f05 ldr r7, [sp, #20] 8010904: 4b9a ldr r3, [pc, #616] @ (8010b70 <_dtoa_r+0x2d8>) 8010906: bfbc itt lt 8010908: 2201 movlt r2, #1 801090a: 6032 strlt r2, [r6, #0] 801090c: 43bb bics r3, r7 801090e: d112 bne.n 8010936 <_dtoa_r+0x9e> 8010910: 9a11 ldr r2, [sp, #68] @ 0x44 8010912: f242 730f movw r3, #9999 @ 0x270f 8010916: 6013 str r3, [r2, #0] 8010918: f3c7 0313 ubfx r3, r7, #0, #20 801091c: 4323 orrs r3, r4 801091e: f000 855a beq.w 80113d6 <_dtoa_r+0xb3e> 8010922: 9b21 ldr r3, [sp, #132] @ 0x84 8010924: f8df a25c ldr.w sl, [pc, #604] @ 8010b84 <_dtoa_r+0x2ec> 8010928: 2b00 cmp r3, #0 801092a: f000 855c beq.w 80113e6 <_dtoa_r+0xb4e> 801092e: f10a 0303 add.w r3, sl, #3 8010932: f000 bd56 b.w 80113e2 <_dtoa_r+0xb4a> 8010936: ed9d 7b04 vldr d7, [sp, #16] 801093a: 2200 movs r2, #0 801093c: ec51 0b17 vmov r0, r1, d7 8010940: 2300 movs r3, #0 8010942: ed8d 7b0a vstr d7, [sp, #40] @ 0x28 8010946: f7f0 f8cf bl 8000ae8 <__aeabi_dcmpeq> 801094a: 4680 mov r8, r0 801094c: b158 cbz r0, 8010966 <_dtoa_r+0xce> 801094e: 9a11 ldr r2, [sp, #68] @ 0x44 8010950: 2301 movs r3, #1 8010952: 6013 str r3, [r2, #0] 8010954: 9b21 ldr r3, [sp, #132] @ 0x84 8010956: b113 cbz r3, 801095e <_dtoa_r+0xc6> 8010958: 9a21 ldr r2, [sp, #132] @ 0x84 801095a: 4b86 ldr r3, [pc, #536] @ (8010b74 <_dtoa_r+0x2dc>) 801095c: 6013 str r3, [r2, #0] 801095e: f8df a228 ldr.w sl, [pc, #552] @ 8010b88 <_dtoa_r+0x2f0> 8010962: f000 bd40 b.w 80113e6 <_dtoa_r+0xb4e> 8010966: ed9d 0b0a vldr d0, [sp, #40] @ 0x28 801096a: aa14 add r2, sp, #80 @ 0x50 801096c: a915 add r1, sp, #84 @ 0x54 801096e: 4648 mov r0, r9 8010970: f001 fa3e bl 8011df0 <__d2b> 8010974: f3c7 560a ubfx r6, r7, #20, #11 8010978: 9002 str r0, [sp, #8] 801097a: 2e00 cmp r6, #0 801097c: d078 beq.n 8010a70 <_dtoa_r+0x1d8> 801097e: 9b0b ldr r3, [sp, #44] @ 0x2c 8010980: f8cd 8048 str.w r8, [sp, #72] @ 0x48 8010984: f3c3 0313 ubfx r3, r3, #0, #20 8010988: e9dd 010a ldrd r0, r1, [sp, #40] @ 0x28 801098c: f043 537f orr.w r3, r3, #1069547520 @ 0x3fc00000 8010990: f443 1340 orr.w r3, r3, #3145728 @ 0x300000 8010994: f2a6 36ff subw r6, r6, #1023 @ 0x3ff 8010998: 4619 mov r1, r3 801099a: 2200 movs r2, #0 801099c: 4b76 ldr r3, [pc, #472] @ (8010b78 <_dtoa_r+0x2e0>) 801099e: f7ef fc83 bl 80002a8 <__aeabi_dsub> 80109a2: a36b add r3, pc, #428 @ (adr r3, 8010b50 <_dtoa_r+0x2b8>) 80109a4: e9d3 2300 ldrd r2, r3, [r3] 80109a8: f7ef fe36 bl 8000618 <__aeabi_dmul> 80109ac: a36a add r3, pc, #424 @ (adr r3, 8010b58 <_dtoa_r+0x2c0>) 80109ae: e9d3 2300 ldrd r2, r3, [r3] 80109b2: f7ef fc7b bl 80002ac <__adddf3> 80109b6: 4604 mov r4, r0 80109b8: 4630 mov r0, r6 80109ba: 460d mov r5, r1 80109bc: f7ef fdc2 bl 8000544 <__aeabi_i2d> 80109c0: a367 add r3, pc, #412 @ (adr r3, 8010b60 <_dtoa_r+0x2c8>) 80109c2: e9d3 2300 ldrd r2, r3, [r3] 80109c6: f7ef fe27 bl 8000618 <__aeabi_dmul> 80109ca: 4602 mov r2, r0 80109cc: 460b mov r3, r1 80109ce: 4620 mov r0, r4 80109d0: 4629 mov r1, r5 80109d2: f7ef fc6b bl 80002ac <__adddf3> 80109d6: 4604 mov r4, r0 80109d8: 460d mov r5, r1 80109da: f7f0 f8cd bl 8000b78 <__aeabi_d2iz> 80109de: 2200 movs r2, #0 80109e0: 4607 mov r7, r0 80109e2: 2300 movs r3, #0 80109e4: 4620 mov r0, r4 80109e6: 4629 mov r1, r5 80109e8: f7f0 f888 bl 8000afc <__aeabi_dcmplt> 80109ec: b140 cbz r0, 8010a00 <_dtoa_r+0x168> 80109ee: 4638 mov r0, r7 80109f0: f7ef fda8 bl 8000544 <__aeabi_i2d> 80109f4: 4622 mov r2, r4 80109f6: 462b mov r3, r5 80109f8: f7f0 f876 bl 8000ae8 <__aeabi_dcmpeq> 80109fc: b900 cbnz r0, 8010a00 <_dtoa_r+0x168> 80109fe: 3f01 subs r7, #1 8010a00: 2f16 cmp r7, #22 8010a02: d852 bhi.n 8010aaa <_dtoa_r+0x212> 8010a04: 4b5d ldr r3, [pc, #372] @ (8010b7c <_dtoa_r+0x2e4>) 8010a06: eb03 03c7 add.w r3, r3, r7, lsl #3 8010a0a: e9d3 2300 ldrd r2, r3, [r3] 8010a0e: e9dd 010a ldrd r0, r1, [sp, #40] @ 0x28 8010a12: f7f0 f873 bl 8000afc <__aeabi_dcmplt> 8010a16: 2800 cmp r0, #0 8010a18: d049 beq.n 8010aae <_dtoa_r+0x216> 8010a1a: 3f01 subs r7, #1 8010a1c: 2300 movs r3, #0 8010a1e: 9310 str r3, [sp, #64] @ 0x40 8010a20: 9b14 ldr r3, [sp, #80] @ 0x50 8010a22: 1b9b subs r3, r3, r6 8010a24: 1e5a subs r2, r3, #1 8010a26: bf45 ittet mi 8010a28: f1c3 0301 rsbmi r3, r3, #1 8010a2c: 9300 strmi r3, [sp, #0] 8010a2e: 2300 movpl r3, #0 8010a30: 2300 movmi r3, #0 8010a32: 9206 str r2, [sp, #24] 8010a34: bf54 ite pl 8010a36: 9300 strpl r3, [sp, #0] 8010a38: 9306 strmi r3, [sp, #24] 8010a3a: 2f00 cmp r7, #0 8010a3c: db39 blt.n 8010ab2 <_dtoa_r+0x21a> 8010a3e: 9b06 ldr r3, [sp, #24] 8010a40: 970d str r7, [sp, #52] @ 0x34 8010a42: 443b add r3, r7 8010a44: 9306 str r3, [sp, #24] 8010a46: 2300 movs r3, #0 8010a48: 9308 str r3, [sp, #32] 8010a4a: 9b07 ldr r3, [sp, #28] 8010a4c: 2b09 cmp r3, #9 8010a4e: d863 bhi.n 8010b18 <_dtoa_r+0x280> 8010a50: 2b05 cmp r3, #5 8010a52: bfc4 itt gt 8010a54: 3b04 subgt r3, #4 8010a56: 9307 strgt r3, [sp, #28] 8010a58: 9b07 ldr r3, [sp, #28] 8010a5a: f1a3 0302 sub.w r3, r3, #2 8010a5e: bfcc ite gt 8010a60: 2400 movgt r4, #0 8010a62: 2401 movle r4, #1 8010a64: 2b03 cmp r3, #3 8010a66: d863 bhi.n 8010b30 <_dtoa_r+0x298> 8010a68: e8df f003 tbb [pc, r3] 8010a6c: 2b375452 .word 0x2b375452 8010a70: e9dd 6314 ldrd r6, r3, [sp, #80] @ 0x50 8010a74: 441e add r6, r3 8010a76: f206 4332 addw r3, r6, #1074 @ 0x432 8010a7a: 2b20 cmp r3, #32 8010a7c: bfc1 itttt gt 8010a7e: f1c3 0340 rsbgt r3, r3, #64 @ 0x40 8010a82: 409f lslgt r7, r3 8010a84: f206 4312 addwgt r3, r6, #1042 @ 0x412 8010a88: fa24 f303 lsrgt.w r3, r4, r3 8010a8c: bfd6 itet le 8010a8e: f1c3 0320 rsble r3, r3, #32 8010a92: ea47 0003 orrgt.w r0, r7, r3 8010a96: fa04 f003 lslle.w r0, r4, r3 8010a9a: f7ef fd43 bl 8000524 <__aeabi_ui2d> 8010a9e: 2201 movs r2, #1 8010aa0: f1a1 73f8 sub.w r3, r1, #32505856 @ 0x1f00000 8010aa4: 3e01 subs r6, #1 8010aa6: 9212 str r2, [sp, #72] @ 0x48 8010aa8: e776 b.n 8010998 <_dtoa_r+0x100> 8010aaa: 2301 movs r3, #1 8010aac: e7b7 b.n 8010a1e <_dtoa_r+0x186> 8010aae: 9010 str r0, [sp, #64] @ 0x40 8010ab0: e7b6 b.n 8010a20 <_dtoa_r+0x188> 8010ab2: 9b00 ldr r3, [sp, #0] 8010ab4: 1bdb subs r3, r3, r7 8010ab6: 9300 str r3, [sp, #0] 8010ab8: 427b negs r3, r7 8010aba: 9308 str r3, [sp, #32] 8010abc: 2300 movs r3, #0 8010abe: 930d str r3, [sp, #52] @ 0x34 8010ac0: e7c3 b.n 8010a4a <_dtoa_r+0x1b2> 8010ac2: 2301 movs r3, #1 8010ac4: 9309 str r3, [sp, #36] @ 0x24 8010ac6: 9b0c ldr r3, [sp, #48] @ 0x30 8010ac8: eb07 0b03 add.w fp, r7, r3 8010acc: f10b 0301 add.w r3, fp, #1 8010ad0: 2b01 cmp r3, #1 8010ad2: 9303 str r3, [sp, #12] 8010ad4: bfb8 it lt 8010ad6: 2301 movlt r3, #1 8010ad8: e006 b.n 8010ae8 <_dtoa_r+0x250> 8010ada: 2301 movs r3, #1 8010adc: 9309 str r3, [sp, #36] @ 0x24 8010ade: 9b0c ldr r3, [sp, #48] @ 0x30 8010ae0: 2b00 cmp r3, #0 8010ae2: dd28 ble.n 8010b36 <_dtoa_r+0x29e> 8010ae4: 469b mov fp, r3 8010ae6: 9303 str r3, [sp, #12] 8010ae8: f8d9 001c ldr.w r0, [r9, #28] 8010aec: 2100 movs r1, #0 8010aee: 2204 movs r2, #4 8010af0: f102 0514 add.w r5, r2, #20 8010af4: 429d cmp r5, r3 8010af6: d926 bls.n 8010b46 <_dtoa_r+0x2ae> 8010af8: 6041 str r1, [r0, #4] 8010afa: 4648 mov r0, r9 8010afc: f000 fd9c bl 8011638 <_Balloc> 8010b00: 4682 mov sl, r0 8010b02: 2800 cmp r0, #0 8010b04: d142 bne.n 8010b8c <_dtoa_r+0x2f4> 8010b06: 4b1e ldr r3, [pc, #120] @ (8010b80 <_dtoa_r+0x2e8>) 8010b08: 4602 mov r2, r0 8010b0a: f240 11af movw r1, #431 @ 0x1af 8010b0e: e6da b.n 80108c6 <_dtoa_r+0x2e> 8010b10: 2300 movs r3, #0 8010b12: e7e3 b.n 8010adc <_dtoa_r+0x244> 8010b14: 2300 movs r3, #0 8010b16: e7d5 b.n 8010ac4 <_dtoa_r+0x22c> 8010b18: 2401 movs r4, #1 8010b1a: 2300 movs r3, #0 8010b1c: 9307 str r3, [sp, #28] 8010b1e: 9409 str r4, [sp, #36] @ 0x24 8010b20: f04f 3bff mov.w fp, #4294967295 @ 0xffffffff 8010b24: 2200 movs r2, #0 8010b26: f8cd b00c str.w fp, [sp, #12] 8010b2a: 2312 movs r3, #18 8010b2c: 920c str r2, [sp, #48] @ 0x30 8010b2e: e7db b.n 8010ae8 <_dtoa_r+0x250> 8010b30: 2301 movs r3, #1 8010b32: 9309 str r3, [sp, #36] @ 0x24 8010b34: e7f4 b.n 8010b20 <_dtoa_r+0x288> 8010b36: f04f 0b01 mov.w fp, #1 8010b3a: f8cd b00c str.w fp, [sp, #12] 8010b3e: 465b mov r3, fp 8010b40: f8cd b030 str.w fp, [sp, #48] @ 0x30 8010b44: e7d0 b.n 8010ae8 <_dtoa_r+0x250> 8010b46: 3101 adds r1, #1 8010b48: 0052 lsls r2, r2, #1 8010b4a: e7d1 b.n 8010af0 <_dtoa_r+0x258> 8010b4c: f3af 8000 nop.w 8010b50: 636f4361 .word 0x636f4361 8010b54: 3fd287a7 .word 0x3fd287a7 8010b58: 8b60c8b3 .word 0x8b60c8b3 8010b5c: 3fc68a28 .word 0x3fc68a28 8010b60: 509f79fb .word 0x509f79fb 8010b64: 3fd34413 .word 0x3fd34413 8010b68: 08014f3b .word 0x08014f3b 8010b6c: 08014ff5 .word 0x08014ff5 8010b70: 7ff00000 .word 0x7ff00000 8010b74: 080150e1 .word 0x080150e1 8010b78: 3ff80000 .word 0x3ff80000 8010b7c: 08015188 .word 0x08015188 8010b80: 0801504d .word 0x0801504d 8010b84: 08014ff1 .word 0x08014ff1 8010b88: 080150e0 .word 0x080150e0 8010b8c: f8d9 301c ldr.w r3, [r9, #28] 8010b90: 6018 str r0, [r3, #0] 8010b92: 9b03 ldr r3, [sp, #12] 8010b94: 2b0e cmp r3, #14 8010b96: f200 80a1 bhi.w 8010cdc <_dtoa_r+0x444> 8010b9a: 2c00 cmp r4, #0 8010b9c: f000 809e beq.w 8010cdc <_dtoa_r+0x444> 8010ba0: 2f00 cmp r7, #0 8010ba2: dd33 ble.n 8010c0c <_dtoa_r+0x374> 8010ba4: 4b9c ldr r3, [pc, #624] @ (8010e18 <_dtoa_r+0x580>) 8010ba6: f007 020f and.w r2, r7, #15 8010baa: eb03 03c2 add.w r3, r3, r2, lsl #3 8010bae: ed93 7b00 vldr d7, [r3] 8010bb2: 05f8 lsls r0, r7, #23 8010bb4: ed8d 7b0e vstr d7, [sp, #56] @ 0x38 8010bb8: ea4f 1427 mov.w r4, r7, asr #4 8010bbc: d516 bpl.n 8010bec <_dtoa_r+0x354> 8010bbe: 4b97 ldr r3, [pc, #604] @ (8010e1c <_dtoa_r+0x584>) 8010bc0: e9dd 010a ldrd r0, r1, [sp, #40] @ 0x28 8010bc4: e9d3 2308 ldrd r2, r3, [r3, #32] 8010bc8: f7ef fe50 bl 800086c <__aeabi_ddiv> 8010bcc: e9cd 0104 strd r0, r1, [sp, #16] 8010bd0: f004 040f and.w r4, r4, #15 8010bd4: 2603 movs r6, #3 8010bd6: 4d91 ldr r5, [pc, #580] @ (8010e1c <_dtoa_r+0x584>) 8010bd8: b954 cbnz r4, 8010bf0 <_dtoa_r+0x358> 8010bda: e9dd 230e ldrd r2, r3, [sp, #56] @ 0x38 8010bde: e9dd 0104 ldrd r0, r1, [sp, #16] 8010be2: f7ef fe43 bl 800086c <__aeabi_ddiv> 8010be6: e9cd 0104 strd r0, r1, [sp, #16] 8010bea: e028 b.n 8010c3e <_dtoa_r+0x3a6> 8010bec: 2602 movs r6, #2 8010bee: e7f2 b.n 8010bd6 <_dtoa_r+0x33e> 8010bf0: 07e1 lsls r1, r4, #31 8010bf2: d508 bpl.n 8010c06 <_dtoa_r+0x36e> 8010bf4: e9dd 010e ldrd r0, r1, [sp, #56] @ 0x38 8010bf8: e9d5 2300 ldrd r2, r3, [r5] 8010bfc: f7ef fd0c bl 8000618 <__aeabi_dmul> 8010c00: e9cd 010e strd r0, r1, [sp, #56] @ 0x38 8010c04: 3601 adds r6, #1 8010c06: 1064 asrs r4, r4, #1 8010c08: 3508 adds r5, #8 8010c0a: e7e5 b.n 8010bd8 <_dtoa_r+0x340> 8010c0c: f000 80af beq.w 8010d6e <_dtoa_r+0x4d6> 8010c10: 427c negs r4, r7 8010c12: 4b81 ldr r3, [pc, #516] @ (8010e18 <_dtoa_r+0x580>) 8010c14: 4d81 ldr r5, [pc, #516] @ (8010e1c <_dtoa_r+0x584>) 8010c16: f004 020f and.w r2, r4, #15 8010c1a: eb03 03c2 add.w r3, r3, r2, lsl #3 8010c1e: e9d3 2300 ldrd r2, r3, [r3] 8010c22: e9dd 010a ldrd r0, r1, [sp, #40] @ 0x28 8010c26: f7ef fcf7 bl 8000618 <__aeabi_dmul> 8010c2a: e9cd 0104 strd r0, r1, [sp, #16] 8010c2e: 1124 asrs r4, r4, #4 8010c30: 2300 movs r3, #0 8010c32: 2602 movs r6, #2 8010c34: 2c00 cmp r4, #0 8010c36: f040 808f bne.w 8010d58 <_dtoa_r+0x4c0> 8010c3a: 2b00 cmp r3, #0 8010c3c: d1d3 bne.n 8010be6 <_dtoa_r+0x34e> 8010c3e: 9b10 ldr r3, [sp, #64] @ 0x40 8010c40: e9dd 4504 ldrd r4, r5, [sp, #16] 8010c44: 2b00 cmp r3, #0 8010c46: f000 8094 beq.w 8010d72 <_dtoa_r+0x4da> 8010c4a: 4b75 ldr r3, [pc, #468] @ (8010e20 <_dtoa_r+0x588>) 8010c4c: 2200 movs r2, #0 8010c4e: 4620 mov r0, r4 8010c50: 4629 mov r1, r5 8010c52: f7ef ff53 bl 8000afc <__aeabi_dcmplt> 8010c56: 2800 cmp r0, #0 8010c58: f000 808b beq.w 8010d72 <_dtoa_r+0x4da> 8010c5c: 9b03 ldr r3, [sp, #12] 8010c5e: 2b00 cmp r3, #0 8010c60: f000 8087 beq.w 8010d72 <_dtoa_r+0x4da> 8010c64: f1bb 0f00 cmp.w fp, #0 8010c68: dd34 ble.n 8010cd4 <_dtoa_r+0x43c> 8010c6a: 4620 mov r0, r4 8010c6c: 4b6d ldr r3, [pc, #436] @ (8010e24 <_dtoa_r+0x58c>) 8010c6e: 2200 movs r2, #0 8010c70: 4629 mov r1, r5 8010c72: f7ef fcd1 bl 8000618 <__aeabi_dmul> 8010c76: e9cd 0104 strd r0, r1, [sp, #16] 8010c7a: f107 38ff add.w r8, r7, #4294967295 @ 0xffffffff 8010c7e: 3601 adds r6, #1 8010c80: 465c mov r4, fp 8010c82: 4630 mov r0, r6 8010c84: f7ef fc5e bl 8000544 <__aeabi_i2d> 8010c88: e9dd 2304 ldrd r2, r3, [sp, #16] 8010c8c: f7ef fcc4 bl 8000618 <__aeabi_dmul> 8010c90: 4b65 ldr r3, [pc, #404] @ (8010e28 <_dtoa_r+0x590>) 8010c92: 2200 movs r2, #0 8010c94: f7ef fb0a bl 80002ac <__adddf3> 8010c98: 4605 mov r5, r0 8010c9a: f1a1 7650 sub.w r6, r1, #54525952 @ 0x3400000 8010c9e: 2c00 cmp r4, #0 8010ca0: d16a bne.n 8010d78 <_dtoa_r+0x4e0> 8010ca2: e9dd 0104 ldrd r0, r1, [sp, #16] 8010ca6: 4b61 ldr r3, [pc, #388] @ (8010e2c <_dtoa_r+0x594>) 8010ca8: 2200 movs r2, #0 8010caa: f7ef fafd bl 80002a8 <__aeabi_dsub> 8010cae: 4602 mov r2, r0 8010cb0: 460b mov r3, r1 8010cb2: e9cd 2304 strd r2, r3, [sp, #16] 8010cb6: 462a mov r2, r5 8010cb8: 4633 mov r3, r6 8010cba: f7ef ff3d bl 8000b38 <__aeabi_dcmpgt> 8010cbe: 2800 cmp r0, #0 8010cc0: f040 8298 bne.w 80111f4 <_dtoa_r+0x95c> 8010cc4: e9dd 0104 ldrd r0, r1, [sp, #16] 8010cc8: 462a mov r2, r5 8010cca: f106 4300 add.w r3, r6, #2147483648 @ 0x80000000 8010cce: f7ef ff15 bl 8000afc <__aeabi_dcmplt> 8010cd2: bb38 cbnz r0, 8010d24 <_dtoa_r+0x48c> 8010cd4: e9dd 340a ldrd r3, r4, [sp, #40] @ 0x28 8010cd8: e9cd 3404 strd r3, r4, [sp, #16] 8010cdc: 9b15 ldr r3, [sp, #84] @ 0x54 8010cde: 2b00 cmp r3, #0 8010ce0: f2c0 8157 blt.w 8010f92 <_dtoa_r+0x6fa> 8010ce4: 2f0e cmp r7, #14 8010ce6: f300 8154 bgt.w 8010f92 <_dtoa_r+0x6fa> 8010cea: 4b4b ldr r3, [pc, #300] @ (8010e18 <_dtoa_r+0x580>) 8010cec: eb03 03c7 add.w r3, r3, r7, lsl #3 8010cf0: ed93 7b00 vldr d7, [r3] 8010cf4: 9b0c ldr r3, [sp, #48] @ 0x30 8010cf6: 2b00 cmp r3, #0 8010cf8: ed8d 7b00 vstr d7, [sp] 8010cfc: f280 80e5 bge.w 8010eca <_dtoa_r+0x632> 8010d00: 9b03 ldr r3, [sp, #12] 8010d02: 2b00 cmp r3, #0 8010d04: f300 80e1 bgt.w 8010eca <_dtoa_r+0x632> 8010d08: d10c bne.n 8010d24 <_dtoa_r+0x48c> 8010d0a: 4b48 ldr r3, [pc, #288] @ (8010e2c <_dtoa_r+0x594>) 8010d0c: 2200 movs r2, #0 8010d0e: ec51 0b17 vmov r0, r1, d7 8010d12: f7ef fc81 bl 8000618 <__aeabi_dmul> 8010d16: e9dd 2304 ldrd r2, r3, [sp, #16] 8010d1a: f7ef ff03 bl 8000b24 <__aeabi_dcmpge> 8010d1e: 2800 cmp r0, #0 8010d20: f000 8266 beq.w 80111f0 <_dtoa_r+0x958> 8010d24: 2400 movs r4, #0 8010d26: 4625 mov r5, r4 8010d28: 9b0c ldr r3, [sp, #48] @ 0x30 8010d2a: 4656 mov r6, sl 8010d2c: ea6f 0803 mvn.w r8, r3 8010d30: 2700 movs r7, #0 8010d32: 4621 mov r1, r4 8010d34: 4648 mov r0, r9 8010d36: f000 fcbf bl 80116b8 <_Bfree> 8010d3a: 2d00 cmp r5, #0 8010d3c: f000 80bd beq.w 8010eba <_dtoa_r+0x622> 8010d40: b12f cbz r7, 8010d4e <_dtoa_r+0x4b6> 8010d42: 42af cmp r7, r5 8010d44: d003 beq.n 8010d4e <_dtoa_r+0x4b6> 8010d46: 4639 mov r1, r7 8010d48: 4648 mov r0, r9 8010d4a: f000 fcb5 bl 80116b8 <_Bfree> 8010d4e: 4629 mov r1, r5 8010d50: 4648 mov r0, r9 8010d52: f000 fcb1 bl 80116b8 <_Bfree> 8010d56: e0b0 b.n 8010eba <_dtoa_r+0x622> 8010d58: 07e2 lsls r2, r4, #31 8010d5a: d505 bpl.n 8010d68 <_dtoa_r+0x4d0> 8010d5c: e9d5 2300 ldrd r2, r3, [r5] 8010d60: f7ef fc5a bl 8000618 <__aeabi_dmul> 8010d64: 3601 adds r6, #1 8010d66: 2301 movs r3, #1 8010d68: 1064 asrs r4, r4, #1 8010d6a: 3508 adds r5, #8 8010d6c: e762 b.n 8010c34 <_dtoa_r+0x39c> 8010d6e: 2602 movs r6, #2 8010d70: e765 b.n 8010c3e <_dtoa_r+0x3a6> 8010d72: 9c03 ldr r4, [sp, #12] 8010d74: 46b8 mov r8, r7 8010d76: e784 b.n 8010c82 <_dtoa_r+0x3ea> 8010d78: 4b27 ldr r3, [pc, #156] @ (8010e18 <_dtoa_r+0x580>) 8010d7a: 9909 ldr r1, [sp, #36] @ 0x24 8010d7c: eb03 03c4 add.w r3, r3, r4, lsl #3 8010d80: e953 2302 ldrd r2, r3, [r3, #-8] 8010d84: 4454 add r4, sl 8010d86: 2900 cmp r1, #0 8010d88: d054 beq.n 8010e34 <_dtoa_r+0x59c> 8010d8a: 4929 ldr r1, [pc, #164] @ (8010e30 <_dtoa_r+0x598>) 8010d8c: 2000 movs r0, #0 8010d8e: f7ef fd6d bl 800086c <__aeabi_ddiv> 8010d92: 4633 mov r3, r6 8010d94: 462a mov r2, r5 8010d96: f7ef fa87 bl 80002a8 <__aeabi_dsub> 8010d9a: e9cd 010e strd r0, r1, [sp, #56] @ 0x38 8010d9e: 4656 mov r6, sl 8010da0: e9dd 0104 ldrd r0, r1, [sp, #16] 8010da4: f7ef fee8 bl 8000b78 <__aeabi_d2iz> 8010da8: 4605 mov r5, r0 8010daa: f7ef fbcb bl 8000544 <__aeabi_i2d> 8010dae: 4602 mov r2, r0 8010db0: 460b mov r3, r1 8010db2: e9dd 0104 ldrd r0, r1, [sp, #16] 8010db6: f7ef fa77 bl 80002a8 <__aeabi_dsub> 8010dba: 3530 adds r5, #48 @ 0x30 8010dbc: 4602 mov r2, r0 8010dbe: 460b mov r3, r1 8010dc0: e9cd 2304 strd r2, r3, [sp, #16] 8010dc4: f806 5b01 strb.w r5, [r6], #1 8010dc8: e9dd 230e ldrd r2, r3, [sp, #56] @ 0x38 8010dcc: f7ef fe96 bl 8000afc <__aeabi_dcmplt> 8010dd0: 2800 cmp r0, #0 8010dd2: d172 bne.n 8010eba <_dtoa_r+0x622> 8010dd4: e9dd 2304 ldrd r2, r3, [sp, #16] 8010dd8: 4911 ldr r1, [pc, #68] @ (8010e20 <_dtoa_r+0x588>) 8010dda: 2000 movs r0, #0 8010ddc: f7ef fa64 bl 80002a8 <__aeabi_dsub> 8010de0: e9dd 230e ldrd r2, r3, [sp, #56] @ 0x38 8010de4: f7ef fe8a bl 8000afc <__aeabi_dcmplt> 8010de8: 2800 cmp r0, #0 8010dea: f040 80b4 bne.w 8010f56 <_dtoa_r+0x6be> 8010dee: 42a6 cmp r6, r4 8010df0: f43f af70 beq.w 8010cd4 <_dtoa_r+0x43c> 8010df4: e9dd 010e ldrd r0, r1, [sp, #56] @ 0x38 8010df8: 4b0a ldr r3, [pc, #40] @ (8010e24 <_dtoa_r+0x58c>) 8010dfa: 2200 movs r2, #0 8010dfc: f7ef fc0c bl 8000618 <__aeabi_dmul> 8010e00: 4b08 ldr r3, [pc, #32] @ (8010e24 <_dtoa_r+0x58c>) 8010e02: e9cd 010e strd r0, r1, [sp, #56] @ 0x38 8010e06: 2200 movs r2, #0 8010e08: e9dd 0104 ldrd r0, r1, [sp, #16] 8010e0c: f7ef fc04 bl 8000618 <__aeabi_dmul> 8010e10: e9cd 0104 strd r0, r1, [sp, #16] 8010e14: e7c4 b.n 8010da0 <_dtoa_r+0x508> 8010e16: bf00 nop 8010e18: 08015188 .word 0x08015188 8010e1c: 08015160 .word 0x08015160 8010e20: 3ff00000 .word 0x3ff00000 8010e24: 40240000 .word 0x40240000 8010e28: 401c0000 .word 0x401c0000 8010e2c: 40140000 .word 0x40140000 8010e30: 3fe00000 .word 0x3fe00000 8010e34: 4631 mov r1, r6 8010e36: 4628 mov r0, r5 8010e38: f7ef fbee bl 8000618 <__aeabi_dmul> 8010e3c: e9cd 010e strd r0, r1, [sp, #56] @ 0x38 8010e40: 9413 str r4, [sp, #76] @ 0x4c 8010e42: 4656 mov r6, sl 8010e44: e9dd 0104 ldrd r0, r1, [sp, #16] 8010e48: f7ef fe96 bl 8000b78 <__aeabi_d2iz> 8010e4c: 4605 mov r5, r0 8010e4e: f7ef fb79 bl 8000544 <__aeabi_i2d> 8010e52: 4602 mov r2, r0 8010e54: 460b mov r3, r1 8010e56: e9dd 0104 ldrd r0, r1, [sp, #16] 8010e5a: f7ef fa25 bl 80002a8 <__aeabi_dsub> 8010e5e: 3530 adds r5, #48 @ 0x30 8010e60: f806 5b01 strb.w r5, [r6], #1 8010e64: 4602 mov r2, r0 8010e66: 460b mov r3, r1 8010e68: 42a6 cmp r6, r4 8010e6a: e9cd 2304 strd r2, r3, [sp, #16] 8010e6e: f04f 0200 mov.w r2, #0 8010e72: d124 bne.n 8010ebe <_dtoa_r+0x626> 8010e74: 4baf ldr r3, [pc, #700] @ (8011134 <_dtoa_r+0x89c>) 8010e76: e9dd 010e ldrd r0, r1, [sp, #56] @ 0x38 8010e7a: f7ef fa17 bl 80002ac <__adddf3> 8010e7e: 4602 mov r2, r0 8010e80: 460b mov r3, r1 8010e82: e9dd 0104 ldrd r0, r1, [sp, #16] 8010e86: f7ef fe57 bl 8000b38 <__aeabi_dcmpgt> 8010e8a: 2800 cmp r0, #0 8010e8c: d163 bne.n 8010f56 <_dtoa_r+0x6be> 8010e8e: e9dd 230e ldrd r2, r3, [sp, #56] @ 0x38 8010e92: 49a8 ldr r1, [pc, #672] @ (8011134 <_dtoa_r+0x89c>) 8010e94: 2000 movs r0, #0 8010e96: f7ef fa07 bl 80002a8 <__aeabi_dsub> 8010e9a: 4602 mov r2, r0 8010e9c: 460b mov r3, r1 8010e9e: e9dd 0104 ldrd r0, r1, [sp, #16] 8010ea2: f7ef fe2b bl 8000afc <__aeabi_dcmplt> 8010ea6: 2800 cmp r0, #0 8010ea8: f43f af14 beq.w 8010cd4 <_dtoa_r+0x43c> 8010eac: 9e13 ldr r6, [sp, #76] @ 0x4c 8010eae: 1e73 subs r3, r6, #1 8010eb0: 9313 str r3, [sp, #76] @ 0x4c 8010eb2: f816 3c01 ldrb.w r3, [r6, #-1] 8010eb6: 2b30 cmp r3, #48 @ 0x30 8010eb8: d0f8 beq.n 8010eac <_dtoa_r+0x614> 8010eba: 4647 mov r7, r8 8010ebc: e03b b.n 8010f36 <_dtoa_r+0x69e> 8010ebe: 4b9e ldr r3, [pc, #632] @ (8011138 <_dtoa_r+0x8a0>) 8010ec0: f7ef fbaa bl 8000618 <__aeabi_dmul> 8010ec4: e9cd 0104 strd r0, r1, [sp, #16] 8010ec8: e7bc b.n 8010e44 <_dtoa_r+0x5ac> 8010eca: e9dd 4504 ldrd r4, r5, [sp, #16] 8010ece: 4656 mov r6, sl 8010ed0: e9dd 2300 ldrd r2, r3, [sp] 8010ed4: 4620 mov r0, r4 8010ed6: 4629 mov r1, r5 8010ed8: f7ef fcc8 bl 800086c <__aeabi_ddiv> 8010edc: f7ef fe4c bl 8000b78 <__aeabi_d2iz> 8010ee0: 4680 mov r8, r0 8010ee2: f7ef fb2f bl 8000544 <__aeabi_i2d> 8010ee6: e9dd 2300 ldrd r2, r3, [sp] 8010eea: f7ef fb95 bl 8000618 <__aeabi_dmul> 8010eee: 4602 mov r2, r0 8010ef0: 460b mov r3, r1 8010ef2: 4620 mov r0, r4 8010ef4: 4629 mov r1, r5 8010ef6: f108 0430 add.w r4, r8, #48 @ 0x30 8010efa: f7ef f9d5 bl 80002a8 <__aeabi_dsub> 8010efe: f806 4b01 strb.w r4, [r6], #1 8010f02: 9d03 ldr r5, [sp, #12] 8010f04: eba6 040a sub.w r4, r6, sl 8010f08: 42a5 cmp r5, r4 8010f0a: 4602 mov r2, r0 8010f0c: 460b mov r3, r1 8010f0e: d133 bne.n 8010f78 <_dtoa_r+0x6e0> 8010f10: f7ef f9cc bl 80002ac <__adddf3> 8010f14: e9dd 2300 ldrd r2, r3, [sp] 8010f18: 4604 mov r4, r0 8010f1a: 460d mov r5, r1 8010f1c: f7ef fe0c bl 8000b38 <__aeabi_dcmpgt> 8010f20: b9c0 cbnz r0, 8010f54 <_dtoa_r+0x6bc> 8010f22: e9dd 2300 ldrd r2, r3, [sp] 8010f26: 4620 mov r0, r4 8010f28: 4629 mov r1, r5 8010f2a: f7ef fddd bl 8000ae8 <__aeabi_dcmpeq> 8010f2e: b110 cbz r0, 8010f36 <_dtoa_r+0x69e> 8010f30: f018 0f01 tst.w r8, #1 8010f34: d10e bne.n 8010f54 <_dtoa_r+0x6bc> 8010f36: 9902 ldr r1, [sp, #8] 8010f38: 4648 mov r0, r9 8010f3a: f000 fbbd bl 80116b8 <_Bfree> 8010f3e: 2300 movs r3, #0 8010f40: 7033 strb r3, [r6, #0] 8010f42: 9b11 ldr r3, [sp, #68] @ 0x44 8010f44: 3701 adds r7, #1 8010f46: 601f str r7, [r3, #0] 8010f48: 9b21 ldr r3, [sp, #132] @ 0x84 8010f4a: 2b00 cmp r3, #0 8010f4c: f000 824b beq.w 80113e6 <_dtoa_r+0xb4e> 8010f50: 601e str r6, [r3, #0] 8010f52: e248 b.n 80113e6 <_dtoa_r+0xb4e> 8010f54: 46b8 mov r8, r7 8010f56: 4633 mov r3, r6 8010f58: 461e mov r6, r3 8010f5a: f813 2d01 ldrb.w r2, [r3, #-1]! 8010f5e: 2a39 cmp r2, #57 @ 0x39 8010f60: d106 bne.n 8010f70 <_dtoa_r+0x6d8> 8010f62: 459a cmp sl, r3 8010f64: d1f8 bne.n 8010f58 <_dtoa_r+0x6c0> 8010f66: 2230 movs r2, #48 @ 0x30 8010f68: f108 0801 add.w r8, r8, #1 8010f6c: f88a 2000 strb.w r2, [sl] 8010f70: 781a ldrb r2, [r3, #0] 8010f72: 3201 adds r2, #1 8010f74: 701a strb r2, [r3, #0] 8010f76: e7a0 b.n 8010eba <_dtoa_r+0x622> 8010f78: 4b6f ldr r3, [pc, #444] @ (8011138 <_dtoa_r+0x8a0>) 8010f7a: 2200 movs r2, #0 8010f7c: f7ef fb4c bl 8000618 <__aeabi_dmul> 8010f80: 2200 movs r2, #0 8010f82: 2300 movs r3, #0 8010f84: 4604 mov r4, r0 8010f86: 460d mov r5, r1 8010f88: f7ef fdae bl 8000ae8 <__aeabi_dcmpeq> 8010f8c: 2800 cmp r0, #0 8010f8e: d09f beq.n 8010ed0 <_dtoa_r+0x638> 8010f90: e7d1 b.n 8010f36 <_dtoa_r+0x69e> 8010f92: 9a09 ldr r2, [sp, #36] @ 0x24 8010f94: 2a00 cmp r2, #0 8010f96: f000 80ea beq.w 801116e <_dtoa_r+0x8d6> 8010f9a: 9a07 ldr r2, [sp, #28] 8010f9c: 2a01 cmp r2, #1 8010f9e: f300 80cd bgt.w 801113c <_dtoa_r+0x8a4> 8010fa2: 9a12 ldr r2, [sp, #72] @ 0x48 8010fa4: 2a00 cmp r2, #0 8010fa6: f000 80c1 beq.w 801112c <_dtoa_r+0x894> 8010faa: f203 4333 addw r3, r3, #1075 @ 0x433 8010fae: 9c08 ldr r4, [sp, #32] 8010fb0: 9e00 ldr r6, [sp, #0] 8010fb2: 9a00 ldr r2, [sp, #0] 8010fb4: 441a add r2, r3 8010fb6: 9200 str r2, [sp, #0] 8010fb8: 9a06 ldr r2, [sp, #24] 8010fba: 2101 movs r1, #1 8010fbc: 441a add r2, r3 8010fbe: 4648 mov r0, r9 8010fc0: 9206 str r2, [sp, #24] 8010fc2: f000 fc77 bl 80118b4 <__i2b> 8010fc6: 4605 mov r5, r0 8010fc8: b166 cbz r6, 8010fe4 <_dtoa_r+0x74c> 8010fca: 9b06 ldr r3, [sp, #24] 8010fcc: 2b00 cmp r3, #0 8010fce: dd09 ble.n 8010fe4 <_dtoa_r+0x74c> 8010fd0: 42b3 cmp r3, r6 8010fd2: 9a00 ldr r2, [sp, #0] 8010fd4: bfa8 it ge 8010fd6: 4633 movge r3, r6 8010fd8: 1ad2 subs r2, r2, r3 8010fda: 9200 str r2, [sp, #0] 8010fdc: 9a06 ldr r2, [sp, #24] 8010fde: 1af6 subs r6, r6, r3 8010fe0: 1ad3 subs r3, r2, r3 8010fe2: 9306 str r3, [sp, #24] 8010fe4: 9b08 ldr r3, [sp, #32] 8010fe6: b30b cbz r3, 801102c <_dtoa_r+0x794> 8010fe8: 9b09 ldr r3, [sp, #36] @ 0x24 8010fea: 2b00 cmp r3, #0 8010fec: f000 80c6 beq.w 801117c <_dtoa_r+0x8e4> 8010ff0: 2c00 cmp r4, #0 8010ff2: f000 80c0 beq.w 8011176 <_dtoa_r+0x8de> 8010ff6: 4629 mov r1, r5 8010ff8: 4622 mov r2, r4 8010ffa: 4648 mov r0, r9 8010ffc: f000 fd12 bl 8011a24 <__pow5mult> 8011000: 9a02 ldr r2, [sp, #8] 8011002: 4601 mov r1, r0 8011004: 4605 mov r5, r0 8011006: 4648 mov r0, r9 8011008: f000 fc6a bl 80118e0 <__multiply> 801100c: 9902 ldr r1, [sp, #8] 801100e: 4680 mov r8, r0 8011010: 4648 mov r0, r9 8011012: f000 fb51 bl 80116b8 <_Bfree> 8011016: 9b08 ldr r3, [sp, #32] 8011018: 1b1b subs r3, r3, r4 801101a: 9308 str r3, [sp, #32] 801101c: f000 80b1 beq.w 8011182 <_dtoa_r+0x8ea> 8011020: 9a08 ldr r2, [sp, #32] 8011022: 4641 mov r1, r8 8011024: 4648 mov r0, r9 8011026: f000 fcfd bl 8011a24 <__pow5mult> 801102a: 9002 str r0, [sp, #8] 801102c: 2101 movs r1, #1 801102e: 4648 mov r0, r9 8011030: f000 fc40 bl 80118b4 <__i2b> 8011034: 9b0d ldr r3, [sp, #52] @ 0x34 8011036: 4604 mov r4, r0 8011038: 2b00 cmp r3, #0 801103a: f000 81d8 beq.w 80113ee <_dtoa_r+0xb56> 801103e: 461a mov r2, r3 8011040: 4601 mov r1, r0 8011042: 4648 mov r0, r9 8011044: f000 fcee bl 8011a24 <__pow5mult> 8011048: 9b07 ldr r3, [sp, #28] 801104a: 2b01 cmp r3, #1 801104c: 4604 mov r4, r0 801104e: f300 809f bgt.w 8011190 <_dtoa_r+0x8f8> 8011052: 9b04 ldr r3, [sp, #16] 8011054: 2b00 cmp r3, #0 8011056: f040 8097 bne.w 8011188 <_dtoa_r+0x8f0> 801105a: 9b05 ldr r3, [sp, #20] 801105c: f3c3 0313 ubfx r3, r3, #0, #20 8011060: 2b00 cmp r3, #0 8011062: f040 8093 bne.w 801118c <_dtoa_r+0x8f4> 8011066: 9b05 ldr r3, [sp, #20] 8011068: f023 4300 bic.w r3, r3, #2147483648 @ 0x80000000 801106c: 0d1b lsrs r3, r3, #20 801106e: 051b lsls r3, r3, #20 8011070: b133 cbz r3, 8011080 <_dtoa_r+0x7e8> 8011072: 9b00 ldr r3, [sp, #0] 8011074: 3301 adds r3, #1 8011076: 9300 str r3, [sp, #0] 8011078: 9b06 ldr r3, [sp, #24] 801107a: 3301 adds r3, #1 801107c: 9306 str r3, [sp, #24] 801107e: 2301 movs r3, #1 8011080: 9308 str r3, [sp, #32] 8011082: 9b0d ldr r3, [sp, #52] @ 0x34 8011084: 2b00 cmp r3, #0 8011086: f000 81b8 beq.w 80113fa <_dtoa_r+0xb62> 801108a: 6923 ldr r3, [r4, #16] 801108c: eb04 0383 add.w r3, r4, r3, lsl #2 8011090: 6918 ldr r0, [r3, #16] 8011092: f000 fbc3 bl 801181c <__hi0bits> 8011096: f1c0 0020 rsb r0, r0, #32 801109a: 9b06 ldr r3, [sp, #24] 801109c: 4418 add r0, r3 801109e: f010 001f ands.w r0, r0, #31 80110a2: f000 8082 beq.w 80111aa <_dtoa_r+0x912> 80110a6: f1c0 0320 rsb r3, r0, #32 80110aa: 2b04 cmp r3, #4 80110ac: dd73 ble.n 8011196 <_dtoa_r+0x8fe> 80110ae: 9b00 ldr r3, [sp, #0] 80110b0: f1c0 001c rsb r0, r0, #28 80110b4: 4403 add r3, r0 80110b6: 9300 str r3, [sp, #0] 80110b8: 9b06 ldr r3, [sp, #24] 80110ba: 4403 add r3, r0 80110bc: 4406 add r6, r0 80110be: 9306 str r3, [sp, #24] 80110c0: 9b00 ldr r3, [sp, #0] 80110c2: 2b00 cmp r3, #0 80110c4: dd05 ble.n 80110d2 <_dtoa_r+0x83a> 80110c6: 9902 ldr r1, [sp, #8] 80110c8: 461a mov r2, r3 80110ca: 4648 mov r0, r9 80110cc: f000 fd04 bl 8011ad8 <__lshift> 80110d0: 9002 str r0, [sp, #8] 80110d2: 9b06 ldr r3, [sp, #24] 80110d4: 2b00 cmp r3, #0 80110d6: dd05 ble.n 80110e4 <_dtoa_r+0x84c> 80110d8: 4621 mov r1, r4 80110da: 461a mov r2, r3 80110dc: 4648 mov r0, r9 80110de: f000 fcfb bl 8011ad8 <__lshift> 80110e2: 4604 mov r4, r0 80110e4: 9b10 ldr r3, [sp, #64] @ 0x40 80110e6: 2b00 cmp r3, #0 80110e8: d061 beq.n 80111ae <_dtoa_r+0x916> 80110ea: 9802 ldr r0, [sp, #8] 80110ec: 4621 mov r1, r4 80110ee: f000 fd5f bl 8011bb0 <__mcmp> 80110f2: 2800 cmp r0, #0 80110f4: da5b bge.n 80111ae <_dtoa_r+0x916> 80110f6: 2300 movs r3, #0 80110f8: 9902 ldr r1, [sp, #8] 80110fa: 220a movs r2, #10 80110fc: 4648 mov r0, r9 80110fe: f000 fafd bl 80116fc <__multadd> 8011102: 9b09 ldr r3, [sp, #36] @ 0x24 8011104: 9002 str r0, [sp, #8] 8011106: f107 38ff add.w r8, r7, #4294967295 @ 0xffffffff 801110a: 2b00 cmp r3, #0 801110c: f000 8177 beq.w 80113fe <_dtoa_r+0xb66> 8011110: 4629 mov r1, r5 8011112: 2300 movs r3, #0 8011114: 220a movs r2, #10 8011116: 4648 mov r0, r9 8011118: f000 faf0 bl 80116fc <__multadd> 801111c: f1bb 0f00 cmp.w fp, #0 8011120: 4605 mov r5, r0 8011122: dc6f bgt.n 8011204 <_dtoa_r+0x96c> 8011124: 9b07 ldr r3, [sp, #28] 8011126: 2b02 cmp r3, #2 8011128: dc49 bgt.n 80111be <_dtoa_r+0x926> 801112a: e06b b.n 8011204 <_dtoa_r+0x96c> 801112c: 9b14 ldr r3, [sp, #80] @ 0x50 801112e: f1c3 0336 rsb r3, r3, #54 @ 0x36 8011132: e73c b.n 8010fae <_dtoa_r+0x716> 8011134: 3fe00000 .word 0x3fe00000 8011138: 40240000 .word 0x40240000 801113c: 9b03 ldr r3, [sp, #12] 801113e: 1e5c subs r4, r3, #1 8011140: 9b08 ldr r3, [sp, #32] 8011142: 42a3 cmp r3, r4 8011144: db09 blt.n 801115a <_dtoa_r+0x8c2> 8011146: 1b1c subs r4, r3, r4 8011148: 9b03 ldr r3, [sp, #12] 801114a: 2b00 cmp r3, #0 801114c: f6bf af30 bge.w 8010fb0 <_dtoa_r+0x718> 8011150: 9b00 ldr r3, [sp, #0] 8011152: 9a03 ldr r2, [sp, #12] 8011154: 1a9e subs r6, r3, r2 8011156: 2300 movs r3, #0 8011158: e72b b.n 8010fb2 <_dtoa_r+0x71a> 801115a: 9b08 ldr r3, [sp, #32] 801115c: 9a0d ldr r2, [sp, #52] @ 0x34 801115e: 9408 str r4, [sp, #32] 8011160: 1ae3 subs r3, r4, r3 8011162: 441a add r2, r3 8011164: 9e00 ldr r6, [sp, #0] 8011166: 9b03 ldr r3, [sp, #12] 8011168: 920d str r2, [sp, #52] @ 0x34 801116a: 2400 movs r4, #0 801116c: e721 b.n 8010fb2 <_dtoa_r+0x71a> 801116e: 9c08 ldr r4, [sp, #32] 8011170: 9e00 ldr r6, [sp, #0] 8011172: 9d09 ldr r5, [sp, #36] @ 0x24 8011174: e728 b.n 8010fc8 <_dtoa_r+0x730> 8011176: f8dd 8008 ldr.w r8, [sp, #8] 801117a: e751 b.n 8011020 <_dtoa_r+0x788> 801117c: 9a08 ldr r2, [sp, #32] 801117e: 9902 ldr r1, [sp, #8] 8011180: e750 b.n 8011024 <_dtoa_r+0x78c> 8011182: f8cd 8008 str.w r8, [sp, #8] 8011186: e751 b.n 801102c <_dtoa_r+0x794> 8011188: 2300 movs r3, #0 801118a: e779 b.n 8011080 <_dtoa_r+0x7e8> 801118c: 9b04 ldr r3, [sp, #16] 801118e: e777 b.n 8011080 <_dtoa_r+0x7e8> 8011190: 2300 movs r3, #0 8011192: 9308 str r3, [sp, #32] 8011194: e779 b.n 801108a <_dtoa_r+0x7f2> 8011196: d093 beq.n 80110c0 <_dtoa_r+0x828> 8011198: 9a00 ldr r2, [sp, #0] 801119a: 331c adds r3, #28 801119c: 441a add r2, r3 801119e: 9200 str r2, [sp, #0] 80111a0: 9a06 ldr r2, [sp, #24] 80111a2: 441a add r2, r3 80111a4: 441e add r6, r3 80111a6: 9206 str r2, [sp, #24] 80111a8: e78a b.n 80110c0 <_dtoa_r+0x828> 80111aa: 4603 mov r3, r0 80111ac: e7f4 b.n 8011198 <_dtoa_r+0x900> 80111ae: 9b03 ldr r3, [sp, #12] 80111b0: 2b00 cmp r3, #0 80111b2: 46b8 mov r8, r7 80111b4: dc20 bgt.n 80111f8 <_dtoa_r+0x960> 80111b6: 469b mov fp, r3 80111b8: 9b07 ldr r3, [sp, #28] 80111ba: 2b02 cmp r3, #2 80111bc: dd1e ble.n 80111fc <_dtoa_r+0x964> 80111be: f1bb 0f00 cmp.w fp, #0 80111c2: f47f adb1 bne.w 8010d28 <_dtoa_r+0x490> 80111c6: 4621 mov r1, r4 80111c8: 465b mov r3, fp 80111ca: 2205 movs r2, #5 80111cc: 4648 mov r0, r9 80111ce: f000 fa95 bl 80116fc <__multadd> 80111d2: 4601 mov r1, r0 80111d4: 4604 mov r4, r0 80111d6: 9802 ldr r0, [sp, #8] 80111d8: f000 fcea bl 8011bb0 <__mcmp> 80111dc: 2800 cmp r0, #0 80111de: f77f ada3 ble.w 8010d28 <_dtoa_r+0x490> 80111e2: 4656 mov r6, sl 80111e4: 2331 movs r3, #49 @ 0x31 80111e6: f806 3b01 strb.w r3, [r6], #1 80111ea: f108 0801 add.w r8, r8, #1 80111ee: e59f b.n 8010d30 <_dtoa_r+0x498> 80111f0: 9c03 ldr r4, [sp, #12] 80111f2: 46b8 mov r8, r7 80111f4: 4625 mov r5, r4 80111f6: e7f4 b.n 80111e2 <_dtoa_r+0x94a> 80111f8: f8dd b00c ldr.w fp, [sp, #12] 80111fc: 9b09 ldr r3, [sp, #36] @ 0x24 80111fe: 2b00 cmp r3, #0 8011200: f000 8101 beq.w 8011406 <_dtoa_r+0xb6e> 8011204: 2e00 cmp r6, #0 8011206: dd05 ble.n 8011214 <_dtoa_r+0x97c> 8011208: 4629 mov r1, r5 801120a: 4632 mov r2, r6 801120c: 4648 mov r0, r9 801120e: f000 fc63 bl 8011ad8 <__lshift> 8011212: 4605 mov r5, r0 8011214: 9b08 ldr r3, [sp, #32] 8011216: 2b00 cmp r3, #0 8011218: d05c beq.n 80112d4 <_dtoa_r+0xa3c> 801121a: 6869 ldr r1, [r5, #4] 801121c: 4648 mov r0, r9 801121e: f000 fa0b bl 8011638 <_Balloc> 8011222: 4606 mov r6, r0 8011224: b928 cbnz r0, 8011232 <_dtoa_r+0x99a> 8011226: 4b82 ldr r3, [pc, #520] @ (8011430 <_dtoa_r+0xb98>) 8011228: 4602 mov r2, r0 801122a: f240 21ef movw r1, #751 @ 0x2ef 801122e: f7ff bb4a b.w 80108c6 <_dtoa_r+0x2e> 8011232: 692a ldr r2, [r5, #16] 8011234: 3202 adds r2, #2 8011236: 0092 lsls r2, r2, #2 8011238: f105 010c add.w r1, r5, #12 801123c: 300c adds r0, #12 801123e: f7ff fa6e bl 801071e 8011242: 2201 movs r2, #1 8011244: 4631 mov r1, r6 8011246: 4648 mov r0, r9 8011248: f000 fc46 bl 8011ad8 <__lshift> 801124c: f10a 0301 add.w r3, sl, #1 8011250: 9300 str r3, [sp, #0] 8011252: eb0a 030b add.w r3, sl, fp 8011256: 9308 str r3, [sp, #32] 8011258: 9b04 ldr r3, [sp, #16] 801125a: f003 0301 and.w r3, r3, #1 801125e: 462f mov r7, r5 8011260: 9306 str r3, [sp, #24] 8011262: 4605 mov r5, r0 8011264: 9b00 ldr r3, [sp, #0] 8011266: 9802 ldr r0, [sp, #8] 8011268: 4621 mov r1, r4 801126a: f103 3bff add.w fp, r3, #4294967295 @ 0xffffffff 801126e: f7ff fa89 bl 8010784 8011272: 4603 mov r3, r0 8011274: 3330 adds r3, #48 @ 0x30 8011276: 9003 str r0, [sp, #12] 8011278: 4639 mov r1, r7 801127a: 9802 ldr r0, [sp, #8] 801127c: 9309 str r3, [sp, #36] @ 0x24 801127e: f000 fc97 bl 8011bb0 <__mcmp> 8011282: 462a mov r2, r5 8011284: 9004 str r0, [sp, #16] 8011286: 4621 mov r1, r4 8011288: 4648 mov r0, r9 801128a: f000 fcad bl 8011be8 <__mdiff> 801128e: 68c2 ldr r2, [r0, #12] 8011290: 9b09 ldr r3, [sp, #36] @ 0x24 8011292: 4606 mov r6, r0 8011294: bb02 cbnz r2, 80112d8 <_dtoa_r+0xa40> 8011296: 4601 mov r1, r0 8011298: 9802 ldr r0, [sp, #8] 801129a: f000 fc89 bl 8011bb0 <__mcmp> 801129e: 9b09 ldr r3, [sp, #36] @ 0x24 80112a0: 4602 mov r2, r0 80112a2: 4631 mov r1, r6 80112a4: 4648 mov r0, r9 80112a6: 920c str r2, [sp, #48] @ 0x30 80112a8: 9309 str r3, [sp, #36] @ 0x24 80112aa: f000 fa05 bl 80116b8 <_Bfree> 80112ae: 9b07 ldr r3, [sp, #28] 80112b0: 9a0c ldr r2, [sp, #48] @ 0x30 80112b2: 9e00 ldr r6, [sp, #0] 80112b4: ea42 0103 orr.w r1, r2, r3 80112b8: 9b06 ldr r3, [sp, #24] 80112ba: 4319 orrs r1, r3 80112bc: 9b09 ldr r3, [sp, #36] @ 0x24 80112be: d10d bne.n 80112dc <_dtoa_r+0xa44> 80112c0: 2b39 cmp r3, #57 @ 0x39 80112c2: d027 beq.n 8011314 <_dtoa_r+0xa7c> 80112c4: 9a04 ldr r2, [sp, #16] 80112c6: 2a00 cmp r2, #0 80112c8: dd01 ble.n 80112ce <_dtoa_r+0xa36> 80112ca: 9b03 ldr r3, [sp, #12] 80112cc: 3331 adds r3, #49 @ 0x31 80112ce: f88b 3000 strb.w r3, [fp] 80112d2: e52e b.n 8010d32 <_dtoa_r+0x49a> 80112d4: 4628 mov r0, r5 80112d6: e7b9 b.n 801124c <_dtoa_r+0x9b4> 80112d8: 2201 movs r2, #1 80112da: e7e2 b.n 80112a2 <_dtoa_r+0xa0a> 80112dc: 9904 ldr r1, [sp, #16] 80112de: 2900 cmp r1, #0 80112e0: db04 blt.n 80112ec <_dtoa_r+0xa54> 80112e2: 9807 ldr r0, [sp, #28] 80112e4: 4301 orrs r1, r0 80112e6: 9806 ldr r0, [sp, #24] 80112e8: 4301 orrs r1, r0 80112ea: d120 bne.n 801132e <_dtoa_r+0xa96> 80112ec: 2a00 cmp r2, #0 80112ee: ddee ble.n 80112ce <_dtoa_r+0xa36> 80112f0: 9902 ldr r1, [sp, #8] 80112f2: 9300 str r3, [sp, #0] 80112f4: 2201 movs r2, #1 80112f6: 4648 mov r0, r9 80112f8: f000 fbee bl 8011ad8 <__lshift> 80112fc: 4621 mov r1, r4 80112fe: 9002 str r0, [sp, #8] 8011300: f000 fc56 bl 8011bb0 <__mcmp> 8011304: 2800 cmp r0, #0 8011306: 9b00 ldr r3, [sp, #0] 8011308: dc02 bgt.n 8011310 <_dtoa_r+0xa78> 801130a: d1e0 bne.n 80112ce <_dtoa_r+0xa36> 801130c: 07da lsls r2, r3, #31 801130e: d5de bpl.n 80112ce <_dtoa_r+0xa36> 8011310: 2b39 cmp r3, #57 @ 0x39 8011312: d1da bne.n 80112ca <_dtoa_r+0xa32> 8011314: 2339 movs r3, #57 @ 0x39 8011316: f88b 3000 strb.w r3, [fp] 801131a: 4633 mov r3, r6 801131c: 461e mov r6, r3 801131e: 3b01 subs r3, #1 8011320: f816 2c01 ldrb.w r2, [r6, #-1] 8011324: 2a39 cmp r2, #57 @ 0x39 8011326: d04e beq.n 80113c6 <_dtoa_r+0xb2e> 8011328: 3201 adds r2, #1 801132a: 701a strb r2, [r3, #0] 801132c: e501 b.n 8010d32 <_dtoa_r+0x49a> 801132e: 2a00 cmp r2, #0 8011330: dd03 ble.n 801133a <_dtoa_r+0xaa2> 8011332: 2b39 cmp r3, #57 @ 0x39 8011334: d0ee beq.n 8011314 <_dtoa_r+0xa7c> 8011336: 3301 adds r3, #1 8011338: e7c9 b.n 80112ce <_dtoa_r+0xa36> 801133a: 9a00 ldr r2, [sp, #0] 801133c: 9908 ldr r1, [sp, #32] 801133e: f802 3c01 strb.w r3, [r2, #-1] 8011342: 428a cmp r2, r1 8011344: d028 beq.n 8011398 <_dtoa_r+0xb00> 8011346: 9902 ldr r1, [sp, #8] 8011348: 2300 movs r3, #0 801134a: 220a movs r2, #10 801134c: 4648 mov r0, r9 801134e: f000 f9d5 bl 80116fc <__multadd> 8011352: 42af cmp r7, r5 8011354: 9002 str r0, [sp, #8] 8011356: f04f 0300 mov.w r3, #0 801135a: f04f 020a mov.w r2, #10 801135e: 4639 mov r1, r7 8011360: 4648 mov r0, r9 8011362: d107 bne.n 8011374 <_dtoa_r+0xadc> 8011364: f000 f9ca bl 80116fc <__multadd> 8011368: 4607 mov r7, r0 801136a: 4605 mov r5, r0 801136c: 9b00 ldr r3, [sp, #0] 801136e: 3301 adds r3, #1 8011370: 9300 str r3, [sp, #0] 8011372: e777 b.n 8011264 <_dtoa_r+0x9cc> 8011374: f000 f9c2 bl 80116fc <__multadd> 8011378: 4629 mov r1, r5 801137a: 4607 mov r7, r0 801137c: 2300 movs r3, #0 801137e: 220a movs r2, #10 8011380: 4648 mov r0, r9 8011382: f000 f9bb bl 80116fc <__multadd> 8011386: 4605 mov r5, r0 8011388: e7f0 b.n 801136c <_dtoa_r+0xad4> 801138a: f1bb 0f00 cmp.w fp, #0 801138e: bfcc ite gt 8011390: 465e movgt r6, fp 8011392: 2601 movle r6, #1 8011394: 4456 add r6, sl 8011396: 2700 movs r7, #0 8011398: 9902 ldr r1, [sp, #8] 801139a: 9300 str r3, [sp, #0] 801139c: 2201 movs r2, #1 801139e: 4648 mov r0, r9 80113a0: f000 fb9a bl 8011ad8 <__lshift> 80113a4: 4621 mov r1, r4 80113a6: 9002 str r0, [sp, #8] 80113a8: f000 fc02 bl 8011bb0 <__mcmp> 80113ac: 2800 cmp r0, #0 80113ae: dcb4 bgt.n 801131a <_dtoa_r+0xa82> 80113b0: d102 bne.n 80113b8 <_dtoa_r+0xb20> 80113b2: 9b00 ldr r3, [sp, #0] 80113b4: 07db lsls r3, r3, #31 80113b6: d4b0 bmi.n 801131a <_dtoa_r+0xa82> 80113b8: 4633 mov r3, r6 80113ba: 461e mov r6, r3 80113bc: f813 2d01 ldrb.w r2, [r3, #-1]! 80113c0: 2a30 cmp r2, #48 @ 0x30 80113c2: d0fa beq.n 80113ba <_dtoa_r+0xb22> 80113c4: e4b5 b.n 8010d32 <_dtoa_r+0x49a> 80113c6: 459a cmp sl, r3 80113c8: d1a8 bne.n 801131c <_dtoa_r+0xa84> 80113ca: 2331 movs r3, #49 @ 0x31 80113cc: f108 0801 add.w r8, r8, #1 80113d0: f88a 3000 strb.w r3, [sl] 80113d4: e4ad b.n 8010d32 <_dtoa_r+0x49a> 80113d6: 9b21 ldr r3, [sp, #132] @ 0x84 80113d8: f8df a058 ldr.w sl, [pc, #88] @ 8011434 <_dtoa_r+0xb9c> 80113dc: b11b cbz r3, 80113e6 <_dtoa_r+0xb4e> 80113de: f10a 0308 add.w r3, sl, #8 80113e2: 9a21 ldr r2, [sp, #132] @ 0x84 80113e4: 6013 str r3, [r2, #0] 80113e6: 4650 mov r0, sl 80113e8: b017 add sp, #92 @ 0x5c 80113ea: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} 80113ee: 9b07 ldr r3, [sp, #28] 80113f0: 2b01 cmp r3, #1 80113f2: f77f ae2e ble.w 8011052 <_dtoa_r+0x7ba> 80113f6: 9b0d ldr r3, [sp, #52] @ 0x34 80113f8: 9308 str r3, [sp, #32] 80113fa: 2001 movs r0, #1 80113fc: e64d b.n 801109a <_dtoa_r+0x802> 80113fe: f1bb 0f00 cmp.w fp, #0 8011402: f77f aed9 ble.w 80111b8 <_dtoa_r+0x920> 8011406: 4656 mov r6, sl 8011408: 9802 ldr r0, [sp, #8] 801140a: 4621 mov r1, r4 801140c: f7ff f9ba bl 8010784 8011410: f100 0330 add.w r3, r0, #48 @ 0x30 8011414: f806 3b01 strb.w r3, [r6], #1 8011418: eba6 020a sub.w r2, r6, sl 801141c: 4593 cmp fp, r2 801141e: ddb4 ble.n 801138a <_dtoa_r+0xaf2> 8011420: 9902 ldr r1, [sp, #8] 8011422: 2300 movs r3, #0 8011424: 220a movs r2, #10 8011426: 4648 mov r0, r9 8011428: f000 f968 bl 80116fc <__multadd> 801142c: 9002 str r0, [sp, #8] 801142e: e7eb b.n 8011408 <_dtoa_r+0xb70> 8011430: 0801504d .word 0x0801504d 8011434: 08014fe8 .word 0x08014fe8 08011438 <_free_r>: 8011438: b538 push {r3, r4, r5, lr} 801143a: 4605 mov r5, r0 801143c: 2900 cmp r1, #0 801143e: d041 beq.n 80114c4 <_free_r+0x8c> 8011440: f851 3c04 ldr.w r3, [r1, #-4] 8011444: 1f0c subs r4, r1, #4 8011446: 2b00 cmp r3, #0 8011448: bfb8 it lt 801144a: 18e4 addlt r4, r4, r3 801144c: f000 f8e8 bl 8011620 <__malloc_lock> 8011450: 4a1d ldr r2, [pc, #116] @ (80114c8 <_free_r+0x90>) 8011452: 6813 ldr r3, [r2, #0] 8011454: b933 cbnz r3, 8011464 <_free_r+0x2c> 8011456: 6063 str r3, [r4, #4] 8011458: 6014 str r4, [r2, #0] 801145a: 4628 mov r0, r5 801145c: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr} 8011460: f000 b8e4 b.w 801162c <__malloc_unlock> 8011464: 42a3 cmp r3, r4 8011466: d908 bls.n 801147a <_free_r+0x42> 8011468: 6820 ldr r0, [r4, #0] 801146a: 1821 adds r1, r4, r0 801146c: 428b cmp r3, r1 801146e: bf01 itttt eq 8011470: 6819 ldreq r1, [r3, #0] 8011472: 685b ldreq r3, [r3, #4] 8011474: 1809 addeq r1, r1, r0 8011476: 6021 streq r1, [r4, #0] 8011478: e7ed b.n 8011456 <_free_r+0x1e> 801147a: 461a mov r2, r3 801147c: 685b ldr r3, [r3, #4] 801147e: b10b cbz r3, 8011484 <_free_r+0x4c> 8011480: 42a3 cmp r3, r4 8011482: d9fa bls.n 801147a <_free_r+0x42> 8011484: 6811 ldr r1, [r2, #0] 8011486: 1850 adds r0, r2, r1 8011488: 42a0 cmp r0, r4 801148a: d10b bne.n 80114a4 <_free_r+0x6c> 801148c: 6820 ldr r0, [r4, #0] 801148e: 4401 add r1, r0 8011490: 1850 adds r0, r2, r1 8011492: 4283 cmp r3, r0 8011494: 6011 str r1, [r2, #0] 8011496: d1e0 bne.n 801145a <_free_r+0x22> 8011498: 6818 ldr r0, [r3, #0] 801149a: 685b ldr r3, [r3, #4] 801149c: 6053 str r3, [r2, #4] 801149e: 4408 add r0, r1 80114a0: 6010 str r0, [r2, #0] 80114a2: e7da b.n 801145a <_free_r+0x22> 80114a4: d902 bls.n 80114ac <_free_r+0x74> 80114a6: 230c movs r3, #12 80114a8: 602b str r3, [r5, #0] 80114aa: e7d6 b.n 801145a <_free_r+0x22> 80114ac: 6820 ldr r0, [r4, #0] 80114ae: 1821 adds r1, r4, r0 80114b0: 428b cmp r3, r1 80114b2: bf04 itt eq 80114b4: 6819 ldreq r1, [r3, #0] 80114b6: 685b ldreq r3, [r3, #4] 80114b8: 6063 str r3, [r4, #4] 80114ba: bf04 itt eq 80114bc: 1809 addeq r1, r1, r0 80114be: 6021 streq r1, [r4, #0] 80114c0: 6054 str r4, [r2, #4] 80114c2: e7ca b.n 801145a <_free_r+0x22> 80114c4: bd38 pop {r3, r4, r5, pc} 80114c6: bf00 nop 80114c8: 200036ac .word 0x200036ac 080114cc : 80114cc: 4b02 ldr r3, [pc, #8] @ (80114d8 ) 80114ce: 4601 mov r1, r0 80114d0: 6818 ldr r0, [r3, #0] 80114d2: f000 b825 b.w 8011520 <_malloc_r> 80114d6: bf00 nop 80114d8: 200000e0 .word 0x200000e0 080114dc : 80114dc: b570 push {r4, r5, r6, lr} 80114de: 4e0f ldr r6, [pc, #60] @ (801151c ) 80114e0: 460c mov r4, r1 80114e2: 6831 ldr r1, [r6, #0] 80114e4: 4605 mov r5, r0 80114e6: b911 cbnz r1, 80114ee 80114e8: f002 fb5c bl 8013ba4 <_sbrk_r> 80114ec: 6030 str r0, [r6, #0] 80114ee: 4621 mov r1, r4 80114f0: 4628 mov r0, r5 80114f2: f002 fb57 bl 8013ba4 <_sbrk_r> 80114f6: 1c43 adds r3, r0, #1 80114f8: d103 bne.n 8011502 80114fa: f04f 34ff mov.w r4, #4294967295 @ 0xffffffff 80114fe: 4620 mov r0, r4 8011500: bd70 pop {r4, r5, r6, pc} 8011502: 1cc4 adds r4, r0, #3 8011504: f024 0403 bic.w r4, r4, #3 8011508: 42a0 cmp r0, r4 801150a: d0f8 beq.n 80114fe 801150c: 1a21 subs r1, r4, r0 801150e: 4628 mov r0, r5 8011510: f002 fb48 bl 8013ba4 <_sbrk_r> 8011514: 3001 adds r0, #1 8011516: d1f2 bne.n 80114fe 8011518: e7ef b.n 80114fa 801151a: bf00 nop 801151c: 200036a8 .word 0x200036a8 08011520 <_malloc_r>: 8011520: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr} 8011524: 1ccd adds r5, r1, #3 8011526: f025 0503 bic.w r5, r5, #3 801152a: 3508 adds r5, #8 801152c: 2d0c cmp r5, #12 801152e: bf38 it cc 8011530: 250c movcc r5, #12 8011532: 2d00 cmp r5, #0 8011534: 4606 mov r6, r0 8011536: db01 blt.n 801153c <_malloc_r+0x1c> 8011538: 42a9 cmp r1, r5 801153a: d904 bls.n 8011546 <_malloc_r+0x26> 801153c: 230c movs r3, #12 801153e: 6033 str r3, [r6, #0] 8011540: 2000 movs r0, #0 8011542: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc} 8011546: f8df 80d4 ldr.w r8, [pc, #212] @ 801161c <_malloc_r+0xfc> 801154a: f000 f869 bl 8011620 <__malloc_lock> 801154e: f8d8 3000 ldr.w r3, [r8] 8011552: 461c mov r4, r3 8011554: bb44 cbnz r4, 80115a8 <_malloc_r+0x88> 8011556: 4629 mov r1, r5 8011558: 4630 mov r0, r6 801155a: f7ff ffbf bl 80114dc 801155e: 1c43 adds r3, r0, #1 8011560: 4604 mov r4, r0 8011562: d158 bne.n 8011616 <_malloc_r+0xf6> 8011564: f8d8 4000 ldr.w r4, [r8] 8011568: 4627 mov r7, r4 801156a: 2f00 cmp r7, #0 801156c: d143 bne.n 80115f6 <_malloc_r+0xd6> 801156e: 2c00 cmp r4, #0 8011570: d04b beq.n 801160a <_malloc_r+0xea> 8011572: 6823 ldr r3, [r4, #0] 8011574: 4639 mov r1, r7 8011576: 4630 mov r0, r6 8011578: eb04 0903 add.w r9, r4, r3 801157c: f002 fb12 bl 8013ba4 <_sbrk_r> 8011580: 4581 cmp r9, r0 8011582: d142 bne.n 801160a <_malloc_r+0xea> 8011584: 6821 ldr r1, [r4, #0] 8011586: 1a6d subs r5, r5, r1 8011588: 4629 mov r1, r5 801158a: 4630 mov r0, r6 801158c: f7ff ffa6 bl 80114dc 8011590: 3001 adds r0, #1 8011592: d03a beq.n 801160a <_malloc_r+0xea> 8011594: 6823 ldr r3, [r4, #0] 8011596: 442b add r3, r5 8011598: 6023 str r3, [r4, #0] 801159a: f8d8 3000 ldr.w r3, [r8] 801159e: 685a ldr r2, [r3, #4] 80115a0: bb62 cbnz r2, 80115fc <_malloc_r+0xdc> 80115a2: f8c8 7000 str.w r7, [r8] 80115a6: e00f b.n 80115c8 <_malloc_r+0xa8> 80115a8: 6822 ldr r2, [r4, #0] 80115aa: 1b52 subs r2, r2, r5 80115ac: d420 bmi.n 80115f0 <_malloc_r+0xd0> 80115ae: 2a0b cmp r2, #11 80115b0: d917 bls.n 80115e2 <_malloc_r+0xc2> 80115b2: 1961 adds r1, r4, r5 80115b4: 42a3 cmp r3, r4 80115b6: 6025 str r5, [r4, #0] 80115b8: bf18 it ne 80115ba: 6059 strne r1, [r3, #4] 80115bc: 6863 ldr r3, [r4, #4] 80115be: bf08 it eq 80115c0: f8c8 1000 streq.w r1, [r8] 80115c4: 5162 str r2, [r4, r5] 80115c6: 604b str r3, [r1, #4] 80115c8: 4630 mov r0, r6 80115ca: f000 f82f bl 801162c <__malloc_unlock> 80115ce: f104 000b add.w r0, r4, #11 80115d2: 1d23 adds r3, r4, #4 80115d4: f020 0007 bic.w r0, r0, #7 80115d8: 1ac2 subs r2, r0, r3 80115da: bf1c itt ne 80115dc: 1a1b subne r3, r3, r0 80115de: 50a3 strne r3, [r4, r2] 80115e0: e7af b.n 8011542 <_malloc_r+0x22> 80115e2: 6862 ldr r2, [r4, #4] 80115e4: 42a3 cmp r3, r4 80115e6: bf0c ite eq 80115e8: f8c8 2000 streq.w r2, [r8] 80115ec: 605a strne r2, [r3, #4] 80115ee: e7eb b.n 80115c8 <_malloc_r+0xa8> 80115f0: 4623 mov r3, r4 80115f2: 6864 ldr r4, [r4, #4] 80115f4: e7ae b.n 8011554 <_malloc_r+0x34> 80115f6: 463c mov r4, r7 80115f8: 687f ldr r7, [r7, #4] 80115fa: e7b6 b.n 801156a <_malloc_r+0x4a> 80115fc: 461a mov r2, r3 80115fe: 685b ldr r3, [r3, #4] 8011600: 42a3 cmp r3, r4 8011602: d1fb bne.n 80115fc <_malloc_r+0xdc> 8011604: 2300 movs r3, #0 8011606: 6053 str r3, [r2, #4] 8011608: e7de b.n 80115c8 <_malloc_r+0xa8> 801160a: 230c movs r3, #12 801160c: 6033 str r3, [r6, #0] 801160e: 4630 mov r0, r6 8011610: f000 f80c bl 801162c <__malloc_unlock> 8011614: e794 b.n 8011540 <_malloc_r+0x20> 8011616: 6005 str r5, [r0, #0] 8011618: e7d6 b.n 80115c8 <_malloc_r+0xa8> 801161a: bf00 nop 801161c: 200036ac .word 0x200036ac 08011620 <__malloc_lock>: 8011620: 4801 ldr r0, [pc, #4] @ (8011628 <__malloc_lock+0x8>) 8011622: f7ff b87a b.w 801071a <__retarget_lock_acquire_recursive> 8011626: bf00 nop 8011628: 200036a4 .word 0x200036a4 0801162c <__malloc_unlock>: 801162c: 4801 ldr r0, [pc, #4] @ (8011634 <__malloc_unlock+0x8>) 801162e: f7ff b875 b.w 801071c <__retarget_lock_release_recursive> 8011632: bf00 nop 8011634: 200036a4 .word 0x200036a4 08011638 <_Balloc>: 8011638: b570 push {r4, r5, r6, lr} 801163a: 69c6 ldr r6, [r0, #28] 801163c: 4604 mov r4, r0 801163e: 460d mov r5, r1 8011640: b976 cbnz r6, 8011660 <_Balloc+0x28> 8011642: 2010 movs r0, #16 8011644: f7ff ff42 bl 80114cc 8011648: 4602 mov r2, r0 801164a: 61e0 str r0, [r4, #28] 801164c: b920 cbnz r0, 8011658 <_Balloc+0x20> 801164e: 4b18 ldr r3, [pc, #96] @ (80116b0 <_Balloc+0x78>) 8011650: 4818 ldr r0, [pc, #96] @ (80116b4 <_Balloc+0x7c>) 8011652: 216b movs r1, #107 @ 0x6b 8011654: f7ff f878 bl 8010748 <__assert_func> 8011658: e9c0 6601 strd r6, r6, [r0, #4] 801165c: 6006 str r6, [r0, #0] 801165e: 60c6 str r6, [r0, #12] 8011660: 69e6 ldr r6, [r4, #28] 8011662: 68f3 ldr r3, [r6, #12] 8011664: b183 cbz r3, 8011688 <_Balloc+0x50> 8011666: 69e3 ldr r3, [r4, #28] 8011668: 68db ldr r3, [r3, #12] 801166a: f853 0025 ldr.w r0, [r3, r5, lsl #2] 801166e: b9b8 cbnz r0, 80116a0 <_Balloc+0x68> 8011670: 2101 movs r1, #1 8011672: fa01 f605 lsl.w r6, r1, r5 8011676: 1d72 adds r2, r6, #5 8011678: 0092 lsls r2, r2, #2 801167a: 4620 mov r0, r4 801167c: f002 fab3 bl 8013be6 <_calloc_r> 8011680: b160 cbz r0, 801169c <_Balloc+0x64> 8011682: e9c0 5601 strd r5, r6, [r0, #4] 8011686: e00e b.n 80116a6 <_Balloc+0x6e> 8011688: 2221 movs r2, #33 @ 0x21 801168a: 2104 movs r1, #4 801168c: 4620 mov r0, r4 801168e: f002 faaa bl 8013be6 <_calloc_r> 8011692: 69e3 ldr r3, [r4, #28] 8011694: 60f0 str r0, [r6, #12] 8011696: 68db ldr r3, [r3, #12] 8011698: 2b00 cmp r3, #0 801169a: d1e4 bne.n 8011666 <_Balloc+0x2e> 801169c: 2000 movs r0, #0 801169e: bd70 pop {r4, r5, r6, pc} 80116a0: 6802 ldr r2, [r0, #0] 80116a2: f843 2025 str.w r2, [r3, r5, lsl #2] 80116a6: 2300 movs r3, #0 80116a8: e9c0 3303 strd r3, r3, [r0, #12] 80116ac: e7f7 b.n 801169e <_Balloc+0x66> 80116ae: bf00 nop 80116b0: 08014f3b .word 0x08014f3b 80116b4: 0801505e .word 0x0801505e 080116b8 <_Bfree>: 80116b8: b570 push {r4, r5, r6, lr} 80116ba: 69c6 ldr r6, [r0, #28] 80116bc: 4605 mov r5, r0 80116be: 460c mov r4, r1 80116c0: b976 cbnz r6, 80116e0 <_Bfree+0x28> 80116c2: 2010 movs r0, #16 80116c4: f7ff ff02 bl 80114cc 80116c8: 4602 mov r2, r0 80116ca: 61e8 str r0, [r5, #28] 80116cc: b920 cbnz r0, 80116d8 <_Bfree+0x20> 80116ce: 4b09 ldr r3, [pc, #36] @ (80116f4 <_Bfree+0x3c>) 80116d0: 4809 ldr r0, [pc, #36] @ (80116f8 <_Bfree+0x40>) 80116d2: 218f movs r1, #143 @ 0x8f 80116d4: f7ff f838 bl 8010748 <__assert_func> 80116d8: e9c0 6601 strd r6, r6, [r0, #4] 80116dc: 6006 str r6, [r0, #0] 80116de: 60c6 str r6, [r0, #12] 80116e0: b13c cbz r4, 80116f2 <_Bfree+0x3a> 80116e2: 69eb ldr r3, [r5, #28] 80116e4: 6862 ldr r2, [r4, #4] 80116e6: 68db ldr r3, [r3, #12] 80116e8: f853 1022 ldr.w r1, [r3, r2, lsl #2] 80116ec: 6021 str r1, [r4, #0] 80116ee: f843 4022 str.w r4, [r3, r2, lsl #2] 80116f2: bd70 pop {r4, r5, r6, pc} 80116f4: 08014f3b .word 0x08014f3b 80116f8: 0801505e .word 0x0801505e 080116fc <__multadd>: 80116fc: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} 8011700: 690d ldr r5, [r1, #16] 8011702: 4607 mov r7, r0 8011704: 460c mov r4, r1 8011706: 461e mov r6, r3 8011708: f101 0c14 add.w ip, r1, #20 801170c: 2000 movs r0, #0 801170e: f8dc 3000 ldr.w r3, [ip] 8011712: b299 uxth r1, r3 8011714: fb02 6101 mla r1, r2, r1, r6 8011718: 0c1e lsrs r6, r3, #16 801171a: 0c0b lsrs r3, r1, #16 801171c: fb02 3306 mla r3, r2, r6, r3 8011720: b289 uxth r1, r1 8011722: 3001 adds r0, #1 8011724: eb01 4103 add.w r1, r1, r3, lsl #16 8011728: 4285 cmp r5, r0 801172a: f84c 1b04 str.w r1, [ip], #4 801172e: ea4f 4613 mov.w r6, r3, lsr #16 8011732: dcec bgt.n 801170e <__multadd+0x12> 8011734: b30e cbz r6, 801177a <__multadd+0x7e> 8011736: 68a3 ldr r3, [r4, #8] 8011738: 42ab cmp r3, r5 801173a: dc19 bgt.n 8011770 <__multadd+0x74> 801173c: 6861 ldr r1, [r4, #4] 801173e: 4638 mov r0, r7 8011740: 3101 adds r1, #1 8011742: f7ff ff79 bl 8011638 <_Balloc> 8011746: 4680 mov r8, r0 8011748: b928 cbnz r0, 8011756 <__multadd+0x5a> 801174a: 4602 mov r2, r0 801174c: 4b0c ldr r3, [pc, #48] @ (8011780 <__multadd+0x84>) 801174e: 480d ldr r0, [pc, #52] @ (8011784 <__multadd+0x88>) 8011750: 21ba movs r1, #186 @ 0xba 8011752: f7fe fff9 bl 8010748 <__assert_func> 8011756: 6922 ldr r2, [r4, #16] 8011758: 3202 adds r2, #2 801175a: f104 010c add.w r1, r4, #12 801175e: 0092 lsls r2, r2, #2 8011760: 300c adds r0, #12 8011762: f7fe ffdc bl 801071e 8011766: 4621 mov r1, r4 8011768: 4638 mov r0, r7 801176a: f7ff ffa5 bl 80116b8 <_Bfree> 801176e: 4644 mov r4, r8 8011770: eb04 0385 add.w r3, r4, r5, lsl #2 8011774: 3501 adds r5, #1 8011776: 615e str r6, [r3, #20] 8011778: 6125 str r5, [r4, #16] 801177a: 4620 mov r0, r4 801177c: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 8011780: 0801504d .word 0x0801504d 8011784: 0801505e .word 0x0801505e 08011788 <__s2b>: 8011788: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr} 801178c: 460c mov r4, r1 801178e: 4615 mov r5, r2 8011790: 461f mov r7, r3 8011792: 2209 movs r2, #9 8011794: 3308 adds r3, #8 8011796: 4606 mov r6, r0 8011798: fb93 f3f2 sdiv r3, r3, r2 801179c: 2100 movs r1, #0 801179e: 2201 movs r2, #1 80117a0: 429a cmp r2, r3 80117a2: db09 blt.n 80117b8 <__s2b+0x30> 80117a4: 4630 mov r0, r6 80117a6: f7ff ff47 bl 8011638 <_Balloc> 80117aa: b940 cbnz r0, 80117be <__s2b+0x36> 80117ac: 4602 mov r2, r0 80117ae: 4b19 ldr r3, [pc, #100] @ (8011814 <__s2b+0x8c>) 80117b0: 4819 ldr r0, [pc, #100] @ (8011818 <__s2b+0x90>) 80117b2: 21d3 movs r1, #211 @ 0xd3 80117b4: f7fe ffc8 bl 8010748 <__assert_func> 80117b8: 0052 lsls r2, r2, #1 80117ba: 3101 adds r1, #1 80117bc: e7f0 b.n 80117a0 <__s2b+0x18> 80117be: 9b08 ldr r3, [sp, #32] 80117c0: 6143 str r3, [r0, #20] 80117c2: 2d09 cmp r5, #9 80117c4: f04f 0301 mov.w r3, #1 80117c8: 6103 str r3, [r0, #16] 80117ca: dd16 ble.n 80117fa <__s2b+0x72> 80117cc: f104 0909 add.w r9, r4, #9 80117d0: 46c8 mov r8, r9 80117d2: 442c add r4, r5 80117d4: f818 3b01 ldrb.w r3, [r8], #1 80117d8: 4601 mov r1, r0 80117da: 3b30 subs r3, #48 @ 0x30 80117dc: 220a movs r2, #10 80117de: 4630 mov r0, r6 80117e0: f7ff ff8c bl 80116fc <__multadd> 80117e4: 45a0 cmp r8, r4 80117e6: d1f5 bne.n 80117d4 <__s2b+0x4c> 80117e8: f1a5 0408 sub.w r4, r5, #8 80117ec: 444c add r4, r9 80117ee: 1b2d subs r5, r5, r4 80117f0: 1963 adds r3, r4, r5 80117f2: 42bb cmp r3, r7 80117f4: db04 blt.n 8011800 <__s2b+0x78> 80117f6: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc} 80117fa: 340a adds r4, #10 80117fc: 2509 movs r5, #9 80117fe: e7f6 b.n 80117ee <__s2b+0x66> 8011800: f814 3b01 ldrb.w r3, [r4], #1 8011804: 4601 mov r1, r0 8011806: 3b30 subs r3, #48 @ 0x30 8011808: 220a movs r2, #10 801180a: 4630 mov r0, r6 801180c: f7ff ff76 bl 80116fc <__multadd> 8011810: e7ee b.n 80117f0 <__s2b+0x68> 8011812: bf00 nop 8011814: 0801504d .word 0x0801504d 8011818: 0801505e .word 0x0801505e 0801181c <__hi0bits>: 801181c: f5b0 3f80 cmp.w r0, #65536 @ 0x10000 8011820: 4603 mov r3, r0 8011822: bf36 itet cc 8011824: 0403 lslcc r3, r0, #16 8011826: 2000 movcs r0, #0 8011828: 2010 movcc r0, #16 801182a: f1b3 7f80 cmp.w r3, #16777216 @ 0x1000000 801182e: bf3c itt cc 8011830: 021b lslcc r3, r3, #8 8011832: 3008 addcc r0, #8 8011834: f1b3 5f80 cmp.w r3, #268435456 @ 0x10000000 8011838: bf3c itt cc 801183a: 011b lslcc r3, r3, #4 801183c: 3004 addcc r0, #4 801183e: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000 8011842: bf3c itt cc 8011844: 009b lslcc r3, r3, #2 8011846: 3002 addcc r0, #2 8011848: 2b00 cmp r3, #0 801184a: db05 blt.n 8011858 <__hi0bits+0x3c> 801184c: f013 4f80 tst.w r3, #1073741824 @ 0x40000000 8011850: f100 0001 add.w r0, r0, #1 8011854: bf08 it eq 8011856: 2020 moveq r0, #32 8011858: 4770 bx lr 0801185a <__lo0bits>: 801185a: 6803 ldr r3, [r0, #0] 801185c: 4602 mov r2, r0 801185e: f013 0007 ands.w r0, r3, #7 8011862: d00b beq.n 801187c <__lo0bits+0x22> 8011864: 07d9 lsls r1, r3, #31 8011866: d421 bmi.n 80118ac <__lo0bits+0x52> 8011868: 0798 lsls r0, r3, #30 801186a: bf49 itett mi 801186c: 085b lsrmi r3, r3, #1 801186e: 089b lsrpl r3, r3, #2 8011870: 2001 movmi r0, #1 8011872: 6013 strmi r3, [r2, #0] 8011874: bf5c itt pl 8011876: 6013 strpl r3, [r2, #0] 8011878: 2002 movpl r0, #2 801187a: 4770 bx lr 801187c: b299 uxth r1, r3 801187e: b909 cbnz r1, 8011884 <__lo0bits+0x2a> 8011880: 0c1b lsrs r3, r3, #16 8011882: 2010 movs r0, #16 8011884: b2d9 uxtb r1, r3 8011886: b909 cbnz r1, 801188c <__lo0bits+0x32> 8011888: 3008 adds r0, #8 801188a: 0a1b lsrs r3, r3, #8 801188c: 0719 lsls r1, r3, #28 801188e: bf04 itt eq 8011890: 091b lsreq r3, r3, #4 8011892: 3004 addeq r0, #4 8011894: 0799 lsls r1, r3, #30 8011896: bf04 itt eq 8011898: 089b lsreq r3, r3, #2 801189a: 3002 addeq r0, #2 801189c: 07d9 lsls r1, r3, #31 801189e: d403 bmi.n 80118a8 <__lo0bits+0x4e> 80118a0: 085b lsrs r3, r3, #1 80118a2: f100 0001 add.w r0, r0, #1 80118a6: d003 beq.n 80118b0 <__lo0bits+0x56> 80118a8: 6013 str r3, [r2, #0] 80118aa: 4770 bx lr 80118ac: 2000 movs r0, #0 80118ae: 4770 bx lr 80118b0: 2020 movs r0, #32 80118b2: 4770 bx lr 080118b4 <__i2b>: 80118b4: b510 push {r4, lr} 80118b6: 460c mov r4, r1 80118b8: 2101 movs r1, #1 80118ba: f7ff febd bl 8011638 <_Balloc> 80118be: 4602 mov r2, r0 80118c0: b928 cbnz r0, 80118ce <__i2b+0x1a> 80118c2: 4b05 ldr r3, [pc, #20] @ (80118d8 <__i2b+0x24>) 80118c4: 4805 ldr r0, [pc, #20] @ (80118dc <__i2b+0x28>) 80118c6: f240 1145 movw r1, #325 @ 0x145 80118ca: f7fe ff3d bl 8010748 <__assert_func> 80118ce: 2301 movs r3, #1 80118d0: 6144 str r4, [r0, #20] 80118d2: 6103 str r3, [r0, #16] 80118d4: bd10 pop {r4, pc} 80118d6: bf00 nop 80118d8: 0801504d .word 0x0801504d 80118dc: 0801505e .word 0x0801505e 080118e0 <__multiply>: 80118e0: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 80118e4: 4617 mov r7, r2 80118e6: 690a ldr r2, [r1, #16] 80118e8: 693b ldr r3, [r7, #16] 80118ea: 429a cmp r2, r3 80118ec: bfa8 it ge 80118ee: 463b movge r3, r7 80118f0: 4689 mov r9, r1 80118f2: bfa4 itt ge 80118f4: 460f movge r7, r1 80118f6: 4699 movge r9, r3 80118f8: 693d ldr r5, [r7, #16] 80118fa: f8d9 a010 ldr.w sl, [r9, #16] 80118fe: 68bb ldr r3, [r7, #8] 8011900: 6879 ldr r1, [r7, #4] 8011902: eb05 060a add.w r6, r5, sl 8011906: 42b3 cmp r3, r6 8011908: b085 sub sp, #20 801190a: bfb8 it lt 801190c: 3101 addlt r1, #1 801190e: f7ff fe93 bl 8011638 <_Balloc> 8011912: b930 cbnz r0, 8011922 <__multiply+0x42> 8011914: 4602 mov r2, r0 8011916: 4b41 ldr r3, [pc, #260] @ (8011a1c <__multiply+0x13c>) 8011918: 4841 ldr r0, [pc, #260] @ (8011a20 <__multiply+0x140>) 801191a: f44f 71b1 mov.w r1, #354 @ 0x162 801191e: f7fe ff13 bl 8010748 <__assert_func> 8011922: f100 0414 add.w r4, r0, #20 8011926: eb04 0e86 add.w lr, r4, r6, lsl #2 801192a: 4623 mov r3, r4 801192c: 2200 movs r2, #0 801192e: 4573 cmp r3, lr 8011930: d320 bcc.n 8011974 <__multiply+0x94> 8011932: f107 0814 add.w r8, r7, #20 8011936: f109 0114 add.w r1, r9, #20 801193a: eb08 0585 add.w r5, r8, r5, lsl #2 801193e: eb01 038a add.w r3, r1, sl, lsl #2 8011942: 9302 str r3, [sp, #8] 8011944: 1beb subs r3, r5, r7 8011946: 3b15 subs r3, #21 8011948: f023 0303 bic.w r3, r3, #3 801194c: 3304 adds r3, #4 801194e: 3715 adds r7, #21 8011950: 42bd cmp r5, r7 8011952: bf38 it cc 8011954: 2304 movcc r3, #4 8011956: 9301 str r3, [sp, #4] 8011958: 9b02 ldr r3, [sp, #8] 801195a: 9103 str r1, [sp, #12] 801195c: 428b cmp r3, r1 801195e: d80c bhi.n 801197a <__multiply+0x9a> 8011960: 2e00 cmp r6, #0 8011962: dd03 ble.n 801196c <__multiply+0x8c> 8011964: f85e 3d04 ldr.w r3, [lr, #-4]! 8011968: 2b00 cmp r3, #0 801196a: d055 beq.n 8011a18 <__multiply+0x138> 801196c: 6106 str r6, [r0, #16] 801196e: b005 add sp, #20 8011970: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} 8011974: f843 2b04 str.w r2, [r3], #4 8011978: e7d9 b.n 801192e <__multiply+0x4e> 801197a: f8b1 a000 ldrh.w sl, [r1] 801197e: f1ba 0f00 cmp.w sl, #0 8011982: d01f beq.n 80119c4 <__multiply+0xe4> 8011984: 46c4 mov ip, r8 8011986: 46a1 mov r9, r4 8011988: 2700 movs r7, #0 801198a: f85c 2b04 ldr.w r2, [ip], #4 801198e: f8d9 3000 ldr.w r3, [r9] 8011992: fa1f fb82 uxth.w fp, r2 8011996: b29b uxth r3, r3 8011998: fb0a 330b mla r3, sl, fp, r3 801199c: 443b add r3, r7 801199e: f8d9 7000 ldr.w r7, [r9] 80119a2: 0c12 lsrs r2, r2, #16 80119a4: 0c3f lsrs r7, r7, #16 80119a6: fb0a 7202 mla r2, sl, r2, r7 80119aa: eb02 4213 add.w r2, r2, r3, lsr #16 80119ae: b29b uxth r3, r3 80119b0: ea43 4302 orr.w r3, r3, r2, lsl #16 80119b4: 4565 cmp r5, ip 80119b6: f849 3b04 str.w r3, [r9], #4 80119ba: ea4f 4712 mov.w r7, r2, lsr #16 80119be: d8e4 bhi.n 801198a <__multiply+0xaa> 80119c0: 9b01 ldr r3, [sp, #4] 80119c2: 50e7 str r7, [r4, r3] 80119c4: 9b03 ldr r3, [sp, #12] 80119c6: f8b3 9002 ldrh.w r9, [r3, #2] 80119ca: 3104 adds r1, #4 80119cc: f1b9 0f00 cmp.w r9, #0 80119d0: d020 beq.n 8011a14 <__multiply+0x134> 80119d2: 6823 ldr r3, [r4, #0] 80119d4: 4647 mov r7, r8 80119d6: 46a4 mov ip, r4 80119d8: f04f 0a00 mov.w sl, #0 80119dc: f8b7 b000 ldrh.w fp, [r7] 80119e0: f8bc 2002 ldrh.w r2, [ip, #2] 80119e4: fb09 220b mla r2, r9, fp, r2 80119e8: 4452 add r2, sl 80119ea: b29b uxth r3, r3 80119ec: ea43 4302 orr.w r3, r3, r2, lsl #16 80119f0: f84c 3b04 str.w r3, [ip], #4 80119f4: f857 3b04 ldr.w r3, [r7], #4 80119f8: ea4f 4a13 mov.w sl, r3, lsr #16 80119fc: f8bc 3000 ldrh.w r3, [ip] 8011a00: fb09 330a mla r3, r9, sl, r3 8011a04: eb03 4312 add.w r3, r3, r2, lsr #16 8011a08: 42bd cmp r5, r7 8011a0a: ea4f 4a13 mov.w sl, r3, lsr #16 8011a0e: d8e5 bhi.n 80119dc <__multiply+0xfc> 8011a10: 9a01 ldr r2, [sp, #4] 8011a12: 50a3 str r3, [r4, r2] 8011a14: 3404 adds r4, #4 8011a16: e79f b.n 8011958 <__multiply+0x78> 8011a18: 3e01 subs r6, #1 8011a1a: e7a1 b.n 8011960 <__multiply+0x80> 8011a1c: 0801504d .word 0x0801504d 8011a20: 0801505e .word 0x0801505e 08011a24 <__pow5mult>: 8011a24: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr} 8011a28: 4615 mov r5, r2 8011a2a: f012 0203 ands.w r2, r2, #3 8011a2e: 4607 mov r7, r0 8011a30: 460e mov r6, r1 8011a32: d007 beq.n 8011a44 <__pow5mult+0x20> 8011a34: 4c25 ldr r4, [pc, #148] @ (8011acc <__pow5mult+0xa8>) 8011a36: 3a01 subs r2, #1 8011a38: 2300 movs r3, #0 8011a3a: f854 2022 ldr.w r2, [r4, r2, lsl #2] 8011a3e: f7ff fe5d bl 80116fc <__multadd> 8011a42: 4606 mov r6, r0 8011a44: 10ad asrs r5, r5, #2 8011a46: d03d beq.n 8011ac4 <__pow5mult+0xa0> 8011a48: 69fc ldr r4, [r7, #28] 8011a4a: b97c cbnz r4, 8011a6c <__pow5mult+0x48> 8011a4c: 2010 movs r0, #16 8011a4e: f7ff fd3d bl 80114cc 8011a52: 4602 mov r2, r0 8011a54: 61f8 str r0, [r7, #28] 8011a56: b928 cbnz r0, 8011a64 <__pow5mult+0x40> 8011a58: 4b1d ldr r3, [pc, #116] @ (8011ad0 <__pow5mult+0xac>) 8011a5a: 481e ldr r0, [pc, #120] @ (8011ad4 <__pow5mult+0xb0>) 8011a5c: f240 11b3 movw r1, #435 @ 0x1b3 8011a60: f7fe fe72 bl 8010748 <__assert_func> 8011a64: e9c0 4401 strd r4, r4, [r0, #4] 8011a68: 6004 str r4, [r0, #0] 8011a6a: 60c4 str r4, [r0, #12] 8011a6c: f8d7 801c ldr.w r8, [r7, #28] 8011a70: f8d8 4008 ldr.w r4, [r8, #8] 8011a74: b94c cbnz r4, 8011a8a <__pow5mult+0x66> 8011a76: f240 2171 movw r1, #625 @ 0x271 8011a7a: 4638 mov r0, r7 8011a7c: f7ff ff1a bl 80118b4 <__i2b> 8011a80: 2300 movs r3, #0 8011a82: f8c8 0008 str.w r0, [r8, #8] 8011a86: 4604 mov r4, r0 8011a88: 6003 str r3, [r0, #0] 8011a8a: f04f 0900 mov.w r9, #0 8011a8e: 07eb lsls r3, r5, #31 8011a90: d50a bpl.n 8011aa8 <__pow5mult+0x84> 8011a92: 4631 mov r1, r6 8011a94: 4622 mov r2, r4 8011a96: 4638 mov r0, r7 8011a98: f7ff ff22 bl 80118e0 <__multiply> 8011a9c: 4631 mov r1, r6 8011a9e: 4680 mov r8, r0 8011aa0: 4638 mov r0, r7 8011aa2: f7ff fe09 bl 80116b8 <_Bfree> 8011aa6: 4646 mov r6, r8 8011aa8: 106d asrs r5, r5, #1 8011aaa: d00b beq.n 8011ac4 <__pow5mult+0xa0> 8011aac: 6820 ldr r0, [r4, #0] 8011aae: b938 cbnz r0, 8011ac0 <__pow5mult+0x9c> 8011ab0: 4622 mov r2, r4 8011ab2: 4621 mov r1, r4 8011ab4: 4638 mov r0, r7 8011ab6: f7ff ff13 bl 80118e0 <__multiply> 8011aba: 6020 str r0, [r4, #0] 8011abc: f8c0 9000 str.w r9, [r0] 8011ac0: 4604 mov r4, r0 8011ac2: e7e4 b.n 8011a8e <__pow5mult+0x6a> 8011ac4: 4630 mov r0, r6 8011ac6: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc} 8011aca: bf00 nop 8011acc: 08015150 .word 0x08015150 8011ad0: 08014f3b .word 0x08014f3b 8011ad4: 0801505e .word 0x0801505e 08011ad8 <__lshift>: 8011ad8: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} 8011adc: 460c mov r4, r1 8011ade: 6849 ldr r1, [r1, #4] 8011ae0: 6923 ldr r3, [r4, #16] 8011ae2: eb03 1862 add.w r8, r3, r2, asr #5 8011ae6: 68a3 ldr r3, [r4, #8] 8011ae8: 4607 mov r7, r0 8011aea: 4691 mov r9, r2 8011aec: ea4f 1a62 mov.w sl, r2, asr #5 8011af0: f108 0601 add.w r6, r8, #1 8011af4: 42b3 cmp r3, r6 8011af6: db0b blt.n 8011b10 <__lshift+0x38> 8011af8: 4638 mov r0, r7 8011afa: f7ff fd9d bl 8011638 <_Balloc> 8011afe: 4605 mov r5, r0 8011b00: b948 cbnz r0, 8011b16 <__lshift+0x3e> 8011b02: 4602 mov r2, r0 8011b04: 4b28 ldr r3, [pc, #160] @ (8011ba8 <__lshift+0xd0>) 8011b06: 4829 ldr r0, [pc, #164] @ (8011bac <__lshift+0xd4>) 8011b08: f44f 71ef mov.w r1, #478 @ 0x1de 8011b0c: f7fe fe1c bl 8010748 <__assert_func> 8011b10: 3101 adds r1, #1 8011b12: 005b lsls r3, r3, #1 8011b14: e7ee b.n 8011af4 <__lshift+0x1c> 8011b16: 2300 movs r3, #0 8011b18: f100 0114 add.w r1, r0, #20 8011b1c: f100 0210 add.w r2, r0, #16 8011b20: 4618 mov r0, r3 8011b22: 4553 cmp r3, sl 8011b24: db33 blt.n 8011b8e <__lshift+0xb6> 8011b26: 6920 ldr r0, [r4, #16] 8011b28: ea2a 7aea bic.w sl, sl, sl, asr #31 8011b2c: f104 0314 add.w r3, r4, #20 8011b30: f019 091f ands.w r9, r9, #31 8011b34: eb01 018a add.w r1, r1, sl, lsl #2 8011b38: eb03 0c80 add.w ip, r3, r0, lsl #2 8011b3c: d02b beq.n 8011b96 <__lshift+0xbe> 8011b3e: f1c9 0e20 rsb lr, r9, #32 8011b42: 468a mov sl, r1 8011b44: 2200 movs r2, #0 8011b46: 6818 ldr r0, [r3, #0] 8011b48: fa00 f009 lsl.w r0, r0, r9 8011b4c: 4310 orrs r0, r2 8011b4e: f84a 0b04 str.w r0, [sl], #4 8011b52: f853 2b04 ldr.w r2, [r3], #4 8011b56: 459c cmp ip, r3 8011b58: fa22 f20e lsr.w r2, r2, lr 8011b5c: d8f3 bhi.n 8011b46 <__lshift+0x6e> 8011b5e: ebac 0304 sub.w r3, ip, r4 8011b62: 3b15 subs r3, #21 8011b64: f023 0303 bic.w r3, r3, #3 8011b68: 3304 adds r3, #4 8011b6a: f104 0015 add.w r0, r4, #21 8011b6e: 4560 cmp r0, ip 8011b70: bf88 it hi 8011b72: 2304 movhi r3, #4 8011b74: 50ca str r2, [r1, r3] 8011b76: b10a cbz r2, 8011b7c <__lshift+0xa4> 8011b78: f108 0602 add.w r6, r8, #2 8011b7c: 3e01 subs r6, #1 8011b7e: 4638 mov r0, r7 8011b80: 612e str r6, [r5, #16] 8011b82: 4621 mov r1, r4 8011b84: f7ff fd98 bl 80116b8 <_Bfree> 8011b88: 4628 mov r0, r5 8011b8a: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 8011b8e: f842 0f04 str.w r0, [r2, #4]! 8011b92: 3301 adds r3, #1 8011b94: e7c5 b.n 8011b22 <__lshift+0x4a> 8011b96: 3904 subs r1, #4 8011b98: f853 2b04 ldr.w r2, [r3], #4 8011b9c: f841 2f04 str.w r2, [r1, #4]! 8011ba0: 459c cmp ip, r3 8011ba2: d8f9 bhi.n 8011b98 <__lshift+0xc0> 8011ba4: e7ea b.n 8011b7c <__lshift+0xa4> 8011ba6: bf00 nop 8011ba8: 0801504d .word 0x0801504d 8011bac: 0801505e .word 0x0801505e 08011bb0 <__mcmp>: 8011bb0: 690a ldr r2, [r1, #16] 8011bb2: 4603 mov r3, r0 8011bb4: 6900 ldr r0, [r0, #16] 8011bb6: 1a80 subs r0, r0, r2 8011bb8: b530 push {r4, r5, lr} 8011bba: d10e bne.n 8011bda <__mcmp+0x2a> 8011bbc: 3314 adds r3, #20 8011bbe: 3114 adds r1, #20 8011bc0: eb03 0482 add.w r4, r3, r2, lsl #2 8011bc4: eb01 0182 add.w r1, r1, r2, lsl #2 8011bc8: f854 5d04 ldr.w r5, [r4, #-4]! 8011bcc: f851 2d04 ldr.w r2, [r1, #-4]! 8011bd0: 4295 cmp r5, r2 8011bd2: d003 beq.n 8011bdc <__mcmp+0x2c> 8011bd4: d205 bcs.n 8011be2 <__mcmp+0x32> 8011bd6: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff 8011bda: bd30 pop {r4, r5, pc} 8011bdc: 42a3 cmp r3, r4 8011bde: d3f3 bcc.n 8011bc8 <__mcmp+0x18> 8011be0: e7fb b.n 8011bda <__mcmp+0x2a> 8011be2: 2001 movs r0, #1 8011be4: e7f9 b.n 8011bda <__mcmp+0x2a> ... 08011be8 <__mdiff>: 8011be8: e92d 4ff7 stmdb sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr} 8011bec: 4689 mov r9, r1 8011bee: 4606 mov r6, r0 8011bf0: 4611 mov r1, r2 8011bf2: 4648 mov r0, r9 8011bf4: 4614 mov r4, r2 8011bf6: f7ff ffdb bl 8011bb0 <__mcmp> 8011bfa: 1e05 subs r5, r0, #0 8011bfc: d112 bne.n 8011c24 <__mdiff+0x3c> 8011bfe: 4629 mov r1, r5 8011c00: 4630 mov r0, r6 8011c02: f7ff fd19 bl 8011638 <_Balloc> 8011c06: 4602 mov r2, r0 8011c08: b928 cbnz r0, 8011c16 <__mdiff+0x2e> 8011c0a: 4b3f ldr r3, [pc, #252] @ (8011d08 <__mdiff+0x120>) 8011c0c: f240 2137 movw r1, #567 @ 0x237 8011c10: 483e ldr r0, [pc, #248] @ (8011d0c <__mdiff+0x124>) 8011c12: f7fe fd99 bl 8010748 <__assert_func> 8011c16: 2301 movs r3, #1 8011c18: e9c0 3504 strd r3, r5, [r0, #16] 8011c1c: 4610 mov r0, r2 8011c1e: b003 add sp, #12 8011c20: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} 8011c24: bfbc itt lt 8011c26: 464b movlt r3, r9 8011c28: 46a1 movlt r9, r4 8011c2a: 4630 mov r0, r6 8011c2c: f8d9 1004 ldr.w r1, [r9, #4] 8011c30: bfba itte lt 8011c32: 461c movlt r4, r3 8011c34: 2501 movlt r5, #1 8011c36: 2500 movge r5, #0 8011c38: f7ff fcfe bl 8011638 <_Balloc> 8011c3c: 4602 mov r2, r0 8011c3e: b918 cbnz r0, 8011c48 <__mdiff+0x60> 8011c40: 4b31 ldr r3, [pc, #196] @ (8011d08 <__mdiff+0x120>) 8011c42: f240 2145 movw r1, #581 @ 0x245 8011c46: e7e3 b.n 8011c10 <__mdiff+0x28> 8011c48: f8d9 7010 ldr.w r7, [r9, #16] 8011c4c: 6926 ldr r6, [r4, #16] 8011c4e: 60c5 str r5, [r0, #12] 8011c50: f109 0310 add.w r3, r9, #16 8011c54: f109 0514 add.w r5, r9, #20 8011c58: f104 0e14 add.w lr, r4, #20 8011c5c: f100 0b14 add.w fp, r0, #20 8011c60: eb05 0887 add.w r8, r5, r7, lsl #2 8011c64: eb0e 0686 add.w r6, lr, r6, lsl #2 8011c68: 9301 str r3, [sp, #4] 8011c6a: 46d9 mov r9, fp 8011c6c: f04f 0c00 mov.w ip, #0 8011c70: 9b01 ldr r3, [sp, #4] 8011c72: f85e 0b04 ldr.w r0, [lr], #4 8011c76: f853 af04 ldr.w sl, [r3, #4]! 8011c7a: 9301 str r3, [sp, #4] 8011c7c: fa1f f38a uxth.w r3, sl 8011c80: 4619 mov r1, r3 8011c82: b283 uxth r3, r0 8011c84: 1acb subs r3, r1, r3 8011c86: 0c00 lsrs r0, r0, #16 8011c88: 4463 add r3, ip 8011c8a: ebc0 401a rsb r0, r0, sl, lsr #16 8011c8e: eb00 4023 add.w r0, r0, r3, asr #16 8011c92: b29b uxth r3, r3 8011c94: ea43 4300 orr.w r3, r3, r0, lsl #16 8011c98: 4576 cmp r6, lr 8011c9a: f849 3b04 str.w r3, [r9], #4 8011c9e: ea4f 4c20 mov.w ip, r0, asr #16 8011ca2: d8e5 bhi.n 8011c70 <__mdiff+0x88> 8011ca4: 1b33 subs r3, r6, r4 8011ca6: 3b15 subs r3, #21 8011ca8: f023 0303 bic.w r3, r3, #3 8011cac: 3415 adds r4, #21 8011cae: 3304 adds r3, #4 8011cb0: 42a6 cmp r6, r4 8011cb2: bf38 it cc 8011cb4: 2304 movcc r3, #4 8011cb6: 441d add r5, r3 8011cb8: 445b add r3, fp 8011cba: 461e mov r6, r3 8011cbc: 462c mov r4, r5 8011cbe: 4544 cmp r4, r8 8011cc0: d30e bcc.n 8011ce0 <__mdiff+0xf8> 8011cc2: f108 0103 add.w r1, r8, #3 8011cc6: 1b49 subs r1, r1, r5 8011cc8: f021 0103 bic.w r1, r1, #3 8011ccc: 3d03 subs r5, #3 8011cce: 45a8 cmp r8, r5 8011cd0: bf38 it cc 8011cd2: 2100 movcc r1, #0 8011cd4: 440b add r3, r1 8011cd6: f853 1d04 ldr.w r1, [r3, #-4]! 8011cda: b191 cbz r1, 8011d02 <__mdiff+0x11a> 8011cdc: 6117 str r7, [r2, #16] 8011cde: e79d b.n 8011c1c <__mdiff+0x34> 8011ce0: f854 1b04 ldr.w r1, [r4], #4 8011ce4: 46e6 mov lr, ip 8011ce6: 0c08 lsrs r0, r1, #16 8011ce8: fa1c fc81 uxtah ip, ip, r1 8011cec: 4471 add r1, lr 8011cee: eb00 402c add.w r0, r0, ip, asr #16 8011cf2: b289 uxth r1, r1 8011cf4: ea41 4100 orr.w r1, r1, r0, lsl #16 8011cf8: f846 1b04 str.w r1, [r6], #4 8011cfc: ea4f 4c20 mov.w ip, r0, asr #16 8011d00: e7dd b.n 8011cbe <__mdiff+0xd6> 8011d02: 3f01 subs r7, #1 8011d04: e7e7 b.n 8011cd6 <__mdiff+0xee> 8011d06: bf00 nop 8011d08: 0801504d .word 0x0801504d 8011d0c: 0801505e .word 0x0801505e 08011d10 <__ulp>: 8011d10: b082 sub sp, #8 8011d12: ed8d 0b00 vstr d0, [sp] 8011d16: 9a01 ldr r2, [sp, #4] 8011d18: 4b0f ldr r3, [pc, #60] @ (8011d58 <__ulp+0x48>) 8011d1a: 4013 ands r3, r2 8011d1c: f1a3 7350 sub.w r3, r3, #54525952 @ 0x3400000 8011d20: 2b00 cmp r3, #0 8011d22: dc08 bgt.n 8011d36 <__ulp+0x26> 8011d24: 425b negs r3, r3 8011d26: f1b3 7fa0 cmp.w r3, #20971520 @ 0x1400000 8011d2a: ea4f 5223 mov.w r2, r3, asr #20 8011d2e: da04 bge.n 8011d3a <__ulp+0x2a> 8011d30: f44f 2300 mov.w r3, #524288 @ 0x80000 8011d34: 4113 asrs r3, r2 8011d36: 2200 movs r2, #0 8011d38: e008 b.n 8011d4c <__ulp+0x3c> 8011d3a: f1a2 0314 sub.w r3, r2, #20 8011d3e: 2b1e cmp r3, #30 8011d40: bfda itte le 8011d42: f04f 4200 movle.w r2, #2147483648 @ 0x80000000 8011d46: 40da lsrle r2, r3 8011d48: 2201 movgt r2, #1 8011d4a: 2300 movs r3, #0 8011d4c: 4619 mov r1, r3 8011d4e: 4610 mov r0, r2 8011d50: ec41 0b10 vmov d0, r0, r1 8011d54: b002 add sp, #8 8011d56: 4770 bx lr 8011d58: 7ff00000 .word 0x7ff00000 08011d5c <__b2d>: 8011d5c: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} 8011d60: 6906 ldr r6, [r0, #16] 8011d62: f100 0814 add.w r8, r0, #20 8011d66: eb08 0686 add.w r6, r8, r6, lsl #2 8011d6a: 1f37 subs r7, r6, #4 8011d6c: f856 2c04 ldr.w r2, [r6, #-4] 8011d70: 4610 mov r0, r2 8011d72: f7ff fd53 bl 801181c <__hi0bits> 8011d76: f1c0 0320 rsb r3, r0, #32 8011d7a: 280a cmp r0, #10 8011d7c: 600b str r3, [r1, #0] 8011d7e: 491b ldr r1, [pc, #108] @ (8011dec <__b2d+0x90>) 8011d80: dc15 bgt.n 8011dae <__b2d+0x52> 8011d82: f1c0 0c0b rsb ip, r0, #11 8011d86: fa22 f30c lsr.w r3, r2, ip 8011d8a: 45b8 cmp r8, r7 8011d8c: ea43 0501 orr.w r5, r3, r1 8011d90: bf34 ite cc 8011d92: f856 3c08 ldrcc.w r3, [r6, #-8] 8011d96: 2300 movcs r3, #0 8011d98: 3015 adds r0, #21 8011d9a: fa02 f000 lsl.w r0, r2, r0 8011d9e: fa23 f30c lsr.w r3, r3, ip 8011da2: 4303 orrs r3, r0 8011da4: 461c mov r4, r3 8011da6: ec45 4b10 vmov d0, r4, r5 8011daa: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 8011dae: 45b8 cmp r8, r7 8011db0: bf3a itte cc 8011db2: f856 3c08 ldrcc.w r3, [r6, #-8] 8011db6: f1a6 0708 subcc.w r7, r6, #8 8011dba: 2300 movcs r3, #0 8011dbc: 380b subs r0, #11 8011dbe: d012 beq.n 8011de6 <__b2d+0x8a> 8011dc0: f1c0 0120 rsb r1, r0, #32 8011dc4: fa23 f401 lsr.w r4, r3, r1 8011dc8: 4082 lsls r2, r0 8011dca: 4322 orrs r2, r4 8011dcc: 4547 cmp r7, r8 8011dce: f042 557f orr.w r5, r2, #1069547520 @ 0x3fc00000 8011dd2: bf8c ite hi 8011dd4: f857 2c04 ldrhi.w r2, [r7, #-4] 8011dd8: 2200 movls r2, #0 8011dda: 4083 lsls r3, r0 8011ddc: 40ca lsrs r2, r1 8011dde: f445 1540 orr.w r5, r5, #3145728 @ 0x300000 8011de2: 4313 orrs r3, r2 8011de4: e7de b.n 8011da4 <__b2d+0x48> 8011de6: ea42 0501 orr.w r5, r2, r1 8011dea: e7db b.n 8011da4 <__b2d+0x48> 8011dec: 3ff00000 .word 0x3ff00000 08011df0 <__d2b>: 8011df0: e92d 43f7 stmdb sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, lr} 8011df4: 460f mov r7, r1 8011df6: 2101 movs r1, #1 8011df8: ec59 8b10 vmov r8, r9, d0 8011dfc: 4616 mov r6, r2 8011dfe: f7ff fc1b bl 8011638 <_Balloc> 8011e02: 4604 mov r4, r0 8011e04: b930 cbnz r0, 8011e14 <__d2b+0x24> 8011e06: 4602 mov r2, r0 8011e08: 4b23 ldr r3, [pc, #140] @ (8011e98 <__d2b+0xa8>) 8011e0a: 4824 ldr r0, [pc, #144] @ (8011e9c <__d2b+0xac>) 8011e0c: f240 310f movw r1, #783 @ 0x30f 8011e10: f7fe fc9a bl 8010748 <__assert_func> 8011e14: f3c9 550a ubfx r5, r9, #20, #11 8011e18: f3c9 0313 ubfx r3, r9, #0, #20 8011e1c: b10d cbz r5, 8011e22 <__d2b+0x32> 8011e1e: f443 1380 orr.w r3, r3, #1048576 @ 0x100000 8011e22: 9301 str r3, [sp, #4] 8011e24: f1b8 0300 subs.w r3, r8, #0 8011e28: d023 beq.n 8011e72 <__d2b+0x82> 8011e2a: 4668 mov r0, sp 8011e2c: 9300 str r3, [sp, #0] 8011e2e: f7ff fd14 bl 801185a <__lo0bits> 8011e32: e9dd 1200 ldrd r1, r2, [sp] 8011e36: b1d0 cbz r0, 8011e6e <__d2b+0x7e> 8011e38: f1c0 0320 rsb r3, r0, #32 8011e3c: fa02 f303 lsl.w r3, r2, r3 8011e40: 430b orrs r3, r1 8011e42: 40c2 lsrs r2, r0 8011e44: 6163 str r3, [r4, #20] 8011e46: 9201 str r2, [sp, #4] 8011e48: 9b01 ldr r3, [sp, #4] 8011e4a: 61a3 str r3, [r4, #24] 8011e4c: 2b00 cmp r3, #0 8011e4e: bf0c ite eq 8011e50: 2201 moveq r2, #1 8011e52: 2202 movne r2, #2 8011e54: 6122 str r2, [r4, #16] 8011e56: b1a5 cbz r5, 8011e82 <__d2b+0x92> 8011e58: f2a5 4533 subw r5, r5, #1075 @ 0x433 8011e5c: 4405 add r5, r0 8011e5e: 603d str r5, [r7, #0] 8011e60: f1c0 0035 rsb r0, r0, #53 @ 0x35 8011e64: 6030 str r0, [r6, #0] 8011e66: 4620 mov r0, r4 8011e68: b003 add sp, #12 8011e6a: e8bd 83f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc} 8011e6e: 6161 str r1, [r4, #20] 8011e70: e7ea b.n 8011e48 <__d2b+0x58> 8011e72: a801 add r0, sp, #4 8011e74: f7ff fcf1 bl 801185a <__lo0bits> 8011e78: 9b01 ldr r3, [sp, #4] 8011e7a: 6163 str r3, [r4, #20] 8011e7c: 3020 adds r0, #32 8011e7e: 2201 movs r2, #1 8011e80: e7e8 b.n 8011e54 <__d2b+0x64> 8011e82: eb04 0382 add.w r3, r4, r2, lsl #2 8011e86: f2a0 4032 subw r0, r0, #1074 @ 0x432 8011e8a: 6038 str r0, [r7, #0] 8011e8c: 6918 ldr r0, [r3, #16] 8011e8e: f7ff fcc5 bl 801181c <__hi0bits> 8011e92: ebc0 1042 rsb r0, r0, r2, lsl #5 8011e96: e7e5 b.n 8011e64 <__d2b+0x74> 8011e98: 0801504d .word 0x0801504d 8011e9c: 0801505e .word 0x0801505e 08011ea0 <__ratio>: 8011ea0: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 8011ea4: b085 sub sp, #20 8011ea6: e9cd 1000 strd r1, r0, [sp] 8011eaa: a902 add r1, sp, #8 8011eac: f7ff ff56 bl 8011d5c <__b2d> 8011eb0: 9800 ldr r0, [sp, #0] 8011eb2: a903 add r1, sp, #12 8011eb4: ec55 4b10 vmov r4, r5, d0 8011eb8: f7ff ff50 bl 8011d5c <__b2d> 8011ebc: 9b01 ldr r3, [sp, #4] 8011ebe: 6919 ldr r1, [r3, #16] 8011ec0: 9b00 ldr r3, [sp, #0] 8011ec2: 691b ldr r3, [r3, #16] 8011ec4: 1ac9 subs r1, r1, r3 8011ec6: e9dd 3202 ldrd r3, r2, [sp, #8] 8011eca: 1a9b subs r3, r3, r2 8011ecc: ec5b ab10 vmov sl, fp, d0 8011ed0: eb03 1341 add.w r3, r3, r1, lsl #5 8011ed4: 2b00 cmp r3, #0 8011ed6: bfce itee gt 8011ed8: 462a movgt r2, r5 8011eda: ebc3 3303 rsble r3, r3, r3, lsl #12 8011ede: 465a movle r2, fp 8011ee0: 462f mov r7, r5 8011ee2: 46d9 mov r9, fp 8011ee4: bfcc ite gt 8011ee6: eb02 5703 addgt.w r7, r2, r3, lsl #20 8011eea: eb02 5903 addle.w r9, r2, r3, lsl #20 8011eee: 464b mov r3, r9 8011ef0: 4652 mov r2, sl 8011ef2: 4620 mov r0, r4 8011ef4: 4639 mov r1, r7 8011ef6: f7ee fcb9 bl 800086c <__aeabi_ddiv> 8011efa: ec41 0b10 vmov d0, r0, r1 8011efe: b005 add sp, #20 8011f00: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} 08011f04 <__copybits>: 8011f04: 3901 subs r1, #1 8011f06: b570 push {r4, r5, r6, lr} 8011f08: 1149 asrs r1, r1, #5 8011f0a: 6914 ldr r4, [r2, #16] 8011f0c: 3101 adds r1, #1 8011f0e: f102 0314 add.w r3, r2, #20 8011f12: eb00 0181 add.w r1, r0, r1, lsl #2 8011f16: eb03 0484 add.w r4, r3, r4, lsl #2 8011f1a: 1f05 subs r5, r0, #4 8011f1c: 42a3 cmp r3, r4 8011f1e: d30c bcc.n 8011f3a <__copybits+0x36> 8011f20: 1aa3 subs r3, r4, r2 8011f22: 3b11 subs r3, #17 8011f24: f023 0303 bic.w r3, r3, #3 8011f28: 3211 adds r2, #17 8011f2a: 42a2 cmp r2, r4 8011f2c: bf88 it hi 8011f2e: 2300 movhi r3, #0 8011f30: 4418 add r0, r3 8011f32: 2300 movs r3, #0 8011f34: 4288 cmp r0, r1 8011f36: d305 bcc.n 8011f44 <__copybits+0x40> 8011f38: bd70 pop {r4, r5, r6, pc} 8011f3a: f853 6b04 ldr.w r6, [r3], #4 8011f3e: f845 6f04 str.w r6, [r5, #4]! 8011f42: e7eb b.n 8011f1c <__copybits+0x18> 8011f44: f840 3b04 str.w r3, [r0], #4 8011f48: e7f4 b.n 8011f34 <__copybits+0x30> 08011f4a <__any_on>: 8011f4a: f100 0214 add.w r2, r0, #20 8011f4e: 6900 ldr r0, [r0, #16] 8011f50: 114b asrs r3, r1, #5 8011f52: 4298 cmp r0, r3 8011f54: b510 push {r4, lr} 8011f56: db11 blt.n 8011f7c <__any_on+0x32> 8011f58: dd0a ble.n 8011f70 <__any_on+0x26> 8011f5a: f011 011f ands.w r1, r1, #31 8011f5e: d007 beq.n 8011f70 <__any_on+0x26> 8011f60: f852 4023 ldr.w r4, [r2, r3, lsl #2] 8011f64: fa24 f001 lsr.w r0, r4, r1 8011f68: fa00 f101 lsl.w r1, r0, r1 8011f6c: 428c cmp r4, r1 8011f6e: d10b bne.n 8011f88 <__any_on+0x3e> 8011f70: eb02 0383 add.w r3, r2, r3, lsl #2 8011f74: 4293 cmp r3, r2 8011f76: d803 bhi.n 8011f80 <__any_on+0x36> 8011f78: 2000 movs r0, #0 8011f7a: bd10 pop {r4, pc} 8011f7c: 4603 mov r3, r0 8011f7e: e7f7 b.n 8011f70 <__any_on+0x26> 8011f80: f853 1d04 ldr.w r1, [r3, #-4]! 8011f84: 2900 cmp r1, #0 8011f86: d0f5 beq.n 8011f74 <__any_on+0x2a> 8011f88: 2001 movs r0, #1 8011f8a: e7f6 b.n 8011f7a <__any_on+0x30> 08011f8c : 8011f8c: b570 push {r4, r5, r6, lr} 8011f8e: 4604 mov r4, r0 8011f90: 460d mov r5, r1 8011f92: ec45 4b10 vmov d0, r4, r5 8011f96: 4616 mov r6, r2 8011f98: f7ff feba bl 8011d10 <__ulp> 8011f9c: ec51 0b10 vmov r0, r1, d0 8011fa0: b17e cbz r6, 8011fc2 8011fa2: f3c5 530a ubfx r3, r5, #20, #11 8011fa6: f1c3 036b rsb r3, r3, #107 @ 0x6b 8011faa: 2b00 cmp r3, #0 8011fac: dd09 ble.n 8011fc2 8011fae: 051b lsls r3, r3, #20 8011fb0: f103 557f add.w r5, r3, #1069547520 @ 0x3fc00000 8011fb4: 2400 movs r4, #0 8011fb6: f505 1540 add.w r5, r5, #3145728 @ 0x300000 8011fba: 4622 mov r2, r4 8011fbc: 462b mov r3, r5 8011fbe: f7ee fb2b bl 8000618 <__aeabi_dmul> 8011fc2: ec41 0b10 vmov d0, r0, r1 8011fc6: bd70 pop {r4, r5, r6, pc} 08011fc8 <_strtod_l>: 8011fc8: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 8011fcc: b09f sub sp, #124 @ 0x7c 8011fce: 460c mov r4, r1 8011fd0: 9217 str r2, [sp, #92] @ 0x5c 8011fd2: 2200 movs r2, #0 8011fd4: 921a str r2, [sp, #104] @ 0x68 8011fd6: 9005 str r0, [sp, #20] 8011fd8: f04f 0a00 mov.w sl, #0 8011fdc: f04f 0b00 mov.w fp, #0 8011fe0: 460a mov r2, r1 8011fe2: 9219 str r2, [sp, #100] @ 0x64 8011fe4: 7811 ldrb r1, [r2, #0] 8011fe6: 292b cmp r1, #43 @ 0x2b 8011fe8: d04a beq.n 8012080 <_strtod_l+0xb8> 8011fea: d838 bhi.n 801205e <_strtod_l+0x96> 8011fec: 290d cmp r1, #13 8011fee: d832 bhi.n 8012056 <_strtod_l+0x8e> 8011ff0: 2908 cmp r1, #8 8011ff2: d832 bhi.n 801205a <_strtod_l+0x92> 8011ff4: 2900 cmp r1, #0 8011ff6: d03b beq.n 8012070 <_strtod_l+0xa8> 8011ff8: 2200 movs r2, #0 8011ffa: 920e str r2, [sp, #56] @ 0x38 8011ffc: 9d19 ldr r5, [sp, #100] @ 0x64 8011ffe: 782a ldrb r2, [r5, #0] 8012000: 2a30 cmp r2, #48 @ 0x30 8012002: f040 80b2 bne.w 801216a <_strtod_l+0x1a2> 8012006: 786a ldrb r2, [r5, #1] 8012008: f002 02df and.w r2, r2, #223 @ 0xdf 801200c: 2a58 cmp r2, #88 @ 0x58 801200e: d16e bne.n 80120ee <_strtod_l+0x126> 8012010: 9302 str r3, [sp, #8] 8012012: 9b0e ldr r3, [sp, #56] @ 0x38 8012014: 9301 str r3, [sp, #4] 8012016: ab1a add r3, sp, #104 @ 0x68 8012018: 9300 str r3, [sp, #0] 801201a: 4a8f ldr r2, [pc, #572] @ (8012258 <_strtod_l+0x290>) 801201c: 9805 ldr r0, [sp, #20] 801201e: ab1b add r3, sp, #108 @ 0x6c 8012020: a919 add r1, sp, #100 @ 0x64 8012022: f001 fe5b bl 8013cdc <__gethex> 8012026: f010 060f ands.w r6, r0, #15 801202a: 4604 mov r4, r0 801202c: d005 beq.n 801203a <_strtod_l+0x72> 801202e: 2e06 cmp r6, #6 8012030: d128 bne.n 8012084 <_strtod_l+0xbc> 8012032: 3501 adds r5, #1 8012034: 2300 movs r3, #0 8012036: 9519 str r5, [sp, #100] @ 0x64 8012038: 930e str r3, [sp, #56] @ 0x38 801203a: 9b17 ldr r3, [sp, #92] @ 0x5c 801203c: 2b00 cmp r3, #0 801203e: f040 858e bne.w 8012b5e <_strtod_l+0xb96> 8012042: 9b0e ldr r3, [sp, #56] @ 0x38 8012044: b1cb cbz r3, 801207a <_strtod_l+0xb2> 8012046: 4652 mov r2, sl 8012048: f10b 4300 add.w r3, fp, #2147483648 @ 0x80000000 801204c: ec43 2b10 vmov d0, r2, r3 8012050: b01f add sp, #124 @ 0x7c 8012052: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} 8012056: 2920 cmp r1, #32 8012058: d1ce bne.n 8011ff8 <_strtod_l+0x30> 801205a: 3201 adds r2, #1 801205c: e7c1 b.n 8011fe2 <_strtod_l+0x1a> 801205e: 292d cmp r1, #45 @ 0x2d 8012060: d1ca bne.n 8011ff8 <_strtod_l+0x30> 8012062: 2101 movs r1, #1 8012064: 910e str r1, [sp, #56] @ 0x38 8012066: 1c51 adds r1, r2, #1 8012068: 9119 str r1, [sp, #100] @ 0x64 801206a: 7852 ldrb r2, [r2, #1] 801206c: 2a00 cmp r2, #0 801206e: d1c5 bne.n 8011ffc <_strtod_l+0x34> 8012070: 9b17 ldr r3, [sp, #92] @ 0x5c 8012072: 9419 str r4, [sp, #100] @ 0x64 8012074: 2b00 cmp r3, #0 8012076: f040 8570 bne.w 8012b5a <_strtod_l+0xb92> 801207a: 4652 mov r2, sl 801207c: 465b mov r3, fp 801207e: e7e5 b.n 801204c <_strtod_l+0x84> 8012080: 2100 movs r1, #0 8012082: e7ef b.n 8012064 <_strtod_l+0x9c> 8012084: 9a1a ldr r2, [sp, #104] @ 0x68 8012086: b13a cbz r2, 8012098 <_strtod_l+0xd0> 8012088: 2135 movs r1, #53 @ 0x35 801208a: a81c add r0, sp, #112 @ 0x70 801208c: f7ff ff3a bl 8011f04 <__copybits> 8012090: 991a ldr r1, [sp, #104] @ 0x68 8012092: 9805 ldr r0, [sp, #20] 8012094: f7ff fb10 bl 80116b8 <_Bfree> 8012098: 3e01 subs r6, #1 801209a: 9a1b ldr r2, [sp, #108] @ 0x6c 801209c: 2e04 cmp r6, #4 801209e: d806 bhi.n 80120ae <_strtod_l+0xe6> 80120a0: e8df f006 tbb [pc, r6] 80120a4: 201d0314 .word 0x201d0314 80120a8: 14 .byte 0x14 80120a9: 00 .byte 0x00 80120aa: e9dd ab1c ldrd sl, fp, [sp, #112] @ 0x70 80120ae: 05e1 lsls r1, r4, #23 80120b0: bf48 it mi 80120b2: f04b 4b00 orrmi.w fp, fp, #2147483648 @ 0x80000000 80120b6: f02b 4300 bic.w r3, fp, #2147483648 @ 0x80000000 80120ba: 0d1b lsrs r3, r3, #20 80120bc: 051b lsls r3, r3, #20 80120be: 2b00 cmp r3, #0 80120c0: d1bb bne.n 801203a <_strtod_l+0x72> 80120c2: f7fe faff bl 80106c4 <__errno> 80120c6: 2322 movs r3, #34 @ 0x22 80120c8: 6003 str r3, [r0, #0] 80120ca: e7b6 b.n 801203a <_strtod_l+0x72> 80120cc: e9dd a31c ldrd sl, r3, [sp, #112] @ 0x70 80120d0: f202 4233 addw r2, r2, #1075 @ 0x433 80120d4: f423 1380 bic.w r3, r3, #1048576 @ 0x100000 80120d8: ea43 5b02 orr.w fp, r3, r2, lsl #20 80120dc: e7e7 b.n 80120ae <_strtod_l+0xe6> 80120de: f8df b180 ldr.w fp, [pc, #384] @ 8012260 <_strtod_l+0x298> 80120e2: e7e4 b.n 80120ae <_strtod_l+0xe6> 80120e4: f06f 4b00 mvn.w fp, #2147483648 @ 0x80000000 80120e8: f04f 3aff mov.w sl, #4294967295 @ 0xffffffff 80120ec: e7df b.n 80120ae <_strtod_l+0xe6> 80120ee: 9b19 ldr r3, [sp, #100] @ 0x64 80120f0: 1c5a adds r2, r3, #1 80120f2: 9219 str r2, [sp, #100] @ 0x64 80120f4: 785b ldrb r3, [r3, #1] 80120f6: 2b30 cmp r3, #48 @ 0x30 80120f8: d0f9 beq.n 80120ee <_strtod_l+0x126> 80120fa: 2b00 cmp r3, #0 80120fc: d09d beq.n 801203a <_strtod_l+0x72> 80120fe: 2301 movs r3, #1 8012100: 2700 movs r7, #0 8012102: 9308 str r3, [sp, #32] 8012104: 9b19 ldr r3, [sp, #100] @ 0x64 8012106: 930c str r3, [sp, #48] @ 0x30 8012108: 970b str r7, [sp, #44] @ 0x2c 801210a: 46b9 mov r9, r7 801210c: 220a movs r2, #10 801210e: 9819 ldr r0, [sp, #100] @ 0x64 8012110: 7805 ldrb r5, [r0, #0] 8012112: f1a5 0330 sub.w r3, r5, #48 @ 0x30 8012116: b2d9 uxtb r1, r3 8012118: 2909 cmp r1, #9 801211a: d928 bls.n 801216e <_strtod_l+0x1a6> 801211c: 494f ldr r1, [pc, #316] @ (801225c <_strtod_l+0x294>) 801211e: 2201 movs r2, #1 8012120: f7fe f9ee bl 8010500 8012124: 2800 cmp r0, #0 8012126: d032 beq.n 801218e <_strtod_l+0x1c6> 8012128: 2000 movs r0, #0 801212a: 462a mov r2, r5 801212c: 900a str r0, [sp, #40] @ 0x28 801212e: 464d mov r5, r9 8012130: 4603 mov r3, r0 8012132: 2a65 cmp r2, #101 @ 0x65 8012134: d001 beq.n 801213a <_strtod_l+0x172> 8012136: 2a45 cmp r2, #69 @ 0x45 8012138: d114 bne.n 8012164 <_strtod_l+0x19c> 801213a: b91d cbnz r5, 8012144 <_strtod_l+0x17c> 801213c: 9a08 ldr r2, [sp, #32] 801213e: 4302 orrs r2, r0 8012140: d096 beq.n 8012070 <_strtod_l+0xa8> 8012142: 2500 movs r5, #0 8012144: 9c19 ldr r4, [sp, #100] @ 0x64 8012146: 1c62 adds r2, r4, #1 8012148: 9219 str r2, [sp, #100] @ 0x64 801214a: 7862 ldrb r2, [r4, #1] 801214c: 2a2b cmp r2, #43 @ 0x2b 801214e: d07a beq.n 8012246 <_strtod_l+0x27e> 8012150: 2a2d cmp r2, #45 @ 0x2d 8012152: d07e beq.n 8012252 <_strtod_l+0x28a> 8012154: f04f 0c00 mov.w ip, #0 8012158: f1a2 0130 sub.w r1, r2, #48 @ 0x30 801215c: 2909 cmp r1, #9 801215e: f240 8085 bls.w 801226c <_strtod_l+0x2a4> 8012162: 9419 str r4, [sp, #100] @ 0x64 8012164: f04f 0800 mov.w r8, #0 8012168: e0a5 b.n 80122b6 <_strtod_l+0x2ee> 801216a: 2300 movs r3, #0 801216c: e7c8 b.n 8012100 <_strtod_l+0x138> 801216e: f1b9 0f08 cmp.w r9, #8 8012172: bfd8 it le 8012174: 990b ldrle r1, [sp, #44] @ 0x2c 8012176: f100 0001 add.w r0, r0, #1 801217a: bfda itte le 801217c: fb02 3301 mlale r3, r2, r1, r3 8012180: 930b strle r3, [sp, #44] @ 0x2c 8012182: fb02 3707 mlagt r7, r2, r7, r3 8012186: f109 0901 add.w r9, r9, #1 801218a: 9019 str r0, [sp, #100] @ 0x64 801218c: e7bf b.n 801210e <_strtod_l+0x146> 801218e: 9b19 ldr r3, [sp, #100] @ 0x64 8012190: 1c5a adds r2, r3, #1 8012192: 9219 str r2, [sp, #100] @ 0x64 8012194: 785a ldrb r2, [r3, #1] 8012196: f1b9 0f00 cmp.w r9, #0 801219a: d03b beq.n 8012214 <_strtod_l+0x24c> 801219c: 900a str r0, [sp, #40] @ 0x28 801219e: 464d mov r5, r9 80121a0: f1a2 0330 sub.w r3, r2, #48 @ 0x30 80121a4: 2b09 cmp r3, #9 80121a6: d912 bls.n 80121ce <_strtod_l+0x206> 80121a8: 2301 movs r3, #1 80121aa: e7c2 b.n 8012132 <_strtod_l+0x16a> 80121ac: 9b19 ldr r3, [sp, #100] @ 0x64 80121ae: 1c5a adds r2, r3, #1 80121b0: 9219 str r2, [sp, #100] @ 0x64 80121b2: 785a ldrb r2, [r3, #1] 80121b4: 3001 adds r0, #1 80121b6: 2a30 cmp r2, #48 @ 0x30 80121b8: d0f8 beq.n 80121ac <_strtod_l+0x1e4> 80121ba: f1a2 0331 sub.w r3, r2, #49 @ 0x31 80121be: 2b08 cmp r3, #8 80121c0: f200 84d2 bhi.w 8012b68 <_strtod_l+0xba0> 80121c4: 9b19 ldr r3, [sp, #100] @ 0x64 80121c6: 900a str r0, [sp, #40] @ 0x28 80121c8: 2000 movs r0, #0 80121ca: 930c str r3, [sp, #48] @ 0x30 80121cc: 4605 mov r5, r0 80121ce: 3a30 subs r2, #48 @ 0x30 80121d0: f100 0301 add.w r3, r0, #1 80121d4: d018 beq.n 8012208 <_strtod_l+0x240> 80121d6: 990a ldr r1, [sp, #40] @ 0x28 80121d8: 4419 add r1, r3 80121da: 910a str r1, [sp, #40] @ 0x28 80121dc: 462e mov r6, r5 80121de: f04f 0e0a mov.w lr, #10 80121e2: 1c71 adds r1, r6, #1 80121e4: eba1 0c05 sub.w ip, r1, r5 80121e8: 4563 cmp r3, ip 80121ea: dc15 bgt.n 8012218 <_strtod_l+0x250> 80121ec: ea20 70e0 bic.w r0, r0, r0, asr #31 80121f0: 182b adds r3, r5, r0 80121f2: 2b08 cmp r3, #8 80121f4: f105 0501 add.w r5, r5, #1 80121f8: 4405 add r5, r0 80121fa: dc1a bgt.n 8012232 <_strtod_l+0x26a> 80121fc: 990b ldr r1, [sp, #44] @ 0x2c 80121fe: 230a movs r3, #10 8012200: fb03 2301 mla r3, r3, r1, r2 8012204: 930b str r3, [sp, #44] @ 0x2c 8012206: 2300 movs r3, #0 8012208: 9a19 ldr r2, [sp, #100] @ 0x64 801220a: 1c51 adds r1, r2, #1 801220c: 9119 str r1, [sp, #100] @ 0x64 801220e: 7852 ldrb r2, [r2, #1] 8012210: 4618 mov r0, r3 8012212: e7c5 b.n 80121a0 <_strtod_l+0x1d8> 8012214: 4648 mov r0, r9 8012216: e7ce b.n 80121b6 <_strtod_l+0x1ee> 8012218: 2e08 cmp r6, #8 801221a: dc05 bgt.n 8012228 <_strtod_l+0x260> 801221c: 9e0b ldr r6, [sp, #44] @ 0x2c 801221e: fb0e f606 mul.w r6, lr, r6 8012222: 960b str r6, [sp, #44] @ 0x2c 8012224: 460e mov r6, r1 8012226: e7dc b.n 80121e2 <_strtod_l+0x21a> 8012228: 2910 cmp r1, #16 801222a: bfd8 it le 801222c: fb0e f707 mulle.w r7, lr, r7 8012230: e7f8 b.n 8012224 <_strtod_l+0x25c> 8012232: 2b0f cmp r3, #15 8012234: bfdc itt le 8012236: 230a movle r3, #10 8012238: fb03 2707 mlale r7, r3, r7, r2 801223c: e7e3 b.n 8012206 <_strtod_l+0x23e> 801223e: 2300 movs r3, #0 8012240: 930a str r3, [sp, #40] @ 0x28 8012242: 2301 movs r3, #1 8012244: e77a b.n 801213c <_strtod_l+0x174> 8012246: f04f 0c00 mov.w ip, #0 801224a: 1ca2 adds r2, r4, #2 801224c: 9219 str r2, [sp, #100] @ 0x64 801224e: 78a2 ldrb r2, [r4, #2] 8012250: e782 b.n 8012158 <_strtod_l+0x190> 8012252: f04f 0c01 mov.w ip, #1 8012256: e7f8 b.n 801224a <_strtod_l+0x282> 8012258: 08015264 .word 0x08015264 801225c: 080150b7 .word 0x080150b7 8012260: 7ff00000 .word 0x7ff00000 8012264: 9a19 ldr r2, [sp, #100] @ 0x64 8012266: 1c51 adds r1, r2, #1 8012268: 9119 str r1, [sp, #100] @ 0x64 801226a: 7852 ldrb r2, [r2, #1] 801226c: 2a30 cmp r2, #48 @ 0x30 801226e: d0f9 beq.n 8012264 <_strtod_l+0x29c> 8012270: f1a2 0131 sub.w r1, r2, #49 @ 0x31 8012274: 2908 cmp r1, #8 8012276: f63f af75 bhi.w 8012164 <_strtod_l+0x19c> 801227a: 3a30 subs r2, #48 @ 0x30 801227c: 9209 str r2, [sp, #36] @ 0x24 801227e: 9a19 ldr r2, [sp, #100] @ 0x64 8012280: 920f str r2, [sp, #60] @ 0x3c 8012282: f04f 080a mov.w r8, #10 8012286: 9a19 ldr r2, [sp, #100] @ 0x64 8012288: 1c56 adds r6, r2, #1 801228a: 9619 str r6, [sp, #100] @ 0x64 801228c: 7852 ldrb r2, [r2, #1] 801228e: f1a2 0e30 sub.w lr, r2, #48 @ 0x30 8012292: f1be 0f09 cmp.w lr, #9 8012296: d939 bls.n 801230c <_strtod_l+0x344> 8012298: 990f ldr r1, [sp, #60] @ 0x3c 801229a: 1a76 subs r6, r6, r1 801229c: 2e08 cmp r6, #8 801229e: f644 681f movw r8, #19999 @ 0x4e1f 80122a2: dc03 bgt.n 80122ac <_strtod_l+0x2e4> 80122a4: 9909 ldr r1, [sp, #36] @ 0x24 80122a6: 4588 cmp r8, r1 80122a8: bfa8 it ge 80122aa: 4688 movge r8, r1 80122ac: f1bc 0f00 cmp.w ip, #0 80122b0: d001 beq.n 80122b6 <_strtod_l+0x2ee> 80122b2: f1c8 0800 rsb r8, r8, #0 80122b6: 2d00 cmp r5, #0 80122b8: d14e bne.n 8012358 <_strtod_l+0x390> 80122ba: 9908 ldr r1, [sp, #32] 80122bc: 4308 orrs r0, r1 80122be: f47f aebc bne.w 801203a <_strtod_l+0x72> 80122c2: 2b00 cmp r3, #0 80122c4: f47f aed4 bne.w 8012070 <_strtod_l+0xa8> 80122c8: 2a69 cmp r2, #105 @ 0x69 80122ca: d028 beq.n 801231e <_strtod_l+0x356> 80122cc: dc25 bgt.n 801231a <_strtod_l+0x352> 80122ce: 2a49 cmp r2, #73 @ 0x49 80122d0: d025 beq.n 801231e <_strtod_l+0x356> 80122d2: 2a4e cmp r2, #78 @ 0x4e 80122d4: f47f aecc bne.w 8012070 <_strtod_l+0xa8> 80122d8: 499a ldr r1, [pc, #616] @ (8012544 <_strtod_l+0x57c>) 80122da: a819 add r0, sp, #100 @ 0x64 80122dc: f001 ff20 bl 8014120 <__match> 80122e0: 2800 cmp r0, #0 80122e2: f43f aec5 beq.w 8012070 <_strtod_l+0xa8> 80122e6: 9b19 ldr r3, [sp, #100] @ 0x64 80122e8: 781b ldrb r3, [r3, #0] 80122ea: 2b28 cmp r3, #40 @ 0x28 80122ec: d12e bne.n 801234c <_strtod_l+0x384> 80122ee: 4996 ldr r1, [pc, #600] @ (8012548 <_strtod_l+0x580>) 80122f0: aa1c add r2, sp, #112 @ 0x70 80122f2: a819 add r0, sp, #100 @ 0x64 80122f4: f001 ff28 bl 8014148 <__hexnan> 80122f8: 2805 cmp r0, #5 80122fa: d127 bne.n 801234c <_strtod_l+0x384> 80122fc: 9b1d ldr r3, [sp, #116] @ 0x74 80122fe: f8dd a070 ldr.w sl, [sp, #112] @ 0x70 8012302: f043 4bff orr.w fp, r3, #2139095040 @ 0x7f800000 8012306: f44b 0be0 orr.w fp, fp, #7340032 @ 0x700000 801230a: e696 b.n 801203a <_strtod_l+0x72> 801230c: 9909 ldr r1, [sp, #36] @ 0x24 801230e: fb08 2101 mla r1, r8, r1, r2 8012312: f1a1 0230 sub.w r2, r1, #48 @ 0x30 8012316: 9209 str r2, [sp, #36] @ 0x24 8012318: e7b5 b.n 8012286 <_strtod_l+0x2be> 801231a: 2a6e cmp r2, #110 @ 0x6e 801231c: e7da b.n 80122d4 <_strtod_l+0x30c> 801231e: 498b ldr r1, [pc, #556] @ (801254c <_strtod_l+0x584>) 8012320: a819 add r0, sp, #100 @ 0x64 8012322: f001 fefd bl 8014120 <__match> 8012326: 2800 cmp r0, #0 8012328: f43f aea2 beq.w 8012070 <_strtod_l+0xa8> 801232c: 9b19 ldr r3, [sp, #100] @ 0x64 801232e: 4988 ldr r1, [pc, #544] @ (8012550 <_strtod_l+0x588>) 8012330: 3b01 subs r3, #1 8012332: a819 add r0, sp, #100 @ 0x64 8012334: 9319 str r3, [sp, #100] @ 0x64 8012336: f001 fef3 bl 8014120 <__match> 801233a: b910 cbnz r0, 8012342 <_strtod_l+0x37a> 801233c: 9b19 ldr r3, [sp, #100] @ 0x64 801233e: 3301 adds r3, #1 8012340: 9319 str r3, [sp, #100] @ 0x64 8012342: f8df b21c ldr.w fp, [pc, #540] @ 8012560 <_strtod_l+0x598> 8012346: f04f 0a00 mov.w sl, #0 801234a: e676 b.n 801203a <_strtod_l+0x72> 801234c: 4881 ldr r0, [pc, #516] @ (8012554 <_strtod_l+0x58c>) 801234e: f001 fc3b bl 8013bc8 8012352: ec5b ab10 vmov sl, fp, d0 8012356: e670 b.n 801203a <_strtod_l+0x72> 8012358: 9b0a ldr r3, [sp, #40] @ 0x28 801235a: 980b ldr r0, [sp, #44] @ 0x2c 801235c: eba8 0303 sub.w r3, r8, r3 8012360: f1b9 0f00 cmp.w r9, #0 8012364: bf08 it eq 8012366: 46a9 moveq r9, r5 8012368: 2d10 cmp r5, #16 801236a: 9309 str r3, [sp, #36] @ 0x24 801236c: 462c mov r4, r5 801236e: bfa8 it ge 8012370: 2410 movge r4, #16 8012372: f7ee f8d7 bl 8000524 <__aeabi_ui2d> 8012376: 2d09 cmp r5, #9 8012378: 4682 mov sl, r0 801237a: 468b mov fp, r1 801237c: dc13 bgt.n 80123a6 <_strtod_l+0x3de> 801237e: 9b09 ldr r3, [sp, #36] @ 0x24 8012380: 2b00 cmp r3, #0 8012382: f43f ae5a beq.w 801203a <_strtod_l+0x72> 8012386: 9b09 ldr r3, [sp, #36] @ 0x24 8012388: dd78 ble.n 801247c <_strtod_l+0x4b4> 801238a: 2b16 cmp r3, #22 801238c: dc5f bgt.n 801244e <_strtod_l+0x486> 801238e: 4972 ldr r1, [pc, #456] @ (8012558 <_strtod_l+0x590>) 8012390: eb01 01c3 add.w r1, r1, r3, lsl #3 8012394: e9d1 0100 ldrd r0, r1, [r1] 8012398: 4652 mov r2, sl 801239a: 465b mov r3, fp 801239c: f7ee f93c bl 8000618 <__aeabi_dmul> 80123a0: 4682 mov sl, r0 80123a2: 468b mov fp, r1 80123a4: e649 b.n 801203a <_strtod_l+0x72> 80123a6: 4b6c ldr r3, [pc, #432] @ (8012558 <_strtod_l+0x590>) 80123a8: eb03 03c4 add.w r3, r3, r4, lsl #3 80123ac: e953 2312 ldrd r2, r3, [r3, #-72] @ 0x48 80123b0: f7ee f932 bl 8000618 <__aeabi_dmul> 80123b4: 4682 mov sl, r0 80123b6: 4638 mov r0, r7 80123b8: 468b mov fp, r1 80123ba: f7ee f8b3 bl 8000524 <__aeabi_ui2d> 80123be: 4602 mov r2, r0 80123c0: 460b mov r3, r1 80123c2: 4650 mov r0, sl 80123c4: 4659 mov r1, fp 80123c6: f7ed ff71 bl 80002ac <__adddf3> 80123ca: 2d0f cmp r5, #15 80123cc: 4682 mov sl, r0 80123ce: 468b mov fp, r1 80123d0: ddd5 ble.n 801237e <_strtod_l+0x3b6> 80123d2: 9b09 ldr r3, [sp, #36] @ 0x24 80123d4: 1b2c subs r4, r5, r4 80123d6: 441c add r4, r3 80123d8: 2c00 cmp r4, #0 80123da: f340 8093 ble.w 8012504 <_strtod_l+0x53c> 80123de: f014 030f ands.w r3, r4, #15 80123e2: d00a beq.n 80123fa <_strtod_l+0x432> 80123e4: 495c ldr r1, [pc, #368] @ (8012558 <_strtod_l+0x590>) 80123e6: eb01 01c3 add.w r1, r1, r3, lsl #3 80123ea: 4652 mov r2, sl 80123ec: 465b mov r3, fp 80123ee: e9d1 0100 ldrd r0, r1, [r1] 80123f2: f7ee f911 bl 8000618 <__aeabi_dmul> 80123f6: 4682 mov sl, r0 80123f8: 468b mov fp, r1 80123fa: f034 040f bics.w r4, r4, #15 80123fe: d073 beq.n 80124e8 <_strtod_l+0x520> 8012400: f5b4 7f9a cmp.w r4, #308 @ 0x134 8012404: dd49 ble.n 801249a <_strtod_l+0x4d2> 8012406: 2400 movs r4, #0 8012408: 46a0 mov r8, r4 801240a: 940b str r4, [sp, #44] @ 0x2c 801240c: 46a1 mov r9, r4 801240e: 9a05 ldr r2, [sp, #20] 8012410: f8df b14c ldr.w fp, [pc, #332] @ 8012560 <_strtod_l+0x598> 8012414: 2322 movs r3, #34 @ 0x22 8012416: 6013 str r3, [r2, #0] 8012418: f04f 0a00 mov.w sl, #0 801241c: 9b0b ldr r3, [sp, #44] @ 0x2c 801241e: 2b00 cmp r3, #0 8012420: f43f ae0b beq.w 801203a <_strtod_l+0x72> 8012424: 991a ldr r1, [sp, #104] @ 0x68 8012426: 9805 ldr r0, [sp, #20] 8012428: f7ff f946 bl 80116b8 <_Bfree> 801242c: 9805 ldr r0, [sp, #20] 801242e: 4649 mov r1, r9 8012430: f7ff f942 bl 80116b8 <_Bfree> 8012434: 9805 ldr r0, [sp, #20] 8012436: 4641 mov r1, r8 8012438: f7ff f93e bl 80116b8 <_Bfree> 801243c: 990b ldr r1, [sp, #44] @ 0x2c 801243e: 9805 ldr r0, [sp, #20] 8012440: f7ff f93a bl 80116b8 <_Bfree> 8012444: 9805 ldr r0, [sp, #20] 8012446: 4621 mov r1, r4 8012448: f7ff f936 bl 80116b8 <_Bfree> 801244c: e5f5 b.n 801203a <_strtod_l+0x72> 801244e: 9a09 ldr r2, [sp, #36] @ 0x24 8012450: f1c5 0325 rsb r3, r5, #37 @ 0x25 8012454: 4293 cmp r3, r2 8012456: dbbc blt.n 80123d2 <_strtod_l+0x40a> 8012458: 4c3f ldr r4, [pc, #252] @ (8012558 <_strtod_l+0x590>) 801245a: f1c5 050f rsb r5, r5, #15 801245e: eb04 01c5 add.w r1, r4, r5, lsl #3 8012462: 4652 mov r2, sl 8012464: 465b mov r3, fp 8012466: e9d1 0100 ldrd r0, r1, [r1] 801246a: f7ee f8d5 bl 8000618 <__aeabi_dmul> 801246e: 9b09 ldr r3, [sp, #36] @ 0x24 8012470: 1b5d subs r5, r3, r5 8012472: eb04 04c5 add.w r4, r4, r5, lsl #3 8012476: e9d4 2300 ldrd r2, r3, [r4] 801247a: e78f b.n 801239c <_strtod_l+0x3d4> 801247c: 3316 adds r3, #22 801247e: dba8 blt.n 80123d2 <_strtod_l+0x40a> 8012480: 9b0a ldr r3, [sp, #40] @ 0x28 8012482: eba3 0808 sub.w r8, r3, r8 8012486: 4b34 ldr r3, [pc, #208] @ (8012558 <_strtod_l+0x590>) 8012488: eb03 08c8 add.w r8, r3, r8, lsl #3 801248c: e9d8 2300 ldrd r2, r3, [r8] 8012490: 4650 mov r0, sl 8012492: 4659 mov r1, fp 8012494: f7ee f9ea bl 800086c <__aeabi_ddiv> 8012498: e782 b.n 80123a0 <_strtod_l+0x3d8> 801249a: 2300 movs r3, #0 801249c: 4f2f ldr r7, [pc, #188] @ (801255c <_strtod_l+0x594>) 801249e: 1124 asrs r4, r4, #4 80124a0: 4650 mov r0, sl 80124a2: 4659 mov r1, fp 80124a4: 461e mov r6, r3 80124a6: 2c01 cmp r4, #1 80124a8: dc21 bgt.n 80124ee <_strtod_l+0x526> 80124aa: b10b cbz r3, 80124b0 <_strtod_l+0x4e8> 80124ac: 4682 mov sl, r0 80124ae: 468b mov fp, r1 80124b0: 492a ldr r1, [pc, #168] @ (801255c <_strtod_l+0x594>) 80124b2: f1ab 7b54 sub.w fp, fp, #55574528 @ 0x3500000 80124b6: eb01 01c6 add.w r1, r1, r6, lsl #3 80124ba: 4652 mov r2, sl 80124bc: 465b mov r3, fp 80124be: e9d1 0100 ldrd r0, r1, [r1] 80124c2: f7ee f8a9 bl 8000618 <__aeabi_dmul> 80124c6: 4b26 ldr r3, [pc, #152] @ (8012560 <_strtod_l+0x598>) 80124c8: 460a mov r2, r1 80124ca: 400b ands r3, r1 80124cc: 4925 ldr r1, [pc, #148] @ (8012564 <_strtod_l+0x59c>) 80124ce: 428b cmp r3, r1 80124d0: 4682 mov sl, r0 80124d2: d898 bhi.n 8012406 <_strtod_l+0x43e> 80124d4: f5a1 1180 sub.w r1, r1, #1048576 @ 0x100000 80124d8: 428b cmp r3, r1 80124da: bf86 itte hi 80124dc: f8df b088 ldrhi.w fp, [pc, #136] @ 8012568 <_strtod_l+0x5a0> 80124e0: f04f 3aff movhi.w sl, #4294967295 @ 0xffffffff 80124e4: f102 7b54 addls.w fp, r2, #55574528 @ 0x3500000 80124e8: 2300 movs r3, #0 80124ea: 9308 str r3, [sp, #32] 80124ec: e076 b.n 80125dc <_strtod_l+0x614> 80124ee: 07e2 lsls r2, r4, #31 80124f0: d504 bpl.n 80124fc <_strtod_l+0x534> 80124f2: e9d7 2300 ldrd r2, r3, [r7] 80124f6: f7ee f88f bl 8000618 <__aeabi_dmul> 80124fa: 2301 movs r3, #1 80124fc: 3601 adds r6, #1 80124fe: 1064 asrs r4, r4, #1 8012500: 3708 adds r7, #8 8012502: e7d0 b.n 80124a6 <_strtod_l+0x4de> 8012504: d0f0 beq.n 80124e8 <_strtod_l+0x520> 8012506: 4264 negs r4, r4 8012508: f014 020f ands.w r2, r4, #15 801250c: d00a beq.n 8012524 <_strtod_l+0x55c> 801250e: 4b12 ldr r3, [pc, #72] @ (8012558 <_strtod_l+0x590>) 8012510: eb03 03c2 add.w r3, r3, r2, lsl #3 8012514: 4650 mov r0, sl 8012516: 4659 mov r1, fp 8012518: e9d3 2300 ldrd r2, r3, [r3] 801251c: f7ee f9a6 bl 800086c <__aeabi_ddiv> 8012520: 4682 mov sl, r0 8012522: 468b mov fp, r1 8012524: 1124 asrs r4, r4, #4 8012526: d0df beq.n 80124e8 <_strtod_l+0x520> 8012528: 2c1f cmp r4, #31 801252a: dd1f ble.n 801256c <_strtod_l+0x5a4> 801252c: 2400 movs r4, #0 801252e: 46a0 mov r8, r4 8012530: 940b str r4, [sp, #44] @ 0x2c 8012532: 46a1 mov r9, r4 8012534: 9a05 ldr r2, [sp, #20] 8012536: 2322 movs r3, #34 @ 0x22 8012538: f04f 0a00 mov.w sl, #0 801253c: f04f 0b00 mov.w fp, #0 8012540: 6013 str r3, [r2, #0] 8012542: e76b b.n 801241c <_strtod_l+0x454> 8012544: 08014f11 .word 0x08014f11 8012548: 08015250 .word 0x08015250 801254c: 08014f09 .word 0x08014f09 8012550: 08014feb .word 0x08014feb 8012554: 08014fe7 .word 0x08014fe7 8012558: 08015188 .word 0x08015188 801255c: 08015160 .word 0x08015160 8012560: 7ff00000 .word 0x7ff00000 8012564: 7ca00000 .word 0x7ca00000 8012568: 7fefffff .word 0x7fefffff 801256c: f014 0310 ands.w r3, r4, #16 8012570: bf18 it ne 8012572: 236a movne r3, #106 @ 0x6a 8012574: 4ea9 ldr r6, [pc, #676] @ (801281c <_strtod_l+0x854>) 8012576: 9308 str r3, [sp, #32] 8012578: 4650 mov r0, sl 801257a: 4659 mov r1, fp 801257c: 2300 movs r3, #0 801257e: 07e7 lsls r7, r4, #31 8012580: d504 bpl.n 801258c <_strtod_l+0x5c4> 8012582: e9d6 2300 ldrd r2, r3, [r6] 8012586: f7ee f847 bl 8000618 <__aeabi_dmul> 801258a: 2301 movs r3, #1 801258c: 1064 asrs r4, r4, #1 801258e: f106 0608 add.w r6, r6, #8 8012592: d1f4 bne.n 801257e <_strtod_l+0x5b6> 8012594: b10b cbz r3, 801259a <_strtod_l+0x5d2> 8012596: 4682 mov sl, r0 8012598: 468b mov fp, r1 801259a: 9b08 ldr r3, [sp, #32] 801259c: b1b3 cbz r3, 80125cc <_strtod_l+0x604> 801259e: f3cb 520a ubfx r2, fp, #20, #11 80125a2: f1c2 036b rsb r3, r2, #107 @ 0x6b 80125a6: 2b00 cmp r3, #0 80125a8: 4659 mov r1, fp 80125aa: dd0f ble.n 80125cc <_strtod_l+0x604> 80125ac: 2b1f cmp r3, #31 80125ae: dd56 ble.n 801265e <_strtod_l+0x696> 80125b0: 2b34 cmp r3, #52 @ 0x34 80125b2: bfde ittt le 80125b4: f04f 33ff movle.w r3, #4294967295 @ 0xffffffff 80125b8: f1c2 024b rsble r2, r2, #75 @ 0x4b 80125bc: 4093 lslle r3, r2 80125be: f04f 0a00 mov.w sl, #0 80125c2: bfcc ite gt 80125c4: f04f 7b5c movgt.w fp, #57671680 @ 0x3700000 80125c8: ea03 0b01 andle.w fp, r3, r1 80125cc: 2200 movs r2, #0 80125ce: 2300 movs r3, #0 80125d0: 4650 mov r0, sl 80125d2: 4659 mov r1, fp 80125d4: f7ee fa88 bl 8000ae8 <__aeabi_dcmpeq> 80125d8: 2800 cmp r0, #0 80125da: d1a7 bne.n 801252c <_strtod_l+0x564> 80125dc: 9b0b ldr r3, [sp, #44] @ 0x2c 80125de: 9300 str r3, [sp, #0] 80125e0: 990c ldr r1, [sp, #48] @ 0x30 80125e2: 9805 ldr r0, [sp, #20] 80125e4: 462b mov r3, r5 80125e6: 464a mov r2, r9 80125e8: f7ff f8ce bl 8011788 <__s2b> 80125ec: 900b str r0, [sp, #44] @ 0x2c 80125ee: 2800 cmp r0, #0 80125f0: f43f af09 beq.w 8012406 <_strtod_l+0x43e> 80125f4: 9a09 ldr r2, [sp, #36] @ 0x24 80125f6: 9b0a ldr r3, [sp, #40] @ 0x28 80125f8: 2a00 cmp r2, #0 80125fa: eba3 0308 sub.w r3, r3, r8 80125fe: bfa8 it ge 8012600: 2300 movge r3, #0 8012602: 9312 str r3, [sp, #72] @ 0x48 8012604: 2400 movs r4, #0 8012606: ea22 73e2 bic.w r3, r2, r2, asr #31 801260a: 9316 str r3, [sp, #88] @ 0x58 801260c: 46a0 mov r8, r4 801260e: 9b0b ldr r3, [sp, #44] @ 0x2c 8012610: 9805 ldr r0, [sp, #20] 8012612: 6859 ldr r1, [r3, #4] 8012614: f7ff f810 bl 8011638 <_Balloc> 8012618: 4681 mov r9, r0 801261a: 2800 cmp r0, #0 801261c: f43f aef7 beq.w 801240e <_strtod_l+0x446> 8012620: 9b0b ldr r3, [sp, #44] @ 0x2c 8012622: 691a ldr r2, [r3, #16] 8012624: 3202 adds r2, #2 8012626: f103 010c add.w r1, r3, #12 801262a: 0092 lsls r2, r2, #2 801262c: 300c adds r0, #12 801262e: f7fe f876 bl 801071e 8012632: ec4b ab10 vmov d0, sl, fp 8012636: 9805 ldr r0, [sp, #20] 8012638: aa1c add r2, sp, #112 @ 0x70 801263a: a91b add r1, sp, #108 @ 0x6c 801263c: e9cd ab0c strd sl, fp, [sp, #48] @ 0x30 8012640: f7ff fbd6 bl 8011df0 <__d2b> 8012644: 901a str r0, [sp, #104] @ 0x68 8012646: 2800 cmp r0, #0 8012648: f43f aee1 beq.w 801240e <_strtod_l+0x446> 801264c: 9805 ldr r0, [sp, #20] 801264e: 2101 movs r1, #1 8012650: f7ff f930 bl 80118b4 <__i2b> 8012654: 4680 mov r8, r0 8012656: b948 cbnz r0, 801266c <_strtod_l+0x6a4> 8012658: f04f 0800 mov.w r8, #0 801265c: e6d7 b.n 801240e <_strtod_l+0x446> 801265e: f04f 32ff mov.w r2, #4294967295 @ 0xffffffff 8012662: fa02 f303 lsl.w r3, r2, r3 8012666: ea03 0a0a and.w sl, r3, sl 801266a: e7af b.n 80125cc <_strtod_l+0x604> 801266c: 9d1b ldr r5, [sp, #108] @ 0x6c 801266e: 9a1c ldr r2, [sp, #112] @ 0x70 8012670: 2d00 cmp r5, #0 8012672: bfab itete ge 8012674: 9b12 ldrge r3, [sp, #72] @ 0x48 8012676: 9b16 ldrlt r3, [sp, #88] @ 0x58 8012678: 9e16 ldrge r6, [sp, #88] @ 0x58 801267a: 9f12 ldrlt r7, [sp, #72] @ 0x48 801267c: bfac ite ge 801267e: 18ef addge r7, r5, r3 8012680: 1b5e sublt r6, r3, r5 8012682: 9b08 ldr r3, [sp, #32] 8012684: 1aed subs r5, r5, r3 8012686: 4415 add r5, r2 8012688: 4b65 ldr r3, [pc, #404] @ (8012820 <_strtod_l+0x858>) 801268a: 3d01 subs r5, #1 801268c: 429d cmp r5, r3 801268e: f1c2 0236 rsb r2, r2, #54 @ 0x36 8012692: da50 bge.n 8012736 <_strtod_l+0x76e> 8012694: 1b5b subs r3, r3, r5 8012696: 2b1f cmp r3, #31 8012698: eba2 0203 sub.w r2, r2, r3 801269c: f04f 0101 mov.w r1, #1 80126a0: dc3d bgt.n 801271e <_strtod_l+0x756> 80126a2: fa01 f303 lsl.w r3, r1, r3 80126a6: 9313 str r3, [sp, #76] @ 0x4c 80126a8: 2300 movs r3, #0 80126aa: 9310 str r3, [sp, #64] @ 0x40 80126ac: 18bd adds r5, r7, r2 80126ae: 9b08 ldr r3, [sp, #32] 80126b0: 42af cmp r7, r5 80126b2: 4416 add r6, r2 80126b4: 441e add r6, r3 80126b6: 463b mov r3, r7 80126b8: bfa8 it ge 80126ba: 462b movge r3, r5 80126bc: 42b3 cmp r3, r6 80126be: bfa8 it ge 80126c0: 4633 movge r3, r6 80126c2: 2b00 cmp r3, #0 80126c4: bfc2 ittt gt 80126c6: 1aed subgt r5, r5, r3 80126c8: 1af6 subgt r6, r6, r3 80126ca: 1aff subgt r7, r7, r3 80126cc: 9b12 ldr r3, [sp, #72] @ 0x48 80126ce: 2b00 cmp r3, #0 80126d0: dd16 ble.n 8012700 <_strtod_l+0x738> 80126d2: 4641 mov r1, r8 80126d4: 9805 ldr r0, [sp, #20] 80126d6: 461a mov r2, r3 80126d8: f7ff f9a4 bl 8011a24 <__pow5mult> 80126dc: 4680 mov r8, r0 80126de: 2800 cmp r0, #0 80126e0: d0ba beq.n 8012658 <_strtod_l+0x690> 80126e2: 4601 mov r1, r0 80126e4: 9a1a ldr r2, [sp, #104] @ 0x68 80126e6: 9805 ldr r0, [sp, #20] 80126e8: f7ff f8fa bl 80118e0 <__multiply> 80126ec: 900a str r0, [sp, #40] @ 0x28 80126ee: 2800 cmp r0, #0 80126f0: f43f ae8d beq.w 801240e <_strtod_l+0x446> 80126f4: 991a ldr r1, [sp, #104] @ 0x68 80126f6: 9805 ldr r0, [sp, #20] 80126f8: f7fe ffde bl 80116b8 <_Bfree> 80126fc: 9b0a ldr r3, [sp, #40] @ 0x28 80126fe: 931a str r3, [sp, #104] @ 0x68 8012700: 2d00 cmp r5, #0 8012702: dc1d bgt.n 8012740 <_strtod_l+0x778> 8012704: 9b09 ldr r3, [sp, #36] @ 0x24 8012706: 2b00 cmp r3, #0 8012708: dd23 ble.n 8012752 <_strtod_l+0x78a> 801270a: 4649 mov r1, r9 801270c: 9a16 ldr r2, [sp, #88] @ 0x58 801270e: 9805 ldr r0, [sp, #20] 8012710: f7ff f988 bl 8011a24 <__pow5mult> 8012714: 4681 mov r9, r0 8012716: b9e0 cbnz r0, 8012752 <_strtod_l+0x78a> 8012718: f04f 0900 mov.w r9, #0 801271c: e677 b.n 801240e <_strtod_l+0x446> 801271e: f1c5 457f rsb r5, r5, #4278190080 @ 0xff000000 8012722: f505 057f add.w r5, r5, #16711680 @ 0xff0000 8012726: f505 457b add.w r5, r5, #64256 @ 0xfb00 801272a: 35e2 adds r5, #226 @ 0xe2 801272c: fa01 f305 lsl.w r3, r1, r5 8012730: 9310 str r3, [sp, #64] @ 0x40 8012732: 9113 str r1, [sp, #76] @ 0x4c 8012734: e7ba b.n 80126ac <_strtod_l+0x6e4> 8012736: 2300 movs r3, #0 8012738: 9310 str r3, [sp, #64] @ 0x40 801273a: 2301 movs r3, #1 801273c: 9313 str r3, [sp, #76] @ 0x4c 801273e: e7b5 b.n 80126ac <_strtod_l+0x6e4> 8012740: 991a ldr r1, [sp, #104] @ 0x68 8012742: 9805 ldr r0, [sp, #20] 8012744: 462a mov r2, r5 8012746: f7ff f9c7 bl 8011ad8 <__lshift> 801274a: 901a str r0, [sp, #104] @ 0x68 801274c: 2800 cmp r0, #0 801274e: d1d9 bne.n 8012704 <_strtod_l+0x73c> 8012750: e65d b.n 801240e <_strtod_l+0x446> 8012752: 2e00 cmp r6, #0 8012754: dd07 ble.n 8012766 <_strtod_l+0x79e> 8012756: 4649 mov r1, r9 8012758: 9805 ldr r0, [sp, #20] 801275a: 4632 mov r2, r6 801275c: f7ff f9bc bl 8011ad8 <__lshift> 8012760: 4681 mov r9, r0 8012762: 2800 cmp r0, #0 8012764: d0d8 beq.n 8012718 <_strtod_l+0x750> 8012766: 2f00 cmp r7, #0 8012768: dd08 ble.n 801277c <_strtod_l+0x7b4> 801276a: 4641 mov r1, r8 801276c: 9805 ldr r0, [sp, #20] 801276e: 463a mov r2, r7 8012770: f7ff f9b2 bl 8011ad8 <__lshift> 8012774: 4680 mov r8, r0 8012776: 2800 cmp r0, #0 8012778: f43f ae49 beq.w 801240e <_strtod_l+0x446> 801277c: 991a ldr r1, [sp, #104] @ 0x68 801277e: 9805 ldr r0, [sp, #20] 8012780: 464a mov r2, r9 8012782: f7ff fa31 bl 8011be8 <__mdiff> 8012786: 4604 mov r4, r0 8012788: 2800 cmp r0, #0 801278a: f43f ae40 beq.w 801240e <_strtod_l+0x446> 801278e: 68c3 ldr r3, [r0, #12] 8012790: 930f str r3, [sp, #60] @ 0x3c 8012792: 2300 movs r3, #0 8012794: 60c3 str r3, [r0, #12] 8012796: 4641 mov r1, r8 8012798: f7ff fa0a bl 8011bb0 <__mcmp> 801279c: 2800 cmp r0, #0 801279e: da45 bge.n 801282c <_strtod_l+0x864> 80127a0: 9b0f ldr r3, [sp, #60] @ 0x3c 80127a2: ea53 030a orrs.w r3, r3, sl 80127a6: d16b bne.n 8012880 <_strtod_l+0x8b8> 80127a8: f3cb 0313 ubfx r3, fp, #0, #20 80127ac: 2b00 cmp r3, #0 80127ae: d167 bne.n 8012880 <_strtod_l+0x8b8> 80127b0: f02b 4300 bic.w r3, fp, #2147483648 @ 0x80000000 80127b4: 0d1b lsrs r3, r3, #20 80127b6: 051b lsls r3, r3, #20 80127b8: f1b3 6fd6 cmp.w r3, #112197632 @ 0x6b00000 80127bc: d960 bls.n 8012880 <_strtod_l+0x8b8> 80127be: 6963 ldr r3, [r4, #20] 80127c0: b913 cbnz r3, 80127c8 <_strtod_l+0x800> 80127c2: 6923 ldr r3, [r4, #16] 80127c4: 2b01 cmp r3, #1 80127c6: dd5b ble.n 8012880 <_strtod_l+0x8b8> 80127c8: 4621 mov r1, r4 80127ca: 2201 movs r2, #1 80127cc: 9805 ldr r0, [sp, #20] 80127ce: f7ff f983 bl 8011ad8 <__lshift> 80127d2: 4641 mov r1, r8 80127d4: 4604 mov r4, r0 80127d6: f7ff f9eb bl 8011bb0 <__mcmp> 80127da: 2800 cmp r0, #0 80127dc: dd50 ble.n 8012880 <_strtod_l+0x8b8> 80127de: f02b 4300 bic.w r3, fp, #2147483648 @ 0x80000000 80127e2: 9a08 ldr r2, [sp, #32] 80127e4: 0d1b lsrs r3, r3, #20 80127e6: 051b lsls r3, r3, #20 80127e8: 2a00 cmp r2, #0 80127ea: d06a beq.n 80128c2 <_strtod_l+0x8fa> 80127ec: f1b3 6fd6 cmp.w r3, #112197632 @ 0x6b00000 80127f0: d867 bhi.n 80128c2 <_strtod_l+0x8fa> 80127f2: f1b3 7f5c cmp.w r3, #57671680 @ 0x3700000 80127f6: f67f ae9d bls.w 8012534 <_strtod_l+0x56c> 80127fa: 4b0a ldr r3, [pc, #40] @ (8012824 <_strtod_l+0x85c>) 80127fc: 4650 mov r0, sl 80127fe: 4659 mov r1, fp 8012800: 2200 movs r2, #0 8012802: f7ed ff09 bl 8000618 <__aeabi_dmul> 8012806: 4b08 ldr r3, [pc, #32] @ (8012828 <_strtod_l+0x860>) 8012808: 400b ands r3, r1 801280a: 4682 mov sl, r0 801280c: 468b mov fp, r1 801280e: 2b00 cmp r3, #0 8012810: f47f ae08 bne.w 8012424 <_strtod_l+0x45c> 8012814: 9a05 ldr r2, [sp, #20] 8012816: 2322 movs r3, #34 @ 0x22 8012818: 6013 str r3, [r2, #0] 801281a: e603 b.n 8012424 <_strtod_l+0x45c> 801281c: 08015278 .word 0x08015278 8012820: fffffc02 .word 0xfffffc02 8012824: 39500000 .word 0x39500000 8012828: 7ff00000 .word 0x7ff00000 801282c: f8cd b028 str.w fp, [sp, #40] @ 0x28 8012830: d165 bne.n 80128fe <_strtod_l+0x936> 8012832: 9a0f ldr r2, [sp, #60] @ 0x3c 8012834: f3cb 0313 ubfx r3, fp, #0, #20 8012838: b35a cbz r2, 8012892 <_strtod_l+0x8ca> 801283a: 4a9f ldr r2, [pc, #636] @ (8012ab8 <_strtod_l+0xaf0>) 801283c: 4293 cmp r3, r2 801283e: d12b bne.n 8012898 <_strtod_l+0x8d0> 8012840: 9b08 ldr r3, [sp, #32] 8012842: 4651 mov r1, sl 8012844: b303 cbz r3, 8012888 <_strtod_l+0x8c0> 8012846: 4b9d ldr r3, [pc, #628] @ (8012abc <_strtod_l+0xaf4>) 8012848: 465a mov r2, fp 801284a: 4013 ands r3, r2 801284c: f1b3 6fd4 cmp.w r3, #111149056 @ 0x6a00000 8012850: f04f 32ff mov.w r2, #4294967295 @ 0xffffffff 8012854: d81b bhi.n 801288e <_strtod_l+0x8c6> 8012856: 0d1b lsrs r3, r3, #20 8012858: f1c3 036b rsb r3, r3, #107 @ 0x6b 801285c: fa02 f303 lsl.w r3, r2, r3 8012860: 4299 cmp r1, r3 8012862: d119 bne.n 8012898 <_strtod_l+0x8d0> 8012864: 4b96 ldr r3, [pc, #600] @ (8012ac0 <_strtod_l+0xaf8>) 8012866: 9a0a ldr r2, [sp, #40] @ 0x28 8012868: 429a cmp r2, r3 801286a: d102 bne.n 8012872 <_strtod_l+0x8aa> 801286c: 3101 adds r1, #1 801286e: f43f adce beq.w 801240e <_strtod_l+0x446> 8012872: 4b92 ldr r3, [pc, #584] @ (8012abc <_strtod_l+0xaf4>) 8012874: 9a0a ldr r2, [sp, #40] @ 0x28 8012876: 401a ands r2, r3 8012878: f502 1b80 add.w fp, r2, #1048576 @ 0x100000 801287c: f04f 0a00 mov.w sl, #0 8012880: 9b08 ldr r3, [sp, #32] 8012882: 2b00 cmp r3, #0 8012884: d1b9 bne.n 80127fa <_strtod_l+0x832> 8012886: e5cd b.n 8012424 <_strtod_l+0x45c> 8012888: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff 801288c: e7e8 b.n 8012860 <_strtod_l+0x898> 801288e: 4613 mov r3, r2 8012890: e7e6 b.n 8012860 <_strtod_l+0x898> 8012892: ea53 030a orrs.w r3, r3, sl 8012896: d0a2 beq.n 80127de <_strtod_l+0x816> 8012898: 9b10 ldr r3, [sp, #64] @ 0x40 801289a: b1db cbz r3, 80128d4 <_strtod_l+0x90c> 801289c: 9a0a ldr r2, [sp, #40] @ 0x28 801289e: 4213 tst r3, r2 80128a0: d0ee beq.n 8012880 <_strtod_l+0x8b8> 80128a2: 9b0f ldr r3, [sp, #60] @ 0x3c 80128a4: 9a08 ldr r2, [sp, #32] 80128a6: 4650 mov r0, sl 80128a8: 4659 mov r1, fp 80128aa: b1bb cbz r3, 80128dc <_strtod_l+0x914> 80128ac: f7ff fb6e bl 8011f8c 80128b0: e9dd 010c ldrd r0, r1, [sp, #48] @ 0x30 80128b4: ec53 2b10 vmov r2, r3, d0 80128b8: f7ed fcf8 bl 80002ac <__adddf3> 80128bc: 4682 mov sl, r0 80128be: 468b mov fp, r1 80128c0: e7de b.n 8012880 <_strtod_l+0x8b8> 80128c2: f5a3 1380 sub.w r3, r3, #1048576 @ 0x100000 80128c6: ea6f 5b13 mvn.w fp, r3, lsr #20 80128ca: ea6f 5b0b mvn.w fp, fp, lsl #20 80128ce: f04f 3aff mov.w sl, #4294967295 @ 0xffffffff 80128d2: e7d5 b.n 8012880 <_strtod_l+0x8b8> 80128d4: 9b13 ldr r3, [sp, #76] @ 0x4c 80128d6: ea13 0f0a tst.w r3, sl 80128da: e7e1 b.n 80128a0 <_strtod_l+0x8d8> 80128dc: f7ff fb56 bl 8011f8c 80128e0: e9dd 010c ldrd r0, r1, [sp, #48] @ 0x30 80128e4: ec53 2b10 vmov r2, r3, d0 80128e8: f7ed fcde bl 80002a8 <__aeabi_dsub> 80128ec: 2200 movs r2, #0 80128ee: 2300 movs r3, #0 80128f0: 4682 mov sl, r0 80128f2: 468b mov fp, r1 80128f4: f7ee f8f8 bl 8000ae8 <__aeabi_dcmpeq> 80128f8: 2800 cmp r0, #0 80128fa: d0c1 beq.n 8012880 <_strtod_l+0x8b8> 80128fc: e61a b.n 8012534 <_strtod_l+0x56c> 80128fe: 4641 mov r1, r8 8012900: 4620 mov r0, r4 8012902: f7ff facd bl 8011ea0 <__ratio> 8012906: ec57 6b10 vmov r6, r7, d0 801290a: 2200 movs r2, #0 801290c: f04f 4380 mov.w r3, #1073741824 @ 0x40000000 8012910: 4630 mov r0, r6 8012912: 4639 mov r1, r7 8012914: f7ee f8fc bl 8000b10 <__aeabi_dcmple> 8012918: 2800 cmp r0, #0 801291a: d06f beq.n 80129fc <_strtod_l+0xa34> 801291c: 9b0f ldr r3, [sp, #60] @ 0x3c 801291e: 2b00 cmp r3, #0 8012920: d17a bne.n 8012a18 <_strtod_l+0xa50> 8012922: f1ba 0f00 cmp.w sl, #0 8012926: d158 bne.n 80129da <_strtod_l+0xa12> 8012928: 9b0a ldr r3, [sp, #40] @ 0x28 801292a: f3c3 0313 ubfx r3, r3, #0, #20 801292e: 2b00 cmp r3, #0 8012930: d15a bne.n 80129e8 <_strtod_l+0xa20> 8012932: 4b64 ldr r3, [pc, #400] @ (8012ac4 <_strtod_l+0xafc>) 8012934: 2200 movs r2, #0 8012936: 4630 mov r0, r6 8012938: 4639 mov r1, r7 801293a: f7ee f8df bl 8000afc <__aeabi_dcmplt> 801293e: 2800 cmp r0, #0 8012940: d159 bne.n 80129f6 <_strtod_l+0xa2e> 8012942: 4630 mov r0, r6 8012944: 4639 mov r1, r7 8012946: 4b60 ldr r3, [pc, #384] @ (8012ac8 <_strtod_l+0xb00>) 8012948: 2200 movs r2, #0 801294a: f7ed fe65 bl 8000618 <__aeabi_dmul> 801294e: 4606 mov r6, r0 8012950: 460f mov r7, r1 8012952: f107 4300 add.w r3, r7, #2147483648 @ 0x80000000 8012956: 9606 str r6, [sp, #24] 8012958: 9307 str r3, [sp, #28] 801295a: e9dd 2306 ldrd r2, r3, [sp, #24] 801295e: 4d57 ldr r5, [pc, #348] @ (8012abc <_strtod_l+0xaf4>) 8012960: e9cd 2310 strd r2, r3, [sp, #64] @ 0x40 8012964: 9b0a ldr r3, [sp, #40] @ 0x28 8012966: 401d ands r5, r3 8012968: 4b58 ldr r3, [pc, #352] @ (8012acc <_strtod_l+0xb04>) 801296a: 429d cmp r5, r3 801296c: f040 80b2 bne.w 8012ad4 <_strtod_l+0xb0c> 8012970: 9b0a ldr r3, [sp, #40] @ 0x28 8012972: f1a3 7b54 sub.w fp, r3, #55574528 @ 0x3500000 8012976: ec4b ab10 vmov d0, sl, fp 801297a: f7ff f9c9 bl 8011d10 <__ulp> 801297e: e9dd 2306 ldrd r2, r3, [sp, #24] 8012982: ec51 0b10 vmov r0, r1, d0 8012986: f7ed fe47 bl 8000618 <__aeabi_dmul> 801298a: 4652 mov r2, sl 801298c: 465b mov r3, fp 801298e: f7ed fc8d bl 80002ac <__adddf3> 8012992: 460b mov r3, r1 8012994: 4949 ldr r1, [pc, #292] @ (8012abc <_strtod_l+0xaf4>) 8012996: 4a4e ldr r2, [pc, #312] @ (8012ad0 <_strtod_l+0xb08>) 8012998: 4019 ands r1, r3 801299a: 4291 cmp r1, r2 801299c: 4682 mov sl, r0 801299e: d942 bls.n 8012a26 <_strtod_l+0xa5e> 80129a0: 9a0d ldr r2, [sp, #52] @ 0x34 80129a2: 4b47 ldr r3, [pc, #284] @ (8012ac0 <_strtod_l+0xaf8>) 80129a4: 429a cmp r2, r3 80129a6: d103 bne.n 80129b0 <_strtod_l+0x9e8> 80129a8: 9b0c ldr r3, [sp, #48] @ 0x30 80129aa: 3301 adds r3, #1 80129ac: f43f ad2f beq.w 801240e <_strtod_l+0x446> 80129b0: f8df b10c ldr.w fp, [pc, #268] @ 8012ac0 <_strtod_l+0xaf8> 80129b4: f04f 3aff mov.w sl, #4294967295 @ 0xffffffff 80129b8: 991a ldr r1, [sp, #104] @ 0x68 80129ba: 9805 ldr r0, [sp, #20] 80129bc: f7fe fe7c bl 80116b8 <_Bfree> 80129c0: 9805 ldr r0, [sp, #20] 80129c2: 4649 mov r1, r9 80129c4: f7fe fe78 bl 80116b8 <_Bfree> 80129c8: 9805 ldr r0, [sp, #20] 80129ca: 4641 mov r1, r8 80129cc: f7fe fe74 bl 80116b8 <_Bfree> 80129d0: 9805 ldr r0, [sp, #20] 80129d2: 4621 mov r1, r4 80129d4: f7fe fe70 bl 80116b8 <_Bfree> 80129d8: e619 b.n 801260e <_strtod_l+0x646> 80129da: f1ba 0f01 cmp.w sl, #1 80129de: d103 bne.n 80129e8 <_strtod_l+0xa20> 80129e0: 9b0a ldr r3, [sp, #40] @ 0x28 80129e2: 2b00 cmp r3, #0 80129e4: f43f ada6 beq.w 8012534 <_strtod_l+0x56c> 80129e8: ed9f 7b2b vldr d7, [pc, #172] @ 8012a98 <_strtod_l+0xad0> 80129ec: 4f35 ldr r7, [pc, #212] @ (8012ac4 <_strtod_l+0xafc>) 80129ee: ed8d 7b06 vstr d7, [sp, #24] 80129f2: 2600 movs r6, #0 80129f4: e7b1 b.n 801295a <_strtod_l+0x992> 80129f6: 4f34 ldr r7, [pc, #208] @ (8012ac8 <_strtod_l+0xb00>) 80129f8: 2600 movs r6, #0 80129fa: e7aa b.n 8012952 <_strtod_l+0x98a> 80129fc: 4b32 ldr r3, [pc, #200] @ (8012ac8 <_strtod_l+0xb00>) 80129fe: 4630 mov r0, r6 8012a00: 4639 mov r1, r7 8012a02: 2200 movs r2, #0 8012a04: f7ed fe08 bl 8000618 <__aeabi_dmul> 8012a08: 9b0f ldr r3, [sp, #60] @ 0x3c 8012a0a: 4606 mov r6, r0 8012a0c: 460f mov r7, r1 8012a0e: 2b00 cmp r3, #0 8012a10: d09f beq.n 8012952 <_strtod_l+0x98a> 8012a12: e9cd 6706 strd r6, r7, [sp, #24] 8012a16: e7a0 b.n 801295a <_strtod_l+0x992> 8012a18: ed9f 7b21 vldr d7, [pc, #132] @ 8012aa0 <_strtod_l+0xad8> 8012a1c: ed8d 7b06 vstr d7, [sp, #24] 8012a20: ec57 6b17 vmov r6, r7, d7 8012a24: e799 b.n 801295a <_strtod_l+0x992> 8012a26: f103 7b54 add.w fp, r3, #55574528 @ 0x3500000 8012a2a: 9b08 ldr r3, [sp, #32] 8012a2c: f8cd b028 str.w fp, [sp, #40] @ 0x28 8012a30: 2b00 cmp r3, #0 8012a32: d1c1 bne.n 80129b8 <_strtod_l+0x9f0> 8012a34: f02b 4300 bic.w r3, fp, #2147483648 @ 0x80000000 8012a38: 0d1b lsrs r3, r3, #20 8012a3a: 051b lsls r3, r3, #20 8012a3c: 429d cmp r5, r3 8012a3e: d1bb bne.n 80129b8 <_strtod_l+0x9f0> 8012a40: 4630 mov r0, r6 8012a42: 4639 mov r1, r7 8012a44: f7ee f948 bl 8000cd8 <__aeabi_d2lz> 8012a48: f7ed fdb8 bl 80005bc <__aeabi_l2d> 8012a4c: 4602 mov r2, r0 8012a4e: 460b mov r3, r1 8012a50: 4630 mov r0, r6 8012a52: 4639 mov r1, r7 8012a54: f7ed fc28 bl 80002a8 <__aeabi_dsub> 8012a58: 460b mov r3, r1 8012a5a: 4602 mov r2, r0 8012a5c: e9cd 230c strd r2, r3, [sp, #48] @ 0x30 8012a60: f3cb 0613 ubfx r6, fp, #0, #20 8012a64: 9b0f ldr r3, [sp, #60] @ 0x3c 8012a66: ea46 060a orr.w r6, r6, sl 8012a6a: 431e orrs r6, r3 8012a6c: d06f beq.n 8012b4e <_strtod_l+0xb86> 8012a6e: a30e add r3, pc, #56 @ (adr r3, 8012aa8 <_strtod_l+0xae0>) 8012a70: e9d3 2300 ldrd r2, r3, [r3] 8012a74: f7ee f842 bl 8000afc <__aeabi_dcmplt> 8012a78: 2800 cmp r0, #0 8012a7a: f47f acd3 bne.w 8012424 <_strtod_l+0x45c> 8012a7e: a30c add r3, pc, #48 @ (adr r3, 8012ab0 <_strtod_l+0xae8>) 8012a80: e9d3 2300 ldrd r2, r3, [r3] 8012a84: e9dd 010c ldrd r0, r1, [sp, #48] @ 0x30 8012a88: f7ee f856 bl 8000b38 <__aeabi_dcmpgt> 8012a8c: 2800 cmp r0, #0 8012a8e: d093 beq.n 80129b8 <_strtod_l+0x9f0> 8012a90: e4c8 b.n 8012424 <_strtod_l+0x45c> 8012a92: bf00 nop 8012a94: f3af 8000 nop.w 8012a98: 00000000 .word 0x00000000 8012a9c: bff00000 .word 0xbff00000 8012aa0: 00000000 .word 0x00000000 8012aa4: 3ff00000 .word 0x3ff00000 8012aa8: 94a03595 .word 0x94a03595 8012aac: 3fdfffff .word 0x3fdfffff 8012ab0: 35afe535 .word 0x35afe535 8012ab4: 3fe00000 .word 0x3fe00000 8012ab8: 000fffff .word 0x000fffff 8012abc: 7ff00000 .word 0x7ff00000 8012ac0: 7fefffff .word 0x7fefffff 8012ac4: 3ff00000 .word 0x3ff00000 8012ac8: 3fe00000 .word 0x3fe00000 8012acc: 7fe00000 .word 0x7fe00000 8012ad0: 7c9fffff .word 0x7c9fffff 8012ad4: 9b08 ldr r3, [sp, #32] 8012ad6: b323 cbz r3, 8012b22 <_strtod_l+0xb5a> 8012ad8: f1b5 6fd4 cmp.w r5, #111149056 @ 0x6a00000 8012adc: d821 bhi.n 8012b22 <_strtod_l+0xb5a> 8012ade: a328 add r3, pc, #160 @ (adr r3, 8012b80 <_strtod_l+0xbb8>) 8012ae0: e9d3 2300 ldrd r2, r3, [r3] 8012ae4: 4630 mov r0, r6 8012ae6: 4639 mov r1, r7 8012ae8: f7ee f812 bl 8000b10 <__aeabi_dcmple> 8012aec: b1a0 cbz r0, 8012b18 <_strtod_l+0xb50> 8012aee: 4639 mov r1, r7 8012af0: 4630 mov r0, r6 8012af2: f7ee f869 bl 8000bc8 <__aeabi_d2uiz> 8012af6: 2801 cmp r0, #1 8012af8: bf38 it cc 8012afa: 2001 movcc r0, #1 8012afc: f7ed fd12 bl 8000524 <__aeabi_ui2d> 8012b00: 9b0f ldr r3, [sp, #60] @ 0x3c 8012b02: 4606 mov r6, r0 8012b04: 460f mov r7, r1 8012b06: b9fb cbnz r3, 8012b48 <_strtod_l+0xb80> 8012b08: f101 4300 add.w r3, r1, #2147483648 @ 0x80000000 8012b0c: 9014 str r0, [sp, #80] @ 0x50 8012b0e: 9315 str r3, [sp, #84] @ 0x54 8012b10: e9dd 2314 ldrd r2, r3, [sp, #80] @ 0x50 8012b14: e9cd 2310 strd r2, r3, [sp, #64] @ 0x40 8012b18: 9b11 ldr r3, [sp, #68] @ 0x44 8012b1a: f103 63d6 add.w r3, r3, #112197632 @ 0x6b00000 8012b1e: 1b5b subs r3, r3, r5 8012b20: 9311 str r3, [sp, #68] @ 0x44 8012b22: ed9d 0b0c vldr d0, [sp, #48] @ 0x30 8012b26: e9dd ab10 ldrd sl, fp, [sp, #64] @ 0x40 8012b2a: f7ff f8f1 bl 8011d10 <__ulp> 8012b2e: 4650 mov r0, sl 8012b30: ec53 2b10 vmov r2, r3, d0 8012b34: 4659 mov r1, fp 8012b36: f7ed fd6f bl 8000618 <__aeabi_dmul> 8012b3a: e9dd 230c ldrd r2, r3, [sp, #48] @ 0x30 8012b3e: f7ed fbb5 bl 80002ac <__adddf3> 8012b42: 4682 mov sl, r0 8012b44: 468b mov fp, r1 8012b46: e770 b.n 8012a2a <_strtod_l+0xa62> 8012b48: e9cd 6714 strd r6, r7, [sp, #80] @ 0x50 8012b4c: e7e0 b.n 8012b10 <_strtod_l+0xb48> 8012b4e: a30e add r3, pc, #56 @ (adr r3, 8012b88 <_strtod_l+0xbc0>) 8012b50: e9d3 2300 ldrd r2, r3, [r3] 8012b54: f7ed ffd2 bl 8000afc <__aeabi_dcmplt> 8012b58: e798 b.n 8012a8c <_strtod_l+0xac4> 8012b5a: 2300 movs r3, #0 8012b5c: 930e str r3, [sp, #56] @ 0x38 8012b5e: 9a17 ldr r2, [sp, #92] @ 0x5c 8012b60: 9b19 ldr r3, [sp, #100] @ 0x64 8012b62: 6013 str r3, [r2, #0] 8012b64: f7ff ba6d b.w 8012042 <_strtod_l+0x7a> 8012b68: 2a65 cmp r2, #101 @ 0x65 8012b6a: f43f ab68 beq.w 801223e <_strtod_l+0x276> 8012b6e: 2a45 cmp r2, #69 @ 0x45 8012b70: f43f ab65 beq.w 801223e <_strtod_l+0x276> 8012b74: 2301 movs r3, #1 8012b76: f7ff bba0 b.w 80122ba <_strtod_l+0x2f2> 8012b7a: bf00 nop 8012b7c: f3af 8000 nop.w 8012b80: ffc00000 .word 0xffc00000 8012b84: 41dfffff .word 0x41dfffff 8012b88: 94a03595 .word 0x94a03595 8012b8c: 3fcfffff .word 0x3fcfffff 08012b90 <_strtod_r>: 8012b90: 4b01 ldr r3, [pc, #4] @ (8012b98 <_strtod_r+0x8>) 8012b92: f7ff ba19 b.w 8011fc8 <_strtod_l> 8012b96: bf00 nop 8012b98: 20000130 .word 0x20000130 08012b9c <_strtol_l.isra.0>: 8012b9c: 2b24 cmp r3, #36 @ 0x24 8012b9e: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} 8012ba2: 4686 mov lr, r0 8012ba4: 4690 mov r8, r2 8012ba6: d801 bhi.n 8012bac <_strtol_l.isra.0+0x10> 8012ba8: 2b01 cmp r3, #1 8012baa: d106 bne.n 8012bba <_strtol_l.isra.0+0x1e> 8012bac: f7fd fd8a bl 80106c4 <__errno> 8012bb0: 2316 movs r3, #22 8012bb2: 6003 str r3, [r0, #0] 8012bb4: 2000 movs r0, #0 8012bb6: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 8012bba: 4834 ldr r0, [pc, #208] @ (8012c8c <_strtol_l.isra.0+0xf0>) 8012bbc: 460d mov r5, r1 8012bbe: 462a mov r2, r5 8012bc0: f815 4b01 ldrb.w r4, [r5], #1 8012bc4: 5d06 ldrb r6, [r0, r4] 8012bc6: f016 0608 ands.w r6, r6, #8 8012bca: d1f8 bne.n 8012bbe <_strtol_l.isra.0+0x22> 8012bcc: 2c2d cmp r4, #45 @ 0x2d 8012bce: d110 bne.n 8012bf2 <_strtol_l.isra.0+0x56> 8012bd0: 782c ldrb r4, [r5, #0] 8012bd2: 2601 movs r6, #1 8012bd4: 1c95 adds r5, r2, #2 8012bd6: f033 0210 bics.w r2, r3, #16 8012bda: d115 bne.n 8012c08 <_strtol_l.isra.0+0x6c> 8012bdc: 2c30 cmp r4, #48 @ 0x30 8012bde: d10d bne.n 8012bfc <_strtol_l.isra.0+0x60> 8012be0: 782a ldrb r2, [r5, #0] 8012be2: f002 02df and.w r2, r2, #223 @ 0xdf 8012be6: 2a58 cmp r2, #88 @ 0x58 8012be8: d108 bne.n 8012bfc <_strtol_l.isra.0+0x60> 8012bea: 786c ldrb r4, [r5, #1] 8012bec: 3502 adds r5, #2 8012bee: 2310 movs r3, #16 8012bf0: e00a b.n 8012c08 <_strtol_l.isra.0+0x6c> 8012bf2: 2c2b cmp r4, #43 @ 0x2b 8012bf4: bf04 itt eq 8012bf6: 782c ldrbeq r4, [r5, #0] 8012bf8: 1c95 addeq r5, r2, #2 8012bfa: e7ec b.n 8012bd6 <_strtol_l.isra.0+0x3a> 8012bfc: 2b00 cmp r3, #0 8012bfe: d1f6 bne.n 8012bee <_strtol_l.isra.0+0x52> 8012c00: 2c30 cmp r4, #48 @ 0x30 8012c02: bf14 ite ne 8012c04: 230a movne r3, #10 8012c06: 2308 moveq r3, #8 8012c08: f106 4c00 add.w ip, r6, #2147483648 @ 0x80000000 8012c0c: f10c 3cff add.w ip, ip, #4294967295 @ 0xffffffff 8012c10: 2200 movs r2, #0 8012c12: fbbc f9f3 udiv r9, ip, r3 8012c16: 4610 mov r0, r2 8012c18: fb03 ca19 mls sl, r3, r9, ip 8012c1c: f1a4 0730 sub.w r7, r4, #48 @ 0x30 8012c20: 2f09 cmp r7, #9 8012c22: d80f bhi.n 8012c44 <_strtol_l.isra.0+0xa8> 8012c24: 463c mov r4, r7 8012c26: 42a3 cmp r3, r4 8012c28: dd1b ble.n 8012c62 <_strtol_l.isra.0+0xc6> 8012c2a: 1c57 adds r7, r2, #1 8012c2c: d007 beq.n 8012c3e <_strtol_l.isra.0+0xa2> 8012c2e: 4581 cmp r9, r0 8012c30: d314 bcc.n 8012c5c <_strtol_l.isra.0+0xc0> 8012c32: d101 bne.n 8012c38 <_strtol_l.isra.0+0x9c> 8012c34: 45a2 cmp sl, r4 8012c36: db11 blt.n 8012c5c <_strtol_l.isra.0+0xc0> 8012c38: fb00 4003 mla r0, r0, r3, r4 8012c3c: 2201 movs r2, #1 8012c3e: f815 4b01 ldrb.w r4, [r5], #1 8012c42: e7eb b.n 8012c1c <_strtol_l.isra.0+0x80> 8012c44: f1a4 0741 sub.w r7, r4, #65 @ 0x41 8012c48: 2f19 cmp r7, #25 8012c4a: d801 bhi.n 8012c50 <_strtol_l.isra.0+0xb4> 8012c4c: 3c37 subs r4, #55 @ 0x37 8012c4e: e7ea b.n 8012c26 <_strtol_l.isra.0+0x8a> 8012c50: f1a4 0761 sub.w r7, r4, #97 @ 0x61 8012c54: 2f19 cmp r7, #25 8012c56: d804 bhi.n 8012c62 <_strtol_l.isra.0+0xc6> 8012c58: 3c57 subs r4, #87 @ 0x57 8012c5a: e7e4 b.n 8012c26 <_strtol_l.isra.0+0x8a> 8012c5c: f04f 32ff mov.w r2, #4294967295 @ 0xffffffff 8012c60: e7ed b.n 8012c3e <_strtol_l.isra.0+0xa2> 8012c62: 1c53 adds r3, r2, #1 8012c64: d108 bne.n 8012c78 <_strtol_l.isra.0+0xdc> 8012c66: 2322 movs r3, #34 @ 0x22 8012c68: f8ce 3000 str.w r3, [lr] 8012c6c: 4660 mov r0, ip 8012c6e: f1b8 0f00 cmp.w r8, #0 8012c72: d0a0 beq.n 8012bb6 <_strtol_l.isra.0+0x1a> 8012c74: 1e69 subs r1, r5, #1 8012c76: e006 b.n 8012c86 <_strtol_l.isra.0+0xea> 8012c78: b106 cbz r6, 8012c7c <_strtol_l.isra.0+0xe0> 8012c7a: 4240 negs r0, r0 8012c7c: f1b8 0f00 cmp.w r8, #0 8012c80: d099 beq.n 8012bb6 <_strtol_l.isra.0+0x1a> 8012c82: 2a00 cmp r2, #0 8012c84: d1f6 bne.n 8012c74 <_strtol_l.isra.0+0xd8> 8012c86: f8c8 1000 str.w r1, [r8] 8012c8a: e794 b.n 8012bb6 <_strtol_l.isra.0+0x1a> 8012c8c: 080152a1 .word 0x080152a1 08012c90 <_strtol_r>: 8012c90: f7ff bf84 b.w 8012b9c <_strtol_l.isra.0> 08012c94 <__ssputs_r>: 8012c94: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} 8012c98: 688e ldr r6, [r1, #8] 8012c9a: 461f mov r7, r3 8012c9c: 42be cmp r6, r7 8012c9e: 680b ldr r3, [r1, #0] 8012ca0: 4682 mov sl, r0 8012ca2: 460c mov r4, r1 8012ca4: 4690 mov r8, r2 8012ca6: d82d bhi.n 8012d04 <__ssputs_r+0x70> 8012ca8: f9b1 200c ldrsh.w r2, [r1, #12] 8012cac: f412 6f90 tst.w r2, #1152 @ 0x480 8012cb0: d026 beq.n 8012d00 <__ssputs_r+0x6c> 8012cb2: 6965 ldr r5, [r4, #20] 8012cb4: 6909 ldr r1, [r1, #16] 8012cb6: eb05 0545 add.w r5, r5, r5, lsl #1 8012cba: eba3 0901 sub.w r9, r3, r1 8012cbe: eb05 75d5 add.w r5, r5, r5, lsr #31 8012cc2: 1c7b adds r3, r7, #1 8012cc4: 444b add r3, r9 8012cc6: 106d asrs r5, r5, #1 8012cc8: 429d cmp r5, r3 8012cca: bf38 it cc 8012ccc: 461d movcc r5, r3 8012cce: 0553 lsls r3, r2, #21 8012cd0: d527 bpl.n 8012d22 <__ssputs_r+0x8e> 8012cd2: 4629 mov r1, r5 8012cd4: f7fe fc24 bl 8011520 <_malloc_r> 8012cd8: 4606 mov r6, r0 8012cda: b360 cbz r0, 8012d36 <__ssputs_r+0xa2> 8012cdc: 6921 ldr r1, [r4, #16] 8012cde: 464a mov r2, r9 8012ce0: f7fd fd1d bl 801071e 8012ce4: 89a3 ldrh r3, [r4, #12] 8012ce6: f423 6390 bic.w r3, r3, #1152 @ 0x480 8012cea: f043 0380 orr.w r3, r3, #128 @ 0x80 8012cee: 81a3 strh r3, [r4, #12] 8012cf0: 6126 str r6, [r4, #16] 8012cf2: 6165 str r5, [r4, #20] 8012cf4: 444e add r6, r9 8012cf6: eba5 0509 sub.w r5, r5, r9 8012cfa: 6026 str r6, [r4, #0] 8012cfc: 60a5 str r5, [r4, #8] 8012cfe: 463e mov r6, r7 8012d00: 42be cmp r6, r7 8012d02: d900 bls.n 8012d06 <__ssputs_r+0x72> 8012d04: 463e mov r6, r7 8012d06: 6820 ldr r0, [r4, #0] 8012d08: 4632 mov r2, r6 8012d0a: 4641 mov r1, r8 8012d0c: f000 ff0d bl 8013b2a 8012d10: 68a3 ldr r3, [r4, #8] 8012d12: 1b9b subs r3, r3, r6 8012d14: 60a3 str r3, [r4, #8] 8012d16: 6823 ldr r3, [r4, #0] 8012d18: 4433 add r3, r6 8012d1a: 6023 str r3, [r4, #0] 8012d1c: 2000 movs r0, #0 8012d1e: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 8012d22: 462a mov r2, r5 8012d24: f001 fabd bl 80142a2 <_realloc_r> 8012d28: 4606 mov r6, r0 8012d2a: 2800 cmp r0, #0 8012d2c: d1e0 bne.n 8012cf0 <__ssputs_r+0x5c> 8012d2e: 6921 ldr r1, [r4, #16] 8012d30: 4650 mov r0, sl 8012d32: f7fe fb81 bl 8011438 <_free_r> 8012d36: 230c movs r3, #12 8012d38: f8ca 3000 str.w r3, [sl] 8012d3c: 89a3 ldrh r3, [r4, #12] 8012d3e: f043 0340 orr.w r3, r3, #64 @ 0x40 8012d42: 81a3 strh r3, [r4, #12] 8012d44: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff 8012d48: e7e9 b.n 8012d1e <__ssputs_r+0x8a> ... 08012d4c <_svfiprintf_r>: 8012d4c: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 8012d50: 4698 mov r8, r3 8012d52: 898b ldrh r3, [r1, #12] 8012d54: 061b lsls r3, r3, #24 8012d56: b09d sub sp, #116 @ 0x74 8012d58: 4607 mov r7, r0 8012d5a: 460d mov r5, r1 8012d5c: 4614 mov r4, r2 8012d5e: d510 bpl.n 8012d82 <_svfiprintf_r+0x36> 8012d60: 690b ldr r3, [r1, #16] 8012d62: b973 cbnz r3, 8012d82 <_svfiprintf_r+0x36> 8012d64: 2140 movs r1, #64 @ 0x40 8012d66: f7fe fbdb bl 8011520 <_malloc_r> 8012d6a: 6028 str r0, [r5, #0] 8012d6c: 6128 str r0, [r5, #16] 8012d6e: b930 cbnz r0, 8012d7e <_svfiprintf_r+0x32> 8012d70: 230c movs r3, #12 8012d72: 603b str r3, [r7, #0] 8012d74: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff 8012d78: b01d add sp, #116 @ 0x74 8012d7a: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} 8012d7e: 2340 movs r3, #64 @ 0x40 8012d80: 616b str r3, [r5, #20] 8012d82: 2300 movs r3, #0 8012d84: 9309 str r3, [sp, #36] @ 0x24 8012d86: 2320 movs r3, #32 8012d88: f88d 3029 strb.w r3, [sp, #41] @ 0x29 8012d8c: f8cd 800c str.w r8, [sp, #12] 8012d90: 2330 movs r3, #48 @ 0x30 8012d92: f8df 819c ldr.w r8, [pc, #412] @ 8012f30 <_svfiprintf_r+0x1e4> 8012d96: f88d 302a strb.w r3, [sp, #42] @ 0x2a 8012d9a: f04f 0901 mov.w r9, #1 8012d9e: 4623 mov r3, r4 8012da0: 469a mov sl, r3 8012da2: f813 2b01 ldrb.w r2, [r3], #1 8012da6: b10a cbz r2, 8012dac <_svfiprintf_r+0x60> 8012da8: 2a25 cmp r2, #37 @ 0x25 8012daa: d1f9 bne.n 8012da0 <_svfiprintf_r+0x54> 8012dac: ebba 0b04 subs.w fp, sl, r4 8012db0: d00b beq.n 8012dca <_svfiprintf_r+0x7e> 8012db2: 465b mov r3, fp 8012db4: 4622 mov r2, r4 8012db6: 4629 mov r1, r5 8012db8: 4638 mov r0, r7 8012dba: f7ff ff6b bl 8012c94 <__ssputs_r> 8012dbe: 3001 adds r0, #1 8012dc0: f000 80a7 beq.w 8012f12 <_svfiprintf_r+0x1c6> 8012dc4: 9a09 ldr r2, [sp, #36] @ 0x24 8012dc6: 445a add r2, fp 8012dc8: 9209 str r2, [sp, #36] @ 0x24 8012dca: f89a 3000 ldrb.w r3, [sl] 8012dce: 2b00 cmp r3, #0 8012dd0: f000 809f beq.w 8012f12 <_svfiprintf_r+0x1c6> 8012dd4: 2300 movs r3, #0 8012dd6: f04f 32ff mov.w r2, #4294967295 @ 0xffffffff 8012dda: e9cd 2305 strd r2, r3, [sp, #20] 8012dde: f10a 0a01 add.w sl, sl, #1 8012de2: 9304 str r3, [sp, #16] 8012de4: 9307 str r3, [sp, #28] 8012de6: f88d 3053 strb.w r3, [sp, #83] @ 0x53 8012dea: 931a str r3, [sp, #104] @ 0x68 8012dec: 4654 mov r4, sl 8012dee: 2205 movs r2, #5 8012df0: f814 1b01 ldrb.w r1, [r4], #1 8012df4: 484e ldr r0, [pc, #312] @ (8012f30 <_svfiprintf_r+0x1e4>) 8012df6: f7ed f9fb bl 80001f0 8012dfa: 9a04 ldr r2, [sp, #16] 8012dfc: b9d8 cbnz r0, 8012e36 <_svfiprintf_r+0xea> 8012dfe: 06d0 lsls r0, r2, #27 8012e00: bf44 itt mi 8012e02: 2320 movmi r3, #32 8012e04: f88d 3053 strbmi.w r3, [sp, #83] @ 0x53 8012e08: 0711 lsls r1, r2, #28 8012e0a: bf44 itt mi 8012e0c: 232b movmi r3, #43 @ 0x2b 8012e0e: f88d 3053 strbmi.w r3, [sp, #83] @ 0x53 8012e12: f89a 3000 ldrb.w r3, [sl] 8012e16: 2b2a cmp r3, #42 @ 0x2a 8012e18: d015 beq.n 8012e46 <_svfiprintf_r+0xfa> 8012e1a: 9a07 ldr r2, [sp, #28] 8012e1c: 4654 mov r4, sl 8012e1e: 2000 movs r0, #0 8012e20: f04f 0c0a mov.w ip, #10 8012e24: 4621 mov r1, r4 8012e26: f811 3b01 ldrb.w r3, [r1], #1 8012e2a: 3b30 subs r3, #48 @ 0x30 8012e2c: 2b09 cmp r3, #9 8012e2e: d94b bls.n 8012ec8 <_svfiprintf_r+0x17c> 8012e30: b1b0 cbz r0, 8012e60 <_svfiprintf_r+0x114> 8012e32: 9207 str r2, [sp, #28] 8012e34: e014 b.n 8012e60 <_svfiprintf_r+0x114> 8012e36: eba0 0308 sub.w r3, r0, r8 8012e3a: fa09 f303 lsl.w r3, r9, r3 8012e3e: 4313 orrs r3, r2 8012e40: 9304 str r3, [sp, #16] 8012e42: 46a2 mov sl, r4 8012e44: e7d2 b.n 8012dec <_svfiprintf_r+0xa0> 8012e46: 9b03 ldr r3, [sp, #12] 8012e48: 1d19 adds r1, r3, #4 8012e4a: 681b ldr r3, [r3, #0] 8012e4c: 9103 str r1, [sp, #12] 8012e4e: 2b00 cmp r3, #0 8012e50: bfbb ittet lt 8012e52: 425b neglt r3, r3 8012e54: f042 0202 orrlt.w r2, r2, #2 8012e58: 9307 strge r3, [sp, #28] 8012e5a: 9307 strlt r3, [sp, #28] 8012e5c: bfb8 it lt 8012e5e: 9204 strlt r2, [sp, #16] 8012e60: 7823 ldrb r3, [r4, #0] 8012e62: 2b2e cmp r3, #46 @ 0x2e 8012e64: d10a bne.n 8012e7c <_svfiprintf_r+0x130> 8012e66: 7863 ldrb r3, [r4, #1] 8012e68: 2b2a cmp r3, #42 @ 0x2a 8012e6a: d132 bne.n 8012ed2 <_svfiprintf_r+0x186> 8012e6c: 9b03 ldr r3, [sp, #12] 8012e6e: 1d1a adds r2, r3, #4 8012e70: 681b ldr r3, [r3, #0] 8012e72: 9203 str r2, [sp, #12] 8012e74: ea43 73e3 orr.w r3, r3, r3, asr #31 8012e78: 3402 adds r4, #2 8012e7a: 9305 str r3, [sp, #20] 8012e7c: f8df a0c0 ldr.w sl, [pc, #192] @ 8012f40 <_svfiprintf_r+0x1f4> 8012e80: 7821 ldrb r1, [r4, #0] 8012e82: 2203 movs r2, #3 8012e84: 4650 mov r0, sl 8012e86: f7ed f9b3 bl 80001f0 8012e8a: b138 cbz r0, 8012e9c <_svfiprintf_r+0x150> 8012e8c: 9b04 ldr r3, [sp, #16] 8012e8e: eba0 000a sub.w r0, r0, sl 8012e92: 2240 movs r2, #64 @ 0x40 8012e94: 4082 lsls r2, r0 8012e96: 4313 orrs r3, r2 8012e98: 3401 adds r4, #1 8012e9a: 9304 str r3, [sp, #16] 8012e9c: f814 1b01 ldrb.w r1, [r4], #1 8012ea0: 4824 ldr r0, [pc, #144] @ (8012f34 <_svfiprintf_r+0x1e8>) 8012ea2: f88d 1028 strb.w r1, [sp, #40] @ 0x28 8012ea6: 2206 movs r2, #6 8012ea8: f7ed f9a2 bl 80001f0 8012eac: 2800 cmp r0, #0 8012eae: d036 beq.n 8012f1e <_svfiprintf_r+0x1d2> 8012eb0: 4b21 ldr r3, [pc, #132] @ (8012f38 <_svfiprintf_r+0x1ec>) 8012eb2: bb1b cbnz r3, 8012efc <_svfiprintf_r+0x1b0> 8012eb4: 9b03 ldr r3, [sp, #12] 8012eb6: 3307 adds r3, #7 8012eb8: f023 0307 bic.w r3, r3, #7 8012ebc: 3308 adds r3, #8 8012ebe: 9303 str r3, [sp, #12] 8012ec0: 9b09 ldr r3, [sp, #36] @ 0x24 8012ec2: 4433 add r3, r6 8012ec4: 9309 str r3, [sp, #36] @ 0x24 8012ec6: e76a b.n 8012d9e <_svfiprintf_r+0x52> 8012ec8: fb0c 3202 mla r2, ip, r2, r3 8012ecc: 460c mov r4, r1 8012ece: 2001 movs r0, #1 8012ed0: e7a8 b.n 8012e24 <_svfiprintf_r+0xd8> 8012ed2: 2300 movs r3, #0 8012ed4: 3401 adds r4, #1 8012ed6: 9305 str r3, [sp, #20] 8012ed8: 4619 mov r1, r3 8012eda: f04f 0c0a mov.w ip, #10 8012ede: 4620 mov r0, r4 8012ee0: f810 2b01 ldrb.w r2, [r0], #1 8012ee4: 3a30 subs r2, #48 @ 0x30 8012ee6: 2a09 cmp r2, #9 8012ee8: d903 bls.n 8012ef2 <_svfiprintf_r+0x1a6> 8012eea: 2b00 cmp r3, #0 8012eec: d0c6 beq.n 8012e7c <_svfiprintf_r+0x130> 8012eee: 9105 str r1, [sp, #20] 8012ef0: e7c4 b.n 8012e7c <_svfiprintf_r+0x130> 8012ef2: fb0c 2101 mla r1, ip, r1, r2 8012ef6: 4604 mov r4, r0 8012ef8: 2301 movs r3, #1 8012efa: e7f0 b.n 8012ede <_svfiprintf_r+0x192> 8012efc: ab03 add r3, sp, #12 8012efe: 9300 str r3, [sp, #0] 8012f00: 462a mov r2, r5 8012f02: 4b0e ldr r3, [pc, #56] @ (8012f3c <_svfiprintf_r+0x1f0>) 8012f04: a904 add r1, sp, #16 8012f06: 4638 mov r0, r7 8012f08: f7fc fa8e bl 800f428 <_printf_float> 8012f0c: 1c42 adds r2, r0, #1 8012f0e: 4606 mov r6, r0 8012f10: d1d6 bne.n 8012ec0 <_svfiprintf_r+0x174> 8012f12: 89ab ldrh r3, [r5, #12] 8012f14: 065b lsls r3, r3, #25 8012f16: f53f af2d bmi.w 8012d74 <_svfiprintf_r+0x28> 8012f1a: 9809 ldr r0, [sp, #36] @ 0x24 8012f1c: e72c b.n 8012d78 <_svfiprintf_r+0x2c> 8012f1e: ab03 add r3, sp, #12 8012f20: 9300 str r3, [sp, #0] 8012f22: 462a mov r2, r5 8012f24: 4b05 ldr r3, [pc, #20] @ (8012f3c <_svfiprintf_r+0x1f0>) 8012f26: a904 add r1, sp, #16 8012f28: 4638 mov r0, r7 8012f2a: f7fc fd15 bl 800f958 <_printf_i> 8012f2e: e7ed b.n 8012f0c <_svfiprintf_r+0x1c0> 8012f30: 080150b9 .word 0x080150b9 8012f34: 080150c3 .word 0x080150c3 8012f38: 0800f429 .word 0x0800f429 8012f3c: 08012c95 .word 0x08012c95 8012f40: 080150bf .word 0x080150bf 08012f44 <_sungetc_r>: 8012f44: b538 push {r3, r4, r5, lr} 8012f46: 1c4b adds r3, r1, #1 8012f48: 4614 mov r4, r2 8012f4a: d103 bne.n 8012f54 <_sungetc_r+0x10> 8012f4c: f04f 35ff mov.w r5, #4294967295 @ 0xffffffff 8012f50: 4628 mov r0, r5 8012f52: bd38 pop {r3, r4, r5, pc} 8012f54: 8993 ldrh r3, [r2, #12] 8012f56: f023 0320 bic.w r3, r3, #32 8012f5a: 8193 strh r3, [r2, #12] 8012f5c: 6b63 ldr r3, [r4, #52] @ 0x34 8012f5e: 6852 ldr r2, [r2, #4] 8012f60: b2cd uxtb r5, r1 8012f62: b18b cbz r3, 8012f88 <_sungetc_r+0x44> 8012f64: 6ba3 ldr r3, [r4, #56] @ 0x38 8012f66: 4293 cmp r3, r2 8012f68: dd08 ble.n 8012f7c <_sungetc_r+0x38> 8012f6a: 6823 ldr r3, [r4, #0] 8012f6c: 1e5a subs r2, r3, #1 8012f6e: 6022 str r2, [r4, #0] 8012f70: f803 5c01 strb.w r5, [r3, #-1] 8012f74: 6863 ldr r3, [r4, #4] 8012f76: 3301 adds r3, #1 8012f78: 6063 str r3, [r4, #4] 8012f7a: e7e9 b.n 8012f50 <_sungetc_r+0xc> 8012f7c: 4621 mov r1, r4 8012f7e: f000 fd9a bl 8013ab6 <__submore> 8012f82: 2800 cmp r0, #0 8012f84: d0f1 beq.n 8012f6a <_sungetc_r+0x26> 8012f86: e7e1 b.n 8012f4c <_sungetc_r+0x8> 8012f88: 6921 ldr r1, [r4, #16] 8012f8a: 6823 ldr r3, [r4, #0] 8012f8c: b151 cbz r1, 8012fa4 <_sungetc_r+0x60> 8012f8e: 4299 cmp r1, r3 8012f90: d208 bcs.n 8012fa4 <_sungetc_r+0x60> 8012f92: f813 1c01 ldrb.w r1, [r3, #-1] 8012f96: 42a9 cmp r1, r5 8012f98: d104 bne.n 8012fa4 <_sungetc_r+0x60> 8012f9a: 3b01 subs r3, #1 8012f9c: 3201 adds r2, #1 8012f9e: 6023 str r3, [r4, #0] 8012fa0: 6062 str r2, [r4, #4] 8012fa2: e7d5 b.n 8012f50 <_sungetc_r+0xc> 8012fa4: e9c4 320f strd r3, r2, [r4, #60] @ 0x3c 8012fa8: f104 0344 add.w r3, r4, #68 @ 0x44 8012fac: 6363 str r3, [r4, #52] @ 0x34 8012fae: 2303 movs r3, #3 8012fb0: 63a3 str r3, [r4, #56] @ 0x38 8012fb2: 4623 mov r3, r4 8012fb4: f803 5f46 strb.w r5, [r3, #70]! 8012fb8: 6023 str r3, [r4, #0] 8012fba: 2301 movs r3, #1 8012fbc: e7dc b.n 8012f78 <_sungetc_r+0x34> 08012fbe <__ssrefill_r>: 8012fbe: b510 push {r4, lr} 8012fc0: 460c mov r4, r1 8012fc2: 6b49 ldr r1, [r1, #52] @ 0x34 8012fc4: b169 cbz r1, 8012fe2 <__ssrefill_r+0x24> 8012fc6: f104 0344 add.w r3, r4, #68 @ 0x44 8012fca: 4299 cmp r1, r3 8012fcc: d001 beq.n 8012fd2 <__ssrefill_r+0x14> 8012fce: f7fe fa33 bl 8011438 <_free_r> 8012fd2: 6c23 ldr r3, [r4, #64] @ 0x40 8012fd4: 6063 str r3, [r4, #4] 8012fd6: 2000 movs r0, #0 8012fd8: 6360 str r0, [r4, #52] @ 0x34 8012fda: b113 cbz r3, 8012fe2 <__ssrefill_r+0x24> 8012fdc: 6be3 ldr r3, [r4, #60] @ 0x3c 8012fde: 6023 str r3, [r4, #0] 8012fe0: bd10 pop {r4, pc} 8012fe2: 6923 ldr r3, [r4, #16] 8012fe4: 6023 str r3, [r4, #0] 8012fe6: 2300 movs r3, #0 8012fe8: 6063 str r3, [r4, #4] 8012fea: 89a3 ldrh r3, [r4, #12] 8012fec: f043 0320 orr.w r3, r3, #32 8012ff0: 81a3 strh r3, [r4, #12] 8012ff2: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff 8012ff6: e7f3 b.n 8012fe0 <__ssrefill_r+0x22> 08012ff8 <__ssvfiscanf_r>: 8012ff8: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 8012ffc: 460c mov r4, r1 8012ffe: f5ad 7d23 sub.w sp, sp, #652 @ 0x28c 8013002: 2100 movs r1, #0 8013004: e9cd 1144 strd r1, r1, [sp, #272] @ 0x110 8013008: 49a6 ldr r1, [pc, #664] @ (80132a4 <__ssvfiscanf_r+0x2ac>) 801300a: 91a0 str r1, [sp, #640] @ 0x280 801300c: f10d 0804 add.w r8, sp, #4 8013010: 49a5 ldr r1, [pc, #660] @ (80132a8 <__ssvfiscanf_r+0x2b0>) 8013012: 4fa6 ldr r7, [pc, #664] @ (80132ac <__ssvfiscanf_r+0x2b4>) 8013014: f8cd 8118 str.w r8, [sp, #280] @ 0x118 8013018: 4606 mov r6, r0 801301a: 91a1 str r1, [sp, #644] @ 0x284 801301c: 9300 str r3, [sp, #0] 801301e: f892 9000 ldrb.w r9, [r2] 8013022: f1b9 0f00 cmp.w r9, #0 8013026: f000 8158 beq.w 80132da <__ssvfiscanf_r+0x2e2> 801302a: f817 3009 ldrb.w r3, [r7, r9] 801302e: f013 0308 ands.w r3, r3, #8 8013032: f102 0501 add.w r5, r2, #1 8013036: d019 beq.n 801306c <__ssvfiscanf_r+0x74> 8013038: 6863 ldr r3, [r4, #4] 801303a: 2b00 cmp r3, #0 801303c: dd0f ble.n 801305e <__ssvfiscanf_r+0x66> 801303e: 6823 ldr r3, [r4, #0] 8013040: 781a ldrb r2, [r3, #0] 8013042: 5cba ldrb r2, [r7, r2] 8013044: 0712 lsls r2, r2, #28 8013046: d401 bmi.n 801304c <__ssvfiscanf_r+0x54> 8013048: 462a mov r2, r5 801304a: e7e8 b.n 801301e <__ssvfiscanf_r+0x26> 801304c: 9a45 ldr r2, [sp, #276] @ 0x114 801304e: 3201 adds r2, #1 8013050: 9245 str r2, [sp, #276] @ 0x114 8013052: 6862 ldr r2, [r4, #4] 8013054: 3301 adds r3, #1 8013056: 3a01 subs r2, #1 8013058: 6062 str r2, [r4, #4] 801305a: 6023 str r3, [r4, #0] 801305c: e7ec b.n 8013038 <__ssvfiscanf_r+0x40> 801305e: 9ba1 ldr r3, [sp, #644] @ 0x284 8013060: 4621 mov r1, r4 8013062: 4630 mov r0, r6 8013064: 4798 blx r3 8013066: 2800 cmp r0, #0 8013068: d0e9 beq.n 801303e <__ssvfiscanf_r+0x46> 801306a: e7ed b.n 8013048 <__ssvfiscanf_r+0x50> 801306c: f1b9 0f25 cmp.w r9, #37 @ 0x25 8013070: f040 8085 bne.w 801317e <__ssvfiscanf_r+0x186> 8013074: 9341 str r3, [sp, #260] @ 0x104 8013076: 9343 str r3, [sp, #268] @ 0x10c 8013078: 7853 ldrb r3, [r2, #1] 801307a: 2b2a cmp r3, #42 @ 0x2a 801307c: bf02 ittt eq 801307e: 2310 moveq r3, #16 8013080: 1c95 addeq r5, r2, #2 8013082: 9341 streq r3, [sp, #260] @ 0x104 8013084: 220a movs r2, #10 8013086: 46aa mov sl, r5 8013088: f81a 1b01 ldrb.w r1, [sl], #1 801308c: f1a1 0330 sub.w r3, r1, #48 @ 0x30 8013090: 2b09 cmp r3, #9 8013092: d91e bls.n 80130d2 <__ssvfiscanf_r+0xda> 8013094: f8df b218 ldr.w fp, [pc, #536] @ 80132b0 <__ssvfiscanf_r+0x2b8> 8013098: 2203 movs r2, #3 801309a: 4658 mov r0, fp 801309c: f7ed f8a8 bl 80001f0 80130a0: b138 cbz r0, 80130b2 <__ssvfiscanf_r+0xba> 80130a2: 9a41 ldr r2, [sp, #260] @ 0x104 80130a4: eba0 000b sub.w r0, r0, fp 80130a8: 2301 movs r3, #1 80130aa: 4083 lsls r3, r0 80130ac: 4313 orrs r3, r2 80130ae: 9341 str r3, [sp, #260] @ 0x104 80130b0: 4655 mov r5, sl 80130b2: f815 3b01 ldrb.w r3, [r5], #1 80130b6: 2b78 cmp r3, #120 @ 0x78 80130b8: d806 bhi.n 80130c8 <__ssvfiscanf_r+0xd0> 80130ba: 2b57 cmp r3, #87 @ 0x57 80130bc: d810 bhi.n 80130e0 <__ssvfiscanf_r+0xe8> 80130be: 2b25 cmp r3, #37 @ 0x25 80130c0: d05d beq.n 801317e <__ssvfiscanf_r+0x186> 80130c2: d857 bhi.n 8013174 <__ssvfiscanf_r+0x17c> 80130c4: 2b00 cmp r3, #0 80130c6: d075 beq.n 80131b4 <__ssvfiscanf_r+0x1bc> 80130c8: 2303 movs r3, #3 80130ca: 9347 str r3, [sp, #284] @ 0x11c 80130cc: 230a movs r3, #10 80130ce: 9342 str r3, [sp, #264] @ 0x108 80130d0: e088 b.n 80131e4 <__ssvfiscanf_r+0x1ec> 80130d2: 9b43 ldr r3, [sp, #268] @ 0x10c 80130d4: fb02 1103 mla r1, r2, r3, r1 80130d8: 3930 subs r1, #48 @ 0x30 80130da: 9143 str r1, [sp, #268] @ 0x10c 80130dc: 4655 mov r5, sl 80130de: e7d2 b.n 8013086 <__ssvfiscanf_r+0x8e> 80130e0: f1a3 0258 sub.w r2, r3, #88 @ 0x58 80130e4: 2a20 cmp r2, #32 80130e6: d8ef bhi.n 80130c8 <__ssvfiscanf_r+0xd0> 80130e8: a101 add r1, pc, #4 @ (adr r1, 80130f0 <__ssvfiscanf_r+0xf8>) 80130ea: f851 f022 ldr.w pc, [r1, r2, lsl #2] 80130ee: bf00 nop 80130f0: 080131c3 .word 0x080131c3 80130f4: 080130c9 .word 0x080130c9 80130f8: 080130c9 .word 0x080130c9 80130fc: 0801321d .word 0x0801321d 8013100: 080130c9 .word 0x080130c9 8013104: 080130c9 .word 0x080130c9 8013108: 080130c9 .word 0x080130c9 801310c: 080130c9 .word 0x080130c9 8013110: 080130c9 .word 0x080130c9 8013114: 080130c9 .word 0x080130c9 8013118: 080130c9 .word 0x080130c9 801311c: 08013233 .word 0x08013233 8013120: 08013219 .word 0x08013219 8013124: 0801317b .word 0x0801317b 8013128: 0801317b .word 0x0801317b 801312c: 0801317b .word 0x0801317b 8013130: 080130c9 .word 0x080130c9 8013134: 080131d5 .word 0x080131d5 8013138: 080130c9 .word 0x080130c9 801313c: 080130c9 .word 0x080130c9 8013140: 080130c9 .word 0x080130c9 8013144: 080130c9 .word 0x080130c9 8013148: 08013243 .word 0x08013243 801314c: 080131dd .word 0x080131dd 8013150: 080131bb .word 0x080131bb 8013154: 080130c9 .word 0x080130c9 8013158: 080130c9 .word 0x080130c9 801315c: 0801323f .word 0x0801323f 8013160: 080130c9 .word 0x080130c9 8013164: 08013219 .word 0x08013219 8013168: 080130c9 .word 0x080130c9 801316c: 080130c9 .word 0x080130c9 8013170: 080131c3 .word 0x080131c3 8013174: 3b45 subs r3, #69 @ 0x45 8013176: 2b02 cmp r3, #2 8013178: d8a6 bhi.n 80130c8 <__ssvfiscanf_r+0xd0> 801317a: 2305 movs r3, #5 801317c: e031 b.n 80131e2 <__ssvfiscanf_r+0x1ea> 801317e: 6863 ldr r3, [r4, #4] 8013180: 2b00 cmp r3, #0 8013182: dd0d ble.n 80131a0 <__ssvfiscanf_r+0x1a8> 8013184: 6823 ldr r3, [r4, #0] 8013186: 781a ldrb r2, [r3, #0] 8013188: 454a cmp r2, r9 801318a: f040 80a6 bne.w 80132da <__ssvfiscanf_r+0x2e2> 801318e: 3301 adds r3, #1 8013190: 6862 ldr r2, [r4, #4] 8013192: 6023 str r3, [r4, #0] 8013194: 9b45 ldr r3, [sp, #276] @ 0x114 8013196: 3a01 subs r2, #1 8013198: 3301 adds r3, #1 801319a: 6062 str r2, [r4, #4] 801319c: 9345 str r3, [sp, #276] @ 0x114 801319e: e753 b.n 8013048 <__ssvfiscanf_r+0x50> 80131a0: 9ba1 ldr r3, [sp, #644] @ 0x284 80131a2: 4621 mov r1, r4 80131a4: 4630 mov r0, r6 80131a6: 4798 blx r3 80131a8: 2800 cmp r0, #0 80131aa: d0eb beq.n 8013184 <__ssvfiscanf_r+0x18c> 80131ac: 9844 ldr r0, [sp, #272] @ 0x110 80131ae: 2800 cmp r0, #0 80131b0: f040 808b bne.w 80132ca <__ssvfiscanf_r+0x2d2> 80131b4: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff 80131b8: e08b b.n 80132d2 <__ssvfiscanf_r+0x2da> 80131ba: 9a41 ldr r2, [sp, #260] @ 0x104 80131bc: f042 0220 orr.w r2, r2, #32 80131c0: 9241 str r2, [sp, #260] @ 0x104 80131c2: 9a41 ldr r2, [sp, #260] @ 0x104 80131c4: f442 7200 orr.w r2, r2, #512 @ 0x200 80131c8: 9241 str r2, [sp, #260] @ 0x104 80131ca: 2210 movs r2, #16 80131cc: 2b6e cmp r3, #110 @ 0x6e 80131ce: 9242 str r2, [sp, #264] @ 0x108 80131d0: d902 bls.n 80131d8 <__ssvfiscanf_r+0x1e0> 80131d2: e005 b.n 80131e0 <__ssvfiscanf_r+0x1e8> 80131d4: 2300 movs r3, #0 80131d6: 9342 str r3, [sp, #264] @ 0x108 80131d8: 2303 movs r3, #3 80131da: e002 b.n 80131e2 <__ssvfiscanf_r+0x1ea> 80131dc: 2308 movs r3, #8 80131de: 9342 str r3, [sp, #264] @ 0x108 80131e0: 2304 movs r3, #4 80131e2: 9347 str r3, [sp, #284] @ 0x11c 80131e4: 6863 ldr r3, [r4, #4] 80131e6: 2b00 cmp r3, #0 80131e8: dd39 ble.n 801325e <__ssvfiscanf_r+0x266> 80131ea: 9b41 ldr r3, [sp, #260] @ 0x104 80131ec: 0659 lsls r1, r3, #25 80131ee: d404 bmi.n 80131fa <__ssvfiscanf_r+0x202> 80131f0: 6823 ldr r3, [r4, #0] 80131f2: 781a ldrb r2, [r3, #0] 80131f4: 5cba ldrb r2, [r7, r2] 80131f6: 0712 lsls r2, r2, #28 80131f8: d438 bmi.n 801326c <__ssvfiscanf_r+0x274> 80131fa: 9b47 ldr r3, [sp, #284] @ 0x11c 80131fc: 2b02 cmp r3, #2 80131fe: dc47 bgt.n 8013290 <__ssvfiscanf_r+0x298> 8013200: 466b mov r3, sp 8013202: 4622 mov r2, r4 8013204: a941 add r1, sp, #260 @ 0x104 8013206: 4630 mov r0, r6 8013208: f000 f9ae bl 8013568 <_scanf_chars> 801320c: 2801 cmp r0, #1 801320e: d064 beq.n 80132da <__ssvfiscanf_r+0x2e2> 8013210: 2802 cmp r0, #2 8013212: f47f af19 bne.w 8013048 <__ssvfiscanf_r+0x50> 8013216: e7c9 b.n 80131ac <__ssvfiscanf_r+0x1b4> 8013218: 220a movs r2, #10 801321a: e7d7 b.n 80131cc <__ssvfiscanf_r+0x1d4> 801321c: 4629 mov r1, r5 801321e: 4640 mov r0, r8 8013220: f000 fc10 bl 8013a44 <__sccl> 8013224: 9b41 ldr r3, [sp, #260] @ 0x104 8013226: f043 0340 orr.w r3, r3, #64 @ 0x40 801322a: 9341 str r3, [sp, #260] @ 0x104 801322c: 4605 mov r5, r0 801322e: 2301 movs r3, #1 8013230: e7d7 b.n 80131e2 <__ssvfiscanf_r+0x1ea> 8013232: 9b41 ldr r3, [sp, #260] @ 0x104 8013234: f043 0340 orr.w r3, r3, #64 @ 0x40 8013238: 9341 str r3, [sp, #260] @ 0x104 801323a: 2300 movs r3, #0 801323c: e7d1 b.n 80131e2 <__ssvfiscanf_r+0x1ea> 801323e: 2302 movs r3, #2 8013240: e7cf b.n 80131e2 <__ssvfiscanf_r+0x1ea> 8013242: 9841 ldr r0, [sp, #260] @ 0x104 8013244: 06c3 lsls r3, r0, #27 8013246: f53f aeff bmi.w 8013048 <__ssvfiscanf_r+0x50> 801324a: 9b00 ldr r3, [sp, #0] 801324c: 9a45 ldr r2, [sp, #276] @ 0x114 801324e: 1d19 adds r1, r3, #4 8013250: 9100 str r1, [sp, #0] 8013252: 681b ldr r3, [r3, #0] 8013254: 07c0 lsls r0, r0, #31 8013256: bf4c ite mi 8013258: 801a strhmi r2, [r3, #0] 801325a: 601a strpl r2, [r3, #0] 801325c: e6f4 b.n 8013048 <__ssvfiscanf_r+0x50> 801325e: 9ba1 ldr r3, [sp, #644] @ 0x284 8013260: 4621 mov r1, r4 8013262: 4630 mov r0, r6 8013264: 4798 blx r3 8013266: 2800 cmp r0, #0 8013268: d0bf beq.n 80131ea <__ssvfiscanf_r+0x1f2> 801326a: e79f b.n 80131ac <__ssvfiscanf_r+0x1b4> 801326c: 9a45 ldr r2, [sp, #276] @ 0x114 801326e: 3201 adds r2, #1 8013270: 9245 str r2, [sp, #276] @ 0x114 8013272: 6862 ldr r2, [r4, #4] 8013274: 3a01 subs r2, #1 8013276: 2a00 cmp r2, #0 8013278: 6062 str r2, [r4, #4] 801327a: dd02 ble.n 8013282 <__ssvfiscanf_r+0x28a> 801327c: 3301 adds r3, #1 801327e: 6023 str r3, [r4, #0] 8013280: e7b6 b.n 80131f0 <__ssvfiscanf_r+0x1f8> 8013282: 9ba1 ldr r3, [sp, #644] @ 0x284 8013284: 4621 mov r1, r4 8013286: 4630 mov r0, r6 8013288: 4798 blx r3 801328a: 2800 cmp r0, #0 801328c: d0b0 beq.n 80131f0 <__ssvfiscanf_r+0x1f8> 801328e: e78d b.n 80131ac <__ssvfiscanf_r+0x1b4> 8013290: 2b04 cmp r3, #4 8013292: dc0f bgt.n 80132b4 <__ssvfiscanf_r+0x2bc> 8013294: 466b mov r3, sp 8013296: 4622 mov r2, r4 8013298: a941 add r1, sp, #260 @ 0x104 801329a: 4630 mov r0, r6 801329c: f000 f9be bl 801361c <_scanf_i> 80132a0: e7b4 b.n 801320c <__ssvfiscanf_r+0x214> 80132a2: bf00 nop 80132a4: 08012f45 .word 0x08012f45 80132a8: 08012fbf .word 0x08012fbf 80132ac: 080152a1 .word 0x080152a1 80132b0: 080150bf .word 0x080150bf 80132b4: 4b0a ldr r3, [pc, #40] @ (80132e0 <__ssvfiscanf_r+0x2e8>) 80132b6: 2b00 cmp r3, #0 80132b8: f43f aec6 beq.w 8013048 <__ssvfiscanf_r+0x50> 80132bc: 466b mov r3, sp 80132be: 4622 mov r2, r4 80132c0: a941 add r1, sp, #260 @ 0x104 80132c2: 4630 mov r0, r6 80132c4: f7fc fc66 bl 800fb94 <_scanf_float> 80132c8: e7a0 b.n 801320c <__ssvfiscanf_r+0x214> 80132ca: 89a3 ldrh r3, [r4, #12] 80132cc: 065b lsls r3, r3, #25 80132ce: f53f af71 bmi.w 80131b4 <__ssvfiscanf_r+0x1bc> 80132d2: f50d 7d23 add.w sp, sp, #652 @ 0x28c 80132d6: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} 80132da: 9844 ldr r0, [sp, #272] @ 0x110 80132dc: e7f9 b.n 80132d2 <__ssvfiscanf_r+0x2da> 80132de: bf00 nop 80132e0: 0800fb95 .word 0x0800fb95 080132e4 <__sfputc_r>: 80132e4: 6893 ldr r3, [r2, #8] 80132e6: 3b01 subs r3, #1 80132e8: 2b00 cmp r3, #0 80132ea: b410 push {r4} 80132ec: 6093 str r3, [r2, #8] 80132ee: da08 bge.n 8013302 <__sfputc_r+0x1e> 80132f0: 6994 ldr r4, [r2, #24] 80132f2: 42a3 cmp r3, r4 80132f4: db01 blt.n 80132fa <__sfputc_r+0x16> 80132f6: 290a cmp r1, #10 80132f8: d103 bne.n 8013302 <__sfputc_r+0x1e> 80132fa: f85d 4b04 ldr.w r4, [sp], #4 80132fe: f7fd b852 b.w 80103a6 <__swbuf_r> 8013302: 6813 ldr r3, [r2, #0] 8013304: 1c58 adds r0, r3, #1 8013306: 6010 str r0, [r2, #0] 8013308: 7019 strb r1, [r3, #0] 801330a: 4608 mov r0, r1 801330c: f85d 4b04 ldr.w r4, [sp], #4 8013310: 4770 bx lr 08013312 <__sfputs_r>: 8013312: b5f8 push {r3, r4, r5, r6, r7, lr} 8013314: 4606 mov r6, r0 8013316: 460f mov r7, r1 8013318: 4614 mov r4, r2 801331a: 18d5 adds r5, r2, r3 801331c: 42ac cmp r4, r5 801331e: d101 bne.n 8013324 <__sfputs_r+0x12> 8013320: 2000 movs r0, #0 8013322: e007 b.n 8013334 <__sfputs_r+0x22> 8013324: f814 1b01 ldrb.w r1, [r4], #1 8013328: 463a mov r2, r7 801332a: 4630 mov r0, r6 801332c: f7ff ffda bl 80132e4 <__sfputc_r> 8013330: 1c43 adds r3, r0, #1 8013332: d1f3 bne.n 801331c <__sfputs_r+0xa> 8013334: bdf8 pop {r3, r4, r5, r6, r7, pc} ... 08013338 <_vfiprintf_r>: 8013338: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 801333c: 460d mov r5, r1 801333e: b09d sub sp, #116 @ 0x74 8013340: 4614 mov r4, r2 8013342: 4698 mov r8, r3 8013344: 4606 mov r6, r0 8013346: b118 cbz r0, 8013350 <_vfiprintf_r+0x18> 8013348: 6a03 ldr r3, [r0, #32] 801334a: b90b cbnz r3, 8013350 <_vfiprintf_r+0x18> 801334c: f7fc febc bl 80100c8 <__sinit> 8013350: 6e6b ldr r3, [r5, #100] @ 0x64 8013352: 07d9 lsls r1, r3, #31 8013354: d405 bmi.n 8013362 <_vfiprintf_r+0x2a> 8013356: 89ab ldrh r3, [r5, #12] 8013358: 059a lsls r2, r3, #22 801335a: d402 bmi.n 8013362 <_vfiprintf_r+0x2a> 801335c: 6da8 ldr r0, [r5, #88] @ 0x58 801335e: f7fd f9dc bl 801071a <__retarget_lock_acquire_recursive> 8013362: 89ab ldrh r3, [r5, #12] 8013364: 071b lsls r3, r3, #28 8013366: d501 bpl.n 801336c <_vfiprintf_r+0x34> 8013368: 692b ldr r3, [r5, #16] 801336a: b99b cbnz r3, 8013394 <_vfiprintf_r+0x5c> 801336c: 4629 mov r1, r5 801336e: 4630 mov r0, r6 8013370: f7fd f858 bl 8010424 <__swsetup_r> 8013374: b170 cbz r0, 8013394 <_vfiprintf_r+0x5c> 8013376: 6e6b ldr r3, [r5, #100] @ 0x64 8013378: 07dc lsls r4, r3, #31 801337a: d504 bpl.n 8013386 <_vfiprintf_r+0x4e> 801337c: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff 8013380: b01d add sp, #116 @ 0x74 8013382: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} 8013386: 89ab ldrh r3, [r5, #12] 8013388: 0598 lsls r0, r3, #22 801338a: d4f7 bmi.n 801337c <_vfiprintf_r+0x44> 801338c: 6da8 ldr r0, [r5, #88] @ 0x58 801338e: f7fd f9c5 bl 801071c <__retarget_lock_release_recursive> 8013392: e7f3 b.n 801337c <_vfiprintf_r+0x44> 8013394: 2300 movs r3, #0 8013396: 9309 str r3, [sp, #36] @ 0x24 8013398: 2320 movs r3, #32 801339a: f88d 3029 strb.w r3, [sp, #41] @ 0x29 801339e: f8cd 800c str.w r8, [sp, #12] 80133a2: 2330 movs r3, #48 @ 0x30 80133a4: f8df 81ac ldr.w r8, [pc, #428] @ 8013554 <_vfiprintf_r+0x21c> 80133a8: f88d 302a strb.w r3, [sp, #42] @ 0x2a 80133ac: f04f 0901 mov.w r9, #1 80133b0: 4623 mov r3, r4 80133b2: 469a mov sl, r3 80133b4: f813 2b01 ldrb.w r2, [r3], #1 80133b8: b10a cbz r2, 80133be <_vfiprintf_r+0x86> 80133ba: 2a25 cmp r2, #37 @ 0x25 80133bc: d1f9 bne.n 80133b2 <_vfiprintf_r+0x7a> 80133be: ebba 0b04 subs.w fp, sl, r4 80133c2: d00b beq.n 80133dc <_vfiprintf_r+0xa4> 80133c4: 465b mov r3, fp 80133c6: 4622 mov r2, r4 80133c8: 4629 mov r1, r5 80133ca: 4630 mov r0, r6 80133cc: f7ff ffa1 bl 8013312 <__sfputs_r> 80133d0: 3001 adds r0, #1 80133d2: f000 80a7 beq.w 8013524 <_vfiprintf_r+0x1ec> 80133d6: 9a09 ldr r2, [sp, #36] @ 0x24 80133d8: 445a add r2, fp 80133da: 9209 str r2, [sp, #36] @ 0x24 80133dc: f89a 3000 ldrb.w r3, [sl] 80133e0: 2b00 cmp r3, #0 80133e2: f000 809f beq.w 8013524 <_vfiprintf_r+0x1ec> 80133e6: 2300 movs r3, #0 80133e8: f04f 32ff mov.w r2, #4294967295 @ 0xffffffff 80133ec: e9cd 2305 strd r2, r3, [sp, #20] 80133f0: f10a 0a01 add.w sl, sl, #1 80133f4: 9304 str r3, [sp, #16] 80133f6: 9307 str r3, [sp, #28] 80133f8: f88d 3053 strb.w r3, [sp, #83] @ 0x53 80133fc: 931a str r3, [sp, #104] @ 0x68 80133fe: 4654 mov r4, sl 8013400: 2205 movs r2, #5 8013402: f814 1b01 ldrb.w r1, [r4], #1 8013406: 4853 ldr r0, [pc, #332] @ (8013554 <_vfiprintf_r+0x21c>) 8013408: f7ec fef2 bl 80001f0 801340c: 9a04 ldr r2, [sp, #16] 801340e: b9d8 cbnz r0, 8013448 <_vfiprintf_r+0x110> 8013410: 06d1 lsls r1, r2, #27 8013412: bf44 itt mi 8013414: 2320 movmi r3, #32 8013416: f88d 3053 strbmi.w r3, [sp, #83] @ 0x53 801341a: 0713 lsls r3, r2, #28 801341c: bf44 itt mi 801341e: 232b movmi r3, #43 @ 0x2b 8013420: f88d 3053 strbmi.w r3, [sp, #83] @ 0x53 8013424: f89a 3000 ldrb.w r3, [sl] 8013428: 2b2a cmp r3, #42 @ 0x2a 801342a: d015 beq.n 8013458 <_vfiprintf_r+0x120> 801342c: 9a07 ldr r2, [sp, #28] 801342e: 4654 mov r4, sl 8013430: 2000 movs r0, #0 8013432: f04f 0c0a mov.w ip, #10 8013436: 4621 mov r1, r4 8013438: f811 3b01 ldrb.w r3, [r1], #1 801343c: 3b30 subs r3, #48 @ 0x30 801343e: 2b09 cmp r3, #9 8013440: d94b bls.n 80134da <_vfiprintf_r+0x1a2> 8013442: b1b0 cbz r0, 8013472 <_vfiprintf_r+0x13a> 8013444: 9207 str r2, [sp, #28] 8013446: e014 b.n 8013472 <_vfiprintf_r+0x13a> 8013448: eba0 0308 sub.w r3, r0, r8 801344c: fa09 f303 lsl.w r3, r9, r3 8013450: 4313 orrs r3, r2 8013452: 9304 str r3, [sp, #16] 8013454: 46a2 mov sl, r4 8013456: e7d2 b.n 80133fe <_vfiprintf_r+0xc6> 8013458: 9b03 ldr r3, [sp, #12] 801345a: 1d19 adds r1, r3, #4 801345c: 681b ldr r3, [r3, #0] 801345e: 9103 str r1, [sp, #12] 8013460: 2b00 cmp r3, #0 8013462: bfbb ittet lt 8013464: 425b neglt r3, r3 8013466: f042 0202 orrlt.w r2, r2, #2 801346a: 9307 strge r3, [sp, #28] 801346c: 9307 strlt r3, [sp, #28] 801346e: bfb8 it lt 8013470: 9204 strlt r2, [sp, #16] 8013472: 7823 ldrb r3, [r4, #0] 8013474: 2b2e cmp r3, #46 @ 0x2e 8013476: d10a bne.n 801348e <_vfiprintf_r+0x156> 8013478: 7863 ldrb r3, [r4, #1] 801347a: 2b2a cmp r3, #42 @ 0x2a 801347c: d132 bne.n 80134e4 <_vfiprintf_r+0x1ac> 801347e: 9b03 ldr r3, [sp, #12] 8013480: 1d1a adds r2, r3, #4 8013482: 681b ldr r3, [r3, #0] 8013484: 9203 str r2, [sp, #12] 8013486: ea43 73e3 orr.w r3, r3, r3, asr #31 801348a: 3402 adds r4, #2 801348c: 9305 str r3, [sp, #20] 801348e: f8df a0d4 ldr.w sl, [pc, #212] @ 8013564 <_vfiprintf_r+0x22c> 8013492: 7821 ldrb r1, [r4, #0] 8013494: 2203 movs r2, #3 8013496: 4650 mov r0, sl 8013498: f7ec feaa bl 80001f0 801349c: b138 cbz r0, 80134ae <_vfiprintf_r+0x176> 801349e: 9b04 ldr r3, [sp, #16] 80134a0: eba0 000a sub.w r0, r0, sl 80134a4: 2240 movs r2, #64 @ 0x40 80134a6: 4082 lsls r2, r0 80134a8: 4313 orrs r3, r2 80134aa: 3401 adds r4, #1 80134ac: 9304 str r3, [sp, #16] 80134ae: f814 1b01 ldrb.w r1, [r4], #1 80134b2: 4829 ldr r0, [pc, #164] @ (8013558 <_vfiprintf_r+0x220>) 80134b4: f88d 1028 strb.w r1, [sp, #40] @ 0x28 80134b8: 2206 movs r2, #6 80134ba: f7ec fe99 bl 80001f0 80134be: 2800 cmp r0, #0 80134c0: d03f beq.n 8013542 <_vfiprintf_r+0x20a> 80134c2: 4b26 ldr r3, [pc, #152] @ (801355c <_vfiprintf_r+0x224>) 80134c4: bb1b cbnz r3, 801350e <_vfiprintf_r+0x1d6> 80134c6: 9b03 ldr r3, [sp, #12] 80134c8: 3307 adds r3, #7 80134ca: f023 0307 bic.w r3, r3, #7 80134ce: 3308 adds r3, #8 80134d0: 9303 str r3, [sp, #12] 80134d2: 9b09 ldr r3, [sp, #36] @ 0x24 80134d4: 443b add r3, r7 80134d6: 9309 str r3, [sp, #36] @ 0x24 80134d8: e76a b.n 80133b0 <_vfiprintf_r+0x78> 80134da: fb0c 3202 mla r2, ip, r2, r3 80134de: 460c mov r4, r1 80134e0: 2001 movs r0, #1 80134e2: e7a8 b.n 8013436 <_vfiprintf_r+0xfe> 80134e4: 2300 movs r3, #0 80134e6: 3401 adds r4, #1 80134e8: 9305 str r3, [sp, #20] 80134ea: 4619 mov r1, r3 80134ec: f04f 0c0a mov.w ip, #10 80134f0: 4620 mov r0, r4 80134f2: f810 2b01 ldrb.w r2, [r0], #1 80134f6: 3a30 subs r2, #48 @ 0x30 80134f8: 2a09 cmp r2, #9 80134fa: d903 bls.n 8013504 <_vfiprintf_r+0x1cc> 80134fc: 2b00 cmp r3, #0 80134fe: d0c6 beq.n 801348e <_vfiprintf_r+0x156> 8013500: 9105 str r1, [sp, #20] 8013502: e7c4 b.n 801348e <_vfiprintf_r+0x156> 8013504: fb0c 2101 mla r1, ip, r1, r2 8013508: 4604 mov r4, r0 801350a: 2301 movs r3, #1 801350c: e7f0 b.n 80134f0 <_vfiprintf_r+0x1b8> 801350e: ab03 add r3, sp, #12 8013510: 9300 str r3, [sp, #0] 8013512: 462a mov r2, r5 8013514: 4b12 ldr r3, [pc, #72] @ (8013560 <_vfiprintf_r+0x228>) 8013516: a904 add r1, sp, #16 8013518: 4630 mov r0, r6 801351a: f7fb ff85 bl 800f428 <_printf_float> 801351e: 4607 mov r7, r0 8013520: 1c78 adds r0, r7, #1 8013522: d1d6 bne.n 80134d2 <_vfiprintf_r+0x19a> 8013524: 6e6b ldr r3, [r5, #100] @ 0x64 8013526: 07d9 lsls r1, r3, #31 8013528: d405 bmi.n 8013536 <_vfiprintf_r+0x1fe> 801352a: 89ab ldrh r3, [r5, #12] 801352c: 059a lsls r2, r3, #22 801352e: d402 bmi.n 8013536 <_vfiprintf_r+0x1fe> 8013530: 6da8 ldr r0, [r5, #88] @ 0x58 8013532: f7fd f8f3 bl 801071c <__retarget_lock_release_recursive> 8013536: 89ab ldrh r3, [r5, #12] 8013538: 065b lsls r3, r3, #25 801353a: f53f af1f bmi.w 801337c <_vfiprintf_r+0x44> 801353e: 9809 ldr r0, [sp, #36] @ 0x24 8013540: e71e b.n 8013380 <_vfiprintf_r+0x48> 8013542: ab03 add r3, sp, #12 8013544: 9300 str r3, [sp, #0] 8013546: 462a mov r2, r5 8013548: 4b05 ldr r3, [pc, #20] @ (8013560 <_vfiprintf_r+0x228>) 801354a: a904 add r1, sp, #16 801354c: 4630 mov r0, r6 801354e: f7fc fa03 bl 800f958 <_printf_i> 8013552: e7e4 b.n 801351e <_vfiprintf_r+0x1e6> 8013554: 080150b9 .word 0x080150b9 8013558: 080150c3 .word 0x080150c3 801355c: 0800f429 .word 0x0800f429 8013560: 08013313 .word 0x08013313 8013564: 080150bf .word 0x080150bf 08013568 <_scanf_chars>: 8013568: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr} 801356c: 4615 mov r5, r2 801356e: 688a ldr r2, [r1, #8] 8013570: 4680 mov r8, r0 8013572: 460c mov r4, r1 8013574: b932 cbnz r2, 8013584 <_scanf_chars+0x1c> 8013576: 698a ldr r2, [r1, #24] 8013578: 2a00 cmp r2, #0 801357a: bf14 ite ne 801357c: f04f 32ff movne.w r2, #4294967295 @ 0xffffffff 8013580: 2201 moveq r2, #1 8013582: 608a str r2, [r1, #8] 8013584: 6822 ldr r2, [r4, #0] 8013586: f8df 9090 ldr.w r9, [pc, #144] @ 8013618 <_scanf_chars+0xb0> 801358a: 06d1 lsls r1, r2, #27 801358c: bf5f itttt pl 801358e: 681a ldrpl r2, [r3, #0] 8013590: 1d11 addpl r1, r2, #4 8013592: 6019 strpl r1, [r3, #0] 8013594: 6816 ldrpl r6, [r2, #0] 8013596: 2700 movs r7, #0 8013598: 69a0 ldr r0, [r4, #24] 801359a: b188 cbz r0, 80135c0 <_scanf_chars+0x58> 801359c: 2801 cmp r0, #1 801359e: d107 bne.n 80135b0 <_scanf_chars+0x48> 80135a0: 682b ldr r3, [r5, #0] 80135a2: 781a ldrb r2, [r3, #0] 80135a4: 6963 ldr r3, [r4, #20] 80135a6: 5c9b ldrb r3, [r3, r2] 80135a8: b953 cbnz r3, 80135c0 <_scanf_chars+0x58> 80135aa: 2f00 cmp r7, #0 80135ac: d031 beq.n 8013612 <_scanf_chars+0xaa> 80135ae: e022 b.n 80135f6 <_scanf_chars+0x8e> 80135b0: 2802 cmp r0, #2 80135b2: d120 bne.n 80135f6 <_scanf_chars+0x8e> 80135b4: 682b ldr r3, [r5, #0] 80135b6: 781b ldrb r3, [r3, #0] 80135b8: f819 3003 ldrb.w r3, [r9, r3] 80135bc: 071b lsls r3, r3, #28 80135be: d41a bmi.n 80135f6 <_scanf_chars+0x8e> 80135c0: 6823 ldr r3, [r4, #0] 80135c2: 06da lsls r2, r3, #27 80135c4: bf5e ittt pl 80135c6: 682b ldrpl r3, [r5, #0] 80135c8: 781b ldrbpl r3, [r3, #0] 80135ca: f806 3b01 strbpl.w r3, [r6], #1 80135ce: 682a ldr r2, [r5, #0] 80135d0: 686b ldr r3, [r5, #4] 80135d2: 3201 adds r2, #1 80135d4: 602a str r2, [r5, #0] 80135d6: 68a2 ldr r2, [r4, #8] 80135d8: 3b01 subs r3, #1 80135da: 3a01 subs r2, #1 80135dc: 606b str r3, [r5, #4] 80135de: 3701 adds r7, #1 80135e0: 60a2 str r2, [r4, #8] 80135e2: b142 cbz r2, 80135f6 <_scanf_chars+0x8e> 80135e4: 2b00 cmp r3, #0 80135e6: dcd7 bgt.n 8013598 <_scanf_chars+0x30> 80135e8: f8d4 3180 ldr.w r3, [r4, #384] @ 0x180 80135ec: 4629 mov r1, r5 80135ee: 4640 mov r0, r8 80135f0: 4798 blx r3 80135f2: 2800 cmp r0, #0 80135f4: d0d0 beq.n 8013598 <_scanf_chars+0x30> 80135f6: 6823 ldr r3, [r4, #0] 80135f8: f013 0310 ands.w r3, r3, #16 80135fc: d105 bne.n 801360a <_scanf_chars+0xa2> 80135fe: 68e2 ldr r2, [r4, #12] 8013600: 3201 adds r2, #1 8013602: 60e2 str r2, [r4, #12] 8013604: 69a2 ldr r2, [r4, #24] 8013606: b102 cbz r2, 801360a <_scanf_chars+0xa2> 8013608: 7033 strb r3, [r6, #0] 801360a: 6923 ldr r3, [r4, #16] 801360c: 443b add r3, r7 801360e: 6123 str r3, [r4, #16] 8013610: 2000 movs r0, #0 8013612: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc} 8013616: bf00 nop 8013618: 080152a1 .word 0x080152a1 0801361c <_scanf_i>: 801361c: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 8013620: 4698 mov r8, r3 8013622: 4b74 ldr r3, [pc, #464] @ (80137f4 <_scanf_i+0x1d8>) 8013624: 460c mov r4, r1 8013626: 4682 mov sl, r0 8013628: 4616 mov r6, r2 801362a: e893 0007 ldmia.w r3, {r0, r1, r2} 801362e: b087 sub sp, #28 8013630: ab03 add r3, sp, #12 8013632: e883 0007 stmia.w r3, {r0, r1, r2} 8013636: 4b70 ldr r3, [pc, #448] @ (80137f8 <_scanf_i+0x1dc>) 8013638: 69a1 ldr r1, [r4, #24] 801363a: 4a70 ldr r2, [pc, #448] @ (80137fc <_scanf_i+0x1e0>) 801363c: 2903 cmp r1, #3 801363e: bf08 it eq 8013640: 461a moveq r2, r3 8013642: 68a3 ldr r3, [r4, #8] 8013644: 9201 str r2, [sp, #4] 8013646: 1e5a subs r2, r3, #1 8013648: f5b2 7fae cmp.w r2, #348 @ 0x15c 801364c: bf88 it hi 801364e: f46f 75ae mvnhi.w r5, #348 @ 0x15c 8013652: 4627 mov r7, r4 8013654: bf82 ittt hi 8013656: eb03 0905 addhi.w r9, r3, r5 801365a: f240 135d movwhi r3, #349 @ 0x15d 801365e: 60a3 strhi r3, [r4, #8] 8013660: f857 3b1c ldr.w r3, [r7], #28 8013664: f443 6350 orr.w r3, r3, #3328 @ 0xd00 8013668: bf98 it ls 801366a: f04f 0900 movls.w r9, #0 801366e: 6023 str r3, [r4, #0] 8013670: 463d mov r5, r7 8013672: f04f 0b00 mov.w fp, #0 8013676: 6831 ldr r1, [r6, #0] 8013678: ab03 add r3, sp, #12 801367a: 7809 ldrb r1, [r1, #0] 801367c: f853 002b ldr.w r0, [r3, fp, lsl #2] 8013680: 2202 movs r2, #2 8013682: f7ec fdb5 bl 80001f0 8013686: b328 cbz r0, 80136d4 <_scanf_i+0xb8> 8013688: f1bb 0f01 cmp.w fp, #1 801368c: d159 bne.n 8013742 <_scanf_i+0x126> 801368e: 6862 ldr r2, [r4, #4] 8013690: b92a cbnz r2, 801369e <_scanf_i+0x82> 8013692: 6822 ldr r2, [r4, #0] 8013694: 2108 movs r1, #8 8013696: f442 7200 orr.w r2, r2, #512 @ 0x200 801369a: 6061 str r1, [r4, #4] 801369c: 6022 str r2, [r4, #0] 801369e: 6822 ldr r2, [r4, #0] 80136a0: f422 62a0 bic.w r2, r2, #1280 @ 0x500 80136a4: 6022 str r2, [r4, #0] 80136a6: 68a2 ldr r2, [r4, #8] 80136a8: 1e51 subs r1, r2, #1 80136aa: 60a1 str r1, [r4, #8] 80136ac: b192 cbz r2, 80136d4 <_scanf_i+0xb8> 80136ae: 6832 ldr r2, [r6, #0] 80136b0: 1c51 adds r1, r2, #1 80136b2: 6031 str r1, [r6, #0] 80136b4: 7812 ldrb r2, [r2, #0] 80136b6: f805 2b01 strb.w r2, [r5], #1 80136ba: 6872 ldr r2, [r6, #4] 80136bc: 3a01 subs r2, #1 80136be: 2a00 cmp r2, #0 80136c0: 6072 str r2, [r6, #4] 80136c2: dc07 bgt.n 80136d4 <_scanf_i+0xb8> 80136c4: f8d4 2180 ldr.w r2, [r4, #384] @ 0x180 80136c8: 4631 mov r1, r6 80136ca: 4650 mov r0, sl 80136cc: 4790 blx r2 80136ce: 2800 cmp r0, #0 80136d0: f040 8085 bne.w 80137de <_scanf_i+0x1c2> 80136d4: f10b 0b01 add.w fp, fp, #1 80136d8: f1bb 0f03 cmp.w fp, #3 80136dc: d1cb bne.n 8013676 <_scanf_i+0x5a> 80136de: 6863 ldr r3, [r4, #4] 80136e0: b90b cbnz r3, 80136e6 <_scanf_i+0xca> 80136e2: 230a movs r3, #10 80136e4: 6063 str r3, [r4, #4] 80136e6: 6863 ldr r3, [r4, #4] 80136e8: 4945 ldr r1, [pc, #276] @ (8013800 <_scanf_i+0x1e4>) 80136ea: 6960 ldr r0, [r4, #20] 80136ec: 1ac9 subs r1, r1, r3 80136ee: f000 f9a9 bl 8013a44 <__sccl> 80136f2: f04f 0b00 mov.w fp, #0 80136f6: 68a3 ldr r3, [r4, #8] 80136f8: 6822 ldr r2, [r4, #0] 80136fa: 2b00 cmp r3, #0 80136fc: d03d beq.n 801377a <_scanf_i+0x15e> 80136fe: 6831 ldr r1, [r6, #0] 8013700: 6960 ldr r0, [r4, #20] 8013702: f891 c000 ldrb.w ip, [r1] 8013706: f810 000c ldrb.w r0, [r0, ip] 801370a: 2800 cmp r0, #0 801370c: d035 beq.n 801377a <_scanf_i+0x15e> 801370e: f1bc 0f30 cmp.w ip, #48 @ 0x30 8013712: d124 bne.n 801375e <_scanf_i+0x142> 8013714: 0510 lsls r0, r2, #20 8013716: d522 bpl.n 801375e <_scanf_i+0x142> 8013718: f10b 0b01 add.w fp, fp, #1 801371c: f1b9 0f00 cmp.w r9, #0 8013720: d003 beq.n 801372a <_scanf_i+0x10e> 8013722: 3301 adds r3, #1 8013724: f109 39ff add.w r9, r9, #4294967295 @ 0xffffffff 8013728: 60a3 str r3, [r4, #8] 801372a: 6873 ldr r3, [r6, #4] 801372c: 3b01 subs r3, #1 801372e: 2b00 cmp r3, #0 8013730: 6073 str r3, [r6, #4] 8013732: dd1b ble.n 801376c <_scanf_i+0x150> 8013734: 6833 ldr r3, [r6, #0] 8013736: 3301 adds r3, #1 8013738: 6033 str r3, [r6, #0] 801373a: 68a3 ldr r3, [r4, #8] 801373c: 3b01 subs r3, #1 801373e: 60a3 str r3, [r4, #8] 8013740: e7d9 b.n 80136f6 <_scanf_i+0xda> 8013742: f1bb 0f02 cmp.w fp, #2 8013746: d1ae bne.n 80136a6 <_scanf_i+0x8a> 8013748: 6822 ldr r2, [r4, #0] 801374a: f402 61c0 and.w r1, r2, #1536 @ 0x600 801374e: f5b1 7f00 cmp.w r1, #512 @ 0x200 8013752: d1c4 bne.n 80136de <_scanf_i+0xc2> 8013754: 2110 movs r1, #16 8013756: 6061 str r1, [r4, #4] 8013758: f442 7280 orr.w r2, r2, #256 @ 0x100 801375c: e7a2 b.n 80136a4 <_scanf_i+0x88> 801375e: f422 6210 bic.w r2, r2, #2304 @ 0x900 8013762: 6022 str r2, [r4, #0] 8013764: 780b ldrb r3, [r1, #0] 8013766: f805 3b01 strb.w r3, [r5], #1 801376a: e7de b.n 801372a <_scanf_i+0x10e> 801376c: f8d4 3180 ldr.w r3, [r4, #384] @ 0x180 8013770: 4631 mov r1, r6 8013772: 4650 mov r0, sl 8013774: 4798 blx r3 8013776: 2800 cmp r0, #0 8013778: d0df beq.n 801373a <_scanf_i+0x11e> 801377a: 6823 ldr r3, [r4, #0] 801377c: 05d9 lsls r1, r3, #23 801377e: d50d bpl.n 801379c <_scanf_i+0x180> 8013780: 42bd cmp r5, r7 8013782: d909 bls.n 8013798 <_scanf_i+0x17c> 8013784: f815 1c01 ldrb.w r1, [r5, #-1] 8013788: f8d4 317c ldr.w r3, [r4, #380] @ 0x17c 801378c: 4632 mov r2, r6 801378e: 4650 mov r0, sl 8013790: 4798 blx r3 8013792: f105 39ff add.w r9, r5, #4294967295 @ 0xffffffff 8013796: 464d mov r5, r9 8013798: 42bd cmp r5, r7 801379a: d028 beq.n 80137ee <_scanf_i+0x1d2> 801379c: 6822 ldr r2, [r4, #0] 801379e: f012 0210 ands.w r2, r2, #16 80137a2: d113 bne.n 80137cc <_scanf_i+0x1b0> 80137a4: 702a strb r2, [r5, #0] 80137a6: 6863 ldr r3, [r4, #4] 80137a8: 9e01 ldr r6, [sp, #4] 80137aa: 4639 mov r1, r7 80137ac: 4650 mov r0, sl 80137ae: 47b0 blx r6 80137b0: f8d8 3000 ldr.w r3, [r8] 80137b4: 6821 ldr r1, [r4, #0] 80137b6: 1d1a adds r2, r3, #4 80137b8: f8c8 2000 str.w r2, [r8] 80137bc: f011 0f20 tst.w r1, #32 80137c0: 681b ldr r3, [r3, #0] 80137c2: d00f beq.n 80137e4 <_scanf_i+0x1c8> 80137c4: 6018 str r0, [r3, #0] 80137c6: 68e3 ldr r3, [r4, #12] 80137c8: 3301 adds r3, #1 80137ca: 60e3 str r3, [r4, #12] 80137cc: 6923 ldr r3, [r4, #16] 80137ce: 1bed subs r5, r5, r7 80137d0: 445d add r5, fp 80137d2: 442b add r3, r5 80137d4: 6123 str r3, [r4, #16] 80137d6: 2000 movs r0, #0 80137d8: b007 add sp, #28 80137da: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} 80137de: f04f 0b00 mov.w fp, #0 80137e2: e7ca b.n 801377a <_scanf_i+0x15e> 80137e4: 07ca lsls r2, r1, #31 80137e6: bf4c ite mi 80137e8: 8018 strhmi r0, [r3, #0] 80137ea: 6018 strpl r0, [r3, #0] 80137ec: e7eb b.n 80137c6 <_scanf_i+0x1aa> 80137ee: 2001 movs r0, #1 80137f0: e7f2 b.n 80137d8 <_scanf_i+0x1bc> 80137f2: bf00 nop 80137f4: 08014eb0 .word 0x08014eb0 80137f8: 08012c91 .word 0x08012c91 80137fc: 080143dd .word 0x080143dd 8013800: 080150da .word 0x080150da 08013804 <__sflush_r>: 8013804: f9b1 200c ldrsh.w r2, [r1, #12] 8013808: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} 801380c: 0716 lsls r6, r2, #28 801380e: 4605 mov r5, r0 8013810: 460c mov r4, r1 8013812: d454 bmi.n 80138be <__sflush_r+0xba> 8013814: 684b ldr r3, [r1, #4] 8013816: 2b00 cmp r3, #0 8013818: dc02 bgt.n 8013820 <__sflush_r+0x1c> 801381a: 6c0b ldr r3, [r1, #64] @ 0x40 801381c: 2b00 cmp r3, #0 801381e: dd48 ble.n 80138b2 <__sflush_r+0xae> 8013820: 6ae6 ldr r6, [r4, #44] @ 0x2c 8013822: 2e00 cmp r6, #0 8013824: d045 beq.n 80138b2 <__sflush_r+0xae> 8013826: 2300 movs r3, #0 8013828: f412 5280 ands.w r2, r2, #4096 @ 0x1000 801382c: 682f ldr r7, [r5, #0] 801382e: 6a21 ldr r1, [r4, #32] 8013830: 602b str r3, [r5, #0] 8013832: d030 beq.n 8013896 <__sflush_r+0x92> 8013834: 6d62 ldr r2, [r4, #84] @ 0x54 8013836: 89a3 ldrh r3, [r4, #12] 8013838: 0759 lsls r1, r3, #29 801383a: d505 bpl.n 8013848 <__sflush_r+0x44> 801383c: 6863 ldr r3, [r4, #4] 801383e: 1ad2 subs r2, r2, r3 8013840: 6b63 ldr r3, [r4, #52] @ 0x34 8013842: b10b cbz r3, 8013848 <__sflush_r+0x44> 8013844: 6c23 ldr r3, [r4, #64] @ 0x40 8013846: 1ad2 subs r2, r2, r3 8013848: 2300 movs r3, #0 801384a: 6ae6 ldr r6, [r4, #44] @ 0x2c 801384c: 6a21 ldr r1, [r4, #32] 801384e: 4628 mov r0, r5 8013850: 47b0 blx r6 8013852: 1c43 adds r3, r0, #1 8013854: 89a3 ldrh r3, [r4, #12] 8013856: d106 bne.n 8013866 <__sflush_r+0x62> 8013858: 6829 ldr r1, [r5, #0] 801385a: 291d cmp r1, #29 801385c: d82b bhi.n 80138b6 <__sflush_r+0xb2> 801385e: 4a2a ldr r2, [pc, #168] @ (8013908 <__sflush_r+0x104>) 8013860: 40ca lsrs r2, r1 8013862: 07d6 lsls r6, r2, #31 8013864: d527 bpl.n 80138b6 <__sflush_r+0xb2> 8013866: 2200 movs r2, #0 8013868: 6062 str r2, [r4, #4] 801386a: 04d9 lsls r1, r3, #19 801386c: 6922 ldr r2, [r4, #16] 801386e: 6022 str r2, [r4, #0] 8013870: d504 bpl.n 801387c <__sflush_r+0x78> 8013872: 1c42 adds r2, r0, #1 8013874: d101 bne.n 801387a <__sflush_r+0x76> 8013876: 682b ldr r3, [r5, #0] 8013878: b903 cbnz r3, 801387c <__sflush_r+0x78> 801387a: 6560 str r0, [r4, #84] @ 0x54 801387c: 6b61 ldr r1, [r4, #52] @ 0x34 801387e: 602f str r7, [r5, #0] 8013880: b1b9 cbz r1, 80138b2 <__sflush_r+0xae> 8013882: f104 0344 add.w r3, r4, #68 @ 0x44 8013886: 4299 cmp r1, r3 8013888: d002 beq.n 8013890 <__sflush_r+0x8c> 801388a: 4628 mov r0, r5 801388c: f7fd fdd4 bl 8011438 <_free_r> 8013890: 2300 movs r3, #0 8013892: 6363 str r3, [r4, #52] @ 0x34 8013894: e00d b.n 80138b2 <__sflush_r+0xae> 8013896: 2301 movs r3, #1 8013898: 4628 mov r0, r5 801389a: 47b0 blx r6 801389c: 4602 mov r2, r0 801389e: 1c50 adds r0, r2, #1 80138a0: d1c9 bne.n 8013836 <__sflush_r+0x32> 80138a2: 682b ldr r3, [r5, #0] 80138a4: 2b00 cmp r3, #0 80138a6: d0c6 beq.n 8013836 <__sflush_r+0x32> 80138a8: 2b1d cmp r3, #29 80138aa: d001 beq.n 80138b0 <__sflush_r+0xac> 80138ac: 2b16 cmp r3, #22 80138ae: d11e bne.n 80138ee <__sflush_r+0xea> 80138b0: 602f str r7, [r5, #0] 80138b2: 2000 movs r0, #0 80138b4: e022 b.n 80138fc <__sflush_r+0xf8> 80138b6: f043 0340 orr.w r3, r3, #64 @ 0x40 80138ba: b21b sxth r3, r3 80138bc: e01b b.n 80138f6 <__sflush_r+0xf2> 80138be: 690f ldr r7, [r1, #16] 80138c0: 2f00 cmp r7, #0 80138c2: d0f6 beq.n 80138b2 <__sflush_r+0xae> 80138c4: 0793 lsls r3, r2, #30 80138c6: 680e ldr r6, [r1, #0] 80138c8: bf08 it eq 80138ca: 694b ldreq r3, [r1, #20] 80138cc: 600f str r7, [r1, #0] 80138ce: bf18 it ne 80138d0: 2300 movne r3, #0 80138d2: eba6 0807 sub.w r8, r6, r7 80138d6: 608b str r3, [r1, #8] 80138d8: f1b8 0f00 cmp.w r8, #0 80138dc: dde9 ble.n 80138b2 <__sflush_r+0xae> 80138de: 6a21 ldr r1, [r4, #32] 80138e0: 6aa6 ldr r6, [r4, #40] @ 0x28 80138e2: 4643 mov r3, r8 80138e4: 463a mov r2, r7 80138e6: 4628 mov r0, r5 80138e8: 47b0 blx r6 80138ea: 2800 cmp r0, #0 80138ec: dc08 bgt.n 8013900 <__sflush_r+0xfc> 80138ee: f9b4 300c ldrsh.w r3, [r4, #12] 80138f2: f043 0340 orr.w r3, r3, #64 @ 0x40 80138f6: 81a3 strh r3, [r4, #12] 80138f8: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff 80138fc: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 8013900: 4407 add r7, r0 8013902: eba8 0800 sub.w r8, r8, r0 8013906: e7e7 b.n 80138d8 <__sflush_r+0xd4> 8013908: 20400001 .word 0x20400001 0801390c <_fflush_r>: 801390c: b538 push {r3, r4, r5, lr} 801390e: 690b ldr r3, [r1, #16] 8013910: 4605 mov r5, r0 8013912: 460c mov r4, r1 8013914: b913 cbnz r3, 801391c <_fflush_r+0x10> 8013916: 2500 movs r5, #0 8013918: 4628 mov r0, r5 801391a: bd38 pop {r3, r4, r5, pc} 801391c: b118 cbz r0, 8013926 <_fflush_r+0x1a> 801391e: 6a03 ldr r3, [r0, #32] 8013920: b90b cbnz r3, 8013926 <_fflush_r+0x1a> 8013922: f7fc fbd1 bl 80100c8 <__sinit> 8013926: f9b4 300c ldrsh.w r3, [r4, #12] 801392a: 2b00 cmp r3, #0 801392c: d0f3 beq.n 8013916 <_fflush_r+0xa> 801392e: 6e62 ldr r2, [r4, #100] @ 0x64 8013930: 07d0 lsls r0, r2, #31 8013932: d404 bmi.n 801393e <_fflush_r+0x32> 8013934: 0599 lsls r1, r3, #22 8013936: d402 bmi.n 801393e <_fflush_r+0x32> 8013938: 6da0 ldr r0, [r4, #88] @ 0x58 801393a: f7fc feee bl 801071a <__retarget_lock_acquire_recursive> 801393e: 4628 mov r0, r5 8013940: 4621 mov r1, r4 8013942: f7ff ff5f bl 8013804 <__sflush_r> 8013946: 6e63 ldr r3, [r4, #100] @ 0x64 8013948: 07da lsls r2, r3, #31 801394a: 4605 mov r5, r0 801394c: d4e4 bmi.n 8013918 <_fflush_r+0xc> 801394e: 89a3 ldrh r3, [r4, #12] 8013950: 059b lsls r3, r3, #22 8013952: d4e1 bmi.n 8013918 <_fflush_r+0xc> 8013954: 6da0 ldr r0, [r4, #88] @ 0x58 8013956: f7fc fee1 bl 801071c <__retarget_lock_release_recursive> 801395a: e7dd b.n 8013918 <_fflush_r+0xc> 0801395c : 801395c: b40e push {r1, r2, r3} 801395e: b503 push {r0, r1, lr} 8013960: 4601 mov r1, r0 8013962: ab03 add r3, sp, #12 8013964: 4805 ldr r0, [pc, #20] @ (801397c ) 8013966: f853 2b04 ldr.w r2, [r3], #4 801396a: 6800 ldr r0, [r0, #0] 801396c: 9301 str r3, [sp, #4] 801396e: f7ff fce3 bl 8013338 <_vfiprintf_r> 8013972: b002 add sp, #8 8013974: f85d eb04 ldr.w lr, [sp], #4 8013978: b003 add sp, #12 801397a: 4770 bx lr 801397c: 200000e0 .word 0x200000e0 08013980 <__swhatbuf_r>: 8013980: b570 push {r4, r5, r6, lr} 8013982: 460c mov r4, r1 8013984: f9b1 100e ldrsh.w r1, [r1, #14] 8013988: 2900 cmp r1, #0 801398a: b096 sub sp, #88 @ 0x58 801398c: 4615 mov r5, r2 801398e: 461e mov r6, r3 8013990: da0d bge.n 80139ae <__swhatbuf_r+0x2e> 8013992: 89a3 ldrh r3, [r4, #12] 8013994: f013 0f80 tst.w r3, #128 @ 0x80 8013998: f04f 0100 mov.w r1, #0 801399c: bf14 ite ne 801399e: 2340 movne r3, #64 @ 0x40 80139a0: f44f 6380 moveq.w r3, #1024 @ 0x400 80139a4: 2000 movs r0, #0 80139a6: 6031 str r1, [r6, #0] 80139a8: 602b str r3, [r5, #0] 80139aa: b016 add sp, #88 @ 0x58 80139ac: bd70 pop {r4, r5, r6, pc} 80139ae: 466a mov r2, sp 80139b0: f000 f8d6 bl 8013b60 <_fstat_r> 80139b4: 2800 cmp r0, #0 80139b6: dbec blt.n 8013992 <__swhatbuf_r+0x12> 80139b8: 9901 ldr r1, [sp, #4] 80139ba: f401 4170 and.w r1, r1, #61440 @ 0xf000 80139be: f5a1 5300 sub.w r3, r1, #8192 @ 0x2000 80139c2: 4259 negs r1, r3 80139c4: 4159 adcs r1, r3 80139c6: f44f 6380 mov.w r3, #1024 @ 0x400 80139ca: e7eb b.n 80139a4 <__swhatbuf_r+0x24> 080139cc <__smakebuf_r>: 80139cc: 898b ldrh r3, [r1, #12] 80139ce: b5f7 push {r0, r1, r2, r4, r5, r6, r7, lr} 80139d0: 079d lsls r5, r3, #30 80139d2: 4606 mov r6, r0 80139d4: 460c mov r4, r1 80139d6: d507 bpl.n 80139e8 <__smakebuf_r+0x1c> 80139d8: f104 0347 add.w r3, r4, #71 @ 0x47 80139dc: 6023 str r3, [r4, #0] 80139de: 6123 str r3, [r4, #16] 80139e0: 2301 movs r3, #1 80139e2: 6163 str r3, [r4, #20] 80139e4: b003 add sp, #12 80139e6: bdf0 pop {r4, r5, r6, r7, pc} 80139e8: ab01 add r3, sp, #4 80139ea: 466a mov r2, sp 80139ec: f7ff ffc8 bl 8013980 <__swhatbuf_r> 80139f0: 9f00 ldr r7, [sp, #0] 80139f2: 4605 mov r5, r0 80139f4: 4639 mov r1, r7 80139f6: 4630 mov r0, r6 80139f8: f7fd fd92 bl 8011520 <_malloc_r> 80139fc: b948 cbnz r0, 8013a12 <__smakebuf_r+0x46> 80139fe: f9b4 300c ldrsh.w r3, [r4, #12] 8013a02: 059a lsls r2, r3, #22 8013a04: d4ee bmi.n 80139e4 <__smakebuf_r+0x18> 8013a06: f023 0303 bic.w r3, r3, #3 8013a0a: f043 0302 orr.w r3, r3, #2 8013a0e: 81a3 strh r3, [r4, #12] 8013a10: e7e2 b.n 80139d8 <__smakebuf_r+0xc> 8013a12: 89a3 ldrh r3, [r4, #12] 8013a14: 6020 str r0, [r4, #0] 8013a16: f043 0380 orr.w r3, r3, #128 @ 0x80 8013a1a: 81a3 strh r3, [r4, #12] 8013a1c: 9b01 ldr r3, [sp, #4] 8013a1e: e9c4 0704 strd r0, r7, [r4, #16] 8013a22: b15b cbz r3, 8013a3c <__smakebuf_r+0x70> 8013a24: f9b4 100e ldrsh.w r1, [r4, #14] 8013a28: 4630 mov r0, r6 8013a2a: f000 f8ab bl 8013b84 <_isatty_r> 8013a2e: b128 cbz r0, 8013a3c <__smakebuf_r+0x70> 8013a30: 89a3 ldrh r3, [r4, #12] 8013a32: f023 0303 bic.w r3, r3, #3 8013a36: f043 0301 orr.w r3, r3, #1 8013a3a: 81a3 strh r3, [r4, #12] 8013a3c: 89a3 ldrh r3, [r4, #12] 8013a3e: 431d orrs r5, r3 8013a40: 81a5 strh r5, [r4, #12] 8013a42: e7cf b.n 80139e4 <__smakebuf_r+0x18> 08013a44 <__sccl>: 8013a44: b570 push {r4, r5, r6, lr} 8013a46: 780b ldrb r3, [r1, #0] 8013a48: 4604 mov r4, r0 8013a4a: 2b5e cmp r3, #94 @ 0x5e 8013a4c: bf0b itete eq 8013a4e: 784b ldrbeq r3, [r1, #1] 8013a50: 1c4a addne r2, r1, #1 8013a52: 1c8a addeq r2, r1, #2 8013a54: 2100 movne r1, #0 8013a56: bf08 it eq 8013a58: 2101 moveq r1, #1 8013a5a: 3801 subs r0, #1 8013a5c: f104 05ff add.w r5, r4, #255 @ 0xff 8013a60: f800 1f01 strb.w r1, [r0, #1]! 8013a64: 42a8 cmp r0, r5 8013a66: d1fb bne.n 8013a60 <__sccl+0x1c> 8013a68: b90b cbnz r3, 8013a6e <__sccl+0x2a> 8013a6a: 1e50 subs r0, r2, #1 8013a6c: bd70 pop {r4, r5, r6, pc} 8013a6e: f081 0101 eor.w r1, r1, #1 8013a72: 54e1 strb r1, [r4, r3] 8013a74: 4610 mov r0, r2 8013a76: 4602 mov r2, r0 8013a78: f812 5b01 ldrb.w r5, [r2], #1 8013a7c: 2d2d cmp r5, #45 @ 0x2d 8013a7e: d005 beq.n 8013a8c <__sccl+0x48> 8013a80: 2d5d cmp r5, #93 @ 0x5d 8013a82: d016 beq.n 8013ab2 <__sccl+0x6e> 8013a84: 2d00 cmp r5, #0 8013a86: d0f1 beq.n 8013a6c <__sccl+0x28> 8013a88: 462b mov r3, r5 8013a8a: e7f2 b.n 8013a72 <__sccl+0x2e> 8013a8c: 7846 ldrb r6, [r0, #1] 8013a8e: 2e5d cmp r6, #93 @ 0x5d 8013a90: d0fa beq.n 8013a88 <__sccl+0x44> 8013a92: 42b3 cmp r3, r6 8013a94: dcf8 bgt.n 8013a88 <__sccl+0x44> 8013a96: 3002 adds r0, #2 8013a98: 461a mov r2, r3 8013a9a: 3201 adds r2, #1 8013a9c: 4296 cmp r6, r2 8013a9e: 54a1 strb r1, [r4, r2] 8013aa0: dcfb bgt.n 8013a9a <__sccl+0x56> 8013aa2: 1af2 subs r2, r6, r3 8013aa4: 3a01 subs r2, #1 8013aa6: 1c5d adds r5, r3, #1 8013aa8: 42b3 cmp r3, r6 8013aaa: bfa8 it ge 8013aac: 2200 movge r2, #0 8013aae: 18ab adds r3, r5, r2 8013ab0: e7e1 b.n 8013a76 <__sccl+0x32> 8013ab2: 4610 mov r0, r2 8013ab4: e7da b.n 8013a6c <__sccl+0x28> 08013ab6 <__submore>: 8013ab6: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} 8013aba: 460c mov r4, r1 8013abc: 6b49 ldr r1, [r1, #52] @ 0x34 8013abe: f104 0344 add.w r3, r4, #68 @ 0x44 8013ac2: 4299 cmp r1, r3 8013ac4: d11d bne.n 8013b02 <__submore+0x4c> 8013ac6: f44f 6180 mov.w r1, #1024 @ 0x400 8013aca: f7fd fd29 bl 8011520 <_malloc_r> 8013ace: b918 cbnz r0, 8013ad8 <__submore+0x22> 8013ad0: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff 8013ad4: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 8013ad8: f44f 6380 mov.w r3, #1024 @ 0x400 8013adc: 63a3 str r3, [r4, #56] @ 0x38 8013ade: f894 3046 ldrb.w r3, [r4, #70] @ 0x46 8013ae2: 6360 str r0, [r4, #52] @ 0x34 8013ae4: f880 33ff strb.w r3, [r0, #1023] @ 0x3ff 8013ae8: f894 3045 ldrb.w r3, [r4, #69] @ 0x45 8013aec: f880 33fe strb.w r3, [r0, #1022] @ 0x3fe 8013af0: f894 3044 ldrb.w r3, [r4, #68] @ 0x44 8013af4: f880 33fd strb.w r3, [r0, #1021] @ 0x3fd 8013af8: f200 30fd addw r0, r0, #1021 @ 0x3fd 8013afc: 6020 str r0, [r4, #0] 8013afe: 2000 movs r0, #0 8013b00: e7e8 b.n 8013ad4 <__submore+0x1e> 8013b02: 6ba6 ldr r6, [r4, #56] @ 0x38 8013b04: 0077 lsls r7, r6, #1 8013b06: 463a mov r2, r7 8013b08: f000 fbcb bl 80142a2 <_realloc_r> 8013b0c: 4605 mov r5, r0 8013b0e: 2800 cmp r0, #0 8013b10: d0de beq.n 8013ad0 <__submore+0x1a> 8013b12: eb00 0806 add.w r8, r0, r6 8013b16: 4601 mov r1, r0 8013b18: 4632 mov r2, r6 8013b1a: 4640 mov r0, r8 8013b1c: f7fc fdff bl 801071e 8013b20: e9c4 570d strd r5, r7, [r4, #52] @ 0x34 8013b24: f8c4 8000 str.w r8, [r4] 8013b28: e7e9 b.n 8013afe <__submore+0x48> 08013b2a : 8013b2a: 4288 cmp r0, r1 8013b2c: b510 push {r4, lr} 8013b2e: eb01 0402 add.w r4, r1, r2 8013b32: d902 bls.n 8013b3a 8013b34: 4284 cmp r4, r0 8013b36: 4623 mov r3, r4 8013b38: d807 bhi.n 8013b4a 8013b3a: 1e43 subs r3, r0, #1 8013b3c: 42a1 cmp r1, r4 8013b3e: d008 beq.n 8013b52 8013b40: f811 2b01 ldrb.w r2, [r1], #1 8013b44: f803 2f01 strb.w r2, [r3, #1]! 8013b48: e7f8 b.n 8013b3c 8013b4a: 4402 add r2, r0 8013b4c: 4601 mov r1, r0 8013b4e: 428a cmp r2, r1 8013b50: d100 bne.n 8013b54 8013b52: bd10 pop {r4, pc} 8013b54: f813 4d01 ldrb.w r4, [r3, #-1]! 8013b58: f802 4d01 strb.w r4, [r2, #-1]! 8013b5c: e7f7 b.n 8013b4e ... 08013b60 <_fstat_r>: 8013b60: b538 push {r3, r4, r5, lr} 8013b62: 4d07 ldr r5, [pc, #28] @ (8013b80 <_fstat_r+0x20>) 8013b64: 2300 movs r3, #0 8013b66: 4604 mov r4, r0 8013b68: 4608 mov r0, r1 8013b6a: 4611 mov r1, r2 8013b6c: 602b str r3, [r5, #0] 8013b6e: f7ef ffad bl 8003acc <_fstat> 8013b72: 1c43 adds r3, r0, #1 8013b74: d102 bne.n 8013b7c <_fstat_r+0x1c> 8013b76: 682b ldr r3, [r5, #0] 8013b78: b103 cbz r3, 8013b7c <_fstat_r+0x1c> 8013b7a: 6023 str r3, [r4, #0] 8013b7c: bd38 pop {r3, r4, r5, pc} 8013b7e: bf00 nop 8013b80: 200036a0 .word 0x200036a0 08013b84 <_isatty_r>: 8013b84: b538 push {r3, r4, r5, lr} 8013b86: 4d06 ldr r5, [pc, #24] @ (8013ba0 <_isatty_r+0x1c>) 8013b88: 2300 movs r3, #0 8013b8a: 4604 mov r4, r0 8013b8c: 4608 mov r0, r1 8013b8e: 602b str r3, [r5, #0] 8013b90: f7ef ffac bl 8003aec <_isatty> 8013b94: 1c43 adds r3, r0, #1 8013b96: d102 bne.n 8013b9e <_isatty_r+0x1a> 8013b98: 682b ldr r3, [r5, #0] 8013b9a: b103 cbz r3, 8013b9e <_isatty_r+0x1a> 8013b9c: 6023 str r3, [r4, #0] 8013b9e: bd38 pop {r3, r4, r5, pc} 8013ba0: 200036a0 .word 0x200036a0 08013ba4 <_sbrk_r>: 8013ba4: b538 push {r3, r4, r5, lr} 8013ba6: 4d06 ldr r5, [pc, #24] @ (8013bc0 <_sbrk_r+0x1c>) 8013ba8: 2300 movs r3, #0 8013baa: 4604 mov r4, r0 8013bac: 4608 mov r0, r1 8013bae: 602b str r3, [r5, #0] 8013bb0: f7ef ffb4 bl 8003b1c <_sbrk> 8013bb4: 1c43 adds r3, r0, #1 8013bb6: d102 bne.n 8013bbe <_sbrk_r+0x1a> 8013bb8: 682b ldr r3, [r5, #0] 8013bba: b103 cbz r3, 8013bbe <_sbrk_r+0x1a> 8013bbc: 6023 str r3, [r4, #0] 8013bbe: bd38 pop {r3, r4, r5, pc} 8013bc0: 200036a0 .word 0x200036a0 8013bc4: 00000000 .word 0x00000000 08013bc8 : 8013bc8: ed9f 0b01 vldr d0, [pc, #4] @ 8013bd0 8013bcc: 4770 bx lr 8013bce: bf00 nop 8013bd0: 00000000 .word 0x00000000 8013bd4: 7ff80000 .word 0x7ff80000 08013bd8 : 8013bd8: b508 push {r3, lr} 8013bda: 2006 movs r0, #6 8013bdc: f000 fc36 bl 801444c 8013be0: 2001 movs r0, #1 8013be2: f7ef ff23 bl 8003a2c <_exit> 08013be6 <_calloc_r>: 8013be6: b570 push {r4, r5, r6, lr} 8013be8: fba1 5402 umull r5, r4, r1, r2 8013bec: b934 cbnz r4, 8013bfc <_calloc_r+0x16> 8013bee: 4629 mov r1, r5 8013bf0: f7fd fc96 bl 8011520 <_malloc_r> 8013bf4: 4606 mov r6, r0 8013bf6: b928 cbnz r0, 8013c04 <_calloc_r+0x1e> 8013bf8: 4630 mov r0, r6 8013bfa: bd70 pop {r4, r5, r6, pc} 8013bfc: 220c movs r2, #12 8013bfe: 6002 str r2, [r0, #0] 8013c00: 2600 movs r6, #0 8013c02: e7f9 b.n 8013bf8 <_calloc_r+0x12> 8013c04: 462a mov r2, r5 8013c06: 4621 mov r1, r4 8013c08: f7fc fc72 bl 80104f0 8013c0c: e7f4 b.n 8013bf8 <_calloc_r+0x12> 08013c0e : 8013c0e: 6903 ldr r3, [r0, #16] 8013c10: ebb3 1f61 cmp.w r3, r1, asr #5 8013c14: e92d 43f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, lr} 8013c18: ea4f 1261 mov.w r2, r1, asr #5 8013c1c: f100 0414 add.w r4, r0, #20 8013c20: dd45 ble.n 8013cae 8013c22: f011 011f ands.w r1, r1, #31 8013c26: eb04 0683 add.w r6, r4, r3, lsl #2 8013c2a: eb04 0582 add.w r5, r4, r2, lsl #2 8013c2e: d10c bne.n 8013c4a 8013c30: f100 0710 add.w r7, r0, #16 8013c34: 4629 mov r1, r5 8013c36: 42b1 cmp r1, r6 8013c38: d334 bcc.n 8013ca4 8013c3a: 1a9b subs r3, r3, r2 8013c3c: 009b lsls r3, r3, #2 8013c3e: 1eea subs r2, r5, #3 8013c40: 4296 cmp r6, r2 8013c42: bf38 it cc 8013c44: 2300 movcc r3, #0 8013c46: 4423 add r3, r4 8013c48: e015 b.n 8013c76 8013c4a: f854 7022 ldr.w r7, [r4, r2, lsl #2] 8013c4e: f1c1 0820 rsb r8, r1, #32 8013c52: 40cf lsrs r7, r1 8013c54: f105 0e04 add.w lr, r5, #4 8013c58: 46a1 mov r9, r4 8013c5a: 4576 cmp r6, lr 8013c5c: 46f4 mov ip, lr 8013c5e: d815 bhi.n 8013c8c 8013c60: 1a9a subs r2, r3, r2 8013c62: 0092 lsls r2, r2, #2 8013c64: 3a04 subs r2, #4 8013c66: 3501 adds r5, #1 8013c68: 42ae cmp r6, r5 8013c6a: bf38 it cc 8013c6c: 2200 movcc r2, #0 8013c6e: 18a3 adds r3, r4, r2 8013c70: 50a7 str r7, [r4, r2] 8013c72: b107 cbz r7, 8013c76 8013c74: 3304 adds r3, #4 8013c76: 1b1a subs r2, r3, r4 8013c78: 42a3 cmp r3, r4 8013c7a: ea4f 02a2 mov.w r2, r2, asr #2 8013c7e: bf08 it eq 8013c80: 2300 moveq r3, #0 8013c82: 6102 str r2, [r0, #16] 8013c84: bf08 it eq 8013c86: 6143 streq r3, [r0, #20] 8013c88: e8bd 83f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc} 8013c8c: f8dc c000 ldr.w ip, [ip] 8013c90: fa0c fc08 lsl.w ip, ip, r8 8013c94: ea4c 0707 orr.w r7, ip, r7 8013c98: f849 7b04 str.w r7, [r9], #4 8013c9c: f85e 7b04 ldr.w r7, [lr], #4 8013ca0: 40cf lsrs r7, r1 8013ca2: e7da b.n 8013c5a 8013ca4: f851 cb04 ldr.w ip, [r1], #4 8013ca8: f847 cf04 str.w ip, [r7, #4]! 8013cac: e7c3 b.n 8013c36 8013cae: 4623 mov r3, r4 8013cb0: e7e1 b.n 8013c76 08013cb2 <__hexdig_fun>: 8013cb2: f1a0 0330 sub.w r3, r0, #48 @ 0x30 8013cb6: 2b09 cmp r3, #9 8013cb8: d802 bhi.n 8013cc0 <__hexdig_fun+0xe> 8013cba: 3820 subs r0, #32 8013cbc: b2c0 uxtb r0, r0 8013cbe: 4770 bx lr 8013cc0: f1a0 0361 sub.w r3, r0, #97 @ 0x61 8013cc4: 2b05 cmp r3, #5 8013cc6: d801 bhi.n 8013ccc <__hexdig_fun+0x1a> 8013cc8: 3847 subs r0, #71 @ 0x47 8013cca: e7f7 b.n 8013cbc <__hexdig_fun+0xa> 8013ccc: f1a0 0341 sub.w r3, r0, #65 @ 0x41 8013cd0: 2b05 cmp r3, #5 8013cd2: d801 bhi.n 8013cd8 <__hexdig_fun+0x26> 8013cd4: 3827 subs r0, #39 @ 0x27 8013cd6: e7f1 b.n 8013cbc <__hexdig_fun+0xa> 8013cd8: 2000 movs r0, #0 8013cda: 4770 bx lr 08013cdc <__gethex>: 8013cdc: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 8013ce0: b085 sub sp, #20 8013ce2: 468a mov sl, r1 8013ce4: 9302 str r3, [sp, #8] 8013ce6: 680b ldr r3, [r1, #0] 8013ce8: 9001 str r0, [sp, #4] 8013cea: 4690 mov r8, r2 8013cec: 1c9c adds r4, r3, #2 8013cee: 46a1 mov r9, r4 8013cf0: f814 0b01 ldrb.w r0, [r4], #1 8013cf4: 2830 cmp r0, #48 @ 0x30 8013cf6: d0fa beq.n 8013cee <__gethex+0x12> 8013cf8: eba9 0303 sub.w r3, r9, r3 8013cfc: f1a3 0b02 sub.w fp, r3, #2 8013d00: f7ff ffd7 bl 8013cb2 <__hexdig_fun> 8013d04: 4605 mov r5, r0 8013d06: 2800 cmp r0, #0 8013d08: d168 bne.n 8013ddc <__gethex+0x100> 8013d0a: 49a0 ldr r1, [pc, #640] @ (8013f8c <__gethex+0x2b0>) 8013d0c: 2201 movs r2, #1 8013d0e: 4648 mov r0, r9 8013d10: f7fc fbf6 bl 8010500 8013d14: 4607 mov r7, r0 8013d16: 2800 cmp r0, #0 8013d18: d167 bne.n 8013dea <__gethex+0x10e> 8013d1a: f899 0001 ldrb.w r0, [r9, #1] 8013d1e: 4626 mov r6, r4 8013d20: f7ff ffc7 bl 8013cb2 <__hexdig_fun> 8013d24: 2800 cmp r0, #0 8013d26: d062 beq.n 8013dee <__gethex+0x112> 8013d28: 4623 mov r3, r4 8013d2a: 7818 ldrb r0, [r3, #0] 8013d2c: 2830 cmp r0, #48 @ 0x30 8013d2e: 4699 mov r9, r3 8013d30: f103 0301 add.w r3, r3, #1 8013d34: d0f9 beq.n 8013d2a <__gethex+0x4e> 8013d36: f7ff ffbc bl 8013cb2 <__hexdig_fun> 8013d3a: fab0 f580 clz r5, r0 8013d3e: 096d lsrs r5, r5, #5 8013d40: f04f 0b01 mov.w fp, #1 8013d44: 464a mov r2, r9 8013d46: 4616 mov r6, r2 8013d48: 3201 adds r2, #1 8013d4a: 7830 ldrb r0, [r6, #0] 8013d4c: f7ff ffb1 bl 8013cb2 <__hexdig_fun> 8013d50: 2800 cmp r0, #0 8013d52: d1f8 bne.n 8013d46 <__gethex+0x6a> 8013d54: 498d ldr r1, [pc, #564] @ (8013f8c <__gethex+0x2b0>) 8013d56: 2201 movs r2, #1 8013d58: 4630 mov r0, r6 8013d5a: f7fc fbd1 bl 8010500 8013d5e: 2800 cmp r0, #0 8013d60: d13f bne.n 8013de2 <__gethex+0x106> 8013d62: b944 cbnz r4, 8013d76 <__gethex+0x9a> 8013d64: 1c74 adds r4, r6, #1 8013d66: 4622 mov r2, r4 8013d68: 4616 mov r6, r2 8013d6a: 3201 adds r2, #1 8013d6c: 7830 ldrb r0, [r6, #0] 8013d6e: f7ff ffa0 bl 8013cb2 <__hexdig_fun> 8013d72: 2800 cmp r0, #0 8013d74: d1f8 bne.n 8013d68 <__gethex+0x8c> 8013d76: 1ba4 subs r4, r4, r6 8013d78: 00a7 lsls r7, r4, #2 8013d7a: 7833 ldrb r3, [r6, #0] 8013d7c: f003 03df and.w r3, r3, #223 @ 0xdf 8013d80: 2b50 cmp r3, #80 @ 0x50 8013d82: d13e bne.n 8013e02 <__gethex+0x126> 8013d84: 7873 ldrb r3, [r6, #1] 8013d86: 2b2b cmp r3, #43 @ 0x2b 8013d88: d033 beq.n 8013df2 <__gethex+0x116> 8013d8a: 2b2d cmp r3, #45 @ 0x2d 8013d8c: d034 beq.n 8013df8 <__gethex+0x11c> 8013d8e: 1c71 adds r1, r6, #1 8013d90: 2400 movs r4, #0 8013d92: 7808 ldrb r0, [r1, #0] 8013d94: f7ff ff8d bl 8013cb2 <__hexdig_fun> 8013d98: 1e43 subs r3, r0, #1 8013d9a: b2db uxtb r3, r3 8013d9c: 2b18 cmp r3, #24 8013d9e: d830 bhi.n 8013e02 <__gethex+0x126> 8013da0: f1a0 0210 sub.w r2, r0, #16 8013da4: f811 0f01 ldrb.w r0, [r1, #1]! 8013da8: f7ff ff83 bl 8013cb2 <__hexdig_fun> 8013dac: f100 3cff add.w ip, r0, #4294967295 @ 0xffffffff 8013db0: fa5f fc8c uxtb.w ip, ip 8013db4: f1bc 0f18 cmp.w ip, #24 8013db8: f04f 030a mov.w r3, #10 8013dbc: d91e bls.n 8013dfc <__gethex+0x120> 8013dbe: b104 cbz r4, 8013dc2 <__gethex+0xe6> 8013dc0: 4252 negs r2, r2 8013dc2: 4417 add r7, r2 8013dc4: f8ca 1000 str.w r1, [sl] 8013dc8: b1ed cbz r5, 8013e06 <__gethex+0x12a> 8013dca: f1bb 0f00 cmp.w fp, #0 8013dce: bf0c ite eq 8013dd0: 2506 moveq r5, #6 8013dd2: 2500 movne r5, #0 8013dd4: 4628 mov r0, r5 8013dd6: b005 add sp, #20 8013dd8: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} 8013ddc: 2500 movs r5, #0 8013dde: 462c mov r4, r5 8013de0: e7b0 b.n 8013d44 <__gethex+0x68> 8013de2: 2c00 cmp r4, #0 8013de4: d1c7 bne.n 8013d76 <__gethex+0x9a> 8013de6: 4627 mov r7, r4 8013de8: e7c7 b.n 8013d7a <__gethex+0x9e> 8013dea: 464e mov r6, r9 8013dec: 462f mov r7, r5 8013dee: 2501 movs r5, #1 8013df0: e7c3 b.n 8013d7a <__gethex+0x9e> 8013df2: 2400 movs r4, #0 8013df4: 1cb1 adds r1, r6, #2 8013df6: e7cc b.n 8013d92 <__gethex+0xb6> 8013df8: 2401 movs r4, #1 8013dfa: e7fb b.n 8013df4 <__gethex+0x118> 8013dfc: fb03 0002 mla r0, r3, r2, r0 8013e00: e7ce b.n 8013da0 <__gethex+0xc4> 8013e02: 4631 mov r1, r6 8013e04: e7de b.n 8013dc4 <__gethex+0xe8> 8013e06: eba6 0309 sub.w r3, r6, r9 8013e0a: 3b01 subs r3, #1 8013e0c: 4629 mov r1, r5 8013e0e: 2b07 cmp r3, #7 8013e10: dc0a bgt.n 8013e28 <__gethex+0x14c> 8013e12: 9801 ldr r0, [sp, #4] 8013e14: f7fd fc10 bl 8011638 <_Balloc> 8013e18: 4604 mov r4, r0 8013e1a: b940 cbnz r0, 8013e2e <__gethex+0x152> 8013e1c: 4b5c ldr r3, [pc, #368] @ (8013f90 <__gethex+0x2b4>) 8013e1e: 4602 mov r2, r0 8013e20: 21e4 movs r1, #228 @ 0xe4 8013e22: 485c ldr r0, [pc, #368] @ (8013f94 <__gethex+0x2b8>) 8013e24: f7fc fc90 bl 8010748 <__assert_func> 8013e28: 3101 adds r1, #1 8013e2a: 105b asrs r3, r3, #1 8013e2c: e7ef b.n 8013e0e <__gethex+0x132> 8013e2e: f100 0a14 add.w sl, r0, #20 8013e32: 2300 movs r3, #0 8013e34: 4655 mov r5, sl 8013e36: 469b mov fp, r3 8013e38: 45b1 cmp r9, r6 8013e3a: d337 bcc.n 8013eac <__gethex+0x1d0> 8013e3c: f845 bb04 str.w fp, [r5], #4 8013e40: eba5 050a sub.w r5, r5, sl 8013e44: 10ad asrs r5, r5, #2 8013e46: 6125 str r5, [r4, #16] 8013e48: 4658 mov r0, fp 8013e4a: f7fd fce7 bl 801181c <__hi0bits> 8013e4e: 016d lsls r5, r5, #5 8013e50: f8d8 6000 ldr.w r6, [r8] 8013e54: 1a2d subs r5, r5, r0 8013e56: 42b5 cmp r5, r6 8013e58: dd54 ble.n 8013f04 <__gethex+0x228> 8013e5a: 1bad subs r5, r5, r6 8013e5c: 4629 mov r1, r5 8013e5e: 4620 mov r0, r4 8013e60: f7fe f873 bl 8011f4a <__any_on> 8013e64: 4681 mov r9, r0 8013e66: b178 cbz r0, 8013e88 <__gethex+0x1ac> 8013e68: 1e6b subs r3, r5, #1 8013e6a: 1159 asrs r1, r3, #5 8013e6c: f003 021f and.w r2, r3, #31 8013e70: f85a 1021 ldr.w r1, [sl, r1, lsl #2] 8013e74: f04f 0901 mov.w r9, #1 8013e78: fa09 f202 lsl.w r2, r9, r2 8013e7c: 420a tst r2, r1 8013e7e: d003 beq.n 8013e88 <__gethex+0x1ac> 8013e80: 454b cmp r3, r9 8013e82: dc36 bgt.n 8013ef2 <__gethex+0x216> 8013e84: f04f 0902 mov.w r9, #2 8013e88: 4629 mov r1, r5 8013e8a: 4620 mov r0, r4 8013e8c: f7ff febf bl 8013c0e 8013e90: 442f add r7, r5 8013e92: f8d8 3008 ldr.w r3, [r8, #8] 8013e96: 42bb cmp r3, r7 8013e98: da42 bge.n 8013f20 <__gethex+0x244> 8013e9a: 9801 ldr r0, [sp, #4] 8013e9c: 4621 mov r1, r4 8013e9e: f7fd fc0b bl 80116b8 <_Bfree> 8013ea2: 9a0e ldr r2, [sp, #56] @ 0x38 8013ea4: 2300 movs r3, #0 8013ea6: 6013 str r3, [r2, #0] 8013ea8: 25a3 movs r5, #163 @ 0xa3 8013eaa: e793 b.n 8013dd4 <__gethex+0xf8> 8013eac: f816 2d01 ldrb.w r2, [r6, #-1]! 8013eb0: 2a2e cmp r2, #46 @ 0x2e 8013eb2: d012 beq.n 8013eda <__gethex+0x1fe> 8013eb4: 2b20 cmp r3, #32 8013eb6: d104 bne.n 8013ec2 <__gethex+0x1e6> 8013eb8: f845 bb04 str.w fp, [r5], #4 8013ebc: f04f 0b00 mov.w fp, #0 8013ec0: 465b mov r3, fp 8013ec2: 7830 ldrb r0, [r6, #0] 8013ec4: 9303 str r3, [sp, #12] 8013ec6: f7ff fef4 bl 8013cb2 <__hexdig_fun> 8013eca: 9b03 ldr r3, [sp, #12] 8013ecc: f000 000f and.w r0, r0, #15 8013ed0: 4098 lsls r0, r3 8013ed2: ea4b 0b00 orr.w fp, fp, r0 8013ed6: 3304 adds r3, #4 8013ed8: e7ae b.n 8013e38 <__gethex+0x15c> 8013eda: 45b1 cmp r9, r6 8013edc: d8ea bhi.n 8013eb4 <__gethex+0x1d8> 8013ede: 492b ldr r1, [pc, #172] @ (8013f8c <__gethex+0x2b0>) 8013ee0: 9303 str r3, [sp, #12] 8013ee2: 2201 movs r2, #1 8013ee4: 4630 mov r0, r6 8013ee6: f7fc fb0b bl 8010500 8013eea: 9b03 ldr r3, [sp, #12] 8013eec: 2800 cmp r0, #0 8013eee: d1e1 bne.n 8013eb4 <__gethex+0x1d8> 8013ef0: e7a2 b.n 8013e38 <__gethex+0x15c> 8013ef2: 1ea9 subs r1, r5, #2 8013ef4: 4620 mov r0, r4 8013ef6: f7fe f828 bl 8011f4a <__any_on> 8013efa: 2800 cmp r0, #0 8013efc: d0c2 beq.n 8013e84 <__gethex+0x1a8> 8013efe: f04f 0903 mov.w r9, #3 8013f02: e7c1 b.n 8013e88 <__gethex+0x1ac> 8013f04: da09 bge.n 8013f1a <__gethex+0x23e> 8013f06: 1b75 subs r5, r6, r5 8013f08: 4621 mov r1, r4 8013f0a: 9801 ldr r0, [sp, #4] 8013f0c: 462a mov r2, r5 8013f0e: f7fd fde3 bl 8011ad8 <__lshift> 8013f12: 1b7f subs r7, r7, r5 8013f14: 4604 mov r4, r0 8013f16: f100 0a14 add.w sl, r0, #20 8013f1a: f04f 0900 mov.w r9, #0 8013f1e: e7b8 b.n 8013e92 <__gethex+0x1b6> 8013f20: f8d8 5004 ldr.w r5, [r8, #4] 8013f24: 42bd cmp r5, r7 8013f26: dd6f ble.n 8014008 <__gethex+0x32c> 8013f28: 1bed subs r5, r5, r7 8013f2a: 42ae cmp r6, r5 8013f2c: dc34 bgt.n 8013f98 <__gethex+0x2bc> 8013f2e: f8d8 300c ldr.w r3, [r8, #12] 8013f32: 2b02 cmp r3, #2 8013f34: d022 beq.n 8013f7c <__gethex+0x2a0> 8013f36: 2b03 cmp r3, #3 8013f38: d024 beq.n 8013f84 <__gethex+0x2a8> 8013f3a: 2b01 cmp r3, #1 8013f3c: d115 bne.n 8013f6a <__gethex+0x28e> 8013f3e: 42ae cmp r6, r5 8013f40: d113 bne.n 8013f6a <__gethex+0x28e> 8013f42: 2e01 cmp r6, #1 8013f44: d10b bne.n 8013f5e <__gethex+0x282> 8013f46: 9a02 ldr r2, [sp, #8] 8013f48: f8d8 3004 ldr.w r3, [r8, #4] 8013f4c: 6013 str r3, [r2, #0] 8013f4e: 2301 movs r3, #1 8013f50: 6123 str r3, [r4, #16] 8013f52: f8ca 3000 str.w r3, [sl] 8013f56: 9b0e ldr r3, [sp, #56] @ 0x38 8013f58: 2562 movs r5, #98 @ 0x62 8013f5a: 601c str r4, [r3, #0] 8013f5c: e73a b.n 8013dd4 <__gethex+0xf8> 8013f5e: 1e71 subs r1, r6, #1 8013f60: 4620 mov r0, r4 8013f62: f7fd fff2 bl 8011f4a <__any_on> 8013f66: 2800 cmp r0, #0 8013f68: d1ed bne.n 8013f46 <__gethex+0x26a> 8013f6a: 9801 ldr r0, [sp, #4] 8013f6c: 4621 mov r1, r4 8013f6e: f7fd fba3 bl 80116b8 <_Bfree> 8013f72: 9a0e ldr r2, [sp, #56] @ 0x38 8013f74: 2300 movs r3, #0 8013f76: 6013 str r3, [r2, #0] 8013f78: 2550 movs r5, #80 @ 0x50 8013f7a: e72b b.n 8013dd4 <__gethex+0xf8> 8013f7c: 9b0f ldr r3, [sp, #60] @ 0x3c 8013f7e: 2b00 cmp r3, #0 8013f80: d1f3 bne.n 8013f6a <__gethex+0x28e> 8013f82: e7e0 b.n 8013f46 <__gethex+0x26a> 8013f84: 9b0f ldr r3, [sp, #60] @ 0x3c 8013f86: 2b00 cmp r3, #0 8013f88: d1dd bne.n 8013f46 <__gethex+0x26a> 8013f8a: e7ee b.n 8013f6a <__gethex+0x28e> 8013f8c: 080150b7 .word 0x080150b7 8013f90: 0801504d .word 0x0801504d 8013f94: 080150ed .word 0x080150ed 8013f98: 1e6f subs r7, r5, #1 8013f9a: f1b9 0f00 cmp.w r9, #0 8013f9e: d130 bne.n 8014002 <__gethex+0x326> 8013fa0: b127 cbz r7, 8013fac <__gethex+0x2d0> 8013fa2: 4639 mov r1, r7 8013fa4: 4620 mov r0, r4 8013fa6: f7fd ffd0 bl 8011f4a <__any_on> 8013faa: 4681 mov r9, r0 8013fac: 117a asrs r2, r7, #5 8013fae: 2301 movs r3, #1 8013fb0: f85a 2022 ldr.w r2, [sl, r2, lsl #2] 8013fb4: f007 071f and.w r7, r7, #31 8013fb8: 40bb lsls r3, r7 8013fba: 4213 tst r3, r2 8013fbc: 4629 mov r1, r5 8013fbe: 4620 mov r0, r4 8013fc0: bf18 it ne 8013fc2: f049 0902 orrne.w r9, r9, #2 8013fc6: f7ff fe22 bl 8013c0e 8013fca: f8d8 7004 ldr.w r7, [r8, #4] 8013fce: 1b76 subs r6, r6, r5 8013fd0: 2502 movs r5, #2 8013fd2: f1b9 0f00 cmp.w r9, #0 8013fd6: d047 beq.n 8014068 <__gethex+0x38c> 8013fd8: f8d8 300c ldr.w r3, [r8, #12] 8013fdc: 2b02 cmp r3, #2 8013fde: d015 beq.n 801400c <__gethex+0x330> 8013fe0: 2b03 cmp r3, #3 8013fe2: d017 beq.n 8014014 <__gethex+0x338> 8013fe4: 2b01 cmp r3, #1 8013fe6: d109 bne.n 8013ffc <__gethex+0x320> 8013fe8: f019 0f02 tst.w r9, #2 8013fec: d006 beq.n 8013ffc <__gethex+0x320> 8013fee: f8da 3000 ldr.w r3, [sl] 8013ff2: ea49 0903 orr.w r9, r9, r3 8013ff6: f019 0f01 tst.w r9, #1 8013ffa: d10e bne.n 801401a <__gethex+0x33e> 8013ffc: f045 0510 orr.w r5, r5, #16 8014000: e032 b.n 8014068 <__gethex+0x38c> 8014002: f04f 0901 mov.w r9, #1 8014006: e7d1 b.n 8013fac <__gethex+0x2d0> 8014008: 2501 movs r5, #1 801400a: e7e2 b.n 8013fd2 <__gethex+0x2f6> 801400c: 9b0f ldr r3, [sp, #60] @ 0x3c 801400e: f1c3 0301 rsb r3, r3, #1 8014012: 930f str r3, [sp, #60] @ 0x3c 8014014: 9b0f ldr r3, [sp, #60] @ 0x3c 8014016: 2b00 cmp r3, #0 8014018: d0f0 beq.n 8013ffc <__gethex+0x320> 801401a: f8d4 b010 ldr.w fp, [r4, #16] 801401e: f104 0314 add.w r3, r4, #20 8014022: ea4f 0a8b mov.w sl, fp, lsl #2 8014026: eb03 018b add.w r1, r3, fp, lsl #2 801402a: f04f 0c00 mov.w ip, #0 801402e: 4618 mov r0, r3 8014030: f853 2b04 ldr.w r2, [r3], #4 8014034: f1b2 3fff cmp.w r2, #4294967295 @ 0xffffffff 8014038: d01b beq.n 8014072 <__gethex+0x396> 801403a: 3201 adds r2, #1 801403c: 6002 str r2, [r0, #0] 801403e: 2d02 cmp r5, #2 8014040: f104 0314 add.w r3, r4, #20 8014044: d13c bne.n 80140c0 <__gethex+0x3e4> 8014046: f8d8 2000 ldr.w r2, [r8] 801404a: 3a01 subs r2, #1 801404c: 42b2 cmp r2, r6 801404e: d109 bne.n 8014064 <__gethex+0x388> 8014050: 1171 asrs r1, r6, #5 8014052: 2201 movs r2, #1 8014054: f853 3021 ldr.w r3, [r3, r1, lsl #2] 8014058: f006 061f and.w r6, r6, #31 801405c: fa02 f606 lsl.w r6, r2, r6 8014060: 421e tst r6, r3 8014062: d13a bne.n 80140da <__gethex+0x3fe> 8014064: f045 0520 orr.w r5, r5, #32 8014068: 9b0e ldr r3, [sp, #56] @ 0x38 801406a: 601c str r4, [r3, #0] 801406c: 9b02 ldr r3, [sp, #8] 801406e: 601f str r7, [r3, #0] 8014070: e6b0 b.n 8013dd4 <__gethex+0xf8> 8014072: 4299 cmp r1, r3 8014074: f843 cc04 str.w ip, [r3, #-4] 8014078: d8d9 bhi.n 801402e <__gethex+0x352> 801407a: 68a3 ldr r3, [r4, #8] 801407c: 459b cmp fp, r3 801407e: db17 blt.n 80140b0 <__gethex+0x3d4> 8014080: 6861 ldr r1, [r4, #4] 8014082: 9801 ldr r0, [sp, #4] 8014084: 3101 adds r1, #1 8014086: f7fd fad7 bl 8011638 <_Balloc> 801408a: 4681 mov r9, r0 801408c: b918 cbnz r0, 8014096 <__gethex+0x3ba> 801408e: 4b1a ldr r3, [pc, #104] @ (80140f8 <__gethex+0x41c>) 8014090: 4602 mov r2, r0 8014092: 2184 movs r1, #132 @ 0x84 8014094: e6c5 b.n 8013e22 <__gethex+0x146> 8014096: 6922 ldr r2, [r4, #16] 8014098: 3202 adds r2, #2 801409a: f104 010c add.w r1, r4, #12 801409e: 0092 lsls r2, r2, #2 80140a0: 300c adds r0, #12 80140a2: f7fc fb3c bl 801071e 80140a6: 4621 mov r1, r4 80140a8: 9801 ldr r0, [sp, #4] 80140aa: f7fd fb05 bl 80116b8 <_Bfree> 80140ae: 464c mov r4, r9 80140b0: 6923 ldr r3, [r4, #16] 80140b2: 1c5a adds r2, r3, #1 80140b4: eb04 0383 add.w r3, r4, r3, lsl #2 80140b8: 6122 str r2, [r4, #16] 80140ba: 2201 movs r2, #1 80140bc: 615a str r2, [r3, #20] 80140be: e7be b.n 801403e <__gethex+0x362> 80140c0: 6922 ldr r2, [r4, #16] 80140c2: 455a cmp r2, fp 80140c4: dd0b ble.n 80140de <__gethex+0x402> 80140c6: 2101 movs r1, #1 80140c8: 4620 mov r0, r4 80140ca: f7ff fda0 bl 8013c0e 80140ce: f8d8 3008 ldr.w r3, [r8, #8] 80140d2: 3701 adds r7, #1 80140d4: 42bb cmp r3, r7 80140d6: f6ff aee0 blt.w 8013e9a <__gethex+0x1be> 80140da: 2501 movs r5, #1 80140dc: e7c2 b.n 8014064 <__gethex+0x388> 80140de: f016 061f ands.w r6, r6, #31 80140e2: d0fa beq.n 80140da <__gethex+0x3fe> 80140e4: 4453 add r3, sl 80140e6: f1c6 0620 rsb r6, r6, #32 80140ea: f853 0c04 ldr.w r0, [r3, #-4] 80140ee: f7fd fb95 bl 801181c <__hi0bits> 80140f2: 42b0 cmp r0, r6 80140f4: dbe7 blt.n 80140c6 <__gethex+0x3ea> 80140f6: e7f0 b.n 80140da <__gethex+0x3fe> 80140f8: 0801504d .word 0x0801504d 080140fc : 80140fc: f1c2 0208 rsb r2, r2, #8 8014100: 0092 lsls r2, r2, #2 8014102: b570 push {r4, r5, r6, lr} 8014104: f1c2 0620 rsb r6, r2, #32 8014108: 6843 ldr r3, [r0, #4] 801410a: 6804 ldr r4, [r0, #0] 801410c: fa03 f506 lsl.w r5, r3, r6 8014110: 432c orrs r4, r5 8014112: 40d3 lsrs r3, r2 8014114: 6004 str r4, [r0, #0] 8014116: f840 3f04 str.w r3, [r0, #4]! 801411a: 4288 cmp r0, r1 801411c: d3f4 bcc.n 8014108 801411e: bd70 pop {r4, r5, r6, pc} 08014120 <__match>: 8014120: b530 push {r4, r5, lr} 8014122: 6803 ldr r3, [r0, #0] 8014124: 3301 adds r3, #1 8014126: f811 4b01 ldrb.w r4, [r1], #1 801412a: b914 cbnz r4, 8014132 <__match+0x12> 801412c: 6003 str r3, [r0, #0] 801412e: 2001 movs r0, #1 8014130: bd30 pop {r4, r5, pc} 8014132: f813 2b01 ldrb.w r2, [r3], #1 8014136: f1a2 0541 sub.w r5, r2, #65 @ 0x41 801413a: 2d19 cmp r5, #25 801413c: bf98 it ls 801413e: 3220 addls r2, #32 8014140: 42a2 cmp r2, r4 8014142: d0f0 beq.n 8014126 <__match+0x6> 8014144: 2000 movs r0, #0 8014146: e7f3 b.n 8014130 <__match+0x10> 08014148 <__hexnan>: 8014148: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 801414c: 680b ldr r3, [r1, #0] 801414e: 6801 ldr r1, [r0, #0] 8014150: 115e asrs r6, r3, #5 8014152: eb02 0686 add.w r6, r2, r6, lsl #2 8014156: f013 031f ands.w r3, r3, #31 801415a: b087 sub sp, #28 801415c: bf18 it ne 801415e: 3604 addne r6, #4 8014160: 2500 movs r5, #0 8014162: 1f37 subs r7, r6, #4 8014164: 4682 mov sl, r0 8014166: 4690 mov r8, r2 8014168: 9301 str r3, [sp, #4] 801416a: f846 5c04 str.w r5, [r6, #-4] 801416e: 46b9 mov r9, r7 8014170: 463c mov r4, r7 8014172: 9502 str r5, [sp, #8] 8014174: 46ab mov fp, r5 8014176: 784a ldrb r2, [r1, #1] 8014178: 1c4b adds r3, r1, #1 801417a: 9303 str r3, [sp, #12] 801417c: b342 cbz r2, 80141d0 <__hexnan+0x88> 801417e: 4610 mov r0, r2 8014180: 9105 str r1, [sp, #20] 8014182: 9204 str r2, [sp, #16] 8014184: f7ff fd95 bl 8013cb2 <__hexdig_fun> 8014188: 2800 cmp r0, #0 801418a: d151 bne.n 8014230 <__hexnan+0xe8> 801418c: 9a04 ldr r2, [sp, #16] 801418e: 9905 ldr r1, [sp, #20] 8014190: 2a20 cmp r2, #32 8014192: d818 bhi.n 80141c6 <__hexnan+0x7e> 8014194: 9b02 ldr r3, [sp, #8] 8014196: 459b cmp fp, r3 8014198: dd13 ble.n 80141c2 <__hexnan+0x7a> 801419a: 454c cmp r4, r9 801419c: d206 bcs.n 80141ac <__hexnan+0x64> 801419e: 2d07 cmp r5, #7 80141a0: dc04 bgt.n 80141ac <__hexnan+0x64> 80141a2: 462a mov r2, r5 80141a4: 4649 mov r1, r9 80141a6: 4620 mov r0, r4 80141a8: f7ff ffa8 bl 80140fc 80141ac: 4544 cmp r4, r8 80141ae: d952 bls.n 8014256 <__hexnan+0x10e> 80141b0: 2300 movs r3, #0 80141b2: f1a4 0904 sub.w r9, r4, #4 80141b6: f844 3c04 str.w r3, [r4, #-4] 80141ba: f8cd b008 str.w fp, [sp, #8] 80141be: 464c mov r4, r9 80141c0: 461d mov r5, r3 80141c2: 9903 ldr r1, [sp, #12] 80141c4: e7d7 b.n 8014176 <__hexnan+0x2e> 80141c6: 2a29 cmp r2, #41 @ 0x29 80141c8: d157 bne.n 801427a <__hexnan+0x132> 80141ca: 3102 adds r1, #2 80141cc: f8ca 1000 str.w r1, [sl] 80141d0: f1bb 0f00 cmp.w fp, #0 80141d4: d051 beq.n 801427a <__hexnan+0x132> 80141d6: 454c cmp r4, r9 80141d8: d206 bcs.n 80141e8 <__hexnan+0xa0> 80141da: 2d07 cmp r5, #7 80141dc: dc04 bgt.n 80141e8 <__hexnan+0xa0> 80141de: 462a mov r2, r5 80141e0: 4649 mov r1, r9 80141e2: 4620 mov r0, r4 80141e4: f7ff ff8a bl 80140fc 80141e8: 4544 cmp r4, r8 80141ea: d936 bls.n 801425a <__hexnan+0x112> 80141ec: f1a8 0204 sub.w r2, r8, #4 80141f0: 4623 mov r3, r4 80141f2: f853 1b04 ldr.w r1, [r3], #4 80141f6: f842 1f04 str.w r1, [r2, #4]! 80141fa: 429f cmp r7, r3 80141fc: d2f9 bcs.n 80141f2 <__hexnan+0xaa> 80141fe: 1b3b subs r3, r7, r4 8014200: f023 0303 bic.w r3, r3, #3 8014204: 3304 adds r3, #4 8014206: 3401 adds r4, #1 8014208: 3e03 subs r6, #3 801420a: 42b4 cmp r4, r6 801420c: bf88 it hi 801420e: 2304 movhi r3, #4 8014210: 4443 add r3, r8 8014212: 2200 movs r2, #0 8014214: f843 2b04 str.w r2, [r3], #4 8014218: 429f cmp r7, r3 801421a: d2fb bcs.n 8014214 <__hexnan+0xcc> 801421c: 683b ldr r3, [r7, #0] 801421e: b91b cbnz r3, 8014228 <__hexnan+0xe0> 8014220: 4547 cmp r7, r8 8014222: d128 bne.n 8014276 <__hexnan+0x12e> 8014224: 2301 movs r3, #1 8014226: 603b str r3, [r7, #0] 8014228: 2005 movs r0, #5 801422a: b007 add sp, #28 801422c: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} 8014230: 3501 adds r5, #1 8014232: 2d08 cmp r5, #8 8014234: f10b 0b01 add.w fp, fp, #1 8014238: dd06 ble.n 8014248 <__hexnan+0x100> 801423a: 4544 cmp r4, r8 801423c: d9c1 bls.n 80141c2 <__hexnan+0x7a> 801423e: 2300 movs r3, #0 8014240: f844 3c04 str.w r3, [r4, #-4] 8014244: 2501 movs r5, #1 8014246: 3c04 subs r4, #4 8014248: 6822 ldr r2, [r4, #0] 801424a: f000 000f and.w r0, r0, #15 801424e: ea40 1002 orr.w r0, r0, r2, lsl #4 8014252: 6020 str r0, [r4, #0] 8014254: e7b5 b.n 80141c2 <__hexnan+0x7a> 8014256: 2508 movs r5, #8 8014258: e7b3 b.n 80141c2 <__hexnan+0x7a> 801425a: 9b01 ldr r3, [sp, #4] 801425c: 2b00 cmp r3, #0 801425e: d0dd beq.n 801421c <__hexnan+0xd4> 8014260: f1c3 0320 rsb r3, r3, #32 8014264: f04f 32ff mov.w r2, #4294967295 @ 0xffffffff 8014268: 40da lsrs r2, r3 801426a: f856 3c04 ldr.w r3, [r6, #-4] 801426e: 4013 ands r3, r2 8014270: f846 3c04 str.w r3, [r6, #-4] 8014274: e7d2 b.n 801421c <__hexnan+0xd4> 8014276: 3f04 subs r7, #4 8014278: e7d0 b.n 801421c <__hexnan+0xd4> 801427a: 2004 movs r0, #4 801427c: e7d5 b.n 801422a <__hexnan+0xe2> 0801427e <__ascii_mbtowc>: 801427e: b082 sub sp, #8 8014280: b901 cbnz r1, 8014284 <__ascii_mbtowc+0x6> 8014282: a901 add r1, sp, #4 8014284: b142 cbz r2, 8014298 <__ascii_mbtowc+0x1a> 8014286: b14b cbz r3, 801429c <__ascii_mbtowc+0x1e> 8014288: 7813 ldrb r3, [r2, #0] 801428a: 600b str r3, [r1, #0] 801428c: 7812 ldrb r2, [r2, #0] 801428e: 1e10 subs r0, r2, #0 8014290: bf18 it ne 8014292: 2001 movne r0, #1 8014294: b002 add sp, #8 8014296: 4770 bx lr 8014298: 4610 mov r0, r2 801429a: e7fb b.n 8014294 <__ascii_mbtowc+0x16> 801429c: f06f 0001 mvn.w r0, #1 80142a0: e7f8 b.n 8014294 <__ascii_mbtowc+0x16> 080142a2 <_realloc_r>: 80142a2: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} 80142a6: 4607 mov r7, r0 80142a8: 4614 mov r4, r2 80142aa: 460d mov r5, r1 80142ac: b921 cbnz r1, 80142b8 <_realloc_r+0x16> 80142ae: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr} 80142b2: 4611 mov r1, r2 80142b4: f7fd b934 b.w 8011520 <_malloc_r> 80142b8: b92a cbnz r2, 80142c6 <_realloc_r+0x24> 80142ba: f7fd f8bd bl 8011438 <_free_r> 80142be: 4625 mov r5, r4 80142c0: 4628 mov r0, r5 80142c2: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 80142c6: f000 f8dd bl 8014484 <_malloc_usable_size_r> 80142ca: 4284 cmp r4, r0 80142cc: 4606 mov r6, r0 80142ce: d802 bhi.n 80142d6 <_realloc_r+0x34> 80142d0: ebb4 0f50 cmp.w r4, r0, lsr #1 80142d4: d8f4 bhi.n 80142c0 <_realloc_r+0x1e> 80142d6: 4621 mov r1, r4 80142d8: 4638 mov r0, r7 80142da: f7fd f921 bl 8011520 <_malloc_r> 80142de: 4680 mov r8, r0 80142e0: b908 cbnz r0, 80142e6 <_realloc_r+0x44> 80142e2: 4645 mov r5, r8 80142e4: e7ec b.n 80142c0 <_realloc_r+0x1e> 80142e6: 42b4 cmp r4, r6 80142e8: 4622 mov r2, r4 80142ea: 4629 mov r1, r5 80142ec: bf28 it cs 80142ee: 4632 movcs r2, r6 80142f0: f7fc fa15 bl 801071e 80142f4: 4629 mov r1, r5 80142f6: 4638 mov r0, r7 80142f8: f7fd f89e bl 8011438 <_free_r> 80142fc: e7f1 b.n 80142e2 <_realloc_r+0x40> ... 08014300 <_strtoul_l.isra.0>: 8014300: e92d 43f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, lr} 8014304: 4e34 ldr r6, [pc, #208] @ (80143d8 <_strtoul_l.isra.0+0xd8>) 8014306: 4686 mov lr, r0 8014308: 460d mov r5, r1 801430a: 4628 mov r0, r5 801430c: f815 4b01 ldrb.w r4, [r5], #1 8014310: 5d37 ldrb r7, [r6, r4] 8014312: f017 0708 ands.w r7, r7, #8 8014316: d1f8 bne.n 801430a <_strtoul_l.isra.0+0xa> 8014318: 2c2d cmp r4, #45 @ 0x2d 801431a: d110 bne.n 801433e <_strtoul_l.isra.0+0x3e> 801431c: 782c ldrb r4, [r5, #0] 801431e: 2701 movs r7, #1 8014320: 1c85 adds r5, r0, #2 8014322: f033 0010 bics.w r0, r3, #16 8014326: d115 bne.n 8014354 <_strtoul_l.isra.0+0x54> 8014328: 2c30 cmp r4, #48 @ 0x30 801432a: d10d bne.n 8014348 <_strtoul_l.isra.0+0x48> 801432c: 7828 ldrb r0, [r5, #0] 801432e: f000 00df and.w r0, r0, #223 @ 0xdf 8014332: 2858 cmp r0, #88 @ 0x58 8014334: d108 bne.n 8014348 <_strtoul_l.isra.0+0x48> 8014336: 786c ldrb r4, [r5, #1] 8014338: 3502 adds r5, #2 801433a: 2310 movs r3, #16 801433c: e00a b.n 8014354 <_strtoul_l.isra.0+0x54> 801433e: 2c2b cmp r4, #43 @ 0x2b 8014340: bf04 itt eq 8014342: 782c ldrbeq r4, [r5, #0] 8014344: 1c85 addeq r5, r0, #2 8014346: e7ec b.n 8014322 <_strtoul_l.isra.0+0x22> 8014348: 2b00 cmp r3, #0 801434a: d1f6 bne.n 801433a <_strtoul_l.isra.0+0x3a> 801434c: 2c30 cmp r4, #48 @ 0x30 801434e: bf14 ite ne 8014350: 230a movne r3, #10 8014352: 2308 moveq r3, #8 8014354: f04f 38ff mov.w r8, #4294967295 @ 0xffffffff 8014358: 2600 movs r6, #0 801435a: fbb8 f8f3 udiv r8, r8, r3 801435e: fb03 f908 mul.w r9, r3, r8 8014362: ea6f 0909 mvn.w r9, r9 8014366: 4630 mov r0, r6 8014368: f1a4 0c30 sub.w ip, r4, #48 @ 0x30 801436c: f1bc 0f09 cmp.w ip, #9 8014370: d810 bhi.n 8014394 <_strtoul_l.isra.0+0x94> 8014372: 4664 mov r4, ip 8014374: 42a3 cmp r3, r4 8014376: dd1e ble.n 80143b6 <_strtoul_l.isra.0+0xb6> 8014378: f1b6 3fff cmp.w r6, #4294967295 @ 0xffffffff 801437c: d007 beq.n 801438e <_strtoul_l.isra.0+0x8e> 801437e: 4580 cmp r8, r0 8014380: d316 bcc.n 80143b0 <_strtoul_l.isra.0+0xb0> 8014382: d101 bne.n 8014388 <_strtoul_l.isra.0+0x88> 8014384: 45a1 cmp r9, r4 8014386: db13 blt.n 80143b0 <_strtoul_l.isra.0+0xb0> 8014388: fb00 4003 mla r0, r0, r3, r4 801438c: 2601 movs r6, #1 801438e: f815 4b01 ldrb.w r4, [r5], #1 8014392: e7e9 b.n 8014368 <_strtoul_l.isra.0+0x68> 8014394: f1a4 0c41 sub.w ip, r4, #65 @ 0x41 8014398: f1bc 0f19 cmp.w ip, #25 801439c: d801 bhi.n 80143a2 <_strtoul_l.isra.0+0xa2> 801439e: 3c37 subs r4, #55 @ 0x37 80143a0: e7e8 b.n 8014374 <_strtoul_l.isra.0+0x74> 80143a2: f1a4 0c61 sub.w ip, r4, #97 @ 0x61 80143a6: f1bc 0f19 cmp.w ip, #25 80143aa: d804 bhi.n 80143b6 <_strtoul_l.isra.0+0xb6> 80143ac: 3c57 subs r4, #87 @ 0x57 80143ae: e7e1 b.n 8014374 <_strtoul_l.isra.0+0x74> 80143b0: f04f 36ff mov.w r6, #4294967295 @ 0xffffffff 80143b4: e7eb b.n 801438e <_strtoul_l.isra.0+0x8e> 80143b6: 1c73 adds r3, r6, #1 80143b8: d106 bne.n 80143c8 <_strtoul_l.isra.0+0xc8> 80143ba: 2322 movs r3, #34 @ 0x22 80143bc: f8ce 3000 str.w r3, [lr] 80143c0: 4630 mov r0, r6 80143c2: b932 cbnz r2, 80143d2 <_strtoul_l.isra.0+0xd2> 80143c4: e8bd 83f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc} 80143c8: b107 cbz r7, 80143cc <_strtoul_l.isra.0+0xcc> 80143ca: 4240 negs r0, r0 80143cc: 2a00 cmp r2, #0 80143ce: d0f9 beq.n 80143c4 <_strtoul_l.isra.0+0xc4> 80143d0: b106 cbz r6, 80143d4 <_strtoul_l.isra.0+0xd4> 80143d2: 1e69 subs r1, r5, #1 80143d4: 6011 str r1, [r2, #0] 80143d6: e7f5 b.n 80143c4 <_strtoul_l.isra.0+0xc4> 80143d8: 080152a1 .word 0x080152a1 080143dc <_strtoul_r>: 80143dc: f7ff bf90 b.w 8014300 <_strtoul_l.isra.0> 080143e0 <__ascii_wctomb>: 80143e0: 4603 mov r3, r0 80143e2: 4608 mov r0, r1 80143e4: b141 cbz r1, 80143f8 <__ascii_wctomb+0x18> 80143e6: 2aff cmp r2, #255 @ 0xff 80143e8: d904 bls.n 80143f4 <__ascii_wctomb+0x14> 80143ea: 228a movs r2, #138 @ 0x8a 80143ec: 601a str r2, [r3, #0] 80143ee: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff 80143f2: 4770 bx lr 80143f4: 700a strb r2, [r1, #0] 80143f6: 2001 movs r0, #1 80143f8: 4770 bx lr 080143fa <_raise_r>: 80143fa: 291f cmp r1, #31 80143fc: b538 push {r3, r4, r5, lr} 80143fe: 4605 mov r5, r0 8014400: 460c mov r4, r1 8014402: d904 bls.n 801440e <_raise_r+0x14> 8014404: 2316 movs r3, #22 8014406: 6003 str r3, [r0, #0] 8014408: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff 801440c: bd38 pop {r3, r4, r5, pc} 801440e: 6bc2 ldr r2, [r0, #60] @ 0x3c 8014410: b112 cbz r2, 8014418 <_raise_r+0x1e> 8014412: f852 3021 ldr.w r3, [r2, r1, lsl #2] 8014416: b94b cbnz r3, 801442c <_raise_r+0x32> 8014418: 4628 mov r0, r5 801441a: f000 f831 bl 8014480 <_getpid_r> 801441e: 4622 mov r2, r4 8014420: 4601 mov r1, r0 8014422: 4628 mov r0, r5 8014424: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr} 8014428: f000 b818 b.w 801445c <_kill_r> 801442c: 2b01 cmp r3, #1 801442e: d00a beq.n 8014446 <_raise_r+0x4c> 8014430: 1c59 adds r1, r3, #1 8014432: d103 bne.n 801443c <_raise_r+0x42> 8014434: 2316 movs r3, #22 8014436: 6003 str r3, [r0, #0] 8014438: 2001 movs r0, #1 801443a: e7e7 b.n 801440c <_raise_r+0x12> 801443c: 2100 movs r1, #0 801443e: f842 1024 str.w r1, [r2, r4, lsl #2] 8014442: 4620 mov r0, r4 8014444: 4798 blx r3 8014446: 2000 movs r0, #0 8014448: e7e0 b.n 801440c <_raise_r+0x12> ... 0801444c : 801444c: 4b02 ldr r3, [pc, #8] @ (8014458 ) 801444e: 4601 mov r1, r0 8014450: 6818 ldr r0, [r3, #0] 8014452: f7ff bfd2 b.w 80143fa <_raise_r> 8014456: bf00 nop 8014458: 200000e0 .word 0x200000e0 0801445c <_kill_r>: 801445c: b538 push {r3, r4, r5, lr} 801445e: 4d07 ldr r5, [pc, #28] @ (801447c <_kill_r+0x20>) 8014460: 2300 movs r3, #0 8014462: 4604 mov r4, r0 8014464: 4608 mov r0, r1 8014466: 4611 mov r1, r2 8014468: 602b str r3, [r5, #0] 801446a: f7ef facf bl 8003a0c <_kill> 801446e: 1c43 adds r3, r0, #1 8014470: d102 bne.n 8014478 <_kill_r+0x1c> 8014472: 682b ldr r3, [r5, #0] 8014474: b103 cbz r3, 8014478 <_kill_r+0x1c> 8014476: 6023 str r3, [r4, #0] 8014478: bd38 pop {r3, r4, r5, pc} 801447a: bf00 nop 801447c: 200036a0 .word 0x200036a0 08014480 <_getpid_r>: 8014480: f7ef babc b.w 80039fc <_getpid> 08014484 <_malloc_usable_size_r>: 8014484: f851 3c04 ldr.w r3, [r1, #-4] 8014488: 1f18 subs r0, r3, #4 801448a: 2b00 cmp r3, #0 801448c: bfbc itt lt 801448e: 580b ldrlt r3, [r1, r0] 8014490: 18c0 addlt r0, r0, r3 8014492: 4770 bx lr 08014494 <_init>: 8014494: b5f8 push {r3, r4, r5, r6, r7, lr} 8014496: bf00 nop 8014498: bcf8 pop {r3, r4, r5, r6, r7} 801449a: bc08 pop {r3} 801449c: 469e mov lr, r3 801449e: 4770 bx lr 080144a0 <_fini>: 80144a0: b5f8 push {r3, r4, r5, r6, r7, lr} 80144a2: bf00 nop 80144a4: bcf8 pop {r3, r4, r5, r6, r7} 80144a6: bc08 pop {r3} 80144a8: 469e mov lr, r3 80144aa: 4770 bx lr