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P5_SETR2/Components/n25q128a/Release_Notes.html
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P5_SETR2/Components/n25q128a/Release_Notes.html
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<!DOCTYPE html>
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<html xmlns="http://www.w3.org/1999/xhtml" lang="en" xml:lang="en">
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<head>
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<meta charset="utf-8" />
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<meta name="generator" content="pandoc" />
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<meta name="viewport" content="width=device-width, initial-scale=1.0, user-scalable=yes" />
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<title>Release Notes for N25Q128A Component Drivers</title>
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<style type="text/css">
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code{white-space: pre-wrap;}
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span.smallcaps{font-variant: small-caps;}
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span.underline{text-decoration: underline;}
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div.column{display: inline-block; vertical-align: top; width: 50%;}
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</style>
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<link rel="stylesheet" href="../../../../_htmresc/mini-st.css" />
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<!--[if lt IE 9]>
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<script src="//cdnjs.cloudflare.com/ajax/libs/html5shiv/3.7.3/html5shiv-printshiv.min.js"></script>
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<![endif]-->
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</head>
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<body>
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<div class="row">
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<div class="col-sm-12 col-lg-4">
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<div class="card fluid">
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<div class="sectione dark">
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<center>
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<h1 id="release-notes-for-n25q128a-component-drivers"><small>Release Notes for</small> <mark>N25Q128A Component Drivers</mark></h1>
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<p>Copyright © 2015 STMicroelectronics<br />
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</p>
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<a href="https://www.st.com" class="logo"><img src="../../../../_htmresc/st_logo.png" alt="ST logo" /></a>
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</center>
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</div>
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</div>
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<h1 id="license">License</h1>
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<p>Licensed by ST under BSD 3-Clause license (the "License"). You may not use this package except in compliance with the License. You may obtain a copy of the License at:</p>
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<p><a href="https://opensource.org/licenses/BSD-3-Clause">https://opensource.org/licenses/BSD-3-Clause</a></p>
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<h1 id="purpose">Purpose</h1>
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<p>This directory contains the N25Q128A component drivers.</p>
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</div>
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<div class="col-sm-12 col-lg-8">
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<h1 id="update-history">Update History</h1>
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<div class="collapse">
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<input type="checkbox" id="collapse-section22" checked aria-hidden="true"> <label for="collapse-section22" aria-hidden="true">V1.0.2 / 03-April-2019</label>
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<div>
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<h2 id="main-changes">Main Changes</h2>
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<ul>
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<li>Update release notes format</li>
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</ul>
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</div>
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</div>
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<div class="collapse">
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<input type="checkbox" id="collapse-section19" aria-hidden="true"> <label for="collapse-section19" aria-hidden="true">V1.0.1 / 31-August-2018</label>
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<div>
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<h2 id="main-changes-1">Main Changes</h2>
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<ul>
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<li>Reformat the BSD 3-Clause license declaration in the files header (replace license terms by a web reference to OSI website where those terms lie)</li>
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</ul>
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</div>
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</div>
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<div class="collapse">
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<input type="checkbox" id="collapse-section18" aria-hidden="true"> <label for="collapse-section18" aria-hidden="true">V1.0.0 / 29-May-2015</label>
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<div>
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<h2 id="main-changes-2">Main Changes</h2>
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<ul>
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<li>First official release of N25Q128A QuadSPI Flash Component driver</li>
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</ul>
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</div>
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</div>
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</div>
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</div>
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<footer class="sticky">
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For complete documentation on <mark>STM32 Microcontrollers</mark> , visit: <a href="http://www.st.com/STM32">http://www.st.com/STM32</a>
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</footer>
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</body>
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</html>
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P5_SETR2/Components/n25q128a/n25q128a.h
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P5_SETR2/Components/n25q128a/n25q128a.h
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/**
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******************************************************************************
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* @file n25q128a.h
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* @author MCD Application Team
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* @brief This file contains all the description of the N25Q128A QSPI memory.
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******************************************************************************
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* @attention
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*
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* <h2><center>© Copyright (c) 2015 STMicroelectronics.
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* All rights reserved.</center></h2>
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*
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* This software component is licensed by ST under BSD 3-Clause license,
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* the "License"; You may not use this file except in compliance with the
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* License. You may obtain a copy of the License at:
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* opensource.org/licenses/BSD-3-Clause
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*
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******************************************************************************
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*/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef __N25Q128A_H
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#define __N25Q128A_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Includes ------------------------------------------------------------------*/
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/** @addtogroup BSP
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* @{
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*/
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/** @addtogroup Components
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* @{
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*/
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/** @addtogroup n25q128a
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* @{
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*/
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/** @defgroup N25Q128A_Exported_Types
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* @{
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*/
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/**
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* @}
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*/
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/** @defgroup N25Q128A_Exported_Constants
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* @{
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*/
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/**
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* @brief N25Q128A Configuration
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*/
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#define N25Q128A_FLASH_SIZE 0x1000000 /* 128 MBits => 16MBytes */
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#define N25Q128A_SECTOR_SIZE 0x10000 /* 256 sectors of 64KBytes */
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#define N25Q128A_SUBSECTOR_SIZE 0x1000 /* 4096 subsectors of 4kBytes */
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#define N25Q128A_PAGE_SIZE 0x100 /* 65536 pages of 256 bytes */
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#define N25Q128A_DUMMY_CYCLES_READ 8
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#define N25Q128A_DUMMY_CYCLES_READ_QUAD 10
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#define N25Q128A_BULK_ERASE_MAX_TIME 250000
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#define N25Q128A_SECTOR_ERASE_MAX_TIME 3000
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#define N25Q128A_SUBSECTOR_ERASE_MAX_TIME 800
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/**
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* @brief N25Q128A Commands
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*/
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/* Reset Operations */
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#define RESET_ENABLE_CMD 0x66
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#define RESET_MEMORY_CMD 0x99
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/* Identification Operations */
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#define READ_ID_CMD 0x9E
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#define READ_ID_CMD2 0x9F
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#define MULTIPLE_IO_READ_ID_CMD 0xAF
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#define READ_SERIAL_FLASH_DISCO_PARAM_CMD 0x5A
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/* Read Operations */
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#define READ_CMD 0x03
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#define FAST_READ_CMD 0x0B
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#define DUAL_OUT_FAST_READ_CMD 0x3B
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#define DUAL_INOUT_FAST_READ_CMD 0xBB
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#define QUAD_OUT_FAST_READ_CMD 0x6B
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#define QUAD_INOUT_FAST_READ_CMD 0xEB
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/* Write Operations */
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#define WRITE_ENABLE_CMD 0x06
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#define WRITE_DISABLE_CMD 0x04
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/* Register Operations */
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#define READ_STATUS_REG_CMD 0x05
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#define WRITE_STATUS_REG_CMD 0x01
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#define READ_LOCK_REG_CMD 0xE8
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#define WRITE_LOCK_REG_CMD 0xE5
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#define READ_FLAG_STATUS_REG_CMD 0x70
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#define CLEAR_FLAG_STATUS_REG_CMD 0x50
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#define READ_NONVOL_CFG_REG_CMD 0xB5
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#define WRITE_NONVOL_CFG_REG_CMD 0xB1
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#define READ_VOL_CFG_REG_CMD 0x85
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#define WRITE_VOL_CFG_REG_CMD 0x81
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#define READ_ENHANCED_VOL_CFG_REG_CMD 0x65
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#define WRITE_ENHANCED_VOL_CFG_REG_CMD 0x61
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/* Program Operations */
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#define PAGE_PROG_CMD 0x02
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#define DUAL_IN_FAST_PROG_CMD 0xA2
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#define EXT_DUAL_IN_FAST_PROG_CMD 0xD2
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#define QUAD_IN_FAST_PROG_CMD 0x32
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#define EXT_QUAD_IN_FAST_PROG_CMD 0x12
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/* Erase Operations */
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#define SUBSECTOR_ERASE_CMD 0x20
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#define SECTOR_ERASE_CMD 0xD8
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#define BULK_ERASE_CMD 0xC7
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#define PROG_ERASE_RESUME_CMD 0x7A
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#define PROG_ERASE_SUSPEND_CMD 0x75
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/* One-Time Programmable Operations */
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#define READ_OTP_ARRAY_CMD 0x4B
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#define PROG_OTP_ARRAY_CMD 0x42
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/**
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* @brief N25Q128A Registers
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*/
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/* Status Register */
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#define N25Q128A_SR_WIP ((uint8_t)0x01) /*!< Write in progress */
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#define N25Q128A_SR_WREN ((uint8_t)0x02) /*!< Write enable latch */
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#define N25Q128A_SR_BLOCKPR ((uint8_t)0x5C) /*!< Block protected against program and erase operations */
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#define N25Q128A_SR_PRBOTTOM ((uint8_t)0x20) /*!< Protected memory area defined by BLOCKPR starts from top or bottom */
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#define N25Q128A_SR_SRWREN ((uint8_t)0x80) /*!< Status register write enable/disable */
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/* Nonvolatile Configuration Register */
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#define N25Q128A_NVCR_LOCK ((uint16_t)0x0001) /*!< Lock nonvolatile configuration register */
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#define N25Q128A_NVCR_DUAL ((uint16_t)0x0004) /*!< Dual I/O protocol */
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#define N25Q128A_NVCR_QUAB ((uint16_t)0x0008) /*!< Quad I/O protocol */
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#define N25Q128A_NVCR_RH ((uint16_t)0x0010) /*!< Reset/hold */
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#define N25Q128A_NVCR_ODS ((uint16_t)0x01C0) /*!< Output driver strength */
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#define N25Q128A_NVCR_XIP ((uint16_t)0x0E00) /*!< XIP mode at power-on reset */
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#define N25Q128A_NVCR_NB_DUMMY ((uint16_t)0xF000) /*!< Number of dummy clock cycles */
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/* Volatile Configuration Register */
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#define N25Q128A_VCR_WRAP ((uint8_t)0x03) /*!< Wrap */
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#define N25Q128A_VCR_XIP ((uint8_t)0x08) /*!< XIP */
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#define N25Q128A_VCR_NB_DUMMY ((uint8_t)0xF0) /*!< Number of dummy clock cycles */
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/* Enhanced Volatile Configuration Register */
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#define N25Q128A_EVCR_ODS ((uint8_t)0x07) /*!< Output driver strength */
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#define N25Q128A_EVCR_VPPA ((uint8_t)0x08) /*!< Vpp accelerator */
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#define N25Q128A_EVCR_RH ((uint8_t)0x10) /*!< Reset/hold */
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#define N25Q128A_EVCR_DUAL ((uint8_t)0x40) /*!< Dual I/O protocol */
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#define N25Q128A_EVCR_QUAD ((uint8_t)0x80) /*!< Quad I/O protocol */
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/* Flag Status Register */
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#define N25Q128A_FSR_PRERR ((uint8_t)0x02) /*!< Protection error */
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#define N25Q128A_FSR_PGSUS ((uint8_t)0x04) /*!< Program operation suspended */
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#define N25Q128A_FSR_VPPERR ((uint8_t)0x08) /*!< Invalid voltage during program or erase */
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#define N25Q128A_FSR_PGERR ((uint8_t)0x10) /*!< Program error */
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#define N25Q128A_FSR_ERERR ((uint8_t)0x20) /*!< Erase error */
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#define N25Q128A_FSR_ERSUS ((uint8_t)0x40) /*!< Erase operation suspended */
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#define N25Q128A_FSR_READY ((uint8_t)0x80) /*!< Ready or command in progress */
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/**
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* @}
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*/
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/** @defgroup N25Q128A_Exported_Functions
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* @{
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*/
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/**
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* @}
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*/
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/**
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* @}
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*/
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/**
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* @}
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*/
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/**
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* @}
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*/
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#ifdef __cplusplus
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}
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#endif
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#endif /* __N25Q128A_H */
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/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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