add P4 & P5
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193
P5_SETR2/Components/mx25r6435f/mx25r6435f.h
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193
P5_SETR2/Components/mx25r6435f/mx25r6435f.h
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/**
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******************************************************************************
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* @file mx25r6435f.h
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* @author MCD Application Team
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* @brief This file contains all the description of the MX25R6435F QSPI memory.
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******************************************************************************
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* @attention
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*
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* <h2><center>© Copyright (c) 2017 STMicroelectronics.
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* All rights reserved.</center></h2>
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*
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* This software component is licensed by ST under BSD 3-Clause license,
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* the "License"; You may not use this file except in compliance with the
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* License. You may obtain a copy of the License at:
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* opensource.org/licenses/BSD-3-Clause
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*
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******************************************************************************
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*/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef __MX25R6435F_H
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#define __MX25R6435F_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Includes ------------------------------------------------------------------*/
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/** @addtogroup BSP
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* @{
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*/
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/** @addtogroup Components
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* @{
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*/
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/** @addtogroup mx25r6435f
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* @{
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*/
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/** @defgroup MX25R6435F_Exported_Types
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* @{
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*/
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/**
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* @}
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*/
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/** @defgroup MX25R6435F_Exported_Constants
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* @{
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*/
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/**
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* @brief MX25R6435F Configuration
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*/
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#define MX25R6435F_FLASH_SIZE 0x800000 /* 64 MBits => 8MBytes */
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#define MX25R6435F_BLOCK_SIZE 0x10000 /* 128 blocks of 64KBytes */
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#define MX25R6435F_SUBBLOCK_SIZE 0x8000 /* 256 blocks of 32KBytes */
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#define MX25R6435F_SECTOR_SIZE 0x1000 /* 2048 sectors of 4kBytes */
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#define MX25R6435F_PAGE_SIZE 0x100 /* 32768 pages of 256 bytes */
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#define MX25R6435F_DUMMY_CYCLES_READ 8
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#define MX25R6435F_DUMMY_CYCLES_READ_DUAL 4
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#define MX25R6435F_DUMMY_CYCLES_READ_QUAD 4
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#define MX25R6435F_DUMMY_CYCLES_2READ 2
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#define MX25R6435F_DUMMY_CYCLES_4READ 4
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#define MX25R6435F_ALT_BYTES_PE_MODE 0xA5
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#define MX25R6435F_ALT_BYTES_NO_PE_MODE 0xAA
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#define MX25R6435F_CHIP_ERASE_MAX_TIME 240000
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#define MX25R6435F_BLOCK_ERASE_MAX_TIME 3500
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#define MX25R6435F_SUBBLOCK_ERASE_MAX_TIME 3000
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#define MX25R6435F_SECTOR_ERASE_MAX_TIME 240
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/**
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* @brief MX25R6435F Commands
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*/
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/* Read Operations */
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#define READ_CMD 0x03
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#define FAST_READ_CMD 0x0B
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#define DUAL_OUT_READ_CMD 0x3B
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#define DUAL_INOUT_READ_CMD 0xBB
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#define QUAD_OUT_READ_CMD 0x6B
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#define QUAD_INOUT_READ_CMD 0xEB
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/* Program Operations */
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#define PAGE_PROG_CMD 0x02
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#define QUAD_PAGE_PROG_CMD 0x38
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/* Erase Operations */
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#define SECTOR_ERASE_CMD 0x20
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#define SUBBLOCK_ERASE_CMD 0x52
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#define BLOCK_ERASE_CMD 0xD8
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#define CHIP_ERASE_CMD 0x60
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#define CHIP_ERASE_CMD_2 0xC7
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#define PROG_ERASE_RESUME_CMD 0x7A
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#define PROG_ERASE_RESUME_CMD_2 0x30
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#define PROG_ERASE_SUSPEND_CMD 0x75
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#define PROG_ERASE_SUSPEND_CMD_2 0xB0
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/* Identification Operations */
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#define READ_ID_CMD 0x9F
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#define READ_ELECTRONIC_ID_CMD 0xAB
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#define READ_ELEC_MANUFACTURER_DEVICE_ID_CMD 0x90
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#define READ_SERIAL_FLASH_DISCO_PARAM_CMD 0x5A
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/* Write Operations */
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#define WRITE_ENABLE_CMD 0x06
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#define WRITE_DISABLE_CMD 0x04
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/* Register Operations */
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#define READ_STATUS_REG_CMD 0x05
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#define READ_CFG_REG_CMD 0x15
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#define WRITE_STATUS_CFG_REG_CMD 0x01
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#define READ_SEC_REG_CMD 0x2B
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#define WRITE_SEC_REG_CMD 0x2F
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/* Power Down Operations */
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#define DEEP_POWER_DOWN_CMD 0xB9
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/* Burst Operations */
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#define SET_BURST_LENGTH_CMD 0xC0
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/* One-Time Programmable Operations */
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#define ENTER_SECURED_OTP_CMD 0xB1
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#define EXIT_SECURED_OTP_CMD 0xC1
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/* No Operation */
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#define NO_OPERATION_CMD 0x00
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/* Reset Operations */
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#define RESET_ENABLE_CMD 0x66
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#define RESET_MEMORY_CMD 0x99
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#define RELEASE_READ_ENHANCED_CMD 0xFF
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/**
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* @brief MX25R6435F Registers
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*/
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/* Status Register */
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#define MX25R6435F_SR_WIP ((uint8_t)0x01) /*!< Write in progress */
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#define MX25R6435F_SR_WEL ((uint8_t)0x02) /*!< Write enable latch */
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#define MX25R6435F_SR_BP ((uint8_t)0x3C) /*!< Block protect */
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#define MX25R6435F_SR_QE ((uint8_t)0x40) /*!< Quad enable */
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#define MX25R6435F_SR_SRWD ((uint8_t)0x80) /*!< Status register write disable */
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/* Configuration Register 1 */
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#define MX25R6435F_CR1_TB ((uint8_t)0x08) /*!< Top / bottom */
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/* Configuration Register 2 */
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#define MX25R6435F_CR2_LH_SWITCH ((uint8_t)0x02) /*!< Low power / high performance switch */
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/* Security Register */
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#define MX25R6435F_SECR_SOI ((uint8_t)0x01) /*!< Secured OTP indicator */
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#define MX25R6435F_SECR_LDSO ((uint8_t)0x02) /*!< Lock-down secured OTP */
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#define MX25R6435F_SECR_PSB ((uint8_t)0x04) /*!< Program suspend bit */
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#define MX25R6435F_SECR_ESB ((uint8_t)0x08) /*!< Erase suspend bit */
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#define MX25R6435F_SECR_P_FAIL ((uint8_t)0x20) /*!< Program fail flag */
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#define MX25R6435F_SECR_E_FAIL ((uint8_t)0x40) /*!< Erase fail flag */
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/**
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* @}
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*/
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/** @defgroup MX25R6435F_Exported_Functions
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* @{
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*/
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/**
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* @}
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*/
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/**
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* @}
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*/
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/**
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* @}
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*/
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/**
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* @}
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*/
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#ifdef __cplusplus
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}
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#endif
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#endif /* __MX25R6435F_H */
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/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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