diff --git a/P3_SETR2/.cproject b/P3_SETR2/.cproject
new file mode 100644
index 0000000..b6aa839
--- /dev/null
+++ b/P3_SETR2/.cproject
@@ -0,0 +1,187 @@
+
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\ No newline at end of file
diff --git a/P3_SETR2/.mxproject b/P3_SETR2/.mxproject
new file mode 100644
index 0000000..40660c8
--- /dev/null
+++ b/P3_SETR2/.mxproject
@@ -0,0 +1,25 @@
+[PreviousGenFiles]
+AdvancedFolderStructure=true
+HeaderFileListSize=3
+HeaderFiles#0=../Core/Inc/stm32l4xx_it.h
+HeaderFiles#1=../Core/Inc/stm32l4xx_hal_conf.h
+HeaderFiles#2=../Core/Inc/main.h
+HeaderFolderListSize=1
+HeaderPath#0=../Core/Inc
+HeaderFiles=;
+SourceFileListSize=3
+SourceFiles#0=../Core/Src/stm32l4xx_it.c
+SourceFiles#1=../Core/Src/stm32l4xx_hal_msp.c
+SourceFiles#2=../Core/Src/main.c
+SourceFolderListSize=1
+SourcePath#0=../Core/Src
+SourceFiles=;
+
+[PreviousLibFiles]
+LibFiles=Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dfsdm.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h;Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_bus.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_rcc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_crs.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_system.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_utils.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_gpio.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_dma.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_dmamux.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_pwr.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_cortex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_exti.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_i2c.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_qspi.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_spi.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_usart.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_lpuart.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_usb.h;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dfsdm.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h;Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_bus.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_rcc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_crs.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_system.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_utils.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_gpio.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_dma.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_dmamux.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_pwr.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_cortex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_exti.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_i2c.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_qspi.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_spi.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_usart.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_lpuart.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd_ex.h;Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_usb.h;Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l475xx.h;Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h;Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h;Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h;Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/system_stm32l4xx.c;Drivers/CMSIS/Include/cmsis_armcc.h;Drivers/CMSIS/Include/cmsis_armclang.h;Drivers/CMSIS/Include/cmsis_armclang_ltm.h;Drivers/CMSIS/Include/cmsis_compiler.h;Drivers/CMSIS/Include/cmsis_gcc.h;Drivers/CMSIS/Include/cmsis_iccarm.h;Drivers/CMSIS/Include/cmsis_version.h;Drivers/CMSIS/Include/core_armv81mml.h;Drivers/CMSIS/Include/core_armv8mbl.h;Drivers/CMSIS/Include/core_armv8mml.h;Drivers/CMSIS/Include/core_cm0.h;Drivers/CMSIS/Include/core_cm0plus.h;Drivers/CMSIS/Include/core_cm1.h;Drivers/CMSIS/Include/core_cm23.h;Drivers/CMSIS/Include/core_cm3.h;Drivers/CMSIS/Include/core_cm33.h;Drivers/CMSIS/Include/core_cm35p.h;Drivers/CMSIS/Include/core_cm4.h;Drivers/CMSIS/Include/core_cm7.h;Drivers/CMSIS/Include/core_sc000.h;Drivers/CMSIS/Include/core_sc300.h;Drivers/CMSIS/Include/mpu_armv7.h;Drivers/CMSIS/Include/mpu_armv8.h;Drivers/CMSIS/Include/tz_context.h;
+
+[PreviousUsedCubeIDEFiles]
+SourceFiles=Core/Src/main.c;Core/Src/stm32l4xx_it.c;Core/Src/stm32l4xx_hal_msp.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c;Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/system_stm32l4xx.c;Core/Src/system_stm32l4xx.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd_ex.c;Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c;Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/system_stm32l4xx.c;Core/Src/system_stm32l4xx.c;;;
+HeaderPath=Drivers/STM32L4xx_HAL_Driver/Inc;Drivers/STM32L4xx_HAL_Driver/Inc/Legacy;Drivers/CMSIS/Device/ST/STM32L4xx/Include;Drivers/CMSIS/Include;Core/Inc;
+CDefines=USE_HAL_DRIVER;STM32L475xx;USE_HAL_DRIVER;USE_HAL_DRIVER;
+
diff --git a/P3_SETR2/.project b/P3_SETR2/.project
new file mode 100644
index 0000000..d77b9f1
--- /dev/null
+++ b/P3_SETR2/.project
@@ -0,0 +1,32 @@
+
+
+ P3_SETR2
+
+
+
+
+
+ org.eclipse.cdt.managedbuilder.core.genmakebuilder
+ clean,full,incremental,
+
+
+
+
+ org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder
+ full,incremental,
+
+
+
+
+
+ com.st.stm32cube.ide.mcu.MCUProjectNature
+ com.st.stm32cube.ide.mcu.MCUCubeProjectNature
+ org.eclipse.cdt.core.cnature
+ com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAev2ProjectNature
+ com.st.stm32cube.ide.mcu.MCUAdvancedStructureProjectNature
+ com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature
+ com.st.stm32cube.ide.mcu.MCURootProjectNature
+ org.eclipse.cdt.managedbuilder.core.managedBuildNature
+ org.eclipse.cdt.managedbuilder.core.ScannerConfigNature
+
+
diff --git a/P3_SETR2/.settings/language.settings.xml b/P3_SETR2/.settings/language.settings.xml
new file mode 100644
index 0000000..10c62c4
--- /dev/null
+++ b/P3_SETR2/.settings/language.settings.xml
@@ -0,0 +1,25 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
\ No newline at end of file
diff --git a/P3_SETR2/.settings/org.eclipse.cdt.core.prefs b/P3_SETR2/.settings/org.eclipse.cdt.core.prefs
new file mode 100644
index 0000000..c8ec5df
--- /dev/null
+++ b/P3_SETR2/.settings/org.eclipse.cdt.core.prefs
@@ -0,0 +1,6 @@
+doxygen/doxygen_new_line_after_brief=true
+doxygen/doxygen_use_brief_tag=false
+doxygen/doxygen_use_javadoc_tags=true
+doxygen/doxygen_use_pre_tag=false
+doxygen/doxygen_use_structural_commands=false
+eclipse.preferences.version=1
diff --git a/P3_SETR2/.settings/stm32cubeide.project.prefs b/P3_SETR2/.settings/stm32cubeide.project.prefs
new file mode 100644
index 0000000..d68abc9
--- /dev/null
+++ b/P3_SETR2/.settings/stm32cubeide.project.prefs
@@ -0,0 +1,5 @@
+635E684B79701B039C64EA45C3F84D30=148B39F5C8E660B250DE15501797F200
+66BE74F758C12D739921AEA421D593D3=0
+8DF89ED150041C4CBC7CB9A9CAA90856=D61A9D5E0823FD3A26503CBA2CCE68C1
+DC22A860405A8BF2F2C095E5B6529F12=D61A9D5E0823FD3A26503CBA2CCE68C1
+eclipse.preferences.version=1
diff --git a/P3_SETR2/BSP/B-L475E-IOT01_BSP_User_Manual.chm b/P3_SETR2/BSP/B-L475E-IOT01_BSP_User_Manual.chm
new file mode 100644
index 0000000..0bee230
Binary files /dev/null and b/P3_SETR2/BSP/B-L475E-IOT01_BSP_User_Manual.chm differ
diff --git a/P3_SETR2/BSP/Release_Notes.html b/P3_SETR2/BSP/Release_Notes.html
new file mode 100644
index 0000000..8e60bff
--- /dev/null
+++ b/P3_SETR2/BSP/Release_Notes.html
@@ -0,0 +1,118 @@
+
+
+
+
+
+
+ Release Notes for B-L475E-IOT01A Board Drivers
+
+
+
+
+
+
+
+
+
+
+Release Notes for B-L475E-IOT01A Board Drivers
+Copyright © 2017 STMicroelectronics
+
+
+
+
+
+
License
+
Licensed by ST under BSD 3-Clause license (the "License"). You may not use this package except in compliance with the License. You may obtain a copy of the License at:
+
https://opensource.org/licenses/BSD-3-Clause
+
Purpose
+
This directory contains the board drivers to demonstrate the capabilities of the B-L475E-IOT01A Kit.
+
+
+
Update History
+
+
V1.1.6 / 22-November-2019
+
+
Main Changes
+
+Enable the Sample Shift (SSHIFT) feature in BSP_QSPI_Init() to ensure the read data isn’t corrupted when prescaler is div/1
+
+
+
+
+
V1.1.5 / 18-October-2019
+
+
Main Changes
+
+Minor update in release notes format
+
+
+
+
+
V1.1.4 / 03-April-2019
+
+
Main Changes
+
+Rewrite stm32l475e_iot01.c to correct B-L475E-IOT01_BSP_User_Manual.chm documentation issue
+
+
+
+
+
V1.1.3 / 27-July-2018
+
+
Main Changes
+
+Release notes update to new format
+
+
+
+
+
V1.1.2 / 20-April-2018
+
+
Main Changes
+
+Header functions description cleanup
+
+
+
+
+
V1.1.1 / 13-October-2017
+
+
Main Changes
+
+Fix compilation warning with armcc –gnu
+
+
+
+
+
V1.1.0 / 21-April-2017
+
+
Main Changes
+
+Add support of NFC via M24SR component.
+
+
+
+
+
V1.0.0 / 17-March-2017
+
+
Main Changes
+
+First official release of B-L475E-IOT01 BSP drivers
+
+
+
+
+
+
+
+
diff --git a/P3_SETR2/BSP/_htmresc/mini-st.css b/P3_SETR2/BSP/_htmresc/mini-st.css
new file mode 100644
index 0000000..9b2d0a9
--- /dev/null
+++ b/P3_SETR2/BSP/_htmresc/mini-st.css
@@ -0,0 +1,1700 @@
+@charset "UTF-8";
+/*
+ Flavor name: Default (mini-default)
+ Author: Angelos Chalaris (chalarangelo@gmail.com)
+ Maintainers: Angelos Chalaris
+ mini.css version: v3.0.0-alpha.3
+*/
+/*
+ Browsers resets and base typography.
+*/
+/* Core module CSS variable definitions */
+:root {
+ --fore-color: #111;
+ --secondary-fore-color: #444;
+ --back-color: #f8f8f8;
+ --secondary-back-color: #f0f0f0;
+ --blockquote-color: #f57c00;
+ --pre-color: #1565c0;
+ --border-color: #aaa;
+ --secondary-border-color: #ddd;
+ --heading-ratio: 1.19;
+ --universal-margin: 0.5rem;
+ --universal-padding: 0.125rem;
+ --universal-border-radius: 0.125rem;
+ --a-link-color: #0277bd;
+ --a-visited-color: #01579b; }
+
+html {
+ font-size: 14px; }
+
+a, b, del, em, i, ins, q, span, strong, u {
+ font-size: 1em; }
+
+html, * {
+ font-family: -apple-system, BlinkMacSystemFont, "Segoe UI", Roboto, Ubuntu, "Helvetica Neue", Helvetica, sans-serif;
+ line-height: 1.4;
+ -webkit-text-size-adjust: 100%; }
+
+* {
+ font-size: 1rem; }
+
+body {
+ margin: 0;
+ color: var(--fore-color);
+ background: var(--back-color); }
+
+details {
+ display: block; }
+
+summary {
+ display: list-item; }
+
+abbr[title] {
+ border-bottom: none;
+ text-decoration: underline dotted; }
+
+input {
+ overflow: visible; }
+
+img {
+ max-width: 100%;
+ height: auto; }
+
+h1, h2, h3, h4, h5, h6 {
+ line-height: 1.2;
+ margin: calc(1.5 * var(--universal-margin)) var(--universal-margin);
+ font-weight: 500; }
+ h1 small, h2 small, h3 small, h4 small, h5 small, h6 small {
+ color: var(--secondary-fore-color);
+ display: block;
+ margin-top: -0.25rem; }
+
+h1 {
+ font-size: calc(1rem * var(--heading-ratio) * var(--heading-ratio) * var(--heading-ratio)); }
+
+h2 {
+ font-size: calc(1rem * var(--heading-ratio) * var(--heading-ratio); );
+ background: var(--mark-back-color);
+ font-weight: 600;
+ padding: 0.1em 0.5em 0.2em 0.5em;
+ color: var(--mark-fore-color); }
+
+h3 {
+ font-size: calc(1rem * var(--heading-ratio));
+ padding-left: calc(2 * var(--universal-margin));
+ /* background: var(--border-color); */
+ }
+
+h4 {
+ font-size: 1rem;);
+ padding-left: calc(4 * var(--universal-margin)); }
+
+h5 {
+ font-size: 1rem; }
+
+h6 {
+ font-size: calc(1rem / var(--heading-ratio)); }
+
+p {
+ margin: var(--universal-margin); }
+
+ol, ul {
+ margin: var(--universal-margin);
+ padding-left: calc(6 * var(--universal-margin)); }
+
+b, strong {
+ font-weight: 700; }
+
+hr {
+ box-sizing: content-box;
+ border: 0;
+ line-height: 1.25em;
+ margin: var(--universal-margin);
+ height: 0.0625rem;
+ background: linear-gradient(to right, transparent, var(--border-color) 20%, var(--border-color) 80%, transparent); }
+
+blockquote {
+ display: block;
+ position: relative;
+ font-style: italic;
+ color: var(--secondary-fore-color);
+ margin: var(--universal-margin);
+ padding: calc(3 * var(--universal-padding));
+ border: 0.0625rem solid var(--secondary-border-color);
+ border-left: 0.375rem solid var(--blockquote-color);
+ border-radius: 0 var(--universal-border-radius) var(--universal-border-radius) 0; }
+ blockquote:before {
+ position: absolute;
+ top: calc(0rem - var(--universal-padding));
+ left: 0;
+ font-family: sans-serif;
+ font-size: 3rem;
+ font-weight: 700;
+ content: "\201c";
+ color: var(--blockquote-color); }
+ blockquote[cite]:after {
+ font-style: normal;
+ font-size: 0.75em;
+ font-weight: 700;
+ content: "\a— " attr(cite);
+ white-space: pre; }
+
+code, kbd, pre, samp {
+ font-family: Menlo, Consolas, monospace;
+ font-size: 0.85em; }
+
+code {
+ background: var(--secondary-back-color);
+ border-radius: var(--universal-border-radius);
+ padding: calc(var(--universal-padding) / 4) calc(var(--universal-padding) / 2); }
+
+kbd {
+ background: var(--fore-color);
+ color: var(--back-color);
+ border-radius: var(--universal-border-radius);
+ padding: calc(var(--universal-padding) / 4) calc(var(--universal-padding) / 2); }
+
+pre {
+ overflow: auto;
+ background: var(--secondary-back-color);
+ padding: calc(1.5 * var(--universal-padding));
+ margin: var(--universal-margin);
+ border: 0.0625rem solid var(--secondary-border-color);
+ border-left: 0.25rem solid var(--pre-color);
+ border-radius: 0 var(--universal-border-radius) var(--universal-border-radius) 0; }
+
+sup, sub, code, kbd {
+ line-height: 0;
+ position: relative;
+ vertical-align: baseline; }
+
+small, sup, sub, figcaption {
+ font-size: 0.75em; }
+
+sup {
+ top: -0.5em; }
+
+sub {
+ bottom: -0.25em; }
+
+figure {
+ margin: var(--universal-margin); }
+
+figcaption {
+ color: var(--secondary-fore-color); }
+
+a {
+ text-decoration: none; }
+ a:link {
+ color: var(--a-link-color); }
+ a:visited {
+ color: var(--a-visited-color); }
+ a:hover, a:focus {
+ text-decoration: underline; }
+
+/*
+ Definitions for the grid system, cards and containers.
+*/
+.container {
+ margin: 0 auto;
+ padding: 0 calc(1.5 * var(--universal-padding)); }
+
+.row {
+ box-sizing: border-box;
+ display: flex;
+ flex: 0 1 auto;
+ flex-flow: row wrap; }
+
+.col-sm,
+[class^='col-sm-'],
+[class^='col-sm-offset-'],
+.row[class*='cols-sm-'] > * {
+ box-sizing: border-box;
+ flex: 0 0 auto;
+ padding: 0 calc(var(--universal-padding) / 2); }
+
+.col-sm,
+.row.cols-sm > * {
+ max-width: 100%;
+ flex-grow: 1;
+ flex-basis: 0; }
+
+.col-sm-1,
+.row.cols-sm-1 > * {
+ max-width: 8.3333333333%;
+ flex-basis: 8.3333333333%; }
+
+.col-sm-offset-0 {
+ margin-left: 0; }
+
+.col-sm-2,
+.row.cols-sm-2 > * {
+ max-width: 16.6666666667%;
+ flex-basis: 16.6666666667%; }
+
+.col-sm-offset-1 {
+ margin-left: 8.3333333333%; }
+
+.col-sm-3,
+.row.cols-sm-3 > * {
+ max-width: 25%;
+ flex-basis: 25%; }
+
+.col-sm-offset-2 {
+ margin-left: 16.6666666667%; }
+
+.col-sm-4,
+.row.cols-sm-4 > * {
+ max-width: 33.3333333333%;
+ flex-basis: 33.3333333333%; }
+
+.col-sm-offset-3 {
+ margin-left: 25%; }
+
+.col-sm-5,
+.row.cols-sm-5 > * {
+ max-width: 41.6666666667%;
+ flex-basis: 41.6666666667%; }
+
+.col-sm-offset-4 {
+ margin-left: 33.3333333333%; }
+
+.col-sm-6,
+.row.cols-sm-6 > * {
+ max-width: 50%;
+ flex-basis: 50%; }
+
+.col-sm-offset-5 {
+ margin-left: 41.6666666667%; }
+
+.col-sm-7,
+.row.cols-sm-7 > * {
+ max-width: 58.3333333333%;
+ flex-basis: 58.3333333333%; }
+
+.col-sm-offset-6 {
+ margin-left: 50%; }
+
+.col-sm-8,
+.row.cols-sm-8 > * {
+ max-width: 66.6666666667%;
+ flex-basis: 66.6666666667%; }
+
+.col-sm-offset-7 {
+ margin-left: 58.3333333333%; }
+
+.col-sm-9,
+.row.cols-sm-9 > * {
+ max-width: 75%;
+ flex-basis: 75%; }
+
+.col-sm-offset-8 {
+ margin-left: 66.6666666667%; }
+
+.col-sm-10,
+.row.cols-sm-10 > * {
+ max-width: 83.3333333333%;
+ flex-basis: 83.3333333333%; }
+
+.col-sm-offset-9 {
+ margin-left: 75%; }
+
+.col-sm-11,
+.row.cols-sm-11 > * {
+ max-width: 91.6666666667%;
+ flex-basis: 91.6666666667%; }
+
+.col-sm-offset-10 {
+ margin-left: 83.3333333333%; }
+
+.col-sm-12,
+.row.cols-sm-12 > * {
+ max-width: 100%;
+ flex-basis: 100%; }
+
+.col-sm-offset-11 {
+ margin-left: 91.6666666667%; }
+
+.col-sm-normal {
+ order: initial; }
+
+.col-sm-first {
+ order: -999; }
+
+.col-sm-last {
+ order: 999; }
+
+@media screen and (min-width: 500px) {
+ .col-md,
+ [class^='col-md-'],
+ [class^='col-md-offset-'],
+ .row[class*='cols-md-'] > * {
+ box-sizing: border-box;
+ flex: 0 0 auto;
+ padding: 0 calc(var(--universal-padding) / 2); }
+
+ .col-md,
+ .row.cols-md > * {
+ max-width: 100%;
+ flex-grow: 1;
+ flex-basis: 0; }
+
+ .col-md-1,
+ .row.cols-md-1 > * {
+ max-width: 8.3333333333%;
+ flex-basis: 8.3333333333%; }
+
+ .col-md-offset-0 {
+ margin-left: 0; }
+
+ .col-md-2,
+ .row.cols-md-2 > * {
+ max-width: 16.6666666667%;
+ flex-basis: 16.6666666667%; }
+
+ .col-md-offset-1 {
+ margin-left: 8.3333333333%; }
+
+ .col-md-3,
+ .row.cols-md-3 > * {
+ max-width: 25%;
+ flex-basis: 25%; }
+
+ .col-md-offset-2 {
+ margin-left: 16.6666666667%; }
+
+ .col-md-4,
+ .row.cols-md-4 > * {
+ max-width: 33.3333333333%;
+ flex-basis: 33.3333333333%; }
+
+ .col-md-offset-3 {
+ margin-left: 25%; }
+
+ .col-md-5,
+ .row.cols-md-5 > * {
+ max-width: 41.6666666667%;
+ flex-basis: 41.6666666667%; }
+
+ .col-md-offset-4 {
+ margin-left: 33.3333333333%; }
+
+ .col-md-6,
+ .row.cols-md-6 > * {
+ max-width: 50%;
+ flex-basis: 50%; }
+
+ .col-md-offset-5 {
+ margin-left: 41.6666666667%; }
+
+ .col-md-7,
+ .row.cols-md-7 > * {
+ max-width: 58.3333333333%;
+ flex-basis: 58.3333333333%; }
+
+ .col-md-offset-6 {
+ margin-left: 50%; }
+
+ .col-md-8,
+ .row.cols-md-8 > * {
+ max-width: 66.6666666667%;
+ flex-basis: 66.6666666667%; }
+
+ .col-md-offset-7 {
+ margin-left: 58.3333333333%; }
+
+ .col-md-9,
+ .row.cols-md-9 > * {
+ max-width: 75%;
+ flex-basis: 75%; }
+
+ .col-md-offset-8 {
+ margin-left: 66.6666666667%; }
+
+ .col-md-10,
+ .row.cols-md-10 > * {
+ max-width: 83.3333333333%;
+ flex-basis: 83.3333333333%; }
+
+ .col-md-offset-9 {
+ margin-left: 75%; }
+
+ .col-md-11,
+ .row.cols-md-11 > * {
+ max-width: 91.6666666667%;
+ flex-basis: 91.6666666667%; }
+
+ .col-md-offset-10 {
+ margin-left: 83.3333333333%; }
+
+ .col-md-12,
+ .row.cols-md-12 > * {
+ max-width: 100%;
+ flex-basis: 100%; }
+
+ .col-md-offset-11 {
+ margin-left: 91.6666666667%; }
+
+ .col-md-normal {
+ order: initial; }
+
+ .col-md-first {
+ order: -999; }
+
+ .col-md-last {
+ order: 999; } }
+@media screen and (min-width: 1280px) {
+ .col-lg,
+ [class^='col-lg-'],
+ [class^='col-lg-offset-'],
+ .row[class*='cols-lg-'] > * {
+ box-sizing: border-box;
+ flex: 0 0 auto;
+ padding: 0 calc(var(--universal-padding) / 2); }
+
+ .col-lg,
+ .row.cols-lg > * {
+ max-width: 100%;
+ flex-grow: 1;
+ flex-basis: 0; }
+
+ .col-lg-1,
+ .row.cols-lg-1 > * {
+ max-width: 8.3333333333%;
+ flex-basis: 8.3333333333%; }
+
+ .col-lg-offset-0 {
+ margin-left: 0; }
+
+ .col-lg-2,
+ .row.cols-lg-2 > * {
+ max-width: 16.6666666667%;
+ flex-basis: 16.6666666667%; }
+
+ .col-lg-offset-1 {
+ margin-left: 8.3333333333%; }
+
+ .col-lg-3,
+ .row.cols-lg-3 > * {
+ max-width: 25%;
+ flex-basis: 25%; }
+
+ .col-lg-offset-2 {
+ margin-left: 16.6666666667%; }
+
+ .col-lg-4,
+ .row.cols-lg-4 > * {
+ max-width: 33.3333333333%;
+ flex-basis: 33.3333333333%; }
+
+ .col-lg-offset-3 {
+ margin-left: 25%; }
+
+ .col-lg-5,
+ .row.cols-lg-5 > * {
+ max-width: 41.6666666667%;
+ flex-basis: 41.6666666667%; }
+
+ .col-lg-offset-4 {
+ margin-left: 33.3333333333%; }
+
+ .col-lg-6,
+ .row.cols-lg-6 > * {
+ max-width: 50%;
+ flex-basis: 50%; }
+
+ .col-lg-offset-5 {
+ margin-left: 41.6666666667%; }
+
+ .col-lg-7,
+ .row.cols-lg-7 > * {
+ max-width: 58.3333333333%;
+ flex-basis: 58.3333333333%; }
+
+ .col-lg-offset-6 {
+ margin-left: 50%; }
+
+ .col-lg-8,
+ .row.cols-lg-8 > * {
+ max-width: 66.6666666667%;
+ flex-basis: 66.6666666667%; }
+
+ .col-lg-offset-7 {
+ margin-left: 58.3333333333%; }
+
+ .col-lg-9,
+ .row.cols-lg-9 > * {
+ max-width: 75%;
+ flex-basis: 75%; }
+
+ .col-lg-offset-8 {
+ margin-left: 66.6666666667%; }
+
+ .col-lg-10,
+ .row.cols-lg-10 > * {
+ max-width: 83.3333333333%;
+ flex-basis: 83.3333333333%; }
+
+ .col-lg-offset-9 {
+ margin-left: 75%; }
+
+ .col-lg-11,
+ .row.cols-lg-11 > * {
+ max-width: 91.6666666667%;
+ flex-basis: 91.6666666667%; }
+
+ .col-lg-offset-10 {
+ margin-left: 83.3333333333%; }
+
+ .col-lg-12,
+ .row.cols-lg-12 > * {
+ max-width: 100%;
+ flex-basis: 100%; }
+
+ .col-lg-offset-11 {
+ margin-left: 91.6666666667%; }
+
+ .col-lg-normal {
+ order: initial; }
+
+ .col-lg-first {
+ order: -999; }
+
+ .col-lg-last {
+ order: 999; } }
+/* Card component CSS variable definitions */
+:root {
+ --card-back-color: #f8f8f8;
+ --card-fore-color: #111;
+ --card-border-color: #ddd; }
+
+.card {
+ display: flex;
+ flex-direction: column;
+ justify-content: space-between;
+ align-self: center;
+ position: relative;
+ width: 100%;
+ background: var(--card-back-color);
+ color: var(--card-fore-color);
+ border: 0.0625rem solid var(--card-border-color);
+ border-radius: var(--universal-border-radius);
+ margin: var(--universal-margin);
+ overflow: hidden; }
+ @media screen and (min-width: 320px) {
+ .card {
+ max-width: 320px; } }
+ .card > .sectione {
+ background: var(--card-back-color);
+ color: var(--card-fore-color);
+ box-sizing: border-box;
+ margin: 0;
+ border: 0;
+ border-radius: 0;
+ border-bottom: 0.0625rem solid var(--card-border-color);
+ padding: var(--universal-padding);
+ width: 100%; }
+ .card > .sectione.media {
+ height: 200px;
+ padding: 0;
+ -o-object-fit: cover;
+ object-fit: cover; }
+ .card > .sectione:last-child {
+ border-bottom: 0; }
+
+/*
+ Custom elements for card elements.
+*/
+@media screen and (min-width: 240px) {
+ .card.small {
+ max-width: 240px; } }
+@media screen and (min-width: 480px) {
+ .card.large {
+ max-width: 480px; } }
+.card.fluid {
+ max-width: 100%;
+ width: auto; }
+
+.card.warning {
+/* --card-back-color: #ffca28; */
+ --card-back-color: #e5b8b7;
+ --card-border-color: #e8b825; }
+
+.card.error {
+ --card-back-color: #b71c1c;
+ --card-fore-color: #f8f8f8;
+ --card-border-color: #a71a1a; }
+
+.card > .sectione.dark {
+ --card-back-color: #e0e0e0; }
+
+.card > .sectione.double-padded {
+ padding: calc(1.5 * var(--universal-padding)); }
+
+/*
+ Definitions for forms and input elements.
+*/
+/* Input_control module CSS variable definitions */
+:root {
+ --form-back-color: #f0f0f0;
+ --form-fore-color: #111;
+ --form-border-color: #ddd;
+ --input-back-color: #f8f8f8;
+ --input-fore-color: #111;
+ --input-border-color: #ddd;
+ --input-focus-color: #0288d1;
+ --input-invalid-color: #d32f2f;
+ --button-back-color: #e2e2e2;
+ --button-hover-back-color: #dcdcdc;
+ --button-fore-color: #212121;
+ --button-border-color: transparent;
+ --button-hover-border-color: transparent;
+ --button-group-border-color: rgba(124, 124, 124, 0.54); }
+
+form {
+ background: var(--form-back-color);
+ color: var(--form-fore-color);
+ border: 0.0625rem solid var(--form-border-color);
+ border-radius: var(--universal-border-radius);
+ margin: var(--universal-margin);
+ padding: calc(2 * var(--universal-padding)) var(--universal-padding); }
+
+fieldset {
+ border: 0.0625rem solid var(--form-border-color);
+ border-radius: var(--universal-border-radius);
+ margin: calc(var(--universal-margin) / 4);
+ padding: var(--universal-padding); }
+
+legend {
+ box-sizing: border-box;
+ display: table;
+ max-width: 100%;
+ white-space: normal;
+ font-weight: 700;
+ padding: calc(var(--universal-padding) / 2); }
+
+label {
+ padding: calc(var(--universal-padding) / 2) var(--universal-padding); }
+
+.input-group {
+ display: inline-block; }
+ .input-group.fluid {
+ display: flex;
+ align-items: center;
+ justify-content: center; }
+ .input-group.fluid > input {
+ max-width: 100%;
+ flex-grow: 1;
+ flex-basis: 0px; }
+ @media screen and (max-width: 499px) {
+ .input-group.fluid {
+ align-items: stretch;
+ flex-direction: column; } }
+ .input-group.vertical {
+ display: flex;
+ align-items: stretch;
+ flex-direction: column; }
+ .input-group.vertical > input {
+ max-width: 100%;
+ flex-grow: 1;
+ flex-basis: 0px; }
+
+[type="number"]::-webkit-inner-spin-button, [type="number"]::-webkit-outer-spin-button {
+ height: auto; }
+
+[type="search"] {
+ -webkit-appearance: textfield;
+ outline-offset: -2px; }
+
+[type="search"]::-webkit-search-cancel-button,
+[type="search"]::-webkit-search-decoration {
+ -webkit-appearance: none; }
+
+input:not([type]), [type="text"], [type="email"], [type="number"], [type="search"],
+[type="password"], [type="url"], [type="tel"], [type="checkbox"], [type="radio"], textarea, select {
+ box-sizing: border-box;
+ background: var(--input-back-color);
+ color: var(--input-fore-color);
+ border: 0.0625rem solid var(--input-border-color);
+ border-radius: var(--universal-border-radius);
+ margin: calc(var(--universal-margin) / 2);
+ padding: var(--universal-padding) calc(1.5 * var(--universal-padding)); }
+
+input:not([type="button"]):not([type="submit"]):not([type="reset"]):hover, input:not([type="button"]):not([type="submit"]):not([type="reset"]):focus, textarea:hover, textarea:focus, select:hover, select:focus {
+ border-color: var(--input-focus-color);
+ box-shadow: none; }
+input:not([type="button"]):not([type="submit"]):not([type="reset"]):invalid, input:not([type="button"]):not([type="submit"]):not([type="reset"]):focus:invalid, textarea:invalid, textarea:focus:invalid, select:invalid, select:focus:invalid {
+ border-color: var(--input-invalid-color);
+ box-shadow: none; }
+input:not([type="button"]):not([type="submit"]):not([type="reset"])[readonly], textarea[readonly], select[readonly] {
+ background: var(--secondary-back-color); }
+
+select {
+ max-width: 100%; }
+
+option {
+ overflow: hidden;
+ text-overflow: ellipsis; }
+
+[type="checkbox"], [type="radio"] {
+ -webkit-appearance: none;
+ -moz-appearance: none;
+ appearance: none;
+ position: relative;
+ height: calc(1rem + var(--universal-padding) / 2);
+ width: calc(1rem + var(--universal-padding) / 2);
+ vertical-align: text-bottom;
+ padding: 0;
+ flex-basis: calc(1rem + var(--universal-padding) / 2) !important;
+ flex-grow: 0 !important; }
+ [type="checkbox"]:checked:before, [type="radio"]:checked:before {
+ position: absolute; }
+
+[type="checkbox"]:checked:before {
+ content: '\2713';
+ font-family: sans-serif;
+ font-size: calc(1rem + var(--universal-padding) / 2);
+ top: calc(0rem - var(--universal-padding));
+ left: calc(var(--universal-padding) / 4); }
+
+[type="radio"] {
+ border-radius: 100%; }
+ [type="radio"]:checked:before {
+ border-radius: 100%;
+ content: '';
+ top: calc(0.0625rem + var(--universal-padding) / 2);
+ left: calc(0.0625rem + var(--universal-padding) / 2);
+ background: var(--input-fore-color);
+ width: 0.5rem;
+ height: 0.5rem; }
+
+:placeholder-shown {
+ color: var(--input-fore-color); }
+
+::-ms-placeholder {
+ color: var(--input-fore-color);
+ opacity: 0.54; }
+
+button::-moz-focus-inner, [type="button"]::-moz-focus-inner, [type="reset"]::-moz-focus-inner, [type="submit"]::-moz-focus-inner {
+ border-style: none;
+ padding: 0; }
+
+button, html [type="button"], [type="reset"], [type="submit"] {
+ -webkit-appearance: button; }
+
+button {
+ overflow: visible;
+ text-transform: none; }
+
+button, [type="button"], [type="submit"], [type="reset"],
+a.button, label.button, .button,
+a[role="button"], label[role="button"], [role="button"] {
+ display: inline-block;
+ background: var(--button-back-color);
+ color: var(--button-fore-color);
+ border: 0.0625rem solid var(--button-border-color);
+ border-radius: var(--universal-border-radius);
+ padding: var(--universal-padding) calc(1.5 * var(--universal-padding));
+ margin: var(--universal-margin);
+ text-decoration: none;
+ cursor: pointer;
+ transition: background 0.3s; }
+ button:hover, button:focus, [type="button"]:hover, [type="button"]:focus, [type="submit"]:hover, [type="submit"]:focus, [type="reset"]:hover, [type="reset"]:focus,
+ a.button:hover,
+ a.button:focus, label.button:hover, label.button:focus, .button:hover, .button:focus,
+ a[role="button"]:hover,
+ a[role="button"]:focus, label[role="button"]:hover, label[role="button"]:focus, [role="button"]:hover, [role="button"]:focus {
+ background: var(--button-hover-back-color);
+ border-color: var(--button-hover-border-color); }
+
+input:disabled, input[disabled], textarea:disabled, textarea[disabled], select:disabled, select[disabled], button:disabled, button[disabled], .button:disabled, .button[disabled], [role="button"]:disabled, [role="button"][disabled] {
+ cursor: not-allowed;
+ opacity: 0.75; }
+
+.button-group {
+ display: flex;
+ border: 0.0625rem solid var(--button-group-border-color);
+ border-radius: var(--universal-border-radius);
+ margin: var(--universal-margin); }
+ .button-group > button, .button-group [type="button"], .button-group > [type="submit"], .button-group > [type="reset"], .button-group > .button, .button-group > [role="button"] {
+ margin: 0;
+ max-width: 100%;
+ flex: 1 1 auto;
+ text-align: center;
+ border: 0;
+ border-radius: 0;
+ box-shadow: none; }
+ .button-group > :not(:first-child) {
+ border-left: 0.0625rem solid var(--button-group-border-color); }
+ @media screen and (max-width: 499px) {
+ .button-group {
+ flex-direction: column; }
+ .button-group > :not(:first-child) {
+ border: 0;
+ border-top: 0.0625rem solid var(--button-group-border-color); } }
+
+/*
+ Custom elements for forms and input elements.
+*/
+button.primary, [type="button"].primary, [type="submit"].primary, [type="reset"].primary, .button.primary, [role="button"].primary {
+ --button-back-color: #1976d2;
+ --button-fore-color: #f8f8f8; }
+ button.primary:hover, button.primary:focus, [type="button"].primary:hover, [type="button"].primary:focus, [type="submit"].primary:hover, [type="submit"].primary:focus, [type="reset"].primary:hover, [type="reset"].primary:focus, .button.primary:hover, .button.primary:focus, [role="button"].primary:hover, [role="button"].primary:focus {
+ --button-hover-back-color: #1565c0; }
+
+button.secondary, [type="button"].secondary, [type="submit"].secondary, [type="reset"].secondary, .button.secondary, [role="button"].secondary {
+ --button-back-color: #d32f2f;
+ --button-fore-color: #f8f8f8; }
+ button.secondary:hover, button.secondary:focus, [type="button"].secondary:hover, [type="button"].secondary:focus, [type="submit"].secondary:hover, [type="submit"].secondary:focus, [type="reset"].secondary:hover, [type="reset"].secondary:focus, .button.secondary:hover, .button.secondary:focus, [role="button"].secondary:hover, [role="button"].secondary:focus {
+ --button-hover-back-color: #c62828; }
+
+button.tertiary, [type="button"].tertiary, [type="submit"].tertiary, [type="reset"].tertiary, .button.tertiary, [role="button"].tertiary {
+ --button-back-color: #308732;
+ --button-fore-color: #f8f8f8; }
+ button.tertiary:hover, button.tertiary:focus, [type="button"].tertiary:hover, [type="button"].tertiary:focus, [type="submit"].tertiary:hover, [type="submit"].tertiary:focus, [type="reset"].tertiary:hover, [type="reset"].tertiary:focus, .button.tertiary:hover, .button.tertiary:focus, [role="button"].tertiary:hover, [role="button"].tertiary:focus {
+ --button-hover-back-color: #277529; }
+
+button.inverse, [type="button"].inverse, [type="submit"].inverse, [type="reset"].inverse, .button.inverse, [role="button"].inverse {
+ --button-back-color: #212121;
+ --button-fore-color: #f8f8f8; }
+ button.inverse:hover, button.inverse:focus, [type="button"].inverse:hover, [type="button"].inverse:focus, [type="submit"].inverse:hover, [type="submit"].inverse:focus, [type="reset"].inverse:hover, [type="reset"].inverse:focus, .button.inverse:hover, .button.inverse:focus, [role="button"].inverse:hover, [role="button"].inverse:focus {
+ --button-hover-back-color: #111; }
+
+button.small, [type="button"].small, [type="submit"].small, [type="reset"].small, .button.small, [role="button"].small {
+ padding: calc(0.5 * var(--universal-padding)) calc(0.75 * var(--universal-padding));
+ margin: var(--universal-margin); }
+
+button.large, [type="button"].large, [type="submit"].large, [type="reset"].large, .button.large, [role="button"].large {
+ padding: calc(1.5 * var(--universal-padding)) calc(2 * var(--universal-padding));
+ margin: var(--universal-margin); }
+
+/*
+ Definitions for navigation elements.
+*/
+/* Navigation module CSS variable definitions */
+:root {
+ --header-back-color: #f8f8f8;
+ --header-hover-back-color: #f0f0f0;
+ --header-fore-color: #444;
+ --header-border-color: #ddd;
+ --nav-back-color: #f8f8f8;
+ --nav-hover-back-color: #f0f0f0;
+ --nav-fore-color: #444;
+ --nav-border-color: #ddd;
+ --nav-link-color: #0277bd;
+ --footer-fore-color: #444;
+ --footer-back-color: #f8f8f8;
+ --footer-border-color: #ddd;
+ --footer-link-color: #0277bd;
+ --drawer-back-color: #f8f8f8;
+ --drawer-hover-back-color: #f0f0f0;
+ --drawer-border-color: #ddd;
+ --drawer-close-color: #444; }
+
+header {
+ height: 3.1875rem;
+ background: var(--header-back-color);
+ color: var(--header-fore-color);
+ border-bottom: 0.0625rem solid var(--header-border-color);
+ padding: calc(var(--universal-padding) / 4) 0;
+ white-space: nowrap;
+ overflow-x: auto;
+ overflow-y: hidden; }
+ header.row {
+ box-sizing: content-box; }
+ header .logo {
+ color: var(--header-fore-color);
+ font-size: 1.75rem;
+ padding: var(--universal-padding) calc(2 * var(--universal-padding));
+ text-decoration: none; }
+ header button, header [type="button"], header .button, header [role="button"] {
+ box-sizing: border-box;
+ position: relative;
+ top: calc(0rem - var(--universal-padding) / 4);
+ height: calc(3.1875rem + var(--universal-padding) / 2);
+ background: var(--header-back-color);
+ line-height: calc(3.1875rem - var(--universal-padding) * 1.5);
+ text-align: center;
+ color: var(--header-fore-color);
+ border: 0;
+ border-radius: 0;
+ margin: 0;
+ text-transform: uppercase; }
+ header button:hover, header button:focus, header [type="button"]:hover, header [type="button"]:focus, header .button:hover, header .button:focus, header [role="button"]:hover, header [role="button"]:focus {
+ background: var(--header-hover-back-color); }
+
+nav {
+ background: var(--nav-back-color);
+ color: var(--nav-fore-color);
+ border: 0.0625rem solid var(--nav-border-color);
+ border-radius: var(--universal-border-radius);
+ margin: var(--universal-margin); }
+ nav * {
+ padding: var(--universal-padding) calc(1.5 * var(--universal-padding)); }
+ nav a, nav a:visited {
+ display: block;
+ color: var(--nav-link-color);
+ border-radius: var(--universal-border-radius);
+ transition: background 0.3s; }
+ nav a:hover, nav a:focus, nav a:visited:hover, nav a:visited:focus {
+ text-decoration: none;
+ background: var(--nav-hover-back-color); }
+ nav .sublink-1 {
+ position: relative;
+ margin-left: calc(2 * var(--universal-padding)); }
+ nav .sublink-1:before {
+ position: absolute;
+ left: calc(var(--universal-padding) - 1 * var(--universal-padding));
+ top: -0.0625rem;
+ content: '';
+ height: 100%;
+ border: 0.0625rem solid var(--nav-border-color);
+ border-left: 0; }
+ nav .sublink-2 {
+ position: relative;
+ margin-left: calc(4 * var(--universal-padding)); }
+ nav .sublink-2:before {
+ position: absolute;
+ left: calc(var(--universal-padding) - 3 * var(--universal-padding));
+ top: -0.0625rem;
+ content: '';
+ height: 100%;
+ border: 0.0625rem solid var(--nav-border-color);
+ border-left: 0; }
+
+footer {
+ background: var(--footer-back-color);
+ color: var(--footer-fore-color);
+ border-top: 0.0625rem solid var(--footer-border-color);
+ padding: calc(2 * var(--universal-padding)) var(--universal-padding);
+ font-size: 0.875rem; }
+ footer a, footer a:visited {
+ color: var(--footer-link-color); }
+
+header.sticky {
+ position: -webkit-sticky;
+ position: sticky;
+ z-index: 1101;
+ top: 0; }
+
+footer.sticky {
+ position: -webkit-sticky;
+ position: sticky;
+ z-index: 1101;
+ bottom: 0; }
+
+.drawer-toggle:before {
+ display: inline-block;
+ position: relative;
+ vertical-align: bottom;
+ content: '\00a0\2261\00a0';
+ font-family: sans-serif;
+ font-size: 1.5em; }
+@media screen and (min-width: 500px) {
+ .drawer-toggle:not(.persistent) {
+ display: none; } }
+
+[type="checkbox"].drawer {
+ height: 1px;
+ width: 1px;
+ margin: -1px;
+ overflow: hidden;
+ position: absolute;
+ clip: rect(0 0 0 0);
+ -webkit-clip-path: inset(100%);
+ clip-path: inset(100%); }
+ [type="checkbox"].drawer + * {
+ display: block;
+ box-sizing: border-box;
+ position: fixed;
+ top: 0;
+ width: 320px;
+ height: 100vh;
+ overflow-y: auto;
+ background: var(--drawer-back-color);
+ border: 0.0625rem solid var(--drawer-border-color);
+ border-radius: 0;
+ margin: 0;
+ z-index: 1110;
+ right: -320px;
+ transition: right 0.3s; }
+ [type="checkbox"].drawer + * .drawer-close {
+ position: absolute;
+ top: var(--universal-margin);
+ right: var(--universal-margin);
+ z-index: 1111;
+ width: 2rem;
+ height: 2rem;
+ border-radius: var(--universal-border-radius);
+ padding: var(--universal-padding);
+ margin: 0;
+ cursor: pointer;
+ transition: background 0.3s; }
+ [type="checkbox"].drawer + * .drawer-close:before {
+ display: block;
+ content: '\00D7';
+ color: var(--drawer-close-color);
+ position: relative;
+ font-family: sans-serif;
+ font-size: 2rem;
+ line-height: 1;
+ text-align: center; }
+ [type="checkbox"].drawer + * .drawer-close:hover, [type="checkbox"].drawer + * .drawer-close:focus {
+ background: var(--drawer-hover-back-color); }
+ @media screen and (max-width: 320px) {
+ [type="checkbox"].drawer + * {
+ width: 100%; } }
+ [type="checkbox"].drawer:checked + * {
+ right: 0; }
+ @media screen and (min-width: 500px) {
+ [type="checkbox"].drawer:not(.persistent) + * {
+ position: static;
+ height: 100%;
+ z-index: 1100; }
+ [type="checkbox"].drawer:not(.persistent) + * .drawer-close {
+ display: none; } }
+
+/*
+ Definitions for the responsive table component.
+*/
+/* Table module CSS variable definitions. */
+:root {
+ --table-border-color: #aaa;
+ --table-border-separator-color: #666;
+ --table-head-back-color: #e6e6e6;
+ --table-head-fore-color: #111;
+ --table-body-back-color: #f8f8f8;
+ --table-body-fore-color: #111;
+ --table-body-alt-back-color: #eee; }
+
+table {
+ border-collapse: separate;
+ border-spacing: 0;
+ : margin: calc(1.5 * var(--universal-margin)) var(--universal-margin);
+ display: flex;
+ flex: 0 1 auto;
+ flex-flow: row wrap;
+ padding: var(--universal-padding);
+ padding-top: 0;
+ margin: calc(1.5 * var(--universal-margin)) var(--universal-margin); }
+ table caption {
+ font-size: 1.25 * rem;
+ margin: calc(2 * var(--universal-margin)) 0;
+ max-width: 100%;
+ flex: 0 0 100%;
+ text-align: left;}
+ table thead, table tbody {
+ display: flex;
+ flex-flow: row wrap;
+ border: 0.0625rem solid var(--table-border-color); }
+ table thead {
+ z-index: 999;
+ border-radius: var(--universal-border-radius) var(--universal-border-radius) 0 0;
+ border-bottom: 0.0625rem solid var(--table-border-separator-color); }
+ table tbody {
+ border-top: 0;
+ margin-top: calc(0 - var(--universal-margin));
+ border-radius: 0 0 var(--universal-border-radius) var(--universal-border-radius); }
+ table tr {
+ display: flex;
+ padding: 0; }
+ table th, table td {
+ padding: calc(0.5 * var(--universal-padding));
+ font-size: 0.9rem; }
+ table th {
+ text-align: left;
+ background: var(--table-head-back-color);
+ color: var(--table-head-fore-color); }
+ table td {
+ background: var(--table-body-back-color);
+ color: var(--table-body-fore-color);
+ border-top: 0.0625rem solid var(--table-border-color); }
+
+table:not(.horizontal) {
+ overflow: auto;
+ max-height: 850px; }
+ table:not(.horizontal) thead, table:not(.horizontal) tbody {
+ max-width: 100%;
+ flex: 0 0 100%; }
+ table:not(.horizontal) tr {
+ flex-flow: row wrap;
+ flex: 0 0 100%; }
+ table:not(.horizontal) th, table:not(.horizontal) td {
+ flex: 1 0 0%;
+ overflow: hidden;
+ text-overflow: ellipsis; }
+ table:not(.horizontal) thead {
+ position: sticky;
+ top: 0; }
+ table:not(.horizontal) tbody tr:first-child td {
+ border-top: 0; }
+
+table.horizontal {
+ border: 0; }
+ table.horizontal thead, table.horizontal tbody {
+ border: 0;
+ flex-flow: row nowrap; }
+ table.horizontal tbody {
+ overflow: auto;
+ justify-content: space-between;
+ flex: 1 0 0;
+ margin-left: calc( 4 * var(--universal-margin));
+ padding-bottom: calc(var(--universal-padding) / 4); }
+ table.horizontal tr {
+ flex-direction: column;
+ flex: 1 0 auto; }
+ table.horizontal th, table.horizontal td {
+ width: 100%;
+ border: 0;
+ border-bottom: 0.0625rem solid var(--table-border-color); }
+ table.horizontal th:not(:first-child), table.horizontal td:not(:first-child) {
+ border-top: 0; }
+ table.horizontal th {
+ text-align: right;
+ border-left: 0.0625rem solid var(--table-border-color);
+ border-right: 0.0625rem solid var(--table-border-separator-color); }
+ table.horizontal thead tr:first-child {
+ padding-left: 0; }
+ table.horizontal th:first-child, table.horizontal td:first-child {
+ border-top: 0.0625rem solid var(--table-border-color); }
+ table.horizontal tbody tr:last-child td {
+ border-right: 0.0625rem solid var(--table-border-color); }
+ table.horizontal tbody tr:last-child td:first-child {
+ border-top-right-radius: 0.25rem; }
+ table.horizontal tbody tr:last-child td:last-child {
+ border-bottom-right-radius: 0.25rem; }
+ table.horizontal thead tr:first-child th:first-child {
+ border-top-left-radius: 0.25rem; }
+ table.horizontal thead tr:first-child th:last-child {
+ border-bottom-left-radius: 0.25rem; }
+
+@media screen and (max-width: 499px) {
+ table, table.horizontal {
+ border-collapse: collapse;
+ border: 0;
+ width: 100%;
+ display: table; }
+ table thead, table th, table.horizontal thead, table.horizontal th {
+ border: 0;
+ height: 1px;
+ width: 1px;
+ margin: -1px;
+ overflow: hidden;
+ padding: 0;
+ position: absolute;
+ clip: rect(0 0 0 0);
+ -webkit-clip-path: inset(100%);
+ clip-path: inset(100%); }
+ table tbody, table.horizontal tbody {
+ border: 0;
+ display: table-row-group; }
+ table tr, table.horizontal tr {
+ display: block;
+ border: 0.0625rem solid var(--table-border-color);
+ border-radius: var(--universal-border-radius);
+ background: #fafafa;
+ padding: var(--universal-padding);
+ margin: var(--universal-margin);
+ margin-bottom: calc(2 * var(--universal-margin)); }
+ table th, table td, table.horizontal th, table.horizontal td {
+ width: auto; }
+ table td, table.horizontal td {
+ display: block;
+ border: 0;
+ text-align: right; }
+ table td:before, table.horizontal td:before {
+ content: attr(data-label);
+ float: left;
+ font-weight: 600; }
+ table th:first-child, table td:first-child, table.horizontal th:first-child, table.horizontal td:first-child {
+ border-top: 0; }
+ table tbody tr:last-child td, table.horizontal tbody tr:last-child td {
+ border-right: 0; } }
+:root {
+ --table-body-alt-back-color: #eee; }
+
+table tr:nth-of-type(2n) > td {
+ background: var(--table-body-alt-back-color); }
+
+@media screen and (max-width: 500px) {
+ table tr:nth-of-type(2n) {
+ background: var(--table-body-alt-back-color); } }
+:root {
+ --table-body-hover-back-color: #90caf9; }
+
+table.hoverable tr:hover, table.hoverable tr:hover > td, table.hoverable tr:focus, table.hoverable tr:focus > td {
+ background: var(--table-body-hover-back-color); }
+
+@media screen and (max-width: 500px) {
+ table.hoverable tr:hover, table.hoverable tr:hover > td, table.hoverable tr:focus, table.hoverable tr:focus > td {
+ background: var(--table-body-hover-back-color); } }
+/*
+ Definitions for contextual background elements, toasts and tooltips.
+*/
+/* Contextual module CSS variable definitions */
+:root {
+ --mark-back-color: #0277bd;
+ --mark-fore-color: #fafafa; }
+
+mark {
+ background: var(--mark-back-color);
+ color: var(--mark-fore-color);
+ font-size: 0.95em;
+ line-height: 1em;
+ border-radius: var(--universal-border-radius);
+ padding: calc(var(--universal-padding) / 4) calc(var(--universal-padding) / 2); }
+ mark.inline-block {
+ display: inline-block;
+ font-size: 1em;
+ line-height: 1.5;
+ padding: calc(var(--universal-padding) / 2) var(--universal-padding); }
+
+:root {
+ --toast-back-color: #424242;
+ --toast-fore-color: #fafafa; }
+
+.toast {
+ position: fixed;
+ bottom: calc(var(--universal-margin) * 3);
+ left: 50%;
+ transform: translate(-50%, -50%);
+ z-index: 1111;
+ color: var(--toast-fore-color);
+ background: var(--toast-back-color);
+ border-radius: calc(var(--universal-border-radius) * 16);
+ padding: var(--universal-padding) calc(var(--universal-padding) * 3); }
+
+:root {
+ --tooltip-back-color: #212121;
+ --tooltip-fore-color: #fafafa; }
+
+.tooltip {
+ position: relative;
+ display: inline-block; }
+ .tooltip:before, .tooltip:after {
+ position: absolute;
+ opacity: 0;
+ clip: rect(0 0 0 0);
+ -webkit-clip-path: inset(100%);
+ clip-path: inset(100%);
+ transition: all 0.3s;
+ z-index: 1010;
+ left: 50%; }
+ .tooltip:not(.bottom):before, .tooltip:not(.bottom):after {
+ bottom: 75%; }
+ .tooltip.bottom:before, .tooltip.bottom:after {
+ top: 75%; }
+ .tooltip:hover:before, .tooltip:hover:after, .tooltip:focus:before, .tooltip:focus:after {
+ opacity: 1;
+ clip: auto;
+ -webkit-clip-path: inset(0%);
+ clip-path: inset(0%); }
+ .tooltip:before {
+ content: '';
+ background: transparent;
+ border: var(--universal-margin) solid transparent;
+ left: calc(50% - var(--universal-margin)); }
+ .tooltip:not(.bottom):before {
+ border-top-color: #212121; }
+ .tooltip.bottom:before {
+ border-bottom-color: #212121; }
+ .tooltip:after {
+ content: attr(aria-label);
+ color: var(--tooltip-fore-color);
+ background: var(--tooltip-back-color);
+ border-radius: var(--universal-border-radius);
+ padding: var(--universal-padding);
+ white-space: nowrap;
+ transform: translateX(-50%); }
+ .tooltip:not(.bottom):after {
+ margin-bottom: calc(2 * var(--universal-margin)); }
+ .tooltip.bottom:after {
+ margin-top: calc(2 * var(--universal-margin)); }
+
+:root {
+ --modal-overlay-color: rgba(0, 0, 0, 0.45);
+ --modal-close-color: #444;
+ --modal-close-hover-color: #f0f0f0; }
+
+[type="checkbox"].modal {
+ height: 1px;
+ width: 1px;
+ margin: -1px;
+ overflow: hidden;
+ position: absolute;
+ clip: rect(0 0 0 0);
+ -webkit-clip-path: inset(100%);
+ clip-path: inset(100%); }
+ [type="checkbox"].modal + div {
+ position: fixed;
+ top: 0;
+ left: 0;
+ display: none;
+ width: 100vw;
+ height: 100vh;
+ background: var(--modal-overlay-color); }
+ [type="checkbox"].modal + div .card {
+ margin: 0 auto;
+ max-height: 50vh;
+ overflow: auto; }
+ [type="checkbox"].modal + div .card .modal-close {
+ position: absolute;
+ top: 0;
+ right: 0;
+ width: 1.75rem;
+ height: 1.75rem;
+ border-radius: var(--universal-border-radius);
+ padding: var(--universal-padding);
+ margin: 0;
+ cursor: pointer;
+ transition: background 0.3s; }
+ [type="checkbox"].modal + div .card .modal-close:before {
+ display: block;
+ content: '\00D7';
+ color: var(--modal-close-color);
+ position: relative;
+ font-family: sans-serif;
+ font-size: 1.75rem;
+ line-height: 1;
+ text-align: center; }
+ [type="checkbox"].modal + div .card .modal-close:hover, [type="checkbox"].modal + div .card .modal-close:focus {
+ background: var(--modal-close-hover-color); }
+ [type="checkbox"].modal:checked + div {
+ display: flex;
+ flex: 0 1 auto;
+ z-index: 1200; }
+ [type="checkbox"].modal:checked + div .card .modal-close {
+ z-index: 1211; }
+
+:root {
+ --collapse-label-back-color: #e8e8e8;
+ --collapse-label-fore-color: #212121;
+ --collapse-label-hover-back-color: #f0f0f0;
+ --collapse-selected-label-back-color: #ececec;
+ --collapse-border-color: #ddd;
+ --collapse-content-back-color: #fafafa;
+ --collapse-selected-label-border-color: #0277bd; }
+
+.collapse {
+ width: calc(100% - 2 * var(--universal-margin));
+ opacity: 1;
+ display: flex;
+ flex-direction: column;
+ margin: var(--universal-margin);
+ border-radius: var(--universal-border-radius); }
+ .collapse > [type="radio"], .collapse > [type="checkbox"] {
+ height: 1px;
+ width: 1px;
+ margin: -1px;
+ overflow: hidden;
+ position: absolute;
+ clip: rect(0 0 0 0);
+ -webkit-clip-path: inset(100%);
+ clip-path: inset(100%); }
+ .collapse > label {
+ flex-grow: 1;
+ display: inline-block;
+ height: 1.5rem;
+ cursor: pointer;
+ transition: background 0.3s;
+ color: var(--collapse-label-fore-color);
+ background: var(--collapse-label-back-color);
+ border: 0.0625rem solid var(--collapse-border-color);
+ padding: calc(1.5 * var(--universal-padding)); }
+ .collapse > label:hover, .collapse > label:focus {
+ background: var(--collapse-label-hover-back-color); }
+ .collapse > label + div {
+ flex-basis: auto;
+ height: 1px;
+ width: 1px;
+ margin: -1px;
+ overflow: hidden;
+ position: absolute;
+ clip: rect(0 0 0 0);
+ -webkit-clip-path: inset(100%);
+ clip-path: inset(100%);
+ transition: max-height 0.3s;
+ max-height: 1px; }
+ .collapse > :checked + label {
+ background: var(--collapse-selected-label-back-color);
+ border-bottom-color: var(--collapse-selected-label-border-color); }
+ .collapse > :checked + label + div {
+ box-sizing: border-box;
+ position: relative;
+ width: 100%;
+ height: auto;
+ overflow: auto;
+ margin: 0;
+ background: var(--collapse-content-back-color);
+ border: 0.0625rem solid var(--collapse-border-color);
+ border-top: 0;
+ padding: var(--universal-padding);
+ clip: auto;
+ -webkit-clip-path: inset(0%);
+ clip-path: inset(0%);
+ max-height: 850px; }
+ .collapse > label:not(:first-of-type) {
+ border-top: 0; }
+ .collapse > label:first-of-type {
+ border-radius: var(--universal-border-radius) var(--universal-border-radius) 0 0; }
+ .collapse > label:last-of-type:not(:first-of-type) {
+ border-radius: 0 0 var(--universal-border-radius) var(--universal-border-radius); }
+ .collapse > label:last-of-type:first-of-type {
+ border-radius: var(--universal-border-radius); }
+ .collapse > :checked:last-of-type:not(:first-of-type) + label {
+ border-radius: 0; }
+ .collapse > :checked:last-of-type + label + div {
+ border-radius: 0 0 var(--universal-border-radius) var(--universal-border-radius); }
+
+/*
+ Custom elements for contextual background elements, toasts and tooltips.
+*/
+mark.secondary {
+ --mark-back-color: #d32f2f; }
+
+mark.tertiary {
+ --mark-back-color: #308732; }
+
+mark.tag {
+ padding: calc(var(--universal-padding)/2) var(--universal-padding);
+ border-radius: 1em; }
+
+/*
+ Definitions for progress elements and spinners.
+*/
+/* Progess module CSS variable definitions */
+:root {
+ --progress-back-color: #ddd;
+ --progress-fore-color: #555; }
+
+progress {
+ display: block;
+ vertical-align: baseline;
+ -webkit-appearance: none;
+ -moz-appearance: none;
+ appearance: none;
+ height: 0.75rem;
+ width: calc(100% - 2 * var(--universal-margin));
+ margin: var(--universal-margin);
+ border: 0;
+ border-radius: calc(2 * var(--universal-border-radius));
+ background: var(--progress-back-color);
+ color: var(--progress-fore-color); }
+ progress::-webkit-progress-value {
+ background: var(--progress-fore-color);
+ border-top-left-radius: calc(2 * var(--universal-border-radius));
+ border-bottom-left-radius: calc(2 * var(--universal-border-radius)); }
+ progress::-webkit-progress-bar {
+ background: var(--progress-back-color); }
+ progress::-moz-progress-bar {
+ background: var(--progress-fore-color);
+ border-top-left-radius: calc(2 * var(--universal-border-radius));
+ border-bottom-left-radius: calc(2 * var(--universal-border-radius)); }
+ progress[value="1000"]::-webkit-progress-value {
+ border-radius: calc(2 * var(--universal-border-radius)); }
+ progress[value="1000"]::-moz-progress-bar {
+ border-radius: calc(2 * var(--universal-border-radius)); }
+ progress.inline {
+ display: inline-block;
+ vertical-align: middle;
+ width: 60%; }
+
+:root {
+ --spinner-back-color: #ddd;
+ --spinner-fore-color: #555; }
+
+@keyframes spinner-donut-anim {
+ 0% {
+ transform: rotate(0deg); }
+ 100% {
+ transform: rotate(360deg); } }
+.spinner {
+ display: inline-block;
+ margin: var(--universal-margin);
+ border: 0.25rem solid var(--spinner-back-color);
+ border-left: 0.25rem solid var(--spinner-fore-color);
+ border-radius: 50%;
+ width: 1.25rem;
+ height: 1.25rem;
+ animation: spinner-donut-anim 1.2s linear infinite; }
+
+/*
+ Custom elements for progress bars and spinners.
+*/
+progress.primary {
+ --progress-fore-color: #1976d2; }
+
+progress.secondary {
+ --progress-fore-color: #d32f2f; }
+
+progress.tertiary {
+ --progress-fore-color: #308732; }
+
+.spinner.primary {
+ --spinner-fore-color: #1976d2; }
+
+.spinner.secondary {
+ --spinner-fore-color: #d32f2f; }
+
+.spinner.tertiary {
+ --spinner-fore-color: #308732; }
+
+/*
+ Definitions for icons - powered by Feather (https://feathericons.com/).
+*/
+span[class^='icon-'] {
+ display: inline-block;
+ height: 1em;
+ width: 1em;
+ vertical-align: -0.125em;
+ background-size: contain;
+ margin: 0 calc(var(--universal-margin) / 4); }
+ span[class^='icon-'].secondary {
+ -webkit-filter: invert(25%);
+ filter: invert(25%); }
+ span[class^='icon-'].inverse {
+ -webkit-filter: invert(100%);
+ filter: invert(100%); }
+
+span.icon-alert {
+ background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%23111' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Ccircle cx='12' cy='12' r='10'%3E%3C/circle%3E%3Cline x1='12' y1='8' x2='12' y2='12'%3E%3C/line%3E%3Cline x1='12' y1='16' x2='12' y2='16'%3E%3C/line%3E%3C/svg%3E"); }
+span.icon-bookmark {
+ background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%23111' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M19 21l-7-5-7 5V5a2 2 0 0 1 2-2h10a2 2 0 0 1 2 2z'%3E%3C/path%3E%3C/svg%3E"); }
+span.icon-calendar {
+ background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%23111' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Crect x='3' y='4' width='18' height='18' rx='2' ry='2'%3E%3C/rect%3E%3Cline x1='16' y1='2' x2='16' y2='6'%3E%3C/line%3E%3Cline x1='8' y1='2' x2='8' y2='6'%3E%3C/line%3E%3Cline x1='3' y1='10' x2='21' y2='10'%3E%3C/line%3E%3C/svg%3E"); }
+span.icon-credit {
+ background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%23111' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Crect x='1' y='4' width='22' height='16' rx='2' ry='2'%3E%3C/rect%3E%3Cline x1='1' y1='10' x2='23' y2='10'%3E%3C/line%3E%3C/svg%3E"); }
+span.icon-edit {
+ background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%23111' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M20 14.66V20a2 2 0 0 1-2 2H4a2 2 0 0 1-2-2V6a2 2 0 0 1 2-2h5.34'%3E%3C/path%3E%3Cpolygon points='18 2 22 6 12 16 8 16 8 12 18 2'%3E%3C/polygon%3E%3C/svg%3E"); }
+span.icon-link {
+ background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%23111' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M18 13v6a2 2 0 0 1-2 2H5a2 2 0 0 1-2-2V8a2 2 0 0 1 2-2h6'%3E%3C/path%3E%3Cpolyline points='15 3 21 3 21 9'%3E%3C/polyline%3E%3Cline x1='10' y1='14' x2='21' y2='3'%3E%3C/line%3E%3C/svg%3E"); }
+span.icon-help {
+ background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%23111' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M9.09 9a3 3 0 0 1 5.83 1c0 2-3 3-3 3'%3E%3C/path%3E%3Ccircle cx='12' cy='12' r='10'%3E%3C/circle%3E%3Cline x1='12' y1='17' x2='12' y2='17'%3E%3C/line%3E%3C/svg%3E"); }
+span.icon-home {
+ background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%23111' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M3 9l9-7 9 7v11a2 2 0 0 1-2 2H5a2 2 0 0 1-2-2z'%3E%3C/path%3E%3Cpolyline points='9 22 9 12 15 12 15 22'%3E%3C/polyline%3E%3C/svg%3E"); }
+span.icon-info {
+ background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%23111' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Ccircle cx='12' cy='12' r='10'%3E%3C/circle%3E%3Cline x1='12' y1='16' x2='12' y2='12'%3E%3C/line%3E%3Cline x1='12' y1='8' x2='12' y2='8'%3E%3C/line%3E%3C/svg%3E"); }
+span.icon-lock {
+ background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%23111' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Crect x='3' y='11' width='18' height='11' rx='2' ry='2'%3E%3C/rect%3E%3Cpath d='M7 11V7a5 5 0 0 1 10 0v4'%3E%3C/path%3E%3C/svg%3E"); }
+span.icon-mail {
+ background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%23111' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M4 4h16c1.1 0 2 .9 2 2v12c0 1.1-.9 2-2 2H4c-1.1 0-2-.9-2-2V6c0-1.1.9-2 2-2z'%3E%3C/path%3E%3Cpolyline points='22,6 12,13 2,6'%3E%3C/polyline%3E%3C/svg%3E"); }
+span.icon-location {
+ background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%23111' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M21 10c0 7-9 13-9 13s-9-6-9-13a9 9 0 0 1 18 0z'%3E%3C/path%3E%3Ccircle cx='12' cy='10' r='3'%3E%3C/circle%3E%3C/svg%3E"); }
+span.icon-phone {
+ background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%23111' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M22 16.92v3a2 2 0 0 1-2.18 2 19.79 19.79 0 0 1-8.63-3.07 19.5 19.5 0 0 1-6-6 19.79 19.79 0 0 1-3.07-8.67A2 2 0 0 1 4.11 2h3a2 2 0 0 1 2 1.72 12.84 12.84 0 0 0 .7 2.81 2 2 0 0 1-.45 2.11L8.09 9.91a16 16 0 0 0 6 6l1.27-1.27a2 2 0 0 1 2.11-.45 12.84 12.84 0 0 0 2.81.7A2 2 0 0 1 22 16.92z'%3E%3C/path%3E%3C/svg%3E"); }
+span.icon-rss {
+ background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%23111' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M4 11a9 9 0 0 1 9 9'%3E%3C/path%3E%3Cpath d='M4 4a16 16 0 0 1 16 16'%3E%3C/path%3E%3Ccircle cx='5' cy='19' r='1'%3E%3C/circle%3E%3C/svg%3E"); }
+span.icon-search {
+ background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%23111' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Ccircle cx='11' cy='11' r='8'%3E%3C/circle%3E%3Cline x1='21' y1='21' x2='16.65' y2='16.65'%3E%3C/line%3E%3C/svg%3E"); }
+span.icon-settings {
+ background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%23111' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Ccircle cx='12' cy='12' r='3'%3E%3C/circle%3E%3Cpath d='M19.4 15a1.65 1.65 0 0 0 .33 1.82l.06.06a2 2 0 0 1 0 2.83 2 2 0 0 1-2.83 0l-.06-.06a1.65 1.65 0 0 0-1.82-.33 1.65 1.65 0 0 0-1 1.51V21a2 2 0 0 1-2 2 2 2 0 0 1-2-2v-.09A1.65 1.65 0 0 0 9 19.4a1.65 1.65 0 0 0-1.82.33l-.06.06a2 2 0 0 1-2.83 0 2 2 0 0 1 0-2.83l.06-.06a1.65 1.65 0 0 0 .33-1.82 1.65 1.65 0 0 0-1.51-1H3a2 2 0 0 1-2-2 2 2 0 0 1 2-2h.09A1.65 1.65 0 0 0 4.6 9a1.65 1.65 0 0 0-.33-1.82l-.06-.06a2 2 0 0 1 0-2.83 2 2 0 0 1 2.83 0l.06.06a1.65 1.65 0 0 0 1.82.33H9a1.65 1.65 0 0 0 1-1.51V3a2 2 0 0 1 2-2 2 2 0 0 1 2 2v.09a1.65 1.65 0 0 0 1 1.51 1.65 1.65 0 0 0 1.82-.33l.06-.06a2 2 0 0 1 2.83 0 2 2 0 0 1 0 2.83l-.06.06a1.65 1.65 0 0 0-.33 1.82V9a1.65 1.65 0 0 0 1.51 1H21a2 2 0 0 1 2 2 2 2 0 0 1-2 2h-.09a1.65 1.65 0 0 0-1.51 1z'%3E%3C/path%3E%3C/svg%3E"); }
+span.icon-share {
+ background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%23111' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Ccircle cx='18' cy='5' r='3'%3E%3C/circle%3E%3Ccircle cx='6' cy='12' r='3'%3E%3C/circle%3E%3Ccircle cx='18' cy='19' r='3'%3E%3C/circle%3E%3Cline x1='8.59' y1='13.51' x2='15.42' y2='17.49'%3E%3C/line%3E%3Cline x1='15.41' y1='6.51' x2='8.59' y2='10.49'%3E%3C/line%3E%3C/svg%3E"); }
+span.icon-cart {
+ background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%23111' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Ccircle cx='9' cy='21' r='1'%3E%3C/circle%3E%3Ccircle cx='20' cy='21' r='1'%3E%3C/circle%3E%3Cpath d='M1 1h4l2.68 13.39a2 2 0 0 0 2 1.61h9.72a2 2 0 0 0 2-1.61L23 6H6'%3E%3C/path%3E%3C/svg%3E"); }
+span.icon-upload {
+ background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%23111' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M21 15v4a2 2 0 0 1-2 2H5a2 2 0 0 1-2-2v-4'%3E%3C/path%3E%3Cpolyline points='17 8 12 3 7 8'%3E%3C/polyline%3E%3Cline x1='12' y1='3' x2='12' y2='15'%3E%3C/line%3E%3C/svg%3E"); }
+span.icon-user {
+ background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%23111' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M20 21v-2a4 4 0 0 0-4-4H8a4 4 0 0 0-4 4v2'%3E%3C/path%3E%3Ccircle cx='12' cy='7' r='4'%3E%3C/circle%3E%3C/svg%3E"); }
+
+/*
+ Definitions for utilities and helper classes.
+*/
+/* Utility module CSS variable definitions */
+:root {
+ --generic-border-color: rgba(0, 0, 0, 0.3);
+ --generic-box-shadow: 0 0.25rem 0.25rem 0 rgba(0, 0, 0, 0.125), 0 0.125rem 0.125rem -0.125rem rgba(0, 0, 0, 0.25); }
+
+.hidden {
+ display: none !important; }
+
+.visually-hidden {
+ position: absolute !important;
+ width: 1px !important;
+ height: 1px !important;
+ margin: -1px !important;
+ border: 0 !important;
+ padding: 0 !important;
+ clip: rect(0 0 0 0) !important;
+ -webkit-clip-path: inset(100%) !important;
+ clip-path: inset(100%) !important;
+ overflow: hidden !important; }
+
+.bordered {
+ border: 0.0625rem solid var(--generic-border-color) !important; }
+
+.rounded {
+ border-radius: var(--universal-border-radius) !important; }
+
+.circular {
+ border-radius: 50% !important; }
+
+.shadowed {
+ box-shadow: var(--generic-box-shadow) !important; }
+
+.responsive-margin {
+ margin: calc(var(--universal-margin) / 4) !important; }
+ @media screen and (min-width: 500px) {
+ .responsive-margin {
+ margin: calc(var(--universal-margin) / 2) !important; } }
+ @media screen and (min-width: 1280px) {
+ .responsive-margin {
+ margin: var(--universal-margin) !important; } }
+
+.responsive-padding {
+ padding: calc(var(--universal-padding) / 4) !important; }
+ @media screen and (min-width: 500px) {
+ .responsive-padding {
+ padding: calc(var(--universal-padding) / 2) !important; } }
+ @media screen and (min-width: 1280px) {
+ .responsive-padding {
+ padding: var(--universal-padding) !important; } }
+
+@media screen and (max-width: 499px) {
+ .hidden-sm {
+ display: none !important; } }
+@media screen and (min-width: 500px) and (max-width: 1279px) {
+ .hidden-md {
+ display: none !important; } }
+@media screen and (min-width: 1280px) {
+ .hidden-lg {
+ display: none !important; } }
+@media screen and (max-width: 499px) {
+ .visually-hidden-sm {
+ position: absolute !important;
+ width: 1px !important;
+ height: 1px !important;
+ margin: -1px !important;
+ border: 0 !important;
+ padding: 0 !important;
+ clip: rect(0 0 0 0) !important;
+ -webkit-clip-path: inset(100%) !important;
+ clip-path: inset(100%) !important;
+ overflow: hidden !important; } }
+@media screen and (min-width: 500px) and (max-width: 1279px) {
+ .visually-hidden-md {
+ position: absolute !important;
+ width: 1px !important;
+ height: 1px !important;
+ margin: -1px !important;
+ border: 0 !important;
+ padding: 0 !important;
+ clip: rect(0 0 0 0) !important;
+ -webkit-clip-path: inset(100%) !important;
+ clip-path: inset(100%) !important;
+ overflow: hidden !important; } }
+@media screen and (min-width: 1280px) {
+ .visually-hidden-lg {
+ position: absolute !important;
+ width: 1px !important;
+ height: 1px !important;
+ margin: -1px !important;
+ border: 0 !important;
+ padding: 0 !important;
+ clip: rect(0 0 0 0) !important;
+ -webkit-clip-path: inset(100%) !important;
+ clip-path: inset(100%) !important;
+ overflow: hidden !important; } }
+
+/*# sourceMappingURL=mini-default.css.map */
diff --git a/P3_SETR2/BSP/_htmresc/st_logo.png b/P3_SETR2/BSP/_htmresc/st_logo.png
new file mode 100644
index 0000000..8b80057
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+/**
+ ******************************************************************************
+ * @file stm32l475e_iot01.c
+ * @author MCD Application Team
+ * @brief STM32L475E-IOT01 board support package
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2017 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32l475e_iot01.h"
+
+/** @defgroup BSP BSP
+ * @{
+ */
+
+/** @defgroup STM32L475E_IOT01 STM32L475E_IOT01
+ * @{
+ */
+
+/** @defgroup STM32L475E_IOT01_LOW_LEVEL LOW LEVEL
+ * @{
+ */
+
+/** @defgroup STM32L475E_IOT01_LOW_LEVEL_Private_Defines LOW LEVEL Private Def
+ * @{
+ */
+/**
+ * @brief STM32L475E IOT01 BSP Driver version number
+ */
+#define __STM32L475E_IOT01_BSP_VERSION_MAIN (0x01) /*!< [31:24] main version */
+#define __STM32L475E_IOT01_BSP_VERSION_SUB1 (0x01) /*!< [23:16] sub1 version */
+#define __STM32L475E_IOT01_BSP_VERSION_SUB2 (0x06) /*!< [15:8] sub2 version */
+#define __STM32L475E_IOT01_BSP_VERSION_RC (0x00) /*!< [7:0] release candidate */
+#define __STM32L475E_IOT01_BSP_VERSION ((__STM32L475E_IOT01_BSP_VERSION_MAIN << 24)\
+ |(__STM32L475E_IOT01_BSP_VERSION_SUB1 << 16)\
+ |(__STM32L475E_IOT01_BSP_VERSION_SUB2 << 8 )\
+ |(__STM32L475E_IOT01_BSP_VERSION_RC))
+/**
+ * @}
+ */
+
+/** @defgroup STM32L475E_IOT01_LOW_LEVEL_Private_Variables LOW LEVEL Variables
+ * @{
+ */
+
+const uint32_t GPIO_PIN[LEDn] = {LED2_PIN};
+
+
+GPIO_TypeDef* GPIO_PORT[LEDn] = {LED2_GPIO_PORT};
+
+
+GPIO_TypeDef* BUTTON_PORT[BUTTONn] = {USER_BUTTON_GPIO_PORT};
+
+const uint16_t BUTTON_PIN[BUTTONn] = {USER_BUTTON_PIN};
+
+const uint16_t BUTTON_IRQn[BUTTONn] = {USER_BUTTON_EXTI_IRQn};
+
+USART_TypeDef* COM_USART[COMn] = {DISCOVERY_COM1};
+
+GPIO_TypeDef* COM_TX_PORT[COMn] = {DISCOVERY_COM1_TX_GPIO_PORT};
+
+GPIO_TypeDef* COM_RX_PORT[COMn] = {DISCOVERY_COM1_RX_GPIO_PORT};
+
+const uint16_t COM_TX_PIN[COMn] = {DISCOVERY_COM1_TX_PIN};
+
+const uint16_t COM_RX_PIN[COMn] = {DISCOVERY_COM1_RX_PIN};
+
+const uint16_t COM_TX_AF[COMn] = {DISCOVERY_COM1_TX_AF};
+
+const uint16_t COM_RX_AF[COMn] = {DISCOVERY_COM1_RX_AF};
+
+I2C_HandleTypeDef hI2cHandler;
+UART_HandleTypeDef hDiscoUart;
+
+/**
+ * @}
+ */
+/** @defgroup STM32L475E_IOT01_LOW_LEVEL_Private_FunctionPrototypes LOW LEVEL Private Function Prototypes
+ * @{
+ */
+static void I2Cx_MspInit(I2C_HandleTypeDef *i2c_handler);
+static void I2Cx_MspDeInit(I2C_HandleTypeDef *i2c_handler);
+static void I2Cx_Init(I2C_HandleTypeDef *i2c_handler);
+static void I2Cx_DeInit(I2C_HandleTypeDef *i2c_handler);
+static HAL_StatusTypeDef I2Cx_ReadMultiple(I2C_HandleTypeDef *i2c_handler, uint8_t Addr, uint16_t Reg, uint16_t MemAddSize, uint8_t *Buffer, uint16_t Length);
+static HAL_StatusTypeDef I2Cx_WriteMultiple(I2C_HandleTypeDef *i2c_handler, uint8_t Addr, uint16_t Reg, uint16_t MemAddSize, uint8_t *Buffer, uint16_t Length);
+static HAL_StatusTypeDef I2Cx_IsDeviceReady(I2C_HandleTypeDef *i2c_handler, uint16_t DevAddress, uint32_t Trials);
+static void I2Cx_Error(I2C_HandleTypeDef *i2c_handler, uint8_t Addr);
+
+/* Sensors IO functions */
+void SENSOR_IO_Init(void);
+void SENSOR_IO_DeInit(void);
+void SENSOR_IO_Write(uint8_t Addr, uint8_t Reg, uint8_t Value);
+uint8_t SENSOR_IO_Read(uint8_t Addr, uint8_t Reg);
+uint16_t SENSOR_IO_ReadMultiple(uint8_t Addr, uint8_t Reg, uint8_t *Buffer, uint16_t Length);
+void SENSOR_IO_WriteMultiple(uint8_t Addr, uint8_t Reg, uint8_t *Buffer, uint16_t Length);
+HAL_StatusTypeDef SENSOR_IO_IsDeviceReady(uint16_t DevAddress, uint32_t Trials);
+void SENSOR_IO_Delay(uint32_t Delay);
+
+void NFC_IO_Init(uint8_t GpoIrqEnable);
+void NFC_IO_DeInit(void);
+uint16_t NFC_IO_ReadMultiple (uint8_t Addr, uint8_t *pBuffer, uint16_t Length );
+uint16_t NFC_IO_WriteMultiple (uint8_t Addr, uint8_t *pBuffer, uint16_t Length);
+uint16_t NFC_IO_IsDeviceReady (uint8_t Addr, uint32_t Trials);
+void NFC_IO_ReadState(uint8_t * pPinState);
+void NFC_IO_RfDisable(uint8_t PinState);
+void NFC_IO_Delay(uint32_t Delay);
+
+/**
+ * @}
+ */
+
+/** @defgroup STM32L475E_IOT01_LOW_LEVEL_Private_Functions LOW LEVEL Private Functions
+ * @{
+ */
+
+/**
+ * @brief This method returns the STM32L475E IOT01 BSP Driver revision
+ * @retval version 0xXYZR (8bits for each decimal, R for RC)
+ */
+uint32_t BSP_GetVersion(void)
+{
+ return __STM32L475E_IOT01_BSP_VERSION;
+}
+
+/**
+ * @brief Initializes LED GPIO.
+ * @param Led LED to be initialized.
+ * This parameter can be one of the following values:
+ * @arg LED2
+ */
+void BSP_LED_Init(Led_TypeDef Led)
+{
+ GPIO_InitTypeDef gpio_init_structure;
+
+ LEDx_GPIO_CLK_ENABLE(Led);
+ /* Configure the GPIO_LED pin */
+ gpio_init_structure.Pin = GPIO_PIN[Led];
+ gpio_init_structure.Mode = GPIO_MODE_OUTPUT_PP;
+ gpio_init_structure.Pull = GPIO_NOPULL;
+ gpio_init_structure.Speed = GPIO_SPEED_FREQ_HIGH;
+
+ HAL_GPIO_Init(GPIO_PORT[Led], &gpio_init_structure);
+}
+
+/**
+ * @brief DeInitializes LED GPIO.
+ * @param Led LED to be deinitialized.
+ * This parameter can be one of the following values:
+ * @arg LED2
+ */
+void BSP_LED_DeInit(Led_TypeDef Led)
+{
+ GPIO_InitTypeDef gpio_init_structure;
+
+ /* DeInit the GPIO_LED pin */
+ gpio_init_structure.Pin = GPIO_PIN[Led];
+
+ /* Turn off LED */
+ HAL_GPIO_WritePin(GPIO_PORT[Led], GPIO_PIN[Led], GPIO_PIN_RESET);
+ HAL_GPIO_DeInit(GPIO_PORT[Led], gpio_init_structure.Pin);
+}
+
+/**
+ * @brief Turns the selected LED On.
+ * @param Led LED to be set on
+ * This parameter can be one of the following values:
+ * @arg LED2
+ */
+void BSP_LED_On(Led_TypeDef Led)
+{
+ HAL_GPIO_WritePin(GPIO_PORT[Led], GPIO_PIN[Led], GPIO_PIN_SET);
+}
+
+/**
+ * @brief Turns the selected LED Off.
+ * @param Led LED to be set off
+ * This parameter can be one of the following values:
+ * @arg LED2
+ */
+void BSP_LED_Off(Led_TypeDef Led)
+{
+ HAL_GPIO_WritePin(GPIO_PORT[Led], GPIO_PIN[Led], GPIO_PIN_RESET);
+}
+
+/**
+ * @brief Toggles the selected LED.
+ * @param Led LED to be toggled
+ * This parameter can be one of the following values:
+ * @arg LED2
+ */
+void BSP_LED_Toggle(Led_TypeDef Led)
+{
+ HAL_GPIO_TogglePin(GPIO_PORT[Led], GPIO_PIN[Led]);
+}
+
+/**
+ * @brief Initializes push button GPIO and EXTI Line.
+ * @param Button Button to be configured
+ * This parameter can be one of the following values:
+ * @arg BUTTON_USER User Push Button
+ * @param ButtonMode Button mode
+ * This parameter can be one of the following values:
+ * @arg BUTTON_MODE_GPIO Button will be used as simple IO
+ * @arg BUTTON_MODE_EXTI Button will be connected to EXTI line
+ * with interrupt generation capability
+ */
+void BSP_PB_Init(Button_TypeDef Button, ButtonMode_TypeDef ButtonMode)
+{
+ GPIO_InitTypeDef gpio_init_structure;
+
+ /* Enable the BUTTON clock */
+ USER_BUTTON_GPIO_CLK_ENABLE();
+
+ if(ButtonMode == BUTTON_MODE_GPIO)
+ {
+ /* Configure Button pin as input */
+ gpio_init_structure.Pin = BUTTON_PIN[Button];
+ gpio_init_structure.Mode = GPIO_MODE_INPUT;
+ gpio_init_structure.Pull = GPIO_PULLUP;
+ gpio_init_structure.Speed = GPIO_SPEED_FREQ_HIGH;
+ HAL_GPIO_Init(BUTTON_PORT[Button], &gpio_init_structure);
+ }
+
+ if(ButtonMode == BUTTON_MODE_EXTI)
+ {
+ /* Configure Button pin as input with External interrupt */
+ gpio_init_structure.Pin = BUTTON_PIN[Button];
+ gpio_init_structure.Pull = GPIO_PULLUP;
+ gpio_init_structure.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+
+ gpio_init_structure.Mode = GPIO_MODE_IT_RISING;
+
+ HAL_GPIO_Init(BUTTON_PORT[Button], &gpio_init_structure);
+
+ /* Enable and set Button EXTI Interrupt to the lowest priority */
+ HAL_NVIC_SetPriority((IRQn_Type)(BUTTON_IRQn[Button]), 0x0F, 0x00);
+ HAL_NVIC_EnableIRQ((IRQn_Type)(BUTTON_IRQn[Button]));
+ }
+}
+
+/**
+ * @brief DeInitializes push button.
+ * @param Button Button to be configured
+ * This parameter can be one of the following values:
+ * @arg BUTTON_USER User Push Button
+ * @note PB DeInit does not disable the GPIO clock
+ */
+void BSP_PB_DeInit(Button_TypeDef Button)
+{
+ GPIO_InitTypeDef gpio_init_structure;
+
+ gpio_init_structure.Pin = BUTTON_PIN[Button];
+ HAL_NVIC_DisableIRQ((IRQn_Type)(BUTTON_IRQn[Button]));
+ HAL_GPIO_DeInit(BUTTON_PORT[Button], gpio_init_structure.Pin);
+}
+
+
+/**
+ * @brief Returns the selected button state.
+ * @param Button Button to be checked
+ * This parameter can be one of the following values:
+ * @arg BUTTON_USER User Push Button
+ * @retval The Button GPIO pin value (GPIO_PIN_RESET = button pressed)
+ */
+uint32_t BSP_PB_GetState(Button_TypeDef Button)
+{
+ return HAL_GPIO_ReadPin(BUTTON_PORT[Button], BUTTON_PIN[Button]);
+}
+
+/**
+ * @brief Configures COM port.
+ * @param COM COM port to be initialized.
+ * This parameter can be one of the following values:
+ * @arg COM1
+ * @param huart Pointer to a UART_HandleTypeDef structure that contains the
+ * configuration information for the specified USART peripheral.
+ */
+void BSP_COM_Init(COM_TypeDef COM, UART_HandleTypeDef *huart)
+{
+ GPIO_InitTypeDef gpio_init_structure;
+
+ /* Enable GPIO clock */
+ DISCOVERY_COMx_TX_GPIO_CLK_ENABLE(COM);
+ DISCOVERY_COMx_RX_GPIO_CLK_ENABLE(COM);
+
+ /* Enable USART clock */
+ DISCOVERY_COMx_CLK_ENABLE(COM);
+
+ /* Configure USART Tx as alternate function */
+ gpio_init_structure.Pin = COM_TX_PIN[COM];
+ gpio_init_structure.Mode = GPIO_MODE_AF_PP;
+ gpio_init_structure.Speed = GPIO_SPEED_FREQ_HIGH;
+ gpio_init_structure.Pull = GPIO_NOPULL;
+ gpio_init_structure.Alternate = COM_TX_AF[COM];
+ HAL_GPIO_Init(COM_TX_PORT[COM], &gpio_init_structure);
+
+ /* Configure USART Rx as alternate function */
+ gpio_init_structure.Pin = COM_RX_PIN[COM];
+ gpio_init_structure.Mode = GPIO_MODE_AF_PP;
+ gpio_init_structure.Alternate = COM_RX_AF[COM];
+ HAL_GPIO_Init(COM_RX_PORT[COM], &gpio_init_structure);
+
+ /* USART configuration */
+ huart->Instance = COM_USART[COM];
+ HAL_UART_Init(huart);
+}
+
+/**
+ * @brief DeInitializes COM port.
+ * @param COM COM port to be deinitialized.
+ * This parameter can be one of the following values:
+ * @arg COM1
+ * @param huart Pointer to a UART_HandleTypeDef structure that contains the
+ * configuration information for the specified USART peripheral.
+ */
+void BSP_COM_DeInit(COM_TypeDef COM, UART_HandleTypeDef *huart)
+{
+ /* USART configuration */
+ huart->Instance = COM_USART[COM];
+ HAL_UART_DeInit(huart);
+
+ /* Enable USART clock */
+ DISCOVERY_COMx_CLK_DISABLE(COM);
+
+ /* DeInit GPIO pins can be done in the application
+ (by surcharging this __weak function) */
+
+ /* GPIO pins clock, FMC clock and DMA clock can be shut down in the application
+ by surcharging this __weak function */
+}
+
+
+/*******************************************************************************
+ BUS OPERATIONS
+*******************************************************************************/
+
+/******************************* I2C Routines *********************************/
+/**
+ * @brief Initializes I2C MSP.
+ * @param i2c_handler I2C handler
+ * @retval None
+ */
+static void I2Cx_MspInit(I2C_HandleTypeDef *i2c_handler)
+{
+ GPIO_InitTypeDef gpio_init_structure;
+
+ /*** Configure the GPIOs ***/
+ /* Enable GPIO clock */
+ DISCOVERY_I2Cx_SCL_SDA_GPIO_CLK_ENABLE();
+
+ /* Configure I2C Tx, Rx as alternate function */
+ gpio_init_structure.Pin = DISCOVERY_I2Cx_SCL_PIN | DISCOVERY_I2Cx_SDA_PIN;
+ gpio_init_structure.Mode = GPIO_MODE_AF_OD;
+ gpio_init_structure.Pull = GPIO_PULLUP;
+ gpio_init_structure.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+ gpio_init_structure.Alternate = DISCOVERY_I2Cx_SCL_SDA_AF;
+ HAL_GPIO_Init(DISCOVERY_I2Cx_SCL_SDA_GPIO_PORT, &gpio_init_structure);
+
+ HAL_GPIO_Init(DISCOVERY_I2Cx_SCL_SDA_GPIO_PORT, &gpio_init_structure);
+
+ /*** Configure the I2C peripheral ***/
+ /* Enable I2C clock */
+ DISCOVERY_I2Cx_CLK_ENABLE();
+
+ /* Force the I2C peripheral clock reset */
+ DISCOVERY_I2Cx_FORCE_RESET();
+
+ /* Release the I2C peripheral clock reset */
+ DISCOVERY_I2Cx_RELEASE_RESET();
+
+ /* Enable and set I2Cx Interrupt to a lower priority */
+ HAL_NVIC_SetPriority(DISCOVERY_I2Cx_EV_IRQn, 0x0F, 0);
+ HAL_NVIC_EnableIRQ(DISCOVERY_I2Cx_EV_IRQn);
+
+ /* Enable and set I2Cx Interrupt to a lower priority */
+ HAL_NVIC_SetPriority(DISCOVERY_I2Cx_ER_IRQn, 0x0F, 0);
+ HAL_NVIC_EnableIRQ(DISCOVERY_I2Cx_ER_IRQn);
+}
+
+/**
+ * @brief DeInitializes I2C MSP.
+ * @param i2c_handler I2C handler
+ * @retval None
+ */
+static void I2Cx_MspDeInit(I2C_HandleTypeDef *i2c_handler)
+{
+ GPIO_InitTypeDef gpio_init_structure;
+
+ /* Configure I2C Tx, Rx as alternate function */
+ gpio_init_structure.Pin = DISCOVERY_I2Cx_SCL_PIN | DISCOVERY_I2Cx_SDA_PIN;
+ HAL_GPIO_DeInit(DISCOVERY_I2Cx_SCL_SDA_GPIO_PORT, gpio_init_structure.Pin);
+ /* Disable GPIO clock */
+ DISCOVERY_I2Cx_SCL_SDA_GPIO_CLK_DISABLE();
+
+ /* Disable I2C clock */
+ DISCOVERY_I2Cx_CLK_DISABLE();
+}
+
+/**
+ * @brief Initializes I2C HAL.
+ * @param i2c_handler I2C handler
+ * @retval None
+ */
+static void I2Cx_Init(I2C_HandleTypeDef *i2c_handler)
+{
+ /* I2C configuration */
+ i2c_handler->Instance = DISCOVERY_I2Cx;
+ i2c_handler->Init.Timing = DISCOVERY_I2Cx_TIMING;
+ i2c_handler->Init.OwnAddress1 = 0;
+ i2c_handler->Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;
+ i2c_handler->Init.DualAddressMode = I2C_DUALADDRESS_DISABLE;
+ i2c_handler->Init.OwnAddress2 = 0;
+ i2c_handler->Init.GeneralCallMode = I2C_GENERALCALL_DISABLE;
+ i2c_handler->Init.NoStretchMode = I2C_NOSTRETCH_DISABLE;
+
+ /* Init the I2C */
+ I2Cx_MspInit(i2c_handler);
+ HAL_I2C_Init(i2c_handler);
+
+ /**Configure Analogue filter */
+ HAL_I2CEx_ConfigAnalogFilter(i2c_handler, I2C_ANALOGFILTER_ENABLE);
+}
+
+/**
+ * @brief DeInitializes I2C HAL.
+ * @param i2c_handler I2C handler
+ * @retval None
+ */
+static void I2Cx_DeInit(I2C_HandleTypeDef *i2c_handler)
+{ /* DeInit the I2C */
+ I2Cx_MspDeInit(i2c_handler);
+ HAL_I2C_DeInit(i2c_handler);
+}
+
+/**
+ * @brief Reads multiple data.
+ * @param i2c_handler I2C handler
+ * @param Addr I2C address
+ * @param Reg Reg address
+ * @param MemAddress memory address
+ * @param Buffer Pointer to data buffer
+ * @param Length Length of the data
+ * @retval HAL status
+ */
+static HAL_StatusTypeDef I2Cx_ReadMultiple(I2C_HandleTypeDef *i2c_handler, uint8_t Addr, uint16_t Reg, uint16_t MemAddress, uint8_t *Buffer, uint16_t Length)
+{
+ HAL_StatusTypeDef status = HAL_OK;
+
+ status = HAL_I2C_Mem_Read(i2c_handler, Addr, (uint16_t)Reg, MemAddress, Buffer, Length, 1000);
+
+ /* Check the communication status */
+ if(status != HAL_OK)
+ {
+ /* I2C error occured */
+ I2Cx_Error(i2c_handler, Addr);
+ }
+ return status;
+}
+
+
+/**
+ * @brief Writes a value in a register of the device through BUS in using DMA mode.
+ * @param i2c_handler I2C handler
+ * @param Addr Device address on BUS Bus.
+ * @param Reg The target register address to write
+ * @param MemAddress memory address
+ * @param Buffer The target register value to be written
+ * @param Length buffer size to be written
+ * @retval HAL status
+ */
+static HAL_StatusTypeDef I2Cx_WriteMultiple(I2C_HandleTypeDef *i2c_handler, uint8_t Addr, uint16_t Reg, uint16_t MemAddress, uint8_t *Buffer, uint16_t Length)
+{
+ HAL_StatusTypeDef status = HAL_OK;
+
+ status = HAL_I2C_Mem_Write(i2c_handler, Addr, (uint16_t)Reg, MemAddress, Buffer, Length, 1000);
+
+ /* Check the communication status */
+ if(status != HAL_OK)
+ {
+ /* Re-Initiaize the I2C Bus */
+ I2Cx_Error(i2c_handler, Addr);
+ }
+ return status;
+}
+
+/**
+ * @brief Checks if target device is ready for communication.
+ * @note This function is used with Memory devices
+ * @param i2c_handler I2C handler
+ * @param DevAddress Target device address
+ * @param Trials Number of trials
+ * @retval HAL status
+ */
+static HAL_StatusTypeDef I2Cx_IsDeviceReady(I2C_HandleTypeDef *i2c_handler, uint16_t DevAddress, uint32_t Trials)
+{
+ return (HAL_I2C_IsDeviceReady(i2c_handler, DevAddress, Trials, 1000));
+}
+
+/**
+ * @brief Manages error callback by re-initializing I2C.
+ * @param i2c_handler I2C handler
+ * @param Addr I2C Address
+ * @retval None
+ */
+static void I2Cx_Error(I2C_HandleTypeDef *i2c_handler, uint8_t Addr)
+{
+ /* De-initialize the I2C communication bus */
+ HAL_I2C_DeInit(i2c_handler);
+
+ /* Re-Initialize the I2C communication bus */
+ I2Cx_Init(i2c_handler);
+}
+
+/**
+ * @}
+ */
+
+/*******************************************************************************
+ LINK OPERATIONS
+*******************************************************************************/
+/******************************** LINK Sensors ********************************/
+
+/**
+ * @brief Initializes Sensors low level.
+ * @retval None
+ */
+void SENSOR_IO_Init(void)
+{
+ I2Cx_Init(&hI2cHandler);
+}
+
+/**
+ * @brief DeInitializes Sensors low level.
+ * @retval None
+ */
+void SENSOR_IO_DeInit(void)
+{
+ I2Cx_DeInit(&hI2cHandler);
+}
+
+/**
+ * @brief Writes a single data.
+ * @param Addr I2C address
+ * @param Reg Reg address
+ * @param Value Data to be written
+ * @retval None
+ */
+void SENSOR_IO_Write(uint8_t Addr, uint8_t Reg, uint8_t Value)
+{
+ I2Cx_WriteMultiple(&hI2cHandler, Addr, (uint16_t)Reg, I2C_MEMADD_SIZE_8BIT,(uint8_t*)&Value, 1);
+}
+
+/**
+ * @brief Reads a single data.
+ * @param Addr I2C address
+ * @param Reg Reg address
+ * @retval Data to be read
+ */
+uint8_t SENSOR_IO_Read(uint8_t Addr, uint8_t Reg)
+{
+ uint8_t read_value = 0;
+
+ I2Cx_ReadMultiple(&hI2cHandler, Addr, Reg, I2C_MEMADD_SIZE_8BIT, (uint8_t*)&read_value, 1);
+
+ return read_value;
+}
+
+/**
+ * @brief Reads multiple data with I2C communication
+ * channel from TouchScreen.
+ * @param Addr I2C address
+ * @param Reg Register address
+ * @param Buffer Pointer to data buffer
+ * @param Length Length of the data
+ * @retval HAL status
+ */
+uint16_t SENSOR_IO_ReadMultiple(uint8_t Addr, uint8_t Reg, uint8_t *Buffer, uint16_t Length)
+{
+ return I2Cx_ReadMultiple(&hI2cHandler, Addr, (uint16_t)Reg, I2C_MEMADD_SIZE_8BIT, Buffer, Length);
+}
+
+/**
+ * @brief Writes multiple data with I2C communication
+ * channel from MCU to TouchScreen.
+ * @param Addr I2C address
+ * @param Reg Register address
+ * @param Buffer Pointer to data buffer
+ * @param Length Length of the data
+ * @retval None
+ */
+void SENSOR_IO_WriteMultiple(uint8_t Addr, uint8_t Reg, uint8_t *Buffer, uint16_t Length)
+{
+ I2Cx_WriteMultiple(&hI2cHandler, Addr, (uint16_t)Reg, I2C_MEMADD_SIZE_8BIT, Buffer, Length);
+}
+
+/**
+ * @brief Checks if target device is ready for communication.
+ * @note This function is used with Memory devices
+ * @param DevAddress Target device address
+ * @param Trials Number of trials
+ * @retval HAL status
+ */
+HAL_StatusTypeDef SENSOR_IO_IsDeviceReady(uint16_t DevAddress, uint32_t Trials)
+{
+ return (I2Cx_IsDeviceReady(&hI2cHandler, DevAddress, Trials));
+}
+
+/**
+ * @brief Delay function used in Sensor low level driver.
+ * @param Delay Delay in ms
+ * @retval None
+ */
+void SENSOR_IO_Delay(uint32_t Delay)
+{
+ HAL_Delay(Delay);
+}
+
+/******************************** LINK NFC ********************************/
+
+/**
+ * @brief Initializes Sensors low level.
+ * @param GpoIrqEnable 0x0 is disable, otherwise enabled
+ * @retval None
+ */
+void NFC_IO_Init(uint8_t GpoIrqEnable)
+{
+ GPIO_InitTypeDef GPIO_InitStruct;
+
+ /* I2C init */
+ I2Cx_Init(&hI2cHandler);
+
+ /* GPIO Ports Clock Enable */
+ NFC_GPIO_CLK_ENABLE();
+
+ /* Configure GPIO pins for GPO (PE4) */
+ if(GpoIrqEnable == 0)
+ {
+ GPIO_InitStruct.Pin = NFC_GPIO_GPO_PIN;
+ GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
+ GPIO_InitStruct.Pull = GPIO_PULLUP;
+ GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+ HAL_GPIO_Init(NFC_GPIO_GPO_PIN_PORT, &GPIO_InitStruct);
+ }
+ else
+ {
+ GPIO_InitStruct.Pin = NFC_GPIO_GPO_PIN;
+ GPIO_InitStruct.Mode = GPIO_MODE_IT_FALLING;
+ GPIO_InitStruct.Pull = GPIO_PULLUP;
+ GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+ HAL_GPIO_Init(NFC_GPIO_GPO_PIN_PORT, &GPIO_InitStruct);
+ /* Enable and set EXTI4_IRQn Interrupt to the lowest priority */
+ HAL_NVIC_SetPriority(EXTI4_IRQn, 3, 0);
+ HAL_NVIC_EnableIRQ(EXTI4_IRQn);
+ }
+
+ /* Configure GPIO pins for DISABLE (PE2)*/
+ GPIO_InitStruct.Pin = NFC_GPIO_RFDISABLE_PIN;
+ GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+ GPIO_InitStruct.Pull = GPIO_NOPULL;
+ HAL_GPIO_Init(NFC_GPIO_RFDISABLE_PIN_PORT, &GPIO_InitStruct);
+}
+
+/**
+ * @brief DeInitializes Sensors low level.
+ * @retval None
+ */
+void NFC_IO_DeInit(void)
+{
+ I2Cx_DeInit(&hI2cHandler);
+}
+
+/**
+ * @brief This functions reads a response of the M24SR device
+ * @param Addr M24SR I2C address
+ * @param pBuffer Pointer on the buffer to retrieve M24SR response
+ * @param Length Length of the data
+ * @retval Status Success or Timeout
+ */
+uint16_t NFC_IO_ReadMultiple (uint8_t Addr, uint8_t *pBuffer, uint16_t Length )
+{
+ uint16_t status ;
+
+ /* Before calling this function M24SR must be ready: check to detect potential issues */
+ status = NFC_IO_IsDeviceReady(Addr, NFC_I2C_TRIALS);
+ if (status != NFC_I2C_STATUS_SUCCESS)
+ {
+ return NFC_I2C_ERROR_TIMEOUT;
+ }
+
+ if( HAL_I2C_Master_Receive(&hI2cHandler, Addr, (uint8_t*)pBuffer, Length, NFC_I2C_TIMEOUT_STD) != HAL_OK)
+ {
+ return NFC_I2C_ERROR_TIMEOUT;
+ }
+
+ return NFC_I2C_STATUS_SUCCESS;
+}
+
+/**
+ * @brief This functions sends the command buffer
+ * @param Addr M24SR I2C address
+ * @param pBuffer pointer to the buffer to send to the M24SR
+ * @param Length Length of the data
+ * @retval Status Success or Timeout
+ */
+uint16_t NFC_IO_WriteMultiple (uint8_t Addr, uint8_t *pBuffer, uint16_t Length)
+{
+ uint16_t status ;
+
+ /* Before calling this function M24SR must be ready: check to detect potential issues */
+ status = NFC_IO_IsDeviceReady(Addr, NFC_I2C_TRIALS);
+ if (status != NFC_I2C_STATUS_SUCCESS)
+ {
+ return NFC_I2C_ERROR_TIMEOUT;
+ }
+
+ if( HAL_I2C_Master_Transmit(&hI2cHandler, Addr, (uint8_t*)pBuffer, Length, NFC_I2C_TIMEOUT_STD) != HAL_OK)
+ {
+ return NFC_I2C_ERROR_TIMEOUT;
+ }
+
+ return NFC_I2C_STATUS_SUCCESS;
+}
+
+/**
+ * @brief Checks if target device is ready for communication.
+ * @param Addr M24SR I2C address
+ * @param Trials Number of trials (currently not present in M24sr)
+ * @retval Status Success or Timeout
+ */
+uint16_t NFC_IO_IsDeviceReady (uint8_t Addr, uint32_t Trials)
+{
+ HAL_StatusTypeDef status;
+ uint32_t tickstart = 0;
+ uint32_t currenttick = 0;
+
+ /* Get tick */
+ tickstart = HAL_GetTick();
+
+ /* Wait until M24SR is ready or timeout occurs */
+ do
+ {
+ status = HAL_I2C_IsDeviceReady(&hI2cHandler, Addr, Trials, NFC_I2C_TIMEOUT_STD);
+ currenttick = HAL_GetTick();
+ } while( ( (currenttick - tickstart) < NFC_I2C_TIMEOUT_MAX) && (status != HAL_OK) );
+
+ if (status != HAL_OK)
+ {
+ return NFC_I2C_ERROR_TIMEOUT;
+ }
+
+ return NFC_I2C_STATUS_SUCCESS;
+}
+
+/**
+ * @brief This function read the state of the M24SR GPO
+ * @retval GPIO_PinState state of the M24SR GPO
+ */
+void NFC_IO_ReadState(uint8_t * pPinState)
+{
+ *pPinState = (uint8_t)HAL_GPIO_ReadPin(NFC_GPIO_GPO_PIN_PORT,NFC_GPIO_GPO_PIN);
+}
+
+/**
+ * @brief This function sets the state of the M24SR RF disable pin
+ * @param PinState put RF disable pin of M24SR in PinState (1 or 0)
+ */
+void NFC_IO_RfDisable(uint8_t PinState)
+{
+ HAL_GPIO_WritePin(NFC_GPIO_RFDISABLE_PIN_PORT,NFC_GPIO_RFDISABLE_PIN,(GPIO_PinState)PinState);
+}
+
+/**
+ * @brief Delay function used in M24SR low level driver.
+ * @param Delay Delay in ms
+ * @retval None
+ */
+void NFC_IO_Delay(uint32_t Delay)
+{
+ HAL_Delay(Delay);
+}
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/P3_SETR2/BSP/stm32l475e_iot01.h b/P3_SETR2/BSP/stm32l475e_iot01.h
new file mode 100644
index 0000000..a82eade
--- /dev/null
+++ b/P3_SETR2/BSP/stm32l475e_iot01.h
@@ -0,0 +1,257 @@
+/**
+ ******************************************************************************
+ * @file stm32l475e_iot01.h
+ * @author MCD Application Team
+ * @brief STM32L475E IOT01 board support package
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2017 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32L475E_IOT01_H
+#define __STM32L475E_IOT01_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32l4xx_hal.h"
+
+/** @addtogroup BSP
+ * @{
+ */
+
+/** @addtogroup STM32L475E_IOT01
+ * @{
+ */
+
+/** @addtogroup STM32L475E_IOT01_LOW_LEVEL
+ * @{
+ */
+
+/** @defgroup STM32L475E_IOT01_LOW_LEVEL_Exported_Types LOW LEVEL Exported Types
+ * @{
+ */
+typedef enum
+{
+LED2 = 0,
+LED_GREEN = LED2,
+}Led_TypeDef;
+
+
+typedef enum
+{
+ BUTTON_USER = 0
+}Button_TypeDef;
+
+typedef enum
+{
+ BUTTON_MODE_GPIO = 0,
+ BUTTON_MODE_EXTI = 1
+}ButtonMode_TypeDef;
+
+typedef enum
+{
+ COM1 = 0,
+ COM2 = 0,
+}COM_TypeDef;
+/**
+ * @}
+ */
+
+/** @defgroup STM32L475E_IOT01_LOW_LEVEL_Exported_Constants LOW LEVEL Exported Constants
+ * @{
+ */
+
+/**
+ * @brief Define for STM32L475E_IOT01 board
+ */
+#if !defined (USE_STM32L475E_IOT01)
+ #define USE_STM32L475E_IOT01
+#endif
+
+#define LEDn ((uint8_t)1)
+
+#define LED2_PIN GPIO_PIN_14
+#define LED2_GPIO_PORT GPIOB
+#define LED2_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE()
+#define LED2_GPIO_CLK_DISABLE() __HAL_RCC_GPIOB_CLK_DISABLE()
+
+
+
+#define LEDx_GPIO_CLK_ENABLE(__INDEX__) do{if((__INDEX__) == 0) LED2_GPIO_CLK_ENABLE();}while(0)
+
+#define LEDx_GPIO_CLK_DISABLE(__INDEX__) do{if((__INDEX__) == 0) LED2_GPIO_CLK_DISABLE();}while(0)
+
+/* Only one User/Wakeup button */
+#define BUTTONn ((uint8_t)1)
+
+/**
+ * @brief Wakeup push-button
+ */
+#define USER_BUTTON_PIN GPIO_PIN_13
+#define USER_BUTTON_GPIO_PORT GPIOC
+#define USER_BUTTON_GPIO_CLK_ENABLE() __HAL_RCC_GPIOC_CLK_ENABLE()
+#define USER_BUTTON_GPIO_CLK_DISABLE() __HAL_RCC_GPIOC_CLK_DISABLE()
+#define USER_BUTTON_EXTI_IRQn EXTI15_10_IRQn
+
+/**
+ * @brief NFC Gpio PINs
+ */
+#define NFC_GPIO_GPO_PIN GPIO_PIN_4
+#define NFC_GPIO_GPO_PIN_PORT GPIOE
+#define NFC_GPIO_RFDISABLE_PIN GPIO_PIN_2
+#define NFC_GPIO_RFDISABLE_PIN_PORT GPIOE
+#define NFC_GPIO_CLK_ENABLE() __HAL_RCC_GPIOE_CLK_ENABLE();
+#define NFC_GPIO_CLK_DISABLE() __HAL_RCC_GPIOE_CLK_DISABLE();
+
+
+#define COMn ((uint8_t)1)
+
+/**
+ * @brief Definition for COM port1, connected to USART1
+ */
+#define DISCOVERY_COM1 USART1
+#define DISCOVERY_COM1_CLK_ENABLE() __HAL_RCC_USART1_CLK_ENABLE()
+#define DISCOVERY_COM1_CLK_DISABLE() __HAL_RCC_USART1_CLK_DISABLE()
+
+#define DISCOVERY_COM1_TX_PIN GPIO_PIN_6
+#define DISCOVERY_COM1_TX_GPIO_PORT GPIOB
+#define DISCOVERY_COM1_TX_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE()
+#define DISCOVERY_COM1_TX_GPIO_CLK_DISABLE() __HAL_RCC_GPIOB_CLK_DISABLE()
+#define DISCOVERY_COM1_TX_AF GPIO_AF7_USART1
+
+#define DISCOVERY_COM1_RX_PIN GPIO_PIN_7
+#define DISCOVERY_COM1_RX_GPIO_PORT GPIOB
+#define DISCOVERY_COM1_RX_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE()
+#define DISCOVERY_COM1_RX_GPIO_CLK_DISABLE() __HAL_RCC_GPIOB_CLK_DISABLE()
+#define DISCOVERY_COM1_RX_AF GPIO_AF7_USART1
+
+#define DISCOVERY_COM1_IRQn USART1_IRQn
+
+
+#define DISCOVERY_COMx_CLK_ENABLE(__INDEX__) do { if((__INDEX__) == COM1) {DISCOVERY_COM1_CLK_ENABLE();}} while(0)
+#define DISCOVERY_COMx_CLK_DISABLE(__INDEX__) do { if((__INDEX__) == COM1) {DISCOVERY_COM1_CLK_DISABLE();}} while(0)
+
+#define DISCOVERY_COMx_TX_GPIO_CLK_ENABLE(__INDEX__) do { if((__INDEX__) == COM1) {DISCOVERY_COM1_TX_GPIO_CLK_ENABLE();}} while(0)
+#define DISCOVERY_COMx_TX_GPIO_CLK_DISABLE(__INDEX__) do { if((__INDEX__) == COM1) {DISCOVERY_COM1_TX_GPIO_CLK_DISABLE();}} while(0)
+
+#define DISCOVERY_COMx_RX_GPIO_CLK_ENABLE(__INDEX__) do { if((__INDEX__) == COM1) {DISCOVERY_COM1_RX_GPIO_CLK_ENABLE();}} while(0)
+#define DISCOVERY_COMx_RX_GPIO_CLK_DISABLE(__INDEX__) do { if((__INDEX__) == COM1) {DISCOVERY_COM1_RX_GPIO_CLK_DISABLE();}} while(0)
+
+
+/* User can use this section to tailor I2Cx instance used and associated resources */
+/* Definition for I2Cx resources */
+#define DISCOVERY_I2Cx I2C2
+#define DISCOVERY_I2Cx_CLK_ENABLE() __HAL_RCC_I2C2_CLK_ENABLE()
+#define DISCOVERY_I2Cx_CLK_DISABLE() __HAL_RCC_I2C2_CLK_DISABLE()
+#define DISCOVERY_DMAx_CLK_ENABLE() __HAL_RCC_DMA1_CLK_ENABLE()
+#define DISCOVERY_I2Cx_SCL_SDA_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE()
+#define DISCOVERY_I2Cx_SCL_SDA_GPIO_CLK_DISABLE() __HAL_RCC_GPIOB_CLK_DISABLE()
+
+#define DISCOVERY_I2Cx_FORCE_RESET() __HAL_RCC_I2C2_FORCE_RESET()
+#define DISCOVERY_I2Cx_RELEASE_RESET() __HAL_RCC_I2C2_RELEASE_RESET()
+
+/* Definition for I2Cx Pins */
+#define DISCOVERY_I2Cx_SCL_PIN GPIO_PIN_10
+#define DISCOVERY_I2Cx_SDA_PIN GPIO_PIN_11
+#define DISCOVERY_I2Cx_SCL_SDA_GPIO_PORT GPIOB
+#define DISCOVERY_I2Cx_SCL_SDA_AF GPIO_AF4_I2C2
+
+/* I2C interrupt requests */
+#define DISCOVERY_I2Cx_EV_IRQn I2C2_EV_IRQn
+#define DISCOVERY_I2Cx_ER_IRQn I2C2_ER_IRQn
+
+/* I2C clock speed configuration (in Hz)
+ WARNING:
+ Make sure that this define is not already declared in other files.
+ It can be used in parallel by other modules. */
+#ifndef DISCOVERY_I2C_SPEED
+ #define DISCOVERY_I2C_SPEED 100000
+#endif /* DISCOVERY_I2C_SPEED */
+
+#ifndef DISCOVERY_I2Cx_TIMING
+#define DISCOVERY_I2Cx_TIMING ((uint32_t)0x00702681)
+#endif /* DISCOVERY_I2Cx_TIMING */
+
+
+/* I2C Sensors address */
+/* LPS22HB (Pressure) I2C Address */
+#define LPS22HB_I2C_ADDRESS (uint8_t)0xBA
+/* HTS221 (Humidity) I2C Address */
+#define HTS221_I2C_ADDRESS (uint8_t)0xBE
+
+#ifdef USE_LPS22HB_TEMP
+/* LPS22HB Sensor hardware I2C address */
+#define TSENSOR_I2C_ADDRESS LPS22HB_I2C_ADDRESS
+#else /* USE_HTS221_TEMP */
+/* HTS221 Sensor hardware I2C address */
+#define TSENSOR_I2C_ADDRESS HTS221_I2C_ADDRESS
+#endif
+
+/* NFC I2C address and specific config parameters */
+#define M24SR_I2C_ADDR (uint8_t) 0xAC /*!< M24SR address */
+#define NFC_I2C_STATUS_SUCCESS (uint16_t) 0x0000
+#define NFC_I2C_ERROR_TIMEOUT (uint16_t) 0x0011
+#define NFC_I2C_TIMEOUT_STD (uint32_t) 8 /* I2C Time out (ms), used to call Transmit/Receive HAL functions */
+#define NFC_I2C_TIMEOUT_MAX (uint32_t) 200 /* I2C Time out (ms), this is the maximum time needed by M24SR to complete any command */
+#define NFC_I2C_TRIALS (uint32_t) 1 /* In case M24SR will reply ACK failed allow to perform retry before returning error (HAL option not used) */
+
+
+/**
+ * @}
+ */
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+/* Exported macros -----------------------------------------------------------*/
+/* Private macros ------------------------------------------------------------*/
+/* Exported functions --------------------------------------------------------*/
+
+/** @defgroup STM32L475E_IOT01_LOW_LEVEL_Exported_Functions LOW LEVEL Exported Functions
+ * @{
+ */
+uint32_t BSP_GetVersion(void);
+void BSP_LED_Init(Led_TypeDef Led);
+void BSP_LED_DeInit(Led_TypeDef Led);
+void BSP_LED_On(Led_TypeDef Led);
+void BSP_LED_Off(Led_TypeDef Led);
+void BSP_LED_Toggle(Led_TypeDef Led);
+void BSP_PB_Init(Button_TypeDef Button, ButtonMode_TypeDef ButtonMode);
+void BSP_PB_DeInit(Button_TypeDef Button);
+uint32_t BSP_PB_GetState(Button_TypeDef Button);
+void BSP_COM_Init(COM_TypeDef COM, UART_HandleTypeDef *husart);
+void BSP_COM_DeInit(COM_TypeDef COM, UART_HandleTypeDef *huart);
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32L475E_IOT01_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/P3_SETR2/BSP/stm32l475e_iot01_accelero.c b/P3_SETR2/BSP/stm32l475e_iot01_accelero.c
new file mode 100644
index 0000000..b90d334
--- /dev/null
+++ b/P3_SETR2/BSP/stm32l475e_iot01_accelero.c
@@ -0,0 +1,151 @@
+/**
+ ******************************************************************************
+ * @file stm32l475e_iot01_accelero.c
+ * @author MCD Application Team
+ * @brief This file provides a set of functions needed to manage the accelerometer sensor
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2017 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32l475e_iot01_accelero.h"
+/** @addtogroup BSP
+ * @{
+ */
+
+/** @addtogroup STM32L475E_IOT01
+ * @{
+ */
+
+/** @defgroup STM32L475E_IOT01_ACCELERO ACCELERO
+ * @{
+ */
+
+/** @defgroup STM32L475E_IOT01_ACCELERO_Private_Variables ACCELERO Private Variables
+ * @{
+ */
+static ACCELERO_DrvTypeDef *AccelerometerDrv;
+/**
+ * @}
+ */
+
+/** @defgroup STM32L475E_IOT01_ACCELERO_Private_Functions ACCELERO Private Functions
+ * @{
+ */
+/**
+ * @brief Initialize the ACCELERO.
+ * @retval ACCELERO_OK or ACCELERO_ERROR
+ */
+ACCELERO_StatusTypeDef BSP_ACCELERO_Init(void)
+{
+ ACCELERO_StatusTypeDef ret = ACCELERO_OK;
+ uint16_t ctrl = 0x0000;
+ ACCELERO_InitTypeDef LSM6DSL_InitStructure;
+
+ if(Lsm6dslAccDrv.ReadID() != LSM6DSL_ACC_GYRO_WHO_AM_I)
+ {
+ ret = ACCELERO_ERROR;
+ }
+ else
+ {
+ /* Initialize the ACCELERO accelerometer driver structure */
+ AccelerometerDrv = &Lsm6dslAccDrv;
+
+ /* MEMS configuration ------------------------------------------------------*/
+ /* Fill the ACCELERO accelerometer structure */
+ LSM6DSL_InitStructure.AccOutput_DataRate = LSM6DSL_ODR_52Hz;
+ LSM6DSL_InitStructure.Axes_Enable = 0;
+ LSM6DSL_InitStructure.AccFull_Scale = LSM6DSL_ACC_FULLSCALE_2G;
+ LSM6DSL_InitStructure.BlockData_Update = LSM6DSL_BDU_BLOCK_UPDATE;
+ LSM6DSL_InitStructure.High_Resolution = 0;
+ LSM6DSL_InitStructure.Communication_Mode = 0;
+
+ /* Configure MEMS: data rate, full scale */
+ ctrl = (LSM6DSL_InitStructure.AccOutput_DataRate | LSM6DSL_InitStructure.AccFull_Scale);
+
+ /* Configure MEMS: BDU and Auto-increment for multi read/write */
+ ctrl |= ((LSM6DSL_InitStructure.BlockData_Update | LSM6DSL_ACC_GYRO_IF_INC_ENABLED) << 8);
+
+ /* Configure the ACCELERO accelerometer main parameters */
+ AccelerometerDrv->Init(ctrl);
+ }
+
+ return ret;
+}
+
+/**
+ * @brief DeInitialize the ACCELERO.
+ * @retval None.
+ */
+void BSP_ACCELERO_DeInit(void)
+{
+ /* DeInitialize the accelerometer IO interfaces */
+ if(AccelerometerDrv != NULL)
+ {
+ if(AccelerometerDrv->DeInit != NULL)
+ {
+ AccelerometerDrv->DeInit();
+ }
+ }
+}
+
+/**
+ * @brief Set/Unset the ACCELERO in low power mode.
+ * @param status 0 means disable Low Power Mode, otherwise Low Power Mode is enabled
+ * @retval None
+ */
+void BSP_ACCELERO_LowPower(uint16_t status)
+{
+ /* Set/Unset the ACCELERO in low power mode */
+ if(AccelerometerDrv != NULL)
+ {
+ if(AccelerometerDrv->LowPower != NULL)
+ {
+ AccelerometerDrv->LowPower(status);
+ }
+ }
+}
+
+/**
+ * @brief Get XYZ acceleration values.
+ * @param pDataXYZ Pointer on 3 angular accelerations table with
+ * pDataXYZ[0] = X axis, pDataXYZ[1] = Y axis, pDataXYZ[2] = Z axis
+ * @retval None
+ */
+void BSP_ACCELERO_AccGetXYZ(int16_t *pDataXYZ)
+{
+ if(AccelerometerDrv != NULL)
+ {
+ if(AccelerometerDrv->GetXYZ != NULL)
+ {
+ AccelerometerDrv->GetXYZ(pDataXYZ);
+ }
+ }
+}
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/P3_SETR2/BSP/stm32l475e_iot01_accelero.h b/P3_SETR2/BSP/stm32l475e_iot01_accelero.h
new file mode 100644
index 0000000..4bbd4ed
--- /dev/null
+++ b/P3_SETR2/BSP/stm32l475e_iot01_accelero.h
@@ -0,0 +1,89 @@
+/**
+ ******************************************************************************
+ * @file stm32l475e_iot01_accelero.h
+ * @author MCD Application Team
+ * @brief This file provides a set of functions needed to manage the accelerometer sensor
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2017 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32L475E_IOT01_ACCELERO_H
+#define __STM32L475E_IOT01_ACCELERO_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32l475e_iot01.h"
+/* Include Accelero component driver */
+#include "../Components/lsm6dsl/lsm6dsl.h"
+
+/** @addtogroup BSP
+ * @{
+ */
+
+/** @addtogroup STM32L475E_IOT01
+ * @{
+ */
+
+/** @addtogroup STM32L475E_IOT01_ACCELERO
+ * @{
+ */
+
+/** @defgroup STM32L475_DISCOVERY_ACCELERO_Exported_Types ACCELERO Exported Types
+ * @{
+ */
+typedef enum
+{
+ ACCELERO_OK = 0,
+ ACCELERO_ERROR = 1,
+ ACCELERO_TIMEOUT = 2
+}
+ACCELERO_StatusTypeDef;
+
+/**
+ * @}
+ */
+
+/** @defgroup STM32L475E_IOT01_ACCELERO_Exported_Functions ACCELERO Exported Functions
+ * @{
+ */
+/* Sensor Configuration Functions */
+ACCELERO_StatusTypeDef BSP_ACCELERO_Init(void);
+void BSP_ACCELERO_DeInit(void);
+void BSP_ACCELERO_LowPower(uint16_t status); /* 0 Means Disable Low Power Mode, otherwise Low Power Mode is enabled */
+void BSP_ACCELERO_AccGetXYZ(int16_t *pDataXYZ);
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32L475E_IOT01_ACCELERO_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/P3_SETR2/BSP/stm32l475e_iot01_gyro.c b/P3_SETR2/BSP/stm32l475e_iot01_gyro.c
new file mode 100644
index 0000000..07565e7
--- /dev/null
+++ b/P3_SETR2/BSP/stm32l475e_iot01_gyro.c
@@ -0,0 +1,155 @@
+/**
+ ******************************************************************************
+ * @file stm32l475e_iot01_gyro.c
+ * @author MCD Application Team
+ * @brief This file provides a set of functions needed to manage the gyroscope sensor
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2017 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32l475e_iot01_gyro.h"
+
+/** @addtogroup BSP
+ * @{
+ */
+
+/** @addtogroup STM32L475E_IOT01
+ * @{
+ */
+
+/** @defgroup STM32L475E_IOT01_GYROSCOPE GYROSCOPE
+ * @{
+ */
+
+/** @defgroup STM32L475E_IOT01_GYROSCOPE_Private_Variables GYROSCOPE Private Variables
+ * @{
+ */
+static GYRO_DrvTypeDef *GyroscopeDrv;
+
+/**
+ * @}
+ */
+
+
+/** @defgroup STM32L475E_IOT01_GYROSCOPE_Private_Functions GYROSCOPE Private Functions
+ * @{
+ */
+/**
+ * @brief Initialize Gyroscope.
+ * @retval GYRO_OK or GYRO_ERROR
+ */
+uint8_t BSP_GYRO_Init(void)
+{
+ uint8_t ret = GYRO_ERROR;
+ uint16_t ctrl = 0x0000;
+ GYRO_InitTypeDef LSM6DSL_InitStructure;
+
+ if(Lsm6dslGyroDrv.ReadID() != LSM6DSL_ACC_GYRO_WHO_AM_I)
+ {
+ ret = GYRO_ERROR;
+ }
+ else
+ {
+ /* Initialize the gyroscope driver structure */
+ GyroscopeDrv = &Lsm6dslGyroDrv;
+
+ /* Configure Mems : data rate, power mode, full scale and axes */
+ LSM6DSL_InitStructure.Power_Mode = 0;
+ LSM6DSL_InitStructure.Output_DataRate = LSM6DSL_ODR_52Hz;
+ LSM6DSL_InitStructure.Axes_Enable = 0;
+ LSM6DSL_InitStructure.Band_Width = 0;
+ LSM6DSL_InitStructure.BlockData_Update = LSM6DSL_BDU_BLOCK_UPDATE;
+ LSM6DSL_InitStructure.Endianness = 0;
+ LSM6DSL_InitStructure.Full_Scale = LSM6DSL_GYRO_FS_2000;
+
+ /* Configure MEMS: data rate, full scale */
+ ctrl = (LSM6DSL_InitStructure.Full_Scale | LSM6DSL_InitStructure.Output_DataRate);
+
+ /* Configure MEMS: BDU and Auto-increment for multi read/write */
+ ctrl |= ((LSM6DSL_InitStructure.BlockData_Update | LSM6DSL_ACC_GYRO_IF_INC_ENABLED) << 8);
+
+ /* Initialize component */
+ GyroscopeDrv->Init(ctrl);
+
+ ret = GYRO_OK;
+ }
+
+ return ret;
+}
+
+
+/**
+ * @brief DeInitialize Gyroscope.
+ */
+void BSP_GYRO_DeInit(void)
+{
+ /* DeInitialize the Gyroscope IO interfaces */
+ if(GyroscopeDrv != NULL)
+ {
+ if(GyroscopeDrv->DeInit!= NULL)
+ {
+ GyroscopeDrv->DeInit();
+ }
+ }
+}
+
+
+/**
+ * @brief Set/Unset Gyroscope in low power mode.
+ * @param status 0 means disable Low Power Mode, otherwise Low Power Mode is enabled
+ */
+void BSP_GYRO_LowPower(uint16_t status)
+{
+ /* Set/Unset component in low-power mode */
+ if(GyroscopeDrv != NULL)
+ {
+ if(GyroscopeDrv->LowPower!= NULL)
+ {
+ GyroscopeDrv->LowPower(status);
+ }
+ }
+}
+
+/**
+ * @brief Get XYZ angular acceleration from the Gyroscope.
+ * @param pfData: pointer on floating array
+ */
+void BSP_GYRO_GetXYZ(float* pfData)
+{
+ if(GyroscopeDrv != NULL)
+ {
+ if(GyroscopeDrv->GetXYZ!= NULL)
+ {
+ GyroscopeDrv->GetXYZ(pfData);
+ }
+ }
+}
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/P3_SETR2/BSP/stm32l475e_iot01_gyro.h b/P3_SETR2/BSP/stm32l475e_iot01_gyro.h
new file mode 100644
index 0000000..ace3444
--- /dev/null
+++ b/P3_SETR2/BSP/stm32l475e_iot01_gyro.h
@@ -0,0 +1,88 @@
+/**
+ ******************************************************************************
+ * @file stm32l475e_iot01_gyro.h
+ * @author MCD Application Team
+ * @brief This file contains definitions for the stm32l475e_iot01_gyro.c
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2017 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32L475E_IOT01_GYRO_H
+#define __STM32L475E_IOT01_GYRO_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32l475e_iot01.h"
+/* Include Gyro component driver */
+#include "../Components/lsm6dsl/lsm6dsl.h"
+
+/** @addtogroup BSP
+ * @{
+ */
+
+/** @addtogroup STM32L475E_IOT01
+ * @{
+ */
+
+/** @addtogroup STM32L475E_IOT01_GYROSCOPE
+ * @{
+ */
+
+/** @defgroup STM32L475_IOT01_GYROSCOPE_Exported_Constants GYROSCOPE Exported Constants
+ * @{
+ */
+typedef enum
+{
+ GYRO_OK = 0,
+ GYRO_ERROR = 1,
+ GYRO_TIMEOUT = 2
+}
+GYRO_StatusTypeDef;
+
+/**
+ * @}
+ */
+
+/** @defgroup STM32L475E_IOT01_GYROSCOPE_Exported_Functions GYROSCOPE Exported Functions
+ * @{
+ */
+uint8_t BSP_GYRO_Init(void);
+void BSP_GYRO_DeInit(void);
+void BSP_GYRO_LowPower(uint16_t status); /* 0 Means Disable Low Power Mode, otherwise Low Power Mode is enabled */
+void BSP_GYRO_GetXYZ(float* pfData);
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32L475E_IOT01_GYRO_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/P3_SETR2/BSP/stm32l475e_iot01_hsensor.c b/P3_SETR2/BSP/stm32l475e_iot01_hsensor.c
new file mode 100644
index 0000000..448287e
--- /dev/null
+++ b/P3_SETR2/BSP/stm32l475e_iot01_hsensor.c
@@ -0,0 +1,102 @@
+/**
+ ******************************************************************************
+ * @file stm32l475e_iot01_hsensor.c
+ * @author MCD Application Team
+ * @brief This file provides a set of functions needed to manage the humidity sensor
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2017 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32l475e_iot01_hsensor.h"
+
+/** @addtogroup BSP
+ * @{
+ */
+
+/** @addtogroup STM32L475E_IOT01
+ * @{
+ */
+
+/** @defgroup STM32L475E_IOT01_HUMIDITY HUMIDITY
+ * @{
+ */
+
+/** @defgroup STM32L475E_IOT01_HUMIDITY_Private_Variables HUMIDITY Private Variables
+ * @{
+ */
+static HSENSOR_DrvTypeDef *Hsensor_drv;
+/**
+ * @}
+ */
+
+/** @defgroup STM32L475E_IOT01_HUMIDITY_Private_Functions HUMIDITY Private Functions
+ * @{
+ */
+
+/**
+ * @brief Initializes peripherals used by the I2C Humidity Sensor driver.
+ * @retval HSENSOR status
+ */
+uint32_t BSP_HSENSOR_Init(void)
+{
+ uint32_t ret;
+
+ if(HTS221_H_Drv.ReadID(HTS221_I2C_ADDRESS) != HTS221_WHO_AM_I_VAL)
+ {
+ ret = HSENSOR_ERROR;
+ }
+ else
+ {
+ Hsensor_drv = &HTS221_H_Drv;
+ /* HSENSOR Init */
+ Hsensor_drv->Init(HTS221_I2C_ADDRESS);
+ ret = HSENSOR_OK;
+ }
+
+ return ret;
+}
+
+/**
+ * @brief Read ID of HTS221.
+ * @retval HTS221 ID value.
+ */
+uint8_t BSP_HSENSOR_ReadID(void)
+{
+ return Hsensor_drv->ReadID(HTS221_I2C_ADDRESS);
+}
+
+/**
+ * @brief Read Humidity register of HTS221.
+ * @retval HTS221 measured humidity value.
+ */
+float BSP_HSENSOR_ReadHumidity(void)
+{
+ return Hsensor_drv->ReadHumidity(HTS221_I2C_ADDRESS);
+}
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/P3_SETR2/BSP/stm32l475e_iot01_hsensor.h b/P3_SETR2/BSP/stm32l475e_iot01_hsensor.h
new file mode 100644
index 0000000..caea50a
--- /dev/null
+++ b/P3_SETR2/BSP/stm32l475e_iot01_hsensor.h
@@ -0,0 +1,91 @@
+/**
+ ******************************************************************************
+ * @file stm32l475e_iot01_hsensor.h
+ * @author MCD Application Team
+ * @brief This file provides a set of functions needed to manage the humidity sensor
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2017 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32L475E_IOT01_HSENSOR_H
+#define __STM32L475E_IOT01_HSENSOR_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32l475e_iot01.h"
+#include "../Components/hts221/hts221.h"
+
+/** @addtogroup BSP
+ * @{
+ */
+
+/** @addtogroup STM32L475E_IOT01
+ * @{
+ */
+
+/** @addtogroup STM32L475E_IOT01_HUMIDITY
+ * @{
+ */
+
+/* Exported types ------------------------------------------------------------*/
+/** @defgroup STM32L475E_IOT01_HUMIDITY_Exported_Types HUMIDITY Exported Types
+ * @{
+ */
+
+/**
+ * @brief HSENSOR Status
+ */
+typedef enum
+{
+ HSENSOR_OK = 0,
+ HSENSOR_ERROR
+}HSENSOR_Status_TypDef;
+
+/**
+ * @}
+ */
+
+/** @defgroup STM32L475E_IOT01_HUMIDITY_Exported_Functions HUMIDITY Exported Functions
+ * @{
+ */
+/* Sensor Configuration Functions */
+uint32_t BSP_HSENSOR_Init(void);
+uint8_t BSP_HSENSOR_ReadID(void);
+float BSP_HSENSOR_ReadHumidity(void);
+/**
+ * @}
+ */
+
+#ifdef __cplusplus
+}
+#endif
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+#endif /* __STM32L475E_IOT01_HSENSOR_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/P3_SETR2/BSP/stm32l475e_iot01_magneto.c b/P3_SETR2/BSP/stm32l475e_iot01_magneto.c
new file mode 100644
index 0000000..7452f50
--- /dev/null
+++ b/P3_SETR2/BSP/stm32l475e_iot01_magneto.c
@@ -0,0 +1,141 @@
+/**
+ ******************************************************************************
+ * @file stm32l475e_iot01_magneto.c
+ * @author MCD Application Team
+ * @brief This file provides a set of functions needed to manage the magnetometer sensor
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2017 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32l475e_iot01_magneto.h"
+
+/** @addtogroup BSP
+ * @{
+ */
+
+/** @addtogroup STM32L475E_IOT01
+ * @{
+ */
+
+/** @defgroup STM32L475E_IOT01_MAGNETO MAGNETO
+ * @{
+ */
+
+/** @defgroup STM32L475E_IOT01_MAGNETO_Private_Variables MAGNETO Private Variables
+ * @{
+ */
+static MAGNETO_DrvTypeDef *MagnetoDrv;
+/**
+ * @}
+ */
+
+
+/** @defgroup STM32L475E_IOT01_MAGNETO_Private_Functions MAGNETO Private Functions
+ * @{
+ */
+
+/**
+ * @brief Initialize a magnetometer sensor
+ * @retval COMPONENT_ERROR in case of failure
+ */
+MAGNETO_StatusTypeDef BSP_MAGNETO_Init(void)
+{
+ MAGNETO_StatusTypeDef ret = MAGNETO_OK;
+ MAGNETO_InitTypeDef LIS3MDL_InitStructureMag;
+
+ if(Lis3mdlMagDrv.ReadID() != I_AM_LIS3MDL)
+ {
+ ret = MAGNETO_ERROR;
+ }
+ else
+ {
+ /* Initialize the MAGNETO magnetometer driver structure */
+ MagnetoDrv = &Lis3mdlMagDrv;
+
+ /* MEMS configuration ------------------------------------------------------*/
+ /* Fill the MAGNETO magnetometer structure */
+ LIS3MDL_InitStructureMag.Register1 = LIS3MDL_MAG_TEMPSENSOR_DISABLE | LIS3MDL_MAG_OM_XY_HIGH | LIS3MDL_MAG_ODR_40_HZ;
+ LIS3MDL_InitStructureMag.Register2 = LIS3MDL_MAG_FS_4_GA | LIS3MDL_MAG_REBOOT_DEFAULT | LIS3MDL_MAG_SOFT_RESET_DEFAULT;
+ LIS3MDL_InitStructureMag.Register3 = LIS3MDL_MAG_CONFIG_NORMAL_MODE | LIS3MDL_MAG_CONTINUOUS_MODE;
+ LIS3MDL_InitStructureMag.Register4 = LIS3MDL_MAG_OM_Z_HIGH | LIS3MDL_MAG_BLE_LSB;
+ LIS3MDL_InitStructureMag.Register5 = LIS3MDL_MAG_BDU_MSBLSB;
+ /* Configure the MAGNETO magnetometer main parameters */
+ MagnetoDrv->Init(LIS3MDL_InitStructureMag);
+ }
+
+ return ret;
+}
+
+/**
+ * @brief DeInitialize the MAGNETO.
+ */
+void BSP_MAGNETO_DeInit(void)
+{
+ /* DeInitialize the magnetometer IO interfaces */
+ if(MagnetoDrv != NULL)
+ {
+ if(MagnetoDrv->DeInit != NULL)
+ {
+ MagnetoDrv->DeInit();
+ }
+ }
+}
+
+/**
+ * @brief Set/Unset the MAGNETO in low power mode.
+ */
+void BSP_MAGNETO_LowPower(uint16_t status)
+{
+ /* Put the magnetometer in low power mode */
+ if(MagnetoDrv != NULL)
+ {
+ if(MagnetoDrv->LowPower != NULL)
+ {
+ MagnetoDrv->LowPower(status);
+ }
+ }
+}
+
+/**
+ * @brief Get XYZ magnetometer values.
+ * @param pDataXYZ Pointer on 3 magnetometer values table with
+ * pDataXYZ[0] = X axis, pDataXYZ[1] = Y axis, pDataXYZ[2] = Z axis
+ */
+void BSP_MAGNETO_GetXYZ(int16_t *pDataXYZ)
+{
+ if(MagnetoDrv != NULL)
+ {
+ if(MagnetoDrv->GetXYZ != NULL)
+ {
+ MagnetoDrv->GetXYZ(pDataXYZ);
+ }
+ }
+}
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/P3_SETR2/BSP/stm32l475e_iot01_magneto.h b/P3_SETR2/BSP/stm32l475e_iot01_magneto.h
new file mode 100644
index 0000000..50cef38
--- /dev/null
+++ b/P3_SETR2/BSP/stm32l475e_iot01_magneto.h
@@ -0,0 +1,89 @@
+/**
+ ******************************************************************************
+ * @file stm32l475e_iot01_magneto.h
+ * @author MCD Application Team
+ * @brief This file provides a set of functions needed to manage the magnetometer sensor
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2017 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32L475E_IOT01_MAGNETO_H
+#define __STM32L475E_IOT01_MAGNETO_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32l475e_iot01.h"
+/* Include Magnetometer component driver */
+#include "../Components/lis3mdl/lis3mdl.h"
+
+/** @addtogroup BSP
+ * @{
+ */
+
+/** @addtogroup STM32L475E_IOT01
+ * @{
+ */
+
+/** @addtogroup STM32L475E_IOT01_MAGNETO
+ * @{
+ */
+
+/** @defgroup STM32L475_IOT01_MAGNETO_Exported_Types MAGNETO Exported Types
+ * @{
+ */
+/* Exported types ------------------------------------------------------------*/
+typedef enum
+{
+ MAGNETO_OK = 0,
+ MAGNETO_ERROR = 1,
+ MAGNETO_TIMEOUT = 2
+}
+MAGNETO_StatusTypeDef;
+/**
+ * @}
+ */
+
+/** @defgroup STM32L475E_IOT01_MAGNETO_Exported_Functions MAGNETO Exported Functions
+ * @{
+ */
+MAGNETO_StatusTypeDef BSP_MAGNETO_Init(void);
+void BSP_MAGNETO_DeInit(void);
+void BSP_MAGNETO_LowPower(uint16_t status); /* 0 Means Disable Low Power Mode, otherwise Low Power Mode is enabled */
+void BSP_MAGNETO_GetXYZ(int16_t *pDataXYZ);
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32L475E_IOT01_MAGNETO_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/P3_SETR2/BSP/stm32l475e_iot01_psensor.c b/P3_SETR2/BSP/stm32l475e_iot01_psensor.c
new file mode 100644
index 0000000..02f9a87
--- /dev/null
+++ b/P3_SETR2/BSP/stm32l475e_iot01_psensor.c
@@ -0,0 +1,103 @@
+/**
+ ******************************************************************************
+ * @file stm32l475e_iot01_psensor.c
+ * @author MCD Application Team
+ * @brief This file provides a set of functions needed to manage the pressure sensor
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2017 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32l475e_iot01_psensor.h"
+
+/** @addtogroup BSP
+ * @{
+ */
+
+/** @addtogroup STM32L475E_IOT01
+ * @{
+ */
+
+/** @defgroup STM32L475E_IOT01_PRESSURE PRESSURE
+ * @{
+ */
+
+/** @defgroup STM32L475E_IOT01_PRESSURE_Private_Variables PRESSURE Private Variables
+ * @{
+ */
+static PSENSOR_DrvTypeDef *Psensor_drv;
+/**
+ * @}
+ */
+
+/** @defgroup STM32L475E_IOT01_PRESSURE_Private_Functions PRESSURE Private Functions
+ * @{
+ */
+
+/**
+ * @brief Initializes peripherals used by the I2C Pressure Sensor driver.
+ * @retval PSENSOR status
+ */
+uint32_t BSP_PSENSOR_Init(void)
+{
+ uint32_t ret;
+
+ if(LPS22HB_P_Drv.ReadID(LPS22HB_I2C_ADDRESS) != LPS22HB_WHO_AM_I_VAL)
+ {
+ ret = PSENSOR_ERROR;
+ }
+ else
+ {
+ Psensor_drv = &LPS22HB_P_Drv;
+
+ /* PSENSOR Init */
+ Psensor_drv->Init(LPS22HB_I2C_ADDRESS);
+ ret = PSENSOR_OK;
+ }
+
+ return ret;
+}
+
+/**
+ * @brief Read ID of LPS22HB.
+ * @retval LPS22HB ID value.
+ */
+uint8_t BSP_PSENSOR_ReadID(void)
+{
+ return Psensor_drv->ReadID(LPS22HB_I2C_ADDRESS);
+}
+
+/**
+ * @brief Read Pressure register of LPS22HB.
+ * @retval LPS22HB measured pressure value.
+ */
+float BSP_PSENSOR_ReadPressure(void)
+{
+ return Psensor_drv->ReadPressure(LPS22HB_I2C_ADDRESS);
+}
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/P3_SETR2/BSP/stm32l475e_iot01_psensor.h b/P3_SETR2/BSP/stm32l475e_iot01_psensor.h
new file mode 100644
index 0000000..2b5c95b
--- /dev/null
+++ b/P3_SETR2/BSP/stm32l475e_iot01_psensor.h
@@ -0,0 +1,91 @@
+/**
+ ******************************************************************************
+ * @file stm32l475e_iot01_psensor.h
+ * @author MCD Application Team
+ * @brief This file provides a set of functions needed to manage the pressure sensor
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2017 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32L475E_IOT01_PSENSOR_H
+#define __STM32L475E_IOT01_PSENSOR_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32l475e_iot01.h"
+#include "../Components/lps22hb/lps22hb.h"
+
+/** @addtogroup BSP
+ * @{
+ */
+
+/** @addtogroup STM32L475E_IOT01
+ * @{
+ */
+
+/** @addtogroup STM32L475E_IOT01_PRESSURE
+ * @{
+ */
+
+/* Exported types ------------------------------------------------------------*/
+/** @defgroup STM32L475E_IOT01_PRESSURE_Exported_Types PRESSURE Exported Types
+ * @{
+ */
+
+/**
+ * @brief PSENSOR Status
+ */
+typedef enum
+{
+ PSENSOR_OK = 0,
+ PSENSOR_ERROR
+}PSENSOR_Status_TypDef;
+
+/**
+ * @}
+ */
+
+/** @defgroup STM32L475E_IOT01_PRESSURE_Exported_Functions PRESSURE Exported Functions
+ * @{
+ */
+/* Sensor Configuration Functions */
+uint32_t BSP_PSENSOR_Init(void);
+uint8_t BSP_PSENSOR_ReadID(void);
+float BSP_PSENSOR_ReadPressure(void);
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32L475E_IOT01_PSENSOR_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/P3_SETR2/BSP/stm32l475e_iot01_qspi.c b/P3_SETR2/BSP/stm32l475e_iot01_qspi.c
new file mode 100644
index 0000000..b15d117
--- /dev/null
+++ b/P3_SETR2/BSP/stm32l475e_iot01_qspi.c
@@ -0,0 +1,1108 @@
+/**
+ ******************************************************************************
+ * @file stm32l475e_iot01_qspi.c
+ * @author MCD Application Team
+ * @brief This file includes a standard driver for the MX25R6435F QSPI
+ * memory mounted on STM32L475E IOT01 board.
+ @verbatim
+ ==============================================================================
+ ##### How to use this driver #####
+ ==============================================================================
+ [..]
+ (#) This driver is used to drive the MX25R6435F QSPI external
+ memory mounted on STM32L475E IOT01 board.
+
+ (#) This driver need a specific component driver (MX25R6435F) to be included with.
+
+ (#) Initialization steps:
+ (++) Initialize the QPSI external memory using the BSP_QSPI_Init() function. This
+ function includes the MSP layer hardware resources initialization and the
+ QSPI interface with the external memory. The BSP_QSPI_DeInit() can be used
+ to deactivate the QSPI interface.
+
+ (#) QSPI memory operations
+ (++) QSPI memory can be accessed with read/write operations once it is
+ initialized.
+ Read/write operation can be performed with AHB access using the functions
+ BSP_QSPI_Read()/BSP_QSPI_Write().
+ (++) The function to the QSPI memory in memory-mapped mode is possible after
+ the call of the function BSP_QSPI_EnableMemoryMappedMode().
+ (++) The function BSP_QSPI_GetInfo() returns the configuration of the QSPI memory.
+ (see the QSPI memory data sheet)
+ (++) Perform erase block operation using the function BSP_QSPI_Erase_Block() and by
+ specifying the block address. You can perform an erase operation of the whole
+ chip by calling the function BSP_QSPI_Erase_Chip().
+ (++) The function BSP_QSPI_GetStatus() returns the current status of the QSPI memory.
+ (see the QSPI memory data sheet)
+ (++) Perform erase sector operation using the function BSP_QSPI_Erase_Sector()
+ which is not blocking. So the function BSP_QSPI_GetStatus() should be used
+ to check if the memory is busy, and the functions BSP_QSPI_SuspendErase()/
+ BSP_QSPI_ResumeErase() can be used to perform other operations during the
+ sector erase.
+ (++) Deep power down of the QSPI memory is managed with the call of the functions
+ BSP_QSPI_EnterDeepPowerDown()/BSP_QSPI_LeaveDeepPowerDown()
+ @endverbatim
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2017 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32l475e_iot01_qspi.h"
+
+/** @addtogroup BSP
+ * @{
+ */
+
+/** @addtogroup STM32L475E_IOT01
+ * @{
+ */
+
+/** @defgroup STM32L475E_IOT01_QSPI QSPI
+ * @{
+ */
+
+/* Private constants --------------------------------------------------------*/
+/** @defgroup STM32L475E_IOT01_QSPI_Private_Constants QSPI Private Constants
+ * @{
+ */
+#define QSPI_QUAD_DISABLE 0x0
+#define QSPI_QUAD_ENABLE 0x1
+
+#define QSPI_HIGH_PERF_DISABLE 0x0
+#define QSPI_HIGH_PERF_ENABLE 0x1
+/**
+ * @}
+ */
+/* Private variables ---------------------------------------------------------*/
+
+/** @defgroup STM32L475E_IOT01_QSPI_Private_Variables QSPI Private Variables
+ * @{
+ */
+QSPI_HandleTypeDef QSPIHandle;
+
+/**
+ * @}
+ */
+
+
+/* Private functions ---------------------------------------------------------*/
+
+/** @defgroup STM32L475E_IOT01_QSPI_Private_Functions QSPI Private Functions
+ * @{
+ */
+static uint8_t QSPI_ResetMemory (QSPI_HandleTypeDef *hqspi);
+static uint8_t QSPI_WriteEnable (QSPI_HandleTypeDef *hqspi);
+static uint8_t QSPI_AutoPollingMemReady(QSPI_HandleTypeDef *hqspi, uint32_t Timeout);
+static uint8_t QSPI_QuadMode (QSPI_HandleTypeDef *hqspi, uint8_t Operation);
+static uint8_t QSPI_HighPerfMode (QSPI_HandleTypeDef *hqspi, uint8_t Operation);
+
+/**
+ * @}
+ */
+
+/* Exported functions ---------------------------------------------------------*/
+
+/** @addtogroup STM32L475E_IOT01_QSPI_Exported_Functions
+ * @{
+ */
+
+/**
+ * @brief Initializes the QSPI interface.
+ * @retval QSPI memory status
+ */
+uint8_t BSP_QSPI_Init(void)
+{
+ QSPIHandle.Instance = QUADSPI;
+
+ /* Call the DeInit function to reset the driver */
+ if (HAL_QSPI_DeInit(&QSPIHandle) != HAL_OK)
+ {
+ return QSPI_ERROR;
+ }
+
+ /* System level initialization */
+ BSP_QSPI_MspInit();
+
+ /* QSPI initialization */
+ QSPIHandle.Init.ClockPrescaler = 2; /* QSPI clock = 80MHz / (ClockPrescaler+1) = 26.67MHz */
+ QSPIHandle.Init.FifoThreshold = 4;
+ QSPIHandle.Init.SampleShifting = QSPI_SAMPLE_SHIFTING_HALFCYCLE;
+ QSPIHandle.Init.FlashSize = POSITION_VAL(MX25R6435F_FLASH_SIZE) - 1;
+ QSPIHandle.Init.ChipSelectHighTime = QSPI_CS_HIGH_TIME_1_CYCLE;
+ QSPIHandle.Init.ClockMode = QSPI_CLOCK_MODE_0;
+
+ if (HAL_QSPI_Init(&QSPIHandle) != HAL_OK)
+ {
+ return QSPI_ERROR;
+ }
+
+ /* QSPI memory reset */
+ if (QSPI_ResetMemory(&QSPIHandle) != QSPI_OK)
+ {
+ return QSPI_NOT_SUPPORTED;
+ }
+
+ /* QSPI quad enable */
+ if (QSPI_QuadMode(&QSPIHandle, QSPI_QUAD_ENABLE) != QSPI_OK)
+ {
+ return QSPI_ERROR;
+ }
+
+ /* High performance mode enable */
+ if (QSPI_HighPerfMode(&QSPIHandle, QSPI_HIGH_PERF_ENABLE) != QSPI_OK)
+ {
+ return QSPI_ERROR;
+ }
+
+ /* Re-configure the clock for the high performance mode */
+ QSPIHandle.Init.ClockPrescaler = 1; /* QSPI clock = 80MHz / (ClockPrescaler+1) = 40MHz */
+
+ if (HAL_QSPI_Init(&QSPIHandle) != HAL_OK)
+ {
+ return QSPI_ERROR;
+ }
+
+ return QSPI_OK;
+}
+
+/**
+ * @brief De-Initializes the QSPI interface.
+ * @retval QSPI memory status
+ */
+uint8_t BSP_QSPI_DeInit(void)
+{
+ QSPIHandle.Instance = QUADSPI;
+
+ /* Call the DeInit function to reset the driver */
+ if (HAL_QSPI_DeInit(&QSPIHandle) != HAL_OK)
+ {
+ return QSPI_ERROR;
+ }
+
+ /* System level De-initialization */
+ BSP_QSPI_MspDeInit();
+
+ return QSPI_OK;
+}
+
+/**
+ * @brief Reads an amount of data from the QSPI memory.
+ * @param pData : Pointer to data to be read
+ * @param ReadAddr : Read start address
+ * @param Size : Size of data to read
+ * @retval QSPI memory status
+ */
+uint8_t BSP_QSPI_Read(uint8_t* pData, uint32_t ReadAddr, uint32_t Size)
+{
+ QSPI_CommandTypeDef sCommand;
+
+ /* Initialize the read command */
+ sCommand.InstructionMode = QSPI_INSTRUCTION_1_LINE;
+ sCommand.Instruction = QUAD_INOUT_READ_CMD;
+ sCommand.AddressMode = QSPI_ADDRESS_4_LINES;
+ sCommand.AddressSize = QSPI_ADDRESS_24_BITS;
+ sCommand.Address = ReadAddr;
+ sCommand.AlternateByteMode = QSPI_ALTERNATE_BYTES_4_LINES;
+ sCommand.AlternateBytesSize = QSPI_ALTERNATE_BYTES_8_BITS;
+ sCommand.AlternateBytes = MX25R6435F_ALT_BYTES_NO_PE_MODE;
+ sCommand.DataMode = QSPI_DATA_4_LINES;
+ sCommand.DummyCycles = MX25R6435F_DUMMY_CYCLES_READ_QUAD;
+ sCommand.NbData = Size;
+ sCommand.DdrMode = QSPI_DDR_MODE_DISABLE;
+ sCommand.DdrHoldHalfCycle = QSPI_DDR_HHC_ANALOG_DELAY;
+ sCommand.SIOOMode = QSPI_SIOO_INST_EVERY_CMD;
+
+ /* Configure the command */
+ if (HAL_QSPI_Command(&QSPIHandle, &sCommand, HAL_QPSI_TIMEOUT_DEFAULT_VALUE) != HAL_OK)
+ {
+ return QSPI_ERROR;
+ }
+
+ /* Reception of the data */
+ if (HAL_QSPI_Receive(&QSPIHandle, pData, HAL_QPSI_TIMEOUT_DEFAULT_VALUE) != HAL_OK)
+ {
+ return QSPI_ERROR;
+ }
+
+ return QSPI_OK;
+}
+
+/**
+ * @brief Writes an amount of data to the QSPI memory.
+ * @param pData : Pointer to data to be written
+ * @param WriteAddr : Write start address
+ * @param Size : Size of data to write
+ * @retval QSPI memory status
+ */
+uint8_t BSP_QSPI_Write(uint8_t* pData, uint32_t WriteAddr, uint32_t Size)
+{
+ QSPI_CommandTypeDef sCommand;
+ uint32_t end_addr, current_size, current_addr;
+
+ /* Calculation of the size between the write address and the end of the page */
+ current_size = MX25R6435F_PAGE_SIZE - (WriteAddr % MX25R6435F_PAGE_SIZE);
+
+ /* Check if the size of the data is less than the remaining place in the page */
+ if (current_size > Size)
+ {
+ current_size = Size;
+ }
+
+ /* Initialize the adress variables */
+ current_addr = WriteAddr;
+ end_addr = WriteAddr + Size;
+
+ /* Initialize the program command */
+ sCommand.InstructionMode = QSPI_INSTRUCTION_1_LINE;
+ sCommand.Instruction = QUAD_PAGE_PROG_CMD;
+ sCommand.AddressMode = QSPI_ADDRESS_4_LINES;
+ sCommand.AddressSize = QSPI_ADDRESS_24_BITS;
+ sCommand.AlternateByteMode = QSPI_ALTERNATE_BYTES_NONE;
+ sCommand.DataMode = QSPI_DATA_4_LINES;
+ sCommand.DummyCycles = 0;
+ sCommand.DdrMode = QSPI_DDR_MODE_DISABLE;
+ sCommand.DdrHoldHalfCycle = QSPI_DDR_HHC_ANALOG_DELAY;
+ sCommand.SIOOMode = QSPI_SIOO_INST_EVERY_CMD;
+
+ /* Perform the write page by page */
+ do
+ {
+ sCommand.Address = current_addr;
+ sCommand.NbData = current_size;
+
+ /* Enable write operations */
+ if (QSPI_WriteEnable(&QSPIHandle) != QSPI_OK)
+ {
+ return QSPI_ERROR;
+ }
+
+ /* Configure the command */
+ if (HAL_QSPI_Command(&QSPIHandle, &sCommand, HAL_QPSI_TIMEOUT_DEFAULT_VALUE) != HAL_OK)
+ {
+ return QSPI_ERROR;
+ }
+
+ /* Transmission of the data */
+ if (HAL_QSPI_Transmit(&QSPIHandle, pData, HAL_QPSI_TIMEOUT_DEFAULT_VALUE) != HAL_OK)
+ {
+ return QSPI_ERROR;
+ }
+
+ /* Configure automatic polling mode to wait for end of program */
+ if (QSPI_AutoPollingMemReady(&QSPIHandle, HAL_QPSI_TIMEOUT_DEFAULT_VALUE) != QSPI_OK)
+ {
+ return QSPI_ERROR;
+ }
+
+ /* Update the address and size variables for next page programming */
+ current_addr += current_size;
+ pData += current_size;
+ current_size = ((current_addr + MX25R6435F_PAGE_SIZE) > end_addr) ? (end_addr - current_addr) : MX25R6435F_PAGE_SIZE;
+ } while (current_addr < end_addr);
+
+ return QSPI_OK;
+}
+
+/**
+ * @brief Erases the specified block of the QSPI memory.
+ * @param BlockAddress : Block address to erase
+ * @retval QSPI memory status
+ */
+uint8_t BSP_QSPI_Erase_Block(uint32_t BlockAddress)
+{
+ QSPI_CommandTypeDef sCommand;
+
+ /* Initialize the erase command */
+ sCommand.InstructionMode = QSPI_INSTRUCTION_1_LINE;
+ sCommand.Instruction = BLOCK_ERASE_CMD;
+ sCommand.AddressMode = QSPI_ADDRESS_1_LINE;
+ sCommand.AddressSize = QSPI_ADDRESS_24_BITS;
+ sCommand.Address = BlockAddress;
+ sCommand.AlternateByteMode = QSPI_ALTERNATE_BYTES_NONE;
+ sCommand.DataMode = QSPI_DATA_NONE;
+ sCommand.DummyCycles = 0;
+ sCommand.DdrMode = QSPI_DDR_MODE_DISABLE;
+ sCommand.DdrHoldHalfCycle = QSPI_DDR_HHC_ANALOG_DELAY;
+ sCommand.SIOOMode = QSPI_SIOO_INST_EVERY_CMD;
+
+ /* Enable write operations */
+ if (QSPI_WriteEnable(&QSPIHandle) != QSPI_OK)
+ {
+ return QSPI_ERROR;
+ }
+
+ /* Send the command */
+ if (HAL_QSPI_Command(&QSPIHandle, &sCommand, HAL_QPSI_TIMEOUT_DEFAULT_VALUE) != HAL_OK)
+ {
+ return QSPI_ERROR;
+ }
+
+ /* Configure automatic polling mode to wait for end of erase */
+ if (QSPI_AutoPollingMemReady(&QSPIHandle, MX25R6435F_BLOCK_ERASE_MAX_TIME) != QSPI_OK)
+ {
+ return QSPI_ERROR;
+ }
+
+ return QSPI_OK;
+}
+
+/**
+ * @brief Erases the specified sector of the QSPI memory.
+ * @param Sector : Sector address to erase (0 to 255)
+ * @retval QSPI memory status
+ * @note This function is non blocking meaning that sector erase
+ * operation is started but not completed when the function
+ * returns. Application has to call BSP_QSPI_GetStatus()
+ * to know when the device is available again (i.e. erase operation
+ * completed).
+ */
+uint8_t BSP_QSPI_Erase_Sector(uint32_t Sector)
+{
+ QSPI_CommandTypeDef sCommand;
+
+ if (Sector >= (uint32_t)(MX25R6435F_FLASH_SIZE/MX25R6435F_SECTOR_SIZE))
+ {
+ return QSPI_ERROR;
+ }
+
+ /* Initialize the erase command */
+ sCommand.InstructionMode = QSPI_INSTRUCTION_1_LINE;
+ sCommand.Instruction = SECTOR_ERASE_CMD;
+ sCommand.AddressMode = QSPI_ADDRESS_1_LINE;
+ sCommand.AddressSize = QSPI_ADDRESS_24_BITS;
+ sCommand.Address = (Sector * MX25R6435F_SECTOR_SIZE);
+ sCommand.AlternateByteMode = QSPI_ALTERNATE_BYTES_NONE;
+ sCommand.DataMode = QSPI_DATA_NONE;
+ sCommand.DummyCycles = 0;
+ sCommand.DdrMode = QSPI_DDR_MODE_DISABLE;
+ sCommand.DdrHoldHalfCycle = QSPI_DDR_HHC_ANALOG_DELAY;
+ sCommand.SIOOMode = QSPI_SIOO_INST_EVERY_CMD;
+
+ /* Enable write operations */
+ if (QSPI_WriteEnable(&QSPIHandle) != QSPI_OK)
+ {
+ return QSPI_ERROR;
+ }
+
+ /* Send the command */
+ if (HAL_QSPI_Command(&QSPIHandle, &sCommand, HAL_QPSI_TIMEOUT_DEFAULT_VALUE) != HAL_OK)
+ {
+ return QSPI_ERROR;
+ }
+
+ return QSPI_OK;
+}
+
+/**
+ * @brief Erases the entire QSPI memory.
+ * @retval QSPI memory status
+ */
+uint8_t BSP_QSPI_Erase_Chip(void)
+{
+ QSPI_CommandTypeDef sCommand;
+
+ /* Initialize the erase command */
+ sCommand.InstructionMode = QSPI_INSTRUCTION_1_LINE;
+ sCommand.Instruction = CHIP_ERASE_CMD;
+ sCommand.AddressMode = QSPI_ADDRESS_NONE;
+ sCommand.AlternateByteMode = QSPI_ALTERNATE_BYTES_NONE;
+ sCommand.DataMode = QSPI_DATA_NONE;
+ sCommand.DummyCycles = 0;
+ sCommand.DdrMode = QSPI_DDR_MODE_DISABLE;
+ sCommand.DdrHoldHalfCycle = QSPI_DDR_HHC_ANALOG_DELAY;
+ sCommand.SIOOMode = QSPI_SIOO_INST_EVERY_CMD;
+
+ /* Enable write operations */
+ if (QSPI_WriteEnable(&QSPIHandle) != QSPI_OK)
+ {
+ return QSPI_ERROR;
+ }
+
+ /* Send the command */
+ if (HAL_QSPI_Command(&QSPIHandle, &sCommand, HAL_QPSI_TIMEOUT_DEFAULT_VALUE) != HAL_OK)
+ {
+ return QSPI_ERROR;
+ }
+
+ /* Configure automatic polling mode to wait for end of erase */
+ if (QSPI_AutoPollingMemReady(&QSPIHandle, MX25R6435F_CHIP_ERASE_MAX_TIME) != QSPI_OK)
+ {
+ return QSPI_ERROR;
+ }
+
+ return QSPI_OK;
+}
+
+/**
+ * @brief Reads current status of the QSPI memory.
+ * @retval QSPI memory status
+ */
+uint8_t BSP_QSPI_GetStatus(void)
+{
+ QSPI_CommandTypeDef sCommand;
+ uint8_t reg;
+
+ /* Initialize the read security register command */
+ sCommand.InstructionMode = QSPI_INSTRUCTION_1_LINE;
+ sCommand.Instruction = READ_SEC_REG_CMD;
+ sCommand.AddressMode = QSPI_ADDRESS_NONE;
+ sCommand.AlternateByteMode = QSPI_ALTERNATE_BYTES_NONE;
+ sCommand.DataMode = QSPI_DATA_1_LINE;
+ sCommand.DummyCycles = 0;
+ sCommand.NbData = 1;
+ sCommand.DdrMode = QSPI_DDR_MODE_DISABLE;
+ sCommand.DdrHoldHalfCycle = QSPI_DDR_HHC_ANALOG_DELAY;
+ sCommand.SIOOMode = QSPI_SIOO_INST_EVERY_CMD;
+
+ /* Configure the command */
+ if (HAL_QSPI_Command(&QSPIHandle, &sCommand, HAL_QPSI_TIMEOUT_DEFAULT_VALUE) != HAL_OK)
+ {
+ return QSPI_ERROR;
+ }
+
+ /* Reception of the data */
+ if (HAL_QSPI_Receive(&QSPIHandle, ®, HAL_QPSI_TIMEOUT_DEFAULT_VALUE) != HAL_OK)
+ {
+ return QSPI_ERROR;
+ }
+
+ /* Check the value of the register */
+ if ((reg & (MX25R6435F_SECR_P_FAIL | MX25R6435F_SECR_E_FAIL)) != 0)
+ {
+ return QSPI_ERROR;
+ }
+ else if ((reg & (MX25R6435F_SECR_PSB | MX25R6435F_SECR_ESB)) != 0)
+ {
+ return QSPI_SUSPENDED;
+ }
+
+ /* Initialize the read status register command */
+ sCommand.Instruction = READ_STATUS_REG_CMD;
+
+ /* Configure the command */
+ if (HAL_QSPI_Command(&QSPIHandle, &sCommand, HAL_QPSI_TIMEOUT_DEFAULT_VALUE) != HAL_OK)
+ {
+ return QSPI_ERROR;
+ }
+
+ /* Reception of the data */
+ if (HAL_QSPI_Receive(&QSPIHandle, ®, HAL_QPSI_TIMEOUT_DEFAULT_VALUE) != HAL_OK)
+ {
+ return QSPI_ERROR;
+ }
+
+ /* Check the value of the register */
+ if ((reg & MX25R6435F_SR_WIP) != 0)
+ {
+ return QSPI_BUSY;
+ }
+ else
+ {
+ return QSPI_OK;
+ }
+}
+
+/**
+ * @brief Return the configuration of the QSPI memory.
+ * @param pInfo : pointer on the configuration structure
+ * @retval QSPI memory status
+ */
+uint8_t BSP_QSPI_GetInfo(QSPI_Info* pInfo)
+{
+ /* Configure the structure with the memory configuration */
+ pInfo->FlashSize = MX25R6435F_FLASH_SIZE;
+ pInfo->EraseSectorSize = MX25R6435F_SECTOR_SIZE;
+ pInfo->EraseSectorsNumber = (MX25R6435F_FLASH_SIZE/MX25R6435F_SECTOR_SIZE);
+ pInfo->ProgPageSize = MX25R6435F_PAGE_SIZE;
+ pInfo->ProgPagesNumber = (MX25R6435F_FLASH_SIZE/MX25R6435F_PAGE_SIZE);
+
+ return QSPI_OK;
+}
+
+/**
+ * @brief Configure the QSPI in memory-mapped mode
+ * @retval QSPI memory status
+ */
+uint8_t BSP_QSPI_EnableMemoryMappedMode(void)
+{
+ QSPI_CommandTypeDef sCommand;
+ QSPI_MemoryMappedTypeDef sMemMappedCfg;
+
+ /* Configure the command for the read instruction */
+ sCommand.InstructionMode = QSPI_INSTRUCTION_1_LINE;
+ sCommand.Instruction = QUAD_INOUT_READ_CMD;
+ sCommand.AddressMode = QSPI_ADDRESS_4_LINES;
+ sCommand.AddressSize = QSPI_ADDRESS_24_BITS;
+ sCommand.AlternateByteMode = QSPI_ALTERNATE_BYTES_4_LINES;
+ sCommand.AlternateBytesSize = QSPI_ALTERNATE_BYTES_8_BITS;
+ sCommand.AlternateBytes = MX25R6435F_ALT_BYTES_NO_PE_MODE;
+ sCommand.DataMode = QSPI_DATA_4_LINES;
+ sCommand.DummyCycles = MX25R6435F_DUMMY_CYCLES_READ_QUAD;
+ sCommand.DdrMode = QSPI_DDR_MODE_DISABLE;
+ sCommand.DdrHoldHalfCycle = QSPI_DDR_HHC_ANALOG_DELAY;
+ sCommand.SIOOMode = QSPI_SIOO_INST_EVERY_CMD;
+
+ /* Configure the memory mapped mode */
+ sMemMappedCfg.TimeOutActivation = QSPI_TIMEOUT_COUNTER_DISABLE;
+
+ if (HAL_QSPI_MemoryMapped(&QSPIHandle, &sCommand, &sMemMappedCfg) != HAL_OK)
+ {
+ return QSPI_ERROR;
+ }
+
+ return QSPI_OK;
+}
+
+/**
+ * @brief This function suspends an ongoing erase command.
+ * @retval QSPI memory status
+ */
+uint8_t BSP_QSPI_SuspendErase(void)
+{
+ QSPI_CommandTypeDef sCommand;
+
+ /* Check whether the device is busy (erase operation is
+ in progress).
+ */
+ if (BSP_QSPI_GetStatus() == QSPI_BUSY)
+ {
+ /* Initialize the erase command */
+ sCommand.InstructionMode = QSPI_INSTRUCTION_1_LINE;
+ sCommand.Instruction = PROG_ERASE_SUSPEND_CMD;
+ sCommand.AddressMode = QSPI_ADDRESS_NONE;
+ sCommand.AlternateByteMode = QSPI_ALTERNATE_BYTES_NONE;
+ sCommand.DataMode = QSPI_DATA_NONE;
+ sCommand.DummyCycles = 0;
+ sCommand.DdrMode = QSPI_DDR_MODE_DISABLE;
+ sCommand.DdrHoldHalfCycle = QSPI_DDR_HHC_ANALOG_DELAY;
+ sCommand.SIOOMode = QSPI_SIOO_INST_EVERY_CMD;
+
+ /* Send the command */
+ if (HAL_QSPI_Command(&QSPIHandle, &sCommand, HAL_QPSI_TIMEOUT_DEFAULT_VALUE) != HAL_OK)
+ {
+ return QSPI_ERROR;
+ }
+
+ if (BSP_QSPI_GetStatus() == QSPI_SUSPENDED)
+ {
+ return QSPI_OK;
+ }
+
+ return QSPI_ERROR;
+ }
+
+ return QSPI_OK;
+}
+
+/**
+ * @brief This function resumes a paused erase command.
+ * @retval QSPI memory status
+ */
+uint8_t BSP_QSPI_ResumeErase(void)
+{
+ QSPI_CommandTypeDef sCommand;
+
+ /* Check whether the device is in suspended state */
+ if (BSP_QSPI_GetStatus() == QSPI_SUSPENDED)
+ {
+ /* Initialize the erase command */
+ sCommand.InstructionMode = QSPI_INSTRUCTION_1_LINE;
+ sCommand.Instruction = PROG_ERASE_RESUME_CMD;
+ sCommand.AddressMode = QSPI_ADDRESS_NONE;
+ sCommand.AlternateByteMode = QSPI_ALTERNATE_BYTES_NONE;
+ sCommand.DataMode = QSPI_DATA_NONE;
+ sCommand.DummyCycles = 0;
+ sCommand.DdrMode = QSPI_DDR_MODE_DISABLE;
+ sCommand.DdrHoldHalfCycle = QSPI_DDR_HHC_ANALOG_DELAY;
+ sCommand.SIOOMode = QSPI_SIOO_INST_EVERY_CMD;
+
+ /* Send the command */
+ if (HAL_QSPI_Command(&QSPIHandle, &sCommand, HAL_QPSI_TIMEOUT_DEFAULT_VALUE) != HAL_OK)
+ {
+ return QSPI_ERROR;
+ }
+
+ /*
+ When this command is executed, the status register write in progress bit is set to 1, and
+ the flag status register program erase controller bit is set to 0. This command is ignored
+ if the device is not in a suspended state.
+ */
+
+ if (BSP_QSPI_GetStatus() == QSPI_BUSY)
+ {
+ return QSPI_OK;
+ }
+
+ return QSPI_ERROR;
+ }
+
+ return QSPI_OK;
+}
+
+/**
+ * @brief This function enter the QSPI memory in deep power down mode.
+ * @retval QSPI memory status
+ */
+uint8_t BSP_QSPI_EnterDeepPowerDown(void)
+{
+ QSPI_CommandTypeDef sCommand;
+
+ /* Initialize the deep power down command */
+ sCommand.InstructionMode = QSPI_INSTRUCTION_1_LINE;
+ sCommand.Instruction = DEEP_POWER_DOWN_CMD;
+ sCommand.AddressMode = QSPI_ADDRESS_NONE;
+ sCommand.AlternateByteMode = QSPI_ALTERNATE_BYTES_NONE;
+ sCommand.DataMode = QSPI_DATA_NONE;
+ sCommand.DummyCycles = 0;
+ sCommand.DdrMode = QSPI_DDR_MODE_DISABLE;
+ sCommand.DdrHoldHalfCycle = QSPI_DDR_HHC_ANALOG_DELAY;
+ sCommand.SIOOMode = QSPI_SIOO_INST_EVERY_CMD;
+
+ /* Send the command */
+ if (HAL_QSPI_Command(&QSPIHandle, &sCommand, HAL_QPSI_TIMEOUT_DEFAULT_VALUE) != HAL_OK)
+ {
+ return QSPI_ERROR;
+ }
+
+ /* --- Memory takes 10us max to enter deep power down --- */
+ /* --- At least 30us should be respected before leaving deep power down --- */
+
+ return QSPI_OK;
+}
+
+/**
+ * @brief This function leave the QSPI memory from deep power down mode.
+ * @retval QSPI memory status
+ */
+uint8_t BSP_QSPI_LeaveDeepPowerDown(void)
+{
+ QSPI_CommandTypeDef sCommand;
+
+ /* Initialize the erase command */
+ sCommand.InstructionMode = QSPI_INSTRUCTION_1_LINE;
+ sCommand.Instruction = NO_OPERATION_CMD;
+ sCommand.AddressMode = QSPI_ADDRESS_NONE;
+ sCommand.AlternateByteMode = QSPI_ALTERNATE_BYTES_NONE;
+ sCommand.DataMode = QSPI_DATA_NONE;
+ sCommand.DummyCycles = 0;
+ sCommand.DdrMode = QSPI_DDR_MODE_DISABLE;
+ sCommand.DdrHoldHalfCycle = QSPI_DDR_HHC_ANALOG_DELAY;
+ sCommand.SIOOMode = QSPI_SIOO_INST_EVERY_CMD;
+
+ /* Send the command */
+ if (HAL_QSPI_Command(&QSPIHandle, &sCommand, HAL_QPSI_TIMEOUT_DEFAULT_VALUE) != HAL_OK)
+ {
+ return QSPI_ERROR;
+ }
+
+ /* --- A NOP command is sent to the memory, as the nCS should be low for at least 20 ns --- */
+ /* --- Memory takes 35us min to leave deep power down --- */
+
+ return QSPI_OK;
+}
+
+/**
+ * @brief Initializes the QSPI MSP.
+ * @retval None
+ */
+__weak void BSP_QSPI_MspInit(void)
+{
+ GPIO_InitTypeDef GPIO_InitStruct;
+
+ /* Enable the QuadSPI memory interface clock */
+ __HAL_RCC_QSPI_CLK_ENABLE();
+
+ /* Reset the QuadSPI memory interface */
+ __HAL_RCC_QSPI_FORCE_RESET();
+ __HAL_RCC_QSPI_RELEASE_RESET();
+
+ /* Enable GPIO clocks */
+ __HAL_RCC_GPIOE_CLK_ENABLE();
+
+ /* QSPI CLK, CS, D0, D1, D2 and D3 GPIO pins configuration */
+ GPIO_InitStruct.Pin = GPIO_PIN_10 | GPIO_PIN_11 | GPIO_PIN_12 |\
+ GPIO_PIN_13 | GPIO_PIN_14 | GPIO_PIN_15;
+ GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ GPIO_InitStruct.Pull = GPIO_NOPULL;
+ GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+ GPIO_InitStruct.Alternate = GPIO_AF10_QUADSPI;
+ HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
+}
+
+/**
+ * @brief De-Initializes the QSPI MSP.
+ * @retval None
+ */
+__weak void BSP_QSPI_MspDeInit(void)
+{
+ GPIO_InitTypeDef GPIO_InitStruct;
+
+ /* QSPI CLK, CS, D0-D3 GPIO pins de-configuration */
+ __HAL_RCC_GPIOE_CLK_ENABLE();
+ GPIO_InitStruct.Pin = GPIO_PIN_10 | GPIO_PIN_11 | GPIO_PIN_12 |\
+ GPIO_PIN_13 | GPIO_PIN_14 | GPIO_PIN_15;
+
+ HAL_GPIO_DeInit(GPIOE, GPIO_InitStruct.Pin);
+
+ /* Reset the QuadSPI memory interface */
+ __HAL_RCC_QSPI_FORCE_RESET();
+ __HAL_RCC_QSPI_RELEASE_RESET();
+
+ /* Disable the QuadSPI memory interface clock */
+ __HAL_RCC_QSPI_CLK_DISABLE();
+}
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32L475E_IOT01_QSPI_Private_Functions
+ * @{
+ */
+
+/**
+ * @brief This function reset the QSPI memory.
+ * @param hqspi : QSPI handle
+ * @retval None
+ */
+static uint8_t QSPI_ResetMemory(QSPI_HandleTypeDef *hqspi)
+{
+ QSPI_CommandTypeDef sCommand;
+
+ /* Initialize the reset enable command */
+ sCommand.InstructionMode = QSPI_INSTRUCTION_1_LINE;
+ sCommand.Instruction = RESET_ENABLE_CMD;
+ sCommand.AddressMode = QSPI_ADDRESS_NONE;
+ sCommand.AlternateByteMode = QSPI_ALTERNATE_BYTES_NONE;
+ sCommand.DataMode = QSPI_DATA_NONE;
+ sCommand.DummyCycles = 0;
+ sCommand.DdrMode = QSPI_DDR_MODE_DISABLE;
+ sCommand.DdrHoldHalfCycle = QSPI_DDR_HHC_ANALOG_DELAY;
+ sCommand.SIOOMode = QSPI_SIOO_INST_EVERY_CMD;
+
+ /* Send the command */
+ if (HAL_QSPI_Command(&QSPIHandle, &sCommand, HAL_QPSI_TIMEOUT_DEFAULT_VALUE) != HAL_OK)
+ {
+ return QSPI_ERROR;
+ }
+
+ /* Send the reset memory command */
+ sCommand.Instruction = RESET_MEMORY_CMD;
+ if (HAL_QSPI_Command(&QSPIHandle, &sCommand, HAL_QPSI_TIMEOUT_DEFAULT_VALUE) != HAL_OK)
+ {
+ return QSPI_ERROR;
+ }
+
+ /* Configure automatic polling mode to wait the memory is ready */
+ if (QSPI_AutoPollingMemReady(&QSPIHandle, HAL_QPSI_TIMEOUT_DEFAULT_VALUE) != QSPI_OK)
+ {
+ return QSPI_ERROR;
+ }
+
+ return QSPI_OK;
+}
+
+/**
+ * @brief This function send a Write Enable and wait it is effective.
+ * @param hqspi : QSPI handle
+ * @retval None
+ */
+static uint8_t QSPI_WriteEnable(QSPI_HandleTypeDef *hqspi)
+{
+ QSPI_CommandTypeDef sCommand;
+ QSPI_AutoPollingTypeDef sConfig;
+
+ /* Enable write operations */
+ sCommand.InstructionMode = QSPI_INSTRUCTION_1_LINE;
+ sCommand.Instruction = WRITE_ENABLE_CMD;
+ sCommand.AddressMode = QSPI_ADDRESS_NONE;
+ sCommand.AlternateByteMode = QSPI_ALTERNATE_BYTES_NONE;
+ sCommand.DataMode = QSPI_DATA_NONE;
+ sCommand.DummyCycles = 0;
+ sCommand.DdrMode = QSPI_DDR_MODE_DISABLE;
+ sCommand.DdrHoldHalfCycle = QSPI_DDR_HHC_ANALOG_DELAY;
+ sCommand.SIOOMode = QSPI_SIOO_INST_EVERY_CMD;
+
+ if (HAL_QSPI_Command(&QSPIHandle, &sCommand, HAL_QPSI_TIMEOUT_DEFAULT_VALUE) != HAL_OK)
+ {
+ return QSPI_ERROR;
+ }
+
+ /* Configure automatic polling mode to wait for write enabling */
+ sConfig.Match = MX25R6435F_SR_WEL;
+ sConfig.Mask = MX25R6435F_SR_WEL;
+ sConfig.MatchMode = QSPI_MATCH_MODE_AND;
+ sConfig.StatusBytesSize = 1;
+ sConfig.Interval = 0x10;
+ sConfig.AutomaticStop = QSPI_AUTOMATIC_STOP_ENABLE;
+
+ sCommand.Instruction = READ_STATUS_REG_CMD;
+ sCommand.DataMode = QSPI_DATA_1_LINE;
+
+ if (HAL_QSPI_AutoPolling(&QSPIHandle, &sCommand, &sConfig, HAL_QPSI_TIMEOUT_DEFAULT_VALUE) != HAL_OK)
+ {
+ return QSPI_ERROR;
+ }
+
+ return QSPI_OK;
+}
+
+/**
+ * @brief This function read the SR of the memory and wait the EOP.
+ * @param hqspi : QSPI handle
+ * @param Timeout : Timeout for auto-polling
+ * @retval None
+ */
+static uint8_t QSPI_AutoPollingMemReady(QSPI_HandleTypeDef *hqspi, uint32_t Timeout)
+{
+ QSPI_CommandTypeDef sCommand;
+ QSPI_AutoPollingTypeDef sConfig;
+
+ /* Configure automatic polling mode to wait for memory ready */
+ sCommand.InstructionMode = QSPI_INSTRUCTION_1_LINE;
+ sCommand.Instruction = READ_STATUS_REG_CMD;
+ sCommand.AddressMode = QSPI_ADDRESS_NONE;
+ sCommand.AlternateByteMode = QSPI_ALTERNATE_BYTES_NONE;
+ sCommand.DataMode = QSPI_DATA_1_LINE;
+ sCommand.DummyCycles = 0;
+ sCommand.DdrMode = QSPI_DDR_MODE_DISABLE;
+ sCommand.DdrHoldHalfCycle = QSPI_DDR_HHC_ANALOG_DELAY;
+ sCommand.SIOOMode = QSPI_SIOO_INST_EVERY_CMD;
+
+ sConfig.Match = 0;
+ sConfig.Mask = MX25R6435F_SR_WIP;
+ sConfig.MatchMode = QSPI_MATCH_MODE_AND;
+ sConfig.StatusBytesSize = 1;
+ sConfig.Interval = 0x10;
+ sConfig.AutomaticStop = QSPI_AUTOMATIC_STOP_ENABLE;
+
+ if (HAL_QSPI_AutoPolling(&QSPIHandle, &sCommand, &sConfig, Timeout) != HAL_OK)
+ {
+ return QSPI_ERROR;
+ }
+
+ return QSPI_OK;
+}
+
+/**
+ * @brief This function enables/disables the Quad mode of the memory.
+ * @param hqspi : QSPI handle
+ * @param Operation : QSPI_QUAD_ENABLE or QSPI_QUAD_DISABLE mode
+ * @retval None
+ */
+static uint8_t QSPI_QuadMode(QSPI_HandleTypeDef *hqspi, uint8_t Operation)
+{
+ QSPI_CommandTypeDef sCommand;
+ uint8_t reg;
+
+ /* Read status register */
+ sCommand.InstructionMode = QSPI_INSTRUCTION_1_LINE;
+ sCommand.Instruction = READ_STATUS_REG_CMD;
+ sCommand.AddressMode = QSPI_ADDRESS_NONE;
+ sCommand.AlternateByteMode = QSPI_ALTERNATE_BYTES_NONE;
+ sCommand.DataMode = QSPI_DATA_1_LINE;
+ sCommand.DummyCycles = 0;
+ sCommand.NbData = 1;
+ sCommand.DdrMode = QSPI_DDR_MODE_DISABLE;
+ sCommand.DdrHoldHalfCycle = QSPI_DDR_HHC_ANALOG_DELAY;
+ sCommand.SIOOMode = QSPI_SIOO_INST_EVERY_CMD;
+
+ if (HAL_QSPI_Command(&QSPIHandle, &sCommand, HAL_QPSI_TIMEOUT_DEFAULT_VALUE) != HAL_OK)
+ {
+ return QSPI_ERROR;
+ }
+
+ if (HAL_QSPI_Receive(&QSPIHandle, ®, HAL_QPSI_TIMEOUT_DEFAULT_VALUE) != HAL_OK)
+ {
+ return QSPI_ERROR;
+ }
+
+ /* Enable write operations */
+ if (QSPI_WriteEnable(&QSPIHandle) != QSPI_OK)
+ {
+ return QSPI_ERROR;
+ }
+
+ /* Activate/deactivate the Quad mode */
+ if (Operation == QSPI_QUAD_ENABLE)
+ {
+ SET_BIT(reg, MX25R6435F_SR_QE);
+ }
+ else
+ {
+ CLEAR_BIT(reg, MX25R6435F_SR_QE);
+ }
+
+ sCommand.Instruction = WRITE_STATUS_CFG_REG_CMD;
+
+ if (HAL_QSPI_Command(&QSPIHandle, &sCommand, HAL_QPSI_TIMEOUT_DEFAULT_VALUE) != HAL_OK)
+ {
+ return QSPI_ERROR;
+ }
+
+ if (HAL_QSPI_Transmit(&QSPIHandle, ®, HAL_QPSI_TIMEOUT_DEFAULT_VALUE) != HAL_OK)
+ {
+ return QSPI_ERROR;
+ }
+
+ /* Wait that memory is ready */
+ if (QSPI_AutoPollingMemReady(&QSPIHandle, HAL_QPSI_TIMEOUT_DEFAULT_VALUE) != QSPI_OK)
+ {
+ return QSPI_ERROR;
+ }
+
+ /* Check the configuration has been correctly done */
+ sCommand.Instruction = READ_STATUS_REG_CMD;
+
+ if (HAL_QSPI_Command(&QSPIHandle, &sCommand, HAL_QPSI_TIMEOUT_DEFAULT_VALUE) != HAL_OK)
+ {
+ return QSPI_ERROR;
+ }
+
+ if (HAL_QSPI_Receive(&QSPIHandle, ®, HAL_QPSI_TIMEOUT_DEFAULT_VALUE) != HAL_OK)
+ {
+ return QSPI_ERROR;
+ }
+
+ if ((((reg & MX25R6435F_SR_QE) == 0) && (Operation == QSPI_QUAD_ENABLE)) ||
+ (((reg & MX25R6435F_SR_QE) != 0) && (Operation == QSPI_QUAD_DISABLE)))
+ {
+ return QSPI_ERROR;
+ }
+
+ return QSPI_OK;
+}
+
+/**
+ * @brief This function enables/disables the high performance mode of the memory.
+ * @param hqspi : QSPI handle
+ * @param Operation : QSPI_HIGH_PERF_ENABLE or QSPI_HIGH_PERF_DISABLE high performance mode
+ * @retval None
+ */
+static uint8_t QSPI_HighPerfMode(QSPI_HandleTypeDef *hqspi, uint8_t Operation)
+{
+ QSPI_CommandTypeDef sCommand;
+ uint8_t reg[3];
+
+ /* Read status register */
+ sCommand.InstructionMode = QSPI_INSTRUCTION_1_LINE;
+ sCommand.Instruction = READ_STATUS_REG_CMD;
+ sCommand.AddressMode = QSPI_ADDRESS_NONE;
+ sCommand.AlternateByteMode = QSPI_ALTERNATE_BYTES_NONE;
+ sCommand.DataMode = QSPI_DATA_1_LINE;
+ sCommand.DummyCycles = 0;
+ sCommand.NbData = 1;
+ sCommand.DdrMode = QSPI_DDR_MODE_DISABLE;
+ sCommand.DdrHoldHalfCycle = QSPI_DDR_HHC_ANALOG_DELAY;
+ sCommand.SIOOMode = QSPI_SIOO_INST_EVERY_CMD;
+
+ if (HAL_QSPI_Command(&QSPIHandle, &sCommand, HAL_QPSI_TIMEOUT_DEFAULT_VALUE) != HAL_OK)
+ {
+ return QSPI_ERROR;
+ }
+
+ if (HAL_QSPI_Receive(&QSPIHandle, &(reg[0]), HAL_QPSI_TIMEOUT_DEFAULT_VALUE) != HAL_OK)
+ {
+ return QSPI_ERROR;
+ }
+
+ /* Read configuration registers */
+ sCommand.Instruction = READ_CFG_REG_CMD;
+ sCommand.NbData = 2;
+
+ if (HAL_QSPI_Command(&QSPIHandle, &sCommand, HAL_QPSI_TIMEOUT_DEFAULT_VALUE) != HAL_OK)
+ {
+ return QSPI_ERROR;
+ }
+
+ if (HAL_QSPI_Receive(&QSPIHandle, &(reg[1]), HAL_QPSI_TIMEOUT_DEFAULT_VALUE) != HAL_OK)
+ {
+ return QSPI_ERROR;
+ }
+
+ /* Enable write operations */
+ if (QSPI_WriteEnable(&QSPIHandle) != QSPI_OK)
+ {
+ return QSPI_ERROR;
+ }
+
+ /* Activate/deactivate the Quad mode */
+ if (Operation == QSPI_HIGH_PERF_ENABLE)
+ {
+ SET_BIT(reg[2], MX25R6435F_CR2_LH_SWITCH);
+ }
+ else
+ {
+ CLEAR_BIT(reg[2], MX25R6435F_CR2_LH_SWITCH);
+ }
+
+ sCommand.Instruction = WRITE_STATUS_CFG_REG_CMD;
+ sCommand.NbData = 3;
+
+ if (HAL_QSPI_Command(&QSPIHandle, &sCommand, HAL_QPSI_TIMEOUT_DEFAULT_VALUE) != HAL_OK)
+ {
+ return QSPI_ERROR;
+ }
+
+ if (HAL_QSPI_Transmit(&QSPIHandle, &(reg[0]), HAL_QPSI_TIMEOUT_DEFAULT_VALUE) != HAL_OK)
+ {
+ return QSPI_ERROR;
+ }
+
+ /* Wait that memory is ready */
+ if (QSPI_AutoPollingMemReady(&QSPIHandle, HAL_QPSI_TIMEOUT_DEFAULT_VALUE) != QSPI_OK)
+ {
+ return QSPI_ERROR;
+ }
+
+ /* Check the configuration has been correctly done */
+ sCommand.Instruction = READ_CFG_REG_CMD;
+ sCommand.NbData = 2;
+
+ if (HAL_QSPI_Command(&QSPIHandle, &sCommand, HAL_QPSI_TIMEOUT_DEFAULT_VALUE) != HAL_OK)
+ {
+ return QSPI_ERROR;
+ }
+
+ if (HAL_QSPI_Receive(&QSPIHandle, &(reg[0]), HAL_QPSI_TIMEOUT_DEFAULT_VALUE) != HAL_OK)
+ {
+ return QSPI_ERROR;
+ }
+
+ if ((((reg[1] & MX25R6435F_CR2_LH_SWITCH) == 0) && (Operation == QSPI_HIGH_PERF_ENABLE)) ||
+ (((reg[1] & MX25R6435F_CR2_LH_SWITCH) != 0) && (Operation == QSPI_HIGH_PERF_DISABLE)))
+ {
+ return QSPI_ERROR;
+ }
+
+ return QSPI_OK;
+}
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
+
diff --git a/P3_SETR2/BSP/stm32l475e_iot01_qspi.h b/P3_SETR2/BSP/stm32l475e_iot01_qspi.h
new file mode 100644
index 0000000..bc16713
--- /dev/null
+++ b/P3_SETR2/BSP/stm32l475e_iot01_qspi.h
@@ -0,0 +1,120 @@
+/**
+ ******************************************************************************
+ * @file stm32l475e_iot01_qspi.h
+ * @author MCD Application Team
+ * @brief This file contains the common defines and functions prototypes for
+ * the stm32l475e_iot01_qspi.c driver.
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2017 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32L475E_IOT01_QSPI_H
+#define __STM32L475E_IOT01_QSPI_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32l4xx_hal.h"
+#include "../Components/mx25r6435f/mx25r6435f.h"
+
+/** @addtogroup BSP
+ * @{
+ */
+
+/** @addtogroup STM32L475E_IOT01
+ * @{
+ */
+
+/** @addtogroup STM32L475E_IOT01_QSPI
+ * @{
+ */
+
+/* Exported constants --------------------------------------------------------*/
+/** @defgroup STM32L475E_IOT01_QSPI_Exported_Constants QSPI Exported Constants
+ * @{
+ */
+/* QSPI Error codes */
+#define QSPI_OK ((uint8_t)0x00)
+#define QSPI_ERROR ((uint8_t)0x01)
+#define QSPI_BUSY ((uint8_t)0x02)
+#define QSPI_NOT_SUPPORTED ((uint8_t)0x04)
+#define QSPI_SUSPENDED ((uint8_t)0x08)
+
+/**
+ * @}
+ */
+
+/* Exported types ------------------------------------------------------------*/
+/** @defgroup STM32L475E_IOT01_QSPI_Exported_Types QSPI Exported Types
+ * @{
+ */
+/* QSPI Info */
+typedef struct {
+ uint32_t FlashSize; /*!< Size of the flash */
+ uint32_t EraseSectorSize; /*!< Size of sectors for the erase operation */
+ uint32_t EraseSectorsNumber; /*!< Number of sectors for the erase operation */
+ uint32_t ProgPageSize; /*!< Size of pages for the program operation */
+ uint32_t ProgPagesNumber; /*!< Number of pages for the program operation */
+} QSPI_Info;
+
+/**
+ * @}
+ */
+
+/* Exported functions --------------------------------------------------------*/
+/** @defgroup STM32L475E_IOT01_QSPI_Exported_Functions QSPI Exported Functions
+ * @{
+ */
+uint8_t BSP_QSPI_Init (void);
+uint8_t BSP_QSPI_DeInit (void);
+uint8_t BSP_QSPI_Read (uint8_t* pData, uint32_t ReadAddr, uint32_t Size);
+uint8_t BSP_QSPI_Write (uint8_t* pData, uint32_t WriteAddr, uint32_t Size);
+uint8_t BSP_QSPI_Erase_Block (uint32_t BlockAddress);
+uint8_t BSP_QSPI_Erase_Sector (uint32_t Sector);
+uint8_t BSP_QSPI_Erase_Chip (void);
+uint8_t BSP_QSPI_GetStatus (void);
+uint8_t BSP_QSPI_GetInfo (QSPI_Info* pInfo);
+uint8_t BSP_QSPI_EnableMemoryMappedMode(void);
+uint8_t BSP_QSPI_SuspendErase (void);
+uint8_t BSP_QSPI_ResumeErase (void);
+uint8_t BSP_QSPI_EnterDeepPowerDown (void);
+uint8_t BSP_QSPI_LeaveDeepPowerDown (void);
+
+void BSP_QSPI_MspInit(void);
+void BSP_QSPI_MspDeInit(void);
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32L475E_IOT01_QSPI_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/P3_SETR2/BSP/stm32l475e_iot01_tsensor.c b/P3_SETR2/BSP/stm32l475e_iot01_tsensor.c
new file mode 100644
index 0000000..5c92acf
--- /dev/null
+++ b/P3_SETR2/BSP/stm32l475e_iot01_tsensor.c
@@ -0,0 +1,96 @@
+/**
+ ******************************************************************************
+ * @file stm32l475e_iot01_tsensor.c
+ * @author MCD Application Team
+ * @brief This file provides a set of functions needed to manage the temperature sensor
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2017 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32l475e_iot01_tsensor.h"
+
+/** @addtogroup BSP
+ * @{
+ */
+
+/** @addtogroup STM32L475E_IOT01
+ * @{
+ */
+
+/** @defgroup STM32L475E_IOT01_TEMPERATURE TEMPERATURE
+ * @{
+ */
+
+/** @defgroup STM32L475E_IOT01_TEMPERATURE_Private_Variables TEMPERATURE Private Variables
+ * @{
+ */
+static TSENSOR_DrvTypeDef *tsensor_drv;
+/**
+ * @}
+ */
+
+/** @defgroup STM32L475E_IOT01_TEMPERATURE_Private_Functions TEMPERATURE Private Functions
+ * @{
+ */
+
+/**
+ * @brief Initializes peripherals used by the I2C Temperature Sensor driver.
+ * @retval TSENSOR status
+ */
+uint32_t BSP_TSENSOR_Init(void)
+{
+ uint8_t ret = TSENSOR_ERROR;
+
+#ifdef USE_LPS22HB_TEMP
+ tsensor_drv = &LPS22HB_T_Drv;
+#else /* USE_HTS221_TEMP */
+ tsensor_drv = &HTS221_T_Drv;
+#endif
+
+ /* Low level init */
+ SENSOR_IO_Init();
+
+ /* TSENSOR Init */
+ tsensor_drv->Init(TSENSOR_I2C_ADDRESS, NULL);
+
+ ret = TSENSOR_OK;
+
+ return ret;
+}
+
+/**
+ * @brief Read Temperature register of TS751.
+ * @retval STTS751 measured temperature value.
+ */
+float BSP_TSENSOR_ReadTemp(void)
+{
+ return tsensor_drv->ReadTemp(TSENSOR_I2C_ADDRESS);
+}
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/P3_SETR2/BSP/stm32l475e_iot01_tsensor.h b/P3_SETR2/BSP/stm32l475e_iot01_tsensor.h
new file mode 100644
index 0000000..a271beb
--- /dev/null
+++ b/P3_SETR2/BSP/stm32l475e_iot01_tsensor.h
@@ -0,0 +1,97 @@
+/**
+ ******************************************************************************
+ * @file stm32l475e_iot01_tsensor.h
+ * @author MCD Application Team
+ * @brief This file provides a set of functions needed to manage the temperature sensor
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2017 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32L475E_IOT01_TSENSOR_H
+#define __STM32L475E_IOT01_TSENSOR_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32l475e_iot01.h"
+#ifdef USE_LPS22HB_TEMP
+#include "../Components/lps22hb/lps22hb.h"
+#else /* USE_HTS221_TEMP */
+#include "../Components/hts221/hts221.h"
+#endif
+
+/** @addtogroup BSP
+ * @{
+ */
+
+/** @addtogroup STM32L475E_IOT01
+ * @{
+ */
+
+/** @addtogroup STM32L475E_IOT01_TEMPERATURE
+ * @{
+ */
+
+/** @defgroup STM32L475E_IOT01_TEMPERATURE_Exported_Types TEMPERATURE Exported Types
+ * @{
+ */
+
+/**
+ * @brief TSENSOR Status
+ */
+typedef enum
+{
+ TSENSOR_OK = 0,
+ TSENSOR_ERROR
+}TSENSOR_Status_TypDef;
+
+/**
+ * @}
+ */
+
+
+/** @defgroup STM32L475E_IOT01_TEMPERATURE_Exported_Functions TEMPERATURE Exported Constants
+ * @{
+ */
+/* Exported macros -----------------------------------------------------------*/
+/* Private macros ------------------------------------------------------------*/
+/* Exported functions --------------------------------------------------------*/
+/* Sensor Configuration Functions */
+uint32_t BSP_TSENSOR_Init(void);
+float BSP_TSENSOR_ReadTemp(void);
+/**
+ * @}
+ */
+
+#ifdef __cplusplus
+}
+#endif
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+#endif /* __STM32L475E_IOT01_TSENSOR_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/P3_SETR2/Components/Common/Release_Notes.html b/P3_SETR2/Components/Common/Release_Notes.html
new file mode 100644
index 0000000..8ed79d6
--- /dev/null
+++ b/P3_SETR2/Components/Common/Release_Notes.html
@@ -0,0 +1,212 @@
+
+
+
+
+
+
+ Release Notes for BSP Components Common Drivers
+
+
+
+
+
+
+
+
+
+
+Release Notes for BSP Components Common Drivers
+Copyright © 2017 STMicroelectronics
+
+
+
+
+
+
License
+
Licensed by ST under BSD 3-Clause license (the "License"). You may not use this package except in compliance with the License. You may obtain a copy of the License at:
+
https://opensource.org/licenses/BSD-3-Clause
+
Purpose
+
This directory contains the BSP components common drivers.
+
+
+
Update History
+
+
V5.1.2 / 03-April-2019
+
+
Main Changes
+
+Update release notes format
+
+
+
+
+
V5.1.1 / 31-August-2018
+
+
Main Changes
+
+Reformat the BSD 3-Clause license declaration in the files header (replace license terms by a web reference to OSI website where those terms lie)
+Correct sensor names in headers files hsensor.h and psensor.h
+
+
+
+
+
V5.1.0 / 21-November-2017
+
+
Main Changes
+
+Add dpredriver.h: support of DP redriver class
+Add pwrmon.h: support of power monitor class
+Add usbtypecswitch.h: support of USB type C switch class
+
+
+
+
+
V5.0.0 / 01-March-2017
+
+
Main Changes
+
+Add hsensor.h: support of humidity class
+Add psensor.h: support of pressure class
+Update tsensor.h: Temperature can be negative
+Update accelero.h: LowPower API can enable or disable the low power mode
+Update magneto.h: LowPower API can enable or disable the low power mode
+
+
Notes:
+
This version breaks the compatibility with previous versions.
+
+
+
+
V4.0.1 / 21-July-2015
+
+
Main Changes
+
+tsensor.h: Fix compilation issue on TSENSOR_InitTypeDef
+
+
+
+
+
V4.0.0 / 22-June-2015
+
+
Main Changes
+
+accelero.h: add *DeInit field in ACCELERO_DrvTypeDef structure
+audio.h: add *DeInit field in AUDIO_DrvTypeDef structure
+idd.h:
+
+add Shunt0StabDelay, Shunt1StabDelay, Shunt2StabDelay, Shunt3StabDelay, Shunt4StabDelay and ShuntNbOnBoard fields in IDD_ConfigTypeDef structure
+rename ShuntNumber field to ShuntNbUsed in IDD_ConfigTypeDef structure
+
+magneto.h: add *DeInit field in MAGNETO_DrvTypeDef structure
+
+
Important Note:
+
This release V4.0.0 is not backward compatible with V3.0.0.
+
+
+
+
V3.0.0 / 28-April-2015
+
+
Main Changes
+
+accelero.h: add LowPower field in ACCELERO_DrvTypeDef structure
+magneto.h: add LowPower field in MAGNETO_DrvTypeDef structure
+gyro.h: add DeInit and LowPower fields in GYRO_DrvTypeDef structure
+camera.h: add CAMERA_COLOR_EFFECT_NONE define
+idd.h:
+
+add MeasureNb, DeltaDelayUnit and DeltaDelayValue fields in IDD_ConfigTypeDef structure
+rename PreDelay field to PreDelayUnit in IDD_ConfigTypeDef structure
+
+
+
Important Note:
+
This release V3.0.0 is not backward compatible with V2.2.0.
+
+
+
+
V2.2.0 / 09-February-2015
+
+
Main Changes
+
+Magnetometer driver function prototypes added (magneto.h file)
+Update “idd.h” file to provide DeInit() and WakeUp() services in IDD current measurement driver
+
+
+
+
+
V2.1.0 / 06-February-2015
+
+
Main Changes
+
+IDD current measurement driver function prototypes added (idd.h file)
+io.h: add new typedef enum IO_PinState with IO_PIN_RESET and IO_PIN_SET values
+
+
+
+
+
V2.0.0 / 15-December-2014
+
+
Main Changes
+
+Update “io.h” file to support MFX (Multi Function eXpander) device available on some STM32 boards
+
+add new entries for IO_ModeTypedef enumeration structure
+update the IO_DrvTypeDef structure
+
+Update all return values and function parameters to uint32_t
+Add a return value for Config field
+
+
+
+
Important Note:
+
This version V2.0.0 is not backward compatible with V1.2.1.
+
+
+
+
V1.2.1 / 02-December-2014
+
+
Main Changes
+
+gyro.h: change “__GIRO_H” by “__GYRO_H” to fix compilation issue under Mac OS
+
+
+
+
+
V1.2.0 / 18-June-2014
+
+
Main Changes
+
+EPD (E Paper Display) driver function prototype added (epd.h file)
+
+
+
+
+
V1.1.0 / 21-March-2014
+
+
Main Changes
+
+Temperature Sensor driver function prototype added
+
+
+
+
+
V1.0.0 / 18-February-2014
+
+
Main Changes
+
+First official release with Accelerometer, Audio, Camera, Gyroscope, IO, LCD and Touch Screen drivers function prototypes
+
+
+
+
+
+
+
+
diff --git a/P3_SETR2/Components/Common/accelero.h b/P3_SETR2/Components/Common/accelero.h
new file mode 100644
index 0000000..9be9d08
--- /dev/null
+++ b/P3_SETR2/Components/Common/accelero.h
@@ -0,0 +1,125 @@
+/**
+ ******************************************************************************
+ * @file accelero.h
+ * @author MCD Application Team
+ * @brief This header file contains the functions prototypes for the Accelerometer driver.
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2017 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __ACCELERO_H
+#define __ACCELERO_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include
+
+/** @addtogroup BSP
+ * @{
+ */
+
+/** @addtogroup Components
+ * @{
+ */
+
+/** @addtogroup ACCELERO
+ * @{
+ */
+
+/** @defgroup ACCELERO_Exported_Types
+ * @{
+ */
+
+/** @defgroup ACCELERO_Driver_structure Accelerometer Driver structure
+ * @{
+ */
+typedef struct
+{
+ void (*Init)(uint16_t);
+ void (*DeInit)(void);
+ uint8_t (*ReadID)(void);
+ void (*Reset)(void);
+ void (*LowPower)(uint16_t);
+ void (*ConfigIT)(void);
+ void (*EnableIT)(uint8_t);
+ void (*DisableIT)(uint8_t);
+ uint8_t (*ITStatus)(uint16_t);
+ void (*ClearIT)(void);
+ void (*FilterConfig)(uint8_t);
+ void (*FilterCmd)(uint8_t);
+ void (*GetXYZ)(int16_t *);
+}ACCELERO_DrvTypeDef;
+/**
+ * @}
+ */
+
+/** @defgroup ACCELERO_Configuration_structure Accelerometer Configuration structure
+ * @{
+ */
+
+/* ACCELERO struct */
+typedef struct
+{
+ uint8_t Power_Mode; /* Power-down/Normal Mode */
+ uint8_t AccOutput_DataRate; /* OUT data rate */
+ uint8_t Axes_Enable; /* Axes enable */
+ uint8_t High_Resolution; /* High Resolution enabling/disabling */
+ uint8_t BlockData_Update; /* Block Data Update */
+ uint8_t Endianness; /* Endian Data selection */
+ uint8_t AccFull_Scale; /* Full Scale selection */
+ uint8_t Communication_Mode;
+}ACCELERO_InitTypeDef;
+
+/* ACCELERO High Pass Filter struct */
+typedef struct
+{
+ uint8_t HighPassFilter_Mode_Selection; /* Internal filter mode */
+ uint8_t HighPassFilter_CutOff_Frequency; /* High pass filter cut-off frequency */
+ uint8_t HighPassFilter_AOI1; /* HPF_enabling/disabling for AOI function on interrupt 1 */
+ uint8_t HighPassFilter_AOI2; /* HPF_enabling/disabling for AOI function on interrupt 2 */
+ uint8_t HighPassFilter_Data_Sel;
+ uint8_t HighPassFilter_Stat;
+}ACCELERO_FilterConfigTypeDef;
+
+/**
+ * @}
+ */
+
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __ACCELERO_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/P3_SETR2/Components/Common/audio.h b/P3_SETR2/Components/Common/audio.h
new file mode 100644
index 0000000..cd6f67d
--- /dev/null
+++ b/P3_SETR2/Components/Common/audio.h
@@ -0,0 +1,104 @@
+/**
+ ******************************************************************************
+ * @file audio.h
+ * @author MCD Application Team
+ * @brief This header file contains the common defines and functions prototypes
+ * for the Audio driver.
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2017 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __AUDIO_H
+#define __AUDIO_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include
+
+/** @addtogroup BSP
+ * @{
+ */
+
+/** @addtogroup Components
+ * @{
+ */
+
+/** @addtogroup AUDIO
+ * @{
+ */
+
+/** @defgroup AUDIO_Exported_Constants
+ * @{
+ */
+
+/* Codec audio Standards */
+#define CODEC_STANDARD 0x04
+#define I2S_STANDARD I2S_STANDARD_PHILIPS
+
+/**
+ * @}
+ */
+
+/** @defgroup AUDIO_Exported_Types
+ * @{
+ */
+
+/** @defgroup AUDIO_Driver_structure Audio Driver structure
+ * @{
+ */
+typedef struct
+{
+ uint32_t (*Init)(uint16_t, uint16_t, uint8_t, uint32_t);
+ void (*DeInit)(void);
+ uint32_t (*ReadID)(uint16_t);
+ uint32_t (*Play)(uint16_t, uint16_t*, uint16_t);
+ uint32_t (*Pause)(uint16_t);
+ uint32_t (*Resume)(uint16_t);
+ uint32_t (*Stop)(uint16_t, uint32_t);
+ uint32_t (*SetFrequency)(uint16_t, uint32_t);
+ uint32_t (*SetVolume)(uint16_t, uint8_t);
+ uint32_t (*SetMute)(uint16_t, uint32_t);
+ uint32_t (*SetOutputMode)(uint16_t, uint8_t);
+ uint32_t (*Reset)(uint16_t);
+}AUDIO_DrvTypeDef;
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __AUDIO_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/P3_SETR2/Components/Common/camera.h b/P3_SETR2/Components/Common/camera.h
new file mode 100644
index 0000000..70778b1
--- /dev/null
+++ b/P3_SETR2/Components/Common/camera.h
@@ -0,0 +1,123 @@
+/**
+ ******************************************************************************
+ * @file camera.h
+ * @author MCD Application Team
+ * @brief This header file contains the common defines and functions prototypes
+ * for the camera driver.
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2017 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __CAMERA_H
+#define __CAMERA_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include
+
+/** @addtogroup BSP
+ * @{
+ */
+
+/** @addtogroup Components
+ * @{
+ */
+
+/** @addtogroup CAMERA
+ * @{
+ */
+
+
+/** @defgroup CAMERA_Exported_Types
+ * @{
+ */
+
+/** @defgroup CAMERA_Driver_structure Camera Driver structure
+ * @{
+ */
+typedef struct
+{
+ void (*Init)(uint16_t, uint32_t);
+ uint16_t (*ReadID)(uint16_t);
+ void (*Config)(uint16_t, uint32_t, uint32_t, uint32_t);
+}CAMERA_DrvTypeDef;
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/** @defgroup CAMERA_Exported_Constants
+ * @{
+ */
+#define CAMERA_R160x120 0x00 /* QQVGA Resolution */
+#define CAMERA_R320x240 0x01 /* QVGA Resolution */
+#define CAMERA_R480x272 0x02 /* 480x272 Resolution */
+#define CAMERA_R640x480 0x03 /* VGA Resolution */
+
+#define CAMERA_CONTRAST_BRIGHTNESS 0x00 /* Camera contrast brightness features */
+#define CAMERA_BLACK_WHITE 0x01 /* Camera black white feature */
+#define CAMERA_COLOR_EFFECT 0x03 /* Camera color effect feature */
+
+#define CAMERA_BRIGHTNESS_LEVEL0 0x00 /* Brightness level -2 */
+#define CAMERA_BRIGHTNESS_LEVEL1 0x01 /* Brightness level -1 */
+#define CAMERA_BRIGHTNESS_LEVEL2 0x02 /* Brightness level 0 */
+#define CAMERA_BRIGHTNESS_LEVEL3 0x03 /* Brightness level +1 */
+#define CAMERA_BRIGHTNESS_LEVEL4 0x04 /* Brightness level +2 */
+
+#define CAMERA_CONTRAST_LEVEL0 0x05 /* Contrast level -2 */
+#define CAMERA_CONTRAST_LEVEL1 0x06 /* Contrast level -1 */
+#define CAMERA_CONTRAST_LEVEL2 0x07 /* Contrast level 0 */
+#define CAMERA_CONTRAST_LEVEL3 0x08 /* Contrast level +1 */
+#define CAMERA_CONTRAST_LEVEL4 0x09 /* Contrast level +2 */
+
+#define CAMERA_BLACK_WHITE_BW 0x00 /* Black and white effect */
+#define CAMERA_BLACK_WHITE_NEGATIVE 0x01 /* Negative effect */
+#define CAMERA_BLACK_WHITE_BW_NEGATIVE 0x02 /* BW and Negative effect */
+#define CAMERA_BLACK_WHITE_NORMAL 0x03 /* Normal effect */
+
+#define CAMERA_COLOR_EFFECT_NONE 0x00 /* No effects */
+#define CAMERA_COLOR_EFFECT_BLUE 0x01 /* Blue effect */
+#define CAMERA_COLOR_EFFECT_GREEN 0x02 /* Green effect */
+#define CAMERA_COLOR_EFFECT_RED 0x03 /* Red effect */
+#define CAMERA_COLOR_EFFECT_ANTIQUE 0x04 /* Antique effect */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __CAMERA_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/P3_SETR2/Components/Common/dpredriver.h b/P3_SETR2/Components/Common/dpredriver.h
new file mode 100644
index 0000000..a14f5c3
--- /dev/null
+++ b/P3_SETR2/Components/Common/dpredriver.h
@@ -0,0 +1,104 @@
+/**
+ ******************************************************************************
+ * @file dpredriver.h
+ * @author MCD Application Team
+ * @brief This header file contains the functions prototypes for the
+ * DisplayPort Linear Redriver.
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2017 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __DPREDRIVER_H
+#define __DPREDRIVER_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include
+
+/** @addtogroup BSP
+ * @{
+ */
+
+/** @addtogroup Components
+ * @{
+ */
+
+/** @addtogroup DPREDRIVER
+ * @{
+ */
+
+/** @defgroup DPREDRIVER_Exported_Types
+ * @{
+ */
+
+/** @defgroup DPREDRIVER_Channel_Identifier Channel Identifier
+ * @{
+ */
+ typedef enum {
+ CHANNEL_DP0 = 0,
+ CHANNEL_DP1,
+ CHANNEL_DP2,
+ CHANNEL_DP3,
+ CHANNEL_RX1,
+ CHANNEL_RX2,
+ CHANNEL_SSTX
+ } DPREDRIVER_ChannelId_t;
+/**
+ * @}
+ */
+
+ /** @defgroup DPREDRIVER_Driver_structure DisplayPort Linear Redriver Driver structure
+ * @{
+ */
+typedef struct
+{
+ uint32_t (*Init)(uint16_t);
+ void (*DeInit)(uint16_t);
+ uint32_t (*PowerOn)(uint16_t);
+ uint32_t (*PowerOff)(uint16_t);
+ uint32_t (*SetEQGain)(uint16_t, DPREDRIVER_ChannelId_t, uint8_t);
+ uint32_t (*EnableChannel)(uint16_t, DPREDRIVER_ChannelId_t);
+ uint32_t (*DisableChannel)(uint16_t, DPREDRIVER_ChannelId_t);
+}DPREDRIVER_Drv_t;
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __DPREDRIVER_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/P3_SETR2/Components/Common/epd.h b/P3_SETR2/Components/Common/epd.h
new file mode 100644
index 0000000..1af0373
--- /dev/null
+++ b/P3_SETR2/Components/Common/epd.h
@@ -0,0 +1,97 @@
+/**
+ ******************************************************************************
+ * @file epd.h
+ * @author MCD Application Team
+ * @brief This file contains all the functions prototypes for the
+ * EPD (E Paper Display) driver.
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2017 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __EPD_H
+#define __EPD_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include
+
+/** @addtogroup BSP
+ * @{
+ */
+
+/** @addtogroup Components
+ * @{
+ */
+
+/** @addtogroup Common
+ * @{
+ */
+
+/** @addtogroup EPD
+ * @{
+ */
+
+/** @defgroup EPD_Exported_Types
+ * @{
+ */
+
+/** @defgroup EPD_Driver_structure E Paper Display Driver structure
+ * @{
+ */
+typedef struct
+{
+ void (*Init)(void);
+ void (*WritePixel)(uint8_t);
+
+ /* Optimized operation */
+ void (*SetDisplayWindow)(uint16_t, uint16_t, uint16_t, uint16_t);
+ void (*RefreshDisplay)(void);
+ void (*CloseChargePump)(void);
+
+ uint16_t (*GetEpdPixelWidth)(void);
+ uint16_t (*GetEpdPixelHeight)(void);
+ void (*DrawImage)(uint16_t, uint16_t, uint16_t, uint16_t, uint8_t*);
+}
+EPD_DrvTypeDef;
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* EPD_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/P3_SETR2/Components/Common/gyro.h b/P3_SETR2/Components/Common/gyro.h
new file mode 100644
index 0000000..53ed668
--- /dev/null
+++ b/P3_SETR2/Components/Common/gyro.h
@@ -0,0 +1,127 @@
+/**
+ ******************************************************************************
+ * @file gyro.h
+ * @author MCD Application Team
+ * @brief This header file contains the functions prototypes for the gyroscope driver.
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2017 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __GYRO_H
+#define __GYRO_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include
+
+/** @addtogroup BSP
+ * @{
+ */
+
+/** @addtogroup Components
+ * @{
+ */
+
+/** @addtogroup GYRO
+ * @{
+ */
+
+/** @defgroup GYRO_Exported_Types
+ * @{
+ */
+
+/** @defgroup GYRO_Driver_structure Gyroscope Driver structure
+ * @{
+ */
+typedef struct
+{
+ void (*Init)(uint16_t);
+ void (*DeInit)(void);
+ uint8_t (*ReadID)(void);
+ void (*Reset)(void);
+ void (*LowPower)(uint16_t);
+ void (*ConfigIT)(uint16_t);
+ void (*EnableIT)(uint8_t);
+ void (*DisableIT)(uint8_t);
+ uint8_t (*ITStatus)(uint16_t, uint16_t);
+ void (*ClearIT)(uint16_t, uint16_t);
+ void (*FilterConfig)(uint8_t);
+ void (*FilterCmd)(uint8_t);
+ void (*GetXYZ)(float *);
+}GYRO_DrvTypeDef;
+/**
+ * @}
+ */
+
+/** @defgroup GYRO_Config_structure Gyroscope Configuration structure
+ * @{
+ */
+
+typedef struct
+{
+ uint8_t Power_Mode; /* Power-down/Sleep/Normal Mode */
+ uint8_t Output_DataRate; /* OUT data rate */
+ uint8_t Axes_Enable; /* Axes enable */
+ uint8_t Band_Width; /* Bandwidth selection */
+ uint8_t BlockData_Update; /* Block Data Update */
+ uint8_t Endianness; /* Endian Data selection */
+ uint8_t Full_Scale; /* Full Scale selection */
+}GYRO_InitTypeDef;
+
+/* GYRO High Pass Filter struct */
+typedef struct
+{
+ uint8_t HighPassFilter_Mode_Selection; /* Internal filter mode */
+ uint8_t HighPassFilter_CutOff_Frequency; /* High pass filter cut-off frequency */
+}GYRO_FilterConfigTypeDef;
+
+/*GYRO Interrupt struct */
+typedef struct
+{
+ uint8_t Latch_Request; /* Latch interrupt request into CLICK_SRC register */
+ uint8_t Interrupt_Axes; /* X, Y, Z Axes Interrupts */
+ uint8_t Interrupt_ActiveEdge; /* Interrupt Active edge */
+}GYRO_InterruptConfigTypeDef;
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __GYRO_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/P3_SETR2/Components/Common/hsensor.h b/P3_SETR2/Components/Common/hsensor.h
new file mode 100644
index 0000000..bd44bba
--- /dev/null
+++ b/P3_SETR2/Components/Common/hsensor.h
@@ -0,0 +1,83 @@
+/**
+ ******************************************************************************
+ * @file hsensor.h
+ * @author MCD Application Team
+ * @brief This header file contains the functions prototypes for the
+ * Humidity Sensor driver.
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2017 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __HSENSOR_H
+#define __HSENSOR_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include
+
+/** @addtogroup BSP
+ * @{
+ */
+
+/** @addtogroup Components
+ * @{
+ */
+
+/** @addtogroup HSENSOR
+ * @{
+ */
+
+/** @defgroup HSENSOR_Exported_Types
+ * @{
+ */
+
+/** @defgroup HSENSOR_Driver_structure Humidity Sensor Driver structure
+ * @{
+ */
+typedef struct
+{
+ void (*Init)(uint16_t);
+ uint8_t (*ReadID)(uint16_t);
+ float (*ReadHumidity)(uint16_t);
+}HSENSOR_DrvTypeDef;
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __HSENSOR_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/P3_SETR2/Components/Common/idd.h b/P3_SETR2/Components/Common/idd.h
new file mode 100644
index 0000000..40dfbcd
--- /dev/null
+++ b/P3_SETR2/Components/Common/idd.h
@@ -0,0 +1,150 @@
+/**
+ ******************************************************************************
+ * @file idd.h
+ * @author MCD Application Team
+ * @brief This file contains all the functions prototypes for the IDD driver.
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2017 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __IDD_H
+#define __IDD_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include
+
+/** @addtogroup BSP
+ * @{
+ */
+
+/** @addtogroup Components
+ * @{
+ */
+
+/** @addtogroup IDD
+ * @{
+ */
+
+/** @defgroup IDD_Exported_Types IDD Exported Types
+ * @{
+ */
+
+/** @defgroup IDD_Config_structure IDD Configuration structure
+ * @{
+ */
+typedef struct
+{
+ uint16_t AmpliGain; /*!< Specifies ampli gain value
+ */
+ uint16_t VddMin; /*!< Specifies minimum MCU VDD can reach to protect MCU from reset
+ */
+ uint16_t Shunt0Value; /*!< Specifies value of Shunt 0 if existing
+ */
+ uint16_t Shunt1Value; /*!< Specifies value of Shunt 1 if existing
+ */
+ uint16_t Shunt2Value; /*!< Specifies value of Shunt 2 if existing
+ */
+ uint16_t Shunt3Value; /*!< Specifies value of Shunt 3 if existing
+ */
+ uint16_t Shunt4Value; /*!< Specifies value of Shunt 4 if existing
+ */
+ uint16_t Shunt0StabDelay; /*!< Specifies delay of Shunt 0 stabilization if existing
+ */
+ uint16_t Shunt1StabDelay; /*!< Specifies delay of Shunt 1 stabilization if existing
+ */
+ uint16_t Shunt2StabDelay; /*!< Specifies delay of Shunt 2 stabilization if existing
+ */
+ uint16_t Shunt3StabDelay; /*!< Specifies delay of Shunt 3 stabilization if existing
+ */
+ uint16_t Shunt4StabDelay; /*!< Specifies delay of Shunt 4 stabilization if existing
+ */
+ uint8_t ShuntNbOnBoard; /*!< Specifies number of shunts that are present on board
+ This parameter can be a value of @ref IDD_shunt_number */
+ uint8_t ShuntNbUsed; /*!< Specifies number of shunts used for measurement
+ This parameter can be a value of @ref IDD_shunt_number */
+ uint8_t VrefMeasurement; /*!< Specifies if Vref is automatically measured before each Idd measurement
+ This parameter can be a value of @ref IDD_Vref_Measurement */
+ uint8_t Calibration; /*!< Specifies if calibration is done before each Idd measurement
+ */
+ uint8_t PreDelayUnit; /*!< Specifies Pre delay unit
+ This parameter can be a value of @ref IDD_PreDelay */
+ uint8_t PreDelayValue; /*!< Specifies Pre delay value in selected unit
+ */
+ uint8_t MeasureNb; /*!< Specifies number of Measure to be performed
+ This parameter can be a value between 1 and 256 */
+ uint8_t DeltaDelayUnit; /*!< Specifies Delta delay unit
+ This parameter can be a value of @ref IDD_DeltaDelay */
+ uint8_t DeltaDelayValue; /*!< Specifies Delta delay between 2 measures
+ value can be between 1 and 128 */
+}IDD_ConfigTypeDef;
+/**
+ * @}
+ */
+
+/** @defgroup IDD_Driver_structure IDD Driver structure
+ * @{
+ */
+typedef struct
+{
+ void (*Init)(uint16_t);
+ void (*DeInit)(uint16_t);
+ uint16_t (*ReadID)(uint16_t);
+ void (*Reset)(uint16_t);
+ void (*LowPower)(uint16_t);
+ void (*WakeUp)(uint16_t);
+ void (*Start)(uint16_t);
+ void (*Config)(uint16_t,IDD_ConfigTypeDef);
+ void (*GetValue)(uint16_t, uint32_t *);
+ void (*EnableIT)(uint16_t);
+ void (*ClearIT)(uint16_t);
+ uint8_t (*GetITStatus)(uint16_t);
+ void (*DisableIT)(uint16_t);
+ void (*ErrorEnableIT)(uint16_t);
+ void (*ErrorClearIT)(uint16_t);
+ uint8_t (*ErrorGetITStatus)(uint16_t);
+ void (*ErrorDisableIT)(uint16_t);
+ uint8_t (*ErrorGetSrc)(uint16_t);
+ uint8_t (*ErrorGetCode)(uint16_t);
+}IDD_DrvTypeDef;
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __IDD_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/P3_SETR2/Components/Common/io.h b/P3_SETR2/Components/Common/io.h
new file mode 100644
index 0000000..4989e58
--- /dev/null
+++ b/P3_SETR2/Components/Common/io.h
@@ -0,0 +1,132 @@
+/**
+ ******************************************************************************
+ * @file io.h
+ * @author MCD Application Team
+ * @brief This file contains all the functions prototypes for the IO driver.
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2017 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __IO_H
+#define __IO_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include
+
+/** @addtogroup BSP
+ * @{
+ */
+
+/** @addtogroup Components
+ * @{
+ */
+
+/** @addtogroup IO
+ * @{
+ */
+
+/** @defgroup IO_Exported_Types
+ * @{
+ */
+
+/**
+ * @brief IO Bit SET and Bit RESET enumeration
+ */
+typedef enum
+{
+ IO_PIN_RESET = 0,
+ IO_PIN_SET
+}IO_PinState;
+
+typedef enum
+{
+ IO_MODE_INPUT = 0, /* input floating */
+ IO_MODE_OUTPUT, /* output Push Pull */
+ IO_MODE_IT_RISING_EDGE, /* float input - irq detect on rising edge */
+ IO_MODE_IT_FALLING_EDGE, /* float input - irq detect on falling edge */
+ IO_MODE_IT_LOW_LEVEL, /* float input - irq detect on low level */
+ IO_MODE_IT_HIGH_LEVEL, /* float input - irq detect on high level */
+ /* following modes only available on MFX*/
+ IO_MODE_ANALOG, /* analog mode */
+ IO_MODE_OFF, /* when pin isn't used*/
+ IO_MODE_INPUT_PU, /* input with internal pull up resistor */
+ IO_MODE_INPUT_PD, /* input with internal pull down resistor */
+ IO_MODE_OUTPUT_OD, /* Open Drain output without internal resistor */
+ IO_MODE_OUTPUT_OD_PU, /* Open Drain output with internal pullup resistor */
+ IO_MODE_OUTPUT_OD_PD, /* Open Drain output with internal pulldown resistor */
+ IO_MODE_OUTPUT_PP, /* PushPull output without internal resistor */
+ IO_MODE_OUTPUT_PP_PU, /* PushPull output with internal pullup resistor */
+ IO_MODE_OUTPUT_PP_PD, /* PushPull output with internal pulldown resistor */
+ IO_MODE_IT_RISING_EDGE_PU, /* push up resistor input - irq on rising edge */
+ IO_MODE_IT_RISING_EDGE_PD, /* push dw resistor input - irq on rising edge */
+ IO_MODE_IT_FALLING_EDGE_PU, /* push up resistor input - irq on falling edge */
+ IO_MODE_IT_FALLING_EDGE_PD, /* push dw resistor input - irq on falling edge */
+ IO_MODE_IT_LOW_LEVEL_PU, /* push up resistor input - irq detect on low level */
+ IO_MODE_IT_LOW_LEVEL_PD, /* push dw resistor input - irq detect on low level */
+ IO_MODE_IT_HIGH_LEVEL_PU, /* push up resistor input - irq detect on high level */
+ IO_MODE_IT_HIGH_LEVEL_PD, /* push dw resistor input - irq detect on high level */
+
+}IO_ModeTypedef;
+
+/** @defgroup IO_Driver_structure IO Driver structure
+ * @{
+ */
+typedef struct
+{
+ void (*Init)(uint16_t);
+ uint16_t (*ReadID)(uint16_t);
+ void (*Reset)(uint16_t);
+
+ void (*Start)(uint16_t, uint32_t);
+ uint8_t (*Config)(uint16_t, uint32_t, IO_ModeTypedef);
+ void (*WritePin)(uint16_t, uint32_t, uint8_t);
+ uint32_t (*ReadPin)(uint16_t, uint32_t);
+
+ void (*EnableIT)(uint16_t);
+ void (*DisableIT)(uint16_t);
+ uint32_t (*ITStatus)(uint16_t, uint32_t);
+ void (*ClearIT)(uint16_t, uint32_t);
+
+}IO_DrvTypeDef;
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __IO_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/P3_SETR2/Components/Common/lcd.h b/P3_SETR2/Components/Common/lcd.h
new file mode 100644
index 0000000..fc07557
--- /dev/null
+++ b/P3_SETR2/Components/Common/lcd.h
@@ -0,0 +1,96 @@
+/**
+ ******************************************************************************
+ * @file lcd.h
+ * @author MCD Application Team
+ * @brief This file contains all the functions prototypes for the LCD driver.
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2017 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __LCD_H
+#define __LCD_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include
+
+/** @addtogroup BSP
+ * @{
+ */
+
+/** @addtogroup Components
+ * @{
+ */
+
+/** @addtogroup LCD
+ * @{
+ */
+
+/** @defgroup LCD_Exported_Types
+ * @{
+ */
+
+/** @defgroup LCD_Driver_structure LCD Driver structure
+ * @{
+ */
+typedef struct
+{
+ void (*Init)(void);
+ uint16_t (*ReadID)(void);
+ void (*DisplayOn)(void);
+ void (*DisplayOff)(void);
+ void (*SetCursor)(uint16_t, uint16_t);
+ void (*WritePixel)(uint16_t, uint16_t, uint16_t);
+ uint16_t (*ReadPixel)(uint16_t, uint16_t);
+
+ /* Optimized operation */
+ void (*SetDisplayWindow)(uint16_t, uint16_t, uint16_t, uint16_t);
+ void (*DrawHLine)(uint16_t, uint16_t, uint16_t, uint16_t);
+ void (*DrawVLine)(uint16_t, uint16_t, uint16_t, uint16_t);
+
+ uint16_t (*GetLcdPixelWidth)(void);
+ uint16_t (*GetLcdPixelHeight)(void);
+ void (*DrawBitmap)(uint16_t, uint16_t, uint8_t*);
+ void (*DrawRGBImage)(uint16_t, uint16_t, uint16_t, uint16_t, uint8_t*);
+}LCD_DrvTypeDef;
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __LCD_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/P3_SETR2/Components/Common/magneto.h b/P3_SETR2/Components/Common/magneto.h
new file mode 100644
index 0000000..c9766a5
--- /dev/null
+++ b/P3_SETR2/Components/Common/magneto.h
@@ -0,0 +1,107 @@
+/**
+ ******************************************************************************
+ * @file magneto.h
+ * @author MCD Application Team
+ * @brief This header file contains the functions prototypes for the MAGNETO driver.
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2017 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __MAGNETO_H
+#define __MAGNETO_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include
+
+/** @addtogroup BSP
+ * @{
+ */
+
+/** @addtogroup Components
+ * @{
+ */
+
+/** @addtogroup MAGNETO
+ * @{
+ */
+
+/** @defgroup MAGNETO_Exported_Types
+ * @{
+ */
+
+/** @defgroup MAGNETO_Config_structure Magnetometer Configuration structure
+ * @{
+ */
+typedef struct
+{
+ uint8_t Register1;
+ uint8_t Register2;
+ uint8_t Register3;
+ uint8_t Register4;
+ uint8_t Register5;
+}MAGNETO_InitTypeDef;
+/**
+ * @}
+ */
+
+/** @defgroup MAGNETO_Driver_structure Magnetometer Driver structure
+ * @{
+ */
+typedef struct
+{
+ void (*Init)(MAGNETO_InitTypeDef);
+ void (*DeInit)(void);
+ uint8_t (*ReadID)(void);
+ void (*Reset)(void);
+ void (*LowPower)(uint16_t);
+ void (*ConfigIT)(void);
+ void (*EnableIT)(uint8_t);
+ void (*DisableIT)(uint8_t);
+ uint8_t (*ITStatus)(uint16_t);
+ void (*ClearIT)(void);
+ void (*FilterConfig)(uint8_t);
+ void (*FilterCmd)(uint8_t);
+ void (*GetXYZ)(int16_t *);
+}MAGNETO_DrvTypeDef;
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAGNETO_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/P3_SETR2/Components/Common/psensor.h b/P3_SETR2/Components/Common/psensor.h
new file mode 100644
index 0000000..3412ab1
--- /dev/null
+++ b/P3_SETR2/Components/Common/psensor.h
@@ -0,0 +1,83 @@
+/**
+ ******************************************************************************
+ * @file psensor.h
+ * @author MCD Application Team
+ * @brief This header file contains the functions prototypes for the
+ * Pressure Sensor driver.
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2017 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __PSENSOR_H
+#define __PSENSOR_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include
+
+/** @addtogroup BSP
+ * @{
+ */
+
+/** @addtogroup Components
+ * @{
+ */
+
+/** @addtogroup PSENSOR
+ * @{
+ */
+
+/** @defgroup PSENSOR_Exported_Types
+ * @{
+ */
+
+/** @defgroup PSENSOR_Driver_structure Pressure Sensor Driver structure
+ * @{
+ */
+typedef struct
+{
+ void (*Init)(uint16_t);
+ uint8_t (*ReadID)(uint16_t);
+ float (*ReadPressure)(uint16_t);
+}PSENSOR_DrvTypeDef;
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __PSENSOR_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/P3_SETR2/Components/Common/pwrmon.h b/P3_SETR2/Components/Common/pwrmon.h
new file mode 100644
index 0000000..12b0285
--- /dev/null
+++ b/P3_SETR2/Components/Common/pwrmon.h
@@ -0,0 +1,246 @@
+/**
+ ******************************************************************************
+ * @file pwrmon.h
+ * @author MCD Application Team
+ * @brief This header file contains the functions prototypes for the
+ * Current/Power Monitor device driver.
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2017 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __PWRMON_H
+#define __PWRMON_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include
+
+/** @addtogroup BSP
+ * @{
+ */
+
+/** @addtogroup Components
+ * @{
+ */
+
+/** @addtogroup PWRMON
+ * @{
+ */
+
+/** @defgroup PWRMON_Exported_Types
+ * @{
+ */
+
+/** @defgroup PWRMON_Operating_Mode_enum Power Monitor Operating Mode enums
+ * @{
+ */
+typedef enum {
+ OPERATING_MODE_TRIGGERED = 0,
+ OPERATING_MODE_CONTINUOUS,
+ OPERATING_MODE_NB
+} PWRMON_OperatingMode_t;
+/**
+ * @}
+ */
+
+/** @defgroup PWRMON_Conversion_Time_enum Power Monitor Conversion_Time enums
+ * @{
+ */
+typedef enum {
+ CONVERT_TIME_140 = 0,
+ CONVERT_TIME_204,
+ CONVERT_TIME_332,
+ CONVERT_TIME_588,
+ CONVERT_TIME_1100,
+ CONVERT_TIME_2116,
+ CONVERT_TIME_4156,
+ CONVERT_TIME_8244,
+ CONVERT_TIME_NB
+} PWRMON_ConvertTime_t;
+/**
+ * @}
+ */
+
+/** @defgroup PWRMON_Conversion_Time_enum Power Monitor Conversion_Time enums
+ * @{
+ */
+typedef enum {
+ AVERAGING_MODE_1 = 0,
+ AVERAGING_MODE_4,
+ AVERAGING_MODE_16,
+ AVERAGING_MODE_64,
+ AVERAGING_MODE_128,
+ AVERAGING_MODE_256,
+ AVERAGING_MODE_512,
+ AVERAGING_MODE_1024,
+ AVERAGING_MODE_NB
+} PWRMON_AveragingMode_t;
+/**
+ * @}
+ */
+
+/** @defgroup PWRMON_Device_Configuration_structure Power Monitor Device Configuration structure
+ * @{
+ */
+typedef struct
+{
+ PWRMON_ConvertTime_t ShuntConvertTime;
+ PWRMON_ConvertTime_t BusConvertTime;
+ PWRMON_AveragingMode_t AveragingMode;
+} PWRMON_Config_t;
+/**
+ * @}
+ */
+
+/** @defgroup PWRMON_Alert_Polarity_enum Power Monitor Alert Polarity enums
+ * @{
+ */
+typedef enum {
+ ALERT_POLARITY_NORMAL = 0,
+ ALERT_POLARITY_INVERTED,
+ ALERT_POLARITY_NB
+} PWRMON_AlertPolarity_t;
+/**
+ * @}
+ */
+
+/** @defgroup PWRMON_Alert_Latch_Enable_enum Power Monitor Alert Latch Enable enums
+ * @{
+ */
+typedef enum {
+ ALERT_LATCH_DISABLE = 0,
+ ALERT_LATCH_ENABLE,
+ ALERT_LATCH_NB
+} PWRMON_AlertLatchEnable_t;
+/**
+ * @}
+ */
+
+/** @defgroup PWRMON_Alert_Function_enum Power Monitor Alert Function enums
+ * @{
+ */
+typedef enum {
+ ALERT_FUNCTION_NONE = 0,
+ ALERT_FUNCTION_SOL,
+ ALERT_FUNCTION_SUL,
+ ALERT_FUNCTION_BOL,
+ ALERT_FUNCTION_BUL,
+ ALERT_FUNCTION_POL,
+ ALERT_FUNCTION_NB,
+} PWRMON_AlertFunction_t;
+/**
+ * @}
+ */
+
+/** @defgroup PWRMON_Alert_Configuration_structure Power Monitor Alert Configuration structure
+ * @{
+ */
+typedef struct
+{
+ PWRMON_AlertPolarity_t Polarity;
+ PWRMON_AlertLatchEnable_t LatchEnable;
+} PWRMON_AlertPinConfig_t;
+/**
+ * @}
+ */
+
+/** @defgroup PWRMON_Voltage_Input_enum Power Monitor Voltage Input enums
+ * @{
+ */
+typedef enum {
+ VOLTAGE_INPUT_SHUNT = 0,
+ VOLTAGE_INPUT_BUS,
+ VOLTAGE_INPUT_ALL,
+ VOLTAGE_INPUT_NB
+} PWRMON_InputSignal_t;
+/**
+ * @}
+ */
+
+/** @defgroup PWRMON_Flag_enum Power Monitor Flag enums
+ * @{
+ */
+typedef enum {
+ FLAG_ALERT_FUNCTION = 0,
+ FLAG_CONVERSION_READY,
+ FLAG_MATH_OVERFLOW,
+ FLAG_NB
+} PWRMON_Flag_t;
+/**
+ * @}
+ */
+
+/** @defgroup PWRMON_Driver_structure Power Monitor Driver structure
+ * @{
+ */
+typedef struct
+{
+void (*Init)(uint16_t, PWRMON_Config_t *);
+void (*DeInit)(uint16_t);
+uint16_t (*ReadId)(uint16_t);
+void (*Reset)(uint16_t);
+void (*SetCalibration)(uint16_t, uint16_t);
+uint16_t (*GetCalibration)(uint16_t);
+void (*SetAlertFunction)(uint16_t, PWRMON_AlertFunction_t);
+PWRMON_AlertFunction_t (*GetAlertFunction)(uint16_t);
+void (*AlertPinConfig)(uint16_t, PWRMON_AlertPinConfig_t *);
+void (*SetVBusThreshold)(uint16_t, uint16_t);
+uint16_t (*GetVBusThreshold)(uint16_t);
+void (*SetVShuntThreshold)(uint16_t, int16_t);
+int16_t (*GetVShuntThreshold)(uint16_t);
+void (*SetPowerThreshold)(uint16_t, uint32_t);
+uint32_t (*GetPowerThreshold)(uint16_t);
+void (*AlertThresholdEnableIT)(uint16_t);
+void (*AlertThresholdDisableIT)(uint16_t);
+void (*ConversionReadyEnableIT)(uint16_t);
+void (*ConversionReadyDisableIT)(uint16_t);
+void (*StartConversion)(uint16_t, PWRMON_InputSignal_t, PWRMON_OperatingMode_t);
+void (*StopConversion)(uint16_t);
+uint16_t (*GetVBus)(uint16_t);
+int16_t (*GetVShunt)(uint16_t);
+uint16_t (*GetPower)(uint16_t);
+int16_t (*GetCurrent)(uint16_t);
+uint8_t (*GetFlag)(uint16_t, PWRMON_Flag_t);
+} PWRMON_Drv_t;
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __PWRMON_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/P3_SETR2/Components/Common/ts.h b/P3_SETR2/Components/Common/ts.h
new file mode 100644
index 0000000..8016be8
--- /dev/null
+++ b/P3_SETR2/Components/Common/ts.h
@@ -0,0 +1,89 @@
+/**
+ ******************************************************************************
+ * @file ts.h
+ * @author MCD Application Team
+ * @brief This file contains all the functions prototypes for the Touch Screen driver.
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2017 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __TS_H
+#define __TS_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include
+
+/** @addtogroup BSP
+ * @{
+ */
+
+/** @addtogroup Components
+ * @{
+ */
+
+/** @addtogroup TS
+ * @{
+ */
+
+/** @defgroup TS_Exported_Types
+ * @{
+ */
+
+/** @defgroup TS_Driver_structure Touch Sensor Driver structure
+ * @{
+ */
+typedef struct
+{
+ void (*Init)(uint16_t);
+ uint16_t (*ReadID)(uint16_t);
+ void (*Reset)(uint16_t);
+ void (*Start)(uint16_t);
+ uint8_t (*DetectTouch)(uint16_t);
+ void (*GetXY)(uint16_t, uint16_t*, uint16_t*);
+ void (*EnableIT)(uint16_t);
+ void (*ClearIT)(uint16_t);
+ uint8_t (*GetITStatus)(uint16_t);
+ void (*DisableIT)(uint16_t);
+}TS_DrvTypeDef;
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __TS_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/P3_SETR2/Components/Common/tsensor.h b/P3_SETR2/Components/Common/tsensor.h
new file mode 100644
index 0000000..23b6c6d
--- /dev/null
+++ b/P3_SETR2/Components/Common/tsensor.h
@@ -0,0 +1,100 @@
+/**
+ ******************************************************************************
+ * @file tsensor.h
+ * @author MCD Application Team
+ * @brief This header file contains the functions prototypes for the
+ * Temperature Sensor driver.
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2017 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __TSENSOR_H
+#define __TSENSOR_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include
+
+/** @addtogroup BSP
+ * @{
+ */
+
+/** @addtogroup Components
+ * @{
+ */
+
+/** @addtogroup TSENSOR
+ * @{
+ */
+
+/** @defgroup TSENSOR_Exported_Types
+ * @{
+ */
+
+/** @defgroup TSENSOR_Config_structure Temperature Sensor Configuration structure
+ * @{
+ */
+typedef struct
+{
+ uint8_t AlertMode; /* Alert Mode Temperature out of range*/
+ uint8_t ConversionMode; /* Continuous/One Shot Mode */
+ uint8_t ConversionResolution; /* Temperature Resolution */
+ uint8_t ConversionRate; /* Number of measure per second */
+ int8_t TemperatureLimitHigh; /* High Temperature Limit Range */
+ int8_t TemperatureLimitLow; /* Low Temperature Limit Range */
+}TSENSOR_InitTypeDef;
+/**
+ * @}
+ */
+
+/** @defgroup TSENSOR_Driver_structure Temperature Sensor Driver structure
+ * @{
+ */
+typedef struct
+{
+ void (*Init)(uint16_t, TSENSOR_InitTypeDef *);
+ uint8_t (*IsReady)(uint16_t, uint32_t);
+ uint8_t (*ReadStatus)(uint16_t);
+ float (*ReadTemp)(uint16_t);
+}TSENSOR_DrvTypeDef;
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __TSENSOR_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/P3_SETR2/Components/Common/usbtypecswitch.h b/P3_SETR2/Components/Common/usbtypecswitch.h
new file mode 100644
index 0000000..3733c8f
--- /dev/null
+++ b/P3_SETR2/Components/Common/usbtypecswitch.h
@@ -0,0 +1,114 @@
+/**
+ ******************************************************************************
+ * @file usbtypecswitch.h
+ * @author MCD Application Team
+ * @brief This header file contains the functions prototypes for the
+ * crossbar switch device for USB Type-C systems.
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2017 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __USBTYPECSWITCH_H
+#define __USBTYPECSWITCH_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include
+
+/** @addtogroup BSP
+ * @{
+ */
+
+/** @addtogroup Components
+ * @{
+ */
+
+/** @addtogroup TYPECSWITCH
+ * @{
+ */
+
+/** @defgroup TYPECSWITCH_Exported_Types
+ * @{
+ */
+ typedef enum {
+ USB_NORMAL = 0,
+ USB_FLIPPED,
+ DFP_D_PIN_ASSIGNMENT_A_NORMAL,
+ DFP_D_PIN_ASSIGNMENT_A_FLIPPED,
+ DFP_D_PIN_ASSIGNMENT_B_NORMAL,
+ DFP_D_PIN_ASSIGNMENT_B_FLIPPED,
+ DFP_D_PIN_ASSIGNMENT_C_NORMAL,
+ DFP_D_PIN_ASSIGNMENT_C_FLIPPED,
+ DFP_D_PIN_ASSIGNMENT_D_NORMAL,
+ DFP_D_PIN_ASSIGNMENT_D_FLIPPED,
+ DFP_D_PIN_ASSIGNMENT_E_NORMAL,
+ DFP_D_PIN_ASSIGNMENT_E_FLIPPED,
+ DFP_D_PIN_ASSIGNMENT_F_NORMAL,
+ DFP_D_PIN_ASSIGNMENT_F_FLIPPED,
+ UFP_D_PIN_ASSIGNMENT_A_NORMAL,
+ UFP_D_PIN_ASSIGNMENT_A_FLIPPED,
+ UFP_D_PIN_ASSIGNMENT_B_NORMAL,
+ UFP_D_PIN_ASSIGNMENT_B_FLIPPED,
+ UFP_D_PIN_ASSIGNMENT_C_NORMAL,
+ UFP_D_PIN_ASSIGNMENT_C_FLIPPED,
+ UFP_D_PIN_ASSIGNMENT_D_NORMAL,
+ UFP_D_PIN_ASSIGNMENT_D_FLIPPED,
+ UFP_D_PIN_ASSIGNMENT_E_NORMAL,
+ UFP_D_PIN_ASSIGNMENT_E_FLIPPED,
+ UFP_D_PIN_ASSIGNMENT_F_NORMAL,
+ UFP_D_PIN_ASSIGNMENT_F_FLIPPED
+ } TYPECSWITCH_Mode_t;
+
+/** @defgroup TYPECSWITCH_Driver_structure USB Type-C Crossbar Switch Driver structure
+ * @{
+ */
+typedef struct
+{
+ uint32_t (*Init)(uint16_t);
+ void (*DeInit)(uint16_t);
+ uint32_t (*PowerOn)(uint16_t);
+ uint32_t (*PowerOff)(uint16_t);
+ uint32_t (*SetMode)(uint16_t, TYPECSWITCH_Mode_t);
+ uint32_t (*IsSupportedMode)(TYPECSWITCH_Mode_t);
+} TYPECSWITCH_Drv_t;
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __USBTYPECSWITCH_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/P3_SETR2/Components/cs42l51/Release_Notes.html b/P3_SETR2/Components/cs42l51/Release_Notes.html
new file mode 100644
index 0000000..adf5e25
--- /dev/null
+++ b/P3_SETR2/Components/cs42l51/Release_Notes.html
@@ -0,0 +1,65 @@
+
+
+
+
+
+
+ Release Notes for CS42L51 Component Drivers
+
+
+
+
+
+
+
+
+
+
+Release Notes for CS42L51 Component Drivers
+Copyright © 2017 STMicroelectronics
+
+
+
+
+
+
License
+
Licensed by ST under BSD 3-Clause license (the "License"). You may not use this package except in compliance with the License. You may obtain a copy of the License at:
+
https://opensource.org/licenses/BSD-3-Clause
+
Purpose
+
This directory contains the CS42L51 component drivers.
+
+
+
Update History
+
+
V1.0.1 / 03-April-2019
+
+
Main Changes
+
+Update release notes format
+Reformat the BSD 3-Clause license declaration in the files header (replace license terms by a web reference to OSI website where those terms lie)
+
+
+
+
+
V1.0.0 / 17-February-2017
+
+
Main Changes
+
+First official release of CS42L51 Audio codec Component driver
+
+
+
+
+
+
+
+
diff --git a/P3_SETR2/Components/cs42l51/cs42l51.c b/P3_SETR2/Components/cs42l51/cs42l51.c
new file mode 100644
index 0000000..5fe720b
--- /dev/null
+++ b/P3_SETR2/Components/cs42l51/cs42l51.c
@@ -0,0 +1,504 @@
+/**
+ ******************************************************************************
+ * @file cs42l51.c
+ * @author MCD Application Team
+ * @brief This file provides the CS42L51 Audio Codec driver.
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2017 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/* Includes ------------------------------------------------------------------*/
+#include "cs42l51.h"
+
+/** @addtogroup BSP
+ * @{
+ */
+
+/** @addtogroup Components
+ * @{
+ */
+
+/** @addtogroup CS42L51
+ * @brief This file provides a set of functions needed to drive the
+ * CS42L51 audio codec.
+ * @{
+ */
+
+/** @defgroup CS42L51_Exported_Variables
+ * @{
+ */
+
+/* Audio codec driver structure initialization */
+AUDIO_DrvTypeDef cs42l51_drv =
+{
+ cs42l51_Init,
+ cs42l51_DeInit,
+ cs42l51_ReadID,
+
+ cs42l51_Play,
+ cs42l51_Pause,
+ cs42l51_Resume,
+ cs42l51_Stop,
+
+ cs42l51_SetFrequency,
+ cs42l51_SetVolume,
+ cs42l51_SetMute,
+ cs42l51_SetOutputMode,
+ cs42l51_Reset,
+};
+
+/**
+ * @}
+ */
+
+/** @defgroup CS42L51_Private_Types
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @defgroup CS42L51_Private_Defines
+ * @{
+ */
+/* Uncomment this line to enable verifying data sent to codec after each write
+ operation (for debug purpose) */
+#if !defined (VERIFY_WRITTENDATA)
+#define VERIFY_WRITTENDATA
+#endif /* VERIFY_WRITTENDATA */
+/**
+ * @}
+ */
+
+/** @defgroup CS42L51_Private_Macros
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @defgroup CS42L51_Private_Variables
+ * @{
+ */
+
+static uint8_t Is_CS42L51_Initialized = 0;
+static uint8_t Is_CS42L51_Stop = 1;
+
+static uint16_t CS42L51_Device = OUTPUT_DEVICE_HEADPHONE;
+
+/**
+ * @}
+ */
+
+/** @defgroup CS42L51_Private_Functions
+ * @{
+ */
+static uint8_t CODEC_IO_Write(uint8_t Addr, uint8_t Reg, uint8_t Value);
+/**
+ * @}
+ */
+
+/** @addtogroup CS42L51_Exported_Functions
+ * @{
+ */
+
+/**
+ * @brief Initialize the audio codec and the control interface.
+ * @param DeviceAddr: Device address on communication bus.
+ * @param Device: Can be combination values of OUTPUT_DEVICE_HEADPHONE and
+ * INPUT_DEVICE_MIC1.
+ * @param Volume: Initial output volume level (from 0 (-100dB) to 100 (0dB)).
+ * @param AudioFreq: Initial audio frequency (currently not used).
+ * @retval 0 if correct communication, else wrong communication.
+ */
+uint32_t cs42l51_Init(uint16_t DeviceAddr, uint16_t Device, uint8_t Volume, uint32_t AudioFreq)
+{
+ uint32_t counter = 0;
+ uint8_t Value;
+
+ /* Check if codec is already initialized */
+ if(Is_CS42L51_Initialized == 0)
+ {
+ /* Initialize the Control interface of the Audio Codec */
+ AUDIO_IO_Init();
+
+ Is_CS42L51_Initialized = 1;
+ }
+ else
+ {
+ /* Set all power down bits to 1 exept PDN to mute ADCs and DACs*/
+ counter += CODEC_IO_Write(DeviceAddr, 0x02, 0x7E);
+ Value = AUDIO_IO_Read(DeviceAddr, 0x03);
+ counter += CODEC_IO_Write(DeviceAddr, 0x03, (Value | 0x0E));
+
+ /* Disable zero cross and soft ramp */
+ Value = AUDIO_IO_Read(DeviceAddr, 0x09);
+ counter += CODEC_IO_Write(DeviceAddr, 0x09, (Value & 0xFC));
+
+ /* Power control : Enter standby (PDN = 1) */
+ Value = AUDIO_IO_Read(DeviceAddr, 0x02);
+ counter += CODEC_IO_Write(DeviceAddr, 0x02, (Value | 0x01));
+ }
+
+ /* Mic Power and Speed Control : Auto detect on, Speed mode SSM, tri state off, MCLK divide by 2 off */
+ Value = AUDIO_IO_Read(DeviceAddr, 0x03);
+ counter += CODEC_IO_Write(DeviceAddr, 0x03, ((Value & 0x0E) | 0xA0));
+
+ /* Interface control : Loopback off, Slave, I2S (SDIN and SOUT), Digital mix off, Mic mix off */
+ counter += CODEC_IO_Write(DeviceAddr, 0x04, 0x0C);
+
+ /* Mic control : ADC single volume off, ADCB boost off, ADCA boost off, MicBias on AIN3B/MICIN2 pin, MicBias level 0.8xVA, MICB boost 16db, MICA boost 16dB */
+ counter += CODEC_IO_Write(DeviceAddr, 0x05, 0x00);
+
+ /* ADC control : ADCB HPF off, ADCB HPF freeze off, ADCA HPF off, ADCA HPF freeze off, Soft ramp B off, Zero cross B off, Soft ramp A off, Zero cross A off */
+ counter += CODEC_IO_Write(DeviceAddr, 0x06, 0x00);
+
+ /* ADC Input Select, Invert and Mute : AIN1B to PGAB, AIN3A to PreAmp to PGAA, ADCB invert off, ADCA invert off, ADCB mute on, ADCA mute off */
+ counter += CODEC_IO_Write(DeviceAddr, 0x07, 0x32);
+
+ /* DAC output control : HP Gain to 1, Single volume control off, PCM invert signals polarity off, DAC channels mute on */
+ counter += CODEC_IO_Write(DeviceAddr, 0x08, 0xC3);
+
+ /* DAC control : Signal processing to DAC, Freeze off, De-emphasis off, Analog output auto mute off, DAC soft ramp */
+ counter += CODEC_IO_Write(DeviceAddr, 0x09, 0x42);
+
+ /* ALCA and PGAA Control : ALCA soft ramp disable on, ALCA zero cross disable on, PGA A Gain 0dB */
+ counter += CODEC_IO_Write(DeviceAddr, 0x0A, 0xC0);
+
+ /* ALCB and PGAB Control : ALCB soft ramp disable on, ALCB zero cross disable on, PGA B Gain 0dB */
+ counter += CODEC_IO_Write(DeviceAddr, 0x0B, 0xC0);
+
+ /* ADCA Attenuator : 0dB */
+ counter += CODEC_IO_Write(DeviceAddr, 0x0C, 0x00);
+
+ /* ADCB Attenuator : 0dB */
+ counter += CODEC_IO_Write(DeviceAddr, 0x0D, 0x00);
+
+ /* ADCA mixer volume control : ADCA mixer channel mute on, ADCA mixer volume 0dB */
+ counter += CODEC_IO_Write(DeviceAddr, 0x0E, 0x80);
+
+ /* ADCB mixer volume control : ADCB mixer channel mute on, ADCB mixer volume 0dB */
+ counter += CODEC_IO_Write(DeviceAddr, 0x0F, 0x80);
+
+ /* PCMA mixer volume control : PCMA mixer channel mute off, PCMA mixer volume 0dB */
+ counter += CODEC_IO_Write(DeviceAddr, 0x10, 0x00);
+
+ /* PCMB mixer volume control : PCMB mixer channel mute off, PCMB mixer volume 0dB */
+ counter += CODEC_IO_Write(DeviceAddr, 0x11, 0x00);
+
+ /* PCM channel mixer : AOUTA Left, AOUTB Right */
+ counter += CODEC_IO_Write(DeviceAddr, 0x18, 0x00);
+
+ if(Device & OUTPUT_DEVICE_HEADPHONE)
+ {
+ Value = VOLUME_CONVERT(Volume);
+ /* AOUTA volume control : AOUTA volume */
+ counter += CODEC_IO_Write(DeviceAddr, 0x16, Value);
+ /* AOUTB volume control : AOUTB volume */
+ counter += CODEC_IO_Write(DeviceAddr, 0x17, Value);
+ }
+
+ /* Store device */
+ CS42L51_Device = Device;
+
+ /* Return communication control value */
+ return counter;
+}
+
+/**
+ * @brief Deinitialize the audio codec.
+ * @param None
+ * @retval None
+ */
+void cs42l51_DeInit(void)
+{
+ /* Deinitialize Audio Codec interface */
+ AUDIO_IO_DeInit();
+
+ Is_CS42L51_Initialized = 0;
+}
+
+/**
+ * @brief Get the CS42L51 ID.
+ * @param DeviceAddr: Device address on communication Bus.
+ * @retval The CS42L51 ID
+ */
+uint32_t cs42l51_ReadID(uint16_t DeviceAddr)
+{
+ uint8_t Value;
+
+ if(Is_CS42L51_Initialized == 0)
+ {
+ /* Initialize the Control interface of the Audio Codec */
+ AUDIO_IO_Init();
+
+ Value = AUDIO_IO_Read(DeviceAddr, CS42L51_CHIPID_ADDR);
+ Value = (Value & CS42L51_ID_MASK);
+
+ /* Deinitialize Audio Codec interface */
+ AUDIO_IO_DeInit();
+ }
+ else
+ {
+ Value = AUDIO_IO_Read(DeviceAddr, CS42L51_CHIPID_ADDR);
+ Value = (Value & CS42L51_ID_MASK);
+ }
+
+ return((uint32_t) Value);
+}
+
+/**
+ * @brief Start the audio Codec play feature.
+ * @note For this codec no Play options are required.
+ * @param DeviceAddr: Device address on communication Bus.
+ * @retval 0 if correct communication, else wrong communication
+ */
+uint32_t cs42l51_Play(uint16_t DeviceAddr, uint16_t* pBuffer, uint16_t Size)
+{
+ uint32_t counter = 0;
+ uint8_t Value;
+
+ if(Is_CS42L51_Stop == 1)
+ {
+ /* Unmute output device */
+ counter += cs42l51_SetMute(DeviceAddr, AUDIO_MUTE_OFF);
+
+ if(CS42L51_Device & OUTPUT_DEVICE_HEADPHONE)
+ {
+ /* DAC control : Signal processing to DAC, Freeze off, De-emphasis off, Analog output auto mute off, DAC soft ramp */
+ counter += CODEC_IO_Write(DeviceAddr, 0x09, 0x42);
+
+ /* Power control 1 : PDN_DACA, PDN_DACB disable. */
+ Value = AUDIO_IO_Read(DeviceAddr, 0x02);
+ counter += CODEC_IO_Write(DeviceAddr, 0x02, (Value & 0x9F));
+ }
+
+ if(CS42L51_Device & INPUT_DEVICE_MIC1)
+ {
+ /* Power control 1 : PDN_PGAA, PDN_ADCA disable. */
+ Value = AUDIO_IO_Read(DeviceAddr, 0x02);
+ counter += CODEC_IO_Write(DeviceAddr, 0x02, (Value & 0xF5));
+
+ /* Mic Power and Speed Control : PDN_MICA, PDN_MIC_BIAS disable. */
+ Value = AUDIO_IO_Read(DeviceAddr, 0x03);
+ counter += CODEC_IO_Write(DeviceAddr, 0x03, (Value & 0xF9));
+ }
+
+ /* Power control : Exit standby (PDN = 0) */
+ Value = AUDIO_IO_Read(DeviceAddr, 0x02);
+ counter += CODEC_IO_Write(DeviceAddr, 0x02, (Value & 0xFE));
+
+ Is_CS42L51_Stop = 0;
+ }
+
+ /* Return communication control value */
+ return counter;
+}
+
+/**
+ * @brief Pause playing on the audio codec.
+ * @param DeviceAddr: Device address on communication Bus.
+ * @retval 0 if correct communication, else wrong communication
+ */
+uint32_t cs42l51_Pause(uint16_t DeviceAddr)
+{
+ uint32_t counter = 0;
+
+ /* Pause the audio file playing */
+ /* Mute the output first */
+ counter += cs42l51_SetMute(DeviceAddr, AUDIO_MUTE_ON);
+
+ return counter;
+}
+
+/**
+ * @brief Resume playing on the audio codec.
+ * @param DeviceAddr: Device address on communication Bus.
+ * @retval 0 if correct communication, else wrong communication
+ */
+uint32_t cs42l51_Resume(uint16_t DeviceAddr)
+{
+ uint32_t counter = 0;
+
+ /* Unmute the output */
+ counter += cs42l51_SetMute(DeviceAddr, AUDIO_MUTE_OFF);
+
+ return counter;
+}
+
+/**
+ * @brief Stop audio Codec playing. It powers down the codec.
+ * @param DeviceAddr: Device address on communication Bus.
+ * @param CodecPdwnMode: selects the power down mode (currently not used).
+ * @retval 0 if correct communication, else wrong communication
+ */
+uint32_t cs42l51_Stop(uint16_t DeviceAddr, uint32_t CodecPdwnMode)
+{
+ uint32_t counter = 0;
+ uint8_t Value;
+
+ /* Set all power down bits to 1 exept PDN to mute ADCs and DACs*/
+ counter += CODEC_IO_Write(DeviceAddr, 0x02, 0x7E);
+ Value = AUDIO_IO_Read(DeviceAddr, 0x03);
+ counter += CODEC_IO_Write(DeviceAddr, 0x03, (Value | 0x0E));
+
+ /* Disable zero cross and soft ramp */
+ Value = AUDIO_IO_Read(DeviceAddr, 0x09);
+ counter += CODEC_IO_Write(DeviceAddr, 0x09, (Value & 0xFC));
+
+ /* Power control : Enter standby (PDN = 1) */
+ Value = AUDIO_IO_Read(DeviceAddr, 0x02);
+ counter += CODEC_IO_Write(DeviceAddr, 0x02, (Value | 0x01));
+
+ Is_CS42L51_Stop = 1;
+ return counter;
+}
+
+/**
+ * @brief Set higher or lower the codec volume level.
+ * @param DeviceAddr: Device address on communication Bus.
+ * @param Volume: output volume level (from 0 (-100dB) to 100 (0dB)).
+ * @retval 0 if correct communication, else wrong communication
+ */
+uint32_t cs42l51_SetVolume(uint16_t DeviceAddr, uint8_t Volume)
+{
+ uint32_t counter = 0;
+ uint8_t convertedvol = VOLUME_CONVERT(Volume);
+
+ /* AOUTA volume control : AOUTA volume */
+ counter += CODEC_IO_Write(DeviceAddr, 0x16, convertedvol);
+ /* AOUTB volume control : AOUTB volume */
+ counter += CODEC_IO_Write(DeviceAddr, 0x17, convertedvol);
+
+ return counter;
+}
+
+/**
+ * @brief Set new frequency.
+ * @param DeviceAddr: Device address on communication Bus.
+ * @param AudioFreq: Audio frequency used to play the audio stream.
+ * @retval 0 if correct communication, else wrong communication
+ */
+uint32_t cs42l51_SetFrequency(uint16_t DeviceAddr, uint32_t AudioFreq)
+{
+ return 0;
+}
+
+/**
+ * @brief Enable or disable the mute feature on the audio codec.
+ * @param DeviceAddr: Device address on communication Bus.
+ * @param Cmd: AUDIO_MUTE_ON to enable the mute or AUDIO_MUTE_OFF to disable the
+ * mute mode.
+ * @retval 0 if correct communication, else wrong communication
+ */
+uint32_t cs42l51_SetMute(uint16_t DeviceAddr, uint32_t Cmd)
+{
+ uint32_t counter = 0;
+ uint8_t Value;
+
+ /* Read DAC output control register */
+ Value = AUDIO_IO_Read(DeviceAddr, 0x08);
+
+ /* Set the Mute mode */
+ if(Cmd == AUDIO_MUTE_ON)
+ {
+ /* Mute DAC channels */
+ counter += CODEC_IO_Write(DeviceAddr, 0x08, (Value | 0x03));
+ }
+ else /* AUDIO_MUTE_OFF Disable the Mute */
+ {
+ /* Unmute DAC channels */
+ counter += CODEC_IO_Write(DeviceAddr, 0x08, (Value & 0xFC));
+ }
+ return counter;
+}
+
+/**
+ * @brief Switch dynamically (while audio file is played) the output target
+ * (speaker, headphone, etc).
+ * @note This function is currently not used (only headphone output device).
+ * @param DeviceAddr: Device address on communication Bus.
+ * @param Output: specifies the audio output device target.
+ * @retval 0 if correct communication, else wrong communication
+ */
+uint32_t cs42l51_SetOutputMode(uint16_t DeviceAddr, uint8_t Output)
+{
+ return 0;
+}
+
+/**
+ * @brief Reset CS42L51 registers.
+ * @param DeviceAddr: Device address on communication Bus.
+ * @retval 0 if correct communication, else wrong communication
+ */
+uint32_t cs42l51_Reset(uint16_t DeviceAddr)
+{
+ if(Is_CS42L51_Initialized == 1)
+ {
+ /* Deinitialize Audio Codec interface */
+ AUDIO_IO_DeInit();
+
+ /* Initialize the Control interface of the Audio Codec */
+ AUDIO_IO_Init();
+ }
+ return 0;
+}
+
+/**
+ * @}
+ */
+
+/** @addtogroup CS42L51_Private_Functions
+ * @{
+ */
+
+/**
+ * @brief Write and optionally read back a single data.
+ * @param Addr: I2C address
+ * @param Reg: Reg address
+ * @param Value: Data to be written
+ * @retval None
+ */
+static uint8_t CODEC_IO_Write(uint8_t Addr, uint8_t Reg, uint8_t Value)
+{
+ uint32_t result = 0;
+
+ AUDIO_IO_Write(Addr, Reg, Value);
+
+#ifdef VERIFY_WRITTENDATA
+ /* Verify that the data has been correctly written */
+ result = (AUDIO_IO_Read(Addr, Reg) == Value)? 0:1;
+#endif /* VERIFY_WRITTENDATA */
+
+ return result;
+}
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/P3_SETR2/Components/cs42l51/cs42l51.h b/P3_SETR2/Components/cs42l51/cs42l51.h
new file mode 100644
index 0000000..fd94ce2
--- /dev/null
+++ b/P3_SETR2/Components/cs42l51/cs42l51.h
@@ -0,0 +1,171 @@
+/**
+ ******************************************************************************
+ * @file cs42l51.h
+ * @author MCD Application Team
+ * @brief This file contains all the functions prototypes for the cs42l51.c driver.
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2017 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __CS42L51_H
+#define __CS42L51_H
+
+/* Includes ------------------------------------------------------------------*/
+#include "../Common/audio.h"
+
+/** @addtogroup BSP
+ * @{
+ */
+
+/** @addtogroup Component
+ * @{
+ */
+
+/** @addtogroup CS42L51
+ * @{
+ */
+
+/** @defgroup CS42L51_Exported_Types
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @defgroup CS42L51_Exported_Constants
+ * @{
+ */
+
+/******************************************************************************/
+/*************************** Codec User defines ******************************/
+/******************************************************************************/
+/* Codec output devices */
+#define OUTPUT_DEVICE_HEADPHONE 0x01
+
+/* Codec input devices */
+#define INPUT_DEVICE_MIC1 0x10
+
+/* Volume Levels values */
+#define DEFAULT_VOLMIN 0x00
+#define DEFAULT_VOLMAX 0xFF
+#define DEFAULT_VOLSTEP 0x04
+
+#define AUDIO_PAUSE 0
+#define AUDIO_RESUME 1
+
+/* Codec POWER DOWN modes */
+#define CODEC_PDWN_HW 1
+#define CODEC_PDWN_SW 2
+
+/* MUTE commands */
+#define AUDIO_MUTE_ON 1
+#define AUDIO_MUTE_OFF 0
+
+/* AUDIO FREQUENCY */
+#define AUDIO_FREQUENCY_192K ((uint32_t)192000)
+#define AUDIO_FREQUENCY_96K ((uint32_t)96000)
+#define AUDIO_FREQUENCY_48K ((uint32_t)48000)
+#define AUDIO_FREQUENCY_44K ((uint32_t)44100)
+#define AUDIO_FREQUENCY_32K ((uint32_t)32000)
+#define AUDIO_FREQUENCY_22K ((uint32_t)22050)
+#define AUDIO_FREQUENCY_16K ((uint32_t)16000)
+#define AUDIO_FREQUENCY_11K ((uint32_t)11025)
+#define AUDIO_FREQUENCY_8K ((uint32_t)8000)
+
+/******************************************************************************/
+/****************************** REGISTER MAPPING ******************************/
+/******************************************************************************/
+/**
+ * @brief CS42L51 ID
+ */
+#define CS42L51_ID 0xD8
+#define CS42L51_ID_MASK 0xF8
+/**
+ * @brief Chip ID Register: Chip I.D. and Revision Register
+ * Read only register
+ * Default value: 0x01
+ * [7:3] CHIPID[4:0]: I.D. code for the CS42L51.
+ * Default value: 11100b
+ * [2:0] REVID[2:0]: CS42L51 revision level.
+ * Default value:
+ * 000 - Rev A0
+ * 001 - Rev A1
+ * 010 - Rev B0
+ * 011 - Rev B1
+ */
+#define CS42L51_CHIPID_ADDR 0x01
+
+/**
+ * @}
+ */
+
+/** @defgroup CS42L51_Exported_Macros
+ * @{
+ */
+#define VOLUME_CONVERT(Volume) ((Volume >= 100) ? 0 : ((uint8_t)(((Volume * 2) + 56))))
+/**
+ * @}
+ */
+
+/** @defgroup CS42L51_Exported_Functions
+ * @{
+ */
+
+/*------------------------------------------------------------------------------
+ Audio Codec functions
+------------------------------------------------------------------------------*/
+/* High Layer codec functions */
+uint32_t cs42l51_Init(uint16_t DeviceAddr, uint16_t Device, uint8_t Volume, uint32_t AudioFreq);
+void cs42l51_DeInit(void);
+uint32_t cs42l51_ReadID(uint16_t DeviceAddr);
+uint32_t cs42l51_Play(uint16_t DeviceAddr, uint16_t* pBuffer, uint16_t Size);
+uint32_t cs42l51_Pause(uint16_t DeviceAddr);
+uint32_t cs42l51_Resume(uint16_t DeviceAddr);
+uint32_t cs42l51_Stop(uint16_t DeviceAddr, uint32_t Cmd);
+uint32_t cs42l51_SetVolume(uint16_t DeviceAddr, uint8_t Volume);
+uint32_t cs42l51_SetFrequency(uint16_t DeviceAddr, uint32_t AudioFreq);
+uint32_t cs42l51_SetMute(uint16_t DeviceAddr, uint32_t Cmd);
+uint32_t cs42l51_SetOutputMode(uint16_t DeviceAddr, uint8_t Output);
+uint32_t cs42l51_Reset(uint16_t DeviceAddr);
+
+/* AUDIO IO functions */
+void AUDIO_IO_Init(void);
+void AUDIO_IO_DeInit(void);
+void AUDIO_IO_Write(uint8_t Addr, uint8_t Reg, uint8_t Value);
+uint8_t AUDIO_IO_Read(uint8_t Addr, uint8_t Reg);
+void AUDIO_IO_Delay(uint32_t Delay);
+
+/* Audio driver structure */
+extern AUDIO_DrvTypeDef cs42l51_drv;
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+#endif /* __CS42L51_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/P3_SETR2/Components/cs43l22/Release_Notes.html b/P3_SETR2/Components/cs43l22/Release_Notes.html
new file mode 100644
index 0000000..ab0fe0e
--- /dev/null
+++ b/P3_SETR2/Components/cs43l22/Release_Notes.html
@@ -0,0 +1,136 @@
+
+
+
+
+
+
+ Release Notes for CS43L22 Component Drivers
+
+
+
+
+
+
+
+
+
+
+Release Notes for CS43L22 Component Drivers
+Copyright © 2014 STMicroelectronics
+
+
+
+
+
+
License
+
Licensed by ST under BSD 3-Clause license (the "License"). You may not use this package except in compliance with the License. You may obtain a copy of the License at:
+
https://opensource.org/licenses/BSD-3-Clause
+
Purpose
+
This directory contains the CS43L22 component drivers.
+
+
+
Update History
+
+
V2.0.4 / 03-April-2019
+
+
Main Changes
+
+Update release notes format
+
+
+
+
+
V2.0.3 / 31-August-2018
+
+
Main Changes
+
+Reformat the BSD 3-Clause license declaration in the files header (replace license terms by a web reference to OSI website where those terms lie)
+
+
+
+
+
V2.0.2 / 02-October-2015
+
+
Main Changes
+
+cs43l22.c/.h:
+
+Move VOLUME_CONVERT macro from cs43l22.h to cs43l22.c as internally used to convert volume.
+Add literals instead of magic number for cs34l22 registers
+
+
+
+
+
+
V2.0.1 / 16-September-2015
+
+
Main Changes
+
+cs43l22.c:
+
+Enable the digital soft ramp to avoid clac noise
+Improve mute/unmute by muting/unmuting also the DAC inputs
+
+
+
+
+
+
V2.0.0 / 24-June-2015
+
+
Main Changes
+
+cs43l22.c/.h:
+
+Add codec de-initialization function: cs43l22_DeInit()
+Add Audio IO de-initialization function prototype: AUDIO_IO_DeInit()
+
+
+
NOTE
+This release must be used with BSP Common driver V4.0.0 or later
+
+
+
+
V1.1.0 / 10-February-2015
+
+
Main Changes
+
+cs43l22.c/.h:
+
+Add AUDIO_FREQUENCY_xxx defines for frequencies capabilities (8K to 192K)
+Add codec reset function: cs43l22_Reset()
+
+
+
+
+
+
V1.0.1 / 02-December-2014
+
+
Main Changes
+
+cs43l22.c: change “\” by “/” in the include path to fix compilation issue under Linux
+
+
+
+
+
V1.0.0 / 18-February-2014
+
+
Main Changes
+
+First official release of CS43L22 audio codec
+
+
+
+
+
+
+
+
diff --git a/P3_SETR2/Components/cs43l22/cs43l22.c b/P3_SETR2/Components/cs43l22/cs43l22.c
new file mode 100644
index 0000000..653a689
--- /dev/null
+++ b/P3_SETR2/Components/cs43l22/cs43l22.c
@@ -0,0 +1,477 @@
+/**
+ ******************************************************************************
+ * @file cs43l22.c
+ * @author MCD Application Team
+ * @brief This file provides the CS43L22 Audio Codec driver.
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2015 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/* Includes ------------------------------------------------------------------*/
+#include "cs43l22.h"
+
+/** @addtogroup BSP
+ * @{
+ */
+
+/** @addtogroup Components
+ * @{
+ */
+
+/** @addtogroup CS43L22
+ * @brief This file provides a set of functions needed to drive the
+ * CS43L22 audio codec.
+ * @{
+ */
+
+/** @defgroup CS43L22_Private_Types
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @defgroup CS43L22_Private_Defines
+ * @{
+ */
+#define VOLUME_CONVERT(Volume) (((Volume) > 100)? 255:((uint8_t)(((Volume) * 255) / 100)))
+/* Uncomment this line to enable verifying data sent to codec after each write
+ operation (for debug purpose) */
+#if !defined (VERIFY_WRITTENDATA)
+/* #define VERIFY_WRITTENDATA */
+#endif /* VERIFY_WRITTENDATA */
+/**
+ * @}
+ */
+
+/** @defgroup CS43L22_Private_Macros
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @defgroup CS43L22_Private_Variables
+ * @{
+ */
+
+/* Audio codec driver structure initialization */
+AUDIO_DrvTypeDef cs43l22_drv =
+{
+ cs43l22_Init,
+ cs43l22_DeInit,
+ cs43l22_ReadID,
+
+ cs43l22_Play,
+ cs43l22_Pause,
+ cs43l22_Resume,
+ cs43l22_Stop,
+
+ cs43l22_SetFrequency,
+ cs43l22_SetVolume,
+ cs43l22_SetMute,
+ cs43l22_SetOutputMode,
+ cs43l22_Reset,
+};
+
+static uint8_t Is_cs43l22_Stop = 1;
+
+volatile uint8_t OutputDev = 0;
+
+/**
+ * @}
+ */
+
+/** @defgroup CS43L22_Function_Prototypes
+ * @{
+ */
+static uint8_t CODEC_IO_Write(uint8_t Addr, uint8_t Reg, uint8_t Value);
+/**
+ * @}
+ */
+
+/** @defgroup CS43L22_Private_Functions
+ * @{
+ */
+
+/**
+ * @brief Initializes the audio codec and the control interface.
+ * @param DeviceAddr: Device address on communication Bus.
+ * @param OutputDevice: can be OUTPUT_DEVICE_SPEAKER, OUTPUT_DEVICE_HEADPHONE,
+ * OUTPUT_DEVICE_BOTH or OUTPUT_DEVICE_AUTO .
+ * @param Volume: Initial volume level (from 0 (Mute) to 100 (Max))
+ * @retval 0 if correct communication, else wrong communication
+ */
+uint32_t cs43l22_Init(uint16_t DeviceAddr, uint16_t OutputDevice, uint8_t Volume, uint32_t AudioFreq)
+{
+ uint32_t counter = 0;
+
+ /* Initialize the Control interface of the Audio Codec */
+ AUDIO_IO_Init();
+
+ /* Keep Codec powered OFF */
+ counter += CODEC_IO_Write(DeviceAddr, CS43L22_REG_POWER_CTL1, 0x01);
+
+ /*Save Output device for mute ON/OFF procedure*/
+ switch (OutputDevice)
+ {
+ case OUTPUT_DEVICE_SPEAKER:
+ OutputDev = 0xFA;
+ break;
+
+ case OUTPUT_DEVICE_HEADPHONE:
+ OutputDev = 0xAF;
+ break;
+
+ case OUTPUT_DEVICE_BOTH:
+ OutputDev = 0xAA;
+ break;
+
+ case OUTPUT_DEVICE_AUTO:
+ OutputDev = 0x05;
+ break;
+
+ default:
+ OutputDev = 0x05;
+ break;
+ }
+
+ counter += CODEC_IO_Write(DeviceAddr, CS43L22_REG_POWER_CTL2, OutputDev);
+
+ /* Clock configuration: Auto detection */
+ counter += CODEC_IO_Write(DeviceAddr, CS43L22_REG_CLOCKING_CTL, 0x81);
+
+ /* Set the Slave Mode and the audio Standard */
+ counter += CODEC_IO_Write(DeviceAddr, CS43L22_REG_INTERFACE_CTL1, CODEC_STANDARD);
+
+ /* Set the Master volume */
+ counter += cs43l22_SetVolume(DeviceAddr, Volume);
+
+ /* If the Speaker is enabled, set the Mono mode and volume attenuation level */
+ if(OutputDevice != OUTPUT_DEVICE_HEADPHONE)
+ {
+ /* Set the Speaker Mono mode */
+ counter += CODEC_IO_Write(DeviceAddr, CS43L22_REG_PLAYBACK_CTL2, 0x06);
+
+ /* Set the Speaker attenuation level */
+ counter += CODEC_IO_Write(DeviceAddr, CS43L22_REG_SPEAKER_A_VOL, 0x00);
+ counter += CODEC_IO_Write(DeviceAddr, CS43L22_REG_SPEAKER_B_VOL, 0x00);
+ }
+
+ /* Additional configuration for the CODEC. These configurations are done to reduce
+ the time needed for the Codec to power off. If these configurations are removed,
+ then a long delay should be added between powering off the Codec and switching
+ off the I2S peripheral MCLK clock (which is the operating clock for Codec).
+ If this delay is not inserted, then the codec will not shut down properly and
+ it results in high noise after shut down. */
+
+ /* Disable the analog soft ramp */
+ counter += CODEC_IO_Write(DeviceAddr, CS43L22_REG_ANALOG_ZC_SR_SETT, 0x00);
+ /* Disable the digital soft ramp */
+ counter += CODEC_IO_Write(DeviceAddr, CS43L22_REG_MISC_CTL, 0x04);
+ /* Disable the limiter attack level */
+ counter += CODEC_IO_Write(DeviceAddr, CS43L22_REG_LIMIT_CTL1, 0x00);
+ /* Adjust Bass and Treble levels */
+ counter += CODEC_IO_Write(DeviceAddr, CS43L22_REG_TONE_CTL, 0x0F);
+ /* Adjust PCM volume level */
+ counter += CODEC_IO_Write(DeviceAddr, CS43L22_REG_PCMA_VOL, 0x0A);
+ counter += CODEC_IO_Write(DeviceAddr, CS43L22_REG_PCMB_VOL, 0x0A);
+
+ /* Return communication control value */
+ return counter;
+}
+
+/**
+ * @brief Deinitializes the audio codec.
+ * @param None
+ * @retval None
+ */
+void cs43l22_DeInit(void)
+{
+ /* Deinitialize Audio Codec interface */
+ AUDIO_IO_DeInit();
+}
+
+/**
+ * @brief Get the CS43L22 ID.
+ * @param DeviceAddr: Device address on communication Bus.
+ * @retval The CS43L22 ID
+ */
+uint32_t cs43l22_ReadID(uint16_t DeviceAddr)
+{
+ uint8_t Value;
+ /* Initialize the Control interface of the Audio Codec */
+ AUDIO_IO_Init();
+
+ Value = AUDIO_IO_Read(DeviceAddr, CS43L22_CHIPID_ADDR);
+ Value = (Value & CS43L22_ID_MASK);
+
+ return((uint32_t) Value);
+}
+
+/**
+ * @brief Start the audio Codec play feature.
+ * @note For this codec no Play options are required.
+ * @param DeviceAddr: Device address on communication Bus.
+ * @retval 0 if correct communication, else wrong communication
+ */
+uint32_t cs43l22_Play(uint16_t DeviceAddr, uint16_t* pBuffer, uint16_t Size)
+{
+ uint32_t counter = 0;
+
+ if(Is_cs43l22_Stop == 1)
+ {
+ /* Enable the digital soft ramp */
+ counter += CODEC_IO_Write(DeviceAddr, CS43L22_REG_MISC_CTL, 0x06);
+
+ /* Enable Output device */
+ counter += cs43l22_SetMute(DeviceAddr, AUDIO_MUTE_OFF);
+
+ /* Power on the Codec */
+ counter += CODEC_IO_Write(DeviceAddr, CS43L22_REG_POWER_CTL1, 0x9E);
+ Is_cs43l22_Stop = 0;
+ }
+
+ /* Return communication control value */
+ return counter;
+}
+
+/**
+ * @brief Pauses playing on the audio codec.
+ * @param DeviceAddr: Device address on communication Bus.
+ * @retval 0 if correct communication, else wrong communication
+ */
+uint32_t cs43l22_Pause(uint16_t DeviceAddr)
+{
+ uint32_t counter = 0;
+
+ /* Pause the audio file playing */
+ /* Mute the output first */
+ counter += cs43l22_SetMute(DeviceAddr, AUDIO_MUTE_ON);
+
+ /* Put the Codec in Power save mode */
+ counter += CODEC_IO_Write(DeviceAddr, CS43L22_REG_POWER_CTL1, 0x01);
+
+ return counter;
+}
+
+/**
+ * @brief Resumes playing on the audio codec.
+ * @param DeviceAddr: Device address on communication Bus.
+ * @retval 0 if correct communication, else wrong communication
+ */
+uint32_t cs43l22_Resume(uint16_t DeviceAddr)
+{
+ uint32_t counter = 0;
+ volatile uint32_t index = 0x00;
+ /* Resumes the audio file playing */
+ /* Unmute the output first */
+ counter += cs43l22_SetMute(DeviceAddr, AUDIO_MUTE_OFF);
+
+ for(index = 0x00; index < 0xFF; index++);
+
+ counter += CODEC_IO_Write(DeviceAddr, CS43L22_REG_POWER_CTL2, OutputDev);
+
+ /* Exit the Power save mode */
+ counter += CODEC_IO_Write(DeviceAddr, CS43L22_REG_POWER_CTL1, 0x9E);
+
+ return counter;
+}
+
+/**
+ * @brief Stops audio Codec playing. It powers down the codec.
+ * @param DeviceAddr: Device address on communication Bus.
+ * @param CodecPdwnMode: selects the power down mode.
+ * - CODEC_PDWN_HW: Physically power down the codec. When resuming from this
+ * mode, the codec is set to default configuration
+ * (user should re-Initialize the codec in order to
+ * play again the audio stream).
+ * @retval 0 if correct communication, else wrong communication
+ */
+uint32_t cs43l22_Stop(uint16_t DeviceAddr, uint32_t CodecPdwnMode)
+{
+ uint32_t counter = 0;
+
+ /* Mute the output first */
+ counter += cs43l22_SetMute(DeviceAddr, AUDIO_MUTE_ON);
+
+ /* Disable the digital soft ramp */
+ counter += CODEC_IO_Write(DeviceAddr, CS43L22_REG_MISC_CTL, 0x04);
+
+ /* Power down the DAC and the speaker (PMDAC and PMSPK bits)*/
+ counter += CODEC_IO_Write(DeviceAddr, CS43L22_REG_POWER_CTL1, 0x9F);
+
+ Is_cs43l22_Stop = 1;
+ return counter;
+}
+
+/**
+ * @brief Sets higher or lower the codec volume level.
+ * @param DeviceAddr: Device address on communication Bus.
+ * @param Volume: a byte value from 0 to 255 (refer to codec registers
+ * description for more details).
+ *
+ * @retval 0 if correct communication, else wrong communication
+ */
+uint32_t cs43l22_SetVolume(uint16_t DeviceAddr, uint8_t Volume)
+{
+ uint32_t counter = 0;
+ uint8_t convertedvol = VOLUME_CONVERT(Volume);
+
+ if(convertedvol > 0xE6)
+ {
+ /* Set the Master volume */
+ counter += CODEC_IO_Write(DeviceAddr, CS43L22_REG_MASTER_A_VOL, convertedvol - 0xE7);
+ counter += CODEC_IO_Write(DeviceAddr, CS43L22_REG_MASTER_B_VOL, convertedvol - 0xE7);
+ }
+ else
+ {
+ /* Set the Master volume */
+ counter += CODEC_IO_Write(DeviceAddr, CS43L22_REG_MASTER_A_VOL, convertedvol + 0x19);
+ counter += CODEC_IO_Write(DeviceAddr, CS43L22_REG_MASTER_B_VOL, convertedvol + 0x19);
+ }
+
+ return counter;
+}
+
+/**
+ * @brief Sets new frequency.
+ * @param DeviceAddr: Device address on communication Bus.
+ * @param AudioFreq: Audio frequency used to play the audio stream.
+ * @retval 0 if correct communication, else wrong communication
+ */
+uint32_t cs43l22_SetFrequency(uint16_t DeviceAddr, uint32_t AudioFreq)
+{
+ return 0;
+}
+
+/**
+ * @brief Enables or disables the mute feature on the audio codec.
+ * @param DeviceAddr: Device address on communication Bus.
+ * @param Cmd: AUDIO_MUTE_ON to enable the mute or AUDIO_MUTE_OFF to disable the
+ * mute mode.
+ * @retval 0 if correct communication, else wrong communication
+ */
+uint32_t cs43l22_SetMute(uint16_t DeviceAddr, uint32_t Cmd)
+{
+ uint32_t counter = 0;
+
+ /* Set the Mute mode */
+ if(Cmd == AUDIO_MUTE_ON)
+ {
+ counter += CODEC_IO_Write(DeviceAddr, CS43L22_REG_POWER_CTL2, 0xFF);
+ counter += CODEC_IO_Write(DeviceAddr, CS43L22_REG_HEADPHONE_A_VOL, 0x01);
+ counter += CODEC_IO_Write(DeviceAddr, CS43L22_REG_HEADPHONE_B_VOL, 0x01);
+ }
+ else /* AUDIO_MUTE_OFF Disable the Mute */
+ {
+ counter += CODEC_IO_Write(DeviceAddr, CS43L22_REG_HEADPHONE_A_VOL, 0x00);
+ counter += CODEC_IO_Write(DeviceAddr, CS43L22_REG_HEADPHONE_B_VOL, 0x00);
+ counter += CODEC_IO_Write(DeviceAddr, CS43L22_REG_POWER_CTL2, OutputDev);
+ }
+ return counter;
+}
+
+/**
+ * @brief Switch dynamically (while audio file is played) the output target
+ * (speaker or headphone).
+ * @note This function modifies a global variable of the audio codec driver: OutputDev.
+ * @param DeviceAddr: Device address on communication Bus.
+ * @param Output: specifies the audio output target: OUTPUT_DEVICE_SPEAKER,
+ * OUTPUT_DEVICE_HEADPHONE, OUTPUT_DEVICE_BOTH or OUTPUT_DEVICE_AUTO
+ * @retval 0 if correct communication, else wrong communication
+ */
+uint32_t cs43l22_SetOutputMode(uint16_t DeviceAddr, uint8_t Output)
+{
+ uint32_t counter = 0;
+
+ switch (Output)
+ {
+ case OUTPUT_DEVICE_SPEAKER:
+ counter += CODEC_IO_Write(DeviceAddr, CS43L22_REG_POWER_CTL2, 0xFA); /* SPK always ON & HP always OFF */
+ OutputDev = 0xFA;
+ break;
+
+ case OUTPUT_DEVICE_HEADPHONE:
+ counter += CODEC_IO_Write(DeviceAddr, CS43L22_REG_POWER_CTL2, 0xAF); /* SPK always OFF & HP always ON */
+ OutputDev = 0xAF;
+ break;
+
+ case OUTPUT_DEVICE_BOTH:
+ counter += CODEC_IO_Write(DeviceAddr, CS43L22_REG_POWER_CTL2, 0xAA); /* SPK always ON & HP always ON */
+ OutputDev = 0xAA;
+ break;
+
+ case OUTPUT_DEVICE_AUTO:
+ counter += CODEC_IO_Write(DeviceAddr, CS43L22_REG_POWER_CTL2, 0x05); /* Detect the HP or the SPK automatically */
+ OutputDev = 0x05;
+ break;
+
+ default:
+ counter += CODEC_IO_Write(DeviceAddr, CS43L22_REG_POWER_CTL2, 0x05); /* Detect the HP or the SPK automatically */
+ OutputDev = 0x05;
+ break;
+ }
+ return counter;
+}
+
+/**
+ * @brief Resets cs43l22 registers.
+ * @param DeviceAddr: Device address on communication Bus.
+ * @retval 0 if correct communication, else wrong communication
+ */
+uint32_t cs43l22_Reset(uint16_t DeviceAddr)
+{
+ return 0;
+}
+
+/**
+ * @brief Writes/Read a single data.
+ * @param Addr: I2C address
+ * @param Reg: Reg address
+ * @param Value: Data to be written
+ * @retval None
+ */
+static uint8_t CODEC_IO_Write(uint8_t Addr, uint8_t Reg, uint8_t Value)
+{
+ uint32_t result = 0;
+
+ AUDIO_IO_Write(Addr, Reg, Value);
+
+#ifdef VERIFY_WRITTENDATA
+ /* Verify that the data has been correctly written */
+ result = (AUDIO_IO_Read(Addr, Reg) == Value)? 0:1;
+#endif /* VERIFY_WRITTENDATA */
+
+ return result;
+}
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/P3_SETR2/Components/cs43l22/cs43l22.h b/P3_SETR2/Components/cs43l22/cs43l22.h
new file mode 100644
index 0000000..84f8f1f
--- /dev/null
+++ b/P3_SETR2/Components/cs43l22/cs43l22.h
@@ -0,0 +1,210 @@
+/**
+ ******************************************************************************
+ * @file cs43l22.h
+ * @author MCD Application Team
+ * @brief This file contains all the functions prototypes for the cs43l22.c driver.
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2015 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __CS43L22_H
+#define __CS43L22_H
+
+/* Includes ------------------------------------------------------------------*/
+#include "../Common/audio.h"
+
+/** @addtogroup BSP
+ * @{
+ */
+
+/** @addtogroup Component
+ * @{
+ */
+
+/** @addtogroup CS43L22
+ * @{
+ */
+
+/** @defgroup CS43L22_Exported_Types
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @defgroup CS43L22_Exported_Constants
+ * @{
+ */
+
+/******************************************************************************/
+/*************************** Codec User defines ******************************/
+/******************************************************************************/
+/* Codec output DEVICE */
+#define OUTPUT_DEVICE_SPEAKER 1
+#define OUTPUT_DEVICE_HEADPHONE 2
+#define OUTPUT_DEVICE_BOTH 3
+#define OUTPUT_DEVICE_AUTO 4
+
+/* Volume Levels values */
+#define DEFAULT_VOLMIN 0x00
+#define DEFAULT_VOLMAX 0xFF
+#define DEFAULT_VOLSTEP 0x04
+
+#define AUDIO_PAUSE 0
+#define AUDIO_RESUME 1
+
+/* Codec POWER DOWN modes */
+#define CODEC_PDWN_HW 1
+#define CODEC_PDWN_SW 2
+
+/* MUTE commands */
+#define AUDIO_MUTE_ON 1
+#define AUDIO_MUTE_OFF 0
+
+/* AUDIO FREQUENCY */
+#define AUDIO_FREQUENCY_192K ((uint32_t)192000)
+#define AUDIO_FREQUENCY_96K ((uint32_t)96000)
+#define AUDIO_FREQUENCY_48K ((uint32_t)48000)
+#define AUDIO_FREQUENCY_44K ((uint32_t)44100)
+#define AUDIO_FREQUENCY_32K ((uint32_t)32000)
+#define AUDIO_FREQUENCY_22K ((uint32_t)22050)
+#define AUDIO_FREQUENCY_16K ((uint32_t)16000)
+#define AUDIO_FREQUENCY_11K ((uint32_t)11025)
+#define AUDIO_FREQUENCY_8K ((uint32_t)8000)
+
+/** CS43l22 Registers ***/
+#define CS43L22_REG_ID 0x01
+#define CS43L22_REG_POWER_CTL1 0x02
+#define CS43L22_REG_POWER_CTL2 0x04
+#define CS43L22_REG_CLOCKING_CTL 0x05
+#define CS43L22_REG_INTERFACE_CTL1 0x06
+#define CS43L22_REG_INTERFACE_CTL2 0x07
+#define CS43L22_REG_PASSTHR_A_SELECT 0x08
+#define CS43L22_REG_PASSTHR_B_SELECT 0x09
+#define CS43L22_REG_ANALOG_ZC_SR_SETT 0x0A
+#define CS43L22_REG_PASSTHR_GANG_CTL 0x0C
+#define CS43L22_REG_PLAYBACK_CTL1 0x0D
+#define CS43L22_REG_MISC_CTL 0x0E
+#define CS43L22_REG_PLAYBACK_CTL2 0x0F
+#define CS43L22_REG_PASSTHR_A_VOL 0x14
+#define CS43L22_REG_PASSTHR_B_VOL 0x15
+#define CS43L22_REG_PCMA_VOL 0x1A
+#define CS43L22_REG_PCMB_VOL 0x1B
+#define CS43L22_REG_BEEP_FREQ_ON_TIME 0x1C
+#define CS43L22_REG_BEEP_VOL_OFF_TIME 0x1D
+#define CS43L22_REG_BEEP_TONE_CFG 0x1E
+#define CS43L22_REG_TONE_CTL 0x1F
+#define CS43L22_REG_MASTER_A_VOL 0x20
+#define CS43L22_REG_MASTER_B_VOL 0x21
+#define CS43L22_REG_HEADPHONE_A_VOL 0x22
+#define CS43L22_REG_HEADPHONE_B_VOL 0x23
+#define CS43L22_REG_SPEAKER_A_VOL 0x24
+#define CS43L22_REG_SPEAKER_B_VOL 0x25
+#define CS43L22_REG_CH_MIXER_SWAP 0x26
+#define CS43L22_REG_LIMIT_CTL1 0x27
+#define CS43L22_REG_LIMIT_CTL2 0x28
+#define CS43L22_REG_LIMIT_ATTACK_RATE 0x29
+#define CS43L22_REG_OVF_CLK_STATUS 0x2E
+#define CS43L22_REG_BATT_COMPENSATION 0x2F
+#define CS43L22_REG_VP_BATTERY_LEVEL 0x30
+#define CS43L22_REG_SPEAKER_STATUS 0x31
+#define CS43L22_REG_TEMPMONITOR_CTL 0x32
+#define CS43L22_REG_THERMAL_FOLDBACK 0x33
+#define CS43L22_REG_CHARGE_PUMP_FREQ 0x34
+
+/******************************************************************************/
+/****************************** REGISTER MAPPING ******************************/
+/******************************************************************************/
+/**
+ * @brief CS43L22 ID
+ */
+#define CS43L22_ID 0xE0
+#define CS43L22_ID_MASK 0xF8
+/**
+ * @brief Chip ID Register: Chip I.D. and Revision Register
+ * Read only register
+ * Default value: 0x01
+ * [7:3] CHIPID[4:0]: I.D. code for the CS43L22.
+ * Default value: 11100b
+ * [2:0] REVID[2:0]: CS43L22 revision level.
+ * Default value:
+ * 000 - Rev A0
+ * 001 - Rev A1
+ * 010 - Rev B0
+ * 011 - Rev B1
+ */
+#define CS43L22_CHIPID_ADDR 0x01
+
+/**
+ * @}
+ */
+
+/** @defgroup CS43L22_Exported_Macros
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @defgroup CS43L22_Exported_Functions
+ * @{
+ */
+
+/*------------------------------------------------------------------------------
+ Audio Codec functions
+------------------------------------------------------------------------------*/
+/* High Layer codec functions */
+uint32_t cs43l22_Init(uint16_t DeviceAddr, uint16_t OutputDevice, uint8_t Volume, uint32_t AudioFreq);
+void cs43l22_DeInit(void);
+uint32_t cs43l22_ReadID(uint16_t DeviceAddr);
+uint32_t cs43l22_Play(uint16_t DeviceAddr, uint16_t* pBuffer, uint16_t Size);
+uint32_t cs43l22_Pause(uint16_t DeviceAddr);
+uint32_t cs43l22_Resume(uint16_t DeviceAddr);
+uint32_t cs43l22_Stop(uint16_t DeviceAddr, uint32_t Cmd);
+uint32_t cs43l22_SetVolume(uint16_t DeviceAddr, uint8_t Volume);
+uint32_t cs43l22_SetFrequency(uint16_t DeviceAddr, uint32_t AudioFreq);
+uint32_t cs43l22_SetMute(uint16_t DeviceAddr, uint32_t Cmd);
+uint32_t cs43l22_SetOutputMode(uint16_t DeviceAddr, uint8_t Output);
+uint32_t cs43l22_Reset(uint16_t DeviceAddr);
+
+/* AUDIO IO functions */
+void AUDIO_IO_Init(void);
+void AUDIO_IO_DeInit(void);
+void AUDIO_IO_Write(uint8_t Addr, uint8_t Reg, uint8_t Value);
+uint8_t AUDIO_IO_Read(uint8_t Addr, uint8_t Reg);
+
+/* Audio driver structure */
+extern AUDIO_DrvTypeDef cs43l22_drv;
+
+#endif /* __CS43L22_H */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/P3_SETR2/Components/cy8c4014lqi/Release_Notes.html b/P3_SETR2/Components/cy8c4014lqi/Release_Notes.html
new file mode 100644
index 0000000..d095d9d
--- /dev/null
+++ b/P3_SETR2/Components/cy8c4014lqi/Release_Notes.html
@@ -0,0 +1,55 @@
+
+
+
+
+
+
+ Release Notes for CY8C4014LQI Component Drivers
+
+
+
+
+
+
+
+
+
+
+Release Notes for CY8C4014LQI Component Drivers
+Copyright © 2019 STMicroelectronics
+
+
+
+
+
+
License
+
Licensed by ST under BSD 3-Clause license (the "License"). You may not use this package except in compliance with the License. You may obtain a copy of the License at:
+
https://opensource.org/licenses/BSD-3-Clause
+
Purpose
+
This directory contains the CY8C4014LQI component drivers.
+
+
+
Update History
+
+
V1.0.0 / 05-July-2019
+
+
Main Changes
+
+First official release of CY8C4014LQI Touch Screen Component driver
+
+
+
+
+
+
+
+
diff --git a/P3_SETR2/Components/cy8c4014lqi/cy8c4014lqi.c b/P3_SETR2/Components/cy8c4014lqi/cy8c4014lqi.c
new file mode 100644
index 0000000..860b1fe
--- /dev/null
+++ b/P3_SETR2/Components/cy8c4014lqi/cy8c4014lqi.c
@@ -0,0 +1,359 @@
+/**
+ ******************************************************************************
+ * @file cy8c4014lqi.c
+ * @author MCD Application Team
+ * @brief This file provides a set of functions needed to manage the CY8C4014LQI
+ * touch screen devices.
+ ******************************************************************************
+ * @attention
+ *
+ * © COPYRIGHT(c) 2017 STMicroelectronics
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ * 3. Neither the name of STMicroelectronics nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ ******************************************************************************
+ */
+
+/* Includes ------------------------------------------------------------------*/
+#include "cy8c4014lqi.h"
+
+/** @addtogroup BSP
+ * @{
+ */
+
+/** @addtogroup Component
+ * @{
+ */
+
+/** @addtogroup CY8C4014LQI
+ * @{
+ */
+
+/* Private typedef -----------------------------------------------------------*/
+
+/** @defgroup CY8C4014LQI_Private_Types_Definitions
+ * @{
+ */
+
+/* cy8c4014lqi Handle definition. */
+typedef struct
+{
+ uint8_t i2cInitialized;
+
+ /* field holding the current number of simultaneous active touches */
+ uint8_t currActiveTouchNb;
+
+ /* field holding the touch index currently managed */
+ uint8_t currActiveTouchIdx;
+
+} cy8c4014lqi_handle_TypeDef;
+
+/**
+ * @}
+ */
+
+/* Private define ------------------------------------------------------------*/
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+volatile uint8_t is_touch = 0;
+
+
+/** @defgroup CY8C4014LQI_Private_Variables
+ * @{
+ */
+
+/* Touch screen driver structure initialization */
+TS_DrvTypeDef cy8c4014lqi_ts_drv =
+{
+ cy8c4014lqi_Init,
+ cy8c4014lqi_ReadID,
+ cy8c4014lqi_Reset,
+ cy8c4014lqi_TS_Start,
+ cy8c4014lqi_TS_DetectTouch,
+ cy8c4014lqi_TS_GetXY,
+ cy8c4014lqi_TS_EnableIT,
+ cy8c4014lqi_TS_ClearIT,
+ cy8c4014lqi_TS_ITStatus,
+ cy8c4014lqi_TS_DisableIT
+};
+
+/* Global cy8c4014lqi handle */
+static cy8c4014lqi_handle_TypeDef cy8c4014lqi_handle = { CY8C4014LQI_I2C_NOT_INITIALIZED, 0U, 0U};
+
+/**
+ * @}
+ */
+
+/* Private functions prototypes-----------------------------------------------*/
+
+/** @defgroup CY8C4014LQI_Private_Functions
+ * @{
+ */
+
+static uint8_t cy8c4014lqi_Get_I2C_InitializedStatus(void);
+static void cy8c4014lqi_I2C_InitializeIfRequired(void);
+
+/**
+ * @}
+ */
+
+/* Exported functions --------------------------------------------------------*/
+
+/** @addtogroup CY8C4014LQI_Exported_Functions
+ * @{
+ */
+
+/**
+ * @brief Initialize the cy8c4014lqi communication bus
+ * from MCU to CY8C4014LQI : ie I2C channel initialization (if required).
+ * @param DeviceAddr: Device address on communication Bus (I2C slave address of CY8C4014LQI).
+ * @retval None
+ */
+void cy8c4014lqi_Init(uint16_t DeviceAddr)
+{
+ /* Initialize I2C link if needed */
+ cy8c4014lqi_I2C_InitializeIfRequired();
+}
+
+/**
+ * @brief Software Reset the cy8c4014lqi.
+ * @note : Not applicable to CY8C4014LQI.
+ * @param DeviceAddr: Device address on communication Bus (I2C slave address of CY8C4014LQI).
+ * @retval None
+ */
+void cy8c4014lqi_Reset(uint16_t DeviceAddr)
+{
+ /* Do nothing */
+ /* No software reset sequence available in CY8C4014LQI IC */
+}
+
+/**
+ * @brief Read the cy8c4014lqi device ID, pre initialize I2C in case of need to be
+ * able to read the CY8C4014LQI device ID, and verify this is a CY8C4014LQI.
+ * @param DeviceAddr: I2C CY8C4014LQI Slave address.
+ * @retval The Device ID (two bytes).
+ */
+uint16_t cy8c4014lqi_ReadID(uint16_t DeviceAddr)
+{
+ /* Initialize I2C link if needed */
+ cy8c4014lqi_I2C_InitializeIfRequired();
+
+ /* Return the device ID value */
+ return(TS_IO_Read(DeviceAddr, CY8C4014LQI_ADEVICE_ID));
+}
+
+/**
+ * @brief Configures the touch Screen IC device to start detecting touches
+ * @param DeviceAddr: Device address on communication Bus (I2C slave address).
+ * @retval None.
+ */
+void cy8c4014lqi_TS_Start(uint16_t DeviceAddr)
+{
+ /* Do nothing */
+ /* No software available in CY8C4014LQI IC */
+}
+
+/**
+ * @brief Return if there is touches detected or not.
+ * Try to detect new touches and forget the old ones (reset internal global
+ * variables).
+ * @param DeviceAddr: Device address on communication Bus.
+ * @retval : Number of active touches detected (can be 0, 1 or 2).
+ */
+uint8_t cy8c4014lqi_TS_DetectTouch(uint16_t DeviceAddr)
+{
+ return is_touch;
+}
+
+/**
+ * @brief Get the touch screen X and Y positions values
+ * Manage multi touch thanks to touch Index global
+ * variable 'cy8c4014lqi_handle.currActiveTouchIdx'.
+ * @param DeviceAddr: Device address on communication Bus.
+ * @param X: Pointer to X position value
+ * @param Y: Pointer to Y position value
+ * @retval None.
+ */
+void cy8c4014lqi_TS_GetXY(uint16_t DeviceAddr, uint16_t *X, uint16_t *Y)
+{
+
+ *X = TS_IO_Read(CY8C4014LQI_ADDR, CY8C4014LQI_POS_X);
+ *Y = TS_IO_Read(CY8C4014LQI_ADDR, CY8C4014LQI_POS_Y);
+}
+
+/**
+ * @brief Configure the CY8C4014LQI device to generate IT on given INT pin
+ * connected to MCU as EXTI.
+ * @param DeviceAddr: Device address on communication Bus (Slave I2C address of CY8C4014LQI).
+ * @retval None
+ */
+void cy8c4014lqi_TS_EnableIT(uint16_t DeviceAddr)
+{
+ /* Do nothing */
+ /* Action done by BSP software */
+}
+
+/**
+ * @brief Configure the CY8C4014LQI device to stop generating IT on the given INT pin
+ * connected to MCU as EXTI.
+ * @param DeviceAddr: Device address on communication Bus (Slave I2C address of CY8C4014LQI).
+ * @retval None
+ */
+void cy8c4014lqi_TS_DisableIT(uint16_t DeviceAddr)
+{
+ /* Do nothing */
+ /* Action done by BSP software */
+}
+
+/**
+ * @brief Get IT status from CY8C4014LQI interrupt status registers
+ * Should be called Following an EXTI coming to the MCU to know the detailed
+ * reason of the interrupt.
+ * @note : This feature is not applicable to CY8C4014LQI.
+ * @param DeviceAddr: Device address on communication Bus (I2C slave address of CY8C4014LQI).
+ * @retval TS interrupts status : always return 0 here
+ */
+uint8_t cy8c4014lqi_TS_ITStatus(uint16_t DeviceAddr)
+{
+ /* Always return 0 as feature not applicable to CY8C4014LQI */
+ return 0U;
+}
+
+/**
+ * @brief Clear IT status in CY8C4014LQI interrupt status clear registers
+ * Should be called Following an EXTI coming to the MCU.
+ * @note : This feature is not applicable to CY8C4014LQI.
+ * @param DeviceAddr: Device address on communication Bus (I2C slave address of CY8C4014LQI).
+ * @retval None
+ */
+void cy8c4014lqi_TS_ClearIT(uint16_t DeviceAddr)
+{
+ /* Do nothing */
+ /* Action done by BSP software */
+}
+
+/**
+ * @brief Configure gesture feature (enable/disable).
+ * @param DeviceAddr: Device address on communication Bus (I2C slave address of CY8C4014LQI).
+ * @param Activation : Enable or disable gesture feature. Possible values are
+ * CY8C4014LQI_GESTURE_DISABLE or CY8C4014LQI_GESTURE_ENABLE.
+ * @retval None.
+ */
+void cy8c4014lqi_TS_GestureConfig(uint16_t DeviceAddr, uint32_t Activation)
+{
+ /* Do nothing */
+ /* No software available in CY8C4014LQI IC */
+}
+
+/**
+ * @brief Get the last touch gesture identification (zoom, move up/down...).
+ * @param DeviceAddr: Device address on communication Bus (I2C slave address of CY8C4014LQI).
+ * @param pGestureId : Pointer to get last touch gesture Identification.
+ * @retval None.
+ */
+void cy8c4014lqi_TS_GetGestureID(uint16_t DeviceAddr, uint32_t * pGestureId)
+{
+ /* Do nothing */
+ /* No software available in CY8C4014LQI IC */
+}
+
+/**
+ * @brief Get the touch detailed informations on touch number 'touchIdx' (0..1)
+ * This touch detailed information contains :
+ * - weight that was applied to this touch
+ * - sub-area of the touch in the touch panel
+ * - event of linked to the touch (press down, lift up, ...)
+ * @param DeviceAddr: Device address on communication Bus (I2C slave address of CY8C4014LQI).
+ * @param touchIdx : Passed index of the touch (0..1) on which we want to get the
+ * detailed information.
+ * @param pWeight : Pointer to to get the weight information of 'touchIdx'.
+ * @param pArea : Pointer to to get the sub-area information of 'touchIdx'.
+ * @param pEvent : Pointer to to get the event information of 'touchIdx'.
+ * @note Area and Weight features are not supported by CY8C4014LQI. Return always 0 value.
+ * @retval None.
+ */
+void cy8c4014lqi_TS_GetTouchInfo(uint16_t DeviceAddr,
+ uint32_t touchIdx,
+ uint32_t * pWeight,
+ uint32_t * pArea,
+ uint32_t * pEvent)
+{
+ /* Do nothing */
+ /* No software available in CY8C4014LQI IC */
+}
+
+/**
+ * @}
+ */
+
+/* Private functions bodies---------------------------------------------------*/
+
+/** @addtogroup CY8C4014LQI_Private_Functions
+ * @{
+ */
+
+/**
+ * @brief Return the status of I2C was initialized or not.
+ * @param None.
+ * @retval : I2C initialization status.
+ */
+static uint8_t cy8c4014lqi_Get_I2C_InitializedStatus(void)
+{
+ return(cy8c4014lqi_handle.i2cInitialized);
+}
+
+/**
+ * @brief I2C initialize if needed.
+ * @param None.
+ * @retval : None.
+ */
+static void cy8c4014lqi_I2C_InitializeIfRequired(void)
+{
+ if(cy8c4014lqi_Get_I2C_InitializedStatus() == CY8C4014LQI_I2C_NOT_INITIALIZED)
+ {
+ /* Initialize TS IO BUS layer (I2C) */
+ TS_IO_Init();
+
+ /* Set state to initialized */
+ cy8c4014lqi_handle.i2cInitialized = CY8C4014LQI_I2C_INITIALIZED;
+ }
+}
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/P3_SETR2/Components/cy8c4014lqi/cy8c4014lqi.h b/P3_SETR2/Components/cy8c4014lqi/cy8c4014lqi.h
new file mode 100644
index 0000000..daeb7b6
--- /dev/null
+++ b/P3_SETR2/Components/cy8c4014lqi/cy8c4014lqi.h
@@ -0,0 +1,165 @@
+/**
+ ******************************************************************************
+ * @file cy8c4014lqi.h
+ * @author MCD Application Team
+ * @brief This file contains all the functions prototypes for the
+ * cy8c4014lqi.c touch screen driver.
+ ******************************************************************************
+ * @attention
+ *
+ * © COPYRIGHT(c) 2017 STMicroelectronics
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ * 3. Neither the name of STMicroelectronics nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __CY8C4014LQI_H
+#define __CY8C4014LQI_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "../Common/ts.h"
+
+/** @addtogroup BSP
+ * @{
+ */
+
+/** @addtogroup Component
+ * @{
+ */
+
+/** @defgroup CY8C4014LQI
+ * @{
+ */
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/** @defgroup CY8C4014LQI_Exported_Constants
+ * @{
+ */
+#define CY8C4014LQI_ADDR (0x08<<1)
+
+#define CY8C4014LQI_ADEVICE_ID (0x00)
+#define CY8C4014LQI_VERSION (0x01)
+#define CY8C4014LQI_SYSMODE (0x03)
+#define CY8C4014LQI_TOUCH_EVENT (0x04)
+#define CY8C4014LQI_POS_X (0x06)
+#define CY8C4014LQI_POS_Y (0x07)
+#define CY8C4014LQI_GESTURE (0x08)
+#define CY8C4014LQI_DISTENCE_X (0x09)
+#define CY8C4014LQI_DISTENCE_Y (0x0A)
+#define DATA_VALUE_FLAG (0x0B)
+
+
+/* Possible values of global variable 'TS_I2C_Initialized' */
+#define CY8C4014LQI_I2C_NOT_INITIALIZED 0x00U
+#define CY8C4014LQI_I2C_INITIALIZED 0x01U
+
+
+/**
+ * @}
+ */
+
+/* Exported macro ------------------------------------------------------------*/
+/* Exported functions --------------------------------------------------------*/
+
+/** @defgroup CY8C4014LQI_Exported_Functions
+ * @{
+ */
+
+void cy8c4014lqi_Init(uint16_t DeviceAddr);
+void cy8c4014lqi_Reset(uint16_t DeviceAddr);
+uint16_t cy8c4014lqi_ReadID(uint16_t DeviceAddr);
+void cy8c4014lqi_TS_Start(uint16_t DeviceAddr);
+uint8_t cy8c4014lqi_TS_DetectTouch(uint16_t DeviceAddr);
+void cy8c4014lqi_TS_GetXY(uint16_t DeviceAddr, uint16_t *X, uint16_t *Y);
+void cy8c4014lqi_TS_EnableIT(uint16_t DeviceAddr);
+void cy8c4014lqi_TS_DisableIT(uint16_t DeviceAddr);
+uint8_t cy8c4014lqi_TS_ITStatus (uint16_t DeviceAddr);
+void cy8c4014lqi_TS_ClearIT (uint16_t DeviceAddr);
+void cy8c4014lqi_TS_GestureConfig(uint16_t DeviceAddr, uint32_t Activation);
+void cy8c4014lqi_TS_GetGestureID(uint16_t DeviceAddr, uint32_t * pGestureId);
+void cy8c4014lqi_TS_GetTouchInfo(uint16_t DeviceAddr,
+ uint32_t touchIdx,
+ uint32_t * pWeight,
+ uint32_t * pArea,
+ uint32_t * pEvent);
+
+/**
+ * @}
+ */
+
+/* Imported TS IO functions --------------------------------------------------------*/
+
+/** @defgroup CY8C4014LQI_Imported_Functions
+ * @{
+ */
+
+/* TouchScreen (TS) external IO functions */
+extern void TS_IO_Init(void);
+extern void TS_IO_Write(uint8_t Addr, uint8_t Reg, uint8_t Value);
+extern uint8_t TS_IO_Read(uint8_t Addr, uint8_t Reg);
+extern uint16_t TS_IO_ReadMultiple(uint8_t Addr, uint8_t Reg, uint8_t *Buffer, uint16_t Length);
+extern void TS_IO_Delay(uint32_t Delay);
+
+/**
+ * @}
+ */
+
+/* Imported global variables --------------------------------------------------------*/
+
+/** @defgroup CY8C4014LQI_Imported_Globals
+ * @{
+ */
+
+/* Touch screen driver structure */
+extern TS_DrvTypeDef cy8c4014lqi_ts_drv;
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+#ifdef __cplusplus
+}
+#endif
+#endif /* __CY8C4014LQI_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/P3_SETR2/Components/ft3x67/Release_Notes.html b/P3_SETR2/Components/ft3x67/Release_Notes.html
new file mode 100644
index 0000000..e758057
--- /dev/null
+++ b/P3_SETR2/Components/ft3x67/Release_Notes.html
@@ -0,0 +1,65 @@
+
+
+
+
+
+
+ Release Notes for FT3X67 Component Drivers
+
+
+
+
+
+
+
+
+
+
+Release Notes for FT3X67 Component Drivers
+Copyright © 2017 STMicroelectronics
+
+
+
+
+
+
License
+
Licensed by ST under BSD 3-Clause license (the "License"). You may not use this package except in compliance with the License. You may obtain a copy of the License at:
+
https://opensource.org/licenses/BSD-3-Clause
+
Purpose
+
This directory contains the FT3X67 component drivers.
+
+
+
Update History
+
+
V1.0.1 / 03-April-2019
+
+
Main Changes
+
+Update release notes format
+Reformat the BSD 3-Clause license declaration in the files header (replace license terms by a web reference to OSI website where those terms lie)
+
+
+
+
+
V1.0.0 / 07-August-2017
+
+
Main Changes
+
+First official release of Touch Screen FT3x67 Component driver
+
+
+
+
+
+
+
+
diff --git a/P3_SETR2/Components/ft3x67/ft3x67.c b/P3_SETR2/Components/ft3x67/ft3x67.c
new file mode 100644
index 0000000..2bbaaaf
--- /dev/null
+++ b/P3_SETR2/Components/ft3x67/ft3x67.c
@@ -0,0 +1,443 @@
+/**
+ ******************************************************************************
+ * @file ft3x67.c
+ * @author MCD Application Team
+ * @brief This file provides a set of functions needed to manage the FT3X67
+ * touch screen devices.
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2017 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/* Includes ------------------------------------------------------------------*/
+#include "ft3x67.h"
+
+/** @addtogroup BSP
+ * @{
+ */
+
+/** @addtogroup Component
+ * @{
+ */
+
+/** @addtogroup FT3X67
+ * @{
+ */
+
+/* Private typedef -----------------------------------------------------------*/
+
+/** @defgroup FT3X67_Private_Types_Definitions
+ * @{
+ */
+
+/* ft3x67 Handle definition. */
+typedef struct
+{
+ uint8_t i2cInitialized;
+
+ /* field holding the current number of simultaneous active touches */
+ uint8_t currActiveTouchNb;
+
+ /* field holding the touch index currently managed */
+ uint8_t currActiveTouchIdx;
+
+} ft3x67_handle_TypeDef;
+
+/**
+ * @}
+ */
+
+/* Private define ------------------------------------------------------------*/
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+
+/** @defgroup FT3X67_Private_Variables
+ * @{
+ */
+
+/* Touch screen driver structure initialization */
+TS_DrvTypeDef ft3x67_ts_drv =
+{
+ ft3x67_Init,
+ ft3x67_ReadID,
+ ft3x67_Reset,
+ ft3x67_TS_Start,
+ ft3x67_TS_DetectTouch,
+ ft3x67_TS_GetXY,
+ ft3x67_TS_EnableIT,
+ ft3x67_TS_ClearIT,
+ ft3x67_TS_ITStatus,
+ ft3x67_TS_DisableIT
+};
+
+/* Global ft3x67 handle */
+static ft3x67_handle_TypeDef ft3x67_handle = { FT3X67_I2C_NOT_INITIALIZED, 0U, 0U};
+
+/**
+ * @}
+ */
+
+/* Private functions prototypes-----------------------------------------------*/
+
+/** @defgroup FT3X67_Private_Functions
+ * @{
+ */
+
+static uint8_t ft3x67_Get_I2C_InitializedStatus(void);
+static void ft3x67_I2C_InitializeIfRequired(void);
+static uint32_t ft3x67_TS_Configure(uint16_t DeviceAddr);
+
+/**
+ * @}
+ */
+
+/* Exported functions --------------------------------------------------------*/
+
+/** @addtogroup FT3X67_Exported_Functions
+ * @{
+ */
+
+/**
+ * @brief Initialize the ft3x67 communication bus
+ * from MCU to FT3X67 : ie I2C channel initialization (if required).
+ * @param DeviceAddr: Device address on communication Bus (I2C slave address of FT3X67).
+ * @retval None
+ */
+void ft3x67_Init(uint16_t DeviceAddr)
+{
+ /* Initialize I2C link if needed */
+ ft3x67_I2C_InitializeIfRequired();
+}
+
+/**
+ * @brief Software Reset the ft3x67.
+ * @note : Not applicable to FT3X67.
+ * @param DeviceAddr: Device address on communication Bus (I2C slave address of FT3X67).
+ * @retval None
+ */
+void ft3x67_Reset(uint16_t DeviceAddr)
+{
+ /* Do nothing */
+ /* No software reset sequence available in FT3X67 IC */
+}
+
+/**
+ * @brief Read the ft3x67 device ID, pre initialize I2C in case of need to be
+ * able to read the FT3X67 device ID, and verify this is a FT3X67.
+ * @param DeviceAddr: I2C FT3X67 Slave address.
+ * @retval The Device ID (two bytes).
+ */
+uint16_t ft3x67_ReadID(uint16_t DeviceAddr)
+{
+ /* Initialize I2C link if needed */
+ ft3x67_I2C_InitializeIfRequired();
+
+ /* Return the device ID value */
+ return(TS_IO_Read(DeviceAddr, FT3X67_CHIP_ID_REG));
+}
+
+/**
+ * @brief Configures the touch Screen IC device to start detecting touches
+ * @param DeviceAddr: Device address on communication Bus (I2C slave address).
+ * @retval None.
+ */
+void ft3x67_TS_Start(uint16_t DeviceAddr)
+{
+ /* Minimum static configuration of FT3X67 */
+ ft3x67_TS_Configure(DeviceAddr);
+
+ /* By default set FT3X67 IC in Polling mode : no INT generation on FT3X67 for new touch available */
+ /* Note TS_INT is active low */
+ ft3x67_TS_DisableIT(DeviceAddr);
+}
+
+/**
+ * @brief Return if there is touches detected or not.
+ * Try to detect new touches and forget the old ones (reset internal global
+ * variables).
+ * @param DeviceAddr: Device address on communication Bus.
+ * @retval : Number of active touches detected (can be 0, 1 or 2).
+ */
+uint8_t ft3x67_TS_DetectTouch(uint16_t DeviceAddr)
+{
+ volatile uint8_t nbTouch = 0U;
+
+ /* Read register FT3X67_TD_STAT_REG to check number of touches detection */
+ nbTouch = TS_IO_Read(DeviceAddr, FT3X67_TD_STAT_REG);
+ nbTouch &= FT3X67_TD_STAT_MASK;
+
+ if(nbTouch > FT3X67_MAX_DETECTABLE_TOUCH)
+ {
+ /* If invalid number of touch detected, set it to zero */
+ nbTouch = 0U;
+ }
+
+ /* Update ft3x67 driver internal global : current number of active touches */
+ ft3x67_handle.currActiveTouchNb = nbTouch;
+
+ /* Reset current active touch index on which to work on */
+ ft3x67_handle.currActiveTouchIdx = 0U;
+
+ return(nbTouch);
+}
+
+/**
+ * @brief Get the touch screen X and Y positions values
+ * Manage multi touch thanks to touch Index global
+ * variable 'ft3x67_handle.currActiveTouchIdx'.
+ * @param DeviceAddr: Device address on communication Bus.
+ * @param X: Pointer to X position value
+ * @param Y: Pointer to Y position value
+ * @retval None.
+ */
+void ft3x67_TS_GetXY(uint16_t DeviceAddr, uint16_t *X, uint16_t *Y)
+{
+ uint8_t regAddress = 0U;
+ uint8_t dataxy[4U];
+
+ if(ft3x67_handle.currActiveTouchIdx < ft3x67_handle.currActiveTouchNb)
+ {
+ switch(ft3x67_handle.currActiveTouchIdx)
+ {
+ case 0U :
+ regAddress = FT3X67_P1_XH_REG;
+ break;
+
+ case 1U :
+ regAddress = FT3X67_P2_XH_REG;
+ break;
+
+ default :
+ break;
+ } /* end switch(ft3x67_handle.currActiveTouchIdx) */
+
+ /* Read X and Y positions */
+ TS_IO_ReadMultiple(DeviceAddr, regAddress, dataxy, sizeof(dataxy));
+
+ /* Send back ready X position to caller */
+ *X = ((dataxy[0U] & FT3X67_TOUCH_POS_MSB_MASK) << 8U) | dataxy[1U];
+
+ /* Send back ready Y position to caller */
+ *Y = ((dataxy[2U] & FT3X67_TOUCH_POS_MSB_MASK) << 8U) | dataxy[3U];
+
+ /* Increment current touch index */
+ ft3x67_handle.currActiveTouchIdx++;
+ }
+}
+
+/**
+ * @brief Configure the FT3X67 device to generate IT on given INT pin
+ * connected to MCU as EXTI.
+ * @param DeviceAddr: Device address on communication Bus (Slave I2C address of FT3X67).
+ * @retval None
+ */
+void ft3x67_TS_EnableIT(uint16_t DeviceAddr)
+{
+ /* Set interrupt trigger mode in FT3X67_GMODE_REG */
+ TS_IO_Write(DeviceAddr, FT3X67_GMODE_REG, FT3X67_G_MODE_INTERRUPT_TRIGGER);
+}
+
+/**
+ * @brief Configure the FT3X67 device to stop generating IT on the given INT pin
+ * connected to MCU as EXTI.
+ * @param DeviceAddr: Device address on communication Bus (Slave I2C address of FT3X67).
+ * @retval None
+ */
+void ft3x67_TS_DisableIT(uint16_t DeviceAddr)
+{
+ /* Set interrupt polling mode in FT3X67_GMODE_REG */
+ TS_IO_Write(DeviceAddr, FT3X67_GMODE_REG, FT3X67_G_MODE_INTERRUPT_POLLING);
+}
+
+/**
+ * @brief Get IT status from FT3X67 interrupt status registers
+ * Should be called Following an EXTI coming to the MCU to know the detailed
+ * reason of the interrupt.
+ * @note : This feature is not applicable to FT3X67.
+ * @param DeviceAddr: Device address on communication Bus (I2C slave address of FT3X67).
+ * @retval TS interrupts status : always return 0 here
+ */
+uint8_t ft3x67_TS_ITStatus(uint16_t DeviceAddr)
+{
+ /* Always return 0 as feature not applicable to FT3X67 */
+ return 0U;
+}
+
+/**
+ * @brief Clear IT status in FT3X67 interrupt status clear registers
+ * Should be called Following an EXTI coming to the MCU.
+ * @note : This feature is not applicable to FT3X67.
+ * @param DeviceAddr: Device address on communication Bus (I2C slave address of FT3X67).
+ * @retval None
+ */
+void ft3x67_TS_ClearIT(uint16_t DeviceAddr)
+{
+ /* Nothing to be done here for FT3X67 */
+}
+
+/**
+ * @brief Configure gesture feature (enable/disable).
+ * @param DeviceAddr: Device address on communication Bus (I2C slave address of FT3X67).
+ * @param Activation : Enable or disable gesture feature. Possible values are
+ * FT3X67_GESTURE_DISABLE or FT3X67_GESTURE_ENABLE.
+ * @retval None.
+ */
+void ft3x67_TS_GestureConfig(uint16_t DeviceAddr, uint32_t Activation)
+{
+ if(Activation == FT3X67_GESTURE_ENABLE)
+ {
+ /* Enable gesture feature. */
+ TS_IO_Write(DeviceAddr, FT3X67_GESTURE_FLAG_REG, FT3X67_GEST_ALL_FLAGS_ENABLE);
+ TS_IO_Write(DeviceAddr, FT3X67_GESTURE_ENABLE_REG, FT3X67_GESTURE_ENABLE);
+ }
+ else
+ {
+ /* Disable gesture feature. */
+ TS_IO_Write(DeviceAddr, FT3X67_GESTURE_FLAG_REG, FT3X67_GEST_ALL_FLAGS_DISABLE);
+ TS_IO_Write(DeviceAddr, FT3X67_GESTURE_ENABLE_REG, FT3X67_GESTURE_DISABLE);
+ }
+}
+
+/**
+ * @brief Get the last touch gesture identification (zoom, move up/down...).
+ * @param DeviceAddr: Device address on communication Bus (I2C slave address of FT3X67).
+ * @param pGestureId : Pointer to get last touch gesture Identification.
+ * @retval None.
+ */
+void ft3x67_TS_GetGestureID(uint16_t DeviceAddr, uint32_t * pGestureId)
+{
+ volatile uint8_t ucReadData = 0U;
+
+ ucReadData = TS_IO_Read(DeviceAddr, FT3X67_GEST_ID_REG);
+
+ *pGestureId = ucReadData;
+}
+
+/**
+ * @brief Get the touch detailed informations on touch number 'touchIdx' (0..1)
+ * This touch detailed information contains :
+ * - weight that was applied to this touch
+ * - sub-area of the touch in the touch panel
+ * - event of linked to the touch (press down, lift up, ...)
+ * @param DeviceAddr: Device address on communication Bus (I2C slave address of FT3X67).
+ * @param touchIdx : Passed index of the touch (0..1) on which we want to get the
+ * detailed information.
+ * @param pWeight : Pointer to to get the weight information of 'touchIdx'.
+ * @param pArea : Pointer to to get the sub-area information of 'touchIdx'.
+ * @param pEvent : Pointer to to get the event information of 'touchIdx'.
+ * @note Area and Weight features are not supported by FT3X67. Return always 0 value.
+ * @retval None.
+ */
+void ft3x67_TS_GetTouchInfo(uint16_t DeviceAddr,
+ uint32_t touchIdx,
+ uint32_t * pWeight,
+ uint32_t * pArea,
+ uint32_t * pEvent)
+{
+ volatile uint8_t ucReadData = 0U;
+ uint8_t regAddressXHigh = 0U;
+
+ if(touchIdx < ft3x67_handle.currActiveTouchNb)
+ {
+ switch(touchIdx)
+ {
+ case 0U :
+ regAddressXHigh = FT3X67_P1_XH_REG;
+ break;
+
+ case 1U :
+ regAddressXHigh = FT3X67_P2_XH_REG;
+ break;
+ default :
+ break;
+ } /* end switch(touchIdx) */
+
+ /* Read Event Id of touch index */
+ ucReadData = TS_IO_Read(DeviceAddr, regAddressXHigh);
+ *pEvent = (ucReadData & FT3X67_TOUCH_EVT_FLAG_MASK) >> FT3X67_TOUCH_EVT_FLAG_SHIFT;
+
+ /* Weight and area of touch index not supported by FT3X67 */
+ *pWeight = 0;
+ *pArea = 0;
+ } /* of if(touchIdx < ft3x67_handle.currActiveTouchNb) */
+}
+
+/**
+ * @}
+ */
+
+/* Private functions bodies---------------------------------------------------*/
+
+/** @addtogroup FT3X67_Private_Functions
+ * @{
+ */
+
+/**
+ * @brief Return the status of I2C was initialized or not.
+ * @param None.
+ * @retval : I2C initialization status.
+ */
+static uint8_t ft3x67_Get_I2C_InitializedStatus(void)
+{
+ return(ft3x67_handle.i2cInitialized);
+}
+
+/**
+ * @brief I2C initialize if needed.
+ * @param None.
+ * @retval : None.
+ */
+static void ft3x67_I2C_InitializeIfRequired(void)
+{
+ if(ft3x67_Get_I2C_InitializedStatus() == FT3X67_I2C_NOT_INITIALIZED)
+ {
+ /* Initialize TS IO BUS layer (I2C) */
+ TS_IO_Init();
+
+ /* Set state to initialized */
+ ft3x67_handle.i2cInitialized = FT3X67_I2C_INITIALIZED;
+ }
+}
+
+/**
+ * @brief Basic static configuration of TouchScreen
+ * @param DeviceAddr: FT3X67 Device address for communication on I2C Bus.
+ * @retval Status FT3X67_STATUS_OK or FT3X67_STATUS_NOT_OK.
+ */
+static uint32_t ft3x67_TS_Configure(uint16_t DeviceAddr)
+{
+ uint32_t status = FT3X67_STATUS_OK;
+
+ /* Disable gesture feature */
+ TS_IO_Write(DeviceAddr, FT3X67_GESTURE_ENABLE_REG, FT3X67_GESTURE_DISABLE);
+
+ return(status);
+}
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/P3_SETR2/Components/ft3x67/ft3x67.h b/P3_SETR2/Components/ft3x67/ft3x67.h
new file mode 100644
index 0000000..cd34bc3
--- /dev/null
+++ b/P3_SETR2/Components/ft3x67/ft3x67.h
@@ -0,0 +1,273 @@
+/**
+ ******************************************************************************
+ * @file ft3x67.h
+ * @author MCD Application Team
+ * @brief This file contains all the functions prototypes for the
+ * ft3x67.c touch screen driver.
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2017 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __FT3X67_H
+#define __FT3X67_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "../Common/ts.h"
+
+/** @addtogroup BSP
+ * @{
+ */
+
+/** @addtogroup Component
+ * @{
+ */
+
+/** @defgroup FT3X67
+ * @{
+ */
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/** @defgroup FT3X67_Exported_Constants
+ * @{
+ */
+
+/* Maximum border values of the touchscreen pad */
+#define FT3X67_MAX_WIDTH 390U /* Touchscreen pad max width */
+#define FT3X67_MAX_HEIGHT 390U /* Touchscreen pad max height */
+
+/* Possible values of driver functions return status */
+#define FT3X67_STATUS_OK 0x00U
+#define FT3X67_STATUS_NOT_OK 0x01U
+
+/* Possible values of global variable 'TS_I2C_Initialized' */
+#define FT3X67_I2C_NOT_INITIALIZED 0x00U
+#define FT3X67_I2C_INITIALIZED 0x01U
+
+/* Max detectable simultaneous touches */
+#define FT3X67_MAX_DETECTABLE_TOUCH 0x02U
+
+/* Definitions for FT3X67 registers */
+
+/* Current mode register of the FT3X67 (R/W) */
+#define FT3X67_DEV_MODE_REG 0x00U
+/* Possible values of FT3X67_DEV_MODE_REG */
+#define FT3X67_DEV_MODE_WORKING 0x00U
+#define FT3X67_DEV_MODE_FACTORY 0x40U
+
+/* Touch Data Status register : gives number of active touch points (0..2) */
+#define FT3X67_TD_STAT_REG 0x02U
+/* Values related to FT3X67_TD_STAT_REG */
+#define FT3X67_TD_STAT_MASK 0x0FU
+
+/* Values Pn_XH and Pn_YH related */
+#define FT3X67_TOUCH_EVT_FLAG_PRESS_DOWN 0x00U
+#define FT3X67_TOUCH_EVT_FLAG_LIFT_UP 0x01U
+#define FT3X67_TOUCH_EVT_FLAG_CONTACT 0x02U
+#define FT3X67_TOUCH_EVT_FLAG_NO_EVENT 0x03U
+#define FT3X67_TOUCH_EVT_FLAG_SHIFT 0x06U
+#define FT3X67_TOUCH_EVT_FLAG_MASK (3U << FT3X67_TOUCH_EVT_FLAG_SHIFT)
+#define FT3X67_TOUCH_POS_MSB_MASK 0x0FU
+
+/* Point 1 registers */
+#define FT3X67_P1_XH_REG 0x03U
+#define FT3X67_P1_XL_REG 0x04U
+#define FT3X67_P1_YH_REG 0x05U
+#define FT3X67_P1_YL_REG 0x06U
+#define FT3X67_P1_WEIGHT_REG 0x07U
+#define FT3X67_P1_MISC_REG 0x08U
+
+/* Point 2 registers */
+#define FT3X67_P2_XH_REG 0x09U
+#define FT3X67_P2_XL_REG 0x0AU
+#define FT3X67_P2_YH_REG 0x0BU
+#define FT3X67_P2_YL_REG 0x0CU
+#define FT3X67_P2_WEIGHT_REG 0x0DU
+#define FT3X67_P2_MISC_REG 0x0EU
+
+/* Values related to Pn_MISC register */
+#define FT3X67_TOUCH_AREA_MASK (0xFU << FT3X67_TOUCH_AREA_SHIFT)
+#define FT3X67_TOUCH_AREA_SHIFT 0x04U
+
+/* Threshold for touch detection register */
+#define FT3X67_TH_GROUP_REG 0x80U
+
+/* Filter function coefficients register */
+#define FT3X67_TH_DIFF_REG 0x85U
+
+/* Control register */
+#define FT3X67_CTRL_REG 0x86U
+/* Values related to FT3X67_CTRL_REG */
+#define FT3X67_CTRL_KEEP_ACTIVE_MODE 0x00U
+#define FT3X67_CTRL_KEEP_AUTO_SWITCH_MONITOR_MODE 0x01U
+
+/* The time period of switching from Active mode to Monitor mode when there is no touching */
+#define FT3X67_TIMEENTERMONITOR_REG 0x87U
+
+/* Report rate in Active mode */
+#define FT3X67_PERIODACTIVE_REG 0x88U
+
+/* Report rate in Monitor mode */
+#define FT3X67_PERIODMONITOR_REG 0x89U
+
+/* High 8-bit of LIB Version info */
+#define FT3X67_LIB_VER_H_REG 0xA1U
+
+/* Low 8-bit of LIB Version info */
+#define FT3X67_LIB_VER_L_REG 0xA2U
+
+/* Chip Selecting */
+#define FT3X67_CIPHER_REG 0xA3U
+
+/* Interrupt mode register (used when in interrupt mode) */
+#define FT3X67_GMODE_REG 0xA4U
+/* Possible values of FT3X67_GMODE_REG */
+#define FT3X67_G_MODE_INTERRUPT_POLLING 0x00U
+#define FT3X67_G_MODE_INTERRUPT_TRIGGER 0x01U
+
+/* Current power mode */
+#define FT3X67_PWR_MODE_REG 0xA5U
+
+/* Firmware version */
+#define FT3X67_FIRMID_REG 0xA6U
+
+/* Chip identification register */
+#define FT3X67_CHIP_ID_REG 0xA8U
+/* Possible values of FT3X67_CHIP_ID_REG */
+#define FT3X67_ID_VALUE 0x11U
+
+/* Release code version */
+#define FT3X67_RELEASE_CODE_ID_REG 0xAFU
+
+/* Current operating mode register */
+#define FT3X67_STATE_REG 0xBCU
+/* Possible values of FT3X67_STATE_REG */
+#define FT3X67_STATE_INFO_MODE 0x00U
+#define FT3X67_STATE_NORMAL_MODE 0x01U
+#define FT3X67_STATE_FACTORY_MODE 0x03U
+#define FT3X67_STATE_AUTO_CALIB_MODE 0x04U
+
+/* Gesture enable register */
+#define FT3X67_GESTURE_ENABLE_REG 0xD0U
+/* Possible values of FT3X67_GESTURE_ENABLE_REG */
+#define FT3X67_GESTURE_DISABLE 0x00U
+#define FT3X67_GESTURE_ENABLE 0x01U
+
+/* Gesture flag register */
+#define FT3X67_GESTURE_FLAG_REG 0xD1U
+/* Possible values of FT3X67_GESTURE_FLAG_REG can be any combination of following values */
+#define FT3X67_GEST_LINE_RIGHT_TO_LEFT_ENABLE 0x01U
+#define FT3X67_GEST_LINE_LEFT_TO_RIGHT_ENABLE 0x02U
+#define FT3X67_GEST_LINE_DOWN_TO_UP_ENABLE 0x04U
+#define FT3X67_GEST_LINE_UP_TO_DOWN_ENABLE 0x08U
+#define FT3X67_GEST_DOUBLE_TAP_ENABLE 0x10U
+#define FT3X67_GEST_ALL_FLAGS_ENABLE 0x1FU
+#define FT3X67_GEST_ALL_FLAGS_DISABLE 0x00U
+
+/* Gesture ID register */
+#define FT3X67_GEST_ID_REG 0xD3U
+/* Possible values of FT3X67_GEST_ID_REG */
+#define FT3X67_GEST_ID_NO_GESTURE 0x00U
+#define FT3X67_GEST_ID_MOVE_UP 0x22U
+#define FT3X67_GEST_ID_MOVE_RIGHT 0x21U
+#define FT3X67_GEST_ID_MOVE_DOWN 0x23U
+#define FT3X67_GEST_ID_MOVE_LEFT 0x20U
+#define FT3X67_GEST_ID_DOUBLE_CLICK 0x24U
+
+/**
+ * @}
+ */
+
+/* Exported macro ------------------------------------------------------------*/
+/* Exported functions --------------------------------------------------------*/
+
+/** @defgroup FT3X67_Exported_Functions
+ * @{
+ */
+
+void ft3x67_Init(uint16_t DeviceAddr);
+void ft3x67_Reset(uint16_t DeviceAddr);
+uint16_t ft3x67_ReadID(uint16_t DeviceAddr);
+void ft3x67_TS_Start(uint16_t DeviceAddr);
+uint8_t ft3x67_TS_DetectTouch(uint16_t DeviceAddr);
+void ft3x67_TS_GetXY(uint16_t DeviceAddr, uint16_t *X, uint16_t *Y);
+void ft3x67_TS_EnableIT(uint16_t DeviceAddr);
+void ft3x67_TS_DisableIT(uint16_t DeviceAddr);
+uint8_t ft3x67_TS_ITStatus (uint16_t DeviceAddr);
+void ft3x67_TS_ClearIT (uint16_t DeviceAddr);
+void ft3x67_TS_GestureConfig(uint16_t DeviceAddr, uint32_t Activation);
+void ft3x67_TS_GetGestureID(uint16_t DeviceAddr, uint32_t * pGestureId);
+void ft3x67_TS_GetTouchInfo(uint16_t DeviceAddr,
+ uint32_t touchIdx,
+ uint32_t * pWeight,
+ uint32_t * pArea,
+ uint32_t * pEvent);
+
+/**
+ * @}
+ */
+
+/* Imported TS IO functions --------------------------------------------------------*/
+
+/** @defgroup FT3X67_Imported_Functions
+ * @{
+ */
+
+/* TouchScreen (TS) external IO functions */
+extern void TS_IO_Init(void);
+extern void TS_IO_Write(uint8_t Addr, uint8_t Reg, uint8_t Value);
+extern uint8_t TS_IO_Read(uint8_t Addr, uint8_t Reg);
+extern uint16_t TS_IO_ReadMultiple(uint8_t Addr, uint8_t Reg, uint8_t *Buffer, uint16_t Length);
+extern void TS_IO_Delay(uint32_t Delay);
+
+/**
+ * @}
+ */
+
+/* Imported global variables --------------------------------------------------------*/
+
+/** @defgroup FT3X67_Imported_Globals
+ * @{
+ */
+
+/* Touch screen driver structure */
+extern TS_DrvTypeDef ft3x67_ts_drv;
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+#ifdef __cplusplus
+}
+#endif
+#endif /* __FT3X67_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/P3_SETR2/Components/ft5336/Release_Notes.html b/P3_SETR2/Components/ft5336/Release_Notes.html
new file mode 100644
index 0000000..439641c
--- /dev/null
+++ b/P3_SETR2/Components/ft5336/Release_Notes.html
@@ -0,0 +1,73 @@
+
+
+
+
+
+
+ Release Notes for FT5336GQQ Component Drivers
+
+
+
+
+
+
+
+
+
+
+Release Notes for FT5336GQQ Component Drivers
+Copyright © 2015 STMicroelectronics
+
+
+
+
+
+
License
+
Licensed by ST under BSD 3-Clause license (the "License"). You may not use this package except in compliance with the License. You may obtain a copy of the License at:
+
https://opensource.org/licenses/BSD-3-Clause
+
Purpose
+
This directory contains the FT5336GQQ component drivers.
+
+
+
Update History
+
+
V1.0.2 / 03-April-2019
+
+
Main Changes
+
+Update release notes format
+
+
+
+
+
V1.0.1 / 31-August-2018
+
+
Main Changes
+
+Reformat the BSD 3-Clause license declaration in the files header (replace license terms by a web reference to OSI website where those terms lie)
+
+
+
+
+
V1.0.0 / 25-June-2015
+
+
Main Changes
+
+First official release
+
+
+
+
+
+
+
+
diff --git a/P3_SETR2/Components/ft5336/ft5336.c b/P3_SETR2/Components/ft5336/ft5336.c
new file mode 100644
index 0000000..d878260
--- /dev/null
+++ b/P3_SETR2/Components/ft5336/ft5336.c
@@ -0,0 +1,607 @@
+/**
+ ******************************************************************************
+ * @file ft5336.c
+ * @author MCD Application Team
+ * @brief This file provides a set of functions needed to manage the FT5336
+ * touch screen devices.
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2015 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/* Includes ------------------------------------------------------------------*/
+#include "ft5336.h"
+
+/** @addtogroup BSP
+ * @{
+ */
+
+/** @addtogroup Component
+ * @{
+ */
+
+/** @defgroup FT5336
+ * @{
+ */
+
+/* Private typedef -----------------------------------------------------------*/
+
+/** @defgroup FT5336_Private_Types_Definitions
+ * @{
+ */
+
+/* Private define ------------------------------------------------------------*/
+
+/** @defgroup FT5336_Private_Defines
+ * @{
+ */
+
+/* Private macro -------------------------------------------------------------*/
+
+/** @defgroup FT5336_Private_Macros
+ * @{
+ */
+
+/* Private variables ---------------------------------------------------------*/
+
+/** @defgroup FT5336_Private_Variables
+ * @{
+ */
+
+/* Touch screen driver structure initialization */
+TS_DrvTypeDef ft5336_ts_drv =
+{
+ ft5336_Init,
+ ft5336_ReadID,
+ ft5336_Reset,
+
+ ft5336_TS_Start,
+ ft5336_TS_DetectTouch,
+ ft5336_TS_GetXY,
+
+ ft5336_TS_EnableIT,
+ ft5336_TS_ClearIT,
+ ft5336_TS_ITStatus,
+ ft5336_TS_DisableIT
+
+};
+
+/* Global ft5336 handle */
+static ft5336_handle_TypeDef ft5336_handle = { FT5336_I2C_NOT_INITIALIZED, 0, 0};
+
+/**
+ * @}
+ */
+
+/** @defgroup ft5336_Private_Function_Prototypes
+ * @{
+ */
+
+/* Private functions prototypes-----------------------------------------------*/
+
+/**
+ * @brief Return the status of I2C was initialized or not.
+ * @param None.
+ * @retval : I2C initialization status.
+ */
+static uint8_t ft5336_Get_I2C_InitializedStatus(void);
+
+/**
+ * @brief I2C initialize if needed.
+ * @param None.
+ * @retval : None.
+ */
+static void ft5336_I2C_InitializeIfRequired(void);
+
+/**
+ * @brief Basic static configuration of TouchScreen
+ * @param DeviceAddr: FT5336 Device address for communication on I2C Bus.
+ * @retval Status FT5336_STATUS_OK or FT5336_STATUS_NOT_OK.
+ */
+static uint32_t ft5336_TS_Configure(uint16_t DeviceAddr);
+
+/** @defgroup ft5336_Private_Functions
+ * @{
+ */
+
+/** @defgroup ft5336_Public_Function_Body
+ * @{
+ */
+
+/* Public functions bodies-----------------------------------------------*/
+
+
+/**
+ * @brief Initialize the ft5336 communication bus
+ * from MCU to FT5336 : ie I2C channel initialization (if required).
+ * @param DeviceAddr: Device address on communication Bus (I2C slave address of FT5336).
+ * @retval None
+ */
+void ft5336_Init(uint16_t DeviceAddr)
+{
+ /* Wait at least 200ms after power up before accessing registers
+ * Trsi timing (Time of starting to report point after resetting) from FT5336GQQ datasheet */
+ TS_IO_Delay(200);
+
+ /* Initialize I2C link if needed */
+ ft5336_I2C_InitializeIfRequired();
+}
+
+/**
+ * @brief Software Reset the ft5336.
+ * @note : Not applicable to FT5336.
+ * @param DeviceAddr: Device address on communication Bus (I2C slave address of FT5336).
+ * @retval None
+ */
+void ft5336_Reset(uint16_t DeviceAddr)
+{
+ /* Do nothing */
+ /* No software reset sequence available in FT5336 IC */
+}
+
+/**
+ * @brief Read the ft5336 device ID, pre initialize I2C in case of need to be
+ * able to read the FT5336 device ID, and verify this is a FT5336.
+ * @param DeviceAddr: I2C FT5336 Slave address.
+ * @retval The Device ID (two bytes).
+ */
+uint16_t ft5336_ReadID(uint16_t DeviceAddr)
+{
+ volatile uint8_t ucReadId = 0;
+ uint8_t nbReadAttempts = 0;
+ uint8_t bFoundDevice = 0; /* Device not found by default */
+
+ /* Initialize I2C link if needed */
+ ft5336_I2C_InitializeIfRequired();
+
+ /* At maximum 4 attempts to read ID : exit at first finding of the searched device ID */
+ for(nbReadAttempts = 0; ((nbReadAttempts < 3) && !(bFoundDevice)); nbReadAttempts++)
+ {
+ /* Read register FT5336_CHIP_ID_REG as DeviceID detection */
+ ucReadId = TS_IO_Read(DeviceAddr, FT5336_CHIP_ID_REG);
+
+ /* Found the searched device ID ? */
+ if(ucReadId == FT5336_ID_VALUE)
+ {
+ /* Set device as found */
+ bFoundDevice = 1;
+ }
+ }
+
+ /* Return the device ID value */
+ return (ucReadId);
+}
+
+/**
+ * @brief Configures the touch Screen IC device to start detecting touches
+ * @param DeviceAddr: Device address on communication Bus (I2C slave address).
+ * @retval None.
+ */
+void ft5336_TS_Start(uint16_t DeviceAddr)
+{
+ /* Minimum static configuration of FT5336 */
+ FT5336_ASSERT(ft5336_TS_Configure(DeviceAddr));
+
+ /* By default set FT5336 IC in Polling mode : no INT generation on FT5336 for new touch available */
+ /* Note TS_INT is active low */
+ ft5336_TS_DisableIT(DeviceAddr);
+}
+
+/**
+ * @brief Return if there is touches detected or not.
+ * Try to detect new touches and forget the old ones (reset internal global
+ * variables).
+ * @param DeviceAddr: Device address on communication Bus.
+ * @retval : Number of active touches detected (can be 0, 1 or 2).
+ */
+uint8_t ft5336_TS_DetectTouch(uint16_t DeviceAddr)
+{
+ volatile uint8_t nbTouch = 0;
+
+ /* Read register FT5336_TD_STAT_REG to check number of touches detection */
+ nbTouch = TS_IO_Read(DeviceAddr, FT5336_TD_STAT_REG);
+ nbTouch &= FT5336_TD_STAT_MASK;
+
+ if(nbTouch > FT5336_MAX_DETECTABLE_TOUCH)
+ {
+ /* If invalid number of touch detected, set it to zero */
+ nbTouch = 0;
+ }
+
+ /* Update ft5336 driver internal global : current number of active touches */
+ ft5336_handle.currActiveTouchNb = nbTouch;
+
+ /* Reset current active touch index on which to work on */
+ ft5336_handle.currActiveTouchIdx = 0;
+
+ return(nbTouch);
+}
+
+/**
+ * @brief Get the touch screen X and Y positions values
+ * Manage multi touch thanks to touch Index global
+ * variable 'ft5336_handle.currActiveTouchIdx'.
+ * @param DeviceAddr: Device address on communication Bus.
+ * @param X: Pointer to X position value
+ * @param Y: Pointer to Y position value
+ * @retval None.
+ */
+void ft5336_TS_GetXY(uint16_t DeviceAddr, uint16_t *X, uint16_t *Y)
+{
+ volatile uint8_t ucReadData = 0;
+ static uint16_t coord;
+ uint8_t regAddressXLow = 0;
+ uint8_t regAddressXHigh = 0;
+ uint8_t regAddressYLow = 0;
+ uint8_t regAddressYHigh = 0;
+
+ if(ft5336_handle.currActiveTouchIdx < ft5336_handle.currActiveTouchNb)
+ {
+ switch(ft5336_handle.currActiveTouchIdx)
+ {
+ case 0 :
+ regAddressXLow = FT5336_P1_XL_REG;
+ regAddressXHigh = FT5336_P1_XH_REG;
+ regAddressYLow = FT5336_P1_YL_REG;
+ regAddressYHigh = FT5336_P1_YH_REG;
+ break;
+
+ case 1 :
+ regAddressXLow = FT5336_P2_XL_REG;
+ regAddressXHigh = FT5336_P2_XH_REG;
+ regAddressYLow = FT5336_P2_YL_REG;
+ regAddressYHigh = FT5336_P2_YH_REG;
+ break;
+
+ case 2 :
+ regAddressXLow = FT5336_P3_XL_REG;
+ regAddressXHigh = FT5336_P3_XH_REG;
+ regAddressYLow = FT5336_P3_YL_REG;
+ regAddressYHigh = FT5336_P3_YH_REG;
+ break;
+
+ case 3 :
+ regAddressXLow = FT5336_P4_XL_REG;
+ regAddressXHigh = FT5336_P4_XH_REG;
+ regAddressYLow = FT5336_P4_YL_REG;
+ regAddressYHigh = FT5336_P4_YH_REG;
+ break;
+
+ case 4 :
+ regAddressXLow = FT5336_P5_XL_REG;
+ regAddressXHigh = FT5336_P5_XH_REG;
+ regAddressYLow = FT5336_P5_YL_REG;
+ regAddressYHigh = FT5336_P5_YH_REG;
+ break;
+
+ case 5 :
+ regAddressXLow = FT5336_P6_XL_REG;
+ regAddressXHigh = FT5336_P6_XH_REG;
+ regAddressYLow = FT5336_P6_YL_REG;
+ regAddressYHigh = FT5336_P6_YH_REG;
+ break;
+
+ case 6 :
+ regAddressXLow = FT5336_P7_XL_REG;
+ regAddressXHigh = FT5336_P7_XH_REG;
+ regAddressYLow = FT5336_P7_YL_REG;
+ regAddressYHigh = FT5336_P7_YH_REG;
+ break;
+
+ case 7 :
+ regAddressXLow = FT5336_P8_XL_REG;
+ regAddressXHigh = FT5336_P8_XH_REG;
+ regAddressYLow = FT5336_P8_YL_REG;
+ regAddressYHigh = FT5336_P8_YH_REG;
+ break;
+
+ case 8 :
+ regAddressXLow = FT5336_P9_XL_REG;
+ regAddressXHigh = FT5336_P9_XH_REG;
+ regAddressYLow = FT5336_P9_YL_REG;
+ regAddressYHigh = FT5336_P9_YH_REG;
+ break;
+
+ case 9 :
+ regAddressXLow = FT5336_P10_XL_REG;
+ regAddressXHigh = FT5336_P10_XH_REG;
+ regAddressYLow = FT5336_P10_YL_REG;
+ regAddressYHigh = FT5336_P10_YH_REG;
+ break;
+
+ default :
+ break;
+
+ } /* end switch(ft5336_handle.currActiveTouchIdx) */
+
+ /* Read low part of X position */
+ ucReadData = TS_IO_Read(DeviceAddr, regAddressXLow);
+ coord = (ucReadData & FT5336_TOUCH_POS_LSB_MASK) >> FT5336_TOUCH_POS_LSB_SHIFT;
+
+ /* Read high part of X position */
+ ucReadData = TS_IO_Read(DeviceAddr, regAddressXHigh);
+ coord |= ((ucReadData & FT5336_TOUCH_POS_MSB_MASK) >> FT5336_TOUCH_POS_MSB_SHIFT) << 8;
+
+ /* Send back ready X position to caller */
+ *X = coord;
+
+ /* Read low part of Y position */
+ ucReadData = TS_IO_Read(DeviceAddr, regAddressYLow);
+ coord = (ucReadData & FT5336_TOUCH_POS_LSB_MASK) >> FT5336_TOUCH_POS_LSB_SHIFT;
+
+ /* Read high part of Y position */
+ ucReadData = TS_IO_Read(DeviceAddr, regAddressYHigh);
+ coord |= ((ucReadData & FT5336_TOUCH_POS_MSB_MASK) >> FT5336_TOUCH_POS_MSB_SHIFT) << 8;
+
+ /* Send back ready Y position to caller */
+ *Y = coord;
+
+ ft5336_handle.currActiveTouchIdx++; /* next call will work on next touch */
+
+ } /* of if(ft5336_handle.currActiveTouchIdx < ft5336_handle.currActiveTouchNb) */
+}
+
+/**
+ * @brief Configure the FT5336 device to generate IT on given INT pin
+ * connected to MCU as EXTI.
+ * @param DeviceAddr: Device address on communication Bus (Slave I2C address of FT5336).
+ * @retval None
+ */
+void ft5336_TS_EnableIT(uint16_t DeviceAddr)
+{
+ uint8_t regValue = 0;
+ regValue = (FT5336_G_MODE_INTERRUPT_TRIGGER & (FT5336_G_MODE_INTERRUPT_MASK >> FT5336_G_MODE_INTERRUPT_SHIFT)) << FT5336_G_MODE_INTERRUPT_SHIFT;
+
+ /* Set interrupt trigger mode in FT5336_GMODE_REG */
+ TS_IO_Write(DeviceAddr, FT5336_GMODE_REG, regValue);
+}
+
+/**
+ * @brief Configure the FT5336 device to stop generating IT on the given INT pin
+ * connected to MCU as EXTI.
+ * @param DeviceAddr: Device address on communication Bus (Slave I2C address of FT5336).
+ * @retval None
+ */
+void ft5336_TS_DisableIT(uint16_t DeviceAddr)
+{
+ uint8_t regValue = 0;
+ regValue = (FT5336_G_MODE_INTERRUPT_POLLING & (FT5336_G_MODE_INTERRUPT_MASK >> FT5336_G_MODE_INTERRUPT_SHIFT)) << FT5336_G_MODE_INTERRUPT_SHIFT;
+
+ /* Set interrupt polling mode in FT5336_GMODE_REG */
+ TS_IO_Write(DeviceAddr, FT5336_GMODE_REG, regValue);
+}
+
+/**
+ * @brief Get IT status from FT5336 interrupt status registers
+ * Should be called Following an EXTI coming to the MCU to know the detailed
+ * reason of the interrupt.
+ * @note : This feature is not applicable to FT5336.
+ * @param DeviceAddr: Device address on communication Bus (I2C slave address of FT5336).
+ * @retval TS interrupts status : always return 0 here
+ */
+uint8_t ft5336_TS_ITStatus(uint16_t DeviceAddr)
+{
+ /* Always return 0 as feature not applicable to FT5336 */
+ return 0;
+}
+
+/**
+ * @brief Clear IT status in FT5336 interrupt status clear registers
+ * Should be called Following an EXTI coming to the MCU.
+ * @note : This feature is not applicable to FT5336.
+ * @param DeviceAddr: Device address on communication Bus (I2C slave address of FT5336).
+ * @retval None
+ */
+void ft5336_TS_ClearIT(uint16_t DeviceAddr)
+{
+ /* Nothing to be done here for FT5336 */
+}
+
+/**** NEW FEATURES enabled when Multi-touch support is enabled ****/
+
+#if (TS_MULTI_TOUCH_SUPPORTED == 1)
+
+/**
+ * @brief Get the last touch gesture identification (zoom, move up/down...).
+ * @param DeviceAddr: Device address on communication Bus (I2C slave address of FT5336).
+ * @param pGestureId : Pointer to get last touch gesture Identification.
+ * @retval None.
+ */
+void ft5336_TS_GetGestureID(uint16_t DeviceAddr, uint32_t * pGestureId)
+{
+ volatile uint8_t ucReadData = 0;
+
+ ucReadData = TS_IO_Read(DeviceAddr, FT5336_GEST_ID_REG);
+
+ * pGestureId = ucReadData;
+}
+
+/**
+ * @brief Get the touch detailed informations on touch number 'touchIdx' (0..1)
+ * This touch detailed information contains :
+ * - weight that was applied to this touch
+ * - sub-area of the touch in the touch panel
+ * - event of linked to the touch (press down, lift up, ...)
+ * @param DeviceAddr: Device address on communication Bus (I2C slave address of FT5336).
+ * @param touchIdx : Passed index of the touch (0..1) on which we want to get the
+ * detailed information.
+ * @param pWeight : Pointer to to get the weight information of 'touchIdx'.
+ * @param pArea : Pointer to to get the sub-area information of 'touchIdx'.
+ * @param pEvent : Pointer to to get the event information of 'touchIdx'.
+
+ * @retval None.
+ */
+void ft5336_TS_GetTouchInfo(uint16_t DeviceAddr,
+ uint32_t touchIdx,
+ uint32_t * pWeight,
+ uint32_t * pArea,
+ uint32_t * pEvent)
+{
+ volatile uint8_t ucReadData = 0;
+ uint8_t regAddressXHigh = 0;
+ uint8_t regAddressPWeight = 0;
+ uint8_t regAddressPMisc = 0;
+
+ if(touchIdx < ft5336_handle.currActiveTouchNb)
+ {
+ switch(touchIdx)
+ {
+ case 0 :
+ regAddressXHigh = FT5336_P1_XH_REG;
+ regAddressPWeight = FT5336_P1_WEIGHT_REG;
+ regAddressPMisc = FT5336_P1_MISC_REG;
+ break;
+
+ case 1 :
+ regAddressXHigh = FT5336_P2_XH_REG;
+ regAddressPWeight = FT5336_P2_WEIGHT_REG;
+ regAddressPMisc = FT5336_P2_MISC_REG;
+ break;
+
+ case 2 :
+ regAddressXHigh = FT5336_P3_XH_REG;
+ regAddressPWeight = FT5336_P3_WEIGHT_REG;
+ regAddressPMisc = FT5336_P3_MISC_REG;
+ break;
+
+ case 3 :
+ regAddressXHigh = FT5336_P4_XH_REG;
+ regAddressPWeight = FT5336_P4_WEIGHT_REG;
+ regAddressPMisc = FT5336_P4_MISC_REG;
+ break;
+
+ case 4 :
+ regAddressXHigh = FT5336_P5_XH_REG;
+ regAddressPWeight = FT5336_P5_WEIGHT_REG;
+ regAddressPMisc = FT5336_P5_MISC_REG;
+ break;
+
+ case 5 :
+ regAddressXHigh = FT5336_P6_XH_REG;
+ regAddressPWeight = FT5336_P6_WEIGHT_REG;
+ regAddressPMisc = FT5336_P6_MISC_REG;
+ break;
+
+ case 6 :
+ regAddressXHigh = FT5336_P7_XH_REG;
+ regAddressPWeight = FT5336_P7_WEIGHT_REG;
+ regAddressPMisc = FT5336_P7_MISC_REG;
+ break;
+
+ case 7 :
+ regAddressXHigh = FT5336_P8_XH_REG;
+ regAddressPWeight = FT5336_P8_WEIGHT_REG;
+ regAddressPMisc = FT5336_P8_MISC_REG;
+ break;
+
+ case 8 :
+ regAddressXHigh = FT5336_P9_XH_REG;
+ regAddressPWeight = FT5336_P9_WEIGHT_REG;
+ regAddressPMisc = FT5336_P9_MISC_REG;
+ break;
+
+ case 9 :
+ regAddressXHigh = FT5336_P10_XH_REG;
+ regAddressPWeight = FT5336_P10_WEIGHT_REG;
+ regAddressPMisc = FT5336_P10_MISC_REG;
+ break;
+
+ default :
+ break;
+
+ } /* end switch(touchIdx) */
+
+ /* Read Event Id of touch index */
+ ucReadData = TS_IO_Read(DeviceAddr, regAddressXHigh);
+ * pEvent = (ucReadData & FT5336_TOUCH_EVT_FLAG_MASK) >> FT5336_TOUCH_EVT_FLAG_SHIFT;
+
+ /* Read weight of touch index */
+ ucReadData = TS_IO_Read(DeviceAddr, regAddressPWeight);
+ * pWeight = (ucReadData & FT5336_TOUCH_WEIGHT_MASK) >> FT5336_TOUCH_WEIGHT_SHIFT;
+
+ /* Read area of touch index */
+ ucReadData = TS_IO_Read(DeviceAddr, regAddressPMisc);
+ * pArea = (ucReadData & FT5336_TOUCH_AREA_MASK) >> FT5336_TOUCH_AREA_SHIFT;
+
+ } /* of if(touchIdx < ft5336_handle.currActiveTouchNb) */
+}
+
+#endif /* TS_MULTI_TOUCH_SUPPORTED == 1 */
+
+/** @defgroup ft5336_Static_Function_Body
+ * @{
+ */
+
+/* Static functions bodies-----------------------------------------------*/
+
+
+/**
+ * @brief Return the status of I2C was initialized or not.
+ * @param None.
+ * @retval : I2C initialization status.
+ */
+static uint8_t ft5336_Get_I2C_InitializedStatus(void)
+{
+ return(ft5336_handle.i2cInitialized);
+}
+
+/**
+ * @brief I2C initialize if needed.
+ * @param None.
+ * @retval : None.
+ */
+static void ft5336_I2C_InitializeIfRequired(void)
+{
+ if(ft5336_Get_I2C_InitializedStatus() == FT5336_I2C_NOT_INITIALIZED)
+ {
+ /* Initialize TS IO BUS layer (I2C) */
+ TS_IO_Init();
+
+ /* Set state to initialized */
+ ft5336_handle.i2cInitialized = FT5336_I2C_INITIALIZED;
+ }
+}
+
+/**
+ * @brief Basic static configuration of TouchScreen
+ * @param DeviceAddr: FT5336 Device address for communication on I2C Bus.
+ * @retval Status FT5336_STATUS_OK or FT5336_STATUS_NOT_OK.
+ */
+static uint32_t ft5336_TS_Configure(uint16_t DeviceAddr)
+{
+ uint32_t status = FT5336_STATUS_OK;
+
+ /* Nothing special to be done for FT5336 */
+
+ return(status);
+}
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/P3_SETR2/Components/ft5336/ft5336.h b/P3_SETR2/Components/ft5336/ft5336.h
new file mode 100644
index 0000000..1d65d34
--- /dev/null
+++ b/P3_SETR2/Components/ft5336/ft5336.h
@@ -0,0 +1,522 @@
+/**
+ ******************************************************************************
+ * @file ft5336.h
+ * @author MCD Application Team
+ * @brief This file contains all the functions prototypes for the
+ * ft5336.c Touch screen driver.
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2015 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __FT5336_H
+#define __FT5336_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Set Multi-touch as supported */
+#if !defined(TS_MONO_TOUCH_SUPPORTED)
+#define TS_MULTI_TOUCH_SUPPORTED 1
+#endif /* TS_MONO_TOUCH_SUPPORTED */
+
+/* Includes ------------------------------------------------------------------*/
+#include "../Common/ts.h"
+
+/* Macros --------------------------------------------------------------------*/
+
+#if defined(FT5336_ENABLE_ASSERT)
+/* Assert activated */
+#define FT5336_ASSERT(__condition__) do { if(__condition__) \
+ { \
+ while(1); \
+ } \
+ }while(0)
+#else
+/* Assert not activated : macro has no effect */
+#define FT5336_ASSERT(__condition__) do { if(__condition__) \
+ { \
+ ; \
+ } \
+ }while(0)
+#endif /* FT5336_ENABLE_ASSERT == 1 */
+
+/** @typedef ft5336_handle_TypeDef
+ * ft5336 Handle definition.
+ */
+typedef struct
+{
+ uint8_t i2cInitialized;
+
+ /* field holding the current number of simultaneous active touches */
+ uint8_t currActiveTouchNb;
+
+ /* field holding the touch index currently managed */
+ uint8_t currActiveTouchIdx;
+
+} ft5336_handle_TypeDef;
+
+ /** @addtogroup BSP
+ * @{
+ */
+
+ /** @addtogroup Component
+ * @{
+ */
+
+ /** @defgroup FT5336
+ * @{
+ */
+
+ /* Exported types ------------------------------------------------------------*/
+
+ /** @defgroup FT5336_Exported_Types
+ * @{
+ */
+
+ /* Exported constants --------------------------------------------------------*/
+
+ /** @defgroup FT5336_Exported_Constants
+ * @{
+ */
+
+ /* I2C Slave address of touchscreen FocalTech FT5336 */
+#define FT5336_I2C_SLAVE_ADDRESS ((uint8_t)0x70)
+
+ /* Maximum border values of the touchscreen pad */
+#define FT5336_MAX_WIDTH ((uint16_t)480) /* Touchscreen pad max width */
+#define FT5336_MAX_HEIGHT ((uint16_t)272) /* Touchscreen pad max height */
+
+ /* Possible values of driver functions return status */
+#define FT5336_STATUS_OK ((uint8_t)0x00)
+#define FT5336_STATUS_NOT_OK ((uint8_t)0x01)
+
+ /* Possible values of global variable 'TS_I2C_Initialized' */
+#define FT5336_I2C_NOT_INITIALIZED ((uint8_t)0x00)
+#define FT5336_I2C_INITIALIZED ((uint8_t)0x01)
+
+ /* Max detectable simultaneous touches */
+#define FT5336_MAX_DETECTABLE_TOUCH ((uint8_t)0x05)
+
+ /**
+ * @brief : Definitions for FT5336 I2C register addresses on 8 bit
+ **/
+
+ /* Current mode register of the FT5336 (R/W) */
+#define FT5336_DEV_MODE_REG ((uint8_t)0x00)
+
+ /* Possible values of FT5336_DEV_MODE_REG */
+#define FT5336_DEV_MODE_WORKING ((uint8_t)0x00)
+#define FT5336_DEV_MODE_FACTORY ((uint8_t)0x04)
+
+#define FT5336_DEV_MODE_MASK ((uint8_t)0x07)
+#define FT5336_DEV_MODE_SHIFT ((uint8_t)0x04)
+
+ /* Gesture ID register */
+#define FT5336_GEST_ID_REG ((uint8_t)0x01)
+
+ /* Possible values of FT5336_GEST_ID_REG */
+#define FT5336_GEST_ID_NO_GESTURE ((uint8_t)0x00)
+#define FT5336_GEST_ID_MOVE_UP ((uint8_t)0x10)
+#define FT5336_GEST_ID_MOVE_RIGHT ((uint8_t)0x14)
+#define FT5336_GEST_ID_MOVE_DOWN ((uint8_t)0x18)
+#define FT5336_GEST_ID_MOVE_LEFT ((uint8_t)0x1C)
+#define FT5336_GEST_ID_SINGLE_CLICK ((uint8_t)0x20)
+#define FT5336_GEST_ID_DOUBLE_CLICK ((uint8_t)0x22)
+#define FT5336_GEST_ID_ROTATE_CLOCKWISE ((uint8_t)0x28)
+#define FT5336_GEST_ID_ROTATE_C_CLOCKWISE ((uint8_t)0x29)
+#define FT5336_GEST_ID_ZOOM_IN ((uint8_t)0x40)
+#define FT5336_GEST_ID_ZOOM_OUT ((uint8_t)0x49)
+
+ /* Touch Data Status register : gives number of active touch points (0..5) */
+#define FT5336_TD_STAT_REG ((uint8_t)0x02)
+
+ /* Values related to FT5336_TD_STAT_REG */
+#define FT5336_TD_STAT_MASK ((uint8_t)0x0F)
+#define FT5336_TD_STAT_SHIFT ((uint8_t)0x00)
+
+ /* Values Pn_XH and Pn_YH related */
+#define FT5336_TOUCH_EVT_FLAG_PRESS_DOWN ((uint8_t)0x00)
+#define FT5336_TOUCH_EVT_FLAG_LIFT_UP ((uint8_t)0x01)
+#define FT5336_TOUCH_EVT_FLAG_CONTACT ((uint8_t)0x02)
+#define FT5336_TOUCH_EVT_FLAG_NO_EVENT ((uint8_t)0x03)
+
+#define FT5336_TOUCH_EVT_FLAG_SHIFT ((uint8_t)0x06)
+#define FT5336_TOUCH_EVT_FLAG_MASK ((uint8_t)(3 << FT5336_TOUCH_EVT_FLAG_SHIFT))
+
+#define FT5336_TOUCH_POS_MSB_MASK ((uint8_t)0x0F)
+#define FT5336_TOUCH_POS_MSB_SHIFT ((uint8_t)0x00)
+
+ /* Values Pn_XL and Pn_YL related */
+#define FT5336_TOUCH_POS_LSB_MASK ((uint8_t)0xFF)
+#define FT5336_TOUCH_POS_LSB_SHIFT ((uint8_t)0x00)
+
+#define FT5336_P1_XH_REG ((uint8_t)0x03)
+#define FT5336_P1_XL_REG ((uint8_t)0x04)
+#define FT5336_P1_YH_REG ((uint8_t)0x05)
+#define FT5336_P1_YL_REG ((uint8_t)0x06)
+
+/* Touch Pressure register value (R) */
+#define FT5336_P1_WEIGHT_REG ((uint8_t)0x07)
+
+/* Values Pn_WEIGHT related */
+#define FT5336_TOUCH_WEIGHT_MASK ((uint8_t)0xFF)
+#define FT5336_TOUCH_WEIGHT_SHIFT ((uint8_t)0x00)
+
+/* Touch area register */
+#define FT5336_P1_MISC_REG ((uint8_t)0x08)
+
+/* Values related to FT5336_Pn_MISC_REG */
+#define FT5336_TOUCH_AREA_MASK ((uint8_t)(0x04 << 4))
+#define FT5336_TOUCH_AREA_SHIFT ((uint8_t)0x04)
+
+#define FT5336_P2_XH_REG ((uint8_t)0x09)
+#define FT5336_P2_XL_REG ((uint8_t)0x0A)
+#define FT5336_P2_YH_REG ((uint8_t)0x0B)
+#define FT5336_P2_YL_REG ((uint8_t)0x0C)
+#define FT5336_P2_WEIGHT_REG ((uint8_t)0x0D)
+#define FT5336_P2_MISC_REG ((uint8_t)0x0E)
+
+#define FT5336_P3_XH_REG ((uint8_t)0x0F)
+#define FT5336_P3_XL_REG ((uint8_t)0x10)
+#define FT5336_P3_YH_REG ((uint8_t)0x11)
+#define FT5336_P3_YL_REG ((uint8_t)0x12)
+#define FT5336_P3_WEIGHT_REG ((uint8_t)0x13)
+#define FT5336_P3_MISC_REG ((uint8_t)0x14)
+
+#define FT5336_P4_XH_REG ((uint8_t)0x15)
+#define FT5336_P4_XL_REG ((uint8_t)0x16)
+#define FT5336_P4_YH_REG ((uint8_t)0x17)
+#define FT5336_P4_YL_REG ((uint8_t)0x18)
+#define FT5336_P4_WEIGHT_REG ((uint8_t)0x19)
+#define FT5336_P4_MISC_REG ((uint8_t)0x1A)
+
+#define FT5336_P5_XH_REG ((uint8_t)0x1B)
+#define FT5336_P5_XL_REG ((uint8_t)0x1C)
+#define FT5336_P5_YH_REG ((uint8_t)0x1D)
+#define FT5336_P5_YL_REG ((uint8_t)0x1E)
+#define FT5336_P5_WEIGHT_REG ((uint8_t)0x1F)
+#define FT5336_P5_MISC_REG ((uint8_t)0x20)
+
+#define FT5336_P6_XH_REG ((uint8_t)0x21)
+#define FT5336_P6_XL_REG ((uint8_t)0x22)
+#define FT5336_P6_YH_REG ((uint8_t)0x23)
+#define FT5336_P6_YL_REG ((uint8_t)0x24)
+#define FT5336_P6_WEIGHT_REG ((uint8_t)0x25)
+#define FT5336_P6_MISC_REG ((uint8_t)0x26)
+
+#define FT5336_P7_XH_REG ((uint8_t)0x27)
+#define FT5336_P7_XL_REG ((uint8_t)0x28)
+#define FT5336_P7_YH_REG ((uint8_t)0x29)
+#define FT5336_P7_YL_REG ((uint8_t)0x2A)
+#define FT5336_P7_WEIGHT_REG ((uint8_t)0x2B)
+#define FT5336_P7_MISC_REG ((uint8_t)0x2C)
+
+#define FT5336_P8_XH_REG ((uint8_t)0x2D)
+#define FT5336_P8_XL_REG ((uint8_t)0x2E)
+#define FT5336_P8_YH_REG ((uint8_t)0x2F)
+#define FT5336_P8_YL_REG ((uint8_t)0x30)
+#define FT5336_P8_WEIGHT_REG ((uint8_t)0x31)
+#define FT5336_P8_MISC_REG ((uint8_t)0x32)
+
+#define FT5336_P9_XH_REG ((uint8_t)0x33)
+#define FT5336_P9_XL_REG ((uint8_t)0x34)
+#define FT5336_P9_YH_REG ((uint8_t)0x35)
+#define FT5336_P9_YL_REG ((uint8_t)0x36)
+#define FT5336_P9_WEIGHT_REG ((uint8_t)0x37)
+#define FT5336_P9_MISC_REG ((uint8_t)0x38)
+
+#define FT5336_P10_XH_REG ((uint8_t)0x39)
+#define FT5336_P10_XL_REG ((uint8_t)0x3A)
+#define FT5336_P10_YH_REG ((uint8_t)0x3B)
+#define FT5336_P10_YL_REG ((uint8_t)0x3C)
+#define FT5336_P10_WEIGHT_REG ((uint8_t)0x3D)
+#define FT5336_P10_MISC_REG ((uint8_t)0x3E)
+
+ /* Threshold for touch detection */
+#define FT5336_TH_GROUP_REG ((uint8_t)0x80)
+
+ /* Values FT5336_TH_GROUP_REG : threshold related */
+#define FT5336_THRESHOLD_MASK ((uint8_t)0xFF)
+#define FT5336_THRESHOLD_SHIFT ((uint8_t)0x00)
+
+ /* Filter function coefficients */
+#define FT5336_TH_DIFF_REG ((uint8_t)0x85)
+
+ /* Control register */
+#define FT5336_CTRL_REG ((uint8_t)0x86)
+
+ /* Values related to FT5336_CTRL_REG */
+
+ /* Will keep the Active mode when there is no touching */
+#define FT5336_CTRL_KEEP_ACTIVE_MODE ((uint8_t)0x00)
+
+ /* Switching from Active mode to Monitor mode automatically when there is no touching */
+#define FT5336_CTRL_KEEP_AUTO_SWITCH_MONITOR_MODE ((uint8_t)0x01
+
+ /* The time period of switching from Active mode to Monitor mode when there is no touching */
+#define FT5336_TIMEENTERMONITOR_REG ((uint8_t)0x87)
+
+ /* Report rate in Active mode */
+#define FT5336_PERIODACTIVE_REG ((uint8_t)0x88)
+
+ /* Report rate in Monitor mode */
+#define FT5336_PERIODMONITOR_REG ((uint8_t)0x89)
+
+ /* The value of the minimum allowed angle while Rotating gesture mode */
+#define FT5336_RADIAN_VALUE_REG ((uint8_t)0x91)
+
+ /* Maximum offset while Moving Left and Moving Right gesture */
+#define FT5336_OFFSET_LEFT_RIGHT_REG ((uint8_t)0x92)
+
+ /* Maximum offset while Moving Up and Moving Down gesture */
+#define FT5336_OFFSET_UP_DOWN_REG ((uint8_t)0x93)
+
+ /* Minimum distance while Moving Left and Moving Right gesture */
+#define FT5336_DISTANCE_LEFT_RIGHT_REG ((uint8_t)0x94)
+
+ /* Minimum distance while Moving Up and Moving Down gesture */
+#define FT5336_DISTANCE_UP_DOWN_REG ((uint8_t)0x95)
+
+ /* Maximum distance while Zoom In and Zoom Out gesture */
+#define FT5336_DISTANCE_ZOOM_REG ((uint8_t)0x96)
+
+ /* High 8-bit of LIB Version info */
+#define FT5336_LIB_VER_H_REG ((uint8_t)0xA1)
+
+ /* Low 8-bit of LIB Version info */
+#define FT5336_LIB_VER_L_REG ((uint8_t)0xA2)
+
+ /* Chip Selecting */
+#define FT5336_CIPHER_REG ((uint8_t)0xA3)
+
+ /* Interrupt mode register (used when in interrupt mode) */
+#define FT5336_GMODE_REG ((uint8_t)0xA4)
+
+#define FT5336_G_MODE_INTERRUPT_MASK ((uint8_t)0x03)
+#define FT5336_G_MODE_INTERRUPT_SHIFT ((uint8_t)0x00)
+
+ /* Possible values of FT5336_GMODE_REG */
+#define FT5336_G_MODE_INTERRUPT_POLLING ((uint8_t)0x00)
+#define FT5336_G_MODE_INTERRUPT_TRIGGER ((uint8_t)0x01)
+
+ /* Current power mode the FT5336 system is in (R) */
+#define FT5336_PWR_MODE_REG ((uint8_t)0xA5)
+
+ /* FT5336 firmware version */
+#define FT5336_FIRMID_REG ((uint8_t)0xA6)
+
+ /* FT5336 Chip identification register */
+#define FT5336_CHIP_ID_REG ((uint8_t)0xA8)
+
+ /* Possible values of FT5336_CHIP_ID_REG */
+#define FT5336_ID_VALUE ((uint8_t)0x51)
+
+ /* Release code version */
+#define FT5336_RELEASE_CODE_ID_REG ((uint8_t)0xAF)
+
+ /* Current operating mode the FT5336 system is in (R) */
+#define FT5336_STATE_REG ((uint8_t)0xBC)
+
+ /**
+ * @}
+ */
+
+ /* Exported macro ------------------------------------------------------------*/
+
+ /** @defgroup ft5336_Exported_Macros
+ * @{
+ */
+
+ /* Exported functions --------------------------------------------------------*/
+
+ /** @defgroup ft5336_Exported_Functions
+ * @{
+ */
+
+ /**
+ * @brief ft5336 Control functions
+ */
+
+
+/**
+ * @brief Initialize the ft5336 communication bus
+ * from MCU to FT5336 : ie I2C channel initialization (if required).
+ * @param DeviceAddr: Device address on communication Bus (I2C slave address of FT5336).
+ * @retval None
+ */
+void ft5336_Init(uint16_t DeviceAddr);
+
+/**
+ * @brief Software Reset the ft5336.
+ * @param DeviceAddr: Device address on communication Bus (I2C slave address of FT5336).
+ * @retval None
+ */
+void ft5336_Reset(uint16_t DeviceAddr);
+
+/**
+ * @brief Read the ft5336 device ID, pre initialize I2C in case of need to be
+ * able to read the FT5336 device ID, and verify this is a FT5336.
+ * @param DeviceAddr: I2C FT5336 Slave address.
+ * @retval The Device ID (two bytes).
+ */
+uint16_t ft5336_ReadID(uint16_t DeviceAddr);
+
+/**
+ * @brief Configures the touch Screen IC device to start detecting touches
+ * @param DeviceAddr: Device address on communication Bus (I2C slave address).
+ * @retval None.
+ */
+void ft5336_TS_Start(uint16_t DeviceAddr);
+
+/**
+ * @brief Return if there is touches detected or not.
+ * Try to detect new touches and forget the old ones (reset internal global
+ * variables).
+ * @param DeviceAddr: Device address on communication Bus.
+ * @retval : Number of active touches detected (can be 0, 1 or 2).
+ */
+uint8_t ft5336_TS_DetectTouch(uint16_t DeviceAddr);
+
+/**
+ * @brief Get the touch screen X and Y positions values
+ * Manage multi touch thanks to touch Index global
+ * variable 'ft5336_handle.currActiveTouchIdx'.
+ * @param DeviceAddr: Device address on communication Bus.
+ * @param X: Pointer to X position value
+ * @param Y: Pointer to Y position value
+ * @retval None.
+ */
+void ft5336_TS_GetXY(uint16_t DeviceAddr, uint16_t *X, uint16_t *Y);
+
+/**
+ * @brief Configure the FT5336 device to generate IT on given INT pin
+ * connected to MCU as EXTI.
+ * @param DeviceAddr: Device address on communication Bus (Slave I2C address of FT5336).
+ * @retval None
+ */
+void ft5336_TS_EnableIT(uint16_t DeviceAddr);
+
+/**
+ * @brief Configure the FT5336 device to stop generating IT on the given INT pin
+ * connected to MCU as EXTI.
+ * @param DeviceAddr: Device address on communication Bus (Slave I2C address of FT5336).
+ * @retval None
+ */
+void ft5336_TS_DisableIT(uint16_t DeviceAddr);
+
+/**
+ * @brief Get IT status from FT5336 interrupt status registers
+ * Should be called Following an EXTI coming to the MCU to know the detailed
+ * reason of the interrupt.
+ * @param DeviceAddr: Device address on communication Bus (I2C slave address of FT5336).
+ * @retval TS interrupts status
+ */
+uint8_t ft5336_TS_ITStatus (uint16_t DeviceAddr);
+
+/**
+ * @brief Clear IT status in FT5336 interrupt status clear registers
+ * Should be called Following an EXTI coming to the MCU.
+ * @param DeviceAddr: Device address on communication Bus (I2C slave address of FT5336).
+ * @retval TS interrupts status
+ */
+void ft5336_TS_ClearIT (uint16_t DeviceAddr);
+
+/**** NEW FEATURES enabled when Multi-touch support is enabled ****/
+
+#if (TS_MULTI_TOUCH_SUPPORTED == 1)
+
+/**
+ * @brief Get the last touch gesture identification (zoom, move up/down...).
+ * @param DeviceAddr: Device address on communication Bus (I2C slave address of FT5336).
+ * @param pGestureId : Pointer to get last touch gesture Identification.
+ * @retval None.
+ */
+void ft5336_TS_GetGestureID(uint16_t DeviceAddr, uint32_t * pGestureId);
+
+/**
+ * @brief Get the touch detailed informations on touch number 'touchIdx' (0..1)
+ * This touch detailed information contains :
+ * - weight that was applied to this touch
+ * - sub-area of the touch in the touch panel
+ * - event of linked to the touch (press down, lift up, ...)
+ * @param DeviceAddr: Device address on communication Bus (I2C slave address of FT5336).
+ * @param touchIdx : Passed index of the touch (0..1) on which we want to get the
+ * detailed information.
+ * @param pWeight : Pointer to to get the weight information of 'touchIdx'.
+ * @param pArea : Pointer to to get the sub-area information of 'touchIdx'.
+ * @param pEvent : Pointer to to get the event information of 'touchIdx'.
+
+ * @retval None.
+ */
+void ft5336_TS_GetTouchInfo(uint16_t DeviceAddr,
+ uint32_t touchIdx,
+ uint32_t * pWeight,
+ uint32_t * pArea,
+ uint32_t * pEvent);
+
+#endif /* TS_MULTI_TOUCH_SUPPORTED == 1 */
+
+/* Imported TS IO functions --------------------------------------------------------*/
+
+/** @defgroup ft5336_Imported_Functions
+ * @{
+ */
+
+/* TouchScreen (TS) external IO functions */
+extern void TS_IO_Init(void);
+extern void TS_IO_Write(uint8_t Addr, uint8_t Reg, uint8_t Value);
+extern uint8_t TS_IO_Read(uint8_t Addr, uint8_t Reg);
+extern void TS_IO_Delay(uint32_t Delay);
+
+ /**
+ * @}
+ */
+
+ /* Imported global variables --------------------------------------------------------*/
+
+ /** @defgroup ft5336_Imported_Globals
+ * @{
+ */
+
+
+/* Touch screen driver structure */
+extern TS_DrvTypeDef ft5336_ts_drv;
+
+ /**
+ * @}
+ */
+
+#ifdef __cplusplus
+}
+#endif
+#endif /* __FT5336_H */
+
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/P3_SETR2/Components/ft6x06/Release_Notes.html b/P3_SETR2/Components/ft6x06/Release_Notes.html
new file mode 100644
index 0000000..d08c4db
--- /dev/null
+++ b/P3_SETR2/Components/ft6x06/Release_Notes.html
@@ -0,0 +1,82 @@
+
+
+
+
+
+
+ Release Notes for FT6X06 Component Drivers
+
+
+
+
+
+
+
+
+
+
+Release Notes for FT6X06 Component Drivers
+Copyright © 2016 STMicroelectronics
+
+
+
+
+
+
License
+
Licensed by ST under BSD 3-Clause license (the "License"). You may not use this package except in compliance with the License. You may obtain a copy of the License at:
+
https://opensource.org/licenses/BSD-3-Clause
+
Purpose
+
This directory contains the FT6X06 component drivers.
+
+
+
Update History
+
+
V1.0.3 / 03-April-2019
+
+
Main Changes
+
+Update release notes format
+
+
+
+
+
V1.0.2 / 31-August-2018
+
+
Main Changes
+
+Reformat the BSD 3-Clause license declaration in the files header (replace license terms by a web reference to OSI website where those terms lie)
+
+
+
+
+
V1.0.1 / 03-May-2016
+
+
Main Changes
+
+Add support of FT6x36 Touch controller
+
+
+
+
+
V1.0.0 / 03-August-2015
+
+
Main Changes
+
+First official release
+
+
+
+
+
+
+
+
diff --git a/P3_SETR2/Components/ft6x06/ft6x06.c b/P3_SETR2/Components/ft6x06/ft6x06.c
new file mode 100644
index 0000000..ed833d3
--- /dev/null
+++ b/P3_SETR2/Components/ft6x06/ft6x06.c
@@ -0,0 +1,496 @@
+/**
+ ******************************************************************************
+ * @file ft6x06.c
+ * @author MCD Application Team
+ * @brief This file provides a set of functions needed to manage the FT6X06
+ * IO Expander devices.
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2016 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/* Includes ------------------------------------------------------------------*/
+#include "ft6x06.h"
+
+/** @addtogroup BSP
+ * @{
+ */
+
+/** @addtogroup Component
+ * @{
+ */
+
+/** @defgroup FT6X06
+ * @{
+ */
+
+/* Private typedef -----------------------------------------------------------*/
+
+/** @defgroup FT6X06_Private_Defines FT6X06 Private Defines
+ * @{
+ */
+#define FT6x06_MAX_INSTANCE 2
+/**
+ * @}
+ */
+
+/* Private macro -------------------------------------------------------------*/
+
+/** @defgroup FT6X06_Private_Variables FT6X06 Private Variables
+ * @{
+ */
+
+/* Touch screen driver structure initialization */
+TS_DrvTypeDef ft6x06_ts_drv =
+{
+ ft6x06_Init,
+ ft6x06_ReadID,
+ ft6x06_Reset,
+
+ ft6x06_TS_Start,
+ ft6x06_TS_DetectTouch,
+ ft6x06_TS_GetXY,
+
+ ft6x06_TS_EnableIT,
+ ft6x06_TS_ClearIT,
+ ft6x06_TS_ITStatus,
+ ft6x06_TS_DisableIT
+};
+
+/* ft6x06 instances by address */
+uint8_t ft6x06[FT6x06_MAX_INSTANCE] = {0};
+
+/* Global ft6x06 handle */
+static ft6x06_handle_TypeDef ft6x06_handle = { FT6206_I2C_NOT_INITIALIZED, 0, 0};
+
+/**
+ * @}
+ */
+
+/** @defgroup ft6x06_Private_Function_Prototypes ft6x06 Private Function Prototypes
+ * @{
+ */
+static uint8_t ft6x06_GetInstance(uint16_t DeviceAddr);
+/* Private functions prototypes-----------------------------------------------*/
+#if (TS_AUTO_CALIBRATION_SUPPORTED == 1)
+/**
+ * @brief Start TouchScreen calibration phase
+ * @param DeviceAddr: FT6206 Device address for communication on I2C Bus.
+ * @retval Status FT6206_STATUS_OK or FT6206_STATUS_NOT_OK.
+ */
+static uint32_t ft6x06_TS_Calibration(uint16_t DeviceAddr);
+#endif /* TS_AUTO_CALIBRATION_SUPPORTED == 1 */
+
+/**
+ * @brief Basic static configuration of TouchScreen
+ * @param DeviceAddr: FT6206 Device address for communication on I2C Bus.
+ * @retval Status FT6206_STATUS_OK or FT6206_STATUS_NOT_OK.
+ */
+static uint32_t ft6x06_TS_Configure(uint16_t DeviceAddr);
+
+/**
+ * @}
+ */
+
+/** @defgroup ft6x06_Private_Functions ft6x06 Private Functions
+ * @{
+ */
+
+/**
+ * @brief Initialize the ft6x06 communication bus
+ * from MCU to FT6206 : ie I2C channel initialization (if required).
+ * @param DeviceAddr: Device address on communication Bus (I2C slave address of FT6206).
+ * @retval None
+ */
+void ft6x06_Init(uint16_t DeviceAddr)
+{
+ uint8_t instance;
+ uint8_t empty;
+
+ /* Check if device instance already exists */
+ instance = ft6x06_GetInstance(DeviceAddr);
+
+ /* To prevent double initialization */
+ if(instance == 0xFF)
+ {
+ /* Look for empty instance */
+ empty = ft6x06_GetInstance(0);
+
+ if(empty < FT6x06_MAX_INSTANCE)
+ {
+ /* Register the current device instance */
+ ft6x06[empty] = DeviceAddr;
+
+ /* Initialize IO BUS layer */
+ TS_IO_Init();
+ }
+ }
+}
+
+/**
+ * @brief Software Reset the ft6x06.
+ * @note : Not applicable to FT6206.
+ * @param DeviceAddr: Device address on communication Bus (I2C slave address of FT6206).
+ * @retval None
+ */
+void ft6x06_Reset(uint16_t DeviceAddr)
+{
+ /* Do nothing */
+ /* No software reset sequence available in FT6206 IC */
+}
+
+/**
+ * @brief Read the ft6x06 device ID, pre initialize I2C in case of need to be
+ * able to read the FT6206 device ID, and verify this is a FT6206.
+ * @param DeviceAddr: I2C FT6x06 Slave address.
+ * @retval The Device ID (two bytes).
+ */
+uint16_t ft6x06_ReadID(uint16_t DeviceAddr)
+{
+ /* Initialize I2C link if needed */
+ TS_IO_Init();
+
+ /* Return the device ID value */
+ return (TS_IO_Read(DeviceAddr, FT6206_CHIP_ID_REG));
+}
+
+/**
+ * @brief Configures the touch Screen IC device to start detecting touches
+ * It goes through an internal calibration process (Hw calibration sequence of
+ * the touch screen).
+ * @param DeviceAddr: Device address on communication Bus (I2C slave address).
+ * @retval None.
+ */
+void ft6x06_TS_Start(uint16_t DeviceAddr)
+{
+#if (TS_AUTO_CALIBRATION_SUPPORTED == 1)
+ /* Hw Calibration sequence start : should be done once after each power up */
+ /* This is called internal calibration of the touch screen */
+ ft6x06_TS_Calibration(DeviceAddr);
+#endif
+ /* Minimum static configuration of FT6206 */
+ ft6x06_TS_Configure(DeviceAddr);
+
+ /* By default set FT6206 IC in Polling mode : no INT generation on FT6206 for new touch available */
+ /* Note TS_INT is active low */
+ ft6x06_TS_DisableIT(DeviceAddr);
+}
+
+/**
+ * @brief Return if there is touches detected or not.
+ * Try to detect new touches and forget the old ones (reset internal global
+ * variables).
+ * @param DeviceAddr: Device address on communication Bus.
+ * @retval : Number of active touches detected (can be 0, 1 or 2).
+ */
+uint8_t ft6x06_TS_DetectTouch(uint16_t DeviceAddr)
+{
+ volatile uint8_t nbTouch = 0;
+
+ /* Read register FT6206_TD_STAT_REG to check number of touches detection */
+ nbTouch = TS_IO_Read(DeviceAddr, FT6206_TD_STAT_REG);
+ nbTouch &= FT6206_TD_STAT_MASK;
+
+ if(nbTouch > FT6206_MAX_DETECTABLE_TOUCH)
+ {
+ /* If invalid number of touch detected, set it to zero */
+ nbTouch = 0;
+ }
+
+ /* Update ft6x06 driver internal global : current number of active touches */
+ ft6x06_handle.currActiveTouchNb = nbTouch;
+
+ /* Reset current active touch index on which to work on */
+ ft6x06_handle.currActiveTouchIdx = 0;
+
+ return(nbTouch);
+}
+
+/**
+ * @brief Get the touch screen X and Y positions values
+ * Manage multi touch thanks to touch Index global
+ * variable 'ft6x06_handle.currActiveTouchIdx'.
+ * @param DeviceAddr: Device address on communication Bus.
+ * @param X: Pointer to X position value
+ * @param Y: Pointer to Y position value
+ * @retval None.
+ */
+void ft6x06_TS_GetXY(uint16_t DeviceAddr, uint16_t *X, uint16_t *Y)
+{
+ uint8_t regAddress = 0;
+ uint8_t dataxy[4];
+
+ if(ft6x06_handle.currActiveTouchIdx < ft6x06_handle.currActiveTouchNb)
+ {
+ switch(ft6x06_handle.currActiveTouchIdx)
+ {
+ case 0 :
+ regAddress = FT6206_P1_XH_REG;
+ break;
+ case 1 :
+ regAddress = FT6206_P2_XH_REG;
+ break;
+
+ default :
+ break;
+ }
+
+ /* Read X and Y positions */
+ TS_IO_ReadMultiple(DeviceAddr, regAddress, dataxy, sizeof(dataxy));
+
+ /* Send back ready X position to caller */
+ *X = ((dataxy[0] & FT6206_MSB_MASK) << 8) | (dataxy[1] & FT6206_LSB_MASK);
+
+ /* Send back ready Y position to caller */
+ *Y = ((dataxy[2] & FT6206_MSB_MASK) << 8) | (dataxy[3] & FT6206_LSB_MASK);
+
+ ft6x06_handle.currActiveTouchIdx++;
+ }
+}
+
+/**
+ * @brief Configure the FT6206 device to generate IT on given INT pin
+ * connected to MCU as EXTI.
+ * @param DeviceAddr: Device address on communication Bus (Slave I2C address of FT6206).
+ * @retval None
+ */
+void ft6x06_TS_EnableIT(uint16_t DeviceAddr)
+{
+ uint8_t regValue = 0;
+ regValue = (FT6206_G_MODE_INTERRUPT_TRIGGER & (FT6206_G_MODE_INTERRUPT_MASK >> FT6206_G_MODE_INTERRUPT_SHIFT)) << FT6206_G_MODE_INTERRUPT_SHIFT;
+
+ /* Set interrupt trigger mode in FT6206_GMODE_REG */
+ TS_IO_Write(DeviceAddr, FT6206_GMODE_REG, regValue);
+}
+
+/**
+ * @brief Configure the FT6206 device to stop generating IT on the given INT pin
+ * connected to MCU as EXTI.
+ * @param DeviceAddr: Device address on communication Bus (Slave I2C address of FT6206).
+ * @retval None
+ */
+void ft6x06_TS_DisableIT(uint16_t DeviceAddr)
+{
+ uint8_t regValue = 0;
+ regValue = (FT6206_G_MODE_INTERRUPT_POLLING & (FT6206_G_MODE_INTERRUPT_MASK >> FT6206_G_MODE_INTERRUPT_SHIFT)) << FT6206_G_MODE_INTERRUPT_SHIFT;
+
+ /* Set interrupt polling mode in FT6206_GMODE_REG */
+ TS_IO_Write(DeviceAddr, FT6206_GMODE_REG, regValue);
+}
+
+/**
+ * @brief Get IT status from FT6206 interrupt status registers
+ * Should be called Following an EXTI coming to the MCU to know the detailed
+ * reason of the interrupt.
+ * @note : This feature is not applicable to FT6206.
+ * @param DeviceAddr: Device address on communication Bus (I2C slave address of FT6206).
+ * @retval TS interrupts status : always return 0 here
+ */
+uint8_t ft6x06_TS_ITStatus(uint16_t DeviceAddr)
+{
+ /* Always return 0 as feature not applicable to FT6206 */
+ return 0;
+}
+
+/**
+ * @brief Clear IT status in FT6206 interrupt status clear registers
+ * Should be called Following an EXTI coming to the MCU.
+ * @note : This feature is not applicable to FT6206.
+ * @param DeviceAddr: Device address on communication Bus (I2C slave address of FT6206).
+ * @retval None
+ */
+void ft6x06_TS_ClearIT(uint16_t DeviceAddr)
+{
+ /* Nothing to be done here for FT6206 */
+}
+
+/**** NEW FEATURES enabled when Multi-touch support is enabled ****/
+
+#if (TS_MULTI_TOUCH_SUPPORTED == 1)
+/**
+ * @brief Get the last touch gesture identification (zoom, move up/down...).
+ * @param DeviceAddr: Device address on communication Bus (I2C slave address of FT6x06).
+ * @param pGestureId : Pointer to get last touch gesture Identification.
+ * @retval None.
+ */
+void ft6x06_TS_GetGestureID(uint16_t DeviceAddr, uint32_t * pGestureId)
+{
+ volatile uint8_t ucReadData = 0;
+
+ ucReadData = TS_IO_Read(DeviceAddr, FT6206_GEST_ID_REG);
+
+ * pGestureId = ucReadData;
+}
+
+/**
+ * @brief Get the touch detailed informations on touch number 'touchIdx' (0..1)
+ * This touch detailed information contains :
+ * - weight that was applied to this touch
+ * - sub-area of the touch in the touch panel
+ * - event of linked to the touch (press down, lift up, ...)
+ * @param DeviceAddr: Device address on communication Bus (I2C slave address of FT6x06).
+ * @param touchIdx : Passed index of the touch (0..1) on which we want to get the
+ * detailed information.
+ * @param pWeight : Pointer to to get the weight information of 'touchIdx'.
+ * @param pArea : Pointer to to get the sub-area information of 'touchIdx'.
+ * @param pEvent : Pointer to to get the event information of 'touchIdx'.
+
+ * @retval None.
+ */
+void ft6x06_TS_GetTouchInfo(uint16_t DeviceAddr,
+ uint32_t touchIdx,
+ uint32_t * pWeight,
+ uint32_t * pArea,
+ uint32_t * pEvent)
+{
+ uint8_t regAddress = 0;
+ uint8_t dataxy[3];
+
+ if(touchIdx < ft6x06_handle.currActiveTouchNb)
+ {
+ switch(touchIdx)
+ {
+ case 0 :
+ regAddress = FT6206_P1_WEIGHT_REG;
+ break;
+
+ case 1 :
+ regAddress = FT6206_P2_WEIGHT_REG;
+ break;
+
+ default :
+ break;
+
+ } /* end switch(touchIdx) */
+
+ /* Read weight, area and Event Id of touch index */
+ TS_IO_ReadMultiple(DeviceAddr, regAddress, dataxy, sizeof(dataxy));
+
+ /* Return weight of touch index */
+ * pWeight = (dataxy[0] & FT6206_TOUCH_WEIGHT_MASK) >> FT6206_TOUCH_WEIGHT_SHIFT;
+ /* Return area of touch index */
+ * pArea = (dataxy[1] & FT6206_TOUCH_AREA_MASK) >> FT6206_TOUCH_AREA_SHIFT;
+ /* Return Event Id of touch index */
+ * pEvent = (dataxy[2] & FT6206_TOUCH_EVT_FLAG_MASK) >> FT6206_TOUCH_EVT_FLAG_SHIFT;
+
+ } /* of if(touchIdx < ft6x06_handle.currActiveTouchNb) */
+}
+
+#endif /* TS_MULTI_TOUCH_SUPPORTED == 1 */
+
+#if (TS_AUTO_CALIBRATION_SUPPORTED == 1)
+/**
+ * @brief Start TouchScreen calibration phase
+ * @param DeviceAddr: FT6206 Device address for communication on I2C Bus.
+ * @retval Status FT6206_STATUS_OK or FT6206_STATUS_NOT_OK.
+ */
+static uint32_t ft6x06_TS_Calibration(uint16_t DeviceAddr)
+{
+ uint32_t nbAttempt = 0;
+ volatile uint8_t ucReadData;
+ volatile uint8_t regValue;
+ uint32_t status = FT6206_STATUS_OK;
+ uint8_t bEndCalibration = 0;
+
+ /* >> Calibration sequence start */
+
+ /* Switch FT6206 back to factory mode to calibrate */
+ regValue = (FT6206_DEV_MODE_FACTORY & FT6206_DEV_MODE_MASK) << FT6206_DEV_MODE_SHIFT;
+ TS_IO_Write(DeviceAddr, FT6206_DEV_MODE_REG, regValue); /* 0x40 */
+
+ /* Read back the same register FT6206_DEV_MODE_REG */
+ ucReadData = TS_IO_Read(DeviceAddr, FT6206_DEV_MODE_REG);
+ TS_IO_Delay(300); /* Wait 300 ms */
+
+ if(((ucReadData & (FT6206_DEV_MODE_MASK << FT6206_DEV_MODE_SHIFT)) >> FT6206_DEV_MODE_SHIFT) != FT6206_DEV_MODE_FACTORY )
+ {
+ /* Return error to caller */
+ return(FT6206_STATUS_NOT_OK);
+ }
+
+ /* Start calibration command */
+ TS_IO_Write(DeviceAddr, FT6206_TD_STAT_REG, 0x04);
+ TS_IO_Delay(300); /* Wait 300 ms */
+
+ /* 100 attempts to wait switch from factory mode (calibration) to working mode */
+ for (nbAttempt=0; ((nbAttempt < 100) && (!bEndCalibration)) ; nbAttempt++)
+ {
+ ucReadData = TS_IO_Read(DeviceAddr, FT6206_DEV_MODE_REG);
+ ucReadData = (ucReadData & (FT6206_DEV_MODE_MASK << FT6206_DEV_MODE_SHIFT)) >> FT6206_DEV_MODE_SHIFT;
+ if(ucReadData == FT6206_DEV_MODE_WORKING)
+ {
+ /* Auto Switch to FT6206_DEV_MODE_WORKING : means calibration have ended */
+ bEndCalibration = 1; /* exit for loop */
+ }
+
+ TS_IO_Delay(200); /* Wait 200 ms */
+ }
+
+ /* Calibration sequence end << */
+
+ return(status);
+}
+#endif /* TS_AUTO_CALIBRATION_SUPPORTED == 1 */
+
+/**
+ * @brief Basic static configuration of TouchScreen
+ * @param DeviceAddr: FT6206 Device address for communication on I2C Bus.
+ * @retval Status FT6206_STATUS_OK or FT6206_STATUS_NOT_OK.
+ */
+static uint32_t ft6x06_TS_Configure(uint16_t DeviceAddr)
+{
+ uint32_t status = FT6206_STATUS_OK;
+
+ /* Nothing special to be done for FT6206 */
+
+ return(status);
+}
+
+/**
+ * @brief Check if the device instance of the selected address is already registered
+ * and return its index
+ * @param DeviceAddr: Device address on communication Bus.
+ * @retval Index of the device instance if registered, 0xFF if not.
+ */
+static uint8_t ft6x06_GetInstance(uint16_t DeviceAddr)
+{
+ uint8_t idx = 0;
+
+ /* Check all the registered instances */
+ for(idx = 0; idx < FT6x06_MAX_INSTANCE ; idx ++)
+ {
+ if(ft6x06[idx] == DeviceAddr)
+ {
+ return idx;
+ }
+ }
+
+ return 0xFF;
+}
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/P3_SETR2/Components/ft6x06/ft6x06.h b/P3_SETR2/Components/ft6x06/ft6x06.h
new file mode 100644
index 0000000..073f35f
--- /dev/null
+++ b/P3_SETR2/Components/ft6x06/ft6x06.h
@@ -0,0 +1,453 @@
+/**
+ ******************************************************************************
+ * @file ft6x06.h
+ * @author MCD Application Team
+ * @brief This file contains all the functions prototypes for the
+ * ft6x06.c IO expander driver.
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2016 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __FT6X06_H
+#define __FT6X06_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Set Multi-touch as non supported */
+#ifndef TS_MULTI_TOUCH_SUPPORTED
+ #define TS_MULTI_TOUCH_SUPPORTED 0
+#endif
+
+/* Set Auto-calibration as non supported */
+#ifndef TS_AUTO_CALIBRATION_SUPPORTED
+ #define TS_AUTO_CALIBRATION_SUPPORTED 0
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "../Common/ts.h"
+
+/* Macros --------------------------------------------------------------------*/
+
+/** @typedef ft6x06_handle_TypeDef
+ * ft6x06 Handle definition.
+ */
+typedef struct
+{
+ uint8_t i2cInitialized;
+
+ /* field holding the current number of simultaneous active touches */
+ uint8_t currActiveTouchNb;
+
+ /* field holding the touch index currently managed */
+ uint8_t currActiveTouchIdx;
+
+} ft6x06_handle_TypeDef;
+
+ /** @addtogroup BSP
+ * @{
+ */
+
+ /** @addtogroup Component
+ * @{
+ */
+
+ /** @defgroup FT6X06
+ * @{
+ */
+
+ /* Exported types ------------------------------------------------------------*/
+
+ /** @defgroup FT6X06_Exported_Types
+ * @{
+ */
+
+ /* Exported constants --------------------------------------------------------*/
+
+ /** @defgroup FT6X06_Exported_Constants
+ * @{
+ */
+
+ /* Maximum border values of the touchscreen pad */
+#define FT_6206_MAX_WIDTH ((uint16_t)800) /* Touchscreen pad max width */
+#define FT_6206_MAX_HEIGHT ((uint16_t)480) /* Touchscreen pad max height */
+
+ /* Touchscreen pad max width and height values for FT6x36 Touch*/
+#define FT_6206_MAX_WIDTH_HEIGHT ((uint16_t)240)
+
+ /* Possible values of driver functions return status */
+#define FT6206_STATUS_OK 0
+#define FT6206_STATUS_NOT_OK 1
+
+ /* Possible values of global variable 'TS_I2C_Initialized' */
+#define FT6206_I2C_NOT_INITIALIZED 0
+#define FT6206_I2C_INITIALIZED 1
+
+ /* Max detectable simultaneous touches */
+#define FT6206_MAX_DETECTABLE_TOUCH 2
+
+ /**
+ * @brief : Definitions for FT6206 I2C register addresses on 8 bit
+ **/
+
+ /* Current mode register of the FT6206 (R/W) */
+#define FT6206_DEV_MODE_REG 0x00
+
+ /* Possible values of FT6206_DEV_MODE_REG */
+#define FT6206_DEV_MODE_WORKING 0x00
+#define FT6206_DEV_MODE_FACTORY 0x04
+
+#define FT6206_DEV_MODE_MASK 0x7
+#define FT6206_DEV_MODE_SHIFT 4
+
+ /* Gesture ID register */
+#define FT6206_GEST_ID_REG 0x01
+
+ /* Possible values of FT6206_GEST_ID_REG */
+#define FT6206_GEST_ID_NO_GESTURE 0x00
+#define FT6206_GEST_ID_MOVE_UP 0x10
+#define FT6206_GEST_ID_MOVE_RIGHT 0x14
+#define FT6206_GEST_ID_MOVE_DOWN 0x18
+#define FT6206_GEST_ID_MOVE_LEFT 0x1C
+#define FT6206_GEST_ID_ZOOM_IN 0x48
+#define FT6206_GEST_ID_ZOOM_OUT 0x49
+
+ /* Touch Data Status register : gives number of active touch points (0..2) */
+#define FT6206_TD_STAT_REG 0x02
+
+ /* Values related to FT6206_TD_STAT_REG */
+#define FT6206_TD_STAT_MASK 0x0F
+#define FT6206_TD_STAT_SHIFT 0x00
+
+ /* Values Pn_XH and Pn_YH related */
+#define FT6206_TOUCH_EVT_FLAG_PRESS_DOWN 0x00
+#define FT6206_TOUCH_EVT_FLAG_LIFT_UP 0x01
+#define FT6206_TOUCH_EVT_FLAG_CONTACT 0x02
+#define FT6206_TOUCH_EVT_FLAG_NO_EVENT 0x03
+
+#define FT6206_TOUCH_EVT_FLAG_SHIFT 6
+#define FT6206_TOUCH_EVT_FLAG_MASK (3 << FT6206_TOUCH_EVT_FLAG_SHIFT)
+
+#define FT6206_MSB_MASK 0x0F
+#define FT6206_MSB_SHIFT 0
+
+ /* Values Pn_XL and Pn_YL related */
+#define FT6206_LSB_MASK 0xFF
+#define FT6206_LSB_SHIFT 0
+
+#define FT6206_P1_XH_REG 0x03
+#define FT6206_P1_XL_REG 0x04
+#define FT6206_P1_YH_REG 0x05
+#define FT6206_P1_YL_REG 0x06
+
+ /* Touch Pressure register value (R) */
+#define FT6206_P1_WEIGHT_REG 0x07
+
+ /* Values Pn_WEIGHT related */
+#define FT6206_TOUCH_WEIGHT_MASK 0xFF
+#define FT6206_TOUCH_WEIGHT_SHIFT 0
+
+ /* Touch area register */
+#define FT6206_P1_MISC_REG 0x08
+
+ /* Values related to FT6206_Pn_MISC_REG */
+#define FT6206_TOUCH_AREA_MASK (0x04 << 4)
+#define FT6206_TOUCH_AREA_SHIFT 0x04
+
+#define FT6206_P2_XH_REG 0x09
+#define FT6206_P2_XL_REG 0x0A
+#define FT6206_P2_YH_REG 0x0B
+#define FT6206_P2_YL_REG 0x0C
+#define FT6206_P2_WEIGHT_REG 0x0D
+#define FT6206_P2_MISC_REG 0x0E
+
+ /* Threshold for touch detection */
+#define FT6206_TH_GROUP_REG 0x80
+
+ /* Values FT6206_TH_GROUP_REG : threshold related */
+#define FT6206_THRESHOLD_MASK 0xFF
+#define FT6206_THRESHOLD_SHIFT 0
+
+ /* Filter function coefficients */
+#define FT6206_TH_DIFF_REG 0x85
+
+ /* Control register */
+#define FT6206_CTRL_REG 0x86
+
+ /* Values related to FT6206_CTRL_REG */
+
+ /* Will keep the Active mode when there is no touching */
+#define FT6206_CTRL_KEEP_ACTIVE_MODE 0x00
+
+ /* Switching from Active mode to Monitor mode automatically when there is no touching */
+#define FT6206_CTRL_KEEP_AUTO_SWITCH_MONITOR_MODE 0x01
+
+ /* The time period of switching from Active mode to Monitor mode when there is no touching */
+#define FT6206_TIMEENTERMONITOR_REG 0x87
+
+ /* Report rate in Active mode */
+#define FT6206_PERIODACTIVE_REG 0x88
+
+ /* Report rate in Monitor mode */
+#define FT6206_PERIODMONITOR_REG 0x89
+
+ /* The value of the minimum allowed angle while Rotating gesture mode */
+#define FT6206_RADIAN_VALUE_REG 0x91
+
+ /* Maximum offset while Moving Left and Moving Right gesture */
+#define FT6206_OFFSET_LEFT_RIGHT_REG 0x92
+
+ /* Maximum offset while Moving Up and Moving Down gesture */
+#define FT6206_OFFSET_UP_DOWN_REG 0x93
+
+ /* Minimum distance while Moving Left and Moving Right gesture */
+#define FT6206_DISTANCE_LEFT_RIGHT_REG 0x94
+
+ /* Minimum distance while Moving Up and Moving Down gesture */
+#define FT6206_DISTANCE_UP_DOWN_REG 0x95
+
+ /* Maximum distance while Zoom In and Zoom Out gesture */
+#define FT6206_DISTANCE_ZOOM_REG 0x96
+
+ /* High 8-bit of LIB Version info */
+#define FT6206_LIB_VER_H_REG 0xA1
+
+ /* Low 8-bit of LIB Version info */
+#define FT6206_LIB_VER_L_REG 0xA2
+
+ /* Chip Selecting */
+#define FT6206_CIPHER_REG 0xA3
+
+ /* Interrupt mode register (used when in interrupt mode) */
+#define FT6206_GMODE_REG 0xA4
+
+#define FT6206_G_MODE_INTERRUPT_MASK 0x03
+#define FT6206_G_MODE_INTERRUPT_SHIFT 0x00
+
+ /* Possible values of FT6206_GMODE_REG */
+#define FT6206_G_MODE_INTERRUPT_POLLING 0x00
+#define FT6206_G_MODE_INTERRUPT_TRIGGER 0x01
+
+ /* Current power mode the FT6206 system is in (R) */
+#define FT6206_PWR_MODE_REG 0xA5
+
+ /* FT6206 firmware version */
+#define FT6206_FIRMID_REG 0xA6
+
+ /* FT6206 Chip identification register */
+#define FT6206_CHIP_ID_REG 0xA8
+
+ /* Possible values of FT6206_CHIP_ID_REG */
+#define FT6206_ID_VALUE 0x11
+#define FT6x36_ID_VALUE 0xCD
+
+ /* Release code version */
+#define FT6206_RELEASE_CODE_ID_REG 0xAF
+
+ /* Current operating mode the FT6206 system is in (R) */
+#define FT6206_STATE_REG 0xBC
+
+ /**
+ * @}
+ */
+
+ /* Exported macro ------------------------------------------------------------*/
+
+ /** @defgroup ft6x06_Exported_Macros
+ * @{
+ */
+
+ /* Exported functions --------------------------------------------------------*/
+
+ /** @defgroup ft6x06_Exported_Functions
+ * @{
+ */
+
+ /**
+ * @brief ft6x06 Control functions
+ */
+
+
+/**
+ * @brief Initialize the ft6x06 communication bus
+ * from MCU to FT6206 : ie I2C channel initialization (if required).
+ * @param DeviceAddr: Device address on communication Bus (I2C slave address of FT6206).
+ * @retval None
+ */
+void ft6x06_Init(uint16_t DeviceAddr);
+
+/**
+ * @brief Software Reset the ft6x06.
+ * @param DeviceAddr: Device address on communication Bus (I2C slave address of FT6206).
+ * @retval None
+ */
+void ft6x06_Reset(uint16_t DeviceAddr);
+
+/**
+ * @brief Read the ft6x06 device ID, pre intitalize I2C in case of need to be
+ * able to read the FT6206 device ID, and verify this is a FT6206.
+ * @param DeviceAddr: I2C FT6x06 Slave address.
+ * @retval The Device ID (two bytes).
+ */
+uint16_t ft6x06_ReadID(uint16_t DeviceAddr);
+
+/**
+ * @brief Configures the touch Screen IC device to start detecting touches
+ * @param DeviceAddr: Device address on communication Bus (I2C slave address).
+ * @retval None.
+ */
+void ft6x06_TS_Start(uint16_t DeviceAddr);
+
+/**
+ * @brief Return if there is touches detected or not.
+ * Try to detect new touches and forget the old ones (reset internal global
+ * variables).
+ * @param DeviceAddr: Device address on communication Bus.
+ * @retval : Number of active touches detected (can be 0, 1 or 2).
+ */
+uint8_t ft6x06_TS_DetectTouch(uint16_t DeviceAddr);
+
+/**
+ * @brief Get the touch screen X and Y positions values
+ * Manage multi touch thanks to touch Index global
+ * variable 'ft6x06_handle.currActiveTouchIdx'.
+ * @param DeviceAddr: Device address on communication Bus.
+ * @param X: Pointer to X position value
+ * @param Y: Pointer to Y position value
+ * @retval None.
+ */
+void ft6x06_TS_GetXY(uint16_t DeviceAddr, uint16_t *X, uint16_t *Y);
+
+/**
+ * @brief Configure the FT6206 device to generate IT on given INT pin
+ * connected to MCU as EXTI.
+ * @param DeviceAddr: Device address on communication Bus (Slave I2C address of FT6206).
+ * @retval None
+ */
+void ft6x06_TS_EnableIT(uint16_t DeviceAddr);
+
+/**
+ * @brief Configure the FT6206 device to stop generating IT on the given INT pin
+ * connected to MCU as EXTI.
+ * @param DeviceAddr: Device address on communication Bus (Slave I2C address of FT6206).
+ * @retval None
+ */
+void ft6x06_TS_DisableIT(uint16_t DeviceAddr);
+
+/**
+ * @brief Get IT status from FT6206 interrupt status registers
+ * Should be called Following an EXTI coming to the MCU to know the detailed
+ * reason of the interrupt.
+ * @param DeviceAddr: Device address on communication Bus (I2C slave address of FT6206).
+ * @retval TS interrupts status
+ */
+uint8_t ft6x06_TS_ITStatus (uint16_t DeviceAddr);
+
+/**
+ * @brief Clear IT status in FT6206 interrupt status clear registers
+ * Should be called Following an EXTI coming to the MCU.
+ * @param DeviceAddr: Device address on communication Bus (I2C slave address of FT6206).
+ * @retval TS interrupts status
+ */
+void ft6x06_TS_ClearIT (uint16_t DeviceAddr);
+
+/**** NEW FEATURES enabled when Multi-touch support is enabled ****/
+
+#if (TS_MULTI_TOUCH_SUPPORTED == 1)
+
+/**
+ * @brief Get the last touch gesture identification (zoom, move up/down...).
+ * @param DeviceAddr: Device address on communication Bus (I2C slave address of FT6x06).
+ * @param pGestureId : Pointer to get last touch gesture Identification.
+ * @retval None.
+ */
+void ft6x06_TS_GetGestureID(uint16_t DeviceAddr, uint32_t * pGestureId);
+
+/**
+ * @brief Get the touch detailed informations on touch number 'touchIdx' (0..1)
+ * This touch detailed information contains :
+ * - weight that was applied to this touch
+ * - sub-area of the touch in the touch panel
+ * - event of linked to the touch (press down, lift up, ...)
+ * @param DeviceAddr: Device address on communication Bus (I2C slave address of FT6x06).
+ * @param touchIdx : Passed index of the touch (0..1) on which we want to get the
+ * detailed information.
+ * @param pWeight : Pointer to to get the weight information of 'touchIdx'.
+ * @param pArea : Pointer to to get the sub-area information of 'touchIdx'.
+ * @param pEvent : Pointer to to get the event information of 'touchIdx'.
+
+ * @retval None.
+ */
+void ft6x06_TS_GetTouchInfo(uint16_t DeviceAddr,
+ uint32_t touchIdx,
+ uint32_t * pWeight,
+ uint32_t * pArea,
+ uint32_t * pEvent);
+
+#endif /* TS_MULTI_TOUCH_SUPPORTED == 1 */
+
+/* Imported TS IO functions --------------------------------------------------------*/
+
+/** @defgroup ft6x06_Imported_Functions
+ * @{
+ */
+
+/* TouchScreen (TS) external IO functions */
+extern void TS_IO_Init(void);
+extern void TS_IO_Write(uint8_t Addr, uint8_t Reg, uint8_t Value);
+extern uint8_t TS_IO_Read(uint8_t Addr, uint8_t Reg);
+extern uint16_t TS_IO_ReadMultiple(uint8_t Addr, uint8_t Reg, uint8_t *Buffer, uint16_t Length);
+extern void TS_IO_Delay(uint32_t Delay);
+
+ /**
+ * @}
+ */
+
+ /* Imported global variables --------------------------------------------------------*/
+
+ /** @defgroup ft6x06_Imported_Globals
+ * @{
+ */
+
+
+/* Touch screen driver structure */
+extern TS_DrvTypeDef ft6x06_ts_drv;
+
+ /**
+ * @}
+ */
+
+#ifdef __cplusplus
+}
+#endif
+#endif /* __FT6X06_H */
+
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/P3_SETR2/Components/hts221/Release_Notes.html b/P3_SETR2/Components/hts221/Release_Notes.html
new file mode 100644
index 0000000..aa8e2ce
--- /dev/null
+++ b/P3_SETR2/Components/hts221/Release_Notes.html
@@ -0,0 +1,65 @@
+
+
+
+
+
+
+ Release Notes for HTS221 Component Drivers
+
+
+
+
+
+
+
+
+
+
+Release Notes for HTS221 Component Drivers
+Copyright © 2017 STMicroelectronics
+
+
+
+
+
+
License
+
Licensed by ST under BSD 3-Clause license (the "License"). You may not use this package except in compliance with the License. You may obtain a copy of the License at:
+
https://opensource.org/licenses/BSD-3-Clause
+
Purpose
+
This directory contains the HTS221 component drivers.
+
+
+
Update History
+
+
V1.0.1 / 03-April-2019
+
+
Main Changes
+
+Update release notes format
+Reformat the BSD 3-Clause license declaration in the files header (replace license terms by a web reference to OSI website where those terms lie)
+
+
+
+
+
V1.0.0 / 14-February-2017
+
+
Main Changes
+
+First official release of HTS221 Temperature/Humidity sensor
+
+
+
+
+
+
+
+
diff --git a/P3_SETR2/Components/hts221/hts221.c b/P3_SETR2/Components/hts221/hts221.c
new file mode 100644
index 0000000..dbaa2fc
--- /dev/null
+++ b/P3_SETR2/Components/hts221/hts221.c
@@ -0,0 +1,229 @@
+/**
+ ******************************************************************************
+ * @file hts221.c
+ * @author MCD Application Team
+ * @brief This file provides a set of functions needed to manage the HTS221
+ * humidity and temperature devices
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2017 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/* Includes ------------------------------------------------------------------*/
+#include "hts221.h"
+
+/** @addtogroup BSP
+ * @{
+ */
+
+/** @addtogroup Component
+ * @{
+ */
+
+/** @defgroup HTS221 HTS221
+ * @{
+ */
+
+/** @defgroup HTS221_Private_Variables HTS221 Private Variables
+ * @{
+ */
+/* HTS221 Humidity Private Variables */
+HSENSOR_DrvTypeDef HTS221_H_Drv =
+{
+ HTS221_H_Init,
+ HTS221_H_ReadID,
+ HTS221_H_ReadHumidity
+};
+
+/* HTS221_Temperature_Private_Variables */
+TSENSOR_DrvTypeDef HTS221_T_Drv =
+{
+ HTS221_T_Init,
+ 0,
+ 0,
+ HTS221_T_ReadTemp
+};
+/**
+ * @}
+ */
+
+/** @defgroup HTS221_Humidity_Private_Functions HTS221 Humidity Private Functions
+ * @{
+ */
+/**
+ * @brief Set HTS221 humidity sensor Initialization.
+ */
+void HTS221_H_Init(uint16_t DeviceAddr)
+{
+ uint8_t tmp;
+
+ /* Read CTRL_REG1 */
+ tmp = SENSOR_IO_Read(DeviceAddr, HTS221_CTRL_REG1);
+
+ /* Enable BDU */
+ tmp &= ~HTS221_BDU_MASK;
+ tmp |= (1 << HTS221_BDU_BIT);
+
+ /* Set default ODR */
+ tmp &= ~HTS221_ODR_MASK;
+ tmp |= (uint8_t)0x01; /* Set ODR to 1Hz */
+
+ /* Activate the device */
+ tmp |= HTS221_PD_MASK;
+
+ /* Apply settings to CTRL_REG1 */
+ SENSOR_IO_Write(DeviceAddr, HTS221_CTRL_REG1, tmp);
+}
+
+/**
+ * @brief Read HTS221 ID.
+ * @retval ID
+ */
+uint8_t HTS221_H_ReadID(uint16_t DeviceAddr)
+{
+ uint8_t ctrl = 0x00;
+
+ /* IO interface initialization */
+ SENSOR_IO_Init();
+
+ /* Read value at Who am I register address */
+ ctrl = SENSOR_IO_Read(DeviceAddr, HTS221_WHO_AM_I_REG);
+
+ return ctrl;
+}
+
+/**
+ * @brief Read humidity value of HTS221
+ * @retval humidity value;
+ */
+float HTS221_H_ReadHumidity(uint16_t DeviceAddr)
+{
+ int16_t H0_T0_out, H1_T0_out, H_T_out;
+ int16_t H0_rh, H1_rh;
+ uint8_t buffer[2];
+ float tmp_f;
+
+ SENSOR_IO_ReadMultiple(DeviceAddr, (HTS221_H0_RH_X2 | 0x80), buffer, 2);
+
+ H0_rh = buffer[0] >> 1;
+ H1_rh = buffer[1] >> 1;
+
+ SENSOR_IO_ReadMultiple(DeviceAddr, (HTS221_H0_T0_OUT_L | 0x80), buffer, 2);
+
+ H0_T0_out = (((uint16_t)buffer[1]) << 8) | (uint16_t)buffer[0];
+
+ SENSOR_IO_ReadMultiple(DeviceAddr, (HTS221_H1_T0_OUT_L | 0x80), buffer, 2);
+
+ H1_T0_out = (((uint16_t)buffer[1]) << 8) | (uint16_t)buffer[0];
+
+ SENSOR_IO_ReadMultiple(DeviceAddr, (HTS221_HR_OUT_L_REG | 0x80), buffer, 2);
+
+ H_T_out = (((uint16_t)buffer[1]) << 8) | (uint16_t)buffer[0];
+
+ tmp_f = (float)(H_T_out - H0_T0_out) * (float)(H1_rh - H0_rh) / (float)(H1_T0_out - H0_T0_out) + H0_rh;
+ tmp_f *= 10.0f;
+
+ tmp_f = ( tmp_f > 1000.0f ) ? 1000.0f
+ : ( tmp_f < 0.0f ) ? 0.0f
+ : tmp_f;
+
+ return (tmp_f / 10.0f);
+}
+
+
+/**
+ * @}
+ */
+
+/** @defgroup HTS221_Temperature_Private_Functions HTS221 Temperature Private Functions
+ * @{
+ */
+
+/**
+ * @brief Set HTS221 temperature sensor Initialization.
+ * @param DeviceAddr: I2C device address
+ * @param InitStruct: pointer to a TSENSOR_InitTypeDef structure
+ * that contains the configuration setting for the HTS221.
+ */
+void HTS221_T_Init(uint16_t DeviceAddr, TSENSOR_InitTypeDef *pInitStruct)
+{
+ uint8_t tmp;
+
+ /* Read CTRL_REG1 */
+ tmp = SENSOR_IO_Read(DeviceAddr, HTS221_CTRL_REG1);
+
+ /* Enable BDU */
+ tmp &= ~HTS221_BDU_MASK;
+ tmp |= (1 << HTS221_BDU_BIT);
+
+ /* Set default ODR */
+ tmp &= ~HTS221_ODR_MASK;
+ tmp |= (uint8_t)0x01; /* Set ODR to 1Hz */
+
+ /* Activate the device */
+ tmp |= HTS221_PD_MASK;
+
+ /* Apply settings to CTRL_REG1 */
+ SENSOR_IO_Write(DeviceAddr, HTS221_CTRL_REG1, tmp);
+}
+
+/**
+ * @brief Read temperature value of HTS221
+ * @param DeviceAddr: I2C device address
+ * @retval temperature value
+ */
+float HTS221_T_ReadTemp(uint16_t DeviceAddr)
+{
+ int16_t T0_out, T1_out, T_out, T0_degC_x8_u16, T1_degC_x8_u16;
+ int16_t T0_degC, T1_degC;
+ uint8_t buffer[4], tmp;
+ float tmp_f;
+
+ SENSOR_IO_ReadMultiple(DeviceAddr, (HTS221_T0_DEGC_X8 | 0x80), buffer, 2);
+ tmp = SENSOR_IO_Read(DeviceAddr, HTS221_T0_T1_DEGC_H2);
+
+ T0_degC_x8_u16 = (((uint16_t)(tmp & 0x03)) << 8) | ((uint16_t)buffer[0]);
+ T1_degC_x8_u16 = (((uint16_t)(tmp & 0x0C)) << 6) | ((uint16_t)buffer[1]);
+ T0_degC = T0_degC_x8_u16 >> 3;
+ T1_degC = T1_degC_x8_u16 >> 3;
+
+ SENSOR_IO_ReadMultiple(DeviceAddr, (HTS221_T0_OUT_L | 0x80), buffer, 4);
+
+ T0_out = (((uint16_t)buffer[1]) << 8) | (uint16_t)buffer[0];
+ T1_out = (((uint16_t)buffer[3]) << 8) | (uint16_t)buffer[2];
+
+ SENSOR_IO_ReadMultiple(DeviceAddr, (HTS221_TEMP_OUT_L_REG | 0x80), buffer, 2);
+
+ T_out = (((uint16_t)buffer[1]) << 8) | (uint16_t)buffer[0];
+
+ tmp_f = (float)(T_out - T0_out) * (float)(T1_degC - T0_degC) / (float)(T1_out - T0_out) + T0_degC;
+
+ return tmp_f;
+}
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/P3_SETR2/Components/hts221/hts221.h b/P3_SETR2/Components/hts221/hts221.h
new file mode 100644
index 0000000..2a500e5
--- /dev/null
+++ b/P3_SETR2/Components/hts221/hts221.h
@@ -0,0 +1,320 @@
+/**
+ ******************************************************************************
+ * @file hts221.h
+ * @author MCD Application Team
+ * @brief HTS221 header driver file
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2017 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __HTS221__H
+#define __HTS221__H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "../Common/hsensor.h"
+#include "../Common/tsensor.h"
+
+/** @addtogroup BSP
+ * @{
+ */
+
+/** @addtogroup Component
+ * @{
+ */
+
+/** @addtogroup HTS221
+ * @{
+ */
+
+/** @defgroup HTS221_Exported_Constants HTS221 Exported Constants
+ * @{
+ */
+
+/**
+ * @brief Bitfield positioning.
+ */
+#define HTS221_BIT(x) ((uint8_t)x)
+
+
+/**
+ * @brief Device Identification register.
+ * Read
+ * Default value: 0xBC
+ * 7:0 This read-only register contains the device identifier for HTS221.
+ */
+#define HTS221_WHO_AM_I_REG (uint8_t)0x0F
+
+/**
+ * @brief Device Identification value.
+ */
+#define HTS221_WHO_AM_I_VAL (uint8_t)0xBC
+
+
+/**
+ * @brief Humidity and temperature average mode register.
+ * Read/write
+ * Default value: 0x1B
+ * 7:6 Reserved.
+ * 5:3 AVGT2-AVGT1-AVGT0: Select the temperature internal average.
+ *
+ * AVGT2 | AVGT1 | AVGT0 | Nr. Internal Average
+ * ----------------------------------------------------
+ * 0 | 0 | 0 | 2
+ * 0 | 0 | 1 | 4
+ * 0 | 1 | 0 | 8
+ * 0 | 1 | 1 | 16
+ * 1 | 0 | 0 | 32
+ * 1 | 0 | 1 | 64
+ * 1 | 1 | 0 | 128
+ * 1 | 1 | 1 | 256
+ *
+ * 2:0 AVGH2-AVGH1-AVGH0: Select humidity internal average.
+ * AVGH2 | AVGH1 | AVGH0 | Nr. Internal Average
+ * ------------------------------------------------------
+ * 0 | 0 | 0 | 4
+ * 0 | 0 | 1 | 8
+ * 0 | 1 | 0 | 16
+ * 0 | 1 | 1 | 32
+ * 1 | 0 | 0 | 64
+ * 1 | 0 | 1 | 128
+ * 1 | 1 | 0 | 256
+ * 1 | 1 | 1 | 512
+ *
+ */
+#define HTS221_AV_CONF_REG (uint8_t)0x10
+
+#define HTS221_AVGT_BIT HTS221_BIT(3)
+#define HTS221_AVGH_BIT HTS221_BIT(0)
+
+#define HTS221_AVGH_MASK (uint8_t)0x07
+#define HTS221_AVGT_MASK (uint8_t)0x38
+
+/**
+ * @brief Control register 1.
+ * Read/write
+ * Default value: 0x00
+ * 7 PD: power down control. 0 - power down mode; 1 - active mode.
+ * 6:3 Reserved.
+ * 2 BDU: block data update. 0 - continuous update
+ * 1 - output registers not updated until MSB and LSB reading.
+ * 1:0 ODR1, ODR0: output data rate selection.
+ *
+ * ODR1 | ODR0 | Humidity output data-rate(Hz) | Pressure output data-rate(Hz)
+ * ----------------------------------------------------------------------------------
+ * 0 | 0 | one shot | one shot
+ * 0 | 1 | 1 | 1
+ * 1 | 0 | 7 | 7
+ * 1 | 1 | 12.5 | 12.5
+ *
+ */
+#define HTS221_CTRL_REG1 (uint8_t)0x20
+
+#define HTS221_PD_BIT HTS221_BIT(7)
+#define HTS221_BDU_BIT HTS221_BIT(2)
+#define HTS221_ODR_BIT HTS221_BIT(0)
+
+#define HTS221_PD_MASK (uint8_t)0x80
+#define HTS221_BDU_MASK (uint8_t)0x04
+#define HTS221_ODR_MASK (uint8_t)0x03
+
+/**
+ * @brief Control register 2.
+ * Read/write
+ * Default value: 0x00
+ * 7 BOOT: Reboot memory content. 0: normal mode
+ * 1: reboot memory content. Self-cleared upon completation.
+ * 6:2 Reserved.
+ * 1 HEATHER: 0: heater enable; 1: heater disable.
+ * 0 ONE_SHOT: 0: waiting for start of conversion
+ * 1: start for a new dataset. Self-cleared upon completation.
+ */
+#define HTS221_CTRL_REG2 (uint8_t)0x21
+
+#define HTS221_BOOT_BIT HTS221_BIT(7)
+#define HTS221_HEATHER_BIT HTS221_BIT(1)
+#define HTS221_ONESHOT_BIT HTS221_BIT(0)
+
+#define HTS221_BOOT_MASK (uint8_t)0x80
+#define HTS221_HEATHER_MASK (uint8_t)0x02
+#define HTS221_ONE_SHOT_MASK (uint8_t)0x01
+
+/**
+ * @brief Control register 3.
+ * Read/write
+ * Default value: 0x00
+ * 7 DRDY_H_L: Interrupt edge. 0: active high, 1: active low.
+ * 6 PP_OD: Push-Pull/OpenDrain selection on interrupt pads. 0: push-pull
+ * 1: open drain.
+ * 5:3 Reserved.
+ * 2 DRDY: interrupt config. 0: disable, 1: enable.
+ */
+#define HTS221_CTRL_REG3 (uint8_t)0x22
+
+#define HTS221_DRDY_H_L_BIT HTS221_BIT(7)
+#define HTS221_PP_OD_BIT HTS221_BIT(6)
+#define HTS221_DRDY_BIT HTS221_BIT(2)
+
+#define HTS221_DRDY_H_L_MASK (uint8_t)0x80
+#define HTS221_PP_OD_MASK (uint8_t)0x40
+#define HTS221_DRDY_MASK (uint8_t)0x04
+
+/**
+ * @brief Status register.
+ * Read
+ * Default value: 0x00
+ * 7:2 Reserved.
+ * 1 H_DA: Humidity data available. 0: new data for humidity is not yet available
+ * 1: new data for humidity is available.
+ * 0 T_DA: Temperature data available. 0: new data for temperature is not yet available
+ * 1: new data for temperature is available.
+ */
+#define HTS221_STATUS_REG (uint8_t)0x27
+
+#define HTS221_H_DA_BIT HTS221_BIT(1)
+#define HTS221_T_DA_BIT HTS221_BIT(0)
+
+#define HTS221_HDA_MASK (uint8_t)0x02
+#define HTS221_TDA_MASK (uint8_t)0x01
+
+/**
+ * @brief Humidity data (LSB).
+ * Read
+ * Default value: 0x00.
+ * HOUT7 - HOUT0: Humidity data LSB (2's complement).
+ */
+#define HTS221_HR_OUT_L_REG (uint8_t)0x28
+
+/**
+ * @brief Humidity data (MSB).
+ * Read
+ * Default value: 0x00.
+ * HOUT15 - HOUT8: Humidity data MSB (2's complement).
+ */
+#define HTS221_HR_OUT_H_REG (uint8_t)0x29
+
+/**
+ * @brief Temperature data (LSB).
+ * Read
+ * Default value: 0x00.
+ * TOUT7 - TOUT0: temperature data LSB.
+ */
+#define HTS221_TEMP_OUT_L_REG (uint8_t)0x2A
+
+/**
+ * @brief Temperature data (MSB).
+ * Read
+ * Default value: 0x00.
+ * TOUT15 - TOUT8: temperature data MSB.
+ */
+#define HTS221_TEMP_OUT_H_REG (uint8_t)0x2B
+
+/**
+ * @brief Calibration registers.
+ * Read
+ */
+#define HTS221_H0_RH_X2 (uint8_t)0x30
+#define HTS221_H1_RH_X2 (uint8_t)0x31
+#define HTS221_T0_DEGC_X8 (uint8_t)0x32
+#define HTS221_T1_DEGC_X8 (uint8_t)0x33
+#define HTS221_T0_T1_DEGC_H2 (uint8_t)0x35
+#define HTS221_H0_T0_OUT_L (uint8_t)0x36
+#define HTS221_H0_T0_OUT_H (uint8_t)0x37
+#define HTS221_H1_T0_OUT_L (uint8_t)0x3A
+#define HTS221_H1_T0_OUT_H (uint8_t)0x3B
+#define HTS221_T0_OUT_L (uint8_t)0x3C
+#define HTS221_T0_OUT_H (uint8_t)0x3D
+#define HTS221_T1_OUT_L (uint8_t)0x3E
+#define HTS221_T1_OUT_H (uint8_t)0x3F
+
+/**
+* @}
+*/
+
+
+/** @defgroup HTS221_Humidity_Exported_Functions HTS221 Humidity Exported Functions
+ * @{
+ */
+/* HUMIDITY functions */
+void HTS221_H_Init(uint16_t DeviceAddr);
+uint8_t HTS221_H_ReadID(uint16_t DeviceAddr);
+float HTS221_H_ReadHumidity(uint16_t DeviceAddr);
+/**
+ * @}
+ */
+
+/** @defgroup HTS221_HumImported_Globals Humidity Imported Globals
+ * @{
+ */
+/* Humidity driver structure */
+extern HSENSOR_DrvTypeDef HTS221_H_Drv;
+/**
+ * @}
+ */
+
+/** @defgroup HTS221_Temperature_Exported_Functions HTS221 Temperature Exported Functions
+ * @{
+ */
+/* TEMPERATURE functions */
+void HTS221_T_Init(uint16_t DeviceAddr, TSENSOR_InitTypeDef *pInitStruct);
+float HTS221_T_ReadTemp(uint16_t DeviceAddr);
+/**
+ * @}
+ */
+
+/** @defgroup HTS221_TempImported_Globals Temperature Imported Globals
+ * @{
+ */
+/* Temperature driver structure */
+extern TSENSOR_DrvTypeDef HTS221_T_Drv;
+
+/**
+ * @}
+ */
+
+/** @defgroup HTS221_Imported_Functions HTS221 Imported Functions
+ * @{
+ */
+/* IO functions */
+extern void SENSOR_IO_Init(void);
+extern void SENSOR_IO_Write(uint8_t Addr, uint8_t Reg, uint8_t Value);
+extern uint8_t SENSOR_IO_Read(uint8_t Addr, uint8_t Reg);
+extern uint16_t SENSOR_IO_ReadMultiple(uint8_t Addr, uint8_t Reg, uint8_t *Buffer, uint16_t Length);
+extern void SENSOR_IO_WriteMultiple(uint8_t Addr, uint8_t Reg, uint8_t *Buffer, uint16_t Length);
+/**
+ * @}
+ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __HTS221__H */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/P3_SETR2/Components/hx8347g/Release_Notes.html b/P3_SETR2/Components/hx8347g/Release_Notes.html
new file mode 100644
index 0000000..9649ff4
--- /dev/null
+++ b/P3_SETR2/Components/hx8347g/Release_Notes.html
@@ -0,0 +1,92 @@
+
+
+
+
+
+
+ Release Notes for HX8347G Component Drivers
+
+
+
+
+
+
+
+
+
+
+Release Notes for HX8347G Component Drivers
+Copyright © 2016 STMicroelectronics
+
+
+
+
+
+
License
+
Licensed by ST under BSD 3-Clause license (the "License"). You may not use this package except in compliance with the License. You may obtain a copy of the License at:
+
https://opensource.org/licenses/BSD-3-Clause
+
Purpose
+
This directory contains the HX8347G component drivers.
+
+
+
Update History
+
+
V1.1.2 / 03-April-2019
+
+
Main Changes
+
+Update release notes format
+Reformat the BSD 3-Clause license declaration in the files header (replace license terms by a web reference to OSI website where those terms lie)
+
+
+
+
+
V1.1.1 / 16-February-2016
+
+
Main Changes
+
+Fix hx8347g_ReadReg() to write Index in Index Register (IR)
+
+
+
+
+
V1.1.0 / 10-February-2015
+
+
Main Changes
+
+Harmonize all LCD controllers Link usage (Change LCD_IO_WriteData to LCD_IO_WriteMultipleData)
+
+
+
+
+
V1.0.1 / 02-December-2014
+
+
Main Changes
+
+hx8347g.h: change “\” by “/” in the include path to fix compilation issue under Linux
+
+
+
+
+
V1.0.0 / 06-May-2014
+
+
Main Changes
+
+First official release of HX8347G LCD component driver
+
+
+
+
+
+
+
+
diff --git a/P3_SETR2/Components/hx8347g/hx8347g.c b/P3_SETR2/Components/hx8347g/hx8347g.c
new file mode 100644
index 0000000..48e4403
--- /dev/null
+++ b/P3_SETR2/Components/hx8347g/hx8347g.c
@@ -0,0 +1,473 @@
+/**
+ ******************************************************************************
+ * @file hx8347g.c
+ * @author MCD Application Team
+ * @brief This file includes the LCD driver for HX8347G LCD.
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2016 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/* Includes ------------------------------------------------------------------*/
+#include "hx8347g.h"
+
+/** @addtogroup BSP
+ * @{
+ */
+
+/** @addtogroup Components
+ * @{
+ */
+
+/** @addtogroup HX8347G
+ * @brief This file provides a set of functions needed to drive the
+ * HX8347G LCD.
+ * @{
+ */
+
+/** @defgroup HX8347G_Private_TypesDefinitions
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @defgroup HX8347G_Private_Defines
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @defgroup HX8347G_Private_Macros
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @defgroup HX8347G_Private_Variables
+ * @{
+ */
+LCD_DrvTypeDef hx8347g_drv =
+{
+ hx8347g_Init,
+ hx8347g_ReadID,
+ hx8347g_DisplayOn,
+ hx8347g_DisplayOff,
+ hx8347g_SetCursor,
+ hx8347g_WritePixel,
+ hx8347g_ReadPixel,
+ hx8347g_SetDisplayWindow,
+ hx8347g_DrawHLine,
+ hx8347g_DrawVLine,
+ hx8347g_GetLcdPixelWidth,
+ hx8347g_GetLcdPixelHeight,
+ hx8347g_DrawBitmap,
+};
+
+static uint8_t Is_hx8347g_Initialized = 0;
+static uint16_t ArrayRGB[320] = {0};
+
+/**
+ * @}
+ */
+
+/** @defgroup HX8347G_Private_FunctionPrototypes
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @defgroup HX8347G_Private_Functions
+ * @{
+ */
+
+/**
+ * @brief Initialise the HX8347G LCD Component.
+ * @param None
+ * @retval None
+ */
+void hx8347g_Init(void)
+{
+ if(Is_hx8347g_Initialized == 0)
+ {
+ Is_hx8347g_Initialized = 1;
+
+ /* Initialise HX8347G low level bus layer --------------------------------*/
+ LCD_IO_Init();
+
+ /* HX8347G requests 120ms (worst case) after reset */
+ LCD_Delay(120);
+
+ /* Driving ability setting */
+ hx8347g_WriteReg(LCD_REG_234, 0x00);
+ hx8347g_WriteReg(LCD_REG_235, 0x20);
+ hx8347g_WriteReg(LCD_REG_236, 0x0C);
+ hx8347g_WriteReg(LCD_REG_237, 0xC4);
+ hx8347g_WriteReg(LCD_REG_232, 0x40);
+ hx8347g_WriteReg(LCD_REG_233, 0x38);
+ hx8347g_WriteReg(LCD_REG_241, 0x01);
+ hx8347g_WriteReg(LCD_REG_242, 0x10);
+ hx8347g_WriteReg(LCD_REG_39, 0xA3);
+
+ /* Adjust the Gamma Curve */
+ hx8347g_WriteReg(LCD_REG_64, 0x01);
+ hx8347g_WriteReg(LCD_REG_65, 0x00);
+ hx8347g_WriteReg(LCD_REG_66, 0x00);
+ hx8347g_WriteReg(LCD_REG_67, 0x10);
+ hx8347g_WriteReg(LCD_REG_68, 0x0E);
+ hx8347g_WriteReg(LCD_REG_69, 0x24);
+ hx8347g_WriteReg(LCD_REG_70, 0x04);
+ hx8347g_WriteReg(LCD_REG_71, 0x50);
+ hx8347g_WriteReg(LCD_REG_72, 0x02);
+ hx8347g_WriteReg(LCD_REG_73, 0x13);
+ hx8347g_WriteReg(LCD_REG_74, 0x19);
+ hx8347g_WriteReg(LCD_REG_75, 0x19);
+ hx8347g_WriteReg(LCD_REG_76, 0x16);
+ hx8347g_WriteReg(LCD_REG_80, 0x1B);
+ hx8347g_WriteReg(LCD_REG_81, 0x31);
+ hx8347g_WriteReg(LCD_REG_82, 0x2F);
+ hx8347g_WriteReg(LCD_REG_83, 0x3F);
+ hx8347g_WriteReg(LCD_REG_84, 0x3F);
+ hx8347g_WriteReg(LCD_REG_85, 0x3E);
+ hx8347g_WriteReg(LCD_REG_86, 0x2F);
+ hx8347g_WriteReg(LCD_REG_87, 0x7B);
+ hx8347g_WriteReg(LCD_REG_88, 0x09);
+ hx8347g_WriteReg(LCD_REG_89, 0x06);
+ hx8347g_WriteReg(LCD_REG_90, 0x06);
+ hx8347g_WriteReg(LCD_REG_91, 0x0C);
+ hx8347g_WriteReg(LCD_REG_92, 0x1D);
+ hx8347g_WriteReg(LCD_REG_93, 0xCC);
+
+ /* Power voltage setting */
+ hx8347g_WriteReg(LCD_REG_27, 0x1B);
+ hx8347g_WriteReg(LCD_REG_26, 0x01);
+ hx8347g_WriteReg(LCD_REG_36, 0x2F);
+ hx8347g_WriteReg(LCD_REG_37, 0x57);
+ /*****VCOM offset ****/
+ hx8347g_WriteReg(LCD_REG_35, 0x86);
+
+ hx8347g_DisplayOn();
+
+ /* Set GRAM Area - Partial Display Control */
+ hx8347g_WriteReg(LCD_REG_1, 0x00); /* DP_STB = 0, DP_STB_S = 0, SCROLL = 0, */
+ hx8347g_SetDisplayWindow(0, 0, hx8347g_GetLcdPixelWidth(), hx8347g_GetLcdPixelHeight());
+ hx8347g_WriteReg(LCD_REG_22, 0xA0); /* Memory access control: MY = 1, MX = 0, MV = 1, ML = 0 */
+ }
+
+ /* Set the Cursor */
+ hx8347g_SetCursor(0, 0);
+
+ /* Prepare to write GRAM */
+ LCD_IO_WriteReg(LCD_REG_34);
+}
+
+/**
+ * @brief Enables the Display.
+ * @param None
+ * @retval None
+ */
+void hx8347g_DisplayOn(void)
+{
+ /* Power On sequence ---------------------------------------------------------*/
+ hx8347g_WriteReg(LCD_REG_24, 0x36); /* Display frame rate = 70Hz RADJ = '0110' */
+ hx8347g_WriteReg(LCD_REG_25, 0x01); /* OSC_EN = 1 */
+ hx8347g_WriteReg(LCD_REG_28, 0x06); /* AP[2:0] = 111 */
+ hx8347g_WriteReg(LCD_REG_31, 0x90); /* GAS=1, VOMG=00, PON=1, DK=0, XDK=0, DVDH_TRI=0, STB=0*/
+ LCD_Delay(10);
+ /* 262k/65k color selection */
+ hx8347g_WriteReg(LCD_REG_23, 0x05); /* default 0x06 262k color, 0x05 65k color */
+ /* SET PANEL */
+ hx8347g_WriteReg(LCD_REG_54, 0x09); /* SS_PANEL = 1, GS_PANEL = 0,REV_PANEL = 0, BGR_PANEL = 1 */
+
+ /* Display On */
+ hx8347g_WriteReg(LCD_REG_40, 0x38);
+ LCD_Delay(60);
+ hx8347g_WriteReg(LCD_REG_40, 0x3C);
+}
+
+/**
+ * @brief Disables the Display.
+ * @param None
+ * @retval None
+ */
+void hx8347g_DisplayOff(void)
+{
+ /* Display Off */
+ hx8347g_WriteReg(LCD_REG_40, 0x38);
+ LCD_Delay(60);
+ hx8347g_WriteReg(LCD_REG_40, 0x04);
+
+ /* Power Off sequence ---------------------------------------------------------*/
+ hx8347g_WriteReg(LCD_REG_23, 0x0000); /* default 0x06 262k color, 0x05 65k color */
+ hx8347g_WriteReg(LCD_REG_24, 0x0000); /* Display frame rate = 70Hz RADJ = '0110' */
+ hx8347g_WriteReg(LCD_REG_25, 0x0000); /* OSC_EN = 1 */
+ hx8347g_WriteReg(LCD_REG_28, 0x0000); /* AP[2:0] = 111 */
+ hx8347g_WriteReg(LCD_REG_31, 0x0000); /* GAS=1, VOMG=00, PON=1, DK=0, XDK=0, DVDH_TRI=0, STB=0*/
+ hx8347g_WriteReg(LCD_REG_54, 0x0000); /* SS_PANEL = 1, GS_PANEL = 0,REV_PANEL = 0, BGR_PANEL = 1 */
+}
+
+/**
+ * @brief Get the LCD pixel Width.
+ * @param None
+ * @retval The Lcd Pixel Width
+ */
+uint16_t hx8347g_GetLcdPixelWidth(void)
+{
+ return (uint16_t)HX8347G_LCD_PIXEL_WIDTH;
+}
+
+/**
+ * @brief Get the LCD pixel Height.
+ * @param None
+ * @retval The Lcd Pixel Height
+ */
+uint16_t hx8347g_GetLcdPixelHeight(void)
+{
+ return (uint16_t)HX8347G_LCD_PIXEL_HEIGHT;
+}
+
+/**
+ * @brief Get the HX8347G ID.
+ * @param None
+ * @retval The HX8347G ID
+ */
+uint16_t hx8347g_ReadID(void)
+{
+ if(Is_hx8347g_Initialized == 0)
+ {
+ LCD_IO_Init();
+
+ /* HX8347G requests 120ms (worst case) after reset */
+ LCD_Delay(120);
+ }
+ return (hx8347g_ReadReg(0x00));
+}
+
+/**
+ * @brief Set Cursor position.
+ * @param Xpos: specifies the X position.
+ * @param Ypos: specifies the Y position.
+ * @retval None
+ */
+void hx8347g_SetCursor(uint16_t Xpos, uint16_t Ypos)
+{
+ hx8347g_WriteReg(LCD_REG_6, 0x00);
+ hx8347g_WriteReg(LCD_REG_7, Xpos);
+ hx8347g_WriteReg(LCD_REG_2, Ypos >> 8);
+ hx8347g_WriteReg(LCD_REG_3, Ypos & 0xFF);
+}
+
+/**
+ * @brief Write pixel.
+ * @param Xpos: specifies the X position.
+ * @param Ypos: specifies the Y position.
+* @param RGBCode: the RGB pixel color
+ * @retval None
+ */
+void hx8347g_WritePixel(uint16_t Xpos, uint16_t Ypos, uint16_t RGBCode)
+{
+ /* Set Cursor */
+ hx8347g_SetCursor(Xpos, Ypos);
+
+ /* Prepare to write GRAM */
+ LCD_IO_WriteReg(LCD_REG_34);
+
+ /* Write 16-bit GRAM Reg */
+ LCD_IO_WriteMultipleData((uint8_t*)&RGBCode, 2);
+}
+
+/**
+ * @brief Read pixel.
+ * @param None
+ * @retval the RGB pixel color
+ */
+uint16_t hx8347g_ReadPixel(uint16_t Xpos, uint16_t Ypos)
+{
+ /* Set Cursor */
+ hx8347g_SetCursor(Xpos, Ypos);
+
+ /* Dummy read */
+ LCD_IO_ReadData(LCD_REG_34);
+
+ /* Read 16-bit Reg */
+ return (LCD_IO_ReadData(LCD_REG_34));
+}
+
+/**
+ * @brief Writes to the selected LCD register.
+* @param LCDReg: address of the selected register.
+* @param LCDRegValue: value to write to the selected register.
+ * @retval None
+ */
+void hx8347g_WriteReg(uint8_t LCDReg, uint16_t LCDRegValue)
+{
+ LCD_IO_WriteReg(LCDReg);
+
+ /* Write 16-bit GRAM Reg */
+ LCD_IO_WriteMultipleData((uint8_t*)&LCDRegValue, 2);
+}
+
+/**
+ * @brief Reads the selected LCD Register.
+* @param LCDReg: address of the selected register.
+ * @retval LCD Register Value.
+ */
+uint16_t hx8347g_ReadReg(uint8_t LCDReg)
+{
+ /* Write 16-bit Index (then Read Reg) */
+ LCD_IO_WriteReg(LCDReg);
+
+ /* Read 16-bit Reg */
+ return (LCD_IO_ReadData(LCDReg));
+}
+
+/**
+ * @brief Sets a display window
+ * @param Xpos: specifies the X bottom left position.
+ * @param Ypos: specifies the Y bottom left position.
+ * @param Height: display window height.
+ * @param Width: display window width.
+ * @retval None
+ */
+void hx8347g_SetDisplayWindow(uint16_t Xpos, uint16_t Ypos, uint16_t Width, uint16_t Height)
+{
+ /* Horizontal GRAM Start Address */
+ hx8347g_WriteReg(LCD_REG_6, (Xpos) >> 8); /* SP */
+ hx8347g_WriteReg(LCD_REG_7, (Xpos) & 0xFF); /* SP */
+
+ /* Horizontal GRAM End Address */
+ hx8347g_WriteReg(LCD_REG_8, (Xpos + Height - 1) >> 8); /* EP */
+ hx8347g_WriteReg(LCD_REG_9, (Xpos + Height - 1) & 0xFF); /* EP */
+
+ /* Vertical GRAM Start Address */
+ hx8347g_WriteReg(LCD_REG_2, (Ypos) >> 8); /* SC */
+ hx8347g_WriteReg(LCD_REG_3, (Ypos) & 0xFF); /* SC */
+
+ /* Vertical GRAM End Address */
+ hx8347g_WriteReg(LCD_REG_4, (Ypos + Width - 1) >> 8); /* EC */
+ hx8347g_WriteReg(LCD_REG_5, (Ypos + Width - 1) & 0xFF); /* EC */
+}
+
+/**
+ * @brief Draw vertical line.
+* @param RGBCode: Specifies the RGB color
+ * @param Xpos: specifies the X position.
+ * @param Ypos: specifies the Y position.
+ * @param Length: specifies the Line length.
+ * @retval None
+ */
+void hx8347g_DrawHLine(uint16_t RGBCode, uint16_t Xpos, uint16_t Ypos, uint16_t Length)
+{
+ uint32_t i = 0;
+
+ /* Set Cursor */
+ hx8347g_SetCursor(Xpos, Ypos);
+
+ /* Prepare to write GRAM */
+ LCD_IO_WriteReg(LCD_REG_34);
+
+ /* Sent a complete line */
+ for(i = 0; i < Length; i++)
+ {
+ ArrayRGB[i] = RGBCode;
+ }
+
+ LCD_IO_WriteMultipleData((uint8_t*)&ArrayRGB[0], Length * 2);
+}
+
+/**
+ * @brief Draw vertical line.
+* @param RGBCode: Specifies the RGB color
+ * @param Xpos: specifies the X position.
+ * @param Ypos: specifies the Y position.
+ * @param Length: specifies the Line length.
+ * @retval None
+ */
+void hx8347g_DrawVLine(uint16_t RGBCode, uint16_t Xpos, uint16_t Ypos, uint16_t Length)
+{
+ uint16_t counter = 0;
+
+ /* Set Cursor */
+ hx8347g_SetCursor(Xpos, Ypos);
+
+ /* Prepare to write GRAM */
+ LCD_IO_WriteReg(LCD_REG_34);
+
+ /* Fill a complete vertical line */
+ for(counter = 0; counter < Length; counter++)
+ {
+ ArrayRGB[counter] = RGBCode;
+ }
+
+ /* Write 16-bit GRAM Reg */
+ LCD_IO_WriteMultipleData((uint8_t*)&ArrayRGB[0], Length * 2);
+}
+
+/**
+ * @brief Displays a bitmap picture loaded in the internal Flash.
+ * @param BmpAddress: Bmp picture address in the internal Flash.
+ * @retval None
+ */
+void hx8347g_DrawBitmap(uint16_t Xpos, uint16_t Ypos, uint8_t *pbmp)
+{
+ uint32_t index = 0, size = 0;
+
+ /* Read bitmap size */
+ size = *(volatile uint16_t *) (pbmp + 2);
+ size |= (*(volatile uint16_t *) (pbmp + 4)) << 16;
+ /* Get bitmap data address offset */
+ index = *(volatile uint16_t *) (pbmp + 10);
+ index |= (*(volatile uint16_t *) (pbmp + 12)) << 16;
+ size = (size - index)/2;
+ pbmp += index;
+
+ /* Set GRAM write direction and BGR = 0 */
+ /* Memory access control: MY = 1, MX = 0, MV = 1, ML = 0 */
+ hx8347g_WriteReg(LCD_REG_22, 0xE0);
+
+ /* Set Cursor */
+ hx8347g_SetCursor(Xpos, Ypos);
+
+ /* Prepare to write GRAM */
+ LCD_IO_WriteReg(LCD_REG_34);
+
+ LCD_IO_WriteMultipleData((uint8_t*)pbmp, size*2);
+
+ /* Set GRAM write direction and BGR = 0 */
+ /* Memory access control: MY = 1, MX = 1, MV = 1, ML = 0 */
+ hx8347g_WriteReg(LCD_REG_22, 0xA0);
+}
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/P3_SETR2/Components/hx8347g/hx8347g.h b/P3_SETR2/Components/hx8347g/hx8347g.h
new file mode 100644
index 0000000..49705ea
--- /dev/null
+++ b/P3_SETR2/Components/hx8347g/hx8347g.h
@@ -0,0 +1,256 @@
+/**
+ ******************************************************************************
+ * @file hx8347g.h
+ * @author MCD Application Team
+ * @brief This file contains all the functions prototypes for the hx8347g.c
+ * driver.
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2016 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __HX8347G_H
+#define __HX8347G_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "../Common/lcd.h"
+
+/** @addtogroup BSP
+ * @{
+ */
+
+/** @addtogroup Components
+ * @{
+ */
+
+/** @addtogroup hx8347g
+ * @{
+ */
+
+/** @defgroup HX8347G_Exported_Types
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @defgroup HX8347G_Exported_Constants
+ * @{
+ */
+/**
+ * @brief HX8347G ID
+ */
+#define HX8347G_ID 0x0075
+
+/**
+ * @brief HX8347G Size
+ */
+#define HX8347G_LCD_PIXEL_WIDTH ((uint16_t)320)
+#define HX8347G_LCD_PIXEL_HEIGHT ((uint16_t)240)
+
+/**
+ * @brief HX8347G Registers
+ */
+#define LCD_REG_0 0x00
+#define LCD_REG_1 0x01
+#define LCD_REG_2 0x02
+#define LCD_REG_3 0x03
+#define LCD_REG_4 0x04
+#define LCD_REG_5 0x05
+#define LCD_REG_6 0x06
+#define LCD_REG_7 0x07
+#define LCD_REG_8 0x08
+#define LCD_REG_9 0x09
+#define LCD_REG_10 0x0A
+#define LCD_REG_11 0x0B
+#define LCD_REG_12 0x0C
+#define LCD_REG_13 0x0D
+#define LCD_REG_14 0x0E
+#define LCD_REG_15 0x0F
+#define LCD_REG_16 0x10
+#define LCD_REG_17 0x11
+#define LCD_REG_18 0x12
+#define LCD_REG_19 0x13
+#define LCD_REG_20 0x14
+#define LCD_REG_21 0x15
+#define LCD_REG_22 0x16
+#define LCD_REG_23 0x17
+#define LCD_REG_24 0x18
+#define LCD_REG_25 0x19
+#define LCD_REG_26 0x1A
+#define LCD_REG_27 0x1B
+#define LCD_REG_28 0x1C
+#define LCD_REG_29 0x1D
+#define LCD_REG_30 0x1E
+#define LCD_REG_31 0x1F
+#define LCD_REG_32 0x20
+#define LCD_REG_33 0x21
+#define LCD_REG_34 0x22
+#define LCD_REG_35 0x23
+#define LCD_REG_36 0x24
+#define LCD_REG_37 0x25
+#define LCD_REG_38 0x26
+#define LCD_REG_39 0x27
+#define LCD_REG_40 0x28
+#define LCD_REG_41 0x29
+#define LCD_REG_42 0x2A
+#define LCD_REG_43 0x2B
+#define LCD_REG_44 0x2C
+#define LCD_REG_45 0x2D
+#define LCD_REG_46 0x2E
+#define LCD_REG_47 0x2F
+#define LCD_REG_48 0x30
+#define LCD_REG_49 0x31
+#define LCD_REG_50 0x32
+#define LCD_REG_51 0x33
+#define LCD_REG_52 0x34
+#define LCD_REG_53 0x35
+#define LCD_REG_54 0x36
+#define LCD_REG_55 0x37
+#define LCD_REG_56 0x38
+#define LCD_REG_57 0x39
+#define LCD_REG_58 0x3A
+#define LCD_REG_59 0x3B
+#define LCD_REG_60 0x3C
+#define LCD_REG_61 0x3D
+#define LCD_REG_62 0x3E
+#define LCD_REG_63 0x3F
+#define LCD_REG_64 0x40
+#define LCD_REG_65 0x41
+#define LCD_REG_66 0x42
+#define LCD_REG_67 0x43
+#define LCD_REG_68 0x44
+#define LCD_REG_69 0x45
+#define LCD_REG_70 0x46
+#define LCD_REG_71 0x47
+#define LCD_REG_72 0x48
+#define LCD_REG_73 0x49
+#define LCD_REG_74 0x4A
+#define LCD_REG_75 0x4B
+#define LCD_REG_76 0x4C
+#define LCD_REG_77 0x4D
+#define LCD_REG_78 0x4E
+#define LCD_REG_79 0x4F
+#define LCD_REG_80 0x50
+#define LCD_REG_81 0x51
+#define LCD_REG_82 0x52
+#define LCD_REG_83 0x53
+#define LCD_REG_84 0x54
+#define LCD_REG_85 0x55
+#define LCD_REG_86 0x56
+#define LCD_REG_87 0x57
+#define LCD_REG_88 0x58
+#define LCD_REG_89 0x59
+#define LCD_REG_90 0x5A
+#define LCD_REG_91 0x5B
+#define LCD_REG_92 0x5C
+#define LCD_REG_93 0x5D
+#define LCD_REG_94 0x5E
+#define LCD_REG_95 0x5F
+#define LCD_REG_96 0x60
+#define LCD_REG_97 0x61
+#define LCD_REG_98 0x62
+#define LCD_REG_99 0x63
+#define LCD_REG_104 0x68
+#define LCD_REG_105 0x69
+#define LCD_REG_112 0x70
+#define LCD_REG_113 0x71
+#define LCD_REG_132 0x84
+#define LCD_REG_133 0x85
+#define LCD_REG_195 0xC3
+#define LCD_REG_197 0xC5
+#define LCD_REG_199 0xC7
+#define LCD_REG_203 0xCB
+#define LCD_REG_204 0xCC
+#define LCD_REG_205 0xCD
+#define LCD_REG_206 0xCE
+#define LCD_REG_207 0xCF
+#define LCD_REG_208 0xD0
+#define LCD_REG_209 0xD1
+#define LCD_REG_210 0xD2
+#define LCD_REG_211 0xD3
+#define LCD_REG_232 0xE8
+#define LCD_REG_233 0xE9
+#define LCD_REG_234 0xEA
+#define LCD_REG_235 0xEB
+#define LCD_REG_236 0xEC
+#define LCD_REG_237 0xED
+#define LCD_REG_241 0xF1
+#define LCD_REG_242 0xF2
+#define LCD_REG_255 0xFF
+
+/**
+ * @}
+ */
+
+/** @defgroup HX8347G_Exported_Functions
+ * @{
+ */
+void hx8347g_Init(void);
+uint16_t hx8347g_ReadID(void);
+void hx8347g_WriteReg(uint8_t LCDReg, uint16_t LCDRegValue);
+uint16_t hx8347g_ReadReg(uint8_t LCDReg);
+
+void hx8347g_DisplayOn(void);
+void hx8347g_DisplayOff(void);
+void hx8347g_SetCursor(uint16_t Xpos, uint16_t Ypos);
+void hx8347g_WritePixel(uint16_t Xpos, uint16_t Ypos, uint16_t RGBCode);
+uint16_t hx8347g_ReadPixel(uint16_t Xpos, uint16_t Ypos);
+
+void hx8347g_DrawHLine(uint16_t RGBCode, uint16_t Xpos, uint16_t Ypos, uint16_t Length);
+void hx8347g_DrawVLine(uint16_t RGBCode, uint16_t Xpos, uint16_t Ypos, uint16_t Length);
+void hx8347g_DrawBitmap(uint16_t Xpos, uint16_t Ypos, uint8_t *pbmp);
+
+void hx8347g_SetDisplayWindow(uint16_t Xpos, uint16_t Ypos, uint16_t Width, uint16_t Height);
+
+
+uint16_t hx8347g_GetLcdPixelWidth(void);
+uint16_t hx8347g_GetLcdPixelHeight(void);
+
+/* LCD driver structure */
+extern LCD_DrvTypeDef hx8347g_drv;
+
+/* LCD IO functions */
+void LCD_IO_Init(void);
+void LCD_IO_WriteMultipleData(uint8_t *pData, uint32_t Size);
+void LCD_IO_WriteReg(uint8_t Reg);
+uint16_t LCD_IO_ReadData(uint16_t Reg);
+void LCD_Delay (uint32_t delay);
+/**
+ * @}
+ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __HX8347G_H */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/P3_SETR2/Components/hx8347i/Release_Notes.html b/P3_SETR2/Components/hx8347i/Release_Notes.html
new file mode 100644
index 0000000..70bccde
--- /dev/null
+++ b/P3_SETR2/Components/hx8347i/Release_Notes.html
@@ -0,0 +1,64 @@
+
+
+
+
+
+
+ Release Notes for HX8347I Component Drivers
+
+
+
+
+
+
+
+
+
+
+Release Notes for HX8347I Component Drivers
+Copyright © 2019 STMicroelectronics
+
+
+
+
+
+
License
+
Licensed by ST under BSD 3-Clause license (the "License"). You may not use this package except in compliance with the License. You may obtain a copy of the License at:
+
https://opensource.org/licenses/BSD-3-Clause
+
Purpose
+
This directory contains the HX8347I component drivers.
+
+
+
Update History
+
+
V1.0.1 / 28-June-2019
+
+
Main Changes
+
+Update HX8347I controller initialization sequence
+
+
+
+
+
V1.0.0 / 03-April-2019
+
+
Main Changes
+
+First official release of HX8347I LCD controller component drivers.
+
+
+
+
+
+
+
+
diff --git a/P3_SETR2/Components/hx8347i/hx8347i.c b/P3_SETR2/Components/hx8347i/hx8347i.c
new file mode 100644
index 0000000..e76d5a4
--- /dev/null
+++ b/P3_SETR2/Components/hx8347i/hx8347i.c
@@ -0,0 +1,479 @@
+/**
+ ******************************************************************************
+ * @file hx8347i.c
+ * @author MCD Application Team
+ * @brief This file includes the driver for HX8347I LCD.
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/* Includes ------------------------------------------------------------------*/
+#include "hx8347i.h"
+
+/** @addtogroup BSP
+ * @{
+ */
+
+/** @addtogroup Components
+ * @{
+ */
+
+/** @addtogroup HX8347I
+ * @brief This file provides a set of functions needed to drive the
+ * HX8347I LCD.
+ * @{
+ */
+
+/** @defgroup HX8347I_Private_TypesDefinitions
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @defgroup HX8347I_Private_Defines
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @defgroup HX8347I_Private_Macros
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @defgroup HX8347I_Private_Variables
+ * @{
+ */
+LCD_DrvTypeDef hx8347i_drv =
+{
+ hx8347i_Init,
+ hx8347i_ReadID,
+ hx8347i_DisplayOn,
+ hx8347i_DisplayOff,
+ hx8347i_SetCursor,
+ hx8347i_WritePixel,
+ hx8347i_ReadPixel,
+ hx8347i_SetDisplayWindow,
+ hx8347i_DrawHLine,
+ hx8347i_DrawVLine,
+ hx8347i_GetLcdPixelWidth,
+ hx8347i_GetLcdPixelHeight,
+ hx8347i_DrawBitmap,
+};
+
+static uint8_t Is_hx8347i_Initialized = 0;
+static uint16_t ArrayRGB[320] = {0};
+
+/**
+ * @}
+ */
+
+/** @defgroup HX8347I_Private_FunctionPrototypes
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @defgroup HX8347I_Private_Functions
+ * @{
+ */
+
+/**
+ * @brief Initialize the HX8347I LCD Component.
+ * @param None
+ * @retval None
+ */
+void hx8347i_Init(void)
+{
+ if(Is_hx8347i_Initialized == 0)
+ {
+ Is_hx8347i_Initialized = 1;
+
+ /* Initialize HX8347I low level bus layer --------------------------------*/
+ LCD_IO_Init();
+
+ /* HX8347I requests 120ms (worst case) after reset */
+ LCD_Delay(120);
+
+ /* Adjust the Gamma Curve */
+ hx8347i_WriteReg(LCD_REG_64, 0x00);
+ hx8347i_WriteReg(LCD_REG_65, 0x00);
+ hx8347i_WriteReg(LCD_REG_66, 0x04);
+ hx8347i_WriteReg(LCD_REG_67, 0x13);
+ hx8347i_WriteReg(LCD_REG_68, 0x0E);
+ hx8347i_WriteReg(LCD_REG_69, 0x2D);
+ hx8347i_WriteReg(LCD_REG_70, 0x0E);
+ hx8347i_WriteReg(LCD_REG_71, 0x57);
+ hx8347i_WriteReg(LCD_REG_72, 0x09);
+ hx8347i_WriteReg(LCD_REG_73, 0x13);
+ hx8347i_WriteReg(LCD_REG_74, 0x19);
+ hx8347i_WriteReg(LCD_REG_75, 0x1A);
+ hx8347i_WriteReg(LCD_REG_76, 0x1B);
+ hx8347i_WriteReg(LCD_REG_80, 0x12);
+ hx8347i_WriteReg(LCD_REG_81, 0x31);
+ hx8347i_WriteReg(LCD_REG_82, 0x2C);
+ hx8347i_WriteReg(LCD_REG_83, 0x3B);
+ hx8347i_WriteReg(LCD_REG_84, 0x3F);
+ hx8347i_WriteReg(LCD_REG_85, 0x3F);
+ hx8347i_WriteReg(LCD_REG_86, 0x28);
+ hx8347i_WriteReg(LCD_REG_87, 0x71);
+ hx8347i_WriteReg(LCD_REG_88, 0x04);
+ hx8347i_WriteReg(LCD_REG_89, 0x05);
+ hx8347i_WriteReg(LCD_REG_90, 0x06);
+ hx8347i_WriteReg(LCD_REG_91, 0x0C);
+ hx8347i_WriteReg(LCD_REG_92, 0x16);
+ hx8347i_WriteReg(LCD_REG_93, 0x88);
+
+ /* Power voltage setting */
+ hx8347i_WriteReg(LCD_REG_27, 0x1E); /* VRH=4.60V */
+ hx8347i_WriteReg(LCD_REG_28, 0x07); /* AP Crosstalk */
+ hx8347i_WriteReg(LCD_REG_26, 0x01); /* BT (VGH~15V,VGL~-10V,DDVDH~5V) */
+ hx8347i_WriteReg(LCD_REG_36, 0x38); /* VMH */
+ hx8347i_WriteReg(LCD_REG_37, 0x5F); /* VML */
+
+ /*****VCOM offset ****/
+ hx8347i_WriteReg(LCD_REG_35, 0x6B);
+
+ /* Driving ability setting */
+ hx8347i_WriteReg(LCD_REG_232, 0x7C);
+ hx8347i_WriteReg(LCD_REG_236, 0x14);
+ hx8347i_WriteReg(LCD_REG_237, 0x0C);
+ hx8347i_WriteReg(LCD_REG_228, 0x10);
+ hx8347i_WriteReg(LCD_REG_229, 0x02);
+ hx8347i_WriteReg(LCD_REG_230, 0x10);
+ hx8347i_WriteReg(LCD_REG_231, 0x02);
+
+ hx8347i_DisplayOn();
+
+ /* Set GRAM Area - Partial Display Control */
+ hx8347i_WriteReg(LCD_REG_1, 0x00); /* DP_STB = 0, DP_STB_S = 0, SCROLL = 0, */
+ hx8347i_SetDisplayWindow(0, 0, hx8347i_GetLcdPixelWidth(), hx8347i_GetLcdPixelHeight());
+ hx8347i_WriteReg(LCD_REG_22, 0xA0); /* Memory access control: MY = 1, MX = 0, MV = 1, ML = 0 */
+ }
+
+ /* Set the Cursor */
+ hx8347i_SetCursor(0, 0);
+
+ /* Prepare to write GRAM */
+ LCD_IO_WriteReg(LCD_REG_34);
+}
+
+/**
+ * @brief Enables the Display.
+ * @param None
+ * @retval None
+ */
+void hx8347i_DisplayOn(void)
+{
+ /* Power On sequence ---------------------------------------------------------*/
+ hx8347i_WriteReg(LCD_REG_24, 0x99); /* Display frame rate = 75Hz UADJ */
+ hx8347i_WriteReg(LCD_REG_25, 0x01); /* OSC_EN = 1 */
+ hx8347i_WriteReg(LCD_REG_26, 0x04); /* BT[2:0] = 4 before sleep out */
+ hx8347i_WriteReg(LCD_REG_31, 0x88); /* GAS=1, VOMG=00, PON=0, DK=1, XDK=0, DVDH_TRI=0, STB=0*/
+ LCD_Delay(5);
+ hx8347i_WriteReg(LCD_REG_31, 0x80); /* GAS=1, VOMG=00, PON=0, DK=0, XDK=0, DVDH_TRI=0, STB=0*/
+ LCD_Delay(5);
+ hx8347i_WriteReg(LCD_REG_31, 0x90); /* GAS=1, VOMG=00, PON=1, DK=0, XDK=0, DVDH_TRI=0, STB=0*/
+ LCD_Delay(5);
+ hx8347i_WriteReg(LCD_REG_31, 0xD0); /* GAS=1, VOMG=10, PON=1, DK=0, XDK=0, DDVDH_TRI=0, STB=0 */
+ LCD_Delay(5);
+ /* 262k/65k color selection */
+ hx8347i_WriteReg(LCD_REG_23, 0x05); /* default 0x06 262k color, 0x05 65k color */
+ /* SET PANEL */
+ hx8347i_WriteReg(LCD_REG_54, 0x09); /* SS_PANEL = 1, GS_PANEL = 0,REV_PANEL = 0, BGR_PANEL = 1 */
+
+ /* Display On */
+ hx8347i_WriteReg(LCD_REG_40, 0x38);
+ LCD_Delay(60);
+ hx8347i_WriteReg(LCD_REG_40, 0x3C);
+}
+
+/**
+ * @brief Disables the Display.
+ * @param None
+ * @retval None
+ */
+void hx8347i_DisplayOff(void)
+{
+ /* Display Off */
+ hx8347i_WriteReg(LCD_REG_40, 0x38);
+ LCD_Delay(60);
+ hx8347i_WriteReg(LCD_REG_40, 0x04);
+
+ /* Power Off sequence ---------------------------------------------------------*/
+ hx8347i_WriteReg(LCD_REG_23, 0x0000); /* default 0x06 262k color, 0x05 65k color */
+ hx8347i_WriteReg(LCD_REG_24, 0x0000); /* Display frame rate = 70Hz RADJ = '0110' */
+ hx8347i_WriteReg(LCD_REG_25, 0x0000); /* OSC_EN = 1 */
+ hx8347i_WriteReg(LCD_REG_28, 0x0000); /* AP[2:0] = 111 */
+ hx8347i_WriteReg(LCD_REG_31, 0x0000); /* GAS=1, VOMG=00, PON=1, DK=0, XDK=0, DVDH_TRI=0, STB=0*/
+ hx8347i_WriteReg(LCD_REG_54, 0x0000); /* SS_PANEL = 1, GS_PANEL = 0,REV_PANEL = 0, BGR_PANEL = 1 */
+}
+
+/**
+ * @brief Get the LCD pixel Width.
+ * @param None
+ * @retval The Lcd Pixel Width
+ */
+uint16_t hx8347i_GetLcdPixelWidth(void)
+{
+ return (uint16_t)HX8347I_LCD_PIXEL_WIDTH;
+}
+
+/**
+ * @brief Get the LCD pixel Height.
+ * @param None
+ * @retval The Lcd Pixel Height
+ */
+uint16_t hx8347i_GetLcdPixelHeight(void)
+{
+ return (uint16_t)HX8347I_LCD_PIXEL_HEIGHT;
+}
+
+/**
+ * @brief Get the HX8347I ID.
+ * @param None
+ * @retval The HX8347I ID
+ */
+uint16_t hx8347i_ReadID(void)
+{
+ if(Is_hx8347i_Initialized == 0)
+ {
+ LCD_IO_Init();
+
+ /* HX8347I requests 120ms (worst case) after reset */
+ LCD_Delay(120);
+ }
+ return (hx8347i_ReadReg(0x00));
+}
+
+/**
+ * @brief Set Cursor position.
+ * @param Xpos: specifies the X position.
+ * @param Ypos: specifies the Y position.
+ * @retval None
+ */
+void hx8347i_SetCursor(uint16_t Xpos, uint16_t Ypos)
+{
+ hx8347i_WriteReg(LCD_REG_6, 0x00);
+ hx8347i_WriteReg(LCD_REG_7, Xpos);
+ hx8347i_WriteReg(LCD_REG_2, Ypos >> 8);
+ hx8347i_WriteReg(LCD_REG_3, Ypos & 0xFF);
+}
+
+/**
+ * @brief Write pixel.
+ * @param Xpos: specifies the X position.
+ * @param Ypos: specifies the Y position.
+* @param RGBCode: the RGB pixel color
+ * @retval None
+ */
+void hx8347i_WritePixel(uint16_t Xpos, uint16_t Ypos, uint16_t RGBCode)
+{
+ /* Set Cursor */
+ hx8347i_SetCursor(Xpos, Ypos);
+
+ /* Prepare to write GRAM */
+ LCD_IO_WriteReg(LCD_REG_34);
+
+ /* Write 16-bit GRAM Reg */
+ LCD_IO_WriteMultipleData((uint8_t*)&RGBCode, 2);
+}
+
+/**
+ * @brief Read pixel.
+ * @param None
+ * @retval the RGB pixel color
+ */
+uint16_t hx8347i_ReadPixel(uint16_t Xpos, uint16_t Ypos)
+{
+ /* Set Cursor */
+ hx8347i_SetCursor(Xpos, Ypos);
+
+ /* Dummy read */
+ LCD_IO_ReadData(LCD_REG_34);
+
+ /* Read 16-bit Reg */
+ return (LCD_IO_ReadData(LCD_REG_34));
+}
+
+/**
+ * @brief Writes to the selected LCD register.
+* @param LCDReg: address of the selected register.
+* @param LCDRegValue: value to write to the selected register.
+ * @retval None
+ */
+void hx8347i_WriteReg(uint8_t LCDReg, uint16_t LCDRegValue)
+{
+ LCD_IO_WriteReg(LCDReg);
+
+ /* Write 16-bit GRAM Reg */
+ LCD_IO_WriteMultipleData((uint8_t*)&LCDRegValue, 2);
+}
+
+/**
+ * @brief Reads the selected LCD Register.
+* @param LCDReg: address of the selected register.
+ * @retval LCD Register Value.
+ */
+uint16_t hx8347i_ReadReg(uint8_t LCDReg)
+{
+ /* Write 16-bit Index (then Read Reg) */
+ LCD_IO_WriteReg(LCDReg);
+
+ /* Read 16-bit Reg */
+ return (LCD_IO_ReadData(LCDReg));
+}
+
+/**
+ * @brief Sets a display window
+ * @param Xpos: specifies the X bottom left position.
+ * @param Ypos: specifies the Y bottom left position.
+ * @param Height: display window height.
+ * @param Width: display window width.
+ * @retval None
+ */
+void hx8347i_SetDisplayWindow(uint16_t Xpos, uint16_t Ypos, uint16_t Width, uint16_t Height)
+{
+ /* Horizontal GRAM Start Address */
+ hx8347i_WriteReg(LCD_REG_6, (Xpos) >> 8); /* SP */
+ hx8347i_WriteReg(LCD_REG_7, (Xpos) & 0xFF); /* SP */
+
+ /* Horizontal GRAM End Address */
+ hx8347i_WriteReg(LCD_REG_8, (Xpos + Height - 1) >> 8); /* EP */
+ hx8347i_WriteReg(LCD_REG_9, (Xpos + Height - 1) & 0xFF); /* EP */
+
+ /* Vertical GRAM Start Address */
+ hx8347i_WriteReg(LCD_REG_2, (Ypos) >> 8); /* SC */
+ hx8347i_WriteReg(LCD_REG_3, (Ypos) & 0xFF); /* SC */
+
+ /* Vertical GRAM End Address */
+ hx8347i_WriteReg(LCD_REG_4, (Ypos + Width - 1) >> 8); /* EC */
+ hx8347i_WriteReg(LCD_REG_5, (Ypos + Width - 1) & 0xFF); /* EC */
+}
+
+/**
+ * @brief Draw vertical line.
+* @param RGBCode: Specifies the RGB color
+ * @param Xpos: specifies the X position.
+ * @param Ypos: specifies the Y position.
+ * @param Length: specifies the Line length.
+ * @retval None
+ */
+void hx8347i_DrawHLine(uint16_t RGBCode, uint16_t Xpos, uint16_t Ypos, uint16_t Length)
+{
+ uint32_t i = 0;
+
+ /* Set Cursor */
+ hx8347i_SetCursor(Xpos, Ypos);
+
+ /* Prepare to write GRAM */
+ LCD_IO_WriteReg(LCD_REG_34);
+
+ /* Sent a complete line */
+ for(i = 0; i < Length; i++)
+ {
+ ArrayRGB[i] = RGBCode;
+ }
+
+ LCD_IO_WriteMultipleData((uint8_t*)&ArrayRGB[0], Length * 2);
+}
+
+/**
+ * @brief Draw vertical line.
+* @param RGBCode: Specifies the RGB color
+ * @param Xpos: specifies the X position.
+ * @param Ypos: specifies the Y position.
+ * @param Length: specifies the Line length.
+ * @retval None
+ */
+void hx8347i_DrawVLine(uint16_t RGBCode, uint16_t Xpos, uint16_t Ypos, uint16_t Length)
+{
+ uint16_t counter = 0;
+
+ /* Set Cursor */
+ hx8347i_SetCursor(Xpos, Ypos);
+
+ /* Prepare to write GRAM */
+ LCD_IO_WriteReg(LCD_REG_34);
+
+ /* Fill a complete vertical line */
+ for(counter = 0; counter < Length; counter++)
+ {
+ ArrayRGB[counter] = RGBCode;
+ }
+
+ /* Write 16-bit GRAM Reg */
+ LCD_IO_WriteMultipleData((uint8_t*)&ArrayRGB[0], Length * 2);
+}
+
+/**
+ * @brief Displays a bitmap picture loaded in the internal Flash.
+ * @param BmpAddress: Bmp picture address in the internal Flash.
+ * @retval None
+ */
+void hx8347i_DrawBitmap(uint16_t Xpos, uint16_t Ypos, uint8_t *pbmp)
+{
+ uint32_t index = 0, size = 0;
+
+ /* Read bitmap size */
+ size = *(volatile uint16_t *) (pbmp + 2);
+ size |= (*(volatile uint16_t *) (pbmp + 4)) << 16;
+ /* Get bitmap data address offset */
+ index = *(volatile uint16_t *) (pbmp + 10);
+ index |= (*(volatile uint16_t *) (pbmp + 12)) << 16;
+ size = (size - index)/2;
+ pbmp += index;
+
+ /* Set GRAM write direction and BGR = 0 */
+ /* Memory access control: MY = 1, MX = 0, MV = 1, ML = 0 */
+ hx8347i_WriteReg(LCD_REG_22, 0xE0);
+
+ /* Set Cursor */
+ hx8347i_SetCursor(Xpos, Ypos);
+
+ /* Prepare to write GRAM */
+ LCD_IO_WriteReg(LCD_REG_34);
+
+ LCD_IO_WriteMultipleData((uint8_t*)pbmp, size*2);
+
+ /* Set GRAM write direction and BGR = 0 */
+ /* Memory access control: MY = 1, MX = 1, MV = 1, ML = 0 */
+ hx8347i_WriteReg(LCD_REG_22, 0xA0);
+}
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/P3_SETR2/Components/hx8347i/hx8347i.h b/P3_SETR2/Components/hx8347i/hx8347i.h
new file mode 100644
index 0000000..f9d854d
--- /dev/null
+++ b/P3_SETR2/Components/hx8347i/hx8347i.h
@@ -0,0 +1,245 @@
+/**
+ ******************************************************************************
+ * @file hx8347i.h
+ * @author MCD Application Team
+ * @brief This file contains all the functions prototypes for the hx8347i.c
+ * driver.
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2019 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef HX8347I_H
+#define HX8347I_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "../Common/lcd.h"
+
+/** @addtogroup BSP
+ * @{
+ */
+
+/** @addtogroup Components
+ * @{
+ */
+
+/** @addtogroup hx8347i
+ * @{
+ */
+
+/** @defgroup HX8347I_Exported_Types
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @defgroup HX8347I_Exported_Constants
+ * @{
+ */
+/**
+ * @brief HX8347I ID
+ */
+#define HX8347I_ID 0x0095
+
+/**
+ * @brief HX8347I Size
+ */
+#define HX8347I_LCD_PIXEL_WIDTH ((uint16_t)320)
+#define HX8347I_LCD_PIXEL_HEIGHT ((uint16_t)240)
+
+/**
+ * @brief HX8347I Registers
+ */
+#define LCD_REG_0 0x00
+#define LCD_REG_1 0x01
+#define LCD_REG_2 0x02
+#define LCD_REG_3 0x03
+#define LCD_REG_4 0x04
+#define LCD_REG_5 0x05
+#define LCD_REG_6 0x06
+#define LCD_REG_7 0x07
+#define LCD_REG_8 0x08
+#define LCD_REG_9 0x09
+#define LCD_REG_10 0x0A
+#define LCD_REG_11 0x0B
+#define LCD_REG_12 0x0C
+#define LCD_REG_13 0x0D
+#define LCD_REG_14 0x0E
+#define LCD_REG_15 0x0F
+#define LCD_REG_16 0x10
+#define LCD_REG_17 0x11
+#define LCD_REG_18 0x12
+#define LCD_REG_19 0x13
+#define LCD_REG_20 0x14
+#define LCD_REG_21 0x15
+#define LCD_REG_22 0x16
+#define LCD_REG_23 0x17
+#define LCD_REG_24 0x18
+#define LCD_REG_25 0x19
+#define LCD_REG_26 0x1A
+#define LCD_REG_27 0x1B
+#define LCD_REG_28 0x1C
+#define LCD_REG_29 0x1D
+#define LCD_REG_30 0x1E
+#define LCD_REG_31 0x1F
+#define LCD_REG_32 0x20
+#define LCD_REG_33 0x21
+#define LCD_REG_34 0x22
+#define LCD_REG_35 0x23
+#define LCD_REG_36 0x24
+#define LCD_REG_37 0x25
+#define LCD_REG_38 0x26
+#define LCD_REG_39 0x27
+#define LCD_REG_40 0x28
+#define LCD_REG_41 0x29
+#define LCD_REG_42 0x2A
+#define LCD_REG_43 0x2B
+#define LCD_REG_44 0x2C
+#define LCD_REG_45 0x2D
+#define LCD_REG_46 0x2E
+#define LCD_REG_47 0x2F
+#define LCD_REG_48 0x30
+#define LCD_REG_49 0x31
+#define LCD_REG_50 0x32
+#define LCD_REG_51 0x33
+#define LCD_REG_52 0x34
+#define LCD_REG_53 0x35
+#define LCD_REG_54 0x36
+#define LCD_REG_55 0x37
+#define LCD_REG_56 0x38
+#define LCD_REG_57 0x39
+#define LCD_REG_58 0x3A
+#define LCD_REG_59 0x3B
+#define LCD_REG_60 0x3C
+#define LCD_REG_61 0x3D
+#define LCD_REG_62 0x3E
+#define LCD_REG_63 0x3F
+#define LCD_REG_64 0x40
+#define LCD_REG_65 0x41
+#define LCD_REG_66 0x42
+#define LCD_REG_67 0x43
+#define LCD_REG_68 0x44
+#define LCD_REG_69 0x45
+#define LCD_REG_70 0x46
+#define LCD_REG_71 0x47
+#define LCD_REG_72 0x48
+#define LCD_REG_73 0x49
+#define LCD_REG_74 0x4A
+#define LCD_REG_75 0x4B
+#define LCD_REG_76 0x4C
+#define LCD_REG_77 0x4D
+#define LCD_REG_78 0x4E
+#define LCD_REG_79 0x4F
+#define LCD_REG_80 0x50
+#define LCD_REG_81 0x51
+#define LCD_REG_82 0x52
+#define LCD_REG_83 0x53
+#define LCD_REG_84 0x54
+#define LCD_REG_85 0x55
+#define LCD_REG_86 0x56
+#define LCD_REG_87 0x57
+#define LCD_REG_88 0x58
+#define LCD_REG_89 0x59
+#define LCD_REG_90 0x5A
+#define LCD_REG_91 0x5B
+#define LCD_REG_92 0x5C
+#define LCD_REG_93 0x5D
+#define LCD_REG_94 0x5E
+#define LCD_REG_95 0x5F
+#define LCD_REG_96 0x60
+#define LCD_REG_97 0x61
+#define LCD_REG_98 0x62
+#define LCD_REG_129 0x81
+#define LCD_REG_130 0x82
+#define LCD_REG_132 0x84
+#define LCD_REG_133 0x85
+#define LCD_REG_228 0xE4
+#define LCD_REG_229 0xE5
+#define LCD_REG_230 0xE6
+#define LCD_REG_231 0xE7
+#define LCD_REG_232 0xE8
+#define LCD_REG_233 0xE9
+#define LCD_REG_234 0xEA
+#define LCD_REG_235 0xEB
+#define LCD_REG_236 0xEC
+#define LCD_REG_237 0xED
+#define LCD_REG_243 0xF3
+#define LCD_REG_244 0xF4
+#define LCD_REG_255 0xFF
+
+/**
+ * @}
+ */
+
+/** @defgroup HX8347I_Exported_Functions
+ * @{
+ */
+void hx8347i_Init(void);
+uint16_t hx8347i_ReadID(void);
+void hx8347i_WriteReg(uint8_t LCDReg, uint16_t LCDRegValue);
+uint16_t hx8347i_ReadReg(uint8_t LCDReg);
+
+void hx8347i_DisplayOn(void);
+void hx8347i_DisplayOff(void);
+void hx8347i_SetCursor(uint16_t Xpos, uint16_t Ypos);
+void hx8347i_WritePixel(uint16_t Xpos, uint16_t Ypos, uint16_t RGBCode);
+uint16_t hx8347i_ReadPixel(uint16_t Xpos, uint16_t Ypos);
+
+void hx8347i_DrawHLine(uint16_t RGBCode, uint16_t Xpos, uint16_t Ypos, uint16_t Length);
+void hx8347i_DrawVLine(uint16_t RGBCode, uint16_t Xpos, uint16_t Ypos, uint16_t Length);
+void hx8347i_DrawBitmap(uint16_t Xpos, uint16_t Ypos, uint8_t *pbmp);
+
+void hx8347i_SetDisplayWindow(uint16_t Xpos, uint16_t Ypos, uint16_t Width, uint16_t Height);
+
+
+uint16_t hx8347i_GetLcdPixelWidth(void);
+uint16_t hx8347i_GetLcdPixelHeight(void);
+
+/* LCD driver structure */
+extern LCD_DrvTypeDef hx8347i_drv;
+
+/* LCD IO functions */
+void LCD_IO_Init(void);
+void LCD_IO_WriteMultipleData(uint8_t *pData, uint32_t Size);
+void LCD_IO_WriteReg(uint8_t Reg);
+uint16_t LCD_IO_ReadData(uint16_t Reg);
+void LCD_Delay (uint32_t delay);
+/**
+ * @}
+ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* HX8347I_H */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/P3_SETR2/Components/iss66wvh8m8/Release_Notes.html b/P3_SETR2/Components/iss66wvh8m8/Release_Notes.html
new file mode 100644
index 0000000..eb9476e
--- /dev/null
+++ b/P3_SETR2/Components/iss66wvh8m8/Release_Notes.html
@@ -0,0 +1,65 @@
+
+
+
+
+
+
+ Release Notes for ISS66WVH8M8 Component Drivers
+
+
+
+
+
+
+
+
+
+
+Release Notes for ISS66WVH8M8 Component Drivers
+Copyright © 2017 STMicroelectronics
+
+
+
+
+
+
License
+
Licensed by ST under BSD 3-Clause license (the "License"). You may not use this package except in compliance with the License. You may obtain a copy of the License at:
+
https://opensource.org/licenses/BSD-3-Clause
+
Purpose
+
This directory contains the ISS66WVH8M8 component drivers.
+
+
+
Update History
+
+
V1.0.1 / 03-April-2019
+
+
Main Changes
+
+Update release notes format
+Reformat the BSD 3-Clause license declaration in the files header (replace license terms by a web reference to OSI website where those terms lie)
+
+
+
+
+
V1.0.0 / 07-August-2017
+
+
Main Changes
+
+First official release of HyperRAM ISS66WVH8M8 Component driver
+
+
+
+
+
+
+
+
diff --git a/P3_SETR2/Components/iss66wvh8m8/iss66wvh8m8.h b/P3_SETR2/Components/iss66wvh8m8/iss66wvh8m8.h
new file mode 100644
index 0000000..85cef75
--- /dev/null
+++ b/P3_SETR2/Components/iss66wvh8m8/iss66wvh8m8.h
@@ -0,0 +1,133 @@
+/**
+ ******************************************************************************
+ * @file iss66wvh8m8.h
+ * @author MCD Application Team
+ * @brief This file contains all the description of the ISS66WVH8M8 Octal memory.
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2017 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __ISS66WVH8M8_H
+#define __ISS66WVH8M8_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+
+/** @addtogroup BSP
+ * @{
+ */
+
+/** @addtogroup Components
+ * @{
+ */
+
+/** @addtogroup ISS66WVH8M8
+ * @{
+ */
+
+/** @defgroup ISS66WVH8M8_Exported_Types
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @defgroup ISS66WVH8M8_Exported_Constants
+ * @{
+ */
+
+/**
+ * @brief ISS66WVH8M8 Configuration
+ */
+#define ISS66WVH8M8_RAM_SIZE 0x800000 /* 64 MBits => 8 MBytes */
+
+#define ISS66WVH8M8_LATENCY_83M 3
+#define ISS66WVH8M8_LATENCY_100M 4
+#define ISS66WVH8M8_LATENCY_133M 5
+#define ISS66WVH8M8_LATENCY_166M 6
+
+#define ISS66WVH8M8_CR0_LATENCY_83M ISS66WVH8M8_CR0_IL_3_CLOCK
+#define ISS66WVH8M8_CR0_LATENCY_100M ISS66WVH8M8_CR0_IL_4_CLOCK
+#define ISS66WVH8M8_CR0_LATENCY_133M ISS66WVH8M8_CR0_IL_5_CLOCK
+#define ISS66WVH8M8_CR0_LATENCY_166M ISS66WVH8M8_CR0_IL_6_CLOCK
+
+/**
+ * @brief ISS66WVH8M8 Registers
+ */
+/* Device Identification Register 0 */
+#define ISS66WVH8M8_DIR0_ADDRESS ((uint32_t)0x00000000)
+
+#define ISS66WVH8M8_DIR0_MANUFACTURER ((uint16_t)0x000F) /*!< Manufacturer */
+#define ISS66WVH8M8_DIR0_CADC ((uint16_t)0x00F0) /*!< Column Address Bit Count */
+#define ISS66WVH8M8_DIR0_RABC ((uint16_t)0x1F00) /*!< Row Address Bit Count */
+#define ISS66WVH8M8_DIR0_DADDR ((uint16_t)0xC000) /*!< Die Address */
+
+/* Device Identification Register 1 */
+#define ISS66WVH8M8_DIR1_ADDRESS ((uint32_t)0x00000001)
+
+#define ISS66WVH8M8_DIR1_DTYPE ((uint16_t)0x000F) /*!< Device Type */
+
+/* Configuration Register 0 */
+#define ISS66WVH8M8_CR0_ADDRESS ((uint32_t)0x00000800)
+
+#define ISS66WVH8M8_CR0_BLENGTH ((uint16_t)0x0003) /*!< Burst length */
+#define ISS66WVH8M8_CR0_HBE ((uint16_t)0x0004) /*!< Hybrid burst enable */
+#define ISS66WVH8M8_CR0_FLE ((uint16_t)0x0008) /*!< Fixed latency enable */
+#define ISS66WVH8M8_CR0_IL ((uint16_t)0x00F0) /*!< Initial latency */
+#define ISS66WVH8M8_CR0_IL_5_CLOCK ((uint16_t)0x0000) /*!< 5 clock latency */
+#define ISS66WVH8M8_CR0_IL_6_CLOCK ((uint16_t)0x0010) /*!< 6 clock latency */
+#define ISS66WVH8M8_CR0_IL_3_CLOCK ((uint16_t)0x00E0) /*!< 3 clock latency */
+#define ISS66WVH8M8_CR0_IL_4_CLOCK ((uint16_t)0x00F0) /*!< 4 clock latency */
+#define ISS66WVH8M8_CR0_DS ((uint16_t)0x7000) /*!< Drive strength */
+#define ISS66WVH8M8_CR0_DPDE ((uint16_t)0x8000) /*!< Deep Power down enable */
+
+/* Configuration Register 1 */
+#define ISS66WVH8M8_CR1_ADDRESS ((uint32_t)0x00000801)
+
+#define ISS66WVH8M8_CR1_DRI ((uint16_t)0x0003) /*!< Distributed refresh interval */
+
+/**
+ * @}
+ */
+
+/** @defgroup ISS66WVH8M8_Exported_Functions
+ * @{
+ */
+/**
+ * @}
+ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __ISS66WVH8M8_H */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/P3_SETR2/Components/l3gd20/Release_Notes.html b/P3_SETR2/Components/l3gd20/Release_Notes.html
new file mode 100644
index 0000000..84a45a6
--- /dev/null
+++ b/P3_SETR2/Components/l3gd20/Release_Notes.html
@@ -0,0 +1,98 @@
+
+
+
+
+
+
+ Release Notes for L3GD20 Component Drivers
+
+
+
+
+
+
+
+
+
+
+Release Notes for L3GD20 Component Drivers
+Copyright © 2015 STMicroelectronics
+
+
+
+
+
+
License
+
Licensed by ST under BSD 3-Clause license (the "License"). You may not use this package except in compliance with the License. You may obtain a copy of the License at:
+
https://opensource.org/licenses/BSD-3-Clause
+
Purpose
+
This directory contains the L3GD20 component drivers.
+
+
+
Update History
+
+
V2.0.1 / 03-April-2019
+
+
Main Changes
+
+Update release notes format
+Reformat the BSD 3-Clause license declaration in the files header (replace license terms by a web reference to OSI website where those terms lie)
+
+
+
+
+
V2.0.0 / 24-June-2015
+
+
Main Changes
+
+l3gd20.h/.c:
+
+Add gyroscope de-initialization function: L3GD20_DeInit()
+Add gyroscope low power configuration function: L3GD20_LowPower()
+
+
+
NOTE This release must be used with BSP Common driver V4.0.0 or later
+
+
+
+
V1.1.1 / 27-November-2014
+
+
Main Changes
+
+3gd20.h: change “\” by “/” in the include path to fix compilation issue under Linux
+Miscellaneous formatting and comments update
+
+
+
+
+
V1.1.0 / 10-June-2014
+
+
Main Changes
+
+Update to support new revision of L3GD20 component having new device ID 0xD5 (new define added: I_AM_L3GD20_TR)
+
+
+
+
+
V1.0.0 / 18-February-2014
+
+
Main Changes
+
+First official release of L3GD20 gyroscope
+
+
+
+
+
+
+
+
diff --git a/P3_SETR2/Components/l3gd20/l3gd20.c b/P3_SETR2/Components/l3gd20/l3gd20.c
new file mode 100644
index 0000000..a4160e4
--- /dev/null
+++ b/P3_SETR2/Components/l3gd20/l3gd20.c
@@ -0,0 +1,398 @@
+/**
+ ******************************************************************************
+ * @file l3gd20.c
+ * @author MCD Application Team
+ * @brief This file provides a set of functions needed to manage the L3GD20,
+ * ST MEMS motion sensor, 3-axis digital output gyroscope.
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2015 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+/* Includes ------------------------------------------------------------------*/
+#include "l3gd20.h"
+
+/** @addtogroup BSP
+ * @{
+ */
+
+/** @addtogroup Components
+ * @{
+ */
+
+/** @addtogroup L3GD20
+ * @{
+ */
+
+/** @defgroup L3GD20_Private_TypesDefinitions
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @defgroup L3GD20_Private_Defines
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @defgroup L3GD20_Private_Macros
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @defgroup L3GD20_Private_Variables
+ * @{
+ */
+GYRO_DrvTypeDef L3gd20Drv =
+{
+ L3GD20_Init,
+ L3GD20_DeInit,
+ L3GD20_ReadID,
+ L3GD20_RebootCmd,
+ L3GD20_LowPower,
+ L3GD20_INT1InterruptConfig,
+ L3GD20_EnableIT,
+ L3GD20_DisableIT,
+ 0,
+ 0,
+ L3GD20_FilterConfig,
+ L3GD20_FilterCmd,
+ L3GD20_ReadXYZAngRate
+};
+
+/**
+ * @}
+ */
+
+/** @defgroup L3GD20_Private_FunctionPrototypes
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @defgroup L3GD20_Private_Functions
+ * @{
+ */
+
+/**
+ * @brief Set L3GD20 Initialization.
+ * @param L3GD20_InitStruct: pointer to a L3GD20_InitTypeDef structure
+ * that contains the configuration setting for the L3GD20.
+ * @retval None
+ */
+void L3GD20_Init(uint16_t InitStruct)
+{
+ uint8_t ctrl = 0x00;
+
+ /* Configure the low level interface */
+ GYRO_IO_Init();
+
+ /* Write value to MEMS CTRL_REG1 register */
+ ctrl = (uint8_t) InitStruct;
+ GYRO_IO_Write(&ctrl, L3GD20_CTRL_REG1_ADDR, 1);
+
+ /* Write value to MEMS CTRL_REG4 register */
+ ctrl = (uint8_t) (InitStruct >> 8);
+ GYRO_IO_Write(&ctrl, L3GD20_CTRL_REG4_ADDR, 1);
+}
+
+
+
+/**
+ * @brief L3GD20 De-initialization
+ * @param None
+ * @retval None
+ */
+void L3GD20_DeInit(void)
+{
+}
+
+/**
+ * @brief Read ID address of L3GD20
+ * @param None
+ * @retval ID name
+ */
+uint8_t L3GD20_ReadID(void)
+{
+ uint8_t tmp;
+
+ /* Configure the low level interface */
+ GYRO_IO_Init();
+
+ /* Read WHO I AM register */
+ GYRO_IO_Read(&tmp, L3GD20_WHO_AM_I_ADDR, 1);
+
+ /* Return the ID */
+ return (uint8_t)tmp;
+}
+
+/**
+ * @brief Reboot memory content of L3GD20
+ * @param None
+ * @retval None
+ */
+void L3GD20_RebootCmd(void)
+{
+ uint8_t tmpreg;
+
+ /* Read CTRL_REG5 register */
+ GYRO_IO_Read(&tmpreg, L3GD20_CTRL_REG5_ADDR, 1);
+
+ /* Enable or Disable the reboot memory */
+ tmpreg |= L3GD20_BOOT_REBOOTMEMORY;
+
+ /* Write value to MEMS CTRL_REG5 register */
+ GYRO_IO_Write(&tmpreg, L3GD20_CTRL_REG5_ADDR, 1);
+}
+
+/**
+ * @brief Set L3GD20 in low-power mode
+ * @param
+ * @retval None
+ */
+void L3GD20_LowPower(uint16_t InitStruct)
+{
+ uint8_t ctrl = 0x00;
+
+ /* Write value to MEMS CTRL_REG1 register */
+ ctrl = (uint8_t) InitStruct;
+ GYRO_IO_Write(&ctrl, L3GD20_CTRL_REG1_ADDR, 1);
+}
+
+/**
+ * @brief Set L3GD20 Interrupt INT1 configuration
+ * @param Int1Config: the configuration setting for the L3GD20 Interrupt.
+ * @retval None
+ */
+void L3GD20_INT1InterruptConfig(uint16_t Int1Config)
+{
+ uint8_t ctrl_cfr = 0x00, ctrl3 = 0x00;
+
+ /* Read INT1_CFG register */
+ GYRO_IO_Read(&ctrl_cfr, L3GD20_INT1_CFG_ADDR, 1);
+
+ /* Read CTRL_REG3 register */
+ GYRO_IO_Read(&ctrl3, L3GD20_CTRL_REG3_ADDR, 1);
+
+ ctrl_cfr &= 0x80;
+ ctrl_cfr |= ((uint8_t) Int1Config >> 8);
+
+ ctrl3 &= 0xDF;
+ ctrl3 |= ((uint8_t) Int1Config);
+
+ /* Write value to MEMS INT1_CFG register */
+ GYRO_IO_Write(&ctrl_cfr, L3GD20_INT1_CFG_ADDR, 1);
+
+ /* Write value to MEMS CTRL_REG3 register */
+ GYRO_IO_Write(&ctrl3, L3GD20_CTRL_REG3_ADDR, 1);
+}
+
+/**
+ * @brief Enable INT1 or INT2 interrupt
+ * @param IntSel: choice of INT1 or INT2
+ * This parameter can be:
+ * @arg L3GD20_INT1
+ * @arg L3GD20_INT2
+ * @retval None
+ */
+void L3GD20_EnableIT(uint8_t IntSel)
+{
+ uint8_t tmpreg;
+
+ /* Read CTRL_REG3 register */
+ GYRO_IO_Read(&tmpreg, L3GD20_CTRL_REG3_ADDR, 1);
+
+ if(IntSel == L3GD20_INT1)
+ {
+ tmpreg &= 0x7F;
+ tmpreg |= L3GD20_INT1INTERRUPT_ENABLE;
+ }
+ else if(IntSel == L3GD20_INT2)
+ {
+ tmpreg &= 0xF7;
+ tmpreg |= L3GD20_INT2INTERRUPT_ENABLE;
+ }
+
+ /* Write value to MEMS CTRL_REG3 register */
+ GYRO_IO_Write(&tmpreg, L3GD20_CTRL_REG3_ADDR, 1);
+}
+
+/**
+ * @brief Disable INT1 or INT2 interrupt
+ * @param IntSel: choice of INT1 or INT2
+ * This parameter can be:
+ * @arg L3GD20_INT1
+ * @arg L3GD20_INT2
+ * @retval None
+ */
+void L3GD20_DisableIT(uint8_t IntSel)
+{
+ uint8_t tmpreg;
+
+ /* Read CTRL_REG3 register */
+ GYRO_IO_Read(&tmpreg, L3GD20_CTRL_REG3_ADDR, 1);
+
+ if(IntSel == L3GD20_INT1)
+ {
+ tmpreg &= 0x7F;
+ tmpreg |= L3GD20_INT1INTERRUPT_DISABLE;
+ }
+ else if(IntSel == L3GD20_INT2)
+ {
+ tmpreg &= 0xF7;
+ tmpreg |= L3GD20_INT2INTERRUPT_DISABLE;
+ }
+
+ /* Write value to MEMS CTRL_REG3 register */
+ GYRO_IO_Write(&tmpreg, L3GD20_CTRL_REG3_ADDR, 1);
+}
+
+/**
+ * @brief Set High Pass Filter Modality
+ * @param FilterStruct: contains the configuration setting for the L3GD20.
+ * @retval None
+ */
+void L3GD20_FilterConfig(uint8_t FilterStruct)
+{
+ uint8_t tmpreg;
+
+ /* Read CTRL_REG2 register */
+ GYRO_IO_Read(&tmpreg, L3GD20_CTRL_REG2_ADDR, 1);
+
+ tmpreg &= 0xC0;
+
+ /* Configure MEMS: mode and cutoff frequency */
+ tmpreg |= FilterStruct;
+
+ /* Write value to MEMS CTRL_REG2 register */
+ GYRO_IO_Write(&tmpreg, L3GD20_CTRL_REG2_ADDR, 1);
+}
+
+/**
+ * @brief Enable or Disable High Pass Filter
+ * @param HighPassFilterState: new state of the High Pass Filter feature.
+ * This parameter can be:
+ * @arg: L3GD20_HIGHPASSFILTER_DISABLE
+ * @arg: L3GD20_HIGHPASSFILTER_ENABLE
+ * @retval None
+ */
+void L3GD20_FilterCmd(uint8_t HighPassFilterState)
+{
+ uint8_t tmpreg;
+
+ /* Read CTRL_REG5 register */
+ GYRO_IO_Read(&tmpreg, L3GD20_CTRL_REG5_ADDR, 1);
+
+ tmpreg &= 0xEF;
+
+ tmpreg |= HighPassFilterState;
+
+ /* Write value to MEMS CTRL_REG5 register */
+ GYRO_IO_Write(&tmpreg, L3GD20_CTRL_REG5_ADDR, 1);
+}
+
+/**
+ * @brief Get status for L3GD20 data
+ * @param None
+ * @retval Data status in a L3GD20 Data
+ */
+uint8_t L3GD20_GetDataStatus(void)
+{
+ uint8_t tmpreg;
+
+ /* Read STATUS_REG register */
+ GYRO_IO_Read(&tmpreg, L3GD20_STATUS_REG_ADDR, 1);
+
+ return tmpreg;
+}
+
+/**
+* @brief Calculate the L3GD20 angular data.
+* @param pfData: Data out pointer
+* @retval None
+*/
+void L3GD20_ReadXYZAngRate(float *pfData)
+{
+ uint8_t tmpbuffer[6] ={0};
+ int16_t RawData[3] = {0};
+ uint8_t tmpreg = 0;
+ float sensitivity = 0;
+ int i =0;
+
+ GYRO_IO_Read(&tmpreg,L3GD20_CTRL_REG4_ADDR,1);
+
+ GYRO_IO_Read(tmpbuffer,L3GD20_OUT_X_L_ADDR,6);
+
+ /* check in the control register 4 the data alignment (Big Endian or Little Endian)*/
+ if(!(tmpreg & L3GD20_BLE_MSB))
+ {
+ for(i=0; i<3; i++)
+ {
+ RawData[i]=(int16_t)(((uint16_t)tmpbuffer[2*i+1] << 8) + tmpbuffer[2*i]);
+ }
+ }
+ else
+ {
+ for(i=0; i<3; i++)
+ {
+ RawData[i]=(int16_t)(((uint16_t)tmpbuffer[2*i] << 8) + tmpbuffer[2*i+1]);
+ }
+ }
+
+ /* Switch the sensitivity value set in the CRTL4 */
+ switch(tmpreg & L3GD20_FULLSCALE_SELECTION)
+ {
+ case L3GD20_FULLSCALE_250:
+ sensitivity=L3GD20_SENSITIVITY_250DPS;
+ break;
+
+ case L3GD20_FULLSCALE_500:
+ sensitivity=L3GD20_SENSITIVITY_500DPS;
+ break;
+
+ case L3GD20_FULLSCALE_2000:
+ sensitivity=L3GD20_SENSITIVITY_2000DPS;
+ break;
+ }
+ /* Divide by sensitivity */
+ for(i=0; i<3; i++)
+ {
+ pfData[i]=(float)(RawData[i] * sensitivity);
+ }
+}
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/P3_SETR2/Components/l3gd20/l3gd20.h b/P3_SETR2/Components/l3gd20/l3gd20.h
new file mode 100644
index 0000000..c662e98
--- /dev/null
+++ b/P3_SETR2/Components/l3gd20/l3gd20.h
@@ -0,0 +1,306 @@
+/**
+ ******************************************************************************
+ * @file l3gd20.h
+ * @author MCD Application Team
+ * @brief This file contains all the functions prototypes for the l3gd20.c driver.
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2015 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __L3GD20_H
+#define __L3GD20_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "../Common/gyro.h"
+
+/** @addtogroup BSP
+ * @{
+ */
+
+/** @addtogroup Components
+ * @{
+ */
+
+/** @addtogroup L3GD20
+ * @{
+ */
+
+/** @defgroup L3GD20_Exported_Constants
+ * @{
+ */
+
+/******************************************************************************/
+/*************************** START REGISTER MAPPING **************************/
+/******************************************************************************/
+#define L3GD20_WHO_AM_I_ADDR 0x0F /* device identification register */
+#define L3GD20_CTRL_REG1_ADDR 0x20 /* Control register 1 */
+#define L3GD20_CTRL_REG2_ADDR 0x21 /* Control register 2 */
+#define L3GD20_CTRL_REG3_ADDR 0x22 /* Control register 3 */
+#define L3GD20_CTRL_REG4_ADDR 0x23 /* Control register 4 */
+#define L3GD20_CTRL_REG5_ADDR 0x24 /* Control register 5 */
+#define L3GD20_REFERENCE_REG_ADDR 0x25 /* Reference register */
+#define L3GD20_OUT_TEMP_ADDR 0x26 /* Out temp register */
+#define L3GD20_STATUS_REG_ADDR 0x27 /* Status register */
+#define L3GD20_OUT_X_L_ADDR 0x28 /* Output Register X */
+#define L3GD20_OUT_X_H_ADDR 0x29 /* Output Register X */
+#define L3GD20_OUT_Y_L_ADDR 0x2A /* Output Register Y */
+#define L3GD20_OUT_Y_H_ADDR 0x2B /* Output Register Y */
+#define L3GD20_OUT_Z_L_ADDR 0x2C /* Output Register Z */
+#define L3GD20_OUT_Z_H_ADDR 0x2D /* Output Register Z */
+#define L3GD20_FIFO_CTRL_REG_ADDR 0x2E /* Fifo control Register */
+#define L3GD20_FIFO_SRC_REG_ADDR 0x2F /* Fifo src Register */
+
+#define L3GD20_INT1_CFG_ADDR 0x30 /* Interrupt 1 configuration Register */
+#define L3GD20_INT1_SRC_ADDR 0x31 /* Interrupt 1 source Register */
+#define L3GD20_INT1_TSH_XH_ADDR 0x32 /* Interrupt 1 Threshold X register */
+#define L3GD20_INT1_TSH_XL_ADDR 0x33 /* Interrupt 1 Threshold X register */
+#define L3GD20_INT1_TSH_YH_ADDR 0x34 /* Interrupt 1 Threshold Y register */
+#define L3GD20_INT1_TSH_YL_ADDR 0x35 /* Interrupt 1 Threshold Y register */
+#define L3GD20_INT1_TSH_ZH_ADDR 0x36 /* Interrupt 1 Threshold Z register */
+#define L3GD20_INT1_TSH_ZL_ADDR 0x37 /* Interrupt 1 Threshold Z register */
+#define L3GD20_INT1_DURATION_ADDR 0x38 /* Interrupt 1 DURATION register */
+
+/******************************************************************************/
+/**************************** END REGISTER MAPPING ***************************/
+/******************************************************************************/
+
+#define I_AM_L3GD20 ((uint8_t)0xD4)
+#define I_AM_L3GD20_TR ((uint8_t)0xD5)
+
+/** @defgroup Power_Mode_selection
+ * @{
+ */
+#define L3GD20_MODE_POWERDOWN ((uint8_t)0x00)
+#define L3GD20_MODE_ACTIVE ((uint8_t)0x08)
+/**
+ * @}
+ */
+
+/** @defgroup OutPut_DataRate_Selection
+ * @{
+ */
+#define L3GD20_OUTPUT_DATARATE_1 ((uint8_t)0x00)
+#define L3GD20_OUTPUT_DATARATE_2 ((uint8_t)0x40)
+#define L3GD20_OUTPUT_DATARATE_3 ((uint8_t)0x80)
+#define L3GD20_OUTPUT_DATARATE_4 ((uint8_t)0xC0)
+/**
+ * @}
+ */
+
+/** @defgroup Axes_Selection
+ * @{
+ */
+#define L3GD20_X_ENABLE ((uint8_t)0x02)
+#define L3GD20_Y_ENABLE ((uint8_t)0x01)
+#define L3GD20_Z_ENABLE ((uint8_t)0x04)
+#define L3GD20_AXES_ENABLE ((uint8_t)0x07)
+#define L3GD20_AXES_DISABLE ((uint8_t)0x00)
+/**
+ * @}
+ */
+
+/** @defgroup Bandwidth_Selection
+ * @{
+ */
+#define L3GD20_BANDWIDTH_1 ((uint8_t)0x00)
+#define L3GD20_BANDWIDTH_2 ((uint8_t)0x10)
+#define L3GD20_BANDWIDTH_3 ((uint8_t)0x20)
+#define L3GD20_BANDWIDTH_4 ((uint8_t)0x30)
+/**
+ * @}
+ */
+
+/** @defgroup Full_Scale_Selection
+ * @{
+ */
+#define L3GD20_FULLSCALE_250 ((uint8_t)0x00)
+#define L3GD20_FULLSCALE_500 ((uint8_t)0x10)
+#define L3GD20_FULLSCALE_2000 ((uint8_t)0x20)
+#define L3GD20_FULLSCALE_SELECTION ((uint8_t)0x30)
+/**
+ * @}
+ */
+
+/** @defgroup Full_Scale_Sensitivity
+ * @{
+ */
+#define L3GD20_SENSITIVITY_250DPS ((float)8.75f) /*!< gyroscope sensitivity with 250 dps full scale [DPS/LSB] */
+#define L3GD20_SENSITIVITY_500DPS ((float)17.50f) /*!< gyroscope sensitivity with 500 dps full scale [DPS/LSB] */
+#define L3GD20_SENSITIVITY_2000DPS ((float)70.00f) /*!< gyroscope sensitivity with 2000 dps full scale [DPS/LSB] */
+/**
+ * @}
+ */
+
+
+/** @defgroup Block_Data_Update
+ * @{
+ */
+#define L3GD20_BlockDataUpdate_Continous ((uint8_t)0x00)
+#define L3GD20_BlockDataUpdate_Single ((uint8_t)0x80)
+/**
+ * @}
+ */
+
+/** @defgroup Endian_Data_selection
+ * @{
+ */
+#define L3GD20_BLE_LSB ((uint8_t)0x00)
+#define L3GD20_BLE_MSB ((uint8_t)0x40)
+/**
+ * @}
+ */
+
+/** @defgroup High_Pass_Filter_status
+ * @{
+ */
+#define L3GD20_HIGHPASSFILTER_DISABLE ((uint8_t)0x00)
+#define L3GD20_HIGHPASSFILTER_ENABLE ((uint8_t)0x10)
+/**
+ * @}
+ */
+
+/** @defgroup INT1_INT2_selection
+ * @{
+ */
+#define L3GD20_INT1 ((uint8_t)0x00)
+#define L3GD20_INT2 ((uint8_t)0x01)
+/**
+ * @}
+ */
+
+/** @defgroup INT1_Interrupt_status
+ * @{
+ */
+#define L3GD20_INT1INTERRUPT_DISABLE ((uint8_t)0x00)
+#define L3GD20_INT1INTERRUPT_ENABLE ((uint8_t)0x80)
+/**
+ * @}
+ */
+
+/** @defgroup INT2_Interrupt_status
+ * @{
+ */
+#define L3GD20_INT2INTERRUPT_DISABLE ((uint8_t)0x00)
+#define L3GD20_INT2INTERRUPT_ENABLE ((uint8_t)0x08)
+/**
+ * @}
+ */
+
+/** @defgroup INT1_Interrupt_ActiveEdge
+ * @{
+ */
+#define L3GD20_INT1INTERRUPT_LOW_EDGE ((uint8_t)0x20)
+#define L3GD20_INT1INTERRUPT_HIGH_EDGE ((uint8_t)0x00)
+/**
+ * @}
+ */
+
+/** @defgroup Boot_Mode_selection
+ * @{
+ */
+#define L3GD20_BOOT_NORMALMODE ((uint8_t)0x00)
+#define L3GD20_BOOT_REBOOTMEMORY ((uint8_t)0x80)
+/**
+ * @}
+ */
+
+/** @defgroup High_Pass_Filter_Mode
+ * @{
+ */
+#define L3GD20_HPM_NORMAL_MODE_RES ((uint8_t)0x00)
+#define L3GD20_HPM_REF_SIGNAL ((uint8_t)0x10)
+#define L3GD20_HPM_NORMAL_MODE ((uint8_t)0x20)
+#define L3GD20_HPM_AUTORESET_INT ((uint8_t)0x30)
+/**
+ * @}
+ */
+
+/** @defgroup High_Pass_CUT OFF_Frequency
+ * @{
+ */
+#define L3GD20_HPFCF_0 0x00
+#define L3GD20_HPFCF_1 0x01
+#define L3GD20_HPFCF_2 0x02
+#define L3GD20_HPFCF_3 0x03
+#define L3GD20_HPFCF_4 0x04
+#define L3GD20_HPFCF_5 0x05
+#define L3GD20_HPFCF_6 0x06
+#define L3GD20_HPFCF_7 0x07
+#define L3GD20_HPFCF_8 0x08
+#define L3GD20_HPFCF_9 0x09
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+/** @defgroup L3GD20_Exported_Functions
+ * @{
+ */
+/* Sensor Configuration Functions */
+void L3GD20_Init(uint16_t InitStruct);
+void L3GD20_DeInit(void);
+void L3GD20_LowPower(uint16_t InitStruct);
+uint8_t L3GD20_ReadID(void);
+void L3GD20_RebootCmd(void);
+
+/* Interrupt Configuration Functions */
+void L3GD20_INT1InterruptConfig(uint16_t Int1Config);
+void L3GD20_EnableIT(uint8_t IntSel);
+void L3GD20_DisableIT(uint8_t IntSel);
+
+/* High Pass Filter Configuration Functions */
+void L3GD20_FilterConfig(uint8_t FilterStruct);
+void L3GD20_FilterCmd(uint8_t HighPassFilterState);
+void L3GD20_ReadXYZAngRate(float *pfData);
+uint8_t L3GD20_GetDataStatus(void);
+
+/* Gyroscope IO functions */
+void GYRO_IO_Init(void);
+void GYRO_IO_DeInit(void);
+void GYRO_IO_Write(uint8_t *pBuffer, uint8_t WriteAddr, uint16_t NumByteToWrite);
+void GYRO_IO_Read(uint8_t *pBuffer, uint8_t ReadAddr, uint16_t NumByteToRead);
+
+/* Gyroscope driver structure */
+extern GYRO_DrvTypeDef L3gd20Drv;
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif /* __L3GD20_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/P3_SETR2/Components/lis3mdl/Release_Notes.html b/P3_SETR2/Components/lis3mdl/Release_Notes.html
new file mode 100644
index 0000000..3f2da2e
--- /dev/null
+++ b/P3_SETR2/Components/lis3mdl/Release_Notes.html
@@ -0,0 +1,65 @@
+
+
+
+
+
+
+ Release Notes for LIS3MDL Component Drivers
+
+
+
+
+
+
+
+
+
+
+Release Notes for LIS3MDL Component Drivers
+Copyright © 2017 STMicroelectronics
+
+
+
+
+
+
License
+
Licensed by ST under BSD 3-Clause license (the "License"). You may not use this package except in compliance with the License. You may obtain a copy of the License at:
+
https://opensource.org/licenses/BSD-3-Clause
+
Purpose
+
This directory contains the LIS3MDL component drivers.
+
+
+
Update History
+
+
V1.0.1 / 03-April-2019
+
+
Main Changes
+
+Update release notes format
+Reformat the BSD 3-Clause license declaration in the files header (replace license terms by a web reference to OSI website where those terms lie)
+
+
+
+
+
V1.0.0 / 07-August-2017
+
+
Main Changes
+
+First official release of LIS3MDL Magnetometer sensor
+
+
+
+
+
+
+
+
diff --git a/P3_SETR2/Components/lis3mdl/lis3mdl.c b/P3_SETR2/Components/lis3mdl/lis3mdl.c
new file mode 100644
index 0000000..1ef01dc
--- /dev/null
+++ b/P3_SETR2/Components/lis3mdl/lis3mdl.c
@@ -0,0 +1,202 @@
+/**
+ ******************************************************************************
+ * @file lis3mdl.c
+ * @author MCD Application Team
+ * @brief This file provides a set of functions needed to manage the LIS3MDL
+ * magnetometer devices
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2017 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/* Includes ------------------------------------------------------------------*/
+#include "lis3mdl.h"
+
+/** @addtogroup BSP
+ * @{
+ */
+
+/** @addtogroup Component
+ * @{
+ */
+
+/** @defgroup LIS3MDL LIS3MDL
+ * @{
+ */
+
+/** @defgroup LIS3MDL_Mag_Private_Variables LIS3MDL Mag Private Variables
+ * @{
+ */
+MAGNETO_DrvTypeDef Lis3mdlMagDrv =
+{
+ LIS3MDL_MagInit,
+ LIS3MDL_MagDeInit,
+ LIS3MDL_MagReadID,
+ 0,
+ LIS3MDL_MagLowPower,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ LIS3MDL_MagReadXYZ
+};
+/**
+ * @}
+ */
+
+
+/** @defgroup LIS3MDL_Mag_Private_Functions LIS3MDL Mag Private Functions
+ * @{
+ */
+/**
+ * @brief Set LIS3MDL Magnetometer Initialization.
+ * @param LIS3MDL_InitStruct: pointer to a LIS3MDL_MagInitTypeDef structure
+ * that contains the configuration setting for the LIS3MDL.
+ */
+void LIS3MDL_MagInit(MAGNETO_InitTypeDef LIS3MDL_InitStruct)
+{
+ SENSOR_IO_Write(LIS3MDL_MAG_I2C_ADDRESS_HIGH, LIS3MDL_MAG_CTRL_REG1, LIS3MDL_InitStruct.Register1);
+ SENSOR_IO_Write(LIS3MDL_MAG_I2C_ADDRESS_HIGH, LIS3MDL_MAG_CTRL_REG2, LIS3MDL_InitStruct.Register2);
+ SENSOR_IO_Write(LIS3MDL_MAG_I2C_ADDRESS_HIGH, LIS3MDL_MAG_CTRL_REG3, LIS3MDL_InitStruct.Register3);
+ SENSOR_IO_Write(LIS3MDL_MAG_I2C_ADDRESS_HIGH, LIS3MDL_MAG_CTRL_REG4, LIS3MDL_InitStruct.Register4);
+ SENSOR_IO_Write(LIS3MDL_MAG_I2C_ADDRESS_HIGH, LIS3MDL_MAG_CTRL_REG5, LIS3MDL_InitStruct.Register5);
+}
+
+/**
+ * @brief LIS3MDL Magnetometer De-initialization.
+ */
+void LIS3MDL_MagDeInit(void)
+{
+ uint8_t ctrl = 0x00;
+
+ /* Read control register 1 value */
+ ctrl = SENSOR_IO_Read(LIS3MDL_MAG_I2C_ADDRESS_HIGH, LIS3MDL_MAG_CTRL_REG3);
+
+ /* Clear Selection Mode bits */
+ ctrl &= ~(LIS3MDL_MAG_SELECTION_MODE);
+
+ /* Set Power down */
+ ctrl |= LIS3MDL_MAG_POWERDOWN2_MODE;
+
+ /* write back control register */
+ SENSOR_IO_Write(LIS3MDL_MAG_I2C_ADDRESS_HIGH, LIS3MDL_MAG_CTRL_REG3, ctrl);
+}
+
+/**
+ * @brief Read LIS3MDL ID.
+ * @retval ID
+ */
+uint8_t LIS3MDL_MagReadID(void)
+{
+ /* IO interface initialization */
+ SENSOR_IO_Init();
+ /* Read value at Who am I register address */
+ return (SENSOR_IO_Read(LIS3MDL_MAG_I2C_ADDRESS_HIGH, LIS3MDL_MAG_WHO_AM_I_REG));
+}
+
+/**
+ * @brief Set/Unset Magnetometer in low power mode.
+ * @param status 0 means disable Low Power Mode, otherwise Low Power Mode is enabled
+ */
+void LIS3MDL_MagLowPower(uint16_t status)
+{
+ uint8_t ctrl = 0;
+
+ /* Read control register 1 value */
+ ctrl = SENSOR_IO_Read(LIS3MDL_MAG_I2C_ADDRESS_HIGH, LIS3MDL_MAG_CTRL_REG3);
+
+ /* Clear Low Power Mode bit */
+ ctrl &= ~(0x20);
+
+ /* Set Low Power Mode */
+ if(status)
+ {
+ ctrl |= LIS3MDL_MAG_CONFIG_LOWPOWER_MODE;
+ }else
+ {
+ ctrl |= LIS3MDL_MAG_CONFIG_NORMAL_MODE;
+ }
+
+ /* write back control register */
+ SENSOR_IO_Write(LIS3MDL_MAG_I2C_ADDRESS_HIGH, LIS3MDL_MAG_CTRL_REG3, ctrl);
+}
+
+/**
+ * @brief Read X, Y & Z Magnetometer values
+ * @param pData: Data out pointer
+ */
+void LIS3MDL_MagReadXYZ(int16_t* pData)
+{
+ int16_t pnRawData[3];
+ uint8_t ctrlm= 0;
+ uint8_t buffer[6];
+ uint8_t i = 0;
+ float sensitivity = 0;
+
+ /* Read the magnetometer control register content */
+ ctrlm = SENSOR_IO_Read(LIS3MDL_MAG_I2C_ADDRESS_HIGH, LIS3MDL_MAG_CTRL_REG2);
+
+ /* Read output register X, Y & Z acceleration */
+ SENSOR_IO_ReadMultiple(LIS3MDL_MAG_I2C_ADDRESS_HIGH, (LIS3MDL_MAG_OUTX_L | 0x80), buffer, 6);
+
+ for(i=0; i<3; i++)
+ {
+ pnRawData[i]=((((uint16_t)buffer[2*i+1]) << 8) + (uint16_t)buffer[2*i]);
+ }
+
+ /* Normal mode */
+ /* Switch the sensitivity value set in the CRTL_REG2 */
+ switch(ctrlm & 0x60)
+ {
+ case LIS3MDL_MAG_FS_4_GA:
+ sensitivity = LIS3MDL_MAG_SENSITIVITY_FOR_FS_4GA;
+ break;
+ case LIS3MDL_MAG_FS_8_GA:
+ sensitivity = LIS3MDL_MAG_SENSITIVITY_FOR_FS_8GA;
+ break;
+ case LIS3MDL_MAG_FS_12_GA:
+ sensitivity = LIS3MDL_MAG_SENSITIVITY_FOR_FS_12GA;
+ break;
+ case LIS3MDL_MAG_FS_16_GA:
+ sensitivity = LIS3MDL_MAG_SENSITIVITY_FOR_FS_16GA;
+ break;
+ }
+
+ /* Obtain the mGauss value for the three axis */
+ for(i=0; i<3; i++)
+ {
+ pData[i]=( int16_t )(pnRawData[i] * sensitivity);
+ }
+}
+
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
+
diff --git a/P3_SETR2/Components/lis3mdl/lis3mdl.h b/P3_SETR2/Components/lis3mdl/lis3mdl.h
new file mode 100644
index 0000000..f9e0296
--- /dev/null
+++ b/P3_SETR2/Components/lis3mdl/lis3mdl.h
@@ -0,0 +1,214 @@
+/**
+ ******************************************************************************
+ * @file lis3mdl.h
+ * @author MCD Application Team
+ * @brief LIS3MDL header driver file
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2017 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __LIS3MDL__H
+#define __LIS3MDL__H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "../Common/magneto.h"
+
+/** @addtogroup BSP
+ * @{
+ */
+
+/** @addtogroup Component
+ * @{
+ */
+
+/** @addtogroup LIS3MDL
+ * @{
+ */
+
+/** @defgroup LIS3MDL_Exported_Constants LIS3MDL Exported Constants
+ * @{
+ */
+/************** I2C Address *****************/
+
+#define LIS3MDL_MAG_I2C_ADDRESS_LOW ((uint8_t)0x38) // SAD[0] = 0
+#define LIS3MDL_MAG_I2C_ADDRESS_HIGH ((uint8_t)0x3C) // SAD[0] = 1
+
+/************** Who am I *******************/
+
+#define I_AM_LIS3MDL ((uint8_t)0x3D)
+
+/************** Device Register *******************/
+
+#define LIS3MDL_MAG_WHO_AM_I_REG 0x0F
+#define LIS3MDL_MAG_CTRL_REG1 0x20
+#define LIS3MDL_MAG_CTRL_REG2 0x21
+#define LIS3MDL_MAG_CTRL_REG3 0x22
+#define LIS3MDL_MAG_CTRL_REG4 0x23
+#define LIS3MDL_MAG_CTRL_REG5 0x24
+#define LIS3MDL_MAG_STATUS_REG 0x27
+#define LIS3MDL_MAG_OUTX_L 0x28
+#define LIS3MDL_MAG_OUTX_H 0x29
+#define LIS3MDL_MAG_OUTY_L 0x2A
+#define LIS3MDL_MAG_OUTY_H 0x2B
+#define LIS3MDL_MAG_OUTZ_L 0x2C
+#define LIS3MDL_MAG_OUTZ_H 0x2D
+#define LIS3MDL_MAG_TEMP_OUT_L 0x2E
+#define LIS3MDL_MAG_TEMP_OUT_H 0x2F
+#define LIS3MDL_MAG_INT_CFG 0x30
+#define LIS3MDL_MAG_INT_SRC 0x31
+#define LIS3MDL_MAG_INT_THS_L 0x32
+#define LIS3MDL_MAG_INT_THS_H 0x33
+
+/* Mag Temperature Sensor Control*/
+#define LIS3MDL_MAG_TEMPSENSOR_ENABLE ((uint8_t) 0x80) /*!< Temp sensor Enable */
+#define LIS3MDL_MAG_TEMPSENSOR_DISABLE ((uint8_t) 0x00) /*!< Temp sensor Disable */
+
+/* Mag_XY-axis Operating Mode */
+#define LIS3MDL_MAG_OM_XY_LOWPOWER ((uint8_t) 0x00)
+#define LIS3MDL_MAG_OM_XY_MEDIUM ((uint8_t) 0x20)
+#define LIS3MDL_MAG_OM_XY_HIGH ((uint8_t) 0x40)
+#define LIS3MDL_MAG_OM_XY_ULTRAHIGH ((uint8_t) 0x60)
+
+/* Mag Data Rate */
+#define LIS3MDL_MAG_ODR_0_625_HZ ((uint8_t) 0x00) /*!< Output Data Rate = 0.625 Hz */
+#define LIS3MDL_MAG_ODR_1_25_HZ ((uint8_t) 0x04) /*!< Output Data Rate = 1.25 Hz */
+#define LIS3MDL_MAG_ODR_2_5_HZ ((uint8_t) 0x08) /*!< Output Data Rate = 2.5 Hz */
+#define LIS3MDL_MAG_ODR_5_0_HZ ((uint8_t) 0x0C) /*!< Output Data Rate = 5.0 Hz */
+#define LIS3MDL_MAG_ODR_10_HZ ((uint8_t) 0x10) /*!< Output Data Rate = 10 Hz */
+#define LIS3MDL_MAG_ODR_20_HZ ((uint8_t) 0x14) /*!< Output Data Rate = 20 Hz */
+#define LIS3MDL_MAG_ODR_40_HZ ((uint8_t) 0x18) /*!< Output Data Rate = 40 Hz */
+#define LIS3MDL_MAG_ODR_80_HZ ((uint8_t) 0x1C) /*!< Output Data Rate = 80 Hz */
+
+/* Mag Data Rate */
+#define LMS303C_MAG_SELFTEST_DISABLE ((uint8_t 0x00)
+#define LMS303C_MAG_SELFTEST_ENABLE ((uint8_t 0x01)
+
+/* Mag Full Scale */
+#define LIS3MDL_MAG_FS_DEFAULT ((uint8_t) 0x00)
+#define LIS3MDL_MAG_FS_4_GA ((uint8_t) 0x00)
+#define LIS3MDL_MAG_FS_8_GA ((uint8_t) 0x20)
+#define LIS3MDL_MAG_FS_12_GA ((uint8_t) 0x40)
+#define LIS3MDL_MAG_FS_16_GA ((uint8_t) 0x60) /*!< Full scale = 16 Gauss */
+
+/* Mag_Reboot */
+#define LIS3MDL_MAG_REBOOT_DEFAULT ((uint8_t) 0x00)
+#define LIS3MDL_MAG_REBOOT_ENABLE ((uint8_t) 0x08)
+
+/* Mag Soft reset */
+#define LIS3MDL_MAG_SOFT_RESET_DEFAULT ((uint8_t) 0x00)
+#define LIS3MDL_MAG_SOFT_RESET_ENABLE ((uint8_t) 0x04)
+
+/* Mag_Communication_Mode */
+#define LIS3MDL_MAG_SIM_4_WIRE ((uint8_t) 0x00)
+#define LIS3MDL_MAG_SIM_3_WIRE ((uint8_t) 0x04)
+
+/* Mag Lowpower mode config */
+#define LIS3MDL_MAG_CONFIG_NORMAL_MODE ((uint8_t) 0x00)
+#define LIS3MDL_MAG_CONFIG_LOWPOWER_MODE ((uint8_t) 0x20)
+
+/* Mag Operation Mode */
+#define LIS3MDL_MAG_SELECTION_MODE ((uint8_t) 0x03) /* CTRL_REG3 */
+#define LIS3MDL_MAG_CONTINUOUS_MODE ((uint8_t) 0x00)
+#define LIS3MDL_MAG_SINGLE_MODE ((uint8_t) 0x01)
+#define LIS3MDL_MAG_POWERDOWN1_MODE ((uint8_t) 0x02)
+#define LIS3MDL_MAG_POWERDOWN2_MODE ((uint8_t) 0x03)
+
+/* Mag_Z-axis Operation Mode */
+#define LIS3MDL_MAG_OM_Z_LOWPOWER ((uint8_t) 0x00)
+#define LIS3MDL_MAG_OM_Z_MEDIUM ((uint8_t) 0x04)
+#define LIS3MDL_MAG_OM_Z_HIGH ((uint8_t) 0x08)
+#define LIS3MDL_MAG_OM_Z_ULTRAHIGH ((uint8_t) 0x0C)
+
+/* Mag Big little-endian selection */
+#define LIS3MDL_MAG_BLE_LSB ((uint8_t) 0x00)
+#define LIS3MDL_MAG_BLE_MSB ((uint8_t) 0x02)
+
+
+/* Mag_Bloc_update_magnetic_data */
+#define LIS3MDL_MAG_BDU_CONTINUOUS ((uint8_t) 0x00)
+#define LIS3MDL_MAG_BDU_MSBLSB ((uint8_t) 0x40)
+
+
+/* Magnetometer_Sensitivity */
+#define LIS3MDL_MAG_SENSITIVITY_FOR_FS_4GA ((float)0.14f) /**< Sensitivity value for 4 gauss full scale [mgauss/LSB] */
+#define LIS3MDL_MAG_SENSITIVITY_FOR_FS_8GA ((float)0.29f) /**< Sensitivity value for 8 gauss full scale [mgauss/LSB] */
+#define LIS3MDL_MAG_SENSITIVITY_FOR_FS_12GA ((float)0.43f) /**< Sensitivity value for 12 gauss full scale [mgauss/LSB] */
+#define LIS3MDL_MAG_SENSITIVITY_FOR_FS_16GA ((float)0.58f) /**< Sensitivity value for 16 gauss full scale [mgauss/LSB] */
+
+/**
+ * @}
+ */
+
+
+/** @defgroup LIS3MDL_Exported_Functions LIS3MDL Exported Functions
+ * @{
+ */
+
+void LIS3MDL_MagInit(MAGNETO_InitTypeDef LIS3MDL_InitStruct);
+void LIS3MDL_MagDeInit(void);
+uint8_t LIS3MDL_MagReadID(void);
+void LIS3MDL_MagLowPower(uint16_t status);
+void LIS3MDL_MagReadXYZ(int16_t* pData);
+
+/**
+ * @}
+ */
+
+
+/** @defgroup LIS3MDL_Imported_Functions LIS3MDL Imported Functions
+ * @{
+ */
+/* IO functions */
+extern void SENSOR_IO_Init(void);
+extern void SENSOR_IO_DeInit(void);
+extern void SENSOR_IO_Write(uint8_t Addr, uint8_t Reg, uint8_t Value);
+extern uint8_t SENSOR_IO_Read(uint8_t Addr, uint8_t Reg);
+extern uint16_t SENSOR_IO_ReadMultiple(uint8_t Addr, uint8_t Reg, uint8_t *Buffer, uint16_t Length);
+extern void SENSOR_IO_WriteMultiple(uint8_t Addr, uint8_t Reg, uint8_t *Buffer, uint16_t Length);
+/**
+ * @}
+ */
+
+/** @defgroup LIS3MDL_Imported_Globals Imported Globals
+ * @{
+ */
+/* MAG driver structure */
+extern MAGNETO_DrvTypeDef Lis3mdlMagDrv;
+/**
+ * @}
+ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __LIS3MDL__H */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/P3_SETR2/Components/lps22hb/Release_Notes.html b/P3_SETR2/Components/lps22hb/Release_Notes.html
new file mode 100644
index 0000000..a2e1cb1
--- /dev/null
+++ b/P3_SETR2/Components/lps22hb/Release_Notes.html
@@ -0,0 +1,65 @@
+
+
+
+
+
+
+ Release Notes for LPS22HB Component Drivers
+
+
+
+
+
+
+
+
+
+
+Release Notes for LPS22HB Component Drivers
+Copyright © 2017 STMicroelectronics
+
+
+
+
+
+
License
+
Licensed by ST under BSD 3-Clause license (the "License"). You may not use this package except in compliance with the License. You may obtain a copy of the License at:
+
https://opensource.org/licenses/BSD-3-Clause
+
Purpose
+
This directory contains the LPS22HB component drivers.
+
+
+
Update History
+
+
V1.0.1 / 03-April-2019
+
+
Main Changes
+
+Update release notes format
+Reformat the BSD 3-Clause license declaration in the files header (replace license terms by a web reference to OSI website where those terms lie)
+
+
+
+
+
V1.0.0 / 14-February-2017
+
+
Main Changes
+
+First official release of LPS22HB Temperature/Pressure sensor
+
+
+
+
+
+
+
+
diff --git a/P3_SETR2/Components/lps22hb/lps22hb.c b/P3_SETR2/Components/lps22hb/lps22hb.c
new file mode 100644
index 0000000..f63fe15
--- /dev/null
+++ b/P3_SETR2/Components/lps22hb/lps22hb.c
@@ -0,0 +1,228 @@
+/**
+ ******************************************************************************
+ * @file lps22hb.c
+ * @author MCD Application Team
+ * @brief This file provides a set of functions needed to manage the LPS22HB
+ * pressure and temperature devices
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2017 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/* Includes ------------------------------------------------------------------*/
+#include "lps22hb.h"
+
+/** @addtogroup BSP
+ * @{
+ */
+
+/** @addtogroup Component
+ * @{
+ */
+
+/** @defgroup LPS22HB LPS22HB
+ * @{
+ */
+
+/** @defgroup LPS22HB_Private_FunctionsPrototypes LPS22HB Private Functions Prototypes
+ * @{
+ */
+static void LPS22HB_Init(uint16_t DeviceAddr);
+/**
+ * @}
+ */
+
+/** @defgroup LPS22HB_Private_Variables LPS22HB Private Variables
+ * @{
+ */
+/* Pressure Private Variables */
+PSENSOR_DrvTypeDef LPS22HB_P_Drv =
+{
+ LPS22HB_P_Init,
+ LPS22HB_P_ReadID,
+ LPS22HB_P_ReadPressure
+};
+
+/* Temperature Private Variables */
+TSENSOR_DrvTypeDef LPS22HB_T_Drv =
+{
+ LPS22HB_T_Init,
+ 0,
+ 0,
+ LPS22HB_T_ReadTemp
+};
+/**
+ * @}
+ */
+
+/** @defgroup LPS22HB_Pressure_Private_Functions LPS22HB Pressure Private Functions
+ * @{
+ */
+/**
+ * @brief Set LPS22HB pressure sensor Initialization.
+ */
+void LPS22HB_P_Init(uint16_t DeviceAddr)
+{
+ LPS22HB_Init(DeviceAddr);
+}
+
+/**
+ * @brief Read LPS22HB ID.
+ * @retval ID
+ */
+uint8_t LPS22HB_P_ReadID(uint16_t DeviceAddr)
+{
+ uint8_t ctrl = 0x00;
+
+ /* IO interface initialization */
+ SENSOR_IO_Init();
+
+ /* Read value at Who am I register address */
+ ctrl = SENSOR_IO_Read(DeviceAddr, LPS22HB_WHO_AM_I_REG);
+
+ return ctrl;
+}
+
+/**
+ * @brief Read pressure value of LPS22HB
+ * @retval pressure value
+ */
+float LPS22HB_P_ReadPressure(uint16_t DeviceAddr)
+{
+ int32_t raw_press;
+ uint8_t buffer[3];
+ uint32_t tmp = 0;
+ uint8_t i;
+
+ for(i = 0; i < 3; i++)
+ {
+ buffer[i] = SENSOR_IO_Read(DeviceAddr, (LPS22HB_PRESS_OUT_XL_REG + i));
+ }
+
+ /* Build the raw data */
+ for(i = 0; i < 3; i++)
+ tmp |= (((uint32_t)buffer[i]) << (8 * i));
+
+ /* convert the 2's complement 24 bit to 2's complement 32 bit */
+ if(tmp & 0x00800000)
+ tmp |= 0xFF000000;
+
+ raw_press = ((int32_t)tmp);
+
+ raw_press = (raw_press * 100) / 4096;
+
+ return (float)((float)raw_press / 100.0f);
+}
+
+
+/**
+ * @}
+ */
+
+/** @defgroup LPS22HB_Temperature_Private_Functions LPS22HB Temperature Private Functions
+ * @{
+ */
+
+/**
+ * @brief Set LPS22HB temperature sensor Initialization.
+ * @param DeviceAddr: I2C device address
+ * @param InitStruct: pointer to a TSENSOR_InitTypeDef structure
+ * that contains the configuration setting for the HTS221.
+ * @retval None
+ */
+void LPS22HB_T_Init(uint16_t DeviceAddr, TSENSOR_InitTypeDef *pInitStruct)
+{
+ LPS22HB_Init(DeviceAddr);
+}
+
+/**
+ * @brief Read temperature value of LPS22HB
+ * @param DeviceAddr: I2C device address
+ * @retval temperature value
+ */
+float LPS22HB_T_ReadTemp(uint16_t DeviceAddr)
+{
+ int16_t raw_data;
+ uint8_t buffer[2];
+ uint16_t tmp;
+ uint8_t i;
+
+ for(i = 0; i < 2; i++)
+ {
+ buffer[i] = SENSOR_IO_Read(DeviceAddr, (LPS22HB_TEMP_OUT_L_REG + i));
+ }
+
+ /* Build the raw tmp */
+ tmp = (((uint16_t)buffer[1]) << 8) + (uint16_t)buffer[0];
+
+ raw_data = (tmp * 10) / 100;
+
+ return ((float)(raw_data / 10.0f));
+}
+
+/**
+ * @}
+ */
+
+/** @addtogroup LPS22HB_Private_Functions LPS22HB Private functions
+ * @{
+ */
+
+/**
+ * @brief Set LPS22HB Initialization.
+ * @param DeviceAddr: I2C device address
+ * @retval None
+ */
+static void LPS22HB_Init(uint16_t DeviceAddr)
+{
+ uint8_t tmp;
+
+ /* Set Power mode */
+ tmp = SENSOR_IO_Read(DeviceAddr, LPS22HB_RES_CONF_REG);
+
+ tmp &= ~LPS22HB_LCEN_MASK;
+ tmp |= (uint8_t)0x01; /* Set low current mode */
+
+ SENSOR_IO_Write(DeviceAddr, LPS22HB_RES_CONF_REG, tmp);
+
+ /* Read CTRL_REG1 */
+ tmp = SENSOR_IO_Read(DeviceAddr, LPS22HB_CTRL_REG1);
+
+ /* Set default ODR */
+ tmp &= ~LPS22HB_ODR_MASK;
+ tmp |= (uint8_t)0x30; /* Set ODR to 25Hz */
+
+ /* Enable BDU */
+ tmp &= ~LPS22HB_BDU_MASK;
+ tmp |= ((uint8_t)0x02);
+
+ /* Apply settings to CTRL_REG1 */
+ SENSOR_IO_Write(DeviceAddr, LPS22HB_CTRL_REG1, tmp);
+}
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/P3_SETR2/Components/lps22hb/lps22hb.h b/P3_SETR2/Components/lps22hb/lps22hb.h
new file mode 100644
index 0000000..8ba6c48
--- /dev/null
+++ b/P3_SETR2/Components/lps22hb/lps22hb.h
@@ -0,0 +1,516 @@
+/**
+ ******************************************************************************
+ * @file lps22hb.h
+ * @author MCD Application Team
+ * @brief LPS22HB header driver file
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2017 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __LPS22HB__H
+#define __LPS22HB__H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "../Common/psensor.h"
+#include "../Common/tsensor.h"
+
+/** @addtogroup BSP
+ * @{
+ */
+
+/** @addtogroup Component
+ * @{
+ */
+
+/** @addtogroup LPS22HB
+ * @{
+ */
+
+/** @defgroup LPS22HB_Exported_Macros LPS22HB Exported Macros
+ * @{
+ */
+
+/**
+* @brief Bitfield positioning.
+*/
+#define LPS22HB_BIT(x) ((uint8_t)x)
+/**
+ * @}
+ */
+
+
+/** @defgroup LPS22HB_Exported_Constants LPS22HB Exported Constants
+ * @{
+ */
+
+/**
+ * @brief Device Identification register.
+ * Read
+ * Default value: 0xB1
+ * 7:0 This read-only register contains the device identifier that, for LPS22HB, is set to B1h.
+ */
+
+#define LPS22HB_WHO_AM_I_REG (uint8_t)0x0F
+
+/**
+ * @brief Device Identification value.
+ */
+#define LPS22HB_WHO_AM_I_VAL (uint8_t)0xB1
+
+/**
+ * @brief Reference Pressure Register(LSB data)
+ * Read/write
+ * Default value: 0x00
+ * 7:0 REFL7-0: Lower part of the reference pressure value that
+ * is sum to the sensor output pressure.
+ */
+#define LPS22HB_REF_P_XL_REG (uint8_t)0x15
+
+/**
+ * @brief Reference Pressure Register (Middle data)
+ * Read/write
+ * Default value: 0x00
+ * 7:0 REFL15-8: Middle part of the reference pressure value that
+ * is sum to the sensor output pressure.
+ */
+#define LPS22HB_REF_P_L_REG (uint8_t)0x16
+
+/**
+ * @brief Reference Pressure Register (MSB data)
+ * Read/write
+ * Default value: 0x00
+ * 7:0 REFL23-16 Higest part of the reference pressure value that
+ * is sum to the sensor output pressure.
+ */
+#define LPS22HB_REF_P_H_REG (uint8_t)0x17
+
+/**
+ * @brief Pressure and temperature resolution mode Register
+ * Read/write
+ * Default value: 0x05
+ * 7:2 These bits must be set to 0 for proper operation of the device
+ * 1: Reserved
+ * 0 LC_EN: Low Current Mode Enable. Default 0
+ */
+#define LPS22HB_RES_CONF_REG (uint8_t)0x1A
+#define LPS22HB_LCEN_MASK (uint8_t)0x01
+
+/**
+ * @brief Control Register 1
+ * Read/write
+ * Default value: 0x00
+ * 7: This bit must be set to 0 for proper operation of the device
+ * 6:4 ODR2, ODR1, ODR0: output data rate selection.Default 000
+ * ODR2 | ODR1 | ODR0 | Pressure output data-rate(Hz) | Pressure output data-rate(Hz)
+ * ----------------------------------------------------------------------------------
+ * 0 | 0 | 0 | one shot | one shot
+ * 0 | 0 | 1 | 1 | 1
+ * 0 | 1 | 0 | 10 | 10
+ * 0 | 1 | 1 | 25 | 25
+ * 1 | 0 | 0 | 50 | 50
+ * 1 | 0 | 1 | 75 | 75
+ * 1 | 1 | 0 | Reserved | Reserved
+ * 1 | 1 | 1 | Reserved | Reserved
+ *
+ * 3 EN_LPFP: Enable Low Pass filter on Pressure data. Default value:0
+ * 2:LPF_CFG Low-pass configuration register. (0: Filter cutoff is ODR/9; 1: filter cutoff is ODR/20)
+ * 1 BDU: block data update. 0 - continuous update; 1 - output registers not updated until MSB and LSB reading.
+ * 0 SIM: SPI Serial Interface Mode selection. 0 - SPI 4-wire; 1 - SPI 3-wire
+ */
+#define LPS22HB_CTRL_REG1 (uint8_t)0x10
+
+#define LPS22HB_ODR_MASK (uint8_t)0x70
+#define LPS22HB_LPFP_MASK (uint8_t)0x08
+#define LPS22HB_LPFP_CUTOFF_MASK (uint8_t)0x04
+#define LPS22HB_BDU_MASK (uint8_t)0x02
+#define LPS22HB_SIM_MASK (uint8_t)0x01
+
+#define LPS22HB_LPFP_BIT LPS22HB_BIT(3)
+
+/**
+ * @brief Control Register 2
+ * Read/write
+ * Default value: 0x10
+ * 7 BOOT: Reboot memory content. 0: normal mode; 1: reboot memory content. Self-clearing upon completation
+ * 6 FIFO_EN: FIFO Enable. 0: disable; 1: enable
+ * 5 STOP_ON_FTH: Stop on FIFO Threshold FIFO Watermark level use. 0: disable; 1: enable
+ * 4 IF_ADD_INC: Register address automatically incrementeed during a multiple byte access with a serial interface (I2C or SPI).
+ * Default value 1.( 0: disable; 1: enable)
+ * 3 I2C DIS: Disable I2C interface 0: I2C Enabled; 1: I2C disabled
+ * 2 SWRESET: Software reset. 0: normal mode; 1: SW reset. Self-clearing upon completation
+ * 1 AUTO_ZERO: Autozero enable. 0: normal mode; 1: autozero enable.
+ * 0 ONE_SHOT: One shot enable. 0: waiting for start of conversion; 1: start for a new dataset
+ */
+#define LPS22HB_CTRL_REG2 (uint8_t)0x11
+
+#define LPS22HB_BOOT_BIT LPS22HB_BIT(7)
+#define LPS22HB_FIFO_EN_BIT LPS22HB_BIT(6)
+#define LPS22HB_WTM_EN_BIT LPS22HB_BIT(5)
+#define LPS22HB_ADD_INC_BIT LPS22HB_BIT(4)
+#define LPS22HB_I2C_BIT LPS22HB_BIT(3)
+#define LPS22HB_SW_RESET_BIT LPS22HB_BIT(2)
+
+#define LPS22HB_FIFO_EN_MASK (uint8_t)0x40
+#define LPS22HB_WTM_EN_MASK (uint8_t)0x20
+#define LPS22HB_ADD_INC_MASK (uint8_t)0x10
+#define LPS22HB_I2C_MASK (uint8_t)0x08
+#define LPS22HB_ONE_SHOT_MASK (uint8_t)0x01
+
+
+/**
+ * @brief CTRL Reg3 Interrupt Control Register
+ * Read/write
+ * Default value: 0x00
+ * 7 INT_H_L: Interrupt active high, low. 0:active high; 1: active low.
+ * 6 PP_OD: Push-Pull/OpenDrain selection on interrupt pads. 0: Push-pull; 1: open drain.
+ * 5 F_FSS5: FIFO full flag on INT_DRDY pin. Defaul value: 0. (0: Diasable; 1 : Enable).
+ * 4 F_FTH: FIFO threshold (watermark) status on INT_DRDY pin. Defaul value: 0. (0: Diasable; 1 : Enable).
+ * 3 F_OVR: FIFO overrun interrupt on INT_DRDY pin. Defaul value: 0. (0: Diasable; 1 : Enable).
+ * 2 DRDY: Data-ready signal on INT_DRDY pin. Defaul value: 0. (0: Diasable; 1 : Enable).
+ * 1:0 INT_S2, INT_S1: data signal on INT pad control bits.
+ * INT_S2 | INT_S1 | INT pin
+ * ------------------------------------------------------
+ * 0 | 0 | Data signal( in order of priority:PTH_DRDY or F_FTH or F_OVR_or F_FSS5
+ * 0 | 1 | Pressure high (P_high)
+ * 1 | 0 | Pressure low (P_low)
+ * 1 | 1 | P_low OR P_high
+ */
+#define LPS22HB_CTRL_REG3 (uint8_t)0x12
+
+#define LPS22HB_PP_OD_BIT LPS22HB_BIT(6)
+#define LPS22HB_FIFO_FULL_BIT LPS22HB_BIT(5)
+#define LPS22HB_FIFO_FTH_BIT LPS22HB_BIT(4)
+#define LPS22HB_FIFO_OVR_BIT LPS22HB_BIT(3)
+#define LPS22HB_DRDY_BIT LPS22HB_BIT(2)
+
+
+#define LPS22HB_INT_H_L_MASK (uint8_t)0x80
+#define LPS22HB_PP_OD_MASK (uint8_t)0x40
+#define LPS22HB_FIFO_FULL_MASK (uint8_t)0x20
+#define LPS22HB_FIFO_FTH_MASK (uint8_t)0x10
+#define LPS22HB_FIFO_OVR_MASK (uint8_t)0x08
+#define LPS22HB_DRDY_MASK (uint8_t)0x04
+#define LPS22HB_INT_S12_MASK (uint8_t)0x03
+
+
+/**
+ * @brief Interrupt Differential configuration Register
+ * Read/write
+ * Default value: 0x00.
+ * 7 AUTORIFP: AutoRifP Enable
+ * 6 RESET_ARP: Reset AutoRifP function
+ * 4 AUTOZERO: Autozero enabled
+ * 5 RESET_AZ: Reset Autozero Function
+ * 3 DIFF_EN: Interrupt generation enable
+ * 2 LIR: Latch Interrupt request into INT_SOURCE register. 0 - interrupt request not latched
+ * 1 - interrupt request latched
+ * 1 PL_E: Enable interrupt generation on differential pressure low event. 0 - disable; 1 - enable
+ * 0 PH_E: Enable interrupt generation on differential pressure high event. 0 - disable; 1 - enable
+ */
+#define LPS22HB_INTERRUPT_CFG_REG (uint8_t)0x0B
+
+#define LPS22HB_DIFF_EN_BIT LPS22HB_BIT(3)
+#define LPS22HB_LIR_BIT LPS22HB_BIT(2)
+#define LPS22HB_PLE_BIT LPS22HB_BIT(1)
+#define LPS22HB_PHE_BIT LPS22HB_BIT(0)
+
+#define LPS22HB_AUTORIFP_MASK (uint8_t)0x80
+#define LPS22HB_RESET_ARP_MASK (uint8_t)0x40
+#define LPS22HB_AUTOZERO_MASK (uint8_t)0x20
+#define LPS22HB_RESET_AZ_MASK (uint8_t)0x10
+#define LPS22HB_DIFF_EN_MASK (uint8_t)0x08
+#define LPS22HB_LIR_MASK (uint8_t)0x04
+#define LPS22HB_PLE_MASK (uint8_t)0x02
+#define LPS22HB_PHE_MASK (uint8_t)0x01
+
+
+
+/**
+ * @brief Interrupt source Register (It is cleared by reading it)
+ * Read
+ * 7 BOOT_STATUS: If 1 indicates that the Boot (Reboot) phase is running.
+ * 6:3 Reserved: Keep these bits at 0
+ * 2 IA: Interrupt Active.0: no interrupt has been generated
+ * 1: one or more interrupt events have been generated.
+ * 1 PL: Differential pressure Low. 0: no interrupt has been generated
+ * 1: Low differential pressure event has occurred.
+ * 0 PH: Differential pressure High. 0: no interrupt has been generated
+ * 1: High differential pressure event has occurred.
+ */
+#define LPS22HB_INTERRUPT_SOURCE_REG (uint8_t)0x25
+
+#define LPS22HB_BOOT_STATUS_BIT LPS22HB_BIT(7)
+#define LPS22HB_IA_BIT LPS22HB_BIT(2)
+#define LPS22HB_PL_BIT LPS22HB_BIT(1)
+#define LPS22HB_PH_BIT LPS22HB_BIT(0)
+
+#define LPS22HB_BOOT_STATUS_MASK (uint8_t)0x80
+#define LPS22HB_IA_MASK (uint8_t)0x04
+#define LPS22HB_PL_MASK (uint8_t)0x02
+#define LPS22HB_PH_MASK (uint8_t)0x01
+
+
+/**
+ * @brief Status Register
+ * Read
+ * 7:6 Reserved: 0
+ * 5 T_OR: Temperature data overrun. 0: no overrun has occurred
+ * 1: a new data for temperature has overwritten the previous one.
+ * 4 P_OR: Pressure data overrun. 0: no overrun has occurred
+ * 1: new data for pressure has overwritten the previous one.
+ * 3:2 Reserved: 0
+ * 1 T_DA: Temperature data available. 0: new data for temperature is not yet available
+ * 1: new data for temperature is available.
+ * 0 P_DA: Pressure data available. 0: new data for pressure is not yet available
+ * 1: new data for pressure is available.
+ */
+#define LPS22HB_STATUS_REG (uint8_t)0x27
+
+#define LPS22HB_TOR_BIT LPS22HB_BIT(5)
+#define LPS22HB_POR_BIT LPS22HB_BIT(4)
+#define LPS22HB_TDA_BIT LPS22HB_BIT(1)
+#define LPS22HB_PDA_BIT LPS22HB_BIT(0)
+
+#define LPS22HB_TOR_MASK (uint8_t)0x20
+#define LPS22HB_POR_MASK (uint8_t)0x10
+#define LPS22HB_TDA_MASK (uint8_t)0x02
+#define LPS22HB_PDA_MASK (uint8_t)0x01
+
+
+/**
+ * @brief Pressure data (LSB) register.
+ * Read
+ * Default value: 0x00.(To be verified)
+ * POUT7 - POUT0: Pressure data LSB (2's complement).
+ * Pressure output data: Pout(hPA)=(PRESS_OUT_H & PRESS_OUT_L &
+ * PRESS_OUT_XL)[dec]/4096.
+ */
+#define LPS22HB_PRESS_OUT_XL_REG (uint8_t)0x28
+
+/**
+* @brief Pressure data (Middle part) register.
+* Read
+* Default value: 0x80.
+* POUT15 - POUT8: Pressure data middle part (2's complement).
+* Pressure output data: Pout(hPA)=(PRESS_OUT_H & PRESS_OUT_L &
+* PRESS_OUT_XL)[dec]/4096.
+*/
+#define LPS22HB_PRESS_OUT_L_REG (uint8_t)0x29
+
+/**
+ * @brief Pressure data (MSB) register.
+ * Read
+ * Default value: 0x2F.
+ * POUT23 - POUT16: Pressure data MSB (2's complement).
+ * Pressure output data: Pout(hPA)=(PRESS_OUT_H & PRESS_OUT_L &
+ * PRESS_OUT_XL)[dec]/4096.
+ */
+#define LPS22HB_PRESS_OUT_H_REG (uint8_t)0x2A
+
+/**
+ * @brief Temperature data (LSB) register.
+ * Read
+ * Default value: 0x00.
+ * TOUT7 - TOUT0: temperature data LSB.
+ * Tout(degC)=TEMP_OUT/100
+ */
+#define LPS22HB_TEMP_OUT_L_REG (uint8_t)0x2B
+
+/**
+ * @brief Temperature data (MSB) register.
+ * Read
+ * Default value: 0x00.
+ * TOUT15 - TOUT8: temperature data MSB.
+ * Tout(degC)=TEMP_OUT/100
+ */
+#define LPS22HBH_TEMP_OUT_H_REG (uint8_t)0x2C
+
+/**
+ * @brief Threshold pressure (LSB) register.
+ * Read/write
+ * Default value: 0x00.
+ * 7:0 THS7-THS0: LSB Threshold pressure Low part of threshold value for pressure interrupt
+ * generation. The complete threshold value is given by THS_P_H & THS_P_L and is
+ * expressed as unsigned number. P_ths(hPA)=(THS_P_H & THS_P_L)[dec]/16.
+ */
+#define LPS22HB_THS_P_LOW_REG (uint8_t)0x0C
+
+/**
+ * @brief Threshold pressure (MSB)
+ * Read/write
+ * Default value: 0x00.
+ * 7:0 THS15-THS8: MSB Threshold pressure. High part of threshold value for pressure interrupt
+ * generation. The complete threshold value is given by THS_P_H & THS_P_L and is
+ * expressed as unsigned number. P_ths(mbar)=(THS_P_H & THS_P_L)[dec]/16.
+ */
+#define LPS22HB_THS_P_HIGH_REG (uint8_t)0x0D
+
+/**
+ * @brief FIFO control register
+ * Read/write
+ * Default value: 0x00
+ * 7:5 F_MODE2, F_MODE1, F_MODE0: FIFO mode selection.
+ * FM2 | FM1 | FM0 | FIFO MODE
+ * ---------------------------------------------------
+ * 0 | 0 | 0 | BYPASS MODE
+ * 0 | 0 | 1 | FIFO MODE. Stops collecting data when full
+ * 0 | 1 | 0 | STREAM MODE: Keep the newest measurements in the FIFO
+ * 0 | 1 | 1 | STREAM MODE until trigger deasserted, then change to FIFO MODE
+ * 1 | 0 | 0 | BYPASS MODE until trigger deasserted, then STREAM MODE
+ * 1 | 0 | 1 | Reserved for future use
+ * 1 | 1 | 0 | Reserved
+ * 1 | 1 | 1 | BYPASS mode until trigger deasserted, then FIFO MODE
+ *
+ * 4:0 WTM_POINT4-0 : FIFO Watermark level selection (0-31)
+ */
+#define LPS22HB_CTRL_FIFO_REG (uint8_t)0x14
+
+#define LPS22HB_FIFO_MODE_MASK (uint8_t)0xE0
+#define LPS22HB_WTM_POINT_MASK (uint8_t)0x1F
+
+
+/**
+ * @brief FIFO Status register
+ * Read
+ * 7 FTH_FIFO: FIFO threshold status. 0:FIFO filling is lower than FTH level
+ * 1: FIFO is equal or higher than FTH level.
+ * 6 OVR: Overrun bit status. 0 - FIFO not full
+ * 1 - FIFO is full and at least one sample in the FIFO has been overwritten.
+ * 5:0 FSS: FIFO Stored data level. 000000: FIFO empty, 100000: FIFO is full and has 32 unread samples.
+ */
+#define LPS22HB_STATUS_FIFO_REG (uint8_t)0x26
+
+#define LPS22HB_FTH_FIFO_BIT LPS22HB_BIT(7)
+#define LPS22HB_OVR_FIFO_BIT LPS22HB_BIT(6)
+
+#define LPS22HB_FTH_FIFO_MASK (uint8_t)0x80
+#define LPS22HB_OVR_FIFO_MASK (uint8_t)0x40
+#define LPS22HB_LEVEL_FIFO_MASK (uint8_t)0x3F
+#define LPS22HB_FIFO_EMPTY (uint8_t)0x00
+#define LPS22HB_FIFO_FULL (uint8_t)0x20
+
+
+
+/**
+ * @brief Pressure offset register (LSB)
+ * Read/write
+ * Default value: 0x00
+ * 7:0 RPDS7-0:Pressure Offset for 1 point calibration (OPC) after soldering.
+ * This register contains the low part of the pressure offset value after soldering,for
+ * differential pressure computing. The complete value is given by RPDS_L & RPDS_H
+ * and is expressed as signed 2 complement value.
+ */
+#define LPS22HB_RPDS_L_REG (uint8_t)0x18
+
+/**
+ * @brief Pressure offset register (MSB)
+ * Read/write
+ * Default value: 0x00
+ * 7:0 RPDS15-8:Pressure Offset for 1 point calibration (OPC) after soldering.
+ * This register contains the high part of the pressure offset value after soldering (see description RPDS_L)
+ */
+#define LPS22HB_RPDS_H_REG (uint8_t)0x19
+
+
+/**
+ * @brief Clock Tree Configuration register
+ * Read/write
+ * Default value: 0x00
+ * 7:6 Reserved.
+ * 5: CTE: Clock Tree Enhancement
+ */
+#define LPS22HB_CLOCK_TREE_CONFIGURATION (uint8_t)0x43
+#define LPS22HB_CTE_MASK (uint8_t)0x20
+
+/**
+* @}
+*/
+
+
+/** @defgroup LPS22HB_Pressure_Exported_Functions LPS22HB Pressure Exported Functions
+ * @{
+ */
+/* PRESSURE functions */
+void LPS22HB_P_Init(uint16_t DeviceAddr);
+uint8_t LPS22HB_P_ReadID(uint16_t DeviceAddr);
+float LPS22HB_P_ReadPressure(uint16_t DeviceAddr);
+/**
+ * @}
+ */
+
+/** @defgroup HTS221_PressImported_Globals PRESSURE Imported Globals
+ * @{
+ */
+/* PRESSURE driver structure */
+extern PSENSOR_DrvTypeDef LPS22HB_P_Drv;
+/**
+ * @}
+ */
+
+/** @defgroup LPS22HB_Temperature_Exported_Functions LPS22HB Temperature Exported Functions
+ * @{
+ */
+/* TEMPERATURE functions */
+void LPS22HB_T_Init(uint16_t DeviceAddr, TSENSOR_InitTypeDef *pInitStruct);
+float LPS22HB_T_ReadTemp(uint16_t DeviceAddr);
+/**
+ * @}
+ */
+
+/** @defgroup HTS221_TempImported_Globals Temperature Imported Globals
+ * @{
+ */
+/* Temperature driver structure */
+extern TSENSOR_DrvTypeDef LPS22HB_T_Drv;
+/**
+ * @}
+ */
+
+/** @defgroup LPS22HB_Imported_Functions LPS22HB Imported Functions
+ * @{
+ */
+/* IO functions */
+extern void SENSOR_IO_Init(void);
+extern void SENSOR_IO_Write(uint8_t Addr, uint8_t Reg, uint8_t Value);
+extern uint8_t SENSOR_IO_Read(uint8_t Addr, uint8_t Reg);
+extern uint16_t SENSOR_IO_ReadMultiple(uint8_t Addr, uint8_t Reg, uint8_t *Buffer, uint16_t Length);
+extern void SENSOR_IO_WriteMultiple(uint8_t Addr, uint8_t Reg, uint8_t *Buffer, uint16_t Length);
+
+/**
+ * @}
+ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __LPS22HB__H */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/P3_SETR2/Components/ls016b8uy/Release_Notes.html b/P3_SETR2/Components/ls016b8uy/Release_Notes.html
new file mode 100644
index 0000000..7a9fbd5
--- /dev/null
+++ b/P3_SETR2/Components/ls016b8uy/Release_Notes.html
@@ -0,0 +1,65 @@
+
+
+
+
+
+
+ Release Notes for LS016B8UY Component Drivers
+
+
+
+
+
+
+
+
+
+
+Release Notes for LS016B8UY Component Drivers
+Copyright © 2016 STMicroelectronics
+
+
+
+
+
+
License
+
Licensed by ST under BSD 3-Clause license (the "License"). You may not use this package except in compliance with the License. You may obtain a copy of the License at:
+
https://opensource.org/licenses/BSD-3-Clause
+
Purpose
+
This directory contains the LS016B8UY component drivers.
+
+
+
Update History
+
+
V1.0.1 / 03-April-2019
+
+
Main Changes
+
+Update release notes format
+Reformat the BSD 3-Clause license declaration in the files header (replace license terms by a web reference to OSI website where those terms lie)
+
+
+
+
+
V1.0.0 / 10-May-2016
+
+
Main Changes
+
+First official release
+
+
+
+
+
+
+
+
diff --git a/P3_SETR2/Components/ls016b8uy/ls016b8uy.c b/P3_SETR2/Components/ls016b8uy/ls016b8uy.c
new file mode 100644
index 0000000..021b641
--- /dev/null
+++ b/P3_SETR2/Components/ls016b8uy/ls016b8uy.c
@@ -0,0 +1,643 @@
+/**
+ ******************************************************************************
+ * @file ls016b8uy.c
+ * @author MCD Application Team
+ * @brief This file includes the LCD driver for LS016B8UY LCD.
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2016 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/* Includes ------------------------------------------------------------------*/
+#include "ls016b8uy.h"
+
+/** @addtogroup BSP
+ * @{
+ */
+
+/** @addtogroup Components
+ * @{
+ */
+
+/** @addtogroup ls016b8uy
+ * @brief This file provides a set of functions needed to drive the
+ * LS016B8UY LCD.
+ * @{
+ */
+
+/** @defgroup LS016B8UY_Private_TypesDefinitions
+ * @{
+ */
+typedef struct {
+ uint8_t red;
+ uint8_t green;
+ uint8_t blue;
+} LS016B8UY_Rgb888;
+
+/**
+ * @}
+ */
+
+/** @defgroup LS016B8UY_Private_Defines
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @defgroup LS016B8UY_Private_Macros
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @defgroup LS016B8UY_Private_Variables
+ * @{
+ */
+LCD_DrvTypeDef ls016b8uy_drv =
+{
+ ls016b8uy_Init,
+ ls016b8uy_ReadID,
+ ls016b8uy_DisplayOn,
+ ls016b8uy_DisplayOff,
+ ls016b8uy_SetCursor,
+ ls016b8uy_WritePixel,
+ ls016b8uy_ReadPixel,
+ ls016b8uy_SetDisplayWindow,
+ ls016b8uy_DrawHLine,
+ ls016b8uy_DrawVLine,
+ ls016b8uy_GetLcdPixelWidth,
+ ls016b8uy_GetLcdPixelHeight,
+ ls016b8uy_DrawBitmap,
+ ls016b8uy_DrawRGBImage,
+};
+
+static uint16_t WindowsXstart = 0;
+static uint16_t WindowsYstart = 0;
+static uint16_t WindowsXend = LS016B8UY_LCD_PIXEL_WIDTH-1;
+static uint16_t WindowsYend = LS016B8UY_LCD_PIXEL_HEIGHT-1;
+/**
+ * @}
+ */
+
+/** @defgroup LS016B8UY_Private_FunctionPrototypes
+ * @{
+ */
+static LS016B8UY_Rgb888 ls016b8uy_ReadPixel_rgb888(uint16_t Xpos, uint16_t Ypos);
+static void ls016b8uy_DrawRGBHLine(uint16_t Xpos, uint16_t Ypos, uint16_t Xsize, uint8_t *pdata);
+
+/**
+ * @}
+ */
+
+/** @defgroup LS016B8UY_Private_Functions
+ * @{
+ */
+
+/**
+ * @brief Initialize the LS016B8UY LCD Component.
+ * @param None
+ * @retval None
+ */
+void ls016b8uy_Init(void)
+{
+ uint8_t parameter[4];
+
+ /* Initialize LS016B8UY low level bus layer ----------------------------------*/
+ LCD_IO_Init();
+
+ parameter[0] = 0x00; /* VSYNC output */
+ ls016b8uy_WriteReg(LCD_CMD_VSYNC_OUTPUT, parameter, 1);
+ parameter[0] = 0x06; /* 18 bits color mode */
+ ls016b8uy_WriteReg(LCD_CMD_COLOR_MODE, parameter, 1);
+ parameter[0] = 0x01; /* Panel setting command */
+ parameter[1] = 0xFE;
+ ls016b8uy_WriteReg(LCD_CMD_PANEL_SETTING_1, parameter, 2);
+ parameter[0] = 0xDE; /* Panel setting command */
+ parameter[1] = 0x21;
+ ls016b8uy_WriteReg(LCD_CMD_PANEL_SETTING_2, parameter, 2);
+ parameter[0] = 0x05; /* V-Porch setting */
+ parameter[1] = 0x33;
+ ls016b8uy_WriteReg(LCD_CMD_PANEL_V_PORCH, parameter, 2);
+ parameter[0] = 0x05; /* Idle mode V-Porch setting */
+ parameter[1] = 0x33;
+ ls016b8uy_WriteReg(LCD_CMD_PANEL_IDLE_V_PORCH, parameter, 2);
+ parameter[0] = 0x04; /* panel timing setting */
+ parameter[1] = 0x03;
+ ls016b8uy_WriteReg(LCD_CMD_PANEL_TIMING_1, parameter, 2);
+ parameter[0] = 0x5E; /* panel timing setting */
+ parameter[1] = 0x08;
+ ls016b8uy_WriteReg(LCD_CMD_PANEL_TIMING_2, parameter, 2);
+ parameter[0] = 0x0A; /* panel timing setting */
+ parameter[1] = 0x0C;
+ parameter[2] = 0x02;
+ ls016b8uy_WriteReg(LCD_CMD_PANEL_TIMING_3, parameter, 3);
+ parameter[0] = 0x03; /* panel timing setting */
+ parameter[1] = 0x04;
+ ls016b8uy_WriteReg(LCD_CMD_PANEL_TIMING_4, parameter, 2);
+ parameter[0] = 0x0C; /* panel power setting */
+ ls016b8uy_WriteReg(LCD_CMD_PANEL_POWER, parameter, 1);
+ parameter[0] = 0x02; /* Oscillator Setting = 2MHz */
+ ls016b8uy_WriteReg(LCD_CMD_OSCILLATOR, parameter, 1);
+ parameter[0] = 0x53; /* GVDD = 4.76V setting */
+ ls016b8uy_WriteReg(LCD_CMD_GVDD, parameter, 1);
+ parameter[0] = 0x00; /* Reload MTP After SLPOUT */
+ parameter[1] = 0x45; /* VCOMH=3.76V */
+ ls016b8uy_WriteReg(LCD_CMD_RELOAD_MTP_VCOMH, parameter, 2);
+ parameter[0] = 0x03; /* OP-Amp Ability. (Normal) */
+ parameter[1] = 0x12; /* Step-up Cycle for AVDD Booster Freq./4 */
+ ls016b8uy_WriteReg(LCD_CMD_OPAMP, parameter, 2);
+ parameter[0] = 0x00; /* Tearing Effect Option (00h:VSYNC Interface OFF, 01h:VSYNC Interface ON) */
+ ls016b8uy_WriteReg(LCD_CMD_TEARING_EFFECT, parameter, 1);
+ ls016b8uy_WriteReg(LCD_CMD_PANEL_SETTING_LOCK, parameter, 0); /* Panel setting command */
+ ls016b8uy_WriteReg(LCD_CMD_SLEEP_OUT, parameter, 0); /* Sleep Out Command */
+ LCD_IO_Delay(150); /* Wait for 150ms */
+
+ parameter[0] = 0x00; /* CASET */
+ parameter[1] = 0x1E;
+ parameter[2] = 0x00;
+ parameter[3] = 0xD1;
+ ls016b8uy_WriteReg(LCD_CMD_CASET, parameter, 4);
+ parameter[0] = 0x00; /* RASET */
+ parameter[1] = 0x00;
+ parameter[2] = 0x00;
+ parameter[3] = 0xB3;
+ ls016b8uy_WriteReg(LCD_CMD_RASET, parameter, 4);
+ parameter[0] = 0x83; /* Normal display for Driver Down side */
+ ls016b8uy_WriteReg(LCD_CMD_NORMAL_DISPLAY, parameter, 1);
+
+ ls016b8uy_DisplayOn(); /* Display ON command */
+
+}
+
+/**
+ * @brief Enables the Display.
+ * @param None
+ * @retval None
+ */
+void ls016b8uy_DisplayOn(void)
+{
+ ls016b8uy_WriteReg(LCD_CMD_DISPLAY_ON, (uint8_t*)NULL, 0); /* Display ON command */
+ ls016b8uy_WriteReg(LCD_CMD_IDLE_MODE_OFF, (uint8_t*)NULL, 0); /* Idle mode OFF command */
+}
+
+/**
+ * @brief Disables the Display.
+ * @param None
+ * @retval None
+ */
+void ls016b8uy_DisplayOff(void)
+{
+ ls016b8uy_WriteReg(LCD_CMD_DISPLAY_OFF, (uint8_t*)NULL, 0); /* Display OFF command */
+ LCD_IO_Delay(20); /* Wait for 20ms */
+ ls016b8uy_WriteReg(LCD_CMD_SLEEP_IN, (uint8_t*)NULL, 0); /* Sleep In Command */
+ LCD_IO_Delay(150); /* Wait for 150ms */
+}
+
+/**
+ * @brief Get the LCD pixel Width.
+ * @param None
+ * @retval The Lcd Pixel Width
+ */
+uint16_t ls016b8uy_GetLcdPixelWidth(void)
+{
+ return (uint16_t)LS016B8UY_LCD_PIXEL_WIDTH;
+}
+
+/**
+ * @brief Get the LCD pixel Height.
+ * @param None
+ * @retval The Lcd Pixel Height
+ */
+uint16_t ls016b8uy_GetLcdPixelHeight(void)
+{
+ return (uint16_t)LS016B8UY_LCD_PIXEL_HEIGHT;
+}
+
+/**
+ * @brief Get the LS016B8UY ID.
+ * @param None
+ * @retval The LS016B8UY ID
+ */
+uint16_t ls016b8uy_ReadID(void)
+{
+ LCD_IO_Init();
+ /* TODO : LCD read ID command not known for now, so assumption that the connected LCD is LS016B8UY */
+ return (LS016B8UY_ID);
+}
+
+/**
+ * @brief Set Cursor position.
+ * @param Xpos: specifies the X position.
+ * @param Ypos: specifies the Y position.
+ * @retval None
+ */
+void ls016b8uy_SetCursor(uint16_t Xpos, uint16_t Ypos)
+{
+ uint8_t parameter[4];
+
+ parameter[0] = 0x00; /* CASET */
+ parameter[1] = 0x1E + Xpos;
+ parameter[2] = 0x00;
+ parameter[3] = 0xD1 + Xpos;
+ ls016b8uy_WriteReg(LCD_CMD_CASET, parameter, 4);
+ parameter[0] = 0x00; /* RASET */
+ parameter[1] = 0x00 + Ypos;
+ parameter[2] = 0x00;
+ parameter[3] = 0xB3 + Ypos;
+ ls016b8uy_WriteReg(LCD_CMD_RASET, parameter, 4);
+}
+
+/**
+ * @brief Write pixel.
+ * @param Xpos: specifies the X position.
+ * @param Ypos: specifies the Y position.
+ * @param RGBCode: the RGB pixel color in RGB565 format
+ * @retval None
+ */
+void ls016b8uy_WritePixel(uint16_t Xpos, uint16_t Ypos, uint16_t RGBCode)
+{
+ uint16_t r, g, b;
+ uint16_t rgb888_part1, rgb888_part2;
+
+ r = (RGBCode & 0xF800) >> 11; /* Extract red component from RGB565 pixel data */
+ g = (RGBCode & 0x07E0) >> 5; /* Extract green component from RGB565 pixel data */
+ b = (RGBCode & 0x001F) >> 0; /* Extract blue component from RGB565 pixel data */
+
+ /* Prepare data to write with new pixel components and read old pixel component */
+ rgb888_part1 = (r << 11) + (g << 2);
+ rgb888_part2 = (b << 11);
+
+ /* Set Cursor */
+ ls016b8uy_SetCursor(Xpos, Ypos);
+
+ /* Prepare to write to LCD RAM */
+ ls016b8uy_WriteReg(LCD_CMD_WRITE_RAM, (uint8_t*)NULL, 0); /* RAM write data command */
+
+ /* Write RAM data */
+ LCD_IO_WriteData(rgb888_part1);
+ LCD_IO_WriteData(rgb888_part2);
+}
+
+/**
+ * @brief Read pixel.
+ * @param Xpos: specifies the X position.
+ * @param Ypos: specifies the Y position.
+ * @retval The RGB pixel color in RGB565 format
+ */
+uint16_t ls016b8uy_ReadPixel(uint16_t Xpos, uint16_t Ypos)
+{
+ LS016B8UY_Rgb888 rgb888;
+ uint8_t r, g, b;
+ uint16_t rgb565;
+
+ /* Set Cursor */
+ ls016b8uy_SetCursor(Xpos, Ypos);
+
+ /* Read RGB888 data from LCD RAM */
+ rgb888 = ls016b8uy_ReadPixel_rgb888(Xpos, Ypos);
+
+ /* Convert RGB888 to RGB565 */
+ r = ((rgb888.red & 0xF8) >> 3); /* Extract the red component 5 most significant bits */
+ g = ((rgb888.green & 0xFC) >> 2); /* Extract the green component 6 most significant bits */
+ b = ((rgb888.blue & 0xF8) >> 3); /* Extract the blue component 5 most significant bits */
+
+ rgb565 = ((uint16_t)(r) << 11) + ((uint16_t)(g) << 5) + ((uint16_t)(b) << 0);
+
+ return (rgb565);
+}
+
+/**
+ * @brief Writes to the selected LCD register.
+ * @param Command: command value (or register address as named in LS016B8UY doc).
+ * @param Parameters: pointer on parameters value (if command uses one or several parameters).
+ * @param NbParameters: number of command parameters (0 if no parameter)
+ * @retval None
+ */
+void ls016b8uy_WriteReg(uint8_t Command, uint8_t *Parameters, uint8_t NbParameters)
+{
+ uint8_t i;
+
+ /* Send command */
+ LCD_IO_WriteReg(Command);
+
+ /* Send command's parameters if any */
+ for (i=0; i> 11; /* Extract red component from RGB565 pixel data */
+ g = (RGBCode & 0x07E0) >> 5; /* Extract green component from RGB565 pixel data */
+ b = (RGBCode & 0x001F) >> 0; /* Extract blue component from RGB565 pixel data */
+
+ rgb888_part1 = (r << 11) + (g << 2); /* Build pattern first part to write in LCD RAM */
+ rgb888_part2 = (b << 11) + (r << 3); /* Build pattern second part to write in LCD RAM */
+ rgb888_part3 = (g << 10) + (b << 3); /* Build pattern third part to write in LCD RAM */
+
+ /* Set Cursor */
+ ls016b8uy_SetCursor(Xpos, Ypos);
+
+ /* Prepare to write to LCD RAM */
+ ls016b8uy_WriteReg(LCD_CMD_WRITE_RAM, (uint8_t*)NULL, 0); /* RAM write data command */
+
+ /* Sent a complete line */
+ for(counter = 0; counter < Length; counter+=2)
+ {
+ /* Write 2 pixels at a time by performing 3 access (pixels coded on 24 bits in LCD RAM whereas access are coded on 16 bits) */
+ LCD_IO_WriteData(rgb888_part1);
+ LCD_IO_WriteData(rgb888_part2);
+ if (counter != (Length-1)) /* When writing last pixel when Length is odd, the third part is not written */
+ {
+ LCD_IO_WriteData(rgb888_part3);
+ }
+ }
+}
+
+/**
+ * @brief Draw vertical line.
+ * @param RGBCode: Specifies the RGB color
+ * @param Xpos: specifies the X position.
+ * @param Ypos: specifies the Y position.
+ * @param Length: specifies the Line length.
+ * @retval None
+ */
+void ls016b8uy_DrawVLine(uint16_t RGBCode, uint16_t Xpos, uint16_t Ypos, uint16_t Length)
+{
+ uint16_t counter = 0;
+
+ /* Set Cursor */
+ ls016b8uy_SetCursor(Xpos, Ypos);
+
+ /* Prepare to write to LCD RAM */
+ ls016b8uy_WriteReg(LCD_CMD_WRITE_RAM, (uint8_t*)NULL, 0); /* RAM write data command */
+
+ /* Fill a complete vertical line */
+ for(counter = 0; counter < Length; counter++)
+ {
+ ls016b8uy_WritePixel(Xpos, Ypos + counter, RGBCode);
+ }
+}
+
+/**
+ * @brief Displays a bitmap picture.
+ * @param BmpAddress: Bmp picture address.
+ * @param Xpos: Bmp X position in the LCD
+ * @param Ypos: Bmp Y position in the LCD
+ * @retval None
+ */
+void ls016b8uy_DrawBitmap(uint16_t Xpos, uint16_t Ypos, uint8_t *pbmp)
+{
+ uint32_t index = 0, size = 0;
+ uint32_t posY;
+ uint32_t nb_line = 0;
+ uint16_t Xsize = WindowsXend - WindowsXstart + 1;
+ uint16_t Ysize = WindowsYend - WindowsYstart + 1;
+
+ /* Read bitmap size */
+ size = *(volatile uint16_t *) (pbmp + 2);
+ size |= (*(volatile uint16_t *) (pbmp + 4)) << 16;
+ /* Get bitmap data address offset */
+ index = *(volatile uint16_t *) (pbmp + 10);
+ index |= (*(volatile uint16_t *) (pbmp + 12)) << 16;
+ size = (size - index)/2;
+ pbmp += index;
+
+ for (posY = (Ypos + Ysize); posY > Ypos; posY--) /* In BMP files the line order is inverted */
+ {
+ /* Set Cursor */
+ ls016b8uy_SetCursor(Xpos, posY - 1);
+
+ /* Draw one line of the picture */
+ ls016b8uy_DrawRGBHLine(Xpos, posY - 1, Xsize, (pbmp + (nb_line * Xsize * 2)));
+ nb_line++;
+ }
+}
+
+/**
+ * @brief Displays picture.
+ * @param pdata: picture address.
+ * @param Xpos: Image X position in the LCD
+ * @param Ypos: Image Y position in the LCD
+ * @param Xsize: Image X size in the LCD
+ * @param Ysize: Image Y size in the LCD
+ * @retval None
+ */
+void ls016b8uy_DrawRGBImage(uint16_t Xpos, uint16_t Ypos, uint16_t Xsize, uint16_t Ysize, uint8_t *pdata)
+{
+ uint32_t posY;
+ uint32_t nb_line = 0;
+
+ for (posY = Ypos; posY < (Ypos + Ysize); posY ++)
+ {
+ /* Set Cursor */
+ ls016b8uy_SetCursor(Xpos, posY);
+
+ /* Draw one line of the picture */
+ ls016b8uy_DrawRGBHLine(Xpos, posY, Xsize, (pdata + (nb_line * Xsize * 2)));
+ nb_line++;
+ }
+}
+
+/******************************************************************************
+ Static Functions
+*******************************************************************************/
+
+/**
+ * @brief Read pixel from LCD RAM in RGB888 format
+ * @param Xpos: specifies the X position.
+ * @param Ypos: specifies the Y position.
+ * @retval Each RGB pixel color components in a structure
+ */
+static LS016B8UY_Rgb888 ls016b8uy_ReadPixel_rgb888(uint16_t Xpos, uint16_t Ypos)
+{
+ LS016B8UY_Rgb888 rgb888;
+ uint16_t rgb888_part1, rgb888_part2;
+
+ /* In LCD RAM, pixels are 24 bits packed and read with 16 bits access
+ * Here is the pixels components arrangement in memory :
+ * bits: 15 14 13 12 11 10 09 08 | 07 06 05 04 03 02 01 00
+ * address 0 : red pixel 0 X X | green pixel 0 X X
+ * address 1 : blue pixel 0 X X | red pixel 1 X X
+ * address 2 : green pixel 1 X X | blue pixel 1 X X
+ */
+
+ /* Set Cursor */
+ ls016b8uy_SetCursor(Xpos, Ypos);
+ /* Prepare to read LCD RAM */
+ ls016b8uy_WriteReg(LCD_CMD_READ_RAM, (uint8_t*)NULL, 0); /* RAM read data command */
+ /* Dummy read */
+ LCD_IO_ReadData();
+ /* Read first part of the RGB888 data */
+ rgb888_part1 = LCD_IO_ReadData();
+ /* Read first part of the RGB888 data */
+ rgb888_part2 = LCD_IO_ReadData();
+
+ /* red component */
+ rgb888.red = (rgb888_part1 & 0xFC00) >> 8;
+ /* green component */
+ rgb888.green = (rgb888_part1 & 0x00FC) >> 0;
+ /* blue component */
+ rgb888.blue = (rgb888_part2 & 0xFC00) >> 8;
+
+ return rgb888;
+}
+
+/**
+ * @brief Displays a single picture line.
+ * @param pdata: picture address.
+ * @param Xpos: Image X position in the LCD
+ * @param Ypos: Image Y position in the LCD
+ * @param Xsize: Image X size in the LCD
+ * @retval None
+ */
+static void ls016b8uy_DrawRGBHLine(uint16_t Xpos, uint16_t Ypos, uint16_t Xsize, uint8_t *pdata)
+{
+ uint32_t i = 0;
+ uint32_t posX;
+ uint16_t r, g, b;
+ uint16_t rgb888_part;
+ uint16_t *rgb565 = (uint16_t*)pdata;
+
+ /* Prepare to write to LCD RAM */
+ ls016b8uy_WriteReg(LCD_CMD_WRITE_RAM, (uint8_t*)NULL, 0); /* RAM write data command */
+
+ for (posX = Xpos; posX < (Xsize + Xpos); posX += 2)
+ {
+ if ((posX >= WindowsXstart) && (Ypos >= WindowsYstart) && /* Check we are in the defined window */
+ (posX <= WindowsXend) && (Ypos <= WindowsYend))
+ {
+ /* Write pixels in LCD RAM after RGB565 -> RGB888 conversion */
+ /* As data in LCD RAM are 24bits packed, three 16 bits writes access are needed to transmit 2 pixels data */
+
+ r = (rgb565[i] & 0xF800) >> 11; /* Extract red component from first RGB565 pixel data */
+ g = (rgb565[i] & 0x07E0) >> 5; /* Extract green component from first RGB565 pixel data */
+ rgb888_part = (r << 11) + (g << 2); /* Build data to be written in LCD RAM */
+ LCD_IO_WriteData(rgb888_part);
+
+ b = (rgb565[i] & 0x001F) >> 0; /* Extract blue component from first RGB565 pixel data */
+ r = (rgb565[i+1] & 0xF800) >> 11; /* Extract red component from second RGB565 pixel data */
+ rgb888_part = (b << 11) + (r << 3); /* Build data to be written in LCD RAM */
+ LCD_IO_WriteData(rgb888_part);
+
+ if (posX != (Xsize + Xpos - 1)) /* When writing last pixel when size is odd, the third part is not written */
+ {
+ g = (rgb565[i+1] & 0x07E0) >> 5; /* Extract green component from second RGB565 pixel data */
+ b = (rgb565[i+1] & 0x001F) >> 0; /* Extract blue component from second RGB565 pixel data */
+ rgb888_part = (g << 10) + (b << 3); /* Build data to be written in LCD RAM */
+ LCD_IO_WriteData(rgb888_part);
+ }
+
+ i += 2;
+ }
+ }
+}
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/P3_SETR2/Components/ls016b8uy/ls016b8uy.h b/P3_SETR2/Components/ls016b8uy/ls016b8uy.h
new file mode 100644
index 0000000..ee50b45
--- /dev/null
+++ b/P3_SETR2/Components/ls016b8uy/ls016b8uy.h
@@ -0,0 +1,161 @@
+/**
+ ******************************************************************************
+ * @file ls016b8uy.h
+ * @author MCD Application Team
+ * @brief This file contains all the functions prototypes for the ls016b8uy.c
+ * driver.
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2016 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __LS016B8UY_H
+#define __LS016B8UY_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include
+#include "../Common/lcd.h"
+
+/** @addtogroup BSP
+ * @{
+ */
+
+/** @addtogroup Components
+ * @{
+ */
+
+/** @addtogroup ls016b8uy
+ * @{
+ */
+
+/** @defgroup LS016B8UY_Exported_Types
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @defgroup LS016B8UY_Exported_Constants
+ * @{
+ */
+/**
+ * @brief LS016B8UY ID
+ */
+#define LS016B8UY_ID 0xFFFF
+
+/**
+ * @brief LS016B8UY Size
+ */
+#define LS016B8UY_LCD_PIXEL_WIDTH ((uint16_t)180)
+#define LS016B8UY_LCD_PIXEL_HEIGHT ((uint16_t)180)
+
+/**
+ * @brief LS016B8UY Registers
+ */
+#define LCD_CMD_SLEEP_IN 0x10
+#define LCD_CMD_SLEEP_OUT 0x11
+#define LCD_CMD_DISPLAY_OFF 0x28
+#define LCD_CMD_DISPLAY_ON 0x29
+#define LCD_CMD_WRITE_RAM 0x2C
+#define LCD_CMD_READ_RAM 0x2E
+#define LCD_CMD_CASET 0x2A
+#define LCD_CMD_RASET 0x2B
+#define LCD_CMD_VSYNC_OUTPUT 0x35
+#define LCD_CMD_NORMAL_DISPLAY 0x36
+#define LCD_CMD_IDLE_MODE_OFF 0x38
+#define LCD_CMD_IDLE_MODE_ON 0x39
+#define LCD_CMD_COLOR_MODE 0x3A
+#define LCD_CMD_PANEL_SETTING_1 0xB0
+#define LCD_CMD_PANEL_SETTING_2 0xB1
+#define LCD_CMD_OSCILLATOR 0xB3
+#define LCD_CMD_PANEL_SETTING_LOCK 0xB4
+#define LCD_CMD_PANEL_V_PORCH 0xB7
+#define LCD_CMD_PANEL_IDLE_V_PORCH 0xB8
+#define LCD_CMD_GVDD 0xC0
+#define LCD_CMD_OPAMP 0xC2
+#define LCD_CMD_RELOAD_MTP_VCOMH 0xC5
+#define LCD_CMD_PANEL_TIMING_1 0xC8
+#define LCD_CMD_PANEL_TIMING_2 0xC9
+#define LCD_CMD_PANEL_TIMING_3 0xCA
+#define LCD_CMD_PANEL_TIMING_4 0xCC
+#define LCD_CMD_PANEL_POWER 0xD0
+#define LCD_CMD_TEARING_EFFECT 0xDD
+
+/**
+ * @}
+ */
+
+/** @defgroup LS016B8UY_Exported_Functions
+ * @{
+ */
+void ls016b8uy_Init(void);
+uint16_t ls016b8uy_ReadID(void);
+void ls016b8uy_WriteReg(uint8_t Command, uint8_t *Parameters, uint8_t NbParameters);
+uint8_t ls016b8uy_ReadReg(uint8_t Command);
+
+void ls016b8uy_DisplayOn(void);
+void ls016b8uy_DisplayOff(void);
+void ls016b8uy_SetCursor(uint16_t Xpos, uint16_t Ypos);
+void ls016b8uy_WritePixel(uint16_t Xpos, uint16_t Ypos, uint16_t RGBCode);
+uint16_t ls016b8uy_ReadPixel(uint16_t Xpos, uint16_t Ypos);
+
+void ls016b8uy_DrawHLine(uint16_t RGBCode, uint16_t Xpos, uint16_t Ypos, uint16_t Length);
+void ls016b8uy_DrawVLine(uint16_t RGBCode, uint16_t Xpos, uint16_t Ypos, uint16_t Length);
+void ls016b8uy_DrawBitmap(uint16_t Xpos, uint16_t Ypos, uint8_t *pbmp);
+void ls016b8uy_DrawRGBImage(uint16_t Xpos, uint16_t Ypos, uint16_t Xsize, uint16_t Ysize, uint8_t *pdata);
+
+void ls016b8uy_SetDisplayWindow(uint16_t Xpos, uint16_t Ypos, uint16_t Width, uint16_t Height);
+
+
+uint16_t ls016b8uy_GetLcdPixelWidth(void);
+uint16_t ls016b8uy_GetLcdPixelHeight(void);
+
+/* LCD driver structure */
+extern LCD_DrvTypeDef ls016b8uy_drv;
+
+/* LCD IO functions */
+void LCD_IO_Init(void);
+void LCD_IO_WriteMultipleData(uint16_t *pData, uint32_t Size);
+void LCD_IO_WriteReg(uint8_t Reg);
+void LCD_IO_WriteData(uint16_t RegValue);
+uint16_t LCD_IO_ReadData(void);
+void LCD_IO_Delay(uint32_t delay);
+
+/**
+ * @}
+ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __LS016B8UY_H */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/P3_SETR2/Components/lsm303c/Release_Notes.html b/P3_SETR2/Components/lsm303c/Release_Notes.html
new file mode 100644
index 0000000..4008c2b
--- /dev/null
+++ b/P3_SETR2/Components/lsm303c/Release_Notes.html
@@ -0,0 +1,76 @@
+
+
+
+
+
+
+ Release Notes for LSM303C Component Drivers
+
+
+
+
+
+
+
+
+
+
+Release Notes for LSM303C Component Drivers
+Copyright © 2015 STMicroelectronics
+
+
+
+
+
+
License
+
Licensed by ST under BSD 3-Clause license (the "License"). You may not use this package except in compliance with the License. You may obtain a copy of the License at:
+
https://opensource.org/licenses/BSD-3-Clause
+
Purpose
+
This directory contains the LSM303C component drivers.
+
+
+
Update History
+
+
V2.0.1 / 03-April-2019
+
+
Main Changes
+
+Update release notes format
+Reformat the BSD 3-Clause license declaration in the files header (replace license terms by a web reference to OSI website where those terms lie)
+
+
+
+
+
V2.0.0 / 07-April-2017
+
+
Main Changes
+
+LSM303C_AccLowPower(uint16 Mode) and LSM303C_MagLowPower(uint16_t Mode) API updates to set or not component Low Power mode feature
+
+
NOTE This release must be used with BSP Common driver V5.0.0 or later
+
+
+
+
V1.0.0 / 24-June-2015
+
+
Main Changes
+
+First official release of LSM303C component driver
+
+
NOTE This release must be used with BSP Common driver V4.0.0 or later
+
+
+
+
+
+
+
diff --git a/P3_SETR2/Components/lsm303c/lsm303c.c b/P3_SETR2/Components/lsm303c/lsm303c.c
new file mode 100644
index 0000000..c8c4a8b
--- /dev/null
+++ b/P3_SETR2/Components/lsm303c/lsm303c.c
@@ -0,0 +1,390 @@
+/**
+ ******************************************************************************
+ * @file lsm303c.c
+ * @author MCD Application Team
+ * @brief This file provides a set of functions needed to manage the LSM303C
+ * MEMS accelerometer.
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2015 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+/* Includes ------------------------------------------------------------------*/
+#include "lsm303c.h"
+
+/** @addtogroup BSP
+ * @{
+ */
+
+/** @addtogroup Components
+ * @{
+ */
+
+/** @addtogroup LSM303C
+ * @{
+ */
+
+/** @defgroup LSM303C_Private_TypesDefinitions
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @defgroup LSM303C_Private_Defines
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @defgroup LSM303C_Private_Macros
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @defgroup LSM303C_Private_Functions
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+
+/** @defgroup LSM303C_Private_Variables
+ * @{
+ */
+ACCELERO_DrvTypeDef Lsm303cDrv_accelero =
+{
+ LSM303C_AccInit,
+ LSM303C_AccDeInit,
+ LSM303C_AccReadID,
+ 0,
+ LSM303C_AccLowPower,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ LSM303C_AccFilterConfig,
+ 0,
+ LSM303C_AccReadXYZ
+};
+
+MAGNETO_DrvTypeDef Lsm303cDrv_magneto =
+{
+ LSM303C_MagInit,
+ LSM303C_MagDeInit,
+ LSM303C_MagReadID,
+ 0,
+ LSM303C_MagLowPower,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ LSM303C_MagReadXYZ
+
+};
+
+/**
+ * @}
+ */
+
+
+/**
+ * @brief Set LSM303C Accelerometer Initialization.
+ * @param InitStruct: Init parameters
+ * @retval None
+ */
+void LSM303C_AccInit(uint16_t InitStruct)
+{
+ uint8_t ctrl = 0x00;
+
+ /* Low level init */
+ ACCELERO_IO_Init();
+
+ /* Write value to ACC MEMS CTRL_REG1 register */
+ ctrl = (uint8_t) InitStruct;
+ ACCELERO_IO_Write(LSM303C_CTRL_REG1_A, ctrl);
+
+ /* Write value to ACC MEMS CTRL_REG4 register */
+ ctrl = ((uint8_t) (InitStruct >> 8));
+ ACCELERO_IO_Write(LSM303C_CTRL_REG4_A, ctrl);
+}
+
+/**
+ * @brief LSM303C Accelerometer De-initialization.
+ * @param None
+ * @retval None
+ */
+void LSM303C_AccDeInit(void)
+{
+}
+
+/**
+ * @brief Read LSM303C ID.
+ * @param None
+ * @retval ID
+ */
+uint8_t LSM303C_AccReadID(void)
+{
+ uint8_t ctrl = 0x00;
+
+ /* Low level init */
+ ACCELERO_IO_Init();
+
+ /* Enabled SPI/I2C read communication */
+ ACCELERO_IO_Write(LSM303C_CTRL_REG4_A, 0x5);
+
+ /* Read value at Who am I register address */
+ ctrl = ACCELERO_IO_Read(LSM303C_WHO_AM_I_ADDR);
+
+ return ctrl;
+}
+
+/**
+ * @brief Put Accelerometer in power down mode or not.
+ * @param Mode equal to LSM303C_ACC_ODR_OFF means enable Low Power Mode, otherwise Output data rate is set.
+ * This parameter can be a value of @ref Acc_OutPut_DataRate_Selection
+ * @retval None
+ */
+void LSM303C_AccLowPower(uint16_t Mode)
+{
+ uint8_t ctrl = 0x00;
+
+ /* Read control register 1 value */
+ ctrl = ACCELERO_IO_Read(LSM303C_CTRL_REG1_A);
+
+ /* Clear ODR bits */
+ ctrl &= ~(LSM303C_ACC_ODR_BITPOSITION);
+
+ /* Set Power down */
+ ctrl |= (uint8_t)Mode;
+
+ /* write back control register */
+ ACCELERO_IO_Write(LSM303C_CTRL_REG1_A, ctrl);
+}
+
+/**
+ * @brief Set High Pass Filter Modality
+ * @param FilterStruct: contains data for filter config
+ * @retval None
+ */
+void LSM303C_AccFilterConfig(uint8_t FilterStruct)
+{
+ uint8_t tmpreg;
+
+// /* Read CTRL_REG2 register */
+// tmpreg = ACCELERO_IO_Read(LSM303C_CTRL_REG2_A);
+//
+// tmpreg &= 0x0C;
+ tmpreg = FilterStruct;
+
+ /* Write value to ACC MEMS CTRL_REG2 register */
+ ACCELERO_IO_Write(LSM303C_CTRL_REG2_A, tmpreg);
+}
+
+/**
+ * @brief Read X, Y & Z Acceleration values
+ * @param pData: Data out pointer
+ * @retval None
+ */
+void LSM303C_AccReadXYZ(int16_t* pData)
+{
+ int16_t pnRawData[3];
+ uint8_t ctrlx[2]={0,0};
+ uint8_t buffer[6];
+ uint8_t i = 0;
+ uint8_t sensitivity = LSM303C_ACC_SENSITIVITY_2G;
+
+ /* Read the acceleration control register content */
+ ctrlx[0] = ACCELERO_IO_Read(LSM303C_CTRL_REG4_A);
+ ctrlx[1] = ACCELERO_IO_Read(LSM303C_CTRL_REG5_A);
+
+ /* Read output register X, Y & Z acceleration */
+ buffer[0] = ACCELERO_IO_Read(LSM303C_OUT_X_L_A);
+ buffer[1] = ACCELERO_IO_Read(LSM303C_OUT_X_H_A);
+ buffer[2] = ACCELERO_IO_Read(LSM303C_OUT_Y_L_A);
+ buffer[3] = ACCELERO_IO_Read(LSM303C_OUT_Y_H_A);
+ buffer[4] = ACCELERO_IO_Read(LSM303C_OUT_Z_L_A);
+ buffer[5] = ACCELERO_IO_Read(LSM303C_OUT_Z_H_A);
+
+ for(i=0; i<3; i++)
+ {
+ pnRawData[i]=((int16_t)((uint16_t)buffer[2*i+1] << 8) + buffer[2*i]);
+ }
+
+ /* Normal mode */
+ /* Switch the sensitivity value set in the CRTL4 */
+ switch(ctrlx[0] & LSM303C_ACC_FULLSCALE_8G)
+ {
+ case LSM303C_ACC_FULLSCALE_2G:
+ sensitivity = LSM303C_ACC_SENSITIVITY_2G;
+ break;
+ case LSM303C_ACC_FULLSCALE_4G:
+ sensitivity = LSM303C_ACC_SENSITIVITY_4G;
+ break;
+ case LSM303C_ACC_FULLSCALE_8G:
+ sensitivity = LSM303C_ACC_SENSITIVITY_8G;
+ break;
+ }
+
+ /* Obtain the mg value for the three axis */
+ for(i=0; i<3; i++)
+ {
+ pData[i]=(pnRawData[i] * sensitivity);
+ }
+}
+
+/***********************************************************************************************
+ Magnetometer driver
+***********************************************************************************************/
+
+/**
+ * @brief Set LSM303C Magnetometer Initialization.
+ * @param LSM303C_InitStruct: pointer to a LSM303C_MagInitTypeDef structure
+ * that contains the configuration setting for the LSM303C.
+ * @retval None
+ */
+void LSM303C_MagInit(MAGNETO_InitTypeDef LSM303C_InitStruct)
+{
+ MAGNETO_IO_Write(LSM303C_CTRL_REG1_M, LSM303C_InitStruct.Register1);
+ MAGNETO_IO_Write(LSM303C_CTRL_REG2_M, LSM303C_InitStruct.Register2);
+ MAGNETO_IO_Write(LSM303C_CTRL_REG3_M, LSM303C_InitStruct.Register3);
+ MAGNETO_IO_Write(LSM303C_CTRL_REG4_M, LSM303C_InitStruct.Register4);
+ MAGNETO_IO_Write(LSM303C_CTRL_REG5_M, LSM303C_InitStruct.Register5);
+}
+
+/**
+ * @brief LSM303C Magnetometer De-initialization.
+ * @param None
+ * @retval None
+ */
+void LSM303C_MagDeInit(void)
+{
+}
+
+/**
+ * @brief Read LSM303C ID.
+ * @param None
+ * @retval ID
+ */
+uint8_t LSM303C_MagReadID(void)
+{
+ /* Low level init */
+ MAGNETO_IO_Init();
+
+ /* Enabled the SPI/I2C read operation */
+ MAGNETO_IO_Write(LSM303C_CTRL_REG3_M, 0x84);
+
+ /* Read value at Who am I register address */
+ return MAGNETO_IO_Read(LSM303C_WHO_AM_I_ADDR);
+}
+
+/**
+ * @brief Put Magnetometer in power down mode or not.
+ * @param Mode equal to LSM303C_MAG_POWERDOWN2_MODE means enable deepest Low Power Mode, otherwise other mode is set.
+ * This parameter can be a value of @ref Mag_Operation_Mode
+ * @retval None
+ */
+void LSM303C_MagLowPower(uint16_t Mode)
+{
+ uint8_t ctrl = 0x00;
+
+ /* Read control register 1 value */
+ ctrl = MAGNETO_IO_Read(LSM303C_CTRL_REG3_M);
+
+ /* Clear ODR bits */
+ ctrl &= ~(LSM303C_MAG_SELECTION_MODE);
+
+ /* Set mode */
+ ctrl |= (uint8_t)Mode;
+
+ /* write back control register */
+ MAGNETO_IO_Write(LSM303C_CTRL_REG3_M, ctrl);
+}
+
+/**
+ * @brief Get status for Mag LSM303C data
+ * @param None
+ * @retval Data status in a LSM303C Data register
+ */
+uint8_t LSM303C_MagGetDataStatus(void)
+{
+ /* Read Mag STATUS register */
+ return MAGNETO_IO_Read(LSM303C_STATUS_REG_M);
+}
+
+/**
+ * @brief Read X, Y & Z Magnetometer values
+ * @param pData: Data out pointer
+ * @retval None
+ */
+void LSM303C_MagReadXYZ(int16_t* pData)
+{
+ uint8_t ctrlx;
+ uint8_t buffer[6];
+ uint8_t i=0;
+
+ /* Read the magnetometer control register content */
+ ctrlx = MAGNETO_IO_Read(LSM303C_CTRL_REG4_M);
+
+ /* Read output register X, Y & Z magnetometer */
+ buffer[0] = MAGNETO_IO_Read(LSM303C_OUT_X_L_M);
+ buffer[1] = MAGNETO_IO_Read(LSM303C_OUT_X_H_M);
+ buffer[2] = MAGNETO_IO_Read(LSM303C_OUT_Y_L_M);
+ buffer[3] = MAGNETO_IO_Read(LSM303C_OUT_Y_H_M);
+ buffer[4] = MAGNETO_IO_Read(LSM303C_OUT_Z_L_M);
+ buffer[5] = MAGNETO_IO_Read(LSM303C_OUT_Z_H_M);
+
+ /* Check in the control register4 the data alignment*/
+ if((ctrlx & LSM303C_MAG_BLE_MSB))
+ {
+ for(i=0; i<3; i++)
+ {
+ pData[i]=((int16_t)((uint16_t)buffer[2*i] << 8) + buffer[2*i+1]);
+ }
+ }
+ else
+ {
+ for(i=0; i<3; i++)
+ {
+ pData[i]=((int16_t)((uint16_t)buffer[2*i+1] << 8) + buffer[2*i]);
+ }
+ }
+}
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/P3_SETR2/Components/lsm303c/lsm303c.h b/P3_SETR2/Components/lsm303c/lsm303c.h
new file mode 100644
index 0000000..4950d13
--- /dev/null
+++ b/P3_SETR2/Components/lsm303c/lsm303c.h
@@ -0,0 +1,601 @@
+/**
+ ******************************************************************************
+ * @file lsm303c.h
+ * @author MCD Application Team
+ * @brief This file contains all the functions prototypes for the LSM303C.c driver.
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2015 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __LSM303C_H
+#define __LSM303C_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "../Common/accelero.h"
+#include "../Common/magneto.h"
+
+/** @addtogroup BSP
+ * @{
+ */
+
+/** @addtogroup Components
+ * @{
+ */
+
+/** @addtogroup LSM303C
+ * @{
+ */
+
+/** @defgroup LSM303C_Exported_Types
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/******************************************************************************/
+/*************************** START REGISTER MAPPING **************************/
+/******************************************************************************/
+/* Acceleration Registers */
+#define LSM303C_WHO_AM_I_ADDR 0x0F /* device identification register */
+#define LSM303C_ACT_THS_A 0x1E
+#define LSM303C_ACT_DUR_A 0x1F
+#define LSM303C_CTRL_REG1_A 0x20 /* Control register 1 acceleration */
+#define LSM303C_CTRL_REG2_A 0x21 /* Control register 2 acceleration */
+#define LSM303C_CTRL_REG3_A 0x22 /* Control register 3 acceleration */
+#define LSM303C_CTRL_REG4_A 0x23 /* Control register 4 acceleration */
+#define LSM303C_CTRL_REG5_A 0x24 /* Control register 5 acceleration */
+#define LSM303C_CTRL_REG6_A 0x25 /* Control register 6 acceleration */
+#define LSM303C_CTRL_REG7_A 0x26 /* Control register 6 acceleration */
+#define LSM303C_STATUS_REG_A 0x27 /* Status register acceleration */
+#define LSM303C_OUT_X_L_A 0x28 /* Output Register X acceleration */
+#define LSM303C_OUT_X_H_A 0x29 /* Output Register X acceleration */
+#define LSM303C_OUT_Y_L_A 0x2A /* Output Register Y acceleration */
+#define LSM303C_OUT_Y_H_A 0x2B /* Output Register Y acceleration */
+#define LSM303C_OUT_Z_L_A 0x2C /* Output Register Z acceleration */
+#define LSM303C_OUT_Z_H_A 0x2D /* Output Register Z acceleration */
+#define LSM303C_FIFO_CTRL 0x2E /* Fifo control Register acceleration */
+#define LSM303C_FIFO_SRC 0x2F /* Fifo src Register acceleration */
+
+#define LSM303C_IG_CFG1_A 0x30 /* Interrupt 1 configuration Register acceleration */
+#define LSM303C_IG_SRC1_A 0x31 /* Interrupt 1 source Register acceleration */
+#define LSM303C_IG_THS_X1_A 0x32
+#define LSM303C_IG_THS_Y1_A 0x33
+#define LSM303C_IG_THS_Z1_A 0x34
+
+#define LSM303C_IG_DUR1_A 0x32
+#define LSM303C_INT1_DURATION_A 0x33 /* Interrupt 1 DURATION register acceleration */
+
+#define LSM303C_INT2_CFG_A 0x34 /* Interrupt 2 configuration Register acceleration */
+#define LSM303C_INT2_SOURCE_A 0x35 /* Interrupt 2 source Register acceleration */
+#define LSM303C_INT2_THS_A 0x36 /* Interrupt 2 Threshold register acceleration */
+#define LSM303C_INT2_DURATION_A 0x37 /* Interrupt 2 DURATION register acceleration */
+
+#define LSM303C_CLICK_CFG_A 0x38 /* Click configuration Register acceleration */
+#define LSM303C_CLICK_SOURCE_A 0x39 /* Click 2 source Register acceleration */
+#define LSM303C_CLICK_THS_A 0x3A /* Click 2 Threshold register acceleration */
+
+#define LSM303C_TIME_LIMIT_A 0x3B /* Time Limit Register acceleration */
+#define LSM303C_TIME_LATENCY_A 0x3C /* Time Latency Register acceleration */
+#define LSM303C_TIME_WINDOW_A 0x3D /* Time window register acceleration */
+
+/* Magnetic field Registers */
+#define LSM303C_CTRL_REG1_M 0x20 /* Magnetic control register 1 */
+#define LSM303C_CTRL_REG2_M 0x21 /* Magnetic control register 2 */
+#define LSM303C_CTRL_REG3_M 0x22 /* Magnetic control register 3 */
+#define LSM303C_CTRL_REG4_M 0x23 /* Magnetic control register 4 */
+#define LSM303C_CTRL_REG5_M 0x24 /* Magnetic control register 5 */
+
+#define LSM303C_STATUS_REG_M 0x27 /* Magnetic status register M */
+
+#define LSM303C_OUT_X_L_M 0x28 /* Output Register X magnetic field */
+#define LSM303C_OUT_X_H_M 0x29 /* Output Register X magnetic field */
+#define LSM303C_OUT_Y_L_M 0x2A /* Output Register Y magnetic field */
+#define LSM303C_OUT_Y_H_M 0x2B /* Output Register Y magnetic field */
+#define LSM303C_OUT_Z_L_M 0x2C /* Output Register Z magnetic field */
+#define LSM303C_OUT_Z_H_M 0x2D /* Output Register Z magnetic field */
+
+#define LSM303C_TEMP_OUT_L_M 0x2E /* Temperature Register magnetic field */
+#define LSM303C_TEMP_OUT_H_M 0x2F /* Temperature Register magnetic field */
+
+#define LSM303C_INT_CFG_M 0x30 /* Axis interrupt configuration */
+#define LSM303C_INT_SRC_M 0x31 /* Axis interrupt source */
+#define LSM303C_INT_THS_L_M 0x32 /* Interrupt threshold L */
+#define LSM303C_INT_THS_H_M 0x33 /* Interrupt threshold M */
+
+
+/******************************************************************************/
+/**************************** END REGISTER MAPPING ***************************/
+/******************************************************************************/
+
+/** @defgroup Power_Mode_selection
+ * @{
+ */
+#define LMS303C_ACC_ID ((uint8_t)0x41)
+#define LMS303C_MAG_ID ((uint8_t)0x3D)
+/**
+ * @}
+ */
+
+/** @defgroup Acc_OutPut_DataRate_Selection
+ * @{
+ */
+#define LSM303C_ACC_ODR_BITPOSITION ((uint8_t)0x70) /*!< Output Data Rate bit position */
+#define LSM303C_ACC_ODR_OFF ((uint8_t)0x00) /*!< Output Data Rate powerdown */
+#define LSM303C_ACC_ODR_10_HZ ((uint8_t)0x10) /*!< Output Data Rate = 10 Hz */
+#define LSM303C_ACC_ODR_50_HZ ((uint8_t)0x20) /*!< Output Data Rate = 50 Hz */
+#define LSM303C_ACC_ODR_100_HZ ((uint8_t)0x30) /*!< Output Data Rate = 100 Hz */
+#define LSM303C_ACC_ODR_200_HZ ((uint8_t)0x40) /*!< Output Data Rate = 200 Hz */
+#define LSM303C_ACC_ODR_400_HZ ((uint8_t)0x50) /*!< Output Data Rate = 400 Hz */
+#define LSM303C_ACC_ODR_800_HZ ((uint8_t)0x60) /*!< Output Data Rate = 800 Hz */
+/**
+ * @}
+ */
+
+/** @defgroup Acc_Axes_Selection
+ * @{
+ */
+#define LSM303C_ACC_X_ENABLE ((uint8_t)0x01)
+#define LSM303C_ACC_Y_ENABLE ((uint8_t)0x02)
+#define LSM303C_ACC_Z_ENABLE ((uint8_t)0x04)
+#define LSM303C_ACC_AXES_ENABLE ((uint8_t)0x07)
+#define LSM303C_ACC_AXES_DISABLE ((uint8_t)0x00)
+/**
+ * @}
+ */
+
+/** @defgroup Acc_High_Resolution
+ * @{
+ */
+#define LSM303C_ACC_HR_ENABLE ((uint8_t)0x80)
+#define LSM303C_ACC_HR_DISABLE ((uint8_t)0x00)
+/**
+ * @}
+ */
+
+/** @defgroup Communication_Mode
+ * @{
+ */
+#define LSM303C_ACC_I2C_MODE ((uint8_t) 0x02)
+#define LSM303C_ACC_SPI_MODE ((uint8_t) 0x01)
+/**
+ * @}
+ */
+
+/** @defgroup Acc_Full_Scale_Selection
+ * @{
+ */
+#define LSM303C_ACC_FULLSCALE_2G ((uint8_t)0x00) /*!< 2 g */
+#define LSM303C_ACC_FULLSCALE_4G ((uint8_t)0x20) /*!< 4 g */
+#define LSM303C_ACC_FULLSCALE_8G ((uint8_t)0x30) /*!< 8 g */
+/**
+ * @}
+ */
+
+/** @defgroup Acc_Full_Scale_Selection
+ * @{
+ */
+#define LSM303C_ACC_SENSITIVITY_2G ((uint8_t)1) /*!< accelerometer sensitivity with 2 g full scale [mg/LSB] */
+#define LSM303C_ACC_SENSITIVITY_4G ((uint8_t)2) /*!< accelerometer sensitivity with 4 g full scale [mg/LSB] */
+#define LSM303C_ACC_SENSITIVITY_8G ((uint8_t)4) /*!< accelerometer sensitivity with 8 g full scale [mg/LSB] */
+#define LSM303C_ACC_SENSITIVITY_16G ((uint8_t)12) /*!< accelerometer sensitivity with 12 g full scale [mg/LSB] */
+/**
+ * @}
+ */
+
+/** @defgroup Acc_Block_Data_Update
+ * @{
+ */
+#define LSM303C_ACC_BDU_CONTINUOUS ((uint8_t)0x00) /*!< Continuos Update */
+#define LSM303C_ACC_BDU_MSBLSB ((uint8_t)0x08) /*!< Single Update: output registers not updated until MSB and LSB reading */
+/**
+ * @}
+ */
+
+/** @defgroup Acc_Endian_Data_selection
+ * @{
+ */
+#define LSM303C_ACC_BLE_LSB ((uint8_t)0x00) /*!< Little Endian: data LSB @ lower address */
+#define LSM303C_ACC_BLE_MSB ((uint8_t)0x40) /*!< Big Endian: data MSB @ lower address */
+/**
+ * @}
+ */
+
+/** @defgroup Acc_High_Pass_Filter_Mode
+ * @{
+ */
+#define LSM303C_ACC_HPM_REF_SIGNAL ((uint8_t)0x08)
+#define LSM303C_ACC_HPM_NORMAL_MODE ((uint8_t)0x00)
+/**
+ * @}
+ */
+
+/** @defgroup Acc_High_Pass_CUT OFF_Frequency
+ * @{
+ */
+#define LSM303C_ACC_DFC1_ODRDIV50 ((uint8_t)0x00)
+#define LSM303C_ACC_DFC1_ODRDIV100 ((uint8_t)0x20)
+#define LSM303C_ACC_DFC1_ODRDIV9 ((uint8_t)0x40)
+#define LSM303C_ACC_DFC1_ODRDIV400 ((uint8_t)0x60)
+/**
+ * @}
+ */
+
+/** @defgroup Acc_High_Pass_Filter_status
+ * @{
+ */
+#define LSM303C_ACC_HPF_DISABLE ((uint8_t)0x00)
+#define LSM303C_ACC_HPF_ENABLE ((uint8_t)0x08)
+/**
+ * @}
+ */
+
+/** @defgroup Acc_High_Pass_Filter_Click_status
+ * @{
+ */
+#define LSM303C_ACC_HPF_CLICK_DISABLE ((uint8_t)0x00)
+#define LSM303C_ACC_HPF_CLICK_ENABLE ((uint8_t)0x04)
+/**
+ * @}
+ */
+
+/** @defgroup Acc_High_Pass_Filter_HPI2S_status
+ * @{
+ */
+#define LSM303C_ACC_HPI2S_INT1_DISABLE ((uint8_t)0x00)
+#define LSM303C_ACC_HPI2S_INT1_ENABLE ((uint8_t)0x01)
+#define LSM303C_ACC_HPI2S_INT2_DISABLE ((uint8_t)0x00)
+#define LSM303C_ACC_HPI2S_INT2_ENABLE ((uint8_t)0x02)
+/**
+ * @}
+ */
+
+/** @defgroup Acc_Interrupt1_Configuration_definition
+ * @{
+ */
+#define LSM303C_IT1_CLICK ((uint8_t)0x80)
+#define LSM303C_IT1_AOI1 ((uint8_t)0x40)
+#define LSM303C_IT1_AOI2 ((uint8_t)0x20)
+#define LSM303C_IT1_DRY1 ((uint8_t)0x10)
+#define LSM303C_IT1_DRY2 ((uint8_t)0x08)
+#define LSM303C_IT1_WTM ((uint8_t)0x04)
+#define LSM303C_IT1_OVERRUN ((uint8_t)0x02)
+/**
+ * @}
+ */
+
+/** @defgroup Acc_Interrupt2_Configuration_definition
+ * @{
+ */
+#define LSM303C_IT2_CLICK ((uint8_t)0x80)
+#define LSM303C_IT2_INT1 ((uint8_t)0x40)
+#define LSM303C_IT2_INT2 ((uint8_t)0x20)
+#define LSM303C_IT2_BOOT ((uint8_t)0x10)
+#define LSM303C_IT2_ACT ((uint8_t)0x08)
+#define LSM303C_IT2_HLACTIVE ((uint8_t)0x02)
+/**
+ * @}
+ */
+
+/** @defgroup Acc_INT_Combination_Status
+ * @{
+ */
+#define LSM303C_OR_COMBINATION ((uint8_t)0x00) /*!< OR combination of enabled IRQs */
+#define LSM303C_AND_COMBINATION ((uint8_t)0x80) /*!< AND combination of enabled IRQs */
+#define LSM303C_MOV_RECOGNITION ((uint8_t)0x40) /*!< 6D movement recognition */
+#define LSM303C_POS_RECOGNITION ((uint8_t)0xC0) /*!< 6D position recognition */
+/**
+ * @}
+ */
+
+/** @defgroup Acc_INT_Axes
+ * @{
+ */
+#define LSM303C_Z_HIGH ((uint8_t)0x20) /*!< Z High enabled IRQs */
+#define LSM303C_Z_LOW ((uint8_t)0x10) /*!< Z low enabled IRQs */
+#define LSM303C_Y_HIGH ((uint8_t)0x08) /*!< Y High enabled IRQs */
+#define LSM303C_Y_LOW ((uint8_t)0x04) /*!< Y low enabled IRQs */
+#define LSM303C_X_HIGH ((uint8_t)0x02) /*!< X High enabled IRQs */
+#define LSM303C_X_LOW ((uint8_t)0x01) /*!< X low enabled IRQs */
+/**
+ * @}
+ */
+
+/** @defgroup Acc_INT_Click
+* @{
+*/
+#define LSM303C_Z_DOUBLE_CLICK ((uint8_t)0x20) /*!< Z double click IRQs */
+#define LSM303C_Z_SINGLE_CLICK ((uint8_t)0x10) /*!< Z single click IRQs */
+#define LSM303C_Y_DOUBLE_CLICK ((uint8_t)0x08) /*!< Y double click IRQs */
+#define LSM303C_Y_SINGLE_CLICK ((uint8_t)0x04) /*!< Y single click IRQs */
+#define LSM303C_X_DOUBLE_CLICK ((uint8_t)0x02) /*!< X double click IRQs */
+#define LSM303C_X_SINGLE_CLICK ((uint8_t)0x01) /*!< X single click IRQs */
+/**
+* @}
+*/
+
+/** @defgroup Acc_INT1_Interrupt_status
+ * @{
+ */
+#define LSM303C_INT1INTERRUPT_DISABLE ((uint8_t)0x00)
+#define LSM303C_INT1INTERRUPT_ENABLE ((uint8_t)0x80)
+/**
+ * @}
+ */
+
+/** @defgroup Acc_INT1_Interrupt_ActiveEdge
+ * @{
+ */
+#define LSM303C_INT1INTERRUPT_LOW_EDGE ((uint8_t)0x20)
+#define LSM303C_INT1INTERRUPT_HIGH_EDGE ((uint8_t)0x00)
+/**
+ * @}
+ */
+
+/** @defgroup Mag_Temperature_Sensor
+ * @{
+ */
+#define LSM303C_MAG_TEMPSENSOR_ENABLE ((uint8_t) 0x80) /*!< Temp sensor Enable */
+#define LSM303C_MAG_TEMPSENSOR_DISABLE ((uint8_t) 0x00) /*!< Temp sensor Disable */
+/**
+ * @}
+ */
+
+/** @defgroup Mag_XY-axis_Operating_Mode
+ * @{
+ */
+#define LSM303C_MAG_OM_XY_LOWPOWER ((uint8_t) 0x00 << 5)
+#define LSM303C_MAG_OM_XY_MEDIUM ((uint8_t) 0x01 << 5)
+#define LSM303C_MAG_OM_XY_HIGH ((uint8_t) 0x02 << 5)
+#define LSM303C_MAG_OM_XY_ULTRAHIGH ((uint8_t) 0x03 << 5)
+/**
+ * @}
+ */
+
+/** @defgroup Mag_Data_Rate
+ * @{
+ */
+#define LSM303C_MAG_ODR_0_625_HZ ((uint8_t) 0x00 << 2) /*!< Output Data Rate = 0.625 Hz */
+#define LSM303C_MAG_ODR_1_25_HZ ((uint8_t) 0x01 << 2) /*!< Output Data Rate = 1.25 Hz */
+#define LSM303C_MAG_ODR_2_5_HZ ((uint8_t) 0x02 << 2) /*!< Output Data Rate = 2.5 Hz */
+#define LSM303C_MAG_ODR_5_0_HZ ((uint8_t) 0x03 << 2) /*!< Output Data Rate = 5.0 Hz */
+#define LSM303C_MAG_ODR_10_HZ ((uint8_t) 0x04 << 2) /*!< Output Data Rate = 10 Hz */
+#define LSM303C_MAG_ODR_20_HZ ((uint8_t) 0x05 << 2) /*!< Output Data Rate = 20 Hz */
+#define LSM303C_MAG_ODR_40_HZ ((uint8_t) 0x06 << 2) /*!< Output Data Rate = 40 Hz */
+#define LSM303C_MAG_ODR_80_HZ ((uint8_t) 0x07 << 2) /*!< Output Data Rate = 80 Hz */
+/**
+ * @}
+ */
+
+/** @defgroup Mag_Data_Rate
+ * @{
+ */
+#define LMS303C_MAG_SELFTEST_DISABLE ((uint8_t 0x00)
+#define LMS303C_MAG_SELFTEST_ENABLE ((uint8_t 0x01)
+/**
+ * @}
+ */
+
+/** @defgroup Mag_Full_Scale
+ * @{
+ */
+#define LSM303C_MAG_FS_DEFAULT ((uint8_t) 0x00 << 5)
+#define LSM303C_MAG_FS_16_GA ((uint8_t) 0x03 << 5) /*!< Full scale = 16 Gauss */
+/**
+ * @}
+ */
+
+/** @defgroup Mag_Reboot
+ * @{
+ */
+#define LSM303C_MAG_REBOOT_DEFAULT ((uint8_t) 0x00 << 3)
+#define LSM303C_MAG_REBOOT_ENABLE ((uint8_t) 0x01 << 3)
+/**
+ * @}
+ */
+
+/** @defgroup Mag_Soft_reset
+ * @{
+ */
+#define LSM303C_MAG_SOFT_RESET_DEFAULT ((uint8_t) 0x00 << 2)
+#define LSM303C_MAG_SOFT_RESET_ENABLE ((uint8_t) 0x01 << 2)
+/**
+ * @}
+ */
+
+/** @defgroup Mag_Communication_Mode
+ * @{
+ */
+#define LSM303C_MAG_I2C_MODE ((uint8_t) 0x80)
+#define LSM303C_MAG_SPI_MODE ((uint8_t) 0x04)
+/**
+ * @}
+ */
+
+/** @defgroup Mag_Lowpower_mode_config
+ * @{
+ */
+#define LSM303C_MAG_CONFIG_NORMAL_MODE ((uint8_t) 0x00)
+#define LSM303C_MAG_CONFIG_LOWPOWER_MODE ((uint8_t) 0x20)
+/**
+ * @}
+ */
+
+/** @defgroup Mag_Operation_Mode
+ * @{
+ */
+#define LSM303C_MAG_SELECTION_MODE ((uint8_t) 0x03)
+#define LSM303C_MAG_CONTINUOUS_MODE ((uint8_t) 0x00)
+#define LSM303C_MAG_SINGLE_MODE ((uint8_t) 0x01)
+#define LSM303C_MAG_POWERDOWN1_MODE ((uint8_t) 0x02)
+#define LSM303C_MAG_POWERDOWN2_MODE ((uint8_t) 0x03)
+/**
+ * @}
+ */
+
+/** @defgroup Mag_Z-axis_Operation_Mode
+ * @{
+ */
+#define LSM303C_MAG_OM_Z_LOWPOWER ((uint8_t) 0x00 << 2)
+#define LSM303C_MAG_OM_Z_MEDIUM ((uint8_t) 0x01 << 2)
+#define LSM303C_MAG_OM_Z_HIGH ((uint8_t) 0x02 << 2)
+#define LSM303C_MAG_OM_Z_ULTRAHIGH ((uint8_t) 0x03 << 2)
+/**
+ * @}
+ */
+
+/** @defgroup Mag_Big_little-endian_selection
+ * @{
+ */
+#define LSM303C_MAG_BLE_LSB ((uint8_t) 0x00)
+#define LSM303C_MAG_BLE_MSB ((uint8_t) 0x02)
+/**
+ * @}
+ */
+
+/** @defgroup Mag_Bloc_update_magnetic_data
+ * @{
+ */
+#define LSM303C_MAG_BDU_CONTINUOUS ((uint8_t) 0x00)
+#define LSM303C_MAG_BDU_MSBLSB ((uint8_t) 0x40)
+/**
+ * @}
+ */
+
+/**
+ * @defgroup Magnetometer_Sensitivity
+ * @{
+ */
+#define LSM303C_M_SENSITIVITY_XY_1_3Ga 1100 /*!< magnetometer X Y axes sensitivity for 1.3 Ga full scale [LSB/Ga] */
+#define LSM303C_M_SENSITIVITY_XY_1_9Ga 855 /*!< magnetometer X Y axes sensitivity for 1.9 Ga full scale [LSB/Ga] */
+#define LSM303C_M_SENSITIVITY_XY_2_5Ga 670 /*!< magnetometer X Y axes sensitivity for 2.5 Ga full scale [LSB/Ga] */
+#define LSM303C_M_SENSITIVITY_XY_4Ga 450 /*!< magnetometer X Y axes sensitivity for 4 Ga full scale [LSB/Ga] */
+#define LSM303C_M_SENSITIVITY_XY_4_7Ga 400 /*!< magnetometer X Y axes sensitivity for 4.7 Ga full scale [LSB/Ga] */
+#define LSM303C_M_SENSITIVITY_XY_5_6Ga 330 /*!< magnetometer X Y axes sensitivity for 5.6 Ga full scale [LSB/Ga] */
+#define LSM303C_M_SENSITIVITY_XY_8_1Ga 230 /*!< magnetometer X Y axes sensitivity for 8.1 Ga full scale [LSB/Ga] */
+#define LSM303C_M_SENSITIVITY_Z_1_3Ga 980 /*!< magnetometer Z axis sensitivity for 1.3 Ga full scale [LSB/Ga] */
+#define LSM303C_M_SENSITIVITY_Z_1_9Ga 760 /*!< magnetometer Z axis sensitivity for 1.9 Ga full scale [LSB/Ga] */
+#define LSM303C_M_SENSITIVITY_Z_2_5Ga 600 /*!< magnetometer Z axis sensitivity for 2.5 Ga full scale [LSB/Ga] */
+#define LSM303C_M_SENSITIVITY_Z_4Ga 400 /*!< magnetometer Z axis sensitivity for 4 Ga full scale [LSB/Ga] */
+#define LSM303C_M_SENSITIVITY_Z_4_7Ga 355 /*!< magnetometer Z axis sensitivity for 4.7 Ga full scale [LSB/Ga] */
+#define LSM303C_M_SENSITIVITY_Z_5_6Ga 295 /*!< magnetometer Z axis sensitivity for 5.6 Ga full scale [LSB/Ga] */
+#define LSM303C_M_SENSITIVITY_Z_8_1Ga 205 /*!< magnetometer Z axis sensitivity for 8.1 Ga full scale [LSB/Ga] */
+/**
+ * @}
+ */
+
+/** @defgroup Mag_Working_Mode
+ * @{
+ */
+#define LSM303C_CONTINUOUS_CONVERSION ((uint8_t) 0x00) /*!< Continuous-Conversion Mode */
+#define LSM303C_SINGLE_CONVERSION ((uint8_t) 0x01) /*!< Single-Conversion Mode */
+#define LSM303C_SLEEP ((uint8_t) 0x02) /*!< Sleep Mode */
+/**
+ * @}
+ */
+
+
+/** @defgroup LSM303C_AccExported_Functions ACCELEROMETER Exported functions
+ * @{
+ */
+void LSM303C_AccInit(uint16_t InitStruct);
+void LSM303C_AccDeInit(void);
+uint8_t LSM303C_AccReadID(void);
+void LSM303C_AccLowPower(uint16_t Mode);
+void LSM303C_AccFilterConfig(uint8_t FilterStruct);
+void LSM303C_AccFilterCmd(uint8_t HighPassFilterState);
+void LSM303C_AccReadXYZ(int16_t* pData);
+void LSM303C_AccFilterClickCmd(uint8_t HighPassFilterClickState);
+void LSM303C_AccIT1Enable(uint8_t LSM303C_IT);
+void LSM303C_AccIT1Disable(uint8_t LSM303C_IT);
+void LSM303C_AccIT2Enable(uint8_t LSM303C_IT);
+void LSM303C_AccIT2Disable(uint8_t LSM303C_IT);
+void LSM303C_AccClickITEnable(uint8_t ITClick);
+void LSM303C_AccClickITDisable(uint8_t ITClick);
+void LSM303C_AccZClickITConfig(void);
+/**
+ * @}
+ */
+
+/** @defgroup LSM303C_AccImported_Globals ACCELEROMETER Imported Globals
+ * @{
+ */
+extern ACCELERO_DrvTypeDef Lsm303cDrv_accelero;
+/**
+ * @}
+ */
+
+/** @defgroup LSM303C_MagExported_Functions MAGNETOMETER Exported functions
+ * @{
+ */
+void LSM303C_MagInit(MAGNETO_InitTypeDef LSM303C_InitStruct);
+void LSM303C_MagDeInit(void);
+uint8_t LSM303C_MagReadID(void);
+void LSM303C_MagLowPower(uint16_t Mode);
+void LSM303C_MagReadXYZ(int16_t* pData);
+uint8_t LSM303C_MagGetDataStatus(void);
+/**
+ * @}
+ */
+
+/** @defgroup LSM303C_MagImported_Globals MAGNETOMETER Imported Globals
+ * @{
+ */
+extern MAGNETO_DrvTypeDef Lsm303cDrv_magneto;
+/**
+ * @}
+ */
+
+/** @defgroup LSM303C_Imported_Functions LSM303C IO Imported Functions
+ * @{
+ */
+/* ACCELERO IO functions */
+extern void ACCELERO_IO_Init(void);
+extern void ACCELERO_IO_ITConfig(void);
+extern void ACCELERO_IO_Write(uint8_t RegisterAddr, uint8_t Value);
+extern uint8_t ACCELERO_IO_Read(uint8_t RegisterAddr);
+
+/* MAGNETO IO function */
+extern void MAGNETO_IO_Init(void);
+extern void MAGNETO_IO_ITConfig(void);
+extern void MAGNETO_IO_Write(uint8_t RegisterAddr, uint8_t Value);
+extern uint8_t MAGNETO_IO_Read(uint8_t RegisterAddr);
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __LSM303C_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/P3_SETR2/Components/lsm303dlhc/Release_Notes.html b/P3_SETR2/Components/lsm303dlhc/Release_Notes.html
new file mode 100644
index 0000000..fee755f
--- /dev/null
+++ b/P3_SETR2/Components/lsm303dlhc/Release_Notes.html
@@ -0,0 +1,88 @@
+
+
+
+
+
+
+ Release Notes for LSM303DLHC Component Drivers
+
+
+
+
+
+
+
+
+
+
+Release Notes for LSM303DLHC Component Drivers
+Copyright © 2015 STMicroelectronics
+
+
+
+
+
+
License
+
Licensed by ST under BSD 3-Clause license (the "License"). You may not use this package except in compliance with the License. You may obtain a copy of the License at:
+
https://opensource.org/licenses/BSD-3-Clause
+
Purpose
+
This directory contains the LSM303DLHC component drivers.
+
+
+
Update History
+
+
V2.0.1 / 03-April-2019
+
+
Main Changes
+
+Update release notes format
+Reformat the BSD 3-Clause license declaration in the files header (replace license terms by a web reference to OSI website where those terms lie)
+
+
+
+
+
V2.0.0 / 24-June-2015
+
+
Main Changes
+
+lsm303dlhc.c
+
+Add accelerometer de-initialization function: LSM303DLHC_AccDeInit()
+
+
+
NOTE This release must be used with BSP Common driver V4.0.0 or later
+
+
+
+
V1.0.1 / 21-November-2014
+
+
Main Changes
+
+lsm303dlhc.h: change “\” by “/” in the include path to fix compilation issue under Linux
+Miscellaneous comments update
+
+
+
+
+
V1.0.0 / 18-February-2014
+
+
Main Changes
+
+First official release
+
+
+
+
+
+
+
+
diff --git a/P3_SETR2/Components/lsm303dlhc/lsm303dlhc.c b/P3_SETR2/Components/lsm303dlhc/lsm303dlhc.c
new file mode 100644
index 0000000..55d345d
--- /dev/null
+++ b/P3_SETR2/Components/lsm303dlhc/lsm303dlhc.c
@@ -0,0 +1,560 @@
+/**
+ ******************************************************************************
+ * @file lsm303dlhc.c
+ * @author MCD Application Team
+ * @brief This file provides a set of functions needed to manage the lsm303dlhc
+ * MEMS accelerometer.
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2015 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+/* Includes ------------------------------------------------------------------*/
+#include "lsm303dlhc.h"
+
+/** @addtogroup BSP
+ * @{
+ */
+
+/** @addtogroup Components
+ * @{
+ */
+
+/** @addtogroup LSM303DLHC
+ * @{
+ */
+
+/** @defgroup LSM303DLHC_Private_TypesDefinitions
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @defgroup LSM303DLHC_Private_Defines
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @defgroup LSM303DLHC_Private_Macros
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @defgroup LSM303DLHC_Private_Variables
+ * @{
+ */
+ACCELERO_DrvTypeDef Lsm303dlhcDrv =
+{
+ LSM303DLHC_AccInit,
+ LSM303DLHC_AccDeInit,
+ LSM303DLHC_AccReadID,
+ LSM303DLHC_AccRebootCmd,
+ 0,
+ LSM303DLHC_AccZClickITConfig,
+ 0,
+ 0,
+ 0,
+ 0,
+ LSM303DLHC_AccFilterConfig,
+ LSM303DLHC_AccFilterCmd,
+ LSM303DLHC_AccReadXYZ
+};
+
+/**
+ * @}
+ */
+
+/** @defgroup LSM303DLHC_Private_Functions
+ * @{
+ */
+
+/**
+ * @brief Set LSM303DLHC Initialization.
+ * @param InitStruct: Init parameters
+ * @retval None
+ */
+void LSM303DLHC_AccInit(uint16_t InitStruct)
+{
+ uint8_t ctrl = 0x00;
+
+ /* Low level init */
+ COMPASSACCELERO_IO_Init();
+
+ /* Write value to ACC MEMS CTRL_REG1 register */
+ ctrl = (uint8_t) InitStruct;
+ COMPASSACCELERO_IO_Write(ACC_I2C_ADDRESS, LSM303DLHC_CTRL_REG1_A, ctrl);
+
+ /* Write value to ACC MEMS CTRL_REG4 register */
+ ctrl = (uint8_t) (InitStruct << 8);
+ COMPASSACCELERO_IO_Write(ACC_I2C_ADDRESS, LSM303DLHC_CTRL_REG4_A, ctrl);
+}
+
+/**
+ * @brief LSM303DLHC De-initialization.
+ * @param None
+ * @retval None
+ */
+void LSM303DLHC_AccDeInit(void)
+{
+}
+
+/**
+ * @brief Read LSM303DLHC ID.
+ * @param None
+ * @retval ID
+ */
+uint8_t LSM303DLHC_AccReadID(void)
+{
+ uint8_t ctrl = 0x00;
+
+ /* Low level init */
+ COMPASSACCELERO_IO_Init();
+
+ /* Read value at Who am I register address */
+ ctrl = COMPASSACCELERO_IO_Read(ACC_I2C_ADDRESS, LSM303DLHC_WHO_AM_I_ADDR);
+
+ return ctrl;
+}
+
+/**
+ * @brief Reboot memory content of LSM303DLHC
+ * @param None
+ * @retval None
+ */
+void LSM303DLHC_AccRebootCmd(void)
+{
+ uint8_t tmpreg;
+
+ /* Read CTRL_REG5 register */
+ tmpreg = COMPASSACCELERO_IO_Read(ACC_I2C_ADDRESS, LSM303DLHC_CTRL_REG5_A);
+
+ /* Enable or Disable the reboot memory */
+ tmpreg |= LSM303DLHC_BOOT_REBOOTMEMORY;
+
+ /* Write value to ACC MEMS CTRL_REG5 register */
+ COMPASSACCELERO_IO_Write(ACC_I2C_ADDRESS, LSM303DLHC_CTRL_REG5_A, tmpreg);
+}
+
+/**
+ * @brief Set High Pass Filter Modality
+ * @param FilterStruct: contains data for filter config
+ * @retval None
+ */
+void LSM303DLHC_AccFilterConfig(uint8_t FilterStruct)
+{
+ uint8_t tmpreg;
+
+ /* Read CTRL_REG2 register */
+ tmpreg = COMPASSACCELERO_IO_Read(ACC_I2C_ADDRESS, LSM303DLHC_CTRL_REG2_A);
+
+ tmpreg &= 0x0C;
+ tmpreg |= FilterStruct;
+
+ /* Write value to ACC MEMS CTRL_REG2 register */
+ COMPASSACCELERO_IO_Write(ACC_I2C_ADDRESS, LSM303DLHC_CTRL_REG2_A, tmpreg);
+}
+
+/**
+ * @brief Enable or Disable High Pass Filter
+ * @param HighPassFilterState: new state of the High Pass Filter feature.
+ * This parameter can be:
+ * @arg: LSM303DLHC_HIGHPASSFILTER_DISABLE
+ * @arg: LSM303DLHC_HIGHPASSFILTER_ENABLE
+ * @retval None
+ */
+void LSM303DLHC_AccFilterCmd(uint8_t HighPassFilterState)
+{
+ uint8_t tmpreg;
+
+ /* Read CTRL_REG2 register */
+ tmpreg = COMPASSACCELERO_IO_Read(ACC_I2C_ADDRESS, LSM303DLHC_CTRL_REG2_A);
+
+ tmpreg &= 0xF7;
+
+ tmpreg |= HighPassFilterState;
+
+ /* Write value to ACC MEMS CTRL_REG2 register */
+ COMPASSACCELERO_IO_Write(ACC_I2C_ADDRESS, LSM303DLHC_CTRL_REG2_A, tmpreg);
+}
+
+/**
+ * @brief Read X, Y & Z Acceleration values
+ * @param pData: Data out pointer
+ * @retval None
+ */
+void LSM303DLHC_AccReadXYZ(int16_t* pData)
+{
+ int16_t pnRawData[3];
+ uint8_t ctrlx[2]={0,0};
+ int8_t buffer[6];
+ uint8_t i = 0;
+ uint8_t sensitivity = LSM303DLHC_ACC_SENSITIVITY_2G;
+
+ /* Read the acceleration control register content */
+ ctrlx[0] = COMPASSACCELERO_IO_Read(ACC_I2C_ADDRESS, LSM303DLHC_CTRL_REG4_A);
+ ctrlx[1] = COMPASSACCELERO_IO_Read(ACC_I2C_ADDRESS, LSM303DLHC_CTRL_REG5_A);
+
+ /* Read output register X, Y & Z acceleration */
+ buffer[0] = COMPASSACCELERO_IO_Read(ACC_I2C_ADDRESS, LSM303DLHC_OUT_X_L_A);
+ buffer[1] = COMPASSACCELERO_IO_Read(ACC_I2C_ADDRESS, LSM303DLHC_OUT_X_H_A);
+ buffer[2] = COMPASSACCELERO_IO_Read(ACC_I2C_ADDRESS, LSM303DLHC_OUT_Y_L_A);
+ buffer[3] = COMPASSACCELERO_IO_Read(ACC_I2C_ADDRESS, LSM303DLHC_OUT_Y_H_A);
+ buffer[4] = COMPASSACCELERO_IO_Read(ACC_I2C_ADDRESS, LSM303DLHC_OUT_Z_L_A);
+ buffer[5] = COMPASSACCELERO_IO_Read(ACC_I2C_ADDRESS, LSM303DLHC_OUT_Z_H_A);
+
+ /* Check in the control register4 the data alignment*/
+ if(!(ctrlx[0] & LSM303DLHC_BLE_MSB))
+ {
+ for(i=0; i<3; i++)
+ {
+ pnRawData[i]=((int16_t)((uint16_t)buffer[2*i+1] << 8) + buffer[2*i]);
+ }
+ }
+ else /* Big Endian Mode */
+ {
+ for(i=0; i<3; i++)
+ {
+ pnRawData[i]=((int16_t)((uint16_t)buffer[2*i] << 8) + buffer[2*i+1]);
+ }
+ }
+
+ /* Normal mode */
+ /* Switch the sensitivity value set in the CRTL4 */
+ switch(ctrlx[0] & LSM303DLHC_FULLSCALE_16G)
+ {
+ case LSM303DLHC_FULLSCALE_2G:
+ sensitivity = LSM303DLHC_ACC_SENSITIVITY_2G;
+ break;
+ case LSM303DLHC_FULLSCALE_4G:
+ sensitivity = LSM303DLHC_ACC_SENSITIVITY_4G;
+ break;
+ case LSM303DLHC_FULLSCALE_8G:
+ sensitivity = LSM303DLHC_ACC_SENSITIVITY_8G;
+ break;
+ case LSM303DLHC_FULLSCALE_16G:
+ sensitivity = LSM303DLHC_ACC_SENSITIVITY_16G;
+ break;
+ }
+
+ /* Obtain the mg value for the three axis */
+ for(i=0; i<3; i++)
+ {
+ pData[i]=(pnRawData[i] * sensitivity);
+ }
+}
+
+/**
+ * @brief Enable or Disable High Pass Filter on CLick
+ * @param HighPassFilterState: new state of the High Pass Filter feature.
+ * This parameter can be:
+ * @arg: LSM303DLHC_HPF_CLICK_DISABLE
+ * @arg: LSM303DLHC_HPF_CLICK_ENABLE
+ * @retval None
+ */
+void LSM303DLHC_AccFilterClickCmd(uint8_t HighPassFilterClickState)
+{
+ uint8_t tmpreg = 0x00;
+
+ /* Read CTRL_REG2 register */
+ tmpreg = COMPASSACCELERO_IO_Read(ACC_I2C_ADDRESS, LSM303DLHC_CTRL_REG2_A);
+
+ tmpreg &= ~(LSM303DLHC_HPF_CLICK_ENABLE);
+
+ tmpreg |= HighPassFilterClickState;
+
+ /* Write value to ACC MEMS CTRL_REG2 regsister */
+ COMPASSACCELERO_IO_Write(ACC_I2C_ADDRESS, LSM303DLHC_CTRL_REG2_A, tmpreg);
+}
+
+/**
+ * @brief Enable LSM303DLHC Interrupt1
+ * @param LSM303DLHC_IT: specifies the LSM303DLHC interrupt source to be enabled.
+ * This parameter can be any combination of the following values:
+ * @arg LSM303DLHC_IT1_CLICK
+ * @arg LSM303DLHC_IT1_AOI1
+ * @arg LSM303DLHC_IT1_AOI2
+ * @arg LSM303DLHC_IT1_DRY1
+ * @arg LSM303DLHC_IT1_DRY2
+ * @arg LSM303DLHC_IT1_WTM
+ * @arg LSM303DLHC_IT1_OVERRUN
+ * @retval None
+ */
+void LSM303DLHC_AccIT1Enable(uint8_t LSM303DLHC_IT)
+{
+ uint8_t tmpval = 0x00;
+
+ /* Read CTRL_REG3 register */
+ tmpval = COMPASSACCELERO_IO_Read(ACC_I2C_ADDRESS, LSM303DLHC_CTRL_REG3_A);
+
+ /* Enable IT1 */
+ tmpval |= LSM303DLHC_IT;
+
+ /* Write value to MEMS CTRL_REG3 register */
+ COMPASSACCELERO_IO_Write(ACC_I2C_ADDRESS, LSM303DLHC_CTRL_REG3_A, tmpval);
+}
+
+/**
+ * @brief Disable LSM303DLHC Interrupt1
+ * @param LSM303DLHC_IT: specifies the LSM303DLHC interrupt source to be disabled.
+ * This parameter can be any combination of the following values:
+ * @arg LSM303DLHC_IT1_CLICK
+ * @arg LSM303DLHC_IT1_AOI1
+ * @arg LSM303DLHC_IT1_AOI2
+ * @arg LSM303DLHC_IT1_DRY1
+ * @arg LSM303DLHC_IT1_DRY2
+ * @arg LSM303DLHC_IT1_WTM
+ * @arg LSM303DLHC_IT1_OVERRUN
+ * @retval None
+ */
+void LSM303DLHC_AccIT1Disable(uint8_t LSM303DLHC_IT)
+{
+ uint8_t tmpval = 0x00;
+
+ /* Read CTRL_REG3 register */
+ tmpval = COMPASSACCELERO_IO_Read(ACC_I2C_ADDRESS, LSM303DLHC_CTRL_REG3_A);
+
+ /* Disable IT1 */
+ tmpval &= ~LSM303DLHC_IT;
+
+ /* Write value to MEMS CTRL_REG3 register */
+ COMPASSACCELERO_IO_Write(ACC_I2C_ADDRESS, LSM303DLHC_CTRL_REG3_A, tmpval);
+}
+
+/**
+ * @brief Enable LSM303DLHC Interrupt2
+ * @param LSM303DLHC_IT: specifies the LSM303DLHC interrupt source to be enabled.
+ * This parameter can be any combination of the following values:
+ * @arg LSM303DLHC_IT2_CLICK
+ * @arg LSM303DLHC_IT2_INT1
+ * @arg LSM303DLHC_IT2_INT2
+ * @arg LSM303DLHC_IT2_BOOT
+ * @arg LSM303DLHC_IT2_ACT
+ * @arg LSM303DLHC_IT2_HLACTIVE
+ * @retval None
+ */
+void LSM303DLHC_AccIT2Enable(uint8_t LSM303DLHC_IT)
+{
+ uint8_t tmpval = 0x00;
+
+ /* Read CTRL_REG3 register */
+ tmpval = COMPASSACCELERO_IO_Read(ACC_I2C_ADDRESS, LSM303DLHC_CTRL_REG6_A);
+
+ /* Enable IT2 */
+ tmpval |= LSM303DLHC_IT;
+
+ /* Write value to MEMS CTRL_REG3 register */
+ COMPASSACCELERO_IO_Write(ACC_I2C_ADDRESS, LSM303DLHC_CTRL_REG6_A, tmpval);
+}
+
+/**
+ * @brief Disable LSM303DLHC Interrupt2
+ * @param LSM303DLHC_IT: specifies the LSM303DLHC interrupt source to be disabled.
+ * This parameter can be any combination of the following values:
+ * @arg LSM303DLHC_IT2_CLICK
+ * @arg LSM303DLHC_IT2_INT1
+ * @arg LSM303DLHC_IT2_INT2
+ * @arg LSM303DLHC_IT2_BOOT
+ * @arg LSM303DLHC_IT2_ACT
+ * @arg LSM303DLHC_IT2_HLACTIVE
+ * @retval None
+ */
+void LSM303DLHC_AccIT2Disable(uint8_t LSM303DLHC_IT)
+{
+ uint8_t tmpval = 0x00;
+
+ /* Read CTRL_REG3 register */
+ tmpval = COMPASSACCELERO_IO_Read(ACC_I2C_ADDRESS, LSM303DLHC_CTRL_REG6_A);
+
+ /* Disable IT2 */
+ tmpval &= ~LSM303DLHC_IT;
+
+ /* Write value to MEMS CTRL_REG3 register */
+ COMPASSACCELERO_IO_Write(ACC_I2C_ADDRESS, LSM303DLHC_CTRL_REG6_A, tmpval);
+}
+
+/**
+ * @brief INT1 interrupt enable
+ * @param ITCombination: Or or And combination
+ * ITAxes: Axes to be enabled
+ * @retval None
+ */
+void LSM303DLHC_AccINT1InterruptEnable(uint8_t ITCombination, uint8_t ITAxes)
+{
+ uint8_t tmpval = 0x00;
+
+ /* Read INT1_CFR register */
+ tmpval = COMPASSACCELERO_IO_Read(ACC_I2C_ADDRESS, LSM303DLHC_INT1_CFG_A);
+
+ /* Enable the selected interrupt */
+ tmpval |= (ITAxes | ITCombination);
+
+ /* Write value to MEMS INT1_CFR register */
+ COMPASSACCELERO_IO_Write(ACC_I2C_ADDRESS, LSM303DLHC_INT1_CFG_A, tmpval);
+}
+
+/**
+ * @brief INT1 interrupt disable
+ * @param ITCombination: Or or And combination
+ * ITAxes: Axes to be enabled
+ * @retval None
+ */
+void LSM303DLHC_AccINT1InterruptDisable(uint8_t ITCombination, uint8_t ITAxes)
+{
+ uint8_t tmpval = 0x00;
+
+ /* Read INT1_CFR register */
+ tmpval = COMPASSACCELERO_IO_Read(ACC_I2C_ADDRESS, LSM303DLHC_INT1_CFG_A);
+
+ /* Disable the selected interrupt */
+ tmpval &= ~(ITAxes | ITCombination);
+
+ /* Write value to MEMS INT1_CFR register */
+ COMPASSACCELERO_IO_Write(ACC_I2C_ADDRESS, LSM303DLHC_INT1_CFG_A, tmpval);
+}
+
+/**
+ * @brief INT2 interrupt enable
+ * @param ITCombination: Or or And combination
+ * ITAxes: axes to be enabled
+ * @retval None
+ */
+void LSM303DLHC_AccINT2InterruptEnable(uint8_t ITCombination, uint8_t ITAxes)
+{
+ uint8_t tmpval = 0x00;
+
+ /* Read INT2_CFR register */
+ tmpval = COMPASSACCELERO_IO_Read(ACC_I2C_ADDRESS, LSM303DLHC_INT2_CFG_A);
+
+ /* Enable the selected interrupt */
+ tmpval |= (ITAxes | ITCombination);
+
+ /* Write value to MEMS INT2_CFR register */
+ COMPASSACCELERO_IO_Write(ACC_I2C_ADDRESS, LSM303DLHC_INT2_CFG_A, tmpval);
+}
+
+/**
+ * @brief INT2 interrupt config
+ * @param ITCombination: Or or And combination
+ * ITAxes: axes to be enabled
+ * @retval None
+ */
+void LSM303DLHC_AccINT2InterruptDisable(uint8_t ITCombination, uint8_t ITAxes)
+{
+ uint8_t tmpval = 0x00;
+
+ /* Read INT2_CFR register */
+ tmpval = COMPASSACCELERO_IO_Read(ACC_I2C_ADDRESS, LSM303DLHC_INT2_CFG_A);
+
+ /* Disable the selected interrupt */
+ tmpval &= ~(ITAxes | ITCombination);
+
+ /* Write value to MEMS INT2_CFR register */
+ COMPASSACCELERO_IO_Write(ACC_I2C_ADDRESS, LSM303DLHC_INT2_CFG_A, tmpval);
+}
+
+/**
+ * @brief Click interrupt enable
+ * @param ITClick: the selected interrupt to enable
+ * @retval None
+ */
+void LSM303DLHC_AccClickITEnable(uint8_t ITClick)
+{
+ uint8_t tmpval = 0x00;
+
+ /* Read CLICK_CFR register */
+ tmpval = COMPASSACCELERO_IO_Read(ACC_I2C_ADDRESS, LSM303DLHC_CLICK_CFG_A);
+
+ /* Enable the selected interrupt */
+ tmpval |= ITClick;
+
+ /* Write value to MEMS CLICK CFG register */
+ COMPASSACCELERO_IO_Write(ACC_I2C_ADDRESS, LSM303DLHC_CLICK_CFG_A, tmpval);
+
+ /* Configure Click Threshold on Z axis */
+ tmpval = 0x0A;
+ COMPASSACCELERO_IO_Write(ACC_I2C_ADDRESS, LSM303DLHC_CLICK_THS_A, tmpval);
+
+ /* Configure Time Limit */
+ tmpval = 0x05;
+ COMPASSACCELERO_IO_Write(ACC_I2C_ADDRESS, LSM303DLHC_TIME_LIMIT_A, tmpval);
+
+ /* Configure Latency */
+ COMPASSACCELERO_IO_Write(ACC_I2C_ADDRESS, LSM303DLHC_TIME_LATENCY_A, tmpval);
+
+ /* Configure Click Window */
+ tmpval = 0x32;
+ COMPASSACCELERO_IO_Write(ACC_I2C_ADDRESS, LSM303DLHC_TIME_WINDOW_A, tmpval);
+}
+
+/**
+ * @brief Click interrupt disable
+ * @param ITClick: the selected click interrupt to disable
+ * @retval None
+ */
+void LSM303DLHC_AccClickITDisable(uint8_t ITClick)
+{
+ uint8_t tmpval = 0x00;
+
+ /* Read CLICK_CFR register */
+ tmpval = COMPASSACCELERO_IO_Read(ACC_I2C_ADDRESS, LSM303DLHC_CLICK_CFG_A);
+
+ /* Disable the selected interrupt */
+ tmpval &= ~ITClick;
+
+ /* Write value to MEMS CLICK_CFR register */
+ COMPASSACCELERO_IO_Write(ACC_I2C_ADDRESS, LSM303DLHC_CLICK_CFG_A, tmpval);
+}
+
+/**
+ * @brief Click on Z axis interrupt config
+ * @param None
+ * @retval None
+ */
+void LSM303DLHC_AccZClickITConfig(void)
+{
+ /* Configure low level IT config */
+ COMPASSACCELERO_IO_ITConfig();
+
+ /* Select click IT as INT1 interrupt */
+ LSM303DLHC_AccIT1Enable(LSM303DLHC_IT1_CLICK);
+
+ /* Enable High pass filter for click IT */
+ LSM303DLHC_AccFilterClickCmd(LSM303DLHC_HPF_CLICK_ENABLE);
+
+ /* Enable simple click IT on Z axis, */
+ LSM303DLHC_AccClickITEnable(LSM303DLHC_Z_SINGLE_CLICK);
+}
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/P3_SETR2/Components/lsm303dlhc/lsm303dlhc.h b/P3_SETR2/Components/lsm303dlhc/lsm303dlhc.h
new file mode 100644
index 0000000..13710a4
--- /dev/null
+++ b/P3_SETR2/Components/lsm303dlhc/lsm303dlhc.h
@@ -0,0 +1,480 @@
+/**
+ ******************************************************************************
+ * @file lsm303dlhc.h
+ * @author MCD Application Team
+ * @brief This file contains all the functions prototypes for the lsm303dlhc.c driver.
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2015 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __LSM303DLHC_H
+#define __LSM303DLHC_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "../Common/accelero.h"
+
+/** @addtogroup BSP
+ * @{
+ */
+
+/** @addtogroup Components
+ * @{
+ */
+
+/** @addtogroup LSM303DLHC
+ * @{
+ */
+
+/** @defgroup LSM303DLHC_Exported_Types
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/******************************************************************************/
+/*************************** START REGISTER MAPPING **************************/
+/******************************************************************************/
+/* Exported constant IO ------------------------------------------------------*/
+#define ACC_I2C_ADDRESS 0x32
+#define MAG_I2C_ADDRESS 0x3C
+
+/* Acceleration Registers */
+#define LSM303DLHC_WHO_AM_I_ADDR 0x0F /* device identification register */
+#define LSM303DLHC_CTRL_REG1_A 0x20 /* Control register 1 acceleration */
+#define LSM303DLHC_CTRL_REG2_A 0x21 /* Control register 2 acceleration */
+#define LSM303DLHC_CTRL_REG3_A 0x22 /* Control register 3 acceleration */
+#define LSM303DLHC_CTRL_REG4_A 0x23 /* Control register 4 acceleration */
+#define LSM303DLHC_CTRL_REG5_A 0x24 /* Control register 5 acceleration */
+#define LSM303DLHC_CTRL_REG6_A 0x25 /* Control register 6 acceleration */
+#define LSM303DLHC_REFERENCE_A 0x26 /* Reference register acceleration */
+#define LSM303DLHC_STATUS_REG_A 0x27 /* Status register acceleration */
+#define LSM303DLHC_OUT_X_L_A 0x28 /* Output Register X acceleration */
+#define LSM303DLHC_OUT_X_H_A 0x29 /* Output Register X acceleration */
+#define LSM303DLHC_OUT_Y_L_A 0x2A /* Output Register Y acceleration */
+#define LSM303DLHC_OUT_Y_H_A 0x2B /* Output Register Y acceleration */
+#define LSM303DLHC_OUT_Z_L_A 0x2C /* Output Register Z acceleration */
+#define LSM303DLHC_OUT_Z_H_A 0x2D /* Output Register Z acceleration */
+#define LSM303DLHC_FIFO_CTRL_REG_A 0x2E /* Fifo control Register acceleration */
+#define LSM303DLHC_FIFO_SRC_REG_A 0x2F /* Fifo src Register acceleration */
+
+#define LSM303DLHC_INT1_CFG_A 0x30 /* Interrupt 1 configuration Register acceleration */
+#define LSM303DLHC_INT1_SOURCE_A 0x31 /* Interrupt 1 source Register acceleration */
+#define LSM303DLHC_INT1_THS_A 0x32 /* Interrupt 1 Threshold register acceleration */
+#define LSM303DLHC_INT1_DURATION_A 0x33 /* Interrupt 1 DURATION register acceleration */
+
+#define LSM303DLHC_INT2_CFG_A 0x34 /* Interrupt 2 configuration Register acceleration */
+#define LSM303DLHC_INT2_SOURCE_A 0x35 /* Interrupt 2 source Register acceleration */
+#define LSM303DLHC_INT2_THS_A 0x36 /* Interrupt 2 Threshold register acceleration */
+#define LSM303DLHC_INT2_DURATION_A 0x37 /* Interrupt 2 DURATION register acceleration */
+
+#define LSM303DLHC_CLICK_CFG_A 0x38 /* Click configuration Register acceleration */
+#define LSM303DLHC_CLICK_SOURCE_A 0x39 /* Click 2 source Register acceleration */
+#define LSM303DLHC_CLICK_THS_A 0x3A /* Click 2 Threshold register acceleration */
+
+#define LSM303DLHC_TIME_LIMIT_A 0x3B /* Time Limit Register acceleration */
+#define LSM303DLHC_TIME_LATENCY_A 0x3C /* Time Latency Register acceleration */
+#define LSM303DLHC_TIME_WINDOW_A 0x3D /* Time window register acceleration */
+
+/* Magnetic field Registers */
+#define LSM303DLHC_CRA_REG_M 0x00 /* Control register A magnetic field */
+#define LSM303DLHC_CRB_REG_M 0x01 /* Control register B magnetic field */
+#define LSM303DLHC_MR_REG_M 0x02 /* Control register MR magnetic field */
+#define LSM303DLHC_OUT_X_H_M 0x03 /* Output Register X magnetic field */
+#define LSM303DLHC_OUT_X_L_M 0x04 /* Output Register X magnetic field */
+#define LSM303DLHC_OUT_Z_H_M 0x05 /* Output Register Z magnetic field */
+#define LSM303DLHC_OUT_Z_L_M 0x06 /* Output Register Z magnetic field */
+#define LSM303DLHC_OUT_Y_H_M 0x07 /* Output Register Y magnetic field */
+#define LSM303DLHC_OUT_Y_L_M 0x08 /* Output Register Y magnetic field */
+
+#define LSM303DLHC_SR_REG_M 0x09 /* Status Register magnetic field */
+#define LSM303DLHC_IRA_REG_M 0x0A /* IRA Register magnetic field */
+#define LSM303DLHC_IRB_REG_M 0x0B /* IRB Register magnetic field */
+#define LSM303DLHC_IRC_REG_M 0x0C /* IRC Register magnetic field */
+
+#define LSM303DLHC_TEMP_OUT_H_M 0x31 /* Temperature Register magnetic field */
+#define LSM303DLHC_TEMP_OUT_L_M 0x32 /* Temperature Register magnetic field */
+
+/******************************************************************************/
+/**************************** END REGISTER MAPPING ***************************/
+/******************************************************************************/
+
+#define I_AM_LMS303DLHC ((uint8_t)0x33)
+
+/** @defgroup Acc_Power_Mode_selection
+ * @{
+ */
+#define LSM303DLHC_NORMAL_MODE ((uint8_t)0x00)
+#define LSM303DLHC_LOWPOWER_MODE ((uint8_t)0x08)
+/**
+ * @}
+ */
+
+/** @defgroup Acc_OutPut_DataRate_Selection
+ * @{
+ */
+#define LSM303DLHC_ODR_1_HZ ((uint8_t)0x10) /*!< Output Data Rate = 1 Hz */
+#define LSM303DLHC_ODR_10_HZ ((uint8_t)0x20) /*!< Output Data Rate = 10 Hz */
+#define LSM303DLHC_ODR_25_HZ ((uint8_t)0x30) /*!< Output Data Rate = 25 Hz */
+#define LSM303DLHC_ODR_50_HZ ((uint8_t)0x40) /*!< Output Data Rate = 50 Hz */
+#define LSM303DLHC_ODR_100_HZ ((uint8_t)0x50) /*!< Output Data Rate = 100 Hz */
+#define LSM303DLHC_ODR_200_HZ ((uint8_t)0x60) /*!< Output Data Rate = 200 Hz */
+#define LSM303DLHC_ODR_400_HZ ((uint8_t)0x70) /*!< Output Data Rate = 400 Hz */
+#define LSM303DLHC_ODR_1620_HZ_LP ((uint8_t)0x80) /*!< Output Data Rate = 1620 Hz only in Low Power Mode */
+#define LSM303DLHC_ODR_1344_HZ ((uint8_t)0x90) /*!< Output Data Rate = 1344 Hz in Normal mode and 5376 Hz in Low Power Mode */
+/**
+ * @}
+ */
+
+/** @defgroup Acc_Axes_Selection
+ * @{
+ */
+#define LSM303DLHC_X_ENABLE ((uint8_t)0x01)
+#define LSM303DLHC_Y_ENABLE ((uint8_t)0x02)
+#define LSM303DLHC_Z_ENABLE ((uint8_t)0x04)
+#define LSM303DLHC_AXES_ENABLE ((uint8_t)0x07)
+#define LSM303DLHC_AXES_DISABLE ((uint8_t)0x00)
+/**
+ * @}
+ */
+
+/** @defgroup Acc_High_Resolution
+ * @{
+ */
+#define LSM303DLHC_HR_ENABLE ((uint8_t)0x08)
+#define LSM303DLHC_HR_DISABLE ((uint8_t)0x00)
+/**
+ * @}
+ */
+
+/** @defgroup Acc_Full_Scale_Selection
+ * @{
+ */
+#define LSM303DLHC_FULLSCALE_2G ((uint8_t)0x00) /*!< 2 g */
+#define LSM303DLHC_FULLSCALE_4G ((uint8_t)0x10) /*!< 4 g */
+#define LSM303DLHC_FULLSCALE_8G ((uint8_t)0x20) /*!< 8 g */
+#define LSM303DLHC_FULLSCALE_16G ((uint8_t)0x30) /*!< 16 g */
+/**
+ * @}
+ */
+
+/** @defgroup Acc_Full_Scale_Selection
+ * @{
+ */
+#define LSM303DLHC_ACC_SENSITIVITY_2G ((uint8_t)1) /*!< accelerometer sensitivity with 2 g full scale [mg/LSB] */
+#define LSM303DLHC_ACC_SENSITIVITY_4G ((uint8_t)2) /*!< accelerometer sensitivity with 4 g full scale [mg/LSB] */
+#define LSM303DLHC_ACC_SENSITIVITY_8G ((uint8_t)4) /*!< accelerometer sensitivity with 8 g full scale [mg/LSB] */
+#define LSM303DLHC_ACC_SENSITIVITY_16G ((uint8_t)12) /*!< accelerometer sensitivity with 12 g full scale [mg/LSB] */
+/**
+ * @}
+ */
+
+/** @defgroup Acc_Block_Data_Update
+ * @{
+ */
+#define LSM303DLHC_BlockUpdate_Continous ((uint8_t)0x00) /*!< Continuos Update */
+#define LSM303DLHC_BlockUpdate_Single ((uint8_t)0x80) /*!< Single Update: output registers not updated until MSB and LSB reading */
+/**
+ * @}
+ */
+
+/** @defgroup Acc_Endian_Data_selection
+ * @{
+ */
+#define LSM303DLHC_BLE_LSB ((uint8_t)0x00) /*!< Little Endian: data LSB @ lower address */
+#define LSM303DLHC_BLE_MSB ((uint8_t)0x40) /*!< Big Endian: data MSB @ lower address */
+/**
+ * @}
+ */
+
+/** @defgroup Acc_Boot_Mode_selection
+ * @{
+ */
+#define LSM303DLHC_BOOT_NORMALMODE ((uint8_t)0x00)
+#define LSM303DLHC_BOOT_REBOOTMEMORY ((uint8_t)0x80)
+/**
+ * @}
+ */
+
+/** @defgroup Acc_High_Pass_Filter_Mode
+ * @{
+ */
+#define LSM303DLHC_HPM_NORMAL_MODE_RES ((uint8_t)0x00)
+#define LSM303DLHC_HPM_REF_SIGNAL ((uint8_t)0x40)
+#define LSM303DLHC_HPM_NORMAL_MODE ((uint8_t)0x80)
+#define LSM303DLHC_HPM_AUTORESET_INT ((uint8_t)0xC0)
+/**
+ * @}
+ */
+
+/** @defgroup Acc_High_Pass_CUT OFF_Frequency
+ * @{
+ */
+#define LSM303DLHC_HPFCF_8 ((uint8_t)0x00)
+#define LSM303DLHC_HPFCF_16 ((uint8_t)0x10)
+#define LSM303DLHC_HPFCF_32 ((uint8_t)0x20)
+#define LSM303DLHC_HPFCF_64 ((uint8_t)0x30)
+/**
+ * @}
+ */
+
+/** @defgroup Acc_High_Pass_Filter_status
+ * @{
+ */
+#define LSM303DLHC_HIGHPASSFILTER_DISABLE ((uint8_t)0x00)
+#define LSM303DLHC_HIGHPASSFILTER_ENABLE ((uint8_t)0x08)
+/**
+ * @}
+ */
+
+/** @defgroup Acc_High_Pass_Filter_Click_status
+ * @{
+ */
+#define LSM303DLHC_HPF_CLICK_DISABLE ((uint8_t)0x00)
+#define LSM303DLHC_HPF_CLICK_ENABLE ((uint8_t)0x04)
+/**
+ * @}
+ */
+
+/** @defgroup Acc_High_Pass_Filter_AOI1_status
+ * @{
+ */
+#define LSM303DLHC_HPF_AOI1_DISABLE ((uint8_t)0x00)
+#define LSM303DLHC_HPF_AOI1_ENABLE ((uint8_t)0x01)
+/**
+ * @}
+ */
+
+/** @defgroup Acc_High_Pass_Filter_AOI2_status
+ * @{
+ */
+#define LSM303DLHC_HPF_AOI2_DISABLE ((uint8_t)0x00)
+#define LSM303DLHC_HPF_AOI2_ENABLE ((uint8_t)0x02)
+/**
+ * @}
+ */
+
+/** @defgroup Acc_Interrupt1_Configuration_definition
+ * @{
+ */
+#define LSM303DLHC_IT1_CLICK ((uint8_t)0x80)
+#define LSM303DLHC_IT1_AOI1 ((uint8_t)0x40)
+#define LSM303DLHC_IT1_AOI2 ((uint8_t)0x20)
+#define LSM303DLHC_IT1_DRY1 ((uint8_t)0x10)
+#define LSM303DLHC_IT1_DRY2 ((uint8_t)0x08)
+#define LSM303DLHC_IT1_WTM ((uint8_t)0x04)
+#define LSM303DLHC_IT1_OVERRUN ((uint8_t)0x02)
+/**
+ * @}
+ */
+
+/** @defgroup Acc_Interrupt2_Configuration_definition
+ * @{
+ */
+#define LSM303DLHC_IT2_CLICK ((uint8_t)0x80)
+#define LSM303DLHC_IT2_INT1 ((uint8_t)0x40)
+#define LSM303DLHC_IT2_INT2 ((uint8_t)0x20)
+#define LSM303DLHC_IT2_BOOT ((uint8_t)0x10)
+#define LSM303DLHC_IT2_ACT ((uint8_t)0x08)
+#define LSM303DLHC_IT2_HLACTIVE ((uint8_t)0x02)
+/**
+ * @}
+ */
+
+/** @defgroup Acc_INT_Combination_Status
+ * @{
+ */
+#define LSM303DLHC_OR_COMBINATION ((uint8_t)0x00) /*!< OR combination of enabled IRQs */
+#define LSM303DLHC_AND_COMBINATION ((uint8_t)0x80) /*!< AND combination of enabled IRQs */
+#define LSM303DLHC_MOV_RECOGNITION ((uint8_t)0x40) /*!< 6D movement recognition */
+#define LSM303DLHC_POS_RECOGNITION ((uint8_t)0xC0) /*!< 6D position recognition */
+/**
+ * @}
+ */
+
+/** @defgroup Acc_INT_Axes
+ * @{
+ */
+#define LSM303DLHC_Z_HIGH ((uint8_t)0x20) /*!< Z High enabled IRQs */
+#define LSM303DLHC_Z_LOW ((uint8_t)0x10) /*!< Z low enabled IRQs */
+#define LSM303DLHC_Y_HIGH ((uint8_t)0x08) /*!< Y High enabled IRQs */
+#define LSM303DLHC_Y_LOW ((uint8_t)0x04) /*!< Y low enabled IRQs */
+#define LSM303DLHC_X_HIGH ((uint8_t)0x02) /*!< X High enabled IRQs */
+#define LSM303DLHC_X_LOW ((uint8_t)0x01) /*!< X low enabled IRQs */
+/**
+ * @}
+ */
+
+/** @defgroup Acc_INT_Click
+* @{
+*/
+#define LSM303DLHC_Z_DOUBLE_CLICK ((uint8_t)0x20) /*!< Z double click IRQs */
+#define LSM303DLHC_Z_SINGLE_CLICK ((uint8_t)0x10) /*!< Z single click IRQs */
+#define LSM303DLHC_Y_DOUBLE_CLICK ((uint8_t)0x08) /*!< Y double click IRQs */
+#define LSM303DLHC_Y_SINGLE_CLICK ((uint8_t)0x04) /*!< Y single click IRQs */
+#define LSM303DLHC_X_DOUBLE_CLICK ((uint8_t)0x02) /*!< X double click IRQs */
+#define LSM303DLHC_X_SINGLE_CLICK ((uint8_t)0x01) /*!< X single click IRQs */
+/**
+* @}
+*/
+
+/** @defgroup Acc_INT1_Interrupt_status
+ * @{
+ */
+#define LSM303DLHC_INT1INTERRUPT_DISABLE ((uint8_t)0x00)
+#define LSM303DLHC_INT1INTERRUPT_ENABLE ((uint8_t)0x80)
+/**
+ * @}
+ */
+
+/** @defgroup Acc_INT1_Interrupt_ActiveEdge
+ * @{
+ */
+#define LSM303DLHC_INT1INTERRUPT_LOW_EDGE ((uint8_t)0x20)
+#define LSM303DLHC_INT1INTERRUPT_HIGH_EDGE ((uint8_t)0x00)
+/**
+ * @}
+ */
+
+/** @defgroup Mag_Data_Rate
+ * @{
+ */
+#define LSM303DLHC_ODR_0_75_HZ ((uint8_t) 0x00) /*!< Output Data Rate = 0.75 Hz */
+#define LSM303DLHC_ODR_1_5_HZ ((uint8_t) 0x04) /*!< Output Data Rate = 1.5 Hz */
+#define LSM303DLHC_ODR_3_0_HZ ((uint8_t) 0x08) /*!< Output Data Rate = 3 Hz */
+#define LSM303DLHC_ODR_7_5_HZ ((uint8_t) 0x0C) /*!< Output Data Rate = 7.5 Hz */
+#define LSM303DLHC_ODR_15_HZ ((uint8_t) 0x10) /*!< Output Data Rate = 15 Hz */
+#define LSM303DLHC_ODR_30_HZ ((uint8_t) 0x14) /*!< Output Data Rate = 30 Hz */
+#define LSM303DLHC_ODR_75_HZ ((uint8_t) 0x18) /*!< Output Data Rate = 75 Hz */
+#define LSM303DLHC_ODR_220_HZ ((uint8_t) 0x1C) /*!< Output Data Rate = 220 Hz */
+/**
+ * @}
+ */
+
+/** @defgroup Mag_Full_Scale
+ * @{
+ */
+#define LSM303DLHC_FS_1_3_GA ((uint8_t) 0x20) /*!< Full scale = 1.3 Gauss */
+#define LSM303DLHC_FS_1_9_GA ((uint8_t) 0x40) /*!< Full scale = 1.9 Gauss */
+#define LSM303DLHC_FS_2_5_GA ((uint8_t) 0x60) /*!< Full scale = 2.5 Gauss */
+#define LSM303DLHC_FS_4_0_GA ((uint8_t) 0x80) /*!< Full scale = 4.0 Gauss */
+#define LSM303DLHC_FS_4_7_GA ((uint8_t) 0xA0) /*!< Full scale = 4.7 Gauss */
+#define LSM303DLHC_FS_5_6_GA ((uint8_t) 0xC0) /*!< Full scale = 5.6 Gauss */
+#define LSM303DLHC_FS_8_1_GA ((uint8_t) 0xE0) /*!< Full scale = 8.1 Gauss */
+/**
+ * @}
+ */
+
+/**
+ * @defgroup Magnetometer_Sensitivity
+ * @{
+ */
+#define LSM303DLHC_M_SENSITIVITY_XY_1_3Ga 1100 /*!< magnetometer X Y axes sensitivity for 1.3 Ga full scale [LSB/Ga] */
+#define LSM303DLHC_M_SENSITIVITY_XY_1_9Ga 855 /*!< magnetometer X Y axes sensitivity for 1.9 Ga full scale [LSB/Ga] */
+#define LSM303DLHC_M_SENSITIVITY_XY_2_5Ga 670 /*!< magnetometer X Y axes sensitivity for 2.5 Ga full scale [LSB/Ga] */
+#define LSM303DLHC_M_SENSITIVITY_XY_4Ga 450 /*!< magnetometer X Y axes sensitivity for 4 Ga full scale [LSB/Ga] */
+#define LSM303DLHC_M_SENSITIVITY_XY_4_7Ga 400 /*!< magnetometer X Y axes sensitivity for 4.7 Ga full scale [LSB/Ga] */
+#define LSM303DLHC_M_SENSITIVITY_XY_5_6Ga 330 /*!< magnetometer X Y axes sensitivity for 5.6 Ga full scale [LSB/Ga] */
+#define LSM303DLHC_M_SENSITIVITY_XY_8_1Ga 230 /*!< magnetometer X Y axes sensitivity for 8.1 Ga full scale [LSB/Ga] */
+#define LSM303DLHC_M_SENSITIVITY_Z_1_3Ga 980 /*!< magnetometer Z axis sensitivity for 1.3 Ga full scale [LSB/Ga] */
+#define LSM303DLHC_M_SENSITIVITY_Z_1_9Ga 760 /*!< magnetometer Z axis sensitivity for 1.9 Ga full scale [LSB/Ga] */
+#define LSM303DLHC_M_SENSITIVITY_Z_2_5Ga 600 /*!< magnetometer Z axis sensitivity for 2.5 Ga full scale [LSB/Ga] */
+#define LSM303DLHC_M_SENSITIVITY_Z_4Ga 400 /*!< magnetometer Z axis sensitivity for 4 Ga full scale [LSB/Ga] */
+#define LSM303DLHC_M_SENSITIVITY_Z_4_7Ga 355 /*!< magnetometer Z axis sensitivity for 4.7 Ga full scale [LSB/Ga] */
+#define LSM303DLHC_M_SENSITIVITY_Z_5_6Ga 295 /*!< magnetometer Z axis sensitivity for 5.6 Ga full scale [LSB/Ga] */
+#define LSM303DLHC_M_SENSITIVITY_Z_8_1Ga 205 /*!< magnetometer Z axis sensitivity for 8.1 Ga full scale [LSB/Ga] */
+/**
+ * @}
+ */
+
+/** @defgroup Mag_Working_Mode
+ * @{
+ */
+#define LSM303DLHC_CONTINUOS_CONVERSION ((uint8_t) 0x00) /*!< Continuous-Conversion Mode */
+#define LSM303DLHC_SINGLE_CONVERSION ((uint8_t) 0x01) /*!< Single-Conversion Mode */
+#define LSM303DLHC_SLEEP ((uint8_t) 0x02) /*!< Sleep Mode */
+/**
+ * @}
+ */
+
+/** @defgroup Mag_Temperature_Sensor
+ * @{
+ */
+#define LSM303DLHC_TEMPSENSOR_ENABLE ((uint8_t) 0x80) /*!< Temp sensor Enable */
+#define LSM303DLHC_TEMPSENSOR_DISABLE ((uint8_t) 0x00) /*!< Temp sensor Disable */
+/**
+ * @}
+ */
+
+/** @defgroup LSM303DLHC_Exported_Functions
+ * @{
+ */
+/* ACC functions */
+void LSM303DLHC_AccInit(uint16_t InitStruct);
+void LSM303DLHC_AccDeInit(void);
+uint8_t LSM303DLHC_AccReadID(void);
+void LSM303DLHC_AccRebootCmd(void);
+void LSM303DLHC_AccFilterConfig(uint8_t FilterStruct);
+void LSM303DLHC_AccFilterCmd(uint8_t HighPassFilterState);
+void LSM303DLHC_AccReadXYZ(int16_t* pData);
+void LSM303DLHC_AccFilterClickCmd(uint8_t HighPassFilterClickState);
+void LSM303DLHC_AccIT1Enable(uint8_t LSM303DLHC_IT);
+void LSM303DLHC_AccIT1Disable(uint8_t LSM303DLHC_IT);
+void LSM303DLHC_AccIT2Enable(uint8_t LSM303DLHC_IT);
+void LSM303DLHC_AccIT2Disable(uint8_t LSM303DLHC_IT);
+void LSM303DLHC_AccINT1InterruptEnable(uint8_t ITCombination, uint8_t ITAxes);
+void LSM303DLHC_AccINT1InterruptDisable(uint8_t ITCombination, uint8_t ITAxes);
+void LSM303DLHC_AccINT2InterruptEnable(uint8_t ITCombination, uint8_t ITAxes);
+void LSM303DLHC_AccINT2InterruptDisable(uint8_t ITCombination, uint8_t ITAxes);
+void LSM303DLHC_AccClickITEnable(uint8_t ITClick);
+void LSM303DLHC_AccClickITDisable(uint8_t ITClick);
+void LSM303DLHC_AccZClickITConfig(void);
+
+/* COMPASS / ACCELERO IO functions */
+void COMPASSACCELERO_IO_Init(void);
+void COMPASSACCELERO_IO_ITConfig(void);
+void COMPASSACCELERO_IO_Write(uint16_t DeviceAddr, uint8_t RegisterAddr, uint8_t Value);
+uint8_t COMPASSACCELERO_IO_Read(uint16_t DeviceAddr, uint8_t RegisterAddr);
+
+/* ACC driver structure */
+extern ACCELERO_DrvTypeDef Lsm303dlhcDrv;
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __LSM303DLHC_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/P3_SETR2/Components/lsm6dsl/Release_Notes.html b/P3_SETR2/Components/lsm6dsl/Release_Notes.html
new file mode 100644
index 0000000..59bda3c
--- /dev/null
+++ b/P3_SETR2/Components/lsm6dsl/Release_Notes.html
@@ -0,0 +1,65 @@
+
+
+
+
+
+
+ Release Notes for LSM6DSL Component Drivers
+
+
+
+
+
+
+
+
+
+
+Release Notes for LSM6DSL Component Drivers
+Copyright © 2017 STMicroelectronics
+
+
+
+
+
+
License
+
Licensed by ST under BSD 3-Clause license (the "License"). You may not use this package except in compliance with the License. You may obtain a copy of the License at:
+
https://opensource.org/licenses/BSD-3-Clause
+
Purpose
+
This directory contains the LSM6DSL component drivers.
+
+
+
Update History
+
+
V1.0.1 / 03-April-2019
+
+
Main Changes
+
+Update release notes format
+Reformat the BSD 3-Clause license declaration in the files header (replace license terms by a web reference to OSI website where those terms lie)
+
+
+
+
+
V1.0.0 / 14-February-2017
+
+
Main Changes
+
+First official release of LSM6DSL Accelerometer/Gyroscope sensor
+
+
+
+
+
+
+
+
diff --git a/P3_SETR2/Components/lsm6dsl/lsm6dsl.c b/P3_SETR2/Components/lsm6dsl/lsm6dsl.c
new file mode 100644
index 0000000..e80cfc4
--- /dev/null
+++ b/P3_SETR2/Components/lsm6dsl/lsm6dsl.c
@@ -0,0 +1,376 @@
+/**
+ ******************************************************************************
+ * @file lsm6dsl.c
+ * @author MCD Application Team
+ * @brief This file provides a set of functions needed to manage the LSM6DSL
+ * accelero and gyro devices
+ ******************************************************************************
+ * @attention
+ *
+ * <© Copyright (c) 2017 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/* Includes ------------------------------------------------------------------*/
+#include "lsm6dsl.h"
+
+/** @addtogroup BSP
+ * @{
+ */
+
+/** @addtogroup Component
+ * @{
+ */
+
+/** @defgroup LSM6DSL LSM6DSL
+ * @{
+ */
+
+/** @defgroup LSM6DSL_Private_Variables LSM6DSL Private Variables
+ * @{
+ */
+ACCELERO_DrvTypeDef Lsm6dslAccDrv =
+{
+ LSM6DSL_AccInit,
+ LSM6DSL_AccDeInit,
+ LSM6DSL_AccReadID,
+ 0,
+ LSM6DSL_AccLowPower,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ LSM6DSL_AccReadXYZ
+};
+
+GYRO_DrvTypeDef Lsm6dslGyroDrv =
+{
+ LSM6DSL_GyroInit,
+ LSM6DSL_GyroDeInit,
+ LSM6DSL_GyroReadID,
+ 0,
+ LSM6DSL_GyroLowPower,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ LSM6DSL_GyroReadXYZAngRate
+};
+/**
+ * @}
+ */
+
+/** @defgroup LSM6DSL_ACC_Private_Functions LSM6DSL ACC Private Functions
+ * @{
+ */
+/**
+ * @brief Set LSM6DSL Accelerometer Initialization.
+ * @param InitStruct: Init parameters
+ */
+void LSM6DSL_AccInit(uint16_t InitStruct)
+{
+ uint8_t ctrl = 0x00;
+ uint8_t tmp;
+
+ /* Read CTRL1_XL */
+ tmp = SENSOR_IO_Read(LSM6DSL_ACC_GYRO_I2C_ADDRESS_LOW, LSM6DSL_ACC_GYRO_CTRL1_XL);
+
+ /* Write value to ACC MEMS CTRL1_XL register: FS and Data Rate */
+ ctrl = (uint8_t) InitStruct;
+ tmp &= ~(0xFC);
+ tmp |= ctrl;
+ SENSOR_IO_Write(LSM6DSL_ACC_GYRO_I2C_ADDRESS_LOW, LSM6DSL_ACC_GYRO_CTRL1_XL, tmp);
+
+ /* Read CTRL3_C */
+ tmp = SENSOR_IO_Read(LSM6DSL_ACC_GYRO_I2C_ADDRESS_LOW, LSM6DSL_ACC_GYRO_CTRL3_C);
+
+ /* Write value to ACC MEMS CTRL3_C register: BDU and Auto-increment */
+ ctrl = ((uint8_t) (InitStruct >> 8));
+ tmp &= ~(0x44);
+ tmp |= ctrl;
+ SENSOR_IO_Write(LSM6DSL_ACC_GYRO_I2C_ADDRESS_LOW, LSM6DSL_ACC_GYRO_CTRL3_C, tmp);
+}
+
+/**
+ * @brief LSM6DSL Accelerometer De-initialization.
+ */
+void LSM6DSL_AccDeInit(void)
+{
+ uint8_t ctrl = 0x00;
+
+ /* Read control register 1 value */
+ ctrl = SENSOR_IO_Read(LSM6DSL_ACC_GYRO_I2C_ADDRESS_LOW, LSM6DSL_ACC_GYRO_CTRL1_XL);
+
+ /* Clear ODR bits */
+ ctrl &= ~(LSM6DSL_ODR_BITPOSITION);
+
+ /* Set Power down */
+ ctrl |= LSM6DSL_ODR_POWER_DOWN;
+
+ /* write back control register */
+ SENSOR_IO_Write(LSM6DSL_ACC_GYRO_I2C_ADDRESS_LOW, LSM6DSL_ACC_GYRO_CTRL1_XL, ctrl);
+}
+
+/**
+ * @brief Read LSM6DSL ID.
+ * @retval ID
+ */
+uint8_t LSM6DSL_AccReadID(void)
+{
+ /* IO interface initialization */
+ SENSOR_IO_Init();
+ /* Read value at Who am I register address */
+ return (SENSOR_IO_Read(LSM6DSL_ACC_GYRO_I2C_ADDRESS_LOW, LSM6DSL_ACC_GYRO_WHO_AM_I_REG));
+}
+
+/**
+ * @brief Set/Unset Accelerometer in low power mode.
+ * @param status 0 means disable Low Power Mode, otherwise Low Power Mode is enabled
+ */
+void LSM6DSL_AccLowPower(uint16_t status)
+{
+ uint8_t ctrl = 0x00;
+
+ /* Read CTRL6_C value */
+ ctrl = SENSOR_IO_Read(LSM6DSL_ACC_GYRO_I2C_ADDRESS_LOW, LSM6DSL_ACC_GYRO_CTRL6_C);
+
+ /* Clear Low Power Mode bit */
+ ctrl &= ~(0x10);
+
+ /* Set Low Power Mode */
+ if(status)
+ {
+ ctrl |= LSM6DSL_ACC_GYRO_LP_XL_ENABLED;
+ }else
+ {
+ ctrl |= LSM6DSL_ACC_GYRO_LP_XL_DISABLED;
+ }
+
+ /* write back control register */
+ SENSOR_IO_Write(LSM6DSL_ACC_GYRO_I2C_ADDRESS_LOW, LSM6DSL_ACC_GYRO_CTRL6_C, ctrl);
+}
+
+/**
+ * @brief Read X, Y & Z Acceleration values
+ * @param pData: Data out pointer
+ */
+void LSM6DSL_AccReadXYZ(int16_t* pData)
+{
+ int16_t pnRawData[3];
+ uint8_t ctrlx= 0;
+ uint8_t buffer[6];
+ uint8_t i = 0;
+ float sensitivity = 0;
+
+ /* Read the acceleration control register content */
+ ctrlx = SENSOR_IO_Read(LSM6DSL_ACC_GYRO_I2C_ADDRESS_LOW, LSM6DSL_ACC_GYRO_CTRL1_XL);
+
+ /* Read output register X, Y & Z acceleration */
+ SENSOR_IO_ReadMultiple(LSM6DSL_ACC_GYRO_I2C_ADDRESS_LOW, LSM6DSL_ACC_GYRO_OUTX_L_XL, buffer, 6);
+
+ for(i=0; i<3; i++)
+ {
+ pnRawData[i]=((((uint16_t)buffer[2*i+1]) << 8) + (uint16_t)buffer[2*i]);
+ }
+
+ /* Normal mode */
+ /* Switch the sensitivity value set in the CRTL1_XL */
+ switch(ctrlx & 0x0C)
+ {
+ case LSM6DSL_ACC_FULLSCALE_2G:
+ sensitivity = LSM6DSL_ACC_SENSITIVITY_2G;
+ break;
+ case LSM6DSL_ACC_FULLSCALE_4G:
+ sensitivity = LSM6DSL_ACC_SENSITIVITY_4G;
+ break;
+ case LSM6DSL_ACC_FULLSCALE_8G:
+ sensitivity = LSM6DSL_ACC_SENSITIVITY_8G;
+ break;
+ case LSM6DSL_ACC_FULLSCALE_16G:
+ sensitivity = LSM6DSL_ACC_SENSITIVITY_16G;
+ break;
+ }
+
+ /* Obtain the mg value for the three axis */
+ for(i=0; i<3; i++)
+ {
+ pData[i]=( int16_t )(pnRawData[i] * sensitivity);
+ }
+}
+
+/**
+ * @}
+ */
+
+/** @defgroup LSM6DSL_GYRO_Private_Functions LSM6DSL GYRO Private Functions
+ * @{
+ */
+
+/**
+ * @brief Set LSM6DSL Gyroscope Initialization.
+ * @param InitStruct: pointer to a LSM6DSL_InitTypeDef structure
+ * that contains the configuration setting for the LSM6DSL.
+ */
+void LSM6DSL_GyroInit(uint16_t InitStruct)
+{
+ uint8_t ctrl = 0x00;
+ uint8_t tmp;
+
+ /* Read CTRL2_G */
+ tmp = SENSOR_IO_Read(LSM6DSL_ACC_GYRO_I2C_ADDRESS_LOW, LSM6DSL_ACC_GYRO_CTRL2_G);
+
+ /* Write value to GYRO MEMS CTRL2_G register: FS and Data Rate */
+ ctrl = (uint8_t) InitStruct;
+ tmp &= ~(0xFC);
+ tmp |= ctrl;
+ SENSOR_IO_Write(LSM6DSL_ACC_GYRO_I2C_ADDRESS_LOW, LSM6DSL_ACC_GYRO_CTRL2_G, tmp);
+
+ /* Read CTRL3_C */
+ tmp = SENSOR_IO_Read(LSM6DSL_ACC_GYRO_I2C_ADDRESS_LOW, LSM6DSL_ACC_GYRO_CTRL3_C);
+
+ /* Write value to GYRO MEMS CTRL3_C register: BDU and Auto-increment */
+ ctrl = ((uint8_t) (InitStruct >> 8));
+ tmp &= ~(0x44);
+ tmp |= ctrl;
+ SENSOR_IO_Write(LSM6DSL_ACC_GYRO_I2C_ADDRESS_LOW, LSM6DSL_ACC_GYRO_CTRL3_C, tmp);
+}
+
+
+/**
+ * @brief LSM6DSL Gyroscope De-initialization
+ */
+void LSM6DSL_GyroDeInit(void)
+{
+ uint8_t ctrl = 0x00;
+
+ /* Read control register 1 value */
+ ctrl = SENSOR_IO_Read(LSM6DSL_ACC_GYRO_I2C_ADDRESS_LOW, LSM6DSL_ACC_GYRO_CTRL2_G);
+
+ /* Clear ODR bits */
+ ctrl &= ~(LSM6DSL_ODR_BITPOSITION);
+
+ /* Set Power down */
+ ctrl |= LSM6DSL_ODR_POWER_DOWN;
+
+ /* write back control register */
+ SENSOR_IO_Write(LSM6DSL_ACC_GYRO_I2C_ADDRESS_LOW, LSM6DSL_ACC_GYRO_CTRL2_G, ctrl);
+}
+
+/**
+ * @brief Read ID address of LSM6DSL
+ * @retval ID
+ */
+uint8_t LSM6DSL_GyroReadID(void)
+{
+ /* IO interface initialization */
+ SENSOR_IO_Init();
+ /* Read value at Who am I register address */
+ return SENSOR_IO_Read(LSM6DSL_ACC_GYRO_I2C_ADDRESS_LOW, LSM6DSL_ACC_GYRO_WHO_AM_I_REG);
+}
+
+/**
+ * @brief Set/Unset LSM6DSL Gyroscope in low power mode
+ * @param status 0 means disable Low Power Mode, otherwise Low Power Mode is enabled
+ */
+void LSM6DSL_GyroLowPower(uint16_t status)
+{
+ uint8_t ctrl = 0x00;
+
+ /* Read CTRL7_G value */
+ ctrl = SENSOR_IO_Read(LSM6DSL_ACC_GYRO_I2C_ADDRESS_LOW, LSM6DSL_ACC_GYRO_CTRL7_G);
+
+ /* Clear Low Power Mode bit */
+ ctrl &= ~(0x80);
+
+ /* Set Low Power Mode */
+ if(status)
+ {
+ ctrl |= LSM6DSL_ACC_GYRO_LP_G_ENABLED;
+ }else
+ {
+ ctrl |= LSM6DSL_ACC_GYRO_LP_G_DISABLED;
+ }
+
+ /* write back control register */
+ SENSOR_IO_Write(LSM6DSL_ACC_GYRO_I2C_ADDRESS_LOW, LSM6DSL_ACC_GYRO_CTRL7_G, ctrl);
+}
+
+/**
+* @brief Calculate the LSM6DSL angular data.
+* @param pfData: Data out pointer
+*/
+void LSM6DSL_GyroReadXYZAngRate(float *pfData)
+{
+ int16_t pnRawData[3];
+ uint8_t ctrlg= 0;
+ uint8_t buffer[6];
+ uint8_t i = 0;
+ float sensitivity = 0;
+
+ /* Read the gyro control register content */
+ ctrlg = SENSOR_IO_Read(LSM6DSL_ACC_GYRO_I2C_ADDRESS_LOW, LSM6DSL_ACC_GYRO_CTRL2_G);
+
+ /* Read output register X, Y & Z acceleration */
+ SENSOR_IO_ReadMultiple(LSM6DSL_ACC_GYRO_I2C_ADDRESS_LOW, LSM6DSL_ACC_GYRO_OUTX_L_G, buffer, 6);
+
+ for(i=0; i<3; i++)
+ {
+ pnRawData[i]=((((uint16_t)buffer[2*i+1]) << 8) + (uint16_t)buffer[2*i]);
+ }
+
+ /* Normal mode */
+ /* Switch the sensitivity value set in the CRTL2_G */
+ switch(ctrlg & 0x0C)
+ {
+ case LSM6DSL_GYRO_FS_245:
+ sensitivity = LSM6DSL_GYRO_SENSITIVITY_245DPS;
+ break;
+ case LSM6DSL_GYRO_FS_500:
+ sensitivity = LSM6DSL_GYRO_SENSITIVITY_500DPS;
+ break;
+ case LSM6DSL_GYRO_FS_1000:
+ sensitivity = LSM6DSL_GYRO_SENSITIVITY_1000DPS;
+ break;
+ case LSM6DSL_GYRO_FS_2000:
+ sensitivity = LSM6DSL_GYRO_SENSITIVITY_2000DPS;
+ break;
+ }
+
+ /* Obtain the mg value for the three axis */
+ for(i=0; i<3; i++)
+ {
+ pfData[i]=( float )(pnRawData[i] * sensitivity);
+ }
+}
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
+
diff --git a/P3_SETR2/Components/lsm6dsl/lsm6dsl.h b/P3_SETR2/Components/lsm6dsl/lsm6dsl.h
new file mode 100644
index 0000000..889da41
--- /dev/null
+++ b/P3_SETR2/Components/lsm6dsl/lsm6dsl.h
@@ -0,0 +1,328 @@
+/**
+ ******************************************************************************
+ * @file lsm6dsl.h
+ * @author MCD Application Team
+ * @brief LSM6DSL header driver file
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2017 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __LSM6DSL__H
+#define __LSM6DSL__H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "../Common/accelero.h"
+#include "../Common/gyro.h"
+
+/** @addtogroup BSP
+ * @{
+ */
+
+/** @addtogroup Component
+ * @{
+ */
+
+/** @addtogroup LSM6DSL
+ * @{
+ */
+
+/** @defgroup LSM6DSL_Exported_Constants LSM6DSL Exported Constants
+ * @{
+ */
+/************** I2C Address *****************/
+
+#define LSM6DSL_ACC_GYRO_I2C_ADDRESS_LOW 0xD4 // SAD[0] = 0
+#define LSM6DSL_ACC_GYRO_I2C_ADDRESS_HIGH 0xD6 // SAD[0] = 1
+
+/************** Who am I *******************/
+
+#define LSM6DSL_ACC_GYRO_WHO_AM_I 0x6A
+
+/************** Device Register *******************/
+
+#define LSM6DSL_ACC_GYRO_FUNC_CFG_ACCESS 0x01
+
+#define LSM6DSL_ACC_GYRO_SENSOR_SYNC_TIME 0x04
+#define LSM6DSL_ACC_GYRO_SENSOR_RES_RATIO 0x05
+
+#define LSM6DSL_ACC_GYRO_FIFO_CTRL1 0x06
+#define LSM6DSL_ACC_GYRO_FIFO_CTRL2 0x07
+#define LSM6DSL_ACC_GYRO_FIFO_CTRL3 0x08
+#define LSM6DSL_ACC_GYRO_FIFO_CTRL4 0x09
+#define LSM6DSL_ACC_GYRO_FIFO_CTRL5 0x0A
+
+#define LSM6DSL_ACC_GYRO_DRDY_PULSE_CFG_G 0x0B
+#define LSM6DSL_ACC_GYRO_INT1_CTRL 0x0D
+#define LSM6DSL_ACC_GYRO_INT2_CTRL 0x0E
+#define LSM6DSL_ACC_GYRO_WHO_AM_I_REG 0x0F
+#define LSM6DSL_ACC_GYRO_CTRL1_XL 0x10
+#define LSM6DSL_ACC_GYRO_CTRL2_G 0x11
+#define LSM6DSL_ACC_GYRO_CTRL3_C 0x12
+#define LSM6DSL_ACC_GYRO_CTRL4_C 0x13
+#define LSM6DSL_ACC_GYRO_CTRL5_C 0x14
+#define LSM6DSL_ACC_GYRO_CTRL6_C 0x15
+#define LSM6DSL_ACC_GYRO_CTRL7_G 0x16
+#define LSM6DSL_ACC_GYRO_CTRL8_XL 0x17
+#define LSM6DSL_ACC_GYRO_CTRL9_XL 0x18
+#define LSM6DSL_ACC_GYRO_CTRL10_C 0x19
+
+#define LSM6DSL_ACC_GYRO_MASTER_CONFIG 0x1A
+#define LSM6DSL_ACC_GYRO_WAKE_UP_SRC 0x1B
+#define LSM6DSL_ACC_GYRO_TAP_SRC 0x1C
+#define LSM6DSL_ACC_GYRO_D6D_SRC 0x1D
+#define LSM6DSL_ACC_GYRO_STATUS_REG 0x1E
+
+#define LSM6DSL_ACC_GYRO_OUT_TEMP_L 0x20
+#define LSM6DSL_ACC_GYRO_OUT_TEMP_H 0x21
+#define LSM6DSL_ACC_GYRO_OUTX_L_G 0x22
+#define LSM6DSL_ACC_GYRO_OUTX_H_G 0x23
+#define LSM6DSL_ACC_GYRO_OUTY_L_G 0x24
+#define LSM6DSL_ACC_GYRO_OUTY_H_G 0x25
+#define LSM6DSL_ACC_GYRO_OUTZ_L_G 0x26
+#define LSM6DSL_ACC_GYRO_OUTZ_H_G 0x27
+#define LSM6DSL_ACC_GYRO_OUTX_L_XL 0x28
+#define LSM6DSL_ACC_GYRO_OUTX_H_XL 0x29
+#define LSM6DSL_ACC_GYRO_OUTY_L_XL 0x2A
+#define LSM6DSL_ACC_GYRO_OUTY_H_XL 0x2B
+#define LSM6DSL_ACC_GYRO_OUTZ_L_XL 0x2C
+#define LSM6DSL_ACC_GYRO_OUTZ_H_XL 0x2D
+#define LSM6DSL_ACC_GYRO_SENSORHUB1_REG 0x2E
+#define LSM6DSL_ACC_GYRO_SENSORHUB2_REG 0x2F
+#define LSM6DSL_ACC_GYRO_SENSORHUB3_REG 0x30
+#define LSM6DSL_ACC_GYRO_SENSORHUB4_REG 0x31
+#define LSM6DSL_ACC_GYRO_SENSORHUB5_REG 0x32
+#define LSM6DSL_ACC_GYRO_SENSORHUB6_REG 0x33
+#define LSM6DSL_ACC_GYRO_SENSORHUB7_REG 0x34
+#define LSM6DSL_ACC_GYRO_SENSORHUB8_REG 0x35
+#define LSM6DSL_ACC_GYRO_SENSORHUB9_REG 0x36
+#define LSM6DSL_ACC_GYRO_SENSORHUB10_REG 0x37
+#define LSM6DSL_ACC_GYRO_SENSORHUB11_REG 0x38
+#define LSM6DSL_ACC_GYRO_SENSORHUB12_REG 0x39
+#define LSM6DSL_ACC_GYRO_FIFO_STATUS1 0x3A
+#define LSM6DSL_ACC_GYRO_FIFO_STATUS2 0x3B
+#define LSM6DSL_ACC_GYRO_FIFO_STATUS3 0x3C
+#define LSM6DSL_ACC_GYRO_FIFO_STATUS4 0x3D
+#define LSM6DSL_ACC_GYRO_FIFO_DATA_OUT_L 0x3E
+#define LSM6DSL_ACC_GYRO_FIFO_DATA_OUT_H 0x3F
+#define LSM6DSL_ACC_GYRO_TIMESTAMP0_REG 0x40
+#define LSM6DSL_ACC_GYRO_TIMESTAMP1_REG 0x41
+#define LSM6DSL_ACC_GYRO_TIMESTAMP2_REG 0x42
+
+#define LSM6DSL_ACC_GYRO_TIMESTAMP_L 0x49
+#define LSM6DSL_ACC_GYRO_TIMESTAMP_H 0x4A
+
+#define LSM6DSL_ACC_GYRO_STEP_COUNTER_L 0x4B
+#define LSM6DSL_ACC_GYRO_STEP_COUNTER_H 0x4C
+
+#define LSM6DSL_ACC_GYRO_SENSORHUB13_REG 0x4D
+#define LSM6DSL_ACC_GYRO_SENSORHUB14_REG 0x4E
+#define LSM6DSL_ACC_GYRO_SENSORHUB15_REG 0x4F
+#define LSM6DSL_ACC_GYRO_SENSORHUB16_REG 0x50
+#define LSM6DSL_ACC_GYRO_SENSORHUB17_REG 0x51
+#define LSM6DSL_ACC_GYRO_SENSORHUB18_REG 0x52
+
+#define LSM6DSL_ACC_GYRO_FUNC_SRC 0x53
+#define LSM6DSL_ACC_GYRO_TAP_CFG1 0x58
+#define LSM6DSL_ACC_GYRO_TAP_THS_6D 0x59
+#define LSM6DSL_ACC_GYRO_INT_DUR2 0x5A
+#define LSM6DSL_ACC_GYRO_WAKE_UP_THS 0x5B
+#define LSM6DSL_ACC_GYRO_WAKE_UP_DUR 0x5C
+#define LSM6DSL_ACC_GYRO_FREE_FALL 0x5D
+#define LSM6DSL_ACC_GYRO_MD1_CFG 0x5E
+#define LSM6DSL_ACC_GYRO_MD2_CFG 0x5F
+
+#define LSM6DSL_ACC_GYRO_OUT_MAG_RAW_X_L 0x66
+#define LSM6DSL_ACC_GYRO_OUT_MAG_RAW_X_H 0x67
+#define LSM6DSL_ACC_GYRO_OUT_MAG_RAW_Y_L 0x68
+#define LSM6DSL_ACC_GYRO_OUT_MAG_RAW_Y_H 0x69
+#define LSM6DSL_ACC_GYRO_OUT_MAG_RAW_Z_L 0x6A
+#define LSM6DSL_ACC_GYRO_OUT_MAG_RAW_Z_H 0x6B
+
+#define LSM6DSL_ACC_GYRO_X_OFS_USR 0x73
+#define LSM6DSL_ACC_GYRO_Y_OFS_USR 0x74
+#define LSM6DSL_ACC_GYRO_Z_OFS_USR 0x75
+
+/************** Embedded functions register mapping *******************/
+#define LSM6DSL_ACC_GYRO_SLV0_ADD 0x02
+#define LSM6DSL_ACC_GYRO_SLV0_SUBADD 0x03
+#define LSM6DSL_ACC_GYRO_SLAVE0_CONFIG 0x04
+#define LSM6DSL_ACC_GYRO_SLV1_ADD 0x05
+#define LSM6DSL_ACC_GYRO_SLV1_SUBADD 0x06
+#define LSM6DSL_ACC_GYRO_SLAVE1_CONFIG 0x07
+#define LSM6DSL_ACC_GYRO_SLV2_ADD 0x08
+#define LSM6DSL_ACC_GYRO_SLV2_SUBADD 0x09
+#define LSM6DSL_ACC_GYRO_SLAVE2_CONFIG 0x0A
+#define LSM6DSL_ACC_GYRO_SLV3_ADD 0x0B
+#define LSM6DSL_ACC_GYRO_SLV3_SUBADD 0x0C
+#define LSM6DSL_ACC_GYRO_SLAVE3_CONFIG 0x0D
+#define LSM6DSL_ACC_GYRO_DATAWRITE_SRC_MODE_SUB_SLV0 0x0E
+#define LSM6DSL_ACC_GYRO_CONFIG_PEDO_THS_MIN 0x0F
+
+#define LSM6DSL_ACC_GYRO_SM_STEP_THS 0x13
+#define LSM6DSL_ACC_GYRO_PEDO_DEB_REG 0x14
+#define LSM6DSL_ACC_GYRO_STEP_COUNT_DELTA 0x15
+
+#define LSM6DSL_ACC_GYRO_MAG_SI_XX 0x24
+#define LSM6DSL_ACC_GYRO_MAG_SI_XY 0x25
+#define LSM6DSL_ACC_GYRO_MAG_SI_XZ 0x26
+#define LSM6DSL_ACC_GYRO_MAG_SI_YX 0x27
+#define LSM6DSL_ACC_GYRO_MAG_SI_YY 0x28
+#define LSM6DSL_ACC_GYRO_MAG_SI_YZ 0x29
+#define LSM6DSL_ACC_GYRO_MAG_SI_ZX 0x2A
+#define LSM6DSL_ACC_GYRO_MAG_SI_ZY 0x2B
+#define LSM6DSL_ACC_GYRO_MAG_SI_ZZ 0x2C
+#define LSM6DSL_ACC_GYRO_MAG_OFFX_L 0x2D
+#define LSM6DSL_ACC_GYRO_MAG_OFFX_H 0x2E
+#define LSM6DSL_ACC_GYRO_MAG_OFFY_L 0x2F
+#define LSM6DSL_ACC_GYRO_MAG_OFFY_H 0x30
+#define LSM6DSL_ACC_GYRO_MAG_OFFZ_L 0x31
+#define LSM6DSL_ACC_GYRO_MAG_OFFZ_H 0x32
+
+/* Accelero Full_ScaleSelection */
+#define LSM6DSL_ACC_FULLSCALE_2G ((uint8_t)0x00) /*!< 2 g */
+#define LSM6DSL_ACC_FULLSCALE_4G ((uint8_t)0x08) /*!< 4 g */
+#define LSM6DSL_ACC_FULLSCALE_8G ((uint8_t)0x0C) /*!< 8 g */
+#define LSM6DSL_ACC_FULLSCALE_16G ((uint8_t)0x04) /*!< 16 g */
+
+/* Accelero Full Scale Sensitivity */
+#define LSM6DSL_ACC_SENSITIVITY_2G ((float)0.061f) /*!< accelerometer sensitivity with 2 g full scale [mgauss/LSB] */
+#define LSM6DSL_ACC_SENSITIVITY_4G ((float)0.122f) /*!< accelerometer sensitivity with 4 g full scale [mgauss/LSB] */
+#define LSM6DSL_ACC_SENSITIVITY_8G ((float)0.244f) /*!< accelerometer sensitivity with 8 g full scale [mgauss/LSB] */
+#define LSM6DSL_ACC_SENSITIVITY_16G ((float)0.488f) /*!< accelerometer sensitivity with 12 g full scale [mgauss/LSB] */
+
+/* Accelero Power Mode selection */
+#define LSM6DSL_ACC_GYRO_LP_XL_DISABLED ((uint8_t)0x00) /* LP disabled*/
+#define LSM6DSL_ACC_GYRO_LP_XL_ENABLED ((uint8_t)0x10) /* LP enabled*/
+
+/* Output Data Rate */
+#define LSM6DSL_ODR_BITPOSITION ((uint8_t)0xF0) /*!< Output Data Rate bit position */
+#define LSM6DSL_ODR_POWER_DOWN ((uint8_t)0x00) /* Power Down mode */
+#define LSM6DSL_ODR_13Hz ((uint8_t)0x10) /* Low Power mode */
+#define LSM6DSL_ODR_26Hz ((uint8_t)0x20) /* Low Power mode */
+#define LSM6DSL_ODR_52Hz ((uint8_t)0x30) /* Low Power mode */
+#define LSM6DSL_ODR_104Hz ((uint8_t)0x40) /* Normal mode */
+#define LSM6DSL_ODR_208Hz ((uint8_t)0x50) /* Normal mode */
+#define LSM6DSL_ODR_416Hz ((uint8_t)0x60) /* High Performance mode */
+#define LSM6DSL_ODR_833Hz ((uint8_t)0x70) /* High Performance mode */
+#define LSM6DSL_ODR_1660Hz ((uint8_t)0x80) /* High Performance mode */
+#define LSM6DSL_ODR_3330Hz ((uint8_t)0x90) /* High Performance mode */
+#define LSM6DSL_ODR_6660Hz ((uint8_t)0xA0) /* High Performance mode */
+
+/* Gyro Full Scale Selection */
+#define LSM6DSL_GYRO_FS_245 ((uint8_t)0x00)
+#define LSM6DSL_GYRO_FS_500 ((uint8_t)0x04)
+#define LSM6DSL_GYRO_FS_1000 ((uint8_t)0x08)
+#define LSM6DSL_GYRO_FS_2000 ((uint8_t)0x0C)
+
+/* Gyro Full Scale Sensitivity */
+#define LSM6DSL_GYRO_SENSITIVITY_245DPS ((float)8.750f) /**< Sensitivity value for 245 dps full scale [mdps/LSB] */
+#define LSM6DSL_GYRO_SENSITIVITY_500DPS ((float)17.50f) /**< Sensitivity value for 500 dps full scale [mdps/LSB] */
+#define LSM6DSL_GYRO_SENSITIVITY_1000DPS ((float)35.00f) /**< Sensitivity value for 1000 dps full scale [mdps/LSB] */
+#define LSM6DSL_GYRO_SENSITIVITY_2000DPS ((float)70.00f) /**< Sensitivity value for 2000 dps full scale [mdps/LSB] */
+
+/* Gyro Power Mode selection */
+#define LSM6DSL_ACC_GYRO_LP_G_DISABLED ((uint8_t)0x00) /* LP disabled*/
+#define LSM6DSL_ACC_GYRO_LP_G_ENABLED ((uint8_t)0x80) /* LP enabled*/
+
+/* Block Data Update */
+#define LSM6DSL_BDU_CONTINUOS ((uint8_t)0x00)
+#define LSM6DSL_BDU_BLOCK_UPDATE ((uint8_t)0x40)
+
+/* Auto-increment */
+#define LSM6DSL_ACC_GYRO_IF_INC_DISABLED ((uint8_t)0x00)
+#define LSM6DSL_ACC_GYRO_IF_INC_ENABLED ((uint8_t)0x04)
+
+/**
+ * @}
+ */
+
+/** @defgroup LSM6DSL_AccExported_Functions ACCELEROMETER Exported functions
+ * @{
+ */
+void LSM6DSL_AccInit(uint16_t InitStruct);
+void LSM6DSL_AccDeInit(void);
+uint8_t LSM6DSL_AccReadID(void);
+void LSM6DSL_AccLowPower(uint16_t status);
+void LSM6DSL_AccReadXYZ(int16_t* pData);
+/**
+ * @}
+ */
+
+/** @defgroup LSM6DSL_AccImported_Globals ACCELEROMETER Imported Globals
+ * @{
+ */
+extern ACCELERO_DrvTypeDef Lsm6dslAccDrv;
+/**
+ * @}
+ */
+
+/** @defgroup LSM6DSL_GyroExported_Functions GYROSCOPE Exported functions
+ * @{
+ */
+/* Sensor Configuration Functions */
+void LSM6DSL_GyroInit(uint16_t InitStruct);
+void LSM6DSL_GyroDeInit(void);
+uint8_t LSM6DSL_GyroReadID(void);
+void LSM6DSL_GyroLowPower(uint16_t status);
+void LSM6DSL_GyroReadXYZAngRate(float *pfData);
+/**
+ * @}
+ */
+
+/** @defgroup LSM6DSL_GyroImported_Globals GYROSCOPE Imported Globals
+ * @{
+ */
+/* Gyroscope driver structure */
+extern GYRO_DrvTypeDef Lsm6dslGyroDrv;
+
+/**
+ * @}
+ */
+
+/** @defgroup LSM6DSL_Imported_Functions LSM6DSL Imported Functions
+ * @{
+ */
+/* IO functions */
+extern void SENSOR_IO_Init(void);
+extern void SENSOR_IO_Write(uint8_t Addr, uint8_t Reg, uint8_t Value);
+extern uint8_t SENSOR_IO_Read(uint8_t Addr, uint8_t Reg);
+extern uint16_t SENSOR_IO_ReadMultiple(uint8_t Addr, uint8_t Reg, uint8_t *Buffer, uint16_t Length);
+extern void SENSOR_IO_WriteMultiple(uint8_t Addr, uint8_t Reg, uint8_t *Buffer, uint16_t Length);
+/**
+ * @}
+ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __LSM6DSL__H */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/P3_SETR2/Components/m24sr/Release_Notes.html b/P3_SETR2/Components/m24sr/Release_Notes.html
new file mode 100644
index 0000000..253cb91
--- /dev/null
+++ b/P3_SETR2/Components/m24sr/Release_Notes.html
@@ -0,0 +1,83 @@
+
+
+
+
+
+
+ Release Notes for M24SR Component Drivers
+
+
+
+
+
+
+
+
+
+
+Release Notes for M24SR Component Drivers
+Copyright © 2017 STMicroelectronics
+
+
+
+
+
+
License
+
Licensed by ST under BSD 3-Clause license (the "License"). You may not use this package except in compliance with the License. You may obtain a copy of the License at:
+
https://opensource.org/licenses/BSD-3-Clause
+
Purpose
+
This directory contains the M24SR component drivers.
+
+
+
Update History
+
+
V1.1.1 / 03-April-2019
+
+
Main Changes
+
+Update release notes format
+Reformat the BSD 3-Clause license declaration in the files header (replace license terms by a web reference to OSI website where those terms lie)
+
+
+
+
+
V1.1.0 / 21-April-2017
+
+
Main Changes
+
+Calls BSP IO functions (NFC_IO_xxx) as unique low layer interface.
+Made it fully independent by board and device (no external inclusion).
+Adapt #defines and m24sr.h accordingly API.
+Types renaming uc8 -> uint8_t and uc16 -> uint16_t.
+Pass I2C device address as param to all functions that use it.
+Remove goto instructions.
+Moved here some functions: M24SR_RFConfig(), M24SR_SetI2CSynchroMode(), M24SR_IsAnswerReady().
+Added M24SR_GPO_Callback().
+Added M24SR_GPO_Callback().
+Move lib_M24SR.c/h from driver to application.
+
+
+
+
+
V1.0.0 / 20-October-2014
+
+
Main Changes
+
+First official release by STM MMY division
+
+
+
+
+
+
+
+
diff --git a/P3_SETR2/Components/m24sr/m24sr.c b/P3_SETR2/Components/m24sr/m24sr.c
new file mode 100644
index 0000000..5f54469
--- /dev/null
+++ b/P3_SETR2/Components/m24sr/m24sr.c
@@ -0,0 +1,1638 @@
+/**
+ ******************************************************************************
+ * @file m24sr.c
+ * @author MCD Application Team
+ * @brief This file provides a set of functions to interface with the M24SR
+ * device.
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2017 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/* Includes ------------------------------------------------------------------*/
+#include "string.h"
+#include "m24sr.h"
+
+/** @addtogroup BSP
+ * @{
+ */
+
+/** @addtogroup Components
+ * @{
+ */
+
+/** @addtogroup M24SR
+ * @{
+ * @brief This folder contains the driver layer of M24SR family (M24SR64, M24SR16, M24SR04, M24SR02)
+ */
+
+/** @defgroup M24SR_Private_Types M24SR Driver Private Types
+ * @{
+ */
+
+/**
+ * @brief Synchronization Mechanism structure
+ */
+typedef enum{
+ M24SR_WAITINGTIME_UNKNOWN= 0,
+ M24SR_WAITINGTIME_POLLING,
+ M24SR_WAITINGTIME_TIMEOUT,
+ M24SR_WAITINGTIME_GPO,
+ M24SR_INTERRUPT_GPO
+}M24SR_WAITINGTIME_MGMT;
+
+/**
+ * @brief APDU-Header command structure
+ */
+typedef struct
+{
+ uint8_t CLA; /* Command class */
+ uint8_t INS; /* Operation code */
+ uint8_t P1; /* Selection Mode */
+ uint8_t P2; /* Selection Option */
+} C_APDU_Header;
+
+/**
+ * @brief APDU-Body command structure
+ */
+typedef struct
+{
+ uint8_t LC; /* Data field length */
+ uint8_t *pData ; /* Command parameters */
+ uint8_t LE; /* Expected length of data to be returned */
+} C_APDU_Body;
+
+/**
+ * @brief APDU Command structure
+ */
+typedef struct
+{
+ C_APDU_Header Header;
+ C_APDU_Body Body;
+} C_APDU;
+
+/**
+ * @brief SC response structure
+ */
+typedef struct
+{
+ uint8_t *pData ; /* Data returned from the card */
+ /* pointer on the transceiver buffer = ReaderRecBuf[CR95HF_DATA_OFFSET ]; */
+ uint8_t SW1; /* Command Processing status */
+ uint8_t SW2; /* Command Processing qualification */
+} R_APDU;
+
+/**
+ * @brief GPO state structure
+ */
+typedef enum{
+ HIGH_IMPEDANCE= 0,
+ SESSION_OPENED,
+ WIP,
+ I2C_ANSWER_READY,
+ INTERRUPT,
+ STATE_CONTROL
+}M24SR_GPO_MGMT;
+
+/**
+ * @}
+ */
+
+
+/** @defgroup M24SR_Private_Constants M24SR Driver Private Constants
+ * @{
+ */
+
+/**
+ * @brief M24SR_Private_Code_Status
+ */
+#define UB_STATUS_OFFSET 4
+#define LB_STATUS_OFFSET 3
+
+#define M24SR_NBBYTE_INVALID 0xFFFE
+
+/**
+ * @brief M24SR_Private_File_Identifier
+ */
+#define SYSTEM_FILE_ID 0xE101
+#define CC_FILE_ID 0xE103
+#define NDEF_FILE_ID 0x0001
+
+/**
+ * @brief M24SR_Private_Command_Management
+ */
+/* special M24SR command ----------------------------------------------------------------------*/
+#define M24SR_OPENSESSION 0x26
+#define M24SR_KILLSESSION 0x52
+
+/* APDU Command: class list -------------------------------------------*/
+#define C_APDU_CLA_DEFAULT 0x00
+#define C_APDU_CLA_ST 0xA2
+
+/*------------------------ Data Area Management Commands ---------------------*/
+#define C_APDU_SELECT_FILE 0xA4
+#define C_APDU_GET_RESPONCE 0xC0
+#define C_APDU_STATUS 0xF2
+#define C_APDU_UPDATE_BINARY 0xD6
+#define C_APDU_READ_BINARY 0xB0
+#define C_APDU_WRITE_BINARY 0xD0
+#define C_APDU_UPDATE_RECORD 0xDC
+#define C_APDU_READ_RECORD 0xB2
+
+/*-------------------------- Safety Management Commands ----------------------*/
+#define C_APDU_VERIFY 0x20
+#define C_APDU_CHANGE 0x24
+#define C_APDU_DISABLE 0x26
+#define C_APDU_ENABLE 0x28
+
+/*-------------------------- Gpio Management Commands ------------------------*/
+#define C_APDU_INTERRUPT 0xD6
+
+/* Length ----------------------------------------------------------------------------------*/
+#define M24SR_STATUS_NBBYTE 2
+#define M24SR_CRC_NBBYTE 2
+#define M24SR_STATUSRESPONSE_NBBYTE 5
+#define M24SR_DESELECTREQUEST_NBBYTE 3
+#define M24SR_DESELECTRESPONSE_NBBYTE 3
+#define M24SR_WATINGTIMEEXTRESPONSE_NBBYTE 4
+#define M24SR_PASSWORD_NBBYTE 0x10
+
+/* Command structure ------------------------------------------------------------------------*/
+#define M24SR_CMDSTRUCT_SELECTAPPLICATION 0x01FF
+#define M24SR_CMDSTRUCT_SELECTCCFILE 0x017F
+#define M24SR_CMDSTRUCT_SELECTNDEFFILE 0x017F
+#define M24SR_CMDSTRUCT_READBINARY 0x019F
+#define M24SR_CMDSTRUCT_UPDATEBINARY 0x017F
+#define M24SR_CMDSTRUCT_VERIFYBINARYWOPWD 0x013F
+#define M24SR_CMDSTRUCT_VERIFYBINARYWITHPWD 0x017F
+#define M24SR_CMDSTRUCT_CHANGEREFDATA 0x017F
+#define M24SR_CMDSTRUCT_ENABLEVERIFREQ 0x011F
+#define M24SR_CMDSTRUCT_DISABLEVERIFREQ 0x011F
+#define M24SR_CMDSTRUCT_SENDINTERRUPT 0x013F
+#define M24SR_CMDSTRUCT_GPOSTATE 0x017F
+
+/* Command structure Mask -------------------------------------------------------------------*/
+#define M24SR_PCB_NEEDED 0x0001 /* PCB byte present or not */
+#define M24SR_CLA_NEEDED 0x0002 /* CLA byte present or not */
+#define M24SR_INS_NEEDED 0x0004 /* Operation code present or not*/
+#define M24SR_P1_NEEDED 0x0008 /* Selection Mode present or not*/
+#define M24SR_P2_NEEDED 0x0010 /* Selection Option present or not*/
+#define M24SR_LC_NEEDED 0x0020 /* Data field length byte present or not */
+#define M24SR_DATA_NEEDED 0x0040 /* Data present or not */
+#define M24SR_LE_NEEDED 0x0080 /* Expected length present or not */
+#define M24SR_CRC_NEEDED 0x0100 /* 2 CRC bytes present or not */
+
+#define M24SR_DID_NEEDED 0x08 /* DID byte present or not */
+
+/**
+ * @brief M24SR_Private_Offset_and_masks
+ */
+
+/* Offset ----------------------------------------------------------------------------------*/
+#define M24SR_OFFSET_PCB 0
+#define M24SR_OFFSET_CLASS 1
+#define M24SR_OFFSET_INS 2
+#define M24SR_OFFSET_P1 3
+
+/* mask ------------------------------------------------------------------------------------*/
+#define M24SR_MASK_BLOCK 0xC0
+#define M24SR_MASK_IBLOCK 0x00
+#define M24SR_MASK_RBLOCK 0x80
+#define M24SR_MASK_SBLOCK 0xC0
+
+/**
+ * @}
+ */
+
+
+/** @defgroup M24SR_Private_Variables M24SR Private Global Variables
+ * @{
+ */
+
+static C_APDU Command;
+static uint8_t DataBuffer[0xFF];
+uint8_t uM24SRbuffer [0xFF];
+static uint8_t uDIDbyte =0x00;
+
+uint8_t uSynchroMode = M24SR_WAITINGTIME_POLLING;
+uint8_t uGpoMode = M24SR_GPO_POLLING;
+volatile uint8_t GPO_Low = 0;
+
+/**
+ * @}
+ */
+
+/** @defgroup M24SR_Private_Macros M24SR Private Macros
+ * @{
+ */
+
+/** @brief Get Most Significant Byte
+ * @param val: number where MSB must be extracted
+ * @retval MSB
+ */
+#define GETMSB(val) ( (uint8_t) ((val & 0xFF00 )>>8) )
+
+/** @brief Get Least Significant Byte
+ * @param val: number where LSB must be extracted
+ * @retval LSB
+ */
+#define GETLSB(val) ( (uint8_t) (val & 0x00FF ))
+
+/** @brief Used to toggle the block number by adding 0 or 1 to default block number value
+ * @param val: number to know if incrementation is needed
+ * @retval 0 or 1 if incrementation needed
+ */
+#define TOGGLE(val) ((val != 0x00)? 0x00 : 0x01)
+
+/**
+ * @}
+ */
+
+
+/** @defgroup M24SR_Private_FunctionsPrototypes M24SR Private FunctionsPrototypes
+ * @{
+ */
+
+static uint16_t M24SR_UpdateCrc ( uint8_t ch, uint16_t *lpwCrc);
+static uint16_t M24SR_ComputeCrc ( uint8_t *Data, uint8_t Length);
+static uint16_t M24SR_IsCorrectCRC16Residue ( uint8_t *DataIn,uint8_t Length);
+static void M24SR_BuildIBlockCommand ( uint16_t CommandStructure, C_APDU Command, uint16_t *NbByte , uint8_t *pCommand);
+static uint16_t IsSBlock ( uint8_t *pBuffer);
+static uint16_t M24SR_FWTExtension ( uint16_t DeviceAddr, uint8_t FWTbyte);
+static void M24SR_SetI2CSynchroMode ( uint8_t WaitingMode );
+static uint16_t M24SR_IsAnswerReady ( uint16_t DeviceAddr);
+/**
+ * @}
+ */
+
+
+/** @defgroup M24SR_Private_Functions M24SR Private Functions
+ * @{
+ */
+
+ /**
+ * @brief This function updates the CRC
+ * @param None
+ * @retval None
+ */
+static uint16_t M24SR_UpdateCrc (uint8_t ch, uint16_t *lpwCrc)
+{
+ ch = (ch^(uint8_t)((*lpwCrc) & 0x00FF));
+ ch = (ch^(ch<<4));
+ *lpwCrc = (*lpwCrc >> 8)^((uint16_t)ch << 8)^((uint16_t)ch<<3)^((uint16_t)ch>>4);
+
+ return(*lpwCrc);
+}
+
+/**
+ * @brief This function returns the CRC 16
+ * @param Data : pointer on the data used to compute the CRC16
+ * @param Length : number of byte of the data
+ * @retval CRC16
+ */
+static uint16_t M24SR_ComputeCrc(uint8_t *Data, uint8_t Length)
+{
+ uint8_t chBlock;
+ uint16_t wCrc;
+
+ wCrc = 0x6363; /* ITU-V.41 */
+
+ do {
+ chBlock = *Data++;
+ M24SR_UpdateCrc(chBlock, &wCrc);
+ } while (--Length);
+
+ return wCrc ;
+}
+
+
+/**
+* @brief This function computes the CRC16 residue as defined by CRC ISO/IEC 13239
+* @param DataIn : input to data
+* @param Length : Number of bits of DataIn
+* @retval Status (SW1&SW2) : CRC16 residue is correct
+* @retval M24SR_ERROR_CRC : CRC16 residue is false
+*/
+static uint16_t M24SR_IsCorrectCRC16Residue (uint8_t *DataIn,uint8_t Length)
+{
+ uint16_t ResCRC=0;
+
+ /* check the CRC16 Residue */
+ if (Length !=0)
+ ResCRC= M24SR_ComputeCrc (DataIn, Length);
+
+ if ( ResCRC == 0x0000)
+ {
+ /* Good CRC, but error status from M24SR */
+ return( ((DataIn[Length-UB_STATUS_OFFSET]<<8) & 0xFF00) | (DataIn[Length-LB_STATUS_OFFSET] & 0x00FF) );
+ }
+ else
+ {
+ ResCRC=0;
+ ResCRC= M24SR_ComputeCrc (DataIn, 5);
+ if ( ResCRC != 0x0000)
+ {
+ /* Bad CRC */
+ return M24SR_ERROR_CRC;
+ }
+ else
+ {
+ /* Good CRC, but error status from M24SR */
+ return( ((DataIn[1]<<8) & 0xFF00) | (DataIn[2] & 0x00FF) );
+ }
+ }
+}
+
+
+/**
+ * @brief This functions creates an I block command according to the structures CommandStructure and Command.
+ * @param Command : structue which contains the field of the different parameter
+ * @param CommandStructure : structure that contain the structure of the command (if the different field are presnet or not
+ * @param NbByte : number of byte of the command
+ * @param pCommand : pointer of the command created
+ */
+static void M24SR_BuildIBlockCommand ( uint16_t CommandStructure, C_APDU Command, uint16_t *NbByte , uint8_t *pCommand)
+{
+ uint16_t uCRC16;
+ static uint8_t BlockNumber = 0x01;
+
+ (*NbByte) = 0;
+
+ /* add the PCD byte */
+ if ((CommandStructure & M24SR_PCB_NEEDED) !=0)
+ {
+ /* toggle the block number */
+ BlockNumber = TOGGLE ( BlockNumber );
+ /* Add the I block byte */
+ pCommand[(*NbByte)++] = 0x02 | BlockNumber;
+ }
+
+ /* add the DID byte */
+ if ((BlockNumber & M24SR_DID_NEEDED) !=0)
+ {
+ /* Add the I block byte */
+ pCommand[(*NbByte)++] = uDIDbyte;
+ }
+
+ /* add the Class byte */
+ if ((CommandStructure & M24SR_CLA_NEEDED) !=0)
+ {
+ pCommand[(*NbByte)++] = Command.Header.CLA ;
+ }
+ /* add the instruction byte byte */
+ if ( (CommandStructure & M24SR_INS_NEEDED) !=0)
+ {
+ pCommand[(*NbByte)++] = Command.Header.INS ;
+ }
+ /* add the Selection Mode byte */
+ if ((CommandStructure & M24SR_P1_NEEDED) !=0)
+ {
+ pCommand[(*NbByte)++] = Command.Header.P1 ;
+ }
+ /* add the Selection Mode byte */
+ if ((CommandStructure & M24SR_P2_NEEDED) !=0)
+ {
+ pCommand[(*NbByte)++] = Command.Header.P2 ;
+ }
+ /* add Data field lengthbyte */
+ if ((CommandStructure & M24SR_LC_NEEDED) !=0)
+ {
+ pCommand[(*NbByte)++] = Command.Body.LC ;
+ }
+ /* add Data field */
+ if ((CommandStructure & M24SR_DATA_NEEDED) !=0)
+ {
+ memcpy(&(pCommand[(*NbByte)]) ,Command.Body.pData,Command.Body.LC ) ;
+ (*NbByte) += Command.Body.LC ;
+ }
+ /* add Le field */
+ if ((CommandStructure & M24SR_LE_NEEDED) !=0)
+ {
+ pCommand[(*NbByte)++] = Command.Body.LE ;
+ }
+ /* add CRC field */
+ if ((CommandStructure & M24SR_CRC_NEEDED) !=0)
+ {
+ uCRC16 = M24SR_ComputeCrc (pCommand,(uint8_t) (*NbByte));
+ /* append the CRC16 */
+ pCommand [(*NbByte)++] = GETLSB (uCRC16 ) ;
+ pCommand [(*NbByte)++] = GETMSB (uCRC16 ) ;
+ }
+}
+
+
+/**
+* @brief This function return M24SR_STATUS_SUCCESS if the pBuffer is an s-block
+* @param pBuffer : pointer of the data
+* @retval M24SR_STATUS_SUCCESS : the data is a S-Block
+* @retval M24SR_ERROR_DEFAULT : the data is not a S-Block
+*/
+static uint16_t IsSBlock (uint8_t *pBuffer)
+{
+
+ if ((pBuffer[M24SR_OFFSET_PCB] & M24SR_MASK_BLOCK) == M24SR_MASK_SBLOCK)
+ {
+ return M24SR_STATUS_SUCCESS;
+ }
+ else
+ {
+ return M24SR_ERROR_DEFAULT;
+ }
+
+}
+
+/**
+ * @brief This function sends the FWT extension command (S-Block format)
+ * @param DeviceAddr: I2C address of the device
+ * @param FWTbyte : FWT value
+ * @retval Status (SW1&SW2) : Status of the operation to complete.
+ * @retval M24SR_ERROR_TIMEOUT : The I2C timeout occured.
+ */
+static uint16_t M24SR_FWTExtension (uint16_t DeviceAddr, uint8_t FWTbyte)
+{
+ uint8_t pBuffer[M24SR_STATUSRESPONSE_NBBYTE];
+ uint16_t status ;
+ uint16_t NthByte = 0,
+ uCRC16;
+
+ /* create the response */
+ pBuffer[NthByte++] = 0xF2 ;
+ pBuffer[NthByte++] = FWTbyte ;
+ /* compute the CRC */
+ uCRC16 = M24SR_ComputeCrc (pBuffer,0x02);
+ /* append the CRC16 */
+ pBuffer [NthByte++] = GETLSB (uCRC16 ) ;
+ pBuffer [NthByte++]= GETMSB (uCRC16 ) ;
+
+ /* send the request */
+ status = NFC_IO_WriteMultiple(DeviceAddr, pBuffer, NthByte);
+ if (status != NFC_IO_STATUS_SUCCESS)
+ {
+ return M24SR_ERROR_TIMEOUT;
+ }
+ status = M24SR_IsAnswerReady (DeviceAddr);
+ if (status != M24SR_STATUS_SUCCESS)
+ {
+ return status;
+ }
+ /* read the response */
+ if ( NFC_IO_ReadMultiple (DeviceAddr , pBuffer, M24SR_STATUSRESPONSE_NBBYTE) != NFC_IO_STATUS_SUCCESS)
+ {
+ return M24SR_ERROR_TIMEOUT;
+ }
+
+ status = M24SR_IsCorrectCRC16Residue (pBuffer, M24SR_STATUSRESPONSE_NBBYTE);
+ return status;
+}
+
+/**
+ * @}
+ */
+
+
+/** @defgroup M24SR_Exported_Functions M24SR Exported Functions
+ * @{
+ */
+
+/**
+ * @brief This function initialize the M24SR device
+ * @param DeviceAddr: I2C address of the device
+ * @param GpoMode: M24SR_GPO_POLLING / M24SR_GPO_SYNCHRO / M24SR_GPO_INTERRUPT
+ * @retval None
+ */
+void M24SR_Init(uint16_t DeviceAddr, uint8_t GpoMode)
+{
+ uGpoMode = GpoMode; /* Global variable initialization */
+
+ if(uGpoMode == M24SR_GPO_INTERRUPT)
+ {
+ NFC_IO_Init(0x1);
+ }
+ else
+ {
+ NFC_IO_Init(0x0);
+ }
+
+ /* build the command */
+ Command.Header.CLA = 0x00;
+ Command.Header.INS = 0x00;
+ /* copy the offset */
+ Command.Header.P1 = 0x00 ;
+ Command.Header.P2 = 0x00 ;
+ /* copy the number of byte of the data field */
+ Command.Body.LC = 0x00 ;
+ /* copy the number of byte to read */
+ Command.Body.LE = 0x00 ;
+ Command.Body.pData = DataBuffer;
+
+ if((uGpoMode == M24SR_GPO_SYNCHRO) || (uGpoMode == M24SR_GPO_INTERRUPT))
+ {
+ if( M24SR_KillSession(DeviceAddr) == M24SR_ACTION_COMPLETED)
+ {
+ M24SR_ManageI2CGPO(DeviceAddr, I2C_ANSWER_READY);
+ M24SR_Deselect (DeviceAddr);
+ }
+ }
+}
+
+/**
+ * @brief This function initialize the M24SR device
+ * @retval None
+ */
+void M24SR_GPO_Callback( void )
+{
+ if( uSynchroMode == M24SR_INTERRUPT_GPO)
+ {
+ GPO_Low = 1;
+ }
+}
+
+/**
+ * @brief This function sends the GetSession command to the M24SR device
+ * @param DeviceAddr: I2C address of the device
+ * @retval M24SR_ACTION_COMPLETED : the function is succesful.
+ * @retval Status (SW1&SW2) : if operation does not complete.
+ */
+uint16_t M24SR_GetSession (uint16_t DeviceAddr)
+{
+ uint8_t Buffer = M24SR_OPENSESSION;
+
+ if (NFC_IO_WriteMultiple(DeviceAddr, &Buffer, 0x01 ) != NFC_IO_STATUS_SUCCESS)
+ {
+ return M24SR_ERROR_TIMEOUT;
+ }
+ /* Insure no access will be done just after open session */
+ /* The only way here is to poll I2C to know when M24SR is ready */
+ /* GPO can not be use with GetSession command */
+ if (NFC_IO_IsDeviceReady(DeviceAddr, NFC_IO_TRIALS) != NFC_IO_STATUS_SUCCESS)
+ {
+ return M24SR_ERROR_TIMEOUT;
+ }
+
+ return M24SR_ACTION_COMPLETED;
+}
+
+
+/**
+ * @brief This function sends the KillSession command to the M24SR device
+ * @param DeviceAddr: I2C address of the device
+ * @retval M24SR_ACTION_COMPLETED : the function is succesful.
+ * @retval M24SR_ERROR_TIMEOUT : The I2C timeout occured.
+ */
+uint16_t M24SR_KillSession (uint16_t DeviceAddr)
+{
+ uint8_t pBuffer[] = {M24SR_KILLSESSION};
+
+ if (NFC_IO_WriteMultiple(DeviceAddr, pBuffer, 0x01) != NFC_IO_STATUS_SUCCESS)
+ {
+ return M24SR_ERROR_TIMEOUT;
+ }
+ /* Insure no access will be done just after open session */
+ /* The only way here is to poll I2C to know when M24SR is ready */
+ /* GPO can not be use with KillSession command */
+ if (NFC_IO_IsDeviceReady(DeviceAddr, NFC_IO_TRIALS) != NFC_IO_STATUS_SUCCESS)
+ {
+ return M24SR_ERROR_TIMEOUT;
+ }
+ return M24SR_ACTION_COMPLETED;
+}
+
+
+/**
+ * @brief This function sends the Deselect command (S-Block format)
+ * @param DeviceAddr: I2C address of the device
+ * @retval M24SR_ACTION_COMPLETED : the function is succesful.
+ * @retval M24SR_ERROR_TIMEOUT : The I2C timeout occured.
+ */
+uint16_t M24SR_Deselect (uint16_t DeviceAddr)
+{
+ uint8_t pBuffer[] = {0xC2,0xE0,0xB4} ;
+ uint16_t status ;
+
+ /* send the request */
+ if (NFC_IO_WriteMultiple(DeviceAddr, pBuffer, M24SR_DESELECTREQUEST_NBBYTE) != NFC_IO_STATUS_SUCCESS)
+ {
+ return M24SR_ERROR_TIMEOUT;
+ }
+ status = M24SR_IsAnswerReady (DeviceAddr);
+ if (status != M24SR_STATUS_SUCCESS)
+ {
+ return status;
+ }
+ /* flush the M24SR buffer */
+ if (NFC_IO_ReadMultiple (DeviceAddr , pBuffer, M24SR_DESELECTREQUEST_NBBYTE) != NFC_IO_STATUS_SUCCESS)
+ {
+ return M24SR_ERROR_TIMEOUT;
+ }
+
+ return M24SR_ACTION_COMPLETED;
+}
+
+
+/**
+ * @brief This function sends the SelectApplication command
+ * @param DeviceAddr: I2C address of the device
+ * @retval M24SR_ACTION_COMPLETED : the function is succesful.
+ * @retval M24SR_ERROR_TIMEOUT : The I2C timeout occured.
+ */
+uint16_t M24SR_SelectApplication (uint16_t DeviceAddr)
+{
+ uint8_t *pBuffer = uM24SRbuffer ,
+ NbByteToRead = M24SR_STATUSRESPONSE_NBBYTE;
+ uint8_t uLc = 0x07,
+ pData[] = {0xD2,0x76,0x00,0x00,0x85,0x01,0x01},
+ uLe = 0x00;
+ uint16_t status ;
+ uint16_t uP1P2 =0x0400,
+ NbByte;
+
+ /* build the command */
+ Command.Header.CLA = C_APDU_CLA_DEFAULT;
+ Command.Header.INS = C_APDU_SELECT_FILE;
+ /* copy the offset */
+ Command.Header.P1 = GETMSB (uP1P2 ) ;
+ Command.Header.P2 = GETLSB (uP1P2 ) ;
+ /* copy the number of byte of the data field */
+ Command.Body.LC = uLc ;
+ /* copy the data */
+ memcpy(Command.Body.pData, pData, uLc);
+ /* copy the number of byte to read */
+ Command.Body.LE = uLe ;
+ /* build the IC command */
+ M24SR_BuildIBlockCommand ( M24SR_CMDSTRUCT_SELECTAPPLICATION, Command, &NbByte , pBuffer);
+
+ /* send the request */
+ if (NFC_IO_WriteMultiple(DeviceAddr, pBuffer, NbByte) != NFC_IO_STATUS_SUCCESS)
+ {
+ return M24SR_ERROR_TIMEOUT;
+ }
+ status = M24SR_IsAnswerReady (DeviceAddr);
+ if (status != M24SR_STATUS_SUCCESS)
+ {
+ return status;
+ }
+ /* read the response */
+ if (NFC_IO_ReadMultiple (DeviceAddr , pBuffer, NbByteToRead) != NFC_IO_STATUS_SUCCESS)
+ {
+ return M24SR_ERROR_TIMEOUT;
+ }
+ status = M24SR_IsCorrectCRC16Residue (pBuffer,NbByteToRead);
+ return status;
+}
+
+
+/**
+ * @brief This function sends the SelectCCFile command
+ * @param DeviceAddr: I2C address of the device
+ * @retval M24SR_ACTION_COMPLETED : the function is succesful.
+ * @retval M24SR_ERROR_TIMEOUT : The I2C timeout occured.
+ * @retval Status (SW1&SW2) : if operation does not complete for another reason.
+ */
+uint16_t M24SR_SelectCCfile (uint16_t DeviceAddr)
+{
+ uint8_t *pBuffer = uM24SRbuffer ,
+ NbByteToRead = M24SR_STATUSRESPONSE_NBBYTE;
+ uint8_t uLc = 0x02;
+ uint16_t status ;
+ uint16_t uP1P2 =0x000C,
+ uNbFileId =CC_FILE_ID,
+ NbByte;
+
+ /* build the command */
+ Command.Header.CLA = C_APDU_CLA_DEFAULT;
+ Command.Header.INS = C_APDU_SELECT_FILE;
+ /* copy the offset */
+ Command.Header.P1 = GETMSB (uP1P2 ) ;
+ Command.Header.P2 = GETLSB (uP1P2 ) ;
+ /* copy the number of byte of the data field */
+ Command.Body.LC = uLc ;
+ /* copy the File Id */
+ Command.Body.pData[0] = GETMSB (uNbFileId ) ;
+ Command.Body.pData[1] = GETLSB (uNbFileId ) ;
+ /* build the IC command */
+ M24SR_BuildIBlockCommand ( M24SR_CMDSTRUCT_SELECTCCFILE, Command, &NbByte , pBuffer);
+
+ /* send the request */
+ if (NFC_IO_WriteMultiple(DeviceAddr, pBuffer, NbByte) != NFC_IO_STATUS_SUCCESS)
+ {
+ return M24SR_ERROR_TIMEOUT;
+ }
+ status = M24SR_IsAnswerReady (DeviceAddr);
+ if (status != M24SR_STATUS_SUCCESS)
+ {
+ return status;
+ }
+ /* read the response */
+ if (NFC_IO_ReadMultiple (DeviceAddr , pBuffer, NbByteToRead) != NFC_IO_STATUS_SUCCESS)
+ {
+ return M24SR_ERROR_TIMEOUT;
+ }
+
+ status = M24SR_IsCorrectCRC16Residue (pBuffer,NbByteToRead);
+ return status;
+}
+
+
+/**
+ * @brief This function sends the SelectSystemFile command
+ * @param DeviceAddr: I2C address of the device
+ * @retval Status (SW1&SW2) : Status of the operation to complete.
+ * @retval M24SR_ERROR_TIMEOUT : The I2C timeout occured.
+ */
+uint16_t M24SR_SelectSystemfile (uint16_t DeviceAddr)
+{
+ uint8_t *pBuffer = uM24SRbuffer ,
+ NbByteToRead = M24SR_STATUSRESPONSE_NBBYTE;
+ uint8_t uLc = 0x02;
+ uint16_t status ;
+ uint16_t uP1P2 =0x000C,
+ uNbFileId =SYSTEM_FILE_ID,
+ NbByte;
+
+ /* build the command */
+ Command.Header.CLA = C_APDU_CLA_DEFAULT;
+ Command.Header.INS = C_APDU_SELECT_FILE;
+ /* copy the offset */
+ Command.Header.P1 = GETMSB (uP1P2 ) ;
+ Command.Header.P2 = GETLSB (uP1P2 ) ;
+ /* copy the number of byte of the data field */
+ Command.Body.LC = uLc ;
+ /* copy the File Id */
+ Command.Body.pData[0] = GETMSB (uNbFileId ) ;
+ Command.Body.pData[1] = GETLSB (uNbFileId ) ;
+ /* build the IC command */
+ M24SR_BuildIBlockCommand ( M24SR_CMDSTRUCT_SELECTCCFILE, Command, &NbByte , pBuffer);
+
+ /* send the request */
+ if (NFC_IO_WriteMultiple(DeviceAddr, pBuffer, NbByte) != NFC_IO_STATUS_SUCCESS)
+ {
+ return M24SR_ERROR_TIMEOUT;
+ }
+ status = M24SR_IsAnswerReady (DeviceAddr);
+ if (status != M24SR_STATUS_SUCCESS)
+ {
+ return status;
+ }
+ /* read the response */
+ if (NFC_IO_ReadMultiple (DeviceAddr , pBuffer, NbByteToRead) != NFC_IO_STATUS_SUCCESS)
+ {
+ return M24SR_ERROR_TIMEOUT;
+ }
+
+ status = M24SR_IsCorrectCRC16Residue (pBuffer,NbByteToRead);
+ return status;
+}
+
+
+/**
+ * @brief This function sends the SelectNDEFfile command
+ * @param DeviceAddr: I2C address of the device
+ * @param NDEFfileId: NDEF identification to select NDEF in M24SR
+ * @retval Status (SW1&SW2) : Status of the operation to complete.
+ * @retval M24SR_ERROR_TIMEOUT : The I2C timeout occured.
+ */
+uint16_t M24SR_SelectNDEFfile (uint16_t DeviceAddr, uint16_t NDEFfileId)
+{
+ uint8_t *pBuffer = uM24SRbuffer ,
+ NbByteToRead = M24SR_STATUSRESPONSE_NBBYTE;
+ uint8_t uLc = 0x02;
+ uint16_t status ;
+ uint16_t uP1P2 =0x000C,
+ NbByte;
+
+ /* build the command */
+ Command.Header.CLA = C_APDU_CLA_DEFAULT;
+ Command.Header.INS = C_APDU_SELECT_FILE;
+ /* copy the offset */
+ Command.Header.P1 = GETMSB (uP1P2 ) ;
+ Command.Header.P2 = GETLSB (uP1P2 ) ;
+ /* copy the number of byte of the data field */
+ Command.Body.LC = uLc ;
+ /* copy the offset */
+ Command.Body.pData[0] = GETMSB (NDEFfileId ) ;
+ Command.Body.pData[1] = GETLSB (NDEFfileId ) ;
+ /* build the IC command */
+ M24SR_BuildIBlockCommand ( M24SR_CMDSTRUCT_SELECTNDEFFILE, Command, &NbByte , pBuffer);
+
+ /* send the request */
+ if (NFC_IO_WriteMultiple(DeviceAddr, pBuffer, NbByte) != NFC_IO_STATUS_SUCCESS)
+ {
+ return M24SR_ERROR_TIMEOUT;
+ }
+ status = M24SR_IsAnswerReady (DeviceAddr);
+ if (status != M24SR_STATUS_SUCCESS)
+ {
+ return status;
+ }
+ /* read the response */
+ if (NFC_IO_ReadMultiple (DeviceAddr , pBuffer, NbByteToRead) != NFC_IO_STATUS_SUCCESS)
+ {
+ return M24SR_ERROR_TIMEOUT;
+ }
+
+ status = M24SR_IsCorrectCRC16Residue (pBuffer,NbByteToRead);
+ return status;
+}
+
+
+/**
+ * @brief This function sends a read binary command
+ * @param DeviceAddr: I2C address of the device
+ * @param Offset : first byte to read
+ * @param NbByteToRead : number of byte to read
+ * @param pBufferRead : pointer of the buffer read from the M24SR device
+ * @retval Status (SW1&SW2) : Status of the operation to complete.
+ * @retval M24SR_ERROR_TIMEOUT : The I2C timeout occured.
+ */
+uint16_t M24SR_ReadBinary (uint16_t DeviceAddr, uint16_t Offset ,uint8_t NbByteToRead , uint8_t *pBufferRead)
+{
+ uint8_t *pBuffer = uM24SRbuffer ;
+ uint16_t status ;
+ uint16_t NbByte;
+
+ /* build the command */
+ Command.Header.CLA = C_APDU_CLA_DEFAULT;
+ Command.Header.INS = C_APDU_READ_BINARY;
+ /* copy the offset */
+ Command.Header.P1 = GETMSB (Offset ) ;
+ Command.Header.P2 = GETLSB (Offset ) ;
+ /* copy the number of byte to read */
+ Command.Body.LE = NbByteToRead ;
+
+ M24SR_BuildIBlockCommand ( M24SR_CMDSTRUCT_READBINARY, Command, &NbByte , pBuffer);
+
+ status = NFC_IO_WriteMultiple(DeviceAddr, pBuffer, NbByte);
+ if (status != NFC_IO_STATUS_SUCCESS)
+ {
+ return M24SR_ERROR_TIMEOUT;
+ }
+ status = M24SR_IsAnswerReady (DeviceAddr);
+ if (status != M24SR_STATUS_SUCCESS)
+ {
+ return status;
+ }
+ status = NFC_IO_ReadMultiple (DeviceAddr , pBuffer, NbByteToRead + M24SR_STATUSRESPONSE_NBBYTE);
+ if (status != NFC_IO_STATUS_SUCCESS)
+ {
+ return M24SR_ERROR_TIMEOUT;
+ }
+
+ status = M24SR_IsCorrectCRC16Residue (pBuffer,NbByteToRead+ M24SR_STATUSRESPONSE_NBBYTE);
+ /* retrieve the data without SW1 & SW2 as provided as return value of the function */
+ memcpy(pBufferRead ,&pBuffer[1],NbByteToRead);
+ return status;
+}
+
+
+/**
+ * @brief This function sends a ST read binary command (no error if access is not inside NDEF file)
+ * @param DeviceAddr: I2C address of the device
+ * @param Offset : first byte to read
+ * @param NbByteToRead : number of byte to read
+ * @param pBufferRead : pointer of the buffer read from the M24SR device
+ * @retval Status (SW1&SW2) : Status of the operation to complete.
+ * @retval M24SR_ERROR_TIMEOUT : The I2C timeout occured.
+ */
+uint16_t M24SR_STReadBinary (uint16_t DeviceAddr, uint16_t Offset, uint8_t NbByteToRead, uint8_t *pBufferRead)
+{
+ uint8_t *pBuffer = uM24SRbuffer ;
+ uint16_t status ;
+ uint16_t NbByte;
+
+ /* build the command */
+ Command.Header.CLA = C_APDU_CLA_ST;
+ Command.Header.INS = C_APDU_READ_BINARY;
+ /* copy the offset */
+ Command.Header.P1 = GETMSB (Offset ) ;
+ Command.Header.P2 = GETLSB (Offset ) ;
+ /* copy the number of byte to read */
+ Command.Body.LE = NbByteToRead ;
+
+ M24SR_BuildIBlockCommand ( M24SR_CMDSTRUCT_READBINARY, Command, &NbByte , pBuffer);
+
+ status = NFC_IO_WriteMultiple(DeviceAddr, pBuffer, NbByte);
+ if (status != NFC_IO_STATUS_SUCCESS)
+ {
+ return M24SR_ERROR_TIMEOUT;
+ }
+ status = M24SR_IsAnswerReady (DeviceAddr);
+ if (status != M24SR_STATUS_SUCCESS)
+ {
+ return status;
+ }
+ status = NFC_IO_ReadMultiple (DeviceAddr , pBuffer, NbByteToRead + M24SR_STATUSRESPONSE_NBBYTE);
+ if (status != NFC_IO_STATUS_SUCCESS)
+ {
+ return M24SR_ERROR_TIMEOUT;
+ }
+
+ status = M24SR_IsCorrectCRC16Residue (pBuffer,NbByteToRead+ M24SR_STATUSRESPONSE_NBBYTE);
+ /* retrieve the data without SW1 & SW2 as provided as return value of the function */
+ memcpy(pBufferRead ,&pBuffer[1],NbByteToRead);
+ return status;
+}
+
+
+/**
+ * @brief This function sends a Update binary command
+ * @param DeviceAddr: I2C address of the device
+ * @param Offset : first byte to read
+ * @param NbByteToWrite : number of byte to write
+ * @param pBufferRead : pointer of the buffer read from the M24SR device
+ * @retval Status (SW1&SW2) : Status of the operation to complete.
+ * @retval M24SR_ERROR_TIMEOUT : The I2C timeout occured.
+ */
+uint16_t M24SR_UpdateBinary (uint16_t DeviceAddr, uint16_t Offset ,uint8_t NbByteToWrite,uint8_t *pDataToWrite)
+{
+ uint8_t *pBuffer = uM24SRbuffer ;
+ uint16_t status ;
+ uint16_t NbByte;
+
+ /* build the command */
+ Command.Header.CLA = C_APDU_CLA_DEFAULT;
+ Command.Header.INS = C_APDU_UPDATE_BINARY;
+ /* copy the offset */
+ Command.Header.P1 = GETMSB (Offset ) ;
+ Command.Header.P2 = GETLSB (Offset ) ;
+ /* copy the number of byte of the data field */
+ Command.Body.LC = NbByteToWrite ;
+ /* copy the File Id */
+ memcpy(Command.Body.pData ,pDataToWrite, NbByteToWrite );
+
+ M24SR_BuildIBlockCommand ( M24SR_CMDSTRUCT_UPDATEBINARY, Command, &NbByte , pBuffer);
+
+ status = NFC_IO_WriteMultiple(DeviceAddr, pBuffer, NbByte);
+ if (status != NFC_IO_STATUS_SUCCESS)
+ {
+ return M24SR_ERROR_TIMEOUT;
+ }
+ status = M24SR_IsAnswerReady (DeviceAddr);
+ if (status != M24SR_STATUS_SUCCESS)
+ {
+ return status;
+ }
+ status = NFC_IO_ReadMultiple (DeviceAddr , pBuffer, M24SR_STATUSRESPONSE_NBBYTE);
+ if (status != NFC_IO_STATUS_SUCCESS)
+ {
+ return M24SR_ERROR_TIMEOUT;
+ }
+ /* if the response is a Watiting frame extenstion request */
+ if (IsSBlock (pBuffer) == M24SR_STATUS_SUCCESS)
+ {
+ /*check the CRC */
+ if (M24SR_IsCorrectCRC16Residue (pBuffer , M24SR_WATINGTIMEEXTRESPONSE_NBBYTE) != M24SR_ERROR_CRC)
+ {
+ /* send the FrameExension response*/
+ status = M24SR_FWTExtension (DeviceAddr, pBuffer [M24SR_OFFSET_PCB+1]);
+ }
+ }
+ else
+ {
+ status = M24SR_IsCorrectCRC16Residue (pBuffer, M24SR_STATUSRESPONSE_NBBYTE);
+ }
+
+ return status;
+}
+
+
+/**
+ * @brief This function sends the Verify command
+ * @param DeviceAddr: I2C address of the device
+ * @param uPwdId : PasswordId ( 0x0001 : Read NDEF pwd or 0x0002 : Write NDEF pwd or 0x0003 : I2C pwd)
+ * @param NbPwdByte : Number of byte ( 0x00 or 0x10)
+ * @param pPwd : pointer on the passwaord
+ * @retval Status (SW1&SW2) : Status of the operation to complete.
+ * @retval M24SR_ERROR_TIMEOUT : The I2C timeout occured.
+ */
+uint16_t M24SR_Verify (uint16_t DeviceAddr, uint16_t uPwdId, uint8_t NbPwdByte ,uint8_t *pPwd)
+{
+ uint8_t *pBuffer = uM24SRbuffer ;
+ uint16_t status = 0x0000 ;
+ uint16_t NbByte;
+
+ /*check the parameters */
+ if (uPwdId > 0x0003)
+ {
+ return M24SR_ERROR_PARAMETER;
+ }
+ if ( (NbPwdByte != 0x00) && (NbPwdByte != 0x10))
+ {
+ return M24SR_ERROR_PARAMETER;
+ }
+
+ /* build the command */
+ Command.Header.CLA = C_APDU_CLA_DEFAULT;
+ Command.Header.INS = C_APDU_VERIFY;
+ /* copy the Password Id */
+ Command.Header.P1 = GETMSB (uPwdId ) ;
+ Command.Header.P2 = GETLSB (uPwdId ) ;
+ /* copy the number of byte of the data field */
+ Command.Body.LC = NbPwdByte ;
+
+ if (NbPwdByte == 0x10)
+ {
+ /* copy the password */
+ memcpy(Command.Body.pData, pPwd, NbPwdByte);
+ /* build the IC command */
+ M24SR_BuildIBlockCommand ( M24SR_CMDSTRUCT_VERIFYBINARYWITHPWD, Command, &NbByte , pBuffer);
+ }
+ else
+ {
+ /* build the IC command */
+ M24SR_BuildIBlockCommand ( M24SR_CMDSTRUCT_VERIFYBINARYWOPWD, Command, &NbByte , pBuffer);
+ }
+
+ /* send the request */
+ status = NFC_IO_WriteMultiple(DeviceAddr, pBuffer, NbByte);
+ if (status != NFC_IO_STATUS_SUCCESS)
+ {
+ return M24SR_ERROR_TIMEOUT;
+ }
+ /* wait for answer ready */
+ status = M24SR_IsAnswerReady (DeviceAddr);
+ if (status != M24SR_STATUS_SUCCESS)
+ {
+ return status;
+ }
+ /* read the response */
+ status = NFC_IO_ReadMultiple (DeviceAddr , pBuffer, M24SR_STATUSRESPONSE_NBBYTE);
+ if (status != NFC_IO_STATUS_SUCCESS)
+ {
+ return M24SR_ERROR_TIMEOUT;
+ }
+
+ status = M24SR_IsCorrectCRC16Residue (pBuffer, M24SR_STATUSRESPONSE_NBBYTE);
+ return status;
+}
+
+
+/**
+ * @brief This function sends the ChangeReferenceData command
+ * @param DeviceAddr: I2C address of the device
+ * @param uPwdId : PasswordId ( 0x0001 : Read NDEF pwd or 0x0002 : Write NDEF pwd or 0x0003 : I2C pwd)
+ * @param pPwd : pointer on the passwaord
+ * @retval Status (SW1&SW2) : Status of the operation to complete.
+ * @retval M24SR_ERROR_TIMEOUT : The I2C timeout occured.
+ */
+uint16_t M24SR_ChangeReferenceData (uint16_t DeviceAddr, uint16_t uPwdId, uint8_t *pPwd)
+{
+ uint8_t *pBuffer = uM24SRbuffer;
+ uint16_t status ;
+ uint16_t NbByte;
+
+ /*check the parameters */
+ if (uPwdId > 0x0003)
+ {
+ return M24SR_ERROR_PARAMETER;
+ }
+
+ /* build the command */
+ Command.Header.CLA = C_APDU_CLA_DEFAULT;
+ Command.Header.INS = C_APDU_CHANGE;
+ /* copy the Password Id */
+ Command.Header.P1 = GETMSB (uPwdId ) ;
+ Command.Header.P2 = GETLSB (uPwdId ) ;
+ /* copy the number of byte of the data field */
+ Command.Body.LC = M24SR_PASSWORD_NBBYTE ;
+ /* copy the password */
+ memcpy(Command.Body.pData, pPwd, M24SR_PASSWORD_NBBYTE);
+ /* build the IC command */
+ M24SR_BuildIBlockCommand ( M24SR_CMDSTRUCT_CHANGEREFDATA, Command, &NbByte , pBuffer);
+
+
+ /* send the request */
+ status = NFC_IO_WriteMultiple(DeviceAddr, pBuffer, NbByte);
+ if (status != NFC_IO_STATUS_SUCCESS)
+ {
+ return M24SR_ERROR_TIMEOUT;
+ }
+ status = M24SR_IsAnswerReady (DeviceAddr);
+ if (status != M24SR_STATUS_SUCCESS)
+ {
+ return status;
+ }
+ /* read the response */
+ status = NFC_IO_ReadMultiple (DeviceAddr , pBuffer, M24SR_STATUSRESPONSE_NBBYTE);
+ if (status != NFC_IO_STATUS_SUCCESS)
+ {
+ return M24SR_ERROR_TIMEOUT;
+ }
+
+ status = M24SR_IsCorrectCRC16Residue (pBuffer, M24SR_STATUSRESPONSE_NBBYTE);
+ return status;
+}
+
+
+/**
+ * @brief This function sends the EnableVerificationRequirement command
+ * @param DeviceAddr: I2C address of the device
+ * @param uReadOrWrite : enable the read or write protection ( 0x0001 : Read or 0x0002 : Write )
+ * @retval Status (SW1&SW2) : Status of the operation to complete.
+ * @retval M24SR_ERROR_TIMEOUT : The I2C timeout occured.
+ */
+uint16_t M24SR_EnableVerificationRequirement (uint16_t DeviceAddr, uint16_t uReadOrWrite)
+{
+ uint8_t *pBuffer = uM24SRbuffer;
+ uint16_t status ;
+ uint16_t NbByte;
+
+ /*check the parameters */
+ if ( (uReadOrWrite != 0x0001) && (uReadOrWrite != 0x0002))
+ {
+ return M24SR_ERROR_PARAMETER;
+ }
+
+ /* build the command */
+ Command.Header.CLA = C_APDU_CLA_DEFAULT;
+ Command.Header.INS = C_APDU_ENABLE;
+ /* copy the Password Id */
+ Command.Header.P1 = GETMSB (uReadOrWrite ) ;
+ Command.Header.P2 = GETLSB (uReadOrWrite ) ;
+ /* build the IC command */
+ M24SR_BuildIBlockCommand ( M24SR_CMDSTRUCT_ENABLEVERIFREQ, Command, &NbByte , pBuffer);
+
+ /* send the request */
+ status = NFC_IO_WriteMultiple(DeviceAddr, pBuffer, NbByte);
+ if (status != NFC_IO_STATUS_SUCCESS)
+ {
+ return M24SR_ERROR_TIMEOUT;
+ }
+ /* The right access to be updated in EEPROM need at least 6ms */
+ status = M24SR_IsAnswerReady (DeviceAddr);
+ if (status != M24SR_STATUS_SUCCESS)
+ {
+ return status;
+ }
+ /* read the response */
+ status = NFC_IO_ReadMultiple (DeviceAddr , pBuffer, M24SR_STATUSRESPONSE_NBBYTE);
+ if (status != NFC_IO_STATUS_SUCCESS)
+ {
+ return M24SR_ERROR_TIMEOUT;
+ }
+
+ status = M24SR_IsCorrectCRC16Residue (pBuffer, M24SR_STATUSRESPONSE_NBBYTE);
+ return status;
+}
+
+
+/**
+ * @brief This function sends the DisableVerificationRequirement command
+ * @param DeviceAddr: I2C address of the device
+ * @param uReadOrWrite : enable the read or write protection ( 0x0001 : Read or 0x0002 : Write )
+ * @retval Status (SW1&SW2) : Status of the operation to complete.
+ * @retval M24SR_ERROR_TIMEOUT : The I2C timeout occured.
+ */
+uint16_t M24SR_DisableVerificationRequirement (uint16_t DeviceAddr, uint16_t uReadOrWrite)
+{
+ uint8_t *pBuffer = uM24SRbuffer;
+ uint16_t status ;
+ uint16_t NbByte;
+
+ /*check the parameters */
+ if ( (uReadOrWrite != 0x0001) && (uReadOrWrite != 0x0002))
+ {
+ return M24SR_ERROR_PARAMETER;
+ }
+
+ /* build the command */
+ Command.Header.CLA = C_APDU_CLA_DEFAULT;
+ Command.Header.INS = C_APDU_DISABLE;
+ /* copy the Password Id */
+ Command.Header.P1 = GETMSB (uReadOrWrite ) ;
+ Command.Header.P2 = GETLSB (uReadOrWrite ) ;
+ /* build the IC command */
+ M24SR_BuildIBlockCommand ( M24SR_CMDSTRUCT_DISABLEVERIFREQ, Command, &NbByte , pBuffer);
+
+ /* send the request */
+ status = NFC_IO_WriteMultiple(DeviceAddr, pBuffer, NbByte);
+ if (status != NFC_IO_STATUS_SUCCESS)
+ {
+ return M24SR_ERROR_TIMEOUT;
+ }
+ /* The right access to be updated in EEPROM need at least 6ms */
+ status = M24SR_IsAnswerReady (DeviceAddr);
+ if (status != M24SR_STATUS_SUCCESS)
+ {
+ return status;
+ }
+ /* read the response */
+ status = NFC_IO_ReadMultiple (DeviceAddr , pBuffer, M24SR_STATUSRESPONSE_NBBYTE);
+ if (status != NFC_IO_STATUS_SUCCESS)
+ {
+ return M24SR_ERROR_TIMEOUT;
+ }
+
+ status = M24SR_IsCorrectCRC16Residue (pBuffer, M24SR_STATUSRESPONSE_NBBYTE);
+ return status;
+}
+
+
+/**
+ * @brief This function sends the EnablePermananentState command
+ * @param DeviceAddr: I2C address of the device
+ * @param uReadOrWrite : enable the read or write protection ( 0x0001 : Read or 0x0002 : Write )
+ * @retval Status (SW1&SW2) : Status of the operation to complete.
+ * @retval M24SR_ERROR_TIMEOUT : The I2C timeout occured.
+ */
+uint16_t M24SR_EnablePermanentState (uint16_t DeviceAddr, uint16_t uReadOrWrite )
+{
+ uint8_t *pBuffer = uM24SRbuffer;
+ uint16_t status ;
+ uint16_t NbByte;
+
+ /*check the parameters */
+ if ( (uReadOrWrite != 0x0001) && (uReadOrWrite != 0x0002))
+ {
+ return M24SR_ERROR_PARAMETER;
+ }
+
+ /* build the command */
+ Command.Header.CLA = C_APDU_CLA_ST;
+ Command.Header.INS = C_APDU_ENABLE;
+ /* copy the Password Id */
+ Command.Header.P1 = GETMSB (uReadOrWrite ) ;
+ Command.Header.P2 = GETLSB (uReadOrWrite ) ;
+ /* build the IC command */
+ M24SR_BuildIBlockCommand ( M24SR_CMDSTRUCT_ENABLEVERIFREQ, Command, &NbByte , pBuffer);
+
+ /* send the request */
+ status = NFC_IO_WriteMultiple(DeviceAddr, pBuffer, NbByte);
+ if (status != NFC_IO_STATUS_SUCCESS)
+ {
+ return M24SR_ERROR_TIMEOUT;
+ }
+ status = M24SR_IsAnswerReady (DeviceAddr);
+ if (status != M24SR_STATUS_SUCCESS)
+ {
+ return status;
+ }
+ /* read the response */
+ status = NFC_IO_ReadMultiple (DeviceAddr , pBuffer, M24SR_STATUSRESPONSE_NBBYTE);
+ if (status != NFC_IO_STATUS_SUCCESS)
+ {
+ return M24SR_ERROR_TIMEOUT;
+ }
+
+ status = M24SR_IsCorrectCRC16Residue (pBuffer, M24SR_STATUSRESPONSE_NBBYTE);
+ return status;
+}
+
+
+/**
+ * @brief This function sends the DisablePermanentState command
+ * @param DeviceAddr: I2C address of the device
+ * @param uReadOrWrite : enable the read or write protection ( 0x0001 : Read or 0x0002 : Write )
+ * @retval Status (SW1&SW2) : Status of the operation to complete.
+ * @retval M24SR_ERROR_TIMEOUT : The I2C timeout occured.
+ */
+uint16_t M24SR_DisablePermanentState (uint16_t DeviceAddr, uint16_t uReadOrWrite )
+{
+ uint8_t *pBuffer = uM24SRbuffer;
+ uint16_t status ;
+ uint16_t NbByte;
+
+ /*check the parameters */
+ if ( (uReadOrWrite != 0x0001) && (uReadOrWrite != 0x0002))
+ {
+ return M24SR_ERROR_PARAMETER;
+ }
+
+ /* build the command */
+ Command.Header.CLA = C_APDU_CLA_ST;
+ Command.Header.INS = C_APDU_DISABLE;
+ /* copy the Password Id */
+ Command.Header.P1 = GETMSB (uReadOrWrite ) ;
+ Command.Header.P2 = GETLSB (uReadOrWrite ) ;
+ /* build the IC command */
+ M24SR_BuildIBlockCommand ( M24SR_CMDSTRUCT_DISABLEVERIFREQ, Command, &NbByte , pBuffer);
+
+ /* send the request */
+ status = NFC_IO_WriteMultiple(DeviceAddr, pBuffer, NbByte);
+ if (status != NFC_IO_STATUS_SUCCESS)
+ {
+ return M24SR_ERROR_TIMEOUT;
+ }
+ status = M24SR_IsAnswerReady (DeviceAddr);
+ if (status != M24SR_STATUS_SUCCESS)
+ {
+ return status;
+ }
+ /* read the response */
+ status = NFC_IO_ReadMultiple (DeviceAddr , pBuffer, M24SR_STATUSRESPONSE_NBBYTE);
+ if (status != NFC_IO_STATUS_SUCCESS)
+ {
+ return M24SR_ERROR_TIMEOUT;
+ }
+
+ status = M24SR_IsCorrectCRC16Residue (pBuffer, M24SR_STATUSRESPONSE_NBBYTE);
+ return status;
+}
+
+/**
+ * @brief This function generates a interrupt on GPO pin
+ * @param DeviceAddr: I2C address of the device
+ * @retval Status (SW1&SW2) : Status of the operation to complete.
+ * @retval M24SR_ERROR_TIMEOUT : The I2C timeout occured.
+ */
+uint16_t M24SR_SendInterrupt (uint16_t DeviceAddr)
+{
+ uint8_t *pBuffer = uM24SRbuffer;
+ uint16_t uP1P2 =0x001E;
+ uint16_t status ;
+ uint16_t NbByte;
+
+ status = M24SR_ManageI2CGPO(DeviceAddr, INTERRUPT);
+
+ /* build the command */
+ Command.Header.CLA = C_APDU_CLA_ST;
+ Command.Header.INS = C_APDU_INTERRUPT;
+ /* copy the Password Id */
+ Command.Header.P1 = GETMSB (uP1P2 ) ;
+ Command.Header.P2 = GETLSB (uP1P2 ) ;
+ Command.Body.LC = 0x00 ;
+ /* build the IC command */
+ M24SR_BuildIBlockCommand ( M24SR_CMDSTRUCT_SENDINTERRUPT, Command, &NbByte , pBuffer);
+
+ /* send the request */
+ status = NFC_IO_WriteMultiple(DeviceAddr, pBuffer, NbByte);
+ if (status != NFC_IO_STATUS_SUCCESS)
+ {
+ return M24SR_ERROR_TIMEOUT;
+ }
+ status = M24SR_IsAnswerReady (DeviceAddr);
+ if (status != M24SR_STATUS_SUCCESS)
+ {
+ return status;
+ }
+ /* read the response */
+ status = NFC_IO_ReadMultiple (DeviceAddr , pBuffer, M24SR_STATUSRESPONSE_NBBYTE);
+ if (status != NFC_IO_STATUS_SUCCESS)
+ {
+ return M24SR_ERROR_TIMEOUT;
+ }
+
+ status = M24SR_IsCorrectCRC16Residue (pBuffer, M24SR_STATUSRESPONSE_NBBYTE);
+ return status;
+}
+
+/**
+ * @brief This function force GPO pin to low state or high Z
+ * @param DeviceAddr: I2C address of the device
+ * @param uSetOrReset : select if GPO must be low (reset) or HiZ
+ * @retval Status (SW1&SW2) : Status of the operation to complete.
+ * @retval M24SR_ERROR_TIMEOUT : The I2C timeout occured.
+ */
+uint16_t M24SR_StateControl (uint16_t DeviceAddr, uint8_t uSetOrReset )
+{
+ uint8_t *pBuffer = uM24SRbuffer;
+ uint16_t uP1P2 =0x001F;
+ uint16_t status ;
+ uint16_t NbByte;
+
+ /*check the parameters */
+ if ( (uSetOrReset != 0x01) && (uSetOrReset != 0x00))
+ {
+ return M24SR_ERROR_PARAMETER;
+ }
+
+ status = M24SR_ManageI2CGPO(DeviceAddr, STATE_CONTROL);
+
+ /* build the command */
+ Command.Header.CLA = C_APDU_CLA_ST;
+ Command.Header.INS = C_APDU_INTERRUPT;
+ /* copy the Password Id */
+ Command.Header.P1 = GETMSB (uP1P2 ) ;
+ Command.Header.P2 = GETLSB (uP1P2 ) ;
+ Command.Body.LC = 0x01 ;
+ /* copy the data */
+ memcpy(Command.Body.pData , &uSetOrReset, 0x01 );
+ //Command.Body.LE = 0x00 ;
+ /* build the IC command */
+ M24SR_BuildIBlockCommand ( M24SR_CMDSTRUCT_GPOSTATE, Command, &NbByte , pBuffer);
+
+ /* send the request */
+ status = NFC_IO_WriteMultiple(DeviceAddr, pBuffer, NbByte);
+ if (status != NFC_IO_STATUS_SUCCESS)
+ {
+ return M24SR_ERROR_TIMEOUT;
+ }
+ status = M24SR_IsAnswerReady (DeviceAddr);
+ if (status != M24SR_STATUS_SUCCESS)
+ {
+ return status;
+ }
+ /* read the response */
+ status = NFC_IO_ReadMultiple (DeviceAddr , pBuffer, M24SR_STATUSRESPONSE_NBBYTE);
+ if (status != NFC_IO_STATUS_SUCCESS)
+ {
+ return M24SR_ERROR_TIMEOUT;
+ }
+
+ status = M24SR_IsCorrectCRC16Residue (pBuffer, M24SR_STATUSRESPONSE_NBBYTE);
+ return status;
+}
+
+/**
+ * @brief This function configure GPO purpose for I2C session
+ * @param DeviceAddr: I2C address of the device
+ * @param GPO_I2Cconfig: GPO configuration to set
+ * @retval Status (SW1&SW2) : Status of the operation to complete.
+ */
+uint16_t M24SR_ManageI2CGPO(uint16_t DeviceAddr, uint8_t GPO_I2Cconfig)
+{
+ uint16_t status;
+ uint8_t GPO_config;
+ uint8_t DefaultPassword[16]={0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00};
+
+ if( GPO_I2Cconfig > STATE_CONTROL)
+ {
+ return M24SR_ERROR_PARAMETER;
+ }
+
+ /* we must not be in interrupt mode for I2C synchro as we will change GPO purpose */
+ M24SR_SetI2CSynchroMode(M24SR_WAITINGTIME_POLLING);
+
+ M24SR_SelectApplication(DeviceAddr);
+ M24SR_SelectSystemfile(DeviceAddr);
+ M24SR_ReadBinary (DeviceAddr, 0x0004 , 0x01 , &GPO_config );
+
+ /* Update only GPO purpose for I2C */
+ GPO_config = (GPO_config & 0xF0) | GPO_I2Cconfig;
+ M24SR_SelectSystemfile(DeviceAddr);
+ M24SR_Verify(DeviceAddr, M24SR_I2C_PWD ,0x10 ,DefaultPassword );
+ status = M24SR_UpdateBinary (DeviceAddr, 0x0004 ,0x01, &(GPO_config) );
+
+ /* if we have set interrupt mode for I2C synchro we can enable interrupt mode */
+ if (GPO_I2Cconfig == I2C_ANSWER_READY && status == M24SR_ACTION_COMPLETED)
+ {
+ if(uGpoMode == M24SR_GPO_SYNCHRO)
+ {
+ M24SR_SetI2CSynchroMode(M24SR_WAITINGTIME_GPO);
+ }
+ else
+ {
+ M24SR_SetI2CSynchroMode(M24SR_INTERRUPT_GPO);
+ }
+ }
+
+ return status;
+}
+
+/**
+ * @brief This function configure GPO purpose for RF session
+ * @param DeviceAddr: I2C address of the device
+ * @param GPO_RFconfig: GPO configuration to set
+ * @retval Status (SW1&SW2) : Status of the operation to complete.
+ */
+uint16_t M24SR_ManageRFGPO(uint16_t DeviceAddr, uint8_t GPO_RFconfig)
+{
+ uint16_t status;
+ uint8_t GPO_config;
+ uint8_t DefaultPassword[16]={0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00};
+
+ if( GPO_RFconfig > STATE_CONTROL)
+ {
+ return M24SR_ERROR_PARAMETER;
+ }
+
+ M24SR_SelectApplication(DeviceAddr);
+ M24SR_SelectSystemfile(DeviceAddr);
+ M24SR_ReadBinary (DeviceAddr, 0x0004 , 0x01 , &GPO_config );
+
+ /* Update only GPO purpose for I2C */
+ GPO_config = (GPO_config & 0x0F) | (GPO_RFconfig<<4);
+ M24SR_SelectSystemfile(DeviceAddr);
+ M24SR_Verify(DeviceAddr, M24SR_I2C_PWD ,0x10 ,DefaultPassword );
+ status = M24SR_UpdateBinary (DeviceAddr, 0x0004 ,0x01, &(GPO_config));
+
+ return status;
+}
+
+/**
+ * @brief This functions returns M24SR_STATUS_SUCCESS when a response is ready
+ * @param DeviceAddr: I2C address of the device
+ * @retval M24SR_STATUS_SUCCESS : a response of the M24LR is ready
+ * @retval M24SR_ERROR_DEFAULT : the response of the M24LR is not ready
+ */
+static uint16_t M24SR_IsAnswerReady (uint16_t DeviceAddr)
+{
+ uint32_t retry = 0xFFFFF;
+ uint8_t stable = 0;
+ uint8_t PinState;
+
+ switch (uSynchroMode)
+ {
+ case M24SR_WAITINGTIME_POLLING :
+ if(NFC_IO_IsDeviceReady(DeviceAddr, NFC_IO_TRIALS) != NFC_IO_STATUS_SUCCESS)
+ {
+ return M24SR_ERROR_TIMEOUT;
+ }
+ break;
+
+ case M24SR_WAITINGTIME_TIMEOUT :
+ /* M24SR FWI=5 => (256*16/fc)*2^5=9.6ms but M24SR ask for extended time to program up to 246Bytes. */
+ NFC_IO_Delay(M24SR_ANSWER_TIMEOUT);
+ break;
+
+ case M24SR_WAITINGTIME_GPO :
+ /* mbd does not support interrupt for the moment with nucleo board */
+ do
+ {
+ NFC_IO_ReadState(&PinState);
+ if( PinState == 0) /* RESET */
+ {
+ stable ++;
+ }
+ retry --;
+ }
+ while(stable < M24SR_ANSWER_STABLE && retry>0);
+ if(!retry)
+ {
+ return M24SR_ERROR_TIMEOUT;
+ }
+ break;
+
+ case M24SR_INTERRUPT_GPO :
+ /* Check if the GPIO is not already low before calling this function */
+ NFC_IO_ReadState(&PinState);
+ if(PinState == 1) /* SET */
+ {
+ while (GPO_Low == 0);
+ }
+ GPO_Low = 0;
+ break;
+
+ default :
+ return M24SR_ERROR_DEFAULT;
+ }
+
+ return M24SR_STATUS_SUCCESS;
+}
+
+/**
+ * @brief This function enable or disable RF communication
+ * @param OnOffChoice: GPO configuration to set
+ * @retval Status (SW1&SW2) : Status of the operation to complete.
+ */
+void M24SR_RFConfig( uint8_t OnOffChoice)
+{
+ /* Disable RF */
+ if ( OnOffChoice != 0 )
+ {
+ NFC_IO_RfDisable(0); /* PIN RESET */
+ }
+ else
+ {
+ NFC_IO_RfDisable(1); /* PIN SET */
+ }
+}
+
+/**
+ * @brief this functions configure I2C synchronization mode
+ * @param WaitingMode : interruption or polling
+ * @retval None
+ */
+static void M24SR_SetI2CSynchroMode( uint8_t WaitingMode)
+{
+ if((uGpoMode == M24SR_GPO_SYNCHRO) || (uGpoMode == M24SR_GPO_INTERRUPT))
+ {
+ uSynchroMode = WaitingMode;
+ }
+ else /* GPO_POLLING */
+ {
+ if(WaitingMode == M24SR_WAITINGTIME_GPO || WaitingMode == M24SR_INTERRUPT_GPO)
+ uSynchroMode = M24SR_WAITINGTIME_POLLING; /* Force Polling */
+ else
+ uSynchroMode = WaitingMode;
+ }
+}
+
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/******************* (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/P3_SETR2/Components/m24sr/m24sr.h b/P3_SETR2/Components/m24sr/m24sr.h
new file mode 100644
index 0000000..237d044
--- /dev/null
+++ b/P3_SETR2/Components/m24sr/m24sr.h
@@ -0,0 +1,157 @@
+/**
+ ******************************************************************************
+ * @file m24sr.h
+ * @author MCD Application Team
+ * @brief This file provides a set of functions needed to manage M24SR
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2017 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __M24SR_H
+#define __M24SR_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stdint.h"
+
+/** @addtogroup BSP
+ * @{
+ */
+
+/** @addtogroup Component
+ * @{
+ */
+
+/** @addtogroup M24SR
+ * @{
+ */
+
+/** @defgroup M24SR_Exported_Constants M24SR Exported Constants
+ * @{
+ */
+/* NFC IO specific config parameters */
+#define NFC_IO_STATUS_SUCCESS (uint16_t) 0x0000
+#define NFC_IO_ERROR_TIMEOUT (uint16_t) 0x0011
+#define NFC_IO_TRIALS (uint32_t) 1 /* In case M24SR will reply ACK failed allow to perform retry */
+
+/* Status and error code -----------------------------------------------------*/
+#define M24SR_ACTION_COMPLETED (uint16_t) 0x9000
+#define M24SR_STATUS_SUCCESS (uint16_t) 0x0000
+#define M24SR_ERROR_DEFAULT (uint16_t) 0x0010
+#define M24SR_ERROR_TIMEOUT (uint16_t) 0x0011
+#define M24SR_ERROR_CRC (uint16_t) 0x0012
+#define M24SR_ERROR_NACK (uint16_t) 0x0013
+#define M24SR_ERROR_PARAMETER (uint16_t) 0x0014
+#define M24SR_ERROR_NBATEMPT (uint16_t) 0x0015
+#define M24SR_ERROR_NOACKNOWLEDGE (uint16_t) 0x0016
+
+#define M24SR_ANSWER_TIMEOUT (uint32_t) 80 /* Timeout used by the component function NFC_IO_IsDeviceReady() */
+#define M24SR_ANSWER_STABLE (uint8_t) 5 /* Loop repetition used by the component function NFC_IO_IsDeviceReady() */
+
+
+/*-------------------------- GPO_Mode ----------------------------*/
+#define M24SR_GPO_POLLING (uint8_t) 0x00 /* Normal I²C polling */
+#define M24SR_GPO_SYNCHRO (uint8_t) 0x01 /* allow to use GPO polling as I2C synchronization */
+#define M24SR_GPO_INTERRUPT (uint8_t) 0x02 /* allow to use GPO interrupt as I2C synchronization */
+
+
+/*-------------------------- Password_Management ----------------------------*/
+#define M24SR_READ_PWD (uint16_t) 0x0001
+#define M24SR_WRITE_PWD (uint16_t) 0x0002
+#define M24SR_I2C_PWD (uint16_t) 0x0003
+
+/*-------------------------- Verify command answer ----------------------------*/
+#define M24SR_PWD_NOT_NEEDED (uint16_t) 0x9000
+#define M24SR_PWD_NEEDED (uint16_t) 0x6300
+#define M24SR_PWD_CORRECT (uint16_t) 0x9000
+
+/**
+ * @}
+ */
+
+/** @defgroup M24SR_Exported_FunctionsPrototypes M24SR Exported FunctionsPrototypes
+ * @{
+ */
+/* public function --------------------------------------------------------------------------*/
+void M24SR_Init (uint16_t DeviceAddr, uint8_t GpoMode);
+uint16_t M24SR_GetSession (uint16_t DeviceAddr);
+uint16_t M24SR_KillSession (uint16_t DeviceAddr);
+uint16_t M24SR_Deselect (uint16_t DeviceAddr);
+uint16_t M24SR_SelectApplication (uint16_t DeviceAddr);
+uint16_t M24SR_SelectCCfile (uint16_t DeviceAddr);
+uint16_t M24SR_SelectNDEFfile (uint16_t DeviceAddr, uint16_t NDEFfileId);
+uint16_t M24SR_SelectSystemfile (uint16_t DeviceAddr);
+uint16_t M24SR_ReadBinary (uint16_t DeviceAddr, uint16_t Offset, uint8_t NbByteToRead, uint8_t *pBufferRead);
+uint16_t M24SR_STReadBinary (uint16_t DeviceAddr, uint16_t Offset, uint8_t NbByteToRead, uint8_t *pBufferRead);
+uint16_t M24SR_UpdateBinary (uint16_t DeviceAddr, uint16_t Offset, uint8_t NbByteToWrite, uint8_t *pDataToWrite);
+uint16_t M24SR_Verify (uint16_t DeviceAddr, uint16_t uPwdId, uint8_t NbPwdByte, uint8_t *pPwd);
+uint16_t M24SR_ChangeReferenceData (uint16_t DeviceAddr, uint16_t uPwdId, uint8_t *pPwd);
+uint16_t M24SR_EnableVerificationRequirement (uint16_t DeviceAddr, uint16_t uReadOrWrite);
+uint16_t M24SR_DisableVerificationRequirement (uint16_t DeviceAddr, uint16_t uReadOrWrite);
+uint16_t M24SR_EnablePermanentState (uint16_t DeviceAddr, uint16_t uReadOrWrite);
+uint16_t M24SR_DisablePermanentState (uint16_t DeviceAddr, uint16_t uReadOrWrite);
+uint16_t M24SR_SendInterrupt (uint16_t DeviceAddr);
+uint16_t M24SR_StateControl (uint16_t DeviceAddr, uint8_t uSetOrReset);
+uint16_t M24SR_ManageI2CGPO (uint16_t DeviceAddr, uint8_t GPO_I2Cconfig);
+uint16_t M24SR_ManageRFGPO (uint16_t DeviceAddr, uint8_t GPO_RFconfig);
+void M24SR_RFConfig (uint8_t OnOffChoice);
+void M24SR_GPO_Callback (void );
+
+/**
+ * @}
+ */
+
+
+/** @defgroup M24SR_Imported_Functions M24SR Imported Functions
+ * @{
+ */
+/* IO functions */
+extern void NFC_IO_Init(uint8_t GpoIrqEnable);
+extern void NFC_IO_DeInit(void);
+extern uint16_t NFC_IO_ReadMultiple (uint8_t Addr, uint8_t *pBuffer, uint16_t Length );
+extern uint16_t NFC_IO_WriteMultiple (uint8_t Addr, uint8_t *pBuffer, uint16_t Length);
+extern uint16_t NFC_IO_IsDeviceReady (uint8_t Addr, uint32_t Trials);
+extern void NFC_IO_ReadState(uint8_t * pPinState);
+extern void NFC_IO_RfDisable(uint8_t PinState);
+extern void NFC_IO_Delay(uint32_t Delay);
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __M24SR_H */
+
+
+
+
+/******************* (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/P3_SETR2/Components/mfxstm32l152/Release_Notes.html b/P3_SETR2/Components/mfxstm32l152/Release_Notes.html
new file mode 100644
index 0000000..97e155e
--- /dev/null
+++ b/P3_SETR2/Components/mfxstm32l152/Release_Notes.html
@@ -0,0 +1,126 @@
+
+
+
+
+
+
+ Release Notes for MFXSTM32L152 Component Drivers
+
+
+
+
+
+
+
+
+
+
+Release Notes for MFXSTM32L152 Component Drivers
+Copyright © 2015 STMicroelectronics
+
+
+
+
+
+
License
+
Licensed by ST under BSD 3-Clause license (the "License"). You may not use this package except in compliance with the License. You may obtain a copy of the License at:
+
https://opensource.org/licenses/BSD-3-Clause
+
Purpose
+
This directory contains the MFXSTM32L152 component drivers.
+
+
+
Update History
+
+
V2.0.3 / 03-April-2019
+
+
Main Changes
+
+Update release notes format
+
+
+
+
+
V2.0.2 / 25-October-2018
+
+
Main Changes
+
+Reformat the BSD 3-Clause license declaration in the files header (replace license terms by a web reference to OSI website where those terms lie)
+
+
+
+
+
V2.0.1 / 02-June-2017
+
+
Main Changes
+
+Update comments to be used for PDSC generation
+
+
+
+
+
V2.0.0 / 24-June-2015
+
+
Main Changes
+
+Add Shunt management of MFXSTM32L152 component
+
+new mfxstm32l152_IDD_ConfigShuntNbLimit() and mfxstm32l152_IDD_GetShuntUsed() APIs
+
+Add mfxstm32l152_WriteReg() API
+
+
NOTE This release must be used with BSP Common driver V4.0.0 or later
+
+
+
+
V1.2.0 / 28-April-2015
+
+
Main Changes
+
+mfxstm32l152_IO_Config(): remove unnecessary delay
+mfxstm32l152_TS_DetectTouch(): improve TouchScreen speed
+mfxstm32l152_IDD_Config(): add configuration of number of measure to be performed, with delay between 2 measures
+
+
NOTE
+This release must be used with BSP Common driver V3.0.0 or later
+
+
+
+
V1.1.0 / 10-February-2015
+
+
Main Changes
+
+Low Power management of MFXSTM32L152 component:
+
+New mfxstm32l152_DeInit() and mfxstm32l152_WakeUp() API
+mfxstm32l152_LowPower() API completed to be MFXSTM32L152 in Standby mode
+
+
+
NOTE
+This release must be used with BSP Common driver V2.2.0 or later
+
+
+
+
V1.0.0 / 05-February-2014
+
+
Main Changes
+
+First official release of MFXSTM32L152 IO Expander component driver.
+
+
NOTE
+This release must be used with BSP Common driver V2.1.0 or later
+
+
+
+
+
+
+
diff --git a/P3_SETR2/Components/mfxstm32l152/mfxstm32l152.c b/P3_SETR2/Components/mfxstm32l152/mfxstm32l152.c
new file mode 100644
index 0000000..ce5b590
--- /dev/null
+++ b/P3_SETR2/Components/mfxstm32l152/mfxstm32l152.c
@@ -0,0 +1,1586 @@
+/**
+ ******************************************************************************
+ * @file mfxstm32l152.c
+ * @author MCD Application Team
+ * @brief This file provides a set of functions needed to manage the MFXSTM32L152
+ * IO Expander devices.
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2015 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/* Includes ------------------------------------------------------------------*/
+#include "mfxstm32l152.h"
+
+/** @addtogroup BSP
+ * @{
+ */
+
+/** @addtogroup Component
+ * @{
+ */
+
+/** @defgroup MFXSTM32L152
+ * @{
+ */
+
+/* Private typedef -----------------------------------------------------------*/
+
+/** @defgroup MFXSTM32L152_Private_Types_Definitions
+ * @{
+ */
+
+/* Private define ------------------------------------------------------------*/
+
+/** @defgroup MFXSTM32L152_Private_Defines
+ * @{
+ */
+#define MFXSTM32L152_MAX_INSTANCE 3
+
+/* Private macro -------------------------------------------------------------*/
+
+/** @defgroup MFXSTM32L152_Private_Macros
+ * @{
+ */
+
+/* Private variables ---------------------------------------------------------*/
+
+/** @defgroup MFXSTM32L152_Private_Variables
+ * @{
+ */
+
+/* Touch screen driver structure initialization */
+TS_DrvTypeDef mfxstm32l152_ts_drv =
+{
+ mfxstm32l152_Init,
+ mfxstm32l152_ReadID,
+ mfxstm32l152_Reset,
+
+ mfxstm32l152_TS_Start,
+ mfxstm32l152_TS_DetectTouch,
+ mfxstm32l152_TS_GetXY,
+
+ mfxstm32l152_TS_EnableIT,
+ mfxstm32l152_TS_ClearIT,
+ mfxstm32l152_TS_ITStatus,
+ mfxstm32l152_TS_DisableIT,
+};
+
+/* IO driver structure initialization */
+IO_DrvTypeDef mfxstm32l152_io_drv =
+{
+ mfxstm32l152_Init,
+ mfxstm32l152_ReadID,
+ mfxstm32l152_Reset,
+
+ mfxstm32l152_IO_Start,
+ mfxstm32l152_IO_Config,
+ mfxstm32l152_IO_WritePin,
+ mfxstm32l152_IO_ReadPin,
+
+ mfxstm32l152_IO_EnableIT,
+ mfxstm32l152_IO_DisableIT,
+ mfxstm32l152_IO_ITStatus,
+ mfxstm32l152_IO_ClearIT,
+};
+
+/* IDD driver structure initialization */
+IDD_DrvTypeDef mfxstm32l152_idd_drv =
+{
+ mfxstm32l152_Init,
+ mfxstm32l152_DeInit,
+ mfxstm32l152_ReadID,
+ mfxstm32l152_Reset,
+ mfxstm32l152_LowPower,
+ mfxstm32l152_WakeUp,
+
+ mfxstm32l152_IDD_Start,
+ mfxstm32l152_IDD_Config,
+ mfxstm32l152_IDD_GetValue,
+
+ mfxstm32l152_IDD_EnableIT,
+ mfxstm32l152_IDD_ClearIT,
+ mfxstm32l152_IDD_GetITStatus,
+ mfxstm32l152_IDD_DisableIT,
+
+ mfxstm32l152_Error_EnableIT,
+ mfxstm32l152_Error_ClearIT,
+ mfxstm32l152_Error_GetITStatus,
+ mfxstm32l152_Error_DisableIT,
+ mfxstm32l152_Error_ReadSrc,
+ mfxstm32l152_Error_ReadMsg
+};
+
+
+/* mfxstm32l152 instances by address */
+uint8_t mfxstm32l152[MFXSTM32L152_MAX_INSTANCE] = {0};
+/**
+ * @}
+ */
+
+/* Private function prototypes -----------------------------------------------*/
+
+/** @defgroup MFXSTM32L152_Private_Function_Prototypes
+ * @{
+ */
+static uint8_t mfxstm32l152_GetInstance(uint16_t DeviceAddr);
+static uint8_t mfxstm32l152_ReleaseInstance(uint16_t DeviceAddr);
+static void mfxstm32l152_reg24_setPinValue(uint16_t DeviceAddr, uint8_t RegisterAddr, uint32_t PinPosition, uint8_t PinValue );
+
+/* Private functions ---------------------------------------------------------*/
+
+/** @defgroup MFXSTM32L152_Private_Functions
+ * @{
+ */
+
+/**
+ * @brief Initialize the mfxstm32l152 and configure the needed hardware resources
+ * @param DeviceAddr: Device address on communication Bus.
+ * @retval None
+ */
+void mfxstm32l152_Init(uint16_t DeviceAddr)
+{
+ uint8_t instance;
+ uint8_t empty;
+
+ /* Check if device instance already exists */
+ instance = mfxstm32l152_GetInstance(DeviceAddr);
+
+ /* To prevent double initialization */
+ if(instance == 0xFF)
+ {
+ /* Look for empty instance */
+ empty = mfxstm32l152_GetInstance(0);
+
+ if(empty < MFXSTM32L152_MAX_INSTANCE)
+ {
+ /* Register the current device instance */
+ mfxstm32l152[empty] = DeviceAddr;
+
+ /* Initialize IO BUS layer */
+ MFX_IO_Init();
+ }
+ }
+
+ mfxstm32l152_SetIrqOutPinPolarity(DeviceAddr, MFXSTM32L152_OUT_PIN_POLARITY_HIGH);
+ mfxstm32l152_SetIrqOutPinType(DeviceAddr, MFXSTM32L152_OUT_PIN_TYPE_PUSHPULL);
+}
+
+/**
+ * @brief DeInitialize the mfxstm32l152 and unconfigure the needed hardware resources
+ * @param DeviceAddr: Device address on communication Bus.
+ * @retval None
+ */
+void mfxstm32l152_DeInit(uint16_t DeviceAddr)
+{
+ uint8_t instance;
+
+ /* release existing instance */
+ instance = mfxstm32l152_ReleaseInstance(DeviceAddr);
+
+ /* De-Init only if instance was previously registered */
+ if(instance != 0xFF)
+ {
+ /* De-Initialize IO BUS layer */
+ MFX_IO_DeInit();
+ }
+}
+
+/**
+ * @brief Reset the mfxstm32l152 by Software.
+ * @param DeviceAddr: Device address on communication Bus.
+ * @retval None
+ */
+void mfxstm32l152_Reset(uint16_t DeviceAddr)
+{
+ /* Soft Reset */
+ MFX_IO_Write(DeviceAddr, MFXSTM32L152_REG_ADR_SYS_CTRL, MFXSTM32L152_SWRST);
+
+ /* Wait for a delay to ensure registers erasing */
+ MFX_IO_Delay(10);
+}
+
+/**
+ * @brief Put mfxstm32l152 Device in Low Power standby mode
+ * @param DeviceAddr: Device address on communication Bus.
+ * @retval None
+ */
+void mfxstm32l152_LowPower(uint16_t DeviceAddr)
+{
+ /* Enter standby mode */
+ MFX_IO_Write(DeviceAddr, MFXSTM32L152_REG_ADR_SYS_CTRL, MFXSTM32L152_STANDBY);
+
+ /* enable wakeup pin */
+ MFX_IO_EnableWakeupPin();
+}
+
+/**
+ * @brief WakeUp mfxstm32l152 from standby mode
+ * @param DeviceAddr: Device address on communication Bus.
+ * @retval None
+ */
+void mfxstm32l152_WakeUp(uint16_t DeviceAddr)
+{
+ uint8_t instance;
+
+ /* Check if device instance already exists */
+ instance = mfxstm32l152_GetInstance(DeviceAddr);
+
+ /* if instance does not exist, first initialize pins*/
+ if(instance == 0xFF)
+ {
+ /* enable wakeup pin */
+ MFX_IO_EnableWakeupPin();
+ }
+
+ /* toggle wakeup pin */
+ MFX_IO_Wakeup();
+}
+
+/**
+ * @brief Read the MFXSTM32L152 IO Expander device ID.
+ * @param DeviceAddr: Device address on communication Bus.
+ * @retval The Device ID (two bytes).
+ */
+uint16_t mfxstm32l152_ReadID(uint16_t DeviceAddr)
+{
+ uint8_t id;
+
+ /* Wait for a delay to ensure the state of registers */
+ MFX_IO_Delay(1);
+
+ /* Initialize IO BUS layer */
+ MFX_IO_Init();
+
+ id = MFX_IO_Read(DeviceAddr, MFXSTM32L152_REG_ADR_ID);
+
+ /* Return the device ID value */
+ return (id);
+}
+
+/**
+ * @brief Read the MFXSTM32L152 device firmware version.
+ * @param DeviceAddr: Device address on communication Bus.
+ * @retval The Device FW version (two bytes).
+ */
+uint16_t mfxstm32l152_ReadFwVersion(uint16_t DeviceAddr)
+{
+ uint8_t data[2];
+
+ MFX_IO_ReadMultiple((uint8_t) DeviceAddr, MFXSTM32L152_REG_ADR_FW_VERSION_MSB, data, sizeof(data)) ;
+
+ /* Recompose MFX firmware value */
+ return ((data[0] << 8) | data[1]);
+}
+
+/**
+ * @brief Enable the interrupt mode for the selected IT source
+ * @param DeviceAddr: Device address on communication Bus.
+ * @param Source: The interrupt source to be configured, could be:
+ * @arg MFXSTM32L152_IRQ_GPIO: IO interrupt
+ * @arg MFXSTM32L152_IRQ_IDD : IDD interrupt
+ * @arg MFXSTM32L152_IRQ_ERROR : Error interrupt
+ * @arg MFXSTM32L152_IRQ_TS_DET : Touch Screen Controller Touch Detected interrupt
+ * @arg MFXSTM32L152_IRQ_TS_NE : Touch Screen FIFO Not Empty
+ * @arg MFXSTM32L152_IRQ_TS_TH : Touch Screen FIFO threshold triggered
+ * @arg MFXSTM32L152_IRQ_TS_FULL : Touch Screen FIFO Full
+ * @arg MFXSTM32L152_IRQ_TS_OVF : Touch Screen FIFO Overflow
+ * @retval None
+ */
+void mfxstm32l152_EnableITSource(uint16_t DeviceAddr, uint8_t Source)
+{
+ uint8_t tmp = 0;
+
+ /* Get the current value of the INT_EN register */
+ tmp = MFX_IO_Read(DeviceAddr, MFXSTM32L152_REG_ADR_IRQ_SRC_EN);
+
+ /* Set the interrupts to be Enabled */
+ tmp |= Source;
+
+ /* Set the register */
+ MFX_IO_Write(DeviceAddr, MFXSTM32L152_REG_ADR_IRQ_SRC_EN, tmp);
+}
+
+/**
+ * @brief Disable the interrupt mode for the selected IT source
+ * @param DeviceAddr: Device address on communication Bus.
+ * @param Source: The interrupt source to be configured, could be:
+ * @arg MFXSTM32L152_IRQ_GPIO: IO interrupt
+ * @arg MFXSTM32L152_IRQ_IDD : IDD interrupt
+ * @arg MFXSTM32L152_IRQ_ERROR : Error interrupt
+ * @arg MFXSTM32L152_IRQ_TS_DET : Touch Screen Controller Touch Detected interrupt
+ * @arg MFXSTM32L152_IRQ_TS_NE : Touch Screen FIFO Not Empty
+ * @arg MFXSTM32L152_IRQ_TS_TH : Touch Screen FIFO threshold triggered
+ * @arg MFXSTM32L152_IRQ_TS_FULL : Touch Screen FIFO Full
+ * @arg MFXSTM32L152_IRQ_TS_OVF : Touch Screen FIFO Overflow
+ * @retval None
+ */
+void mfxstm32l152_DisableITSource(uint16_t DeviceAddr, uint8_t Source)
+{
+ uint8_t tmp = 0;
+
+ /* Get the current value of the INT_EN register */
+ tmp = MFX_IO_Read(DeviceAddr, MFXSTM32L152_REG_ADR_IRQ_SRC_EN);
+
+ /* Set the interrupts to be Enabled */
+ tmp &= ~Source;
+
+ /* Set the register */
+ MFX_IO_Write(DeviceAddr, MFXSTM32L152_REG_ADR_IRQ_SRC_EN, tmp);
+}
+
+
+/**
+ * @brief Returns the selected Global interrupt source pending bit value
+ * @param DeviceAddr: Device address on communication Bus.
+ * @param Source: the Global interrupt source to be checked, could be:
+ * @arg MFXSTM32L152_IRQ_GPIO: IO interrupt
+ * @arg MFXSTM32L152_IRQ_IDD : IDD interrupt
+ * @arg MFXSTM32L152_IRQ_ERROR : Error interrupt
+ * @arg MFXSTM32L152_IRQ_TS_DET : Touch Screen Controller Touch Detected interrupt
+ * @arg MFXSTM32L152_IRQ_TS_NE : Touch Screen FIFO Not Empty
+ * @arg MFXSTM32L152_IRQ_TS_TH : Touch Screen FIFO threshold triggered
+ * @arg MFXSTM32L152_IRQ_TS_FULL : Touch Screen FIFO Full
+ * @arg MFXSTM32L152_IRQ_TS_OVF : Touch Screen FIFO Overflow
+ * @retval The value of the checked Global interrupt source status.
+ */
+uint8_t mfxstm32l152_GlobalITStatus(uint16_t DeviceAddr, uint8_t Source)
+{
+ /* Return the global IT source status (pending or not)*/
+ return((MFX_IO_Read(DeviceAddr, MFXSTM32L152_REG_ADR_IRQ_PENDING) & Source));
+}
+
+/**
+ * @brief Clear the selected Global interrupt pending bit(s)
+ * @param DeviceAddr: Device address on communication Bus.
+ * @param Source: the Global interrupt source to be cleared, could be any combination
+ * of the below values. The acknowledge signal for MFXSTM32L152_GPIOs configured in input
+ * with interrupt is not on this register but in IRQ_GPI_ACK1, IRQ_GPI_ACK2 registers.
+ * @arg MFXSTM32L152_IRQ_IDD : IDD interrupt
+ * @arg MFXSTM32L152_IRQ_ERROR : Error interrupt
+ * @arg MFXSTM32L152_IRQ_TS_DET : Touch Screen Controller Touch Detected interrupt
+ * @arg MFXSTM32L152_IRQ_TS_NE : Touch Screen FIFO Not Empty
+ * @arg MFXSTM32L152_IRQ_TS_TH : Touch Screen FIFO threshold triggered
+ * @arg MFXSTM32L152_IRQ_TS_FULL : Touch Screen FIFO Full
+ * @arg MFXSTM32L152_IRQ_TS_OVF : Touch Screen FIFO Overflow
+ * /\/\ IMPORTANT NOTE /\/\ must not use MFXSTM32L152_IRQ_GPIO as argument, see IRQ_GPI_ACK1 and IRQ_GPI_ACK2 registers
+ * @retval None
+ */
+void mfxstm32l152_ClearGlobalIT(uint16_t DeviceAddr, uint8_t Source)
+{
+ /* Write 1 to the bits that have to be cleared */
+ MFX_IO_Write(DeviceAddr, MFXSTM32L152_REG_ADR_IRQ_ACK, Source);
+}
+
+/**
+ * @brief Set the global interrupt Polarity of IRQ_OUT_PIN.
+ * @param DeviceAddr: Device address on communication Bus.
+ * @param Polarity: the IT mode polarity, could be one of the following values:
+ * @arg MFXSTM32L152_OUT_PIN_POLARITY_LOW: Interrupt output line is active Low edge
+ * @arg MFXSTM32L152_OUT_PIN_POLARITY_HIGH: Interrupt line output is active High edge
+ * @retval None
+ */
+void mfxstm32l152_SetIrqOutPinPolarity(uint16_t DeviceAddr, uint8_t Polarity)
+{
+ uint8_t tmp = 0;
+
+ /* Get the current register value */
+ tmp = MFX_IO_Read(DeviceAddr, MFXSTM32L152_REG_ADR_MFX_IRQ_OUT);
+
+ /* Mask the polarity bits */
+ tmp &= ~(uint8_t)0x02;
+
+ /* Modify the Interrupt Output line configuration */
+ tmp |= Polarity;
+
+ /* Set the new register value */
+ MFX_IO_Write(DeviceAddr, MFXSTM32L152_REG_ADR_MFX_IRQ_OUT, tmp);
+
+ /* Wait for 1 ms for MFX to change IRQ_out pin config, before activate it */
+ MFX_IO_Delay(1);
+
+}
+
+/**
+ * @brief Set the global interrupt Type of IRQ_OUT_PIN.
+ * @param DeviceAddr: Device address on communication Bus.
+ * @param Type: Interrupt line activity type, could be one of the following values:
+ * @arg MFXSTM32L152_OUT_PIN_TYPE_OPENDRAIN: Open Drain output Interrupt line
+ * @arg MFXSTM32L152_OUT_PIN_TYPE_PUSHPULL: Push Pull output Interrupt line
+ * @retval None
+ */
+void mfxstm32l152_SetIrqOutPinType(uint16_t DeviceAddr, uint8_t Type)
+{
+ uint8_t tmp = 0;
+
+ /* Get the current register value */
+ tmp = MFX_IO_Read(DeviceAddr, MFXSTM32L152_REG_ADR_MFX_IRQ_OUT);
+
+ /* Mask the type bits */
+ tmp &= ~(uint8_t)0x01;
+
+ /* Modify the Interrupt Output line configuration */
+ tmp |= Type;
+
+ /* Set the new register value */
+ MFX_IO_Write(DeviceAddr, MFXSTM32L152_REG_ADR_MFX_IRQ_OUT, tmp);
+
+ /* Wait for 1 ms for MFX to change IRQ_out pin config, before activate it */
+ MFX_IO_Delay(1);
+
+}
+
+
+/* ------------------------------------------------------------------ */
+/* ----------------------- GPIO ------------------------------------- */
+/* ------------------------------------------------------------------ */
+
+
+/**
+ * @brief Start the IO functionality used and enable the AF for selected IO pin(s).
+ * @param DeviceAddr: Device address on communication Bus.
+ * @param AF_en: 0 to disable, else enabled.
+ * @retval None
+ */
+void mfxstm32l152_IO_Start(uint16_t DeviceAddr, uint32_t IO_Pin)
+{
+ uint8_t mode;
+
+ /* Get the current register value */
+ mode = MFX_IO_Read(DeviceAddr, MFXSTM32L152_REG_ADR_SYS_CTRL);
+
+ /* Set the IO Functionalities to be Enabled */
+ mode |= MFXSTM32L152_GPIO_EN;
+
+ /* Enable ALTERNATE functions */
+ /* AGPIO[0..3] can be either IDD or GPIO */
+ /* AGPIO[4..7] can be either TS or GPIO */
+ /* if IDD or TS are enabled no matter the value this bit GPIO are not available for those pins */
+ /* however the MFX will waste some cycles to to handle these potential GPIO (pooling, etc) */
+ /* so if IDD and TS are both active it is better to let ALTERNATE off (0) */
+ /* if however IDD or TS are not connected then set it on gives more GPIOs availability */
+ /* remind that AGPIO are less efficient then normal GPIO (They use pooling rather then EXTI */
+ if (IO_Pin > 0xFFFF)
+ {
+ mode |= MFXSTM32L152_ALTERNATE_GPIO_EN;
+ }
+ else
+ {
+ mode &= ~MFXSTM32L152_ALTERNATE_GPIO_EN;
+ }
+
+ /* Write the new register value */
+ MFX_IO_Write(DeviceAddr, MFXSTM32L152_REG_ADR_SYS_CTRL, mode);
+
+ /* Wait for 1 ms for MFX to change IRQ_out pin config, before activate it */
+ MFX_IO_Delay(1);
+}
+
+/**
+ * @brief Configures the IO pin(s) according to IO mode structure value.
+ * @param DeviceAddr: Device address on communication Bus.
+ * @param IO_Pin: The output pin to be set or reset. This parameter can be one
+ * of the following values:
+ * @arg MFXSTM32L152_GPIO_PIN_x: where x can be from 0 to 23.
+ * @param IO_Mode: The IO pin mode to configure, could be one of the following values:
+ * @arg IO_MODE_INPUT
+ * @arg IO_MODE_OUTPUT
+ * @arg IO_MODE_IT_RISING_EDGE
+ * @arg IO_MODE_IT_FALLING_EDGE
+ * @arg IO_MODE_IT_LOW_LEVEL
+ * @arg IO_MODE_IT_HIGH_LEVEL
+ * @arg IO_MODE_INPUT_PU,
+ * @arg IO_MODE_INPUT_PD,
+ * @arg IO_MODE_OUTPUT_OD_PU,
+ * @arg IO_MODE_OUTPUT_OD_PD,
+ * @arg IO_MODE_OUTPUT_PP_PU,
+ * @arg IO_MODE_OUTPUT_PP_PD,
+ * @arg IO_MODE_IT_RISING_EDGE_PU
+ * @arg IO_MODE_IT_FALLING_EDGE_PU
+ * @arg IO_MODE_IT_LOW_LEVEL_PU
+ * @arg IO_MODE_IT_HIGH_LEVEL_PU
+ * @arg IO_MODE_IT_RISING_EDGE_PD
+ * @arg IO_MODE_IT_FALLING_EDGE_PD
+ * @arg IO_MODE_IT_LOW_LEVEL_PD
+ * @arg IO_MODE_IT_HIGH_LEVEL_PD
+ * @retval None
+ */
+uint8_t mfxstm32l152_IO_Config(uint16_t DeviceAddr, uint32_t IO_Pin, IO_ModeTypedef IO_Mode)
+{
+ uint8_t error_code = 0;
+
+ /* Configure IO pin according to selected IO mode */
+ switch(IO_Mode)
+ {
+ case IO_MODE_OFF: /* Off or analog mode */
+ case IO_MODE_ANALOG: /* Off or analog mode */
+ mfxstm32l152_IO_DisablePinIT(DeviceAddr, IO_Pin); /* first disable IT */
+ mfxstm32l152_IO_InitPin(DeviceAddr, IO_Pin, MFXSTM32L152_GPIO_DIR_IN);
+ mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_TYPE1, IO_Pin, MFXSTM32L152_GPI_WITHOUT_PULL_RESISTOR);
+ mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_PUPD1, IO_Pin, MFXSTM32L152_GPIO_PULL_DOWN);
+ break;
+
+ case IO_MODE_INPUT: /* Input mode */
+ mfxstm32l152_IO_DisablePinIT(DeviceAddr, IO_Pin); /* first disable IT */
+ mfxstm32l152_IO_InitPin(DeviceAddr, IO_Pin, MFXSTM32L152_GPIO_DIR_IN);
+ mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_TYPE1, IO_Pin, MFXSTM32L152_GPI_WITHOUT_PULL_RESISTOR);
+ mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_PUPD1, IO_Pin, MFXSTM32L152_GPIO_PULL_UP);
+ break;
+
+ case IO_MODE_INPUT_PU: /* Input mode */
+ mfxstm32l152_IO_DisablePinIT(DeviceAddr, IO_Pin); /* first disable IT */
+ mfxstm32l152_IO_InitPin(DeviceAddr, IO_Pin, MFXSTM32L152_GPIO_DIR_IN);
+ mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_TYPE1, IO_Pin, MFXSTM32L152_GPI_WITH_PULL_RESISTOR);
+ mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_PUPD1, IO_Pin, MFXSTM32L152_GPIO_PULL_UP);
+ break;
+
+ case IO_MODE_INPUT_PD: /* Input mode */
+ mfxstm32l152_IO_DisablePinIT(DeviceAddr, IO_Pin); /* first disable IT */
+ mfxstm32l152_IO_InitPin(DeviceAddr, IO_Pin, MFXSTM32L152_GPIO_DIR_IN);
+ mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_TYPE1, IO_Pin, MFXSTM32L152_GPI_WITH_PULL_RESISTOR);
+ mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_PUPD1, IO_Pin, MFXSTM32L152_GPIO_PULL_DOWN);
+ break;
+
+ case IO_MODE_OUTPUT: /* Output mode */
+ case IO_MODE_OUTPUT_PP_PD: /* Output mode */
+ mfxstm32l152_IO_DisablePinIT(DeviceAddr, IO_Pin); /* first disable IT */
+ mfxstm32l152_IO_InitPin(DeviceAddr, IO_Pin, MFXSTM32L152_GPIO_DIR_OUT);
+ mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_TYPE1, IO_Pin, MFXSTM32L152_GPO_PUSH_PULL);
+ mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_PUPD1, IO_Pin, MFXSTM32L152_GPIO_PULL_DOWN);
+ break;
+
+ case IO_MODE_OUTPUT_PP_PU: /* Output mode */
+ mfxstm32l152_IO_DisablePinIT(DeviceAddr, IO_Pin); /* first disable IT */
+ mfxstm32l152_IO_InitPin(DeviceAddr, IO_Pin, MFXSTM32L152_GPIO_DIR_OUT);
+ mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_TYPE1, IO_Pin, MFXSTM32L152_GPO_PUSH_PULL);
+ mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_PUPD1, IO_Pin, MFXSTM32L152_GPIO_PULL_UP);
+ break;
+
+ case IO_MODE_OUTPUT_OD_PD: /* Output mode */
+ mfxstm32l152_IO_DisablePinIT(DeviceAddr, IO_Pin); /* first disable IT */
+ mfxstm32l152_IO_InitPin(DeviceAddr, IO_Pin, MFXSTM32L152_GPIO_DIR_OUT);
+ mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_TYPE1, IO_Pin, MFXSTM32L152_GPO_OPEN_DRAIN);
+ mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_PUPD1, IO_Pin, MFXSTM32L152_GPIO_PULL_DOWN);
+ break;
+
+ case IO_MODE_OUTPUT_OD_PU: /* Output mode */
+ mfxstm32l152_IO_DisablePinIT(DeviceAddr, IO_Pin); /* first disable IT */
+ mfxstm32l152_IO_InitPin(DeviceAddr, IO_Pin, MFXSTM32L152_GPIO_DIR_OUT);
+ mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_TYPE1, IO_Pin, MFXSTM32L152_GPO_OPEN_DRAIN);
+ mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_PUPD1, IO_Pin, MFXSTM32L152_GPIO_PULL_UP);
+ break;
+
+ case IO_MODE_IT_RISING_EDGE: /* Interrupt rising edge mode */
+ mfxstm32l152_IO_EnableIT(DeviceAddr);
+ mfxstm32l152_IO_InitPin(DeviceAddr, IO_Pin, MFXSTM32L152_GPIO_DIR_IN);
+ mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_TYPE1, IO_Pin, MFXSTM32L152_GPI_WITHOUT_PULL_RESISTOR);
+ mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_PUPD1, IO_Pin, MFXSTM32L152_GPIO_PULL_UP);
+ mfxstm32l152_IO_SetIrqEvtMode(DeviceAddr, IO_Pin, MFXSTM32L152_IRQ_GPI_EVT_EDGE);
+ mfxstm32l152_IO_SetIrqTypeMode(DeviceAddr, IO_Pin, MFXSTM32L152_IRQ_GPI_TYPE_HLRE);
+ mfxstm32l152_IO_EnablePinIT(DeviceAddr, IO_Pin); /* last to do: enable IT */
+ break;
+
+ case IO_MODE_IT_RISING_EDGE_PU: /* Interrupt rising edge mode */
+ mfxstm32l152_IO_EnableIT(DeviceAddr);
+ mfxstm32l152_IO_InitPin(DeviceAddr, IO_Pin, MFXSTM32L152_GPIO_DIR_IN);
+ mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_TYPE1, IO_Pin, MFXSTM32L152_GPI_WITH_PULL_RESISTOR);
+ mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_PUPD1, IO_Pin, MFXSTM32L152_GPIO_PULL_UP);
+ mfxstm32l152_IO_SetIrqEvtMode(DeviceAddr, IO_Pin, MFXSTM32L152_IRQ_GPI_EVT_EDGE);
+ mfxstm32l152_IO_SetIrqTypeMode(DeviceAddr, IO_Pin, MFXSTM32L152_IRQ_GPI_TYPE_HLRE);
+ mfxstm32l152_IO_EnablePinIT(DeviceAddr, IO_Pin); /* last to do: enable IT */
+ break;
+
+ case IO_MODE_IT_RISING_EDGE_PD: /* Interrupt rising edge mode */
+ mfxstm32l152_IO_EnableIT(DeviceAddr);
+ mfxstm32l152_IO_InitPin(DeviceAddr, IO_Pin, MFXSTM32L152_GPIO_DIR_IN);
+ mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_TYPE1, IO_Pin, MFXSTM32L152_GPI_WITH_PULL_RESISTOR);
+ mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_PUPD1, IO_Pin, MFXSTM32L152_GPIO_PULL_DOWN);
+ mfxstm32l152_IO_SetIrqEvtMode(DeviceAddr, IO_Pin, MFXSTM32L152_IRQ_GPI_EVT_EDGE);
+ mfxstm32l152_IO_SetIrqTypeMode(DeviceAddr, IO_Pin, MFXSTM32L152_IRQ_GPI_TYPE_HLRE);
+ mfxstm32l152_IO_EnablePinIT(DeviceAddr, IO_Pin); /* last to do: enable IT */
+ break;
+
+ case IO_MODE_IT_FALLING_EDGE: /* Interrupt falling edge mode */
+ mfxstm32l152_IO_EnableIT(DeviceAddr);
+ mfxstm32l152_IO_InitPin(DeviceAddr, IO_Pin, MFXSTM32L152_GPIO_DIR_IN);
+ mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_TYPE1, IO_Pin, MFXSTM32L152_GPI_WITHOUT_PULL_RESISTOR);
+ mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_PUPD1, IO_Pin, MFXSTM32L152_GPIO_PULL_UP);
+ mfxstm32l152_IO_SetIrqEvtMode(DeviceAddr, IO_Pin, MFXSTM32L152_IRQ_GPI_EVT_EDGE);
+ mfxstm32l152_IO_SetIrqTypeMode(DeviceAddr, IO_Pin, MFXSTM32L152_IRQ_GPI_TYPE_LLFE);
+ mfxstm32l152_IO_EnablePinIT(DeviceAddr, IO_Pin); /* last to do: enable IT */
+ break;
+
+ case IO_MODE_IT_FALLING_EDGE_PU: /* Interrupt falling edge mode */
+ mfxstm32l152_IO_EnableIT(DeviceAddr);
+ mfxstm32l152_IO_InitPin(DeviceAddr, IO_Pin, MFXSTM32L152_GPIO_DIR_IN);
+ mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_TYPE1, IO_Pin, MFXSTM32L152_GPI_WITH_PULL_RESISTOR);
+ mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_PUPD1, IO_Pin, MFXSTM32L152_GPIO_PULL_UP);
+ mfxstm32l152_IO_SetIrqEvtMode(DeviceAddr, IO_Pin, MFXSTM32L152_IRQ_GPI_EVT_EDGE);
+ mfxstm32l152_IO_SetIrqTypeMode(DeviceAddr, IO_Pin, MFXSTM32L152_IRQ_GPI_TYPE_LLFE);
+ mfxstm32l152_IO_EnablePinIT(DeviceAddr, IO_Pin); /* last to do: enable IT */
+ break;
+
+ case IO_MODE_IT_FALLING_EDGE_PD: /* Interrupt falling edge mode */
+ mfxstm32l152_IO_EnableIT(DeviceAddr);
+ mfxstm32l152_IO_InitPin(DeviceAddr, IO_Pin, MFXSTM32L152_GPIO_DIR_IN);
+ mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_TYPE1, IO_Pin, MFXSTM32L152_GPI_WITH_PULL_RESISTOR);
+ mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_PUPD1, IO_Pin, MFXSTM32L152_GPIO_PULL_DOWN);
+ mfxstm32l152_IO_SetIrqEvtMode(DeviceAddr, IO_Pin, MFXSTM32L152_IRQ_GPI_EVT_EDGE);
+ mfxstm32l152_IO_SetIrqTypeMode(DeviceAddr, IO_Pin, MFXSTM32L152_IRQ_GPI_TYPE_LLFE);
+ mfxstm32l152_IO_EnablePinIT(DeviceAddr, IO_Pin); /* last to do: enable IT */
+ break;
+
+ case IO_MODE_IT_LOW_LEVEL: /* Low level interrupt mode */
+ mfxstm32l152_IO_EnableIT(DeviceAddr);
+ mfxstm32l152_IO_InitPin(DeviceAddr, IO_Pin, MFXSTM32L152_GPIO_DIR_IN);
+ mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_TYPE1, IO_Pin, MFXSTM32L152_GPI_WITHOUT_PULL_RESISTOR);
+ mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_PUPD1, IO_Pin, MFXSTM32L152_GPIO_PULL_UP);
+ mfxstm32l152_IO_SetIrqEvtMode(DeviceAddr, IO_Pin, MFXSTM32L152_IRQ_GPI_EVT_LEVEL);
+ mfxstm32l152_IO_SetIrqTypeMode(DeviceAddr, IO_Pin, MFXSTM32L152_IRQ_GPI_TYPE_LLFE);
+ mfxstm32l152_IO_EnablePinIT(DeviceAddr, IO_Pin); /* last to do: enable IT */
+ break;
+
+ case IO_MODE_IT_LOW_LEVEL_PU: /* Low level interrupt mode */
+ mfxstm32l152_IO_EnableIT(DeviceAddr);
+ mfxstm32l152_IO_InitPin(DeviceAddr, IO_Pin, MFXSTM32L152_GPIO_DIR_IN);
+ mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_TYPE1, IO_Pin, MFXSTM32L152_GPI_WITH_PULL_RESISTOR);
+ mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_PUPD1, IO_Pin, MFXSTM32L152_GPIO_PULL_UP);
+ mfxstm32l152_IO_SetIrqEvtMode(DeviceAddr, IO_Pin, MFXSTM32L152_IRQ_GPI_EVT_LEVEL);
+ mfxstm32l152_IO_SetIrqTypeMode(DeviceAddr, IO_Pin, MFXSTM32L152_IRQ_GPI_TYPE_LLFE);
+ mfxstm32l152_IO_EnablePinIT(DeviceAddr, IO_Pin); /* last to do: enable IT */
+ break;
+
+ case IO_MODE_IT_LOW_LEVEL_PD: /* Low level interrupt mode */
+ mfxstm32l152_IO_EnableIT(DeviceAddr);
+ mfxstm32l152_IO_InitPin(DeviceAddr, IO_Pin, MFXSTM32L152_GPIO_DIR_IN);
+ mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_TYPE1, IO_Pin, MFXSTM32L152_GPI_WITH_PULL_RESISTOR);
+ mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_PUPD1, IO_Pin, MFXSTM32L152_GPIO_PULL_DOWN);
+ mfxstm32l152_IO_SetIrqEvtMode(DeviceAddr, IO_Pin, MFXSTM32L152_IRQ_GPI_EVT_LEVEL);
+ mfxstm32l152_IO_SetIrqTypeMode(DeviceAddr, IO_Pin, MFXSTM32L152_IRQ_GPI_TYPE_LLFE);
+ mfxstm32l152_IO_EnablePinIT(DeviceAddr, IO_Pin); /* last to do: enable IT */
+ break;
+
+ case IO_MODE_IT_HIGH_LEVEL: /* High level interrupt mode */
+ mfxstm32l152_IO_EnableIT(DeviceAddr);
+ mfxstm32l152_IO_InitPin(DeviceAddr, IO_Pin, MFXSTM32L152_GPIO_DIR_IN);
+ mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_TYPE1, IO_Pin, MFXSTM32L152_GPI_WITHOUT_PULL_RESISTOR);
+ mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_PUPD1, IO_Pin, MFXSTM32L152_GPIO_PULL_UP);
+ mfxstm32l152_IO_SetIrqEvtMode(DeviceAddr, IO_Pin, MFXSTM32L152_IRQ_GPI_EVT_LEVEL);
+ mfxstm32l152_IO_SetIrqTypeMode(DeviceAddr, IO_Pin, MFXSTM32L152_IRQ_GPI_TYPE_HLRE);
+ mfxstm32l152_IO_EnablePinIT(DeviceAddr, IO_Pin); /* last to do: enable IT */
+ break;
+
+ case IO_MODE_IT_HIGH_LEVEL_PU: /* High level interrupt mode */
+ mfxstm32l152_IO_EnableIT(DeviceAddr);
+ mfxstm32l152_IO_InitPin(DeviceAddr, IO_Pin, MFXSTM32L152_GPIO_DIR_IN);
+ mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_TYPE1, IO_Pin, MFXSTM32L152_GPI_WITH_PULL_RESISTOR);
+ mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_PUPD1, IO_Pin, MFXSTM32L152_GPIO_PULL_UP);
+ mfxstm32l152_IO_SetIrqEvtMode(DeviceAddr, IO_Pin, MFXSTM32L152_IRQ_GPI_EVT_LEVEL);
+ mfxstm32l152_IO_SetIrqTypeMode(DeviceAddr, IO_Pin, MFXSTM32L152_IRQ_GPI_TYPE_HLRE);
+ mfxstm32l152_IO_EnablePinIT(DeviceAddr, IO_Pin); /* last to do: enable IT */
+ break;
+
+ case IO_MODE_IT_HIGH_LEVEL_PD: /* High level interrupt mode */
+ mfxstm32l152_IO_EnableIT(DeviceAddr);
+ mfxstm32l152_IO_InitPin(DeviceAddr, IO_Pin, MFXSTM32L152_GPIO_DIR_IN);
+ mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_TYPE1, IO_Pin, MFXSTM32L152_GPI_WITH_PULL_RESISTOR);
+ mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_PUPD1, IO_Pin, MFXSTM32L152_GPIO_PULL_DOWN);
+ mfxstm32l152_IO_SetIrqEvtMode(DeviceAddr, IO_Pin, MFXSTM32L152_IRQ_GPI_EVT_LEVEL);
+ mfxstm32l152_IO_SetIrqTypeMode(DeviceAddr, IO_Pin, MFXSTM32L152_IRQ_GPI_TYPE_HLRE);
+ mfxstm32l152_IO_EnablePinIT(DeviceAddr, IO_Pin); /* last to do: enable IT */
+ break;
+
+ default:
+ error_code = (uint8_t) IO_Mode;
+ break;
+ }
+
+ return error_code;
+}
+
+/**
+ * @brief Initialize the selected IO pin direction.
+ * @param DeviceAddr: Device address on communication Bus.
+ * @param IO_Pin: The IO pin to be configured. This parameter could be any
+ * combination of the following values:
+ * @arg MFXSTM32L152_GPIO_PIN_x: Where x can be from 0 to 23.
+ * @param Direction: could be MFXSTM32L152_GPIO_DIR_IN or MFXSTM32L152_GPIO_DIR_OUT.
+ * @retval None
+ */
+void mfxstm32l152_IO_InitPin(uint16_t DeviceAddr, uint32_t IO_Pin, uint8_t Direction)
+{
+ mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_DIR1, IO_Pin, Direction);
+}
+
+/**
+ * @brief Set the global interrupt Type.
+ * @param DeviceAddr: Device address on communication Bus.
+ * @param IO_Pin: The IO pin to be configured. This parameter could be any
+ * combination of the following values:
+ * @arg MFXSTM32L152_GPIO_PIN_x: Where x can be from 0 to 23.
+ * @param Evt: Interrupt line activity type, could be one of the following values:
+ * @arg MFXSTM32L152_IRQ_GPI_EVT_LEVEL: Interrupt line is active in level model
+ * @arg MFXSTM32L152_IRQ_GPI_EVT_EDGE: Interrupt line is active in edge model
+ * @retval None
+ */
+void mfxstm32l152_IO_SetIrqEvtMode(uint16_t DeviceAddr, uint32_t IO_Pin, uint8_t Evt)
+{
+ mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_IRQ_GPI_EVT1, IO_Pin, Evt);
+ MFX_IO_Delay(1);
+}
+
+/**
+ * @brief Configure the Edge for which a transition is detectable for the
+ * selected pin.
+ * @param DeviceAddr: Device address on communication Bus.
+ * @param IO_Pin: The IO pin to be configured. This parameter could be any
+ * combination of the following values:
+ * @arg MFXSTM32L152_GPIO_PIN_x: Where x can be from 0 to 23.
+ * @param Evt: Interrupt line activity type, could be one of the following values:
+ * @arg MFXSTM32L152_IRQ_GPI_TYPE_LLFE: Interrupt line is active in Low Level or Falling Edge
+ * @arg MFXSTM32L152_IRQ_GPI_TYPE_HLRE: Interrupt line is active in High Level or Rising Edge
+ * @retval None
+ */
+void mfxstm32l152_IO_SetIrqTypeMode(uint16_t DeviceAddr, uint32_t IO_Pin, uint8_t Type)
+{
+ mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_IRQ_GPI_TYPE1, IO_Pin, Type);
+ MFX_IO_Delay(1);
+}
+
+/**
+ * @brief When GPIO is in output mode, puts the corresponding GPO in High (1) or Low (0) level.
+ * @param DeviceAddr: Device address on communication Bus.
+ * @param IO_Pin: The output pin to be set or reset. This parameter can be one
+ * of the following values:
+ * @arg MFXSTM32L152_GPIO_PIN_x: where x can be from 0 to 23.
+ * @param PinState: The new IO pin state.
+ * @retval None
+ */
+void mfxstm32l152_IO_WritePin(uint16_t DeviceAddr, uint32_t IO_Pin, uint8_t PinState)
+{
+ /* Apply the bit value to the selected pin */
+ if (PinState != 0)
+ {
+ /* Set the SET register */
+ mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPO_SET1, IO_Pin, 1);
+ }
+ else
+ {
+ /* Set the CLEAR register */
+ mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_GPO_CLR1, IO_Pin, 1);
+ }
+}
+
+/**
+ * @brief Return the state of the selected IO pin(s).
+ * @param DeviceAddr: Device address on communication Bus.
+ * @param IO_Pin: The output pin to be set or reset. This parameter can be one
+ * of the following values:
+ * @arg MFXSTM32L152_GPIO_PIN_x: where x can be from 0 to 23.
+ * @retval IO pin(s) state.
+ */
+uint32_t mfxstm32l152_IO_ReadPin(uint16_t DeviceAddr, uint32_t IO_Pin)
+{
+ uint32_t tmp1 = 0;
+ uint32_t tmp2 = 0;
+ uint32_t tmp3 = 0;
+
+ if(IO_Pin & 0x000000FF)
+ {
+ tmp1 = (uint32_t) MFX_IO_Read(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_STATE1);
+ }
+ if(IO_Pin & 0x0000FF00)
+ {
+ tmp2 = (uint32_t) MFX_IO_Read(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_STATE2);
+ }
+ if(IO_Pin & 0x00FF0000)
+ {
+ tmp3 = (uint32_t) MFX_IO_Read(DeviceAddr, MFXSTM32L152_REG_ADR_GPIO_STATE3);
+ }
+
+ tmp3 = tmp1 + (tmp2 << 8) + (tmp3 << 16);
+
+ return(tmp3 & IO_Pin);
+}
+
+/**
+ * @brief Enable the global IO interrupt source.
+ * @param DeviceAddr: Device address on communication Bus.
+ * @retval None
+ */
+void mfxstm32l152_IO_EnableIT(uint16_t DeviceAddr)
+{
+ MFX_IO_ITConfig();
+
+ /* Enable global IO IT source */
+ mfxstm32l152_EnableITSource(DeviceAddr, MFXSTM32L152_IRQ_GPIO);
+}
+
+/**
+ * @brief Disable the global IO interrupt source.
+ * @param DeviceAddr: Device address on communication Bus.
+ * @retval None
+ */
+void mfxstm32l152_IO_DisableIT(uint16_t DeviceAddr)
+{
+ /* Disable global IO IT source */
+ mfxstm32l152_DisableITSource(DeviceAddr, MFXSTM32L152_IRQ_GPIO);
+}
+
+/**
+ * @brief Enable interrupt mode for the selected IO pin(s).
+ * @param DeviceAddr: Device address on communication Bus.
+ * @param IO_Pin: The IO interrupt to be enabled. This parameter could be any
+ * combination of the following values:
+ * @arg MFXSTM32L152_GPIO_PIN_x: where x can be from 0 to 23.
+ * @retval None
+ */
+void mfxstm32l152_IO_EnablePinIT(uint16_t DeviceAddr, uint32_t IO_Pin)
+{
+ mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_IRQ_GPI_SRC1, IO_Pin, 1);
+}
+
+/**
+ * @brief Disable interrupt mode for the selected IO pin(s).
+ * @param DeviceAddr: Device address on communication Bus.
+ * @param IO_Pin: The IO interrupt to be disabled. This parameter could be any
+ * combination of the following values:
+ * @arg MFXSTM32L152_GPIO_PIN_x: where x can be from 0 to 23.
+ * @retval None
+ */
+void mfxstm32l152_IO_DisablePinIT(uint16_t DeviceAddr, uint32_t IO_Pin)
+{
+ mfxstm32l152_reg24_setPinValue(DeviceAddr, MFXSTM32L152_REG_ADR_IRQ_GPI_SRC1, IO_Pin, 0);
+}
+
+
+/**
+ * @brief Check the status of the selected IO interrupt pending bit
+ * @param DeviceAddr: Device address on communication Bus.
+ * @param IO_Pin: The IO interrupt to be checked could be:
+ * @arg MFXSTM32L152_GPIO_PIN_x Where x can be from 0 to 23.
+ * @retval Status of the checked IO pin(s).
+ */
+uint32_t mfxstm32l152_IO_ITStatus(uint16_t DeviceAddr, uint32_t IO_Pin)
+{
+ /* Get the Interrupt status */
+ uint8_t tmp1 = 0;
+ uint16_t tmp2 = 0;
+ uint32_t tmp3 = 0;
+
+ if(IO_Pin & 0xFF)
+ {
+ tmp1 = MFX_IO_Read(DeviceAddr, MFXSTM32L152_REG_ADR_IRQ_GPI_PENDING1);
+ }
+ if(IO_Pin & 0xFFFF00)
+ {
+ tmp2 = (uint16_t) MFX_IO_Read(DeviceAddr, MFXSTM32L152_REG_ADR_IRQ_GPI_PENDING2);
+ }
+ if(IO_Pin & 0xFFFF0000)
+ {
+ tmp3 = (uint32_t) MFX_IO_Read(DeviceAddr, MFXSTM32L152_REG_ADR_IRQ_GPI_PENDING3);
+ }
+
+ tmp3 = tmp1 + (tmp2 << 8) + (tmp3 << 16);
+
+ return(tmp3 & IO_Pin);
+}
+
+/**
+ * @brief Clear the selected IO interrupt pending bit(s). It clear automatically also the general MFXSTM32L152_REG_ADR_IRQ_PENDING
+ * @param DeviceAddr: Device address on communication Bus.
+ * @param IO_Pin: the IO interrupt to be cleared, could be:
+ * @arg MFXSTM32L152_GPIO_PIN_x: Where x can be from 0 to 23.
+ * @retval None
+ */
+void mfxstm32l152_IO_ClearIT(uint16_t DeviceAddr, uint32_t IO_Pin)
+{
+ /* Clear the IO IT pending bit(s) by acknowledging */
+ /* it cleans automatically also the Global IRQ_GPIO */
+ /* normally this function is called under interrupt */
+ uint8_t pin_0_7, pin_8_15, pin_16_23;
+
+ pin_0_7 = IO_Pin & 0x0000ff;
+ pin_8_15 = IO_Pin >> 8;
+ pin_8_15 = pin_8_15 & 0x00ff;
+ pin_16_23 = IO_Pin >> 16;
+
+ if (pin_0_7)
+ {
+ MFX_IO_Write(DeviceAddr, MFXSTM32L152_REG_ADR_IRQ_GPI_ACK1, pin_0_7);
+ }
+ if (pin_8_15)
+ {
+ MFX_IO_Write(DeviceAddr, MFXSTM32L152_REG_ADR_IRQ_GPI_ACK2, pin_8_15);
+ }
+ if (pin_16_23)
+ {
+ MFX_IO_Write(DeviceAddr, MFXSTM32L152_REG_ADR_IRQ_GPI_ACK3, pin_16_23);
+ }
+}
+
+
+/**
+ * @brief Enable the AF for aGPIO.
+ * @param DeviceAddr: Device address on communication Bus.
+ * @retval None
+ */
+void mfxstm32l152_IO_EnableAF(uint16_t DeviceAddr)
+{
+ uint8_t mode;
+
+ /* Get the current register value */
+ mode = MFX_IO_Read(DeviceAddr, MFXSTM32L152_REG_ADR_SYS_CTRL);
+
+ /* Enable ALTERNATE functions */
+ /* AGPIO[0..3] can be either IDD or GPIO */
+ /* AGPIO[4..7] can be either TS or GPIO */
+ /* if IDD or TS are enabled no matter the value this bit GPIO are not available for those pins */
+ /* however the MFX will waste some cycles to to handle these potential GPIO (pooling, etc) */
+ /* so if IDD and TS are both active it is better to let ALTERNATE disabled (0) */
+ /* if however IDD or TS are not connected then set it on gives more GPIOs availability */
+ /* remind that AGPIO are less efficient then normal GPIO (they use pooling rather then EXTI) */
+ mode |= MFXSTM32L152_ALTERNATE_GPIO_EN;
+
+ /* Write the new register value */
+ MFX_IO_Write(DeviceAddr, MFXSTM32L152_REG_ADR_SYS_CTRL, mode);
+}
+
+/**
+ * @brief Disable the AF for aGPIO.
+ * @param DeviceAddr: Device address on communication Bus.
+ * @retval None
+ */
+ void mfxstm32l152_IO_DisableAF(uint16_t DeviceAddr)
+{
+ uint8_t mode;
+
+ /* Get the current register value */
+ mode = MFX_IO_Read(DeviceAddr, MFXSTM32L152_REG_ADR_SYS_CTRL);
+
+ /* Enable ALTERNATE functions */
+ /* AGPIO[0..3] can be either IDD or GPIO */
+ /* AGPIO[4..7] can be either TS or GPIO */
+ /* if IDD or TS are enabled no matter the value this bit GPIO are not available for those pins */
+ /* however the MFX will waste some cycles to to handle these potential GPIO (pooling, etc) */
+ /* so if IDD and TS are both active it is better to let ALTERNATE disabled (0) */
+ /* if however IDD or TS are not connected then set it on gives more GPIOs availability */
+ /* remind that AGPIO are less efficient then normal GPIO (they use pooling rather then EXTI) */
+ mode &= ~MFXSTM32L152_ALTERNATE_GPIO_EN;
+
+ /* Write the new register value */
+ MFX_IO_Write(DeviceAddr, MFXSTM32L152_REG_ADR_SYS_CTRL, mode);
+
+}
+
+
+/* ------------------------------------------------------------------ */
+/* --------------------- TOUCH SCREEN ------------------------------- */
+/* ------------------------------------------------------------------ */
+
+/**
+ * @brief Configures the touch Screen Controller (Single point detection)
+ * @param DeviceAddr: Device address on communication Bus.
+ * @retval None.
+ */
+void mfxstm32l152_TS_Start(uint16_t DeviceAddr)
+{
+ uint8_t mode;
+
+ /* Get the current register value */
+ mode = MFX_IO_Read(DeviceAddr, MFXSTM32L152_REG_ADR_SYS_CTRL);
+
+ /* Set the Functionalities to be Enabled */
+ mode |= MFXSTM32L152_TS_EN;
+
+ /* Set the new register value */
+ MFX_IO_Write(DeviceAddr, MFXSTM32L152_REG_ADR_SYS_CTRL, mode);
+
+ /* Wait for 2 ms */
+ MFX_IO_Delay(2);
+
+ /* Select 2 nF filter capacitor */
+ /* Configuration:
+ - Touch average control : 4 samples
+ - Touch delay time : 500 uS
+ - Panel driver setting time: 500 uS
+ */
+ MFX_IO_Write(DeviceAddr, MFXSTM32L152_TS_SETTLING, 0x32);
+ MFX_IO_Write(DeviceAddr, MFXSTM32L152_TS_TOUCH_DET_DELAY, 0x5);
+ MFX_IO_Write(DeviceAddr, MFXSTM32L152_TS_AVE, 0x04);
+
+ /* Configure the Touch FIFO threshold: single point reading */
+ MFX_IO_Write(DeviceAddr, MFXSTM32L152_TS_FIFO_TH, 0x01);
+
+ /* Clear the FIFO memory content. */
+ MFX_IO_Write(DeviceAddr, MFXSTM32L152_TS_FIFO_TH, MFXSTM32L152_TS_CLEAR_FIFO);
+
+ /* Touch screen control configuration :
+ - No window tracking index
+ */
+ MFX_IO_Write(DeviceAddr, MFXSTM32L152_TS_TRACK, 0x00);
+
+
+ /* Clear all the IT status pending bits if any */
+ mfxstm32l152_IO_ClearIT(DeviceAddr, 0xFFFFFF);
+
+ /* Wait for 1 ms delay */
+ MFX_IO_Delay(1);
+}
+
+/**
+ * @brief Return if there is touch detected or not.
+ * @param DeviceAddr: Device address on communication Bus.
+ * @retval Touch detected state.
+ */
+uint8_t mfxstm32l152_TS_DetectTouch(uint16_t DeviceAddr)
+{
+ uint8_t state;
+ uint8_t ret = 0;
+
+ state = MFX_IO_Read(DeviceAddr, MFXSTM32L152_TS_FIFO_STA);
+ state = ((state & (uint8_t)MFXSTM32L152_TS_CTRL_STATUS) == (uint8_t)MFXSTM32L152_TS_CTRL_STATUS);
+
+ if(state > 0)
+ {
+ if(MFX_IO_Read(DeviceAddr, MFXSTM32L152_TS_FIFO_LEVEL) > 0)
+ {
+ ret = 1;
+ }
+ }
+
+ return ret;
+}
+
+/**
+ * @brief Get the touch screen X and Y positions values
+ * @param DeviceAddr: Device address on communication Bus.
+ * @param X: Pointer to X position value
+ * @param Y: Pointer to Y position value
+ * @retval None.
+ */
+void mfxstm32l152_TS_GetXY(uint16_t DeviceAddr, uint16_t *X, uint16_t *Y)
+{
+ uint8_t data_xy[3];
+
+ MFX_IO_ReadMultiple(DeviceAddr, MFXSTM32L152_TS_XY_DATA, data_xy, sizeof(data_xy)) ;
+
+ /* Calculate positions values */
+ *X = (data_xy[1]<<4) + (data_xy[0]>>4);
+ *Y = (data_xy[2]<<4) + (data_xy[0]&4);
+
+ /* Reset the FIFO memory content. */
+ MFX_IO_Write(DeviceAddr, MFXSTM32L152_TS_FIFO_TH, MFXSTM32L152_TS_CLEAR_FIFO);
+}
+
+/**
+ * @brief Configure the selected source to generate a global interrupt or not
+ * @param DeviceAddr: Device address on communication Bus.
+ * @retval None
+ */
+void mfxstm32l152_TS_EnableIT(uint16_t DeviceAddr)
+{
+ MFX_IO_ITConfig();
+
+ /* Enable global TS IT source */
+ mfxstm32l152_EnableITSource(DeviceAddr, MFXSTM32L152_IRQ_TS_DET);
+}
+
+/**
+ * @brief Configure the selected source to generate a global interrupt or not
+ * @param DeviceAddr: Device address on communication Bus.
+ * @retval None
+ */
+void mfxstm32l152_TS_DisableIT(uint16_t DeviceAddr)
+{
+ /* Disable global TS IT source */
+ mfxstm32l152_DisableITSource(DeviceAddr, MFXSTM32L152_IRQ_TS_DET);
+}
+
+/**
+ * @brief Configure the selected source to generate a global interrupt or not
+ * @param DeviceAddr: Device address on communication Bus.
+ * @retval TS interrupts status
+ */
+uint8_t mfxstm32l152_TS_ITStatus(uint16_t DeviceAddr)
+{
+ /* Return TS interrupts status */
+ return(mfxstm32l152_GlobalITStatus(DeviceAddr, MFXSTM32L152_IRQ_TS));
+}
+
+/**
+ * @brief Configure the selected source to generate a global interrupt or not
+ * @param DeviceAddr: Device address on communication Bus.
+ * @retval None
+ */
+void mfxstm32l152_TS_ClearIT(uint16_t DeviceAddr)
+{
+ /* Clear the global TS IT source */
+ mfxstm32l152_ClearGlobalIT(DeviceAddr, MFXSTM32L152_IRQ_TS);
+}
+
+/* ------------------------------------------------------------------ */
+/* --------------------- IDD MEASUREMENT ---------------------------- */
+/* ------------------------------------------------------------------ */
+
+/**
+ * @brief Launch IDD current measurement
+ * @param DeviceAddr: Device address on communication Bus
+ * @retval None.
+ */
+void mfxstm32l152_IDD_Start(uint16_t DeviceAddr)
+{
+ uint8_t mode = 0;
+
+ /* Get the current register value */
+ mode = MFX_IO_Read((uint8_t) DeviceAddr, MFXSTM32L152_REG_ADR_IDD_CTRL);
+
+ /* Set the Functionalities to be enabled */
+ mode |= MFXSTM32L152_IDD_CTRL_REQ;
+
+ /* Start measurement campaign */
+ MFX_IO_Write((uint8_t) DeviceAddr, MFXSTM32L152_REG_ADR_IDD_CTRL, mode);
+}
+
+/**
+ * @brief Configures the IDD current measurement
+ * @param DeviceAddr: Device address on communication Bus.
+ * @param MfxIddConfig: Parameters depending on hardware config.
+ * @retval None
+ */
+void mfxstm32l152_IDD_Config(uint16_t DeviceAddr, IDD_ConfigTypeDef MfxIddConfig)
+{
+ uint8_t value = 0;
+ uint8_t mode = 0;
+
+ /* Get the current register value */
+ mode = MFX_IO_Read((uint8_t) DeviceAddr, MFXSTM32L152_REG_ADR_SYS_CTRL);
+
+ if((mode & MFXSTM32L152_IDD_EN) != MFXSTM32L152_IDD_EN)
+ {
+ /* Set the Functionalities to be enabled */
+ mode |= MFXSTM32L152_IDD_EN;
+
+ /* Set the new register value */
+ MFX_IO_Write((uint8_t) DeviceAddr, MFXSTM32L152_REG_ADR_SYS_CTRL, mode);
+ }
+
+ /* Control register setting: number of shunts */
+ value = ((MfxIddConfig.ShuntNbUsed << 1) & MFXSTM32L152_IDD_CTRL_SHUNT_NB);
+ value |= (MfxIddConfig.VrefMeasurement & MFXSTM32L152_IDD_CTRL_VREF_DIS);
+ value |= (MfxIddConfig.Calibration & MFXSTM32L152_IDD_CTRL_CAL_DIS);
+ MFX_IO_Write((uint8_t) DeviceAddr, MFXSTM32L152_REG_ADR_IDD_CTRL, value);
+
+ /* Idd pre delay configuration: unit and value*/
+ value = (MfxIddConfig.PreDelayUnit & MFXSTM32L152_IDD_PREDELAY_UNIT) |
+ (MfxIddConfig.PreDelayValue & MFXSTM32L152_IDD_PREDELAY_VALUE);
+ MFX_IO_Write((uint8_t) DeviceAddr, MFXSTM32L152_REG_ADR_IDD_PRE_DELAY, value);
+
+ /* Shunt 0 register value: MSB then LSB */
+ value = (uint8_t) (MfxIddConfig.Shunt0Value >> 8);
+ MFX_IO_Write((uint8_t) DeviceAddr, MFXSTM32L152_REG_ADR_IDD_SHUNT0_MSB, value);
+ value = (uint8_t) (MfxIddConfig.Shunt0Value);
+ MFX_IO_Write((uint8_t) DeviceAddr, MFXSTM32L152_REG_ADR_IDD_SHUNT0_LSB, value);
+
+ /* Shunt 1 register value: MSB then LSB */
+ value = (uint8_t) (MfxIddConfig.Shunt1Value >> 8);
+ MFX_IO_Write((uint8_t) DeviceAddr, MFXSTM32L152_REG_ADR_IDD_SHUNT1_MSB, value);
+ value = (uint8_t) (MfxIddConfig.Shunt1Value);
+ MFX_IO_Write((uint8_t) DeviceAddr, MFXSTM32L152_REG_ADR_IDD_SHUNT1_LSB, value);
+
+ /* Shunt 2 register value: MSB then LSB */
+ value = (uint8_t) (MfxIddConfig.Shunt2Value >> 8);
+ MFX_IO_Write((uint8_t) DeviceAddr, MFXSTM32L152_REG_ADR_IDD_SHUNT2_MSB, value);
+ value = (uint8_t) (MfxIddConfig.Shunt2Value);
+ MFX_IO_Write((uint8_t) DeviceAddr, MFXSTM32L152_REG_ADR_IDD_SHUNT2_LSB, value);
+
+ /* Shunt 3 register value: MSB then LSB */
+ value = (uint8_t) (MfxIddConfig.Shunt3Value >> 8);
+ MFX_IO_Write((uint8_t) DeviceAddr, MFXSTM32L152_REG_ADR_IDD_SHUNT3_MSB, value);
+ value = (uint8_t) (MfxIddConfig.Shunt3Value);
+ MFX_IO_Write((uint8_t) DeviceAddr, MFXSTM32L152_REG_ADR_IDD_SHUNT3_LSB, value);
+
+ /* Shunt 4 register value: MSB then LSB */
+ value = (uint8_t) (MfxIddConfig.Shunt4Value >> 8);
+ MFX_IO_Write((uint8_t) DeviceAddr, MFXSTM32L152_REG_ADR_IDD_SHUNT4_MSB, value);
+ value = (uint8_t) (MfxIddConfig.Shunt4Value);
+ MFX_IO_Write((uint8_t) DeviceAddr, MFXSTM32L152_REG_ADR_IDD_SHUNT4_LSB, value);
+
+ /* Shunt 0 stabilization delay */
+ value = MfxIddConfig.Shunt0StabDelay;
+ MFX_IO_Write((uint8_t) DeviceAddr, MFXSTM32L152_REG_ADR_IDD_SH0_STABILIZATION, value);
+
+ /* Shunt 1 stabilization delay */
+ value = MfxIddConfig.Shunt1StabDelay;
+ MFX_IO_Write((uint8_t) DeviceAddr, MFXSTM32L152_REG_ADR_IDD_SH1_STABILIZATION, value);
+
+ /* Shunt 2 stabilization delay */
+ value = MfxIddConfig.Shunt2StabDelay;
+ MFX_IO_Write((uint8_t) DeviceAddr, MFXSTM32L152_REG_ADR_IDD_SH2_STABILIZATION, value);
+
+ /* Shunt 3 stabilization delay */
+ value = MfxIddConfig.Shunt3StabDelay;
+ MFX_IO_Write((uint8_t) DeviceAddr, MFXSTM32L152_REG_ADR_IDD_SH3_STABILIZATION, value);
+
+ /* Shunt 4 stabilization delay */
+ value = MfxIddConfig.Shunt4StabDelay;
+ MFX_IO_Write((uint8_t) DeviceAddr, MFXSTM32L152_REG_ADR_IDD_SH4_STABILIZATION, value);
+
+ /* Idd ampli gain value: MSB then LSB */
+ value = (uint8_t) (MfxIddConfig.AmpliGain >> 8);
+ MFX_IO_Write((uint8_t) DeviceAddr, MFXSTM32L152_REG_ADR_IDD_GAIN_MSB, value);
+ value = (uint8_t) (MfxIddConfig.AmpliGain);
+ MFX_IO_Write((uint8_t) DeviceAddr, MFXSTM32L152_REG_ADR_IDD_GAIN_LSB, value);
+
+ /* Idd VDD min value: MSB then LSB */
+ value = (uint8_t) (MfxIddConfig.VddMin >> 8);
+ MFX_IO_Write((uint8_t) DeviceAddr, MFXSTM32L152_REG_ADR_IDD_VDD_MIN_MSB, value);
+ value = (uint8_t) (MfxIddConfig.VddMin);
+ MFX_IO_Write((uint8_t) DeviceAddr, MFXSTM32L152_REG_ADR_IDD_VDD_MIN_LSB, value);
+
+ /* Idd number of measurements */
+ value = MfxIddConfig.MeasureNb;
+ MFX_IO_Write((uint8_t) DeviceAddr, MFXSTM32L152_REG_ADR_IDD_NBR_OF_MEAS, value);
+
+ /* Idd delta delay configuration: unit and value */
+ value = (MfxIddConfig.DeltaDelayUnit & MFXSTM32L152_IDD_DELTADELAY_UNIT) |
+ (MfxIddConfig.DeltaDelayValue & MFXSTM32L152_IDD_DELTADELAY_VALUE);
+ MFX_IO_Write((uint8_t) DeviceAddr, MFXSTM32L152_REG_ADR_IDD_MEAS_DELTA_DELAY, value);
+
+ /* Idd number of shut on board */
+ value = MfxIddConfig.ShuntNbOnBoard;
+ MFX_IO_Write((uint8_t) DeviceAddr, MFXSTM32L152_REG_ADR_IDD_SHUNTS_ON_BOARD, value);
+}
+
+/**
+ * @brief This function allows to modify number of shunt used for a measurement
+ * @param DeviceAddr: Device address on communication Bus
+ * @retval None.
+ */
+void mfxstm32l152_IDD_ConfigShuntNbLimit(uint16_t DeviceAddr, uint8_t ShuntNbLimit)
+{
+ uint8_t mode = 0;
+
+ /* Get the current register value */
+ mode = MFX_IO_Read((uint8_t) DeviceAddr, MFXSTM32L152_REG_ADR_IDD_CTRL);
+
+ /* Clear number of shunt limit */
+ mode &= ~(MFXSTM32L152_IDD_CTRL_SHUNT_NB);
+
+ /* Clear number of shunt limit */
+ mode |= ((ShuntNbLimit << 1) & MFXSTM32L152_IDD_CTRL_SHUNT_NB);
+
+ /* Write noewx desired limit */
+ MFX_IO_Write((uint8_t) DeviceAddr, MFXSTM32L152_REG_ADR_IDD_CTRL, mode);
+}
+
+/**
+ * @brief Get Idd current value
+ * @param DeviceAddr: Device address on communication Bus
+ * @param ReadValue: Pointer on value to be read
+ * @retval Idd value in 10 nA.
+ */
+void mfxstm32l152_IDD_GetValue(uint16_t DeviceAddr, uint32_t *ReadValue)
+{
+ uint8_t data[3];
+
+ MFX_IO_ReadMultiple((uint8_t) DeviceAddr, MFXSTM32L152_REG_ADR_IDD_VALUE_MSB, data, sizeof(data)) ;
+
+ /* Recompose Idd current value */
+ *ReadValue = (data[0] << 16) | (data[1] << 8) | data[2];
+
+}
+
+/**
+ * @brief Get Last shunt used for measurement
+ * @param DeviceAddr: Device address on communication Bus
+ * @retval Last shunt used
+ */
+uint8_t mfxstm32l152_IDD_GetShuntUsed(uint16_t DeviceAddr)
+{
+ return(MFX_IO_Read((uint8_t) DeviceAddr, MFXSTM32L152_REG_ADR_IDD_SHUNT_USED));
+}
+
+/**
+ * @brief Configure mfx to enable Idd interrupt
+ * @param DeviceAddr: Device address on communication Bus.
+ * @retval None
+ */
+void mfxstm32l152_IDD_EnableIT(uint16_t DeviceAddr)
+{
+ MFX_IO_ITConfig();
+
+ /* Enable global IDD interrupt source */
+ mfxstm32l152_EnableITSource(DeviceAddr, MFXSTM32L152_IRQ_IDD);
+}
+
+/**
+ * @brief Clear Idd global interrupt
+ * @param DeviceAddr: Device address on communication Bus.
+ * @retval None
+ */
+void mfxstm32l152_IDD_ClearIT(uint16_t DeviceAddr)
+{
+ /* Clear the global IDD interrupt source */
+ mfxstm32l152_ClearGlobalIT(DeviceAddr, MFXSTM32L152_IRQ_IDD);
+}
+
+/**
+ * @brief get Idd interrupt status
+ * @param DeviceAddr: Device address on communication Bus.
+ * @retval IDD interrupts status
+ */
+uint8_t mfxstm32l152_IDD_GetITStatus(uint16_t DeviceAddr)
+{
+ /* Return IDD interrupt status */
+ return(mfxstm32l152_GlobalITStatus(DeviceAddr, MFXSTM32L152_IRQ_IDD));
+}
+
+/**
+ * @brief disable Idd interrupt
+ * @param DeviceAddr: Device address on communication Bus.
+ * @retval None.
+ */
+void mfxstm32l152_IDD_DisableIT(uint16_t DeviceAddr)
+{
+ /* Disable global IDD interrupt source */
+ mfxstm32l152_DisableITSource(DeviceAddr, MFXSTM32L152_IRQ_IDD);
+}
+
+
+/* ------------------------------------------------------------------ */
+/* --------------------- ERROR MANAGEMENT --------------------------- */
+/* ------------------------------------------------------------------ */
+
+/**
+ * @brief Read Error Source.
+ * @param DeviceAddr: Device address on communication Bus.
+ * @retval Error message code with error source
+ */
+uint8_t mfxstm32l152_Error_ReadSrc(uint16_t DeviceAddr)
+{
+ /* Get the current source register value */
+ return(MFX_IO_Read((uint8_t) DeviceAddr, MFXSTM32L152_REG_ADR_ERROR_SRC));
+}
+
+/**
+ * @brief Read Error Message
+ * @param DeviceAddr: Device address on communication Bus.
+ * @retval Error message code with error source
+ */
+uint8_t mfxstm32l152_Error_ReadMsg(uint16_t DeviceAddr)
+{
+ /* Get the current message register value */
+ return(MFX_IO_Read((uint8_t) DeviceAddr, MFXSTM32L152_REG_ADR_ERROR_MSG));
+}
+
+/**
+ * @brief Enable Error global interrupt
+ * @param DeviceAddr: Device address on communication Bus.
+ * @retval None
+ */
+
+void mfxstm32l152_Error_EnableIT(uint16_t DeviceAddr)
+{
+ MFX_IO_ITConfig();
+
+ /* Enable global Error interrupt source */
+ mfxstm32l152_EnableITSource(DeviceAddr, MFXSTM32L152_IRQ_ERROR);
+}
+
+/**
+ * @brief Clear Error global interrupt
+ * @param DeviceAddr: Device address on communication Bus.
+ * @retval None
+ */
+void mfxstm32l152_Error_ClearIT(uint16_t DeviceAddr)
+{
+ /* Clear the global Error interrupt source */
+ mfxstm32l152_ClearGlobalIT(DeviceAddr, MFXSTM32L152_IRQ_ERROR);
+}
+
+/**
+ * @brief get Error interrupt status
+ * @param DeviceAddr: Device address on communication Bus.
+ * @retval Error interrupts status
+ */
+uint8_t mfxstm32l152_Error_GetITStatus(uint16_t DeviceAddr)
+{
+ /* Return Error interrupt status */
+ return(mfxstm32l152_GlobalITStatus(DeviceAddr, MFXSTM32L152_IRQ_ERROR));
+}
+
+/**
+ * @brief disable Error interrupt
+ * @param DeviceAddr: Device address on communication Bus.
+ * @retval None.
+ */
+void mfxstm32l152_Error_DisableIT(uint16_t DeviceAddr)
+{
+ /* Disable global Error interrupt source */
+ mfxstm32l152_DisableITSource(DeviceAddr, MFXSTM32L152_IRQ_ERROR);
+}
+
+/**
+ * @brief FOR DEBUG ONLY
+ */
+uint8_t mfxstm32l152_ReadReg(uint16_t DeviceAddr, uint8_t RegAddr)
+{
+ /* Get the current register value */
+ return(MFX_IO_Read((uint8_t) DeviceAddr, RegAddr));
+}
+
+void mfxstm32l152_WriteReg(uint16_t DeviceAddr, uint8_t RegAddr, uint8_t Value)
+{
+ /* set the current register value */
+ MFX_IO_Write((uint8_t) DeviceAddr, RegAddr, Value);
+}
+
+/* ------------------------------------------------------------------ */
+/* ----------------------- Private functions ------------------------ */
+/* ------------------------------------------------------------------ */
+/**
+ * @brief Check if the device instance of the selected address is already registered
+ * and return its index
+ * @param DeviceAddr: Device address on communication Bus.
+ * @retval Index of the device instance if registered, 0xFF if not.
+ */
+static uint8_t mfxstm32l152_GetInstance(uint16_t DeviceAddr)
+{
+ uint8_t idx = 0;
+
+ /* Check all the registered instances */
+ for(idx = 0; idx < MFXSTM32L152_MAX_INSTANCE ; idx ++)
+ {
+ if(mfxstm32l152[idx] == DeviceAddr)
+ {
+ return idx;
+ }
+ }
+
+ return 0xFF;
+}
+
+/**
+ * @brief Release registered device instance
+ * @param DeviceAddr: Device address on communication Bus.
+ * @retval Index of released device instance, 0xFF if not.
+ */
+static uint8_t mfxstm32l152_ReleaseInstance(uint16_t DeviceAddr)
+{
+ uint8_t idx = 0;
+
+ /* Check for all the registered instances */
+ for(idx = 0; idx < MFXSTM32L152_MAX_INSTANCE ; idx ++)
+ {
+ if(mfxstm32l152[idx] == DeviceAddr)
+ {
+ mfxstm32l152[idx] = 0;
+ return idx;
+ }
+ }
+ return 0xFF;
+}
+
+/**
+ * @brief Internal routine
+ * @param DeviceAddr: Device address on communication Bus.
+ * @param RegisterAddr: Register Address
+ * @param PinPosition: Pin [0:23]
+ * @param PinValue: 0/1
+ * @retval None
+ */
+void mfxstm32l152_reg24_setPinValue(uint16_t DeviceAddr, uint8_t RegisterAddr, uint32_t PinPosition, uint8_t PinValue )
+{
+ uint8_t tmp = 0;
+ uint8_t pin_0_7, pin_8_15, pin_16_23;
+
+ pin_0_7 = PinPosition & 0x0000ff;
+ pin_8_15 = PinPosition >> 8;
+ pin_8_15 = pin_8_15 & 0x00ff;
+ pin_16_23 = PinPosition >> 16;
+
+ if (pin_0_7)
+ {
+ /* Get the current register value */
+ tmp = MFX_IO_Read(DeviceAddr, RegisterAddr);
+
+ /* Set the selected pin direction */
+ if (PinValue != 0)
+ {
+ tmp |= (uint8_t)pin_0_7;
+ }
+ else
+ {
+ tmp &= ~(uint8_t)pin_0_7;
+ }
+
+ /* Set the new register value */
+ MFX_IO_Write(DeviceAddr, RegisterAddr, tmp);
+ }
+
+ if (pin_8_15)
+ {
+ /* Get the current register value */
+ tmp = MFX_IO_Read(DeviceAddr, RegisterAddr+1);
+
+ /* Set the selected pin direction */
+ if (PinValue != 0)
+ {
+ tmp |= (uint8_t)pin_8_15;
+ }
+ else
+ {
+ tmp &= ~(uint8_t)pin_8_15;
+ }
+
+ /* Set the new register value */
+ MFX_IO_Write(DeviceAddr, RegisterAddr+1, tmp);
+ }
+
+ if (pin_16_23)
+ {
+ /* Get the current register value */
+ tmp = MFX_IO_Read(DeviceAddr, RegisterAddr+2);
+
+ /* Set the selected pin direction */
+ if (PinValue != 0)
+ {
+ tmp |= (uint8_t)pin_16_23;
+ }
+ else
+ {
+ tmp &= ~(uint8_t)pin_16_23;
+ }
+
+ /* Set the new register value */
+ MFX_IO_Write(DeviceAddr, RegisterAddr+2, tmp);
+ }
+}
+
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/P3_SETR2/Components/mfxstm32l152/mfxstm32l152.h b/P3_SETR2/Components/mfxstm32l152/mfxstm32l152.h
new file mode 100644
index 0000000..baf4cb5
--- /dev/null
+++ b/P3_SETR2/Components/mfxstm32l152/mfxstm32l152.h
@@ -0,0 +1,650 @@
+/**
+ ******************************************************************************
+ * @file mfxstm32l152.h
+ * @author MCD Application Team
+ * @brief This file contains all the functions prototypes for the
+ * mfxstm32l152.c IO expander driver.
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2015 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __MFXSTM32L152_H
+#define __MFXSTM32L152_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "../Common/ts.h"
+#include "../Common/io.h"
+#include "../Common/idd.h"
+
+/** @addtogroup BSP
+ * @{
+ */
+
+/** @addtogroup Component
+ * @{
+ */
+
+/** @defgroup MFXSTM32L152
+ * @{
+ */
+
+/* Exported types ------------------------------------------------------------*/
+
+/** @defgroup MFXSTM32L152_Exported_Types
+ * @{
+ */
+typedef struct
+{
+ uint8_t SYS_CTRL;
+ uint8_t ERROR_SRC;
+ uint8_t ERROR_MSG;
+ uint8_t IRQ_OUT;
+ uint8_t IRQ_SRC_EN;
+ uint8_t IRQ_PENDING;
+ uint8_t IDD_CTRL;
+ uint8_t IDD_PRE_DELAY;
+ uint8_t IDD_SHUNT0_MSB;
+ uint8_t IDD_SHUNT0_LSB;
+ uint8_t IDD_SHUNT1_MSB;
+ uint8_t IDD_SHUNT1_LSB;
+ uint8_t IDD_SHUNT2_MSB;
+ uint8_t IDD_SHUNT2_LSB;
+ uint8_t IDD_SHUNT3_MSB;
+ uint8_t IDD_SHUNT3_LSB;
+ uint8_t IDD_SHUNT4_MSB;
+ uint8_t IDD_SHUNT4_LSB;
+ uint8_t IDD_GAIN_MSB;
+ uint8_t IDD_GAIN_LSB;
+ uint8_t IDD_VDD_MIN_MSB;
+ uint8_t IDD_VDD_MIN_LSB;
+ uint8_t IDD_VALUE_MSB;
+ uint8_t IDD_VALUE_MID;
+ uint8_t IDD_VALUE_LSB;
+ uint8_t IDD_CAL_OFFSET_MSB;
+ uint8_t IDD_CAL_OFFSET_LSB;
+ uint8_t IDD_SHUNT_USED;
+}IDD_dbgTypeDef;
+
+/**
+ * @}
+ */
+
+/* Exported constants --------------------------------------------------------*/
+
+/** @defgroup MFXSTM32L152_Exported_Constants
+ * @{
+ */
+
+ /**
+ * @brief MFX COMMON defines
+ */
+
+ /**
+ * @brief Register address: chip IDs (R)
+ */
+#define MFXSTM32L152_REG_ADR_ID ((uint8_t)0x00)
+ /**
+ * @brief Register address: chip FW_VERSION (R)
+ */
+#define MFXSTM32L152_REG_ADR_FW_VERSION_MSB ((uint8_t)0x01)
+#define MFXSTM32L152_REG_ADR_FW_VERSION_LSB ((uint8_t)0x00)
+ /**
+ * @brief Register address: System Control Register (R/W)
+ */
+#define MFXSTM32L152_REG_ADR_SYS_CTRL ((uint8_t)0x40)
+ /**
+ * @brief Register address: Vdd monitoring (R)
+ */
+#define MFXSTM32L152_REG_ADR_VDD_REF_MSB ((uint8_t)0x06)
+#define MFXSTM32L152_REG_ADR_VDD_REF_LSB ((uint8_t)0x07)
+ /**
+ * @brief Register address: Error source
+ */
+#define MFXSTM32L152_REG_ADR_ERROR_SRC ((uint8_t)0x03)
+ /**
+ * @brief Register address: Error Message
+ */
+#define MFXSTM32L152_REG_ADR_ERROR_MSG ((uint8_t)0x04)
+
+ /**
+ * @brief Reg Addr IRQs: to config the pin that informs Main MCU that MFX events appear
+ */
+#define MFXSTM32L152_REG_ADR_MFX_IRQ_OUT ((uint8_t)0x41)
+ /**
+ * @brief Reg Addr IRQs: to select the events which activate the MFXSTM32L152_IRQ_OUT signal
+ */
+#define MFXSTM32L152_REG_ADR_IRQ_SRC_EN ((uint8_t)0x42)
+ /**
+ * @brief Reg Addr IRQs: the Main MCU must read the IRQ_PENDING register to know the interrupt reason
+ */
+#define MFXSTM32L152_REG_ADR_IRQ_PENDING ((uint8_t)0x08)
+ /**
+ * @brief Reg Addr IRQs: the Main MCU must acknowledge it thanks to a writing access to the IRQ_ACK register
+ */
+#define MFXSTM32L152_REG_ADR_IRQ_ACK ((uint8_t)0x44)
+
+ /**
+ * @brief MFXSTM32L152_REG_ADR_ID choices
+ */
+#define MFXSTM32L152_ID_1 ((uint8_t)0x7B)
+#define MFXSTM32L152_ID_2 ((uint8_t)0x79)
+
+ /**
+ * @brief MFXSTM32L152_REG_ADR_SYS_CTRL choices
+ */
+#define MFXSTM32L152_SWRST ((uint8_t)0x80)
+#define MFXSTM32L152_STANDBY ((uint8_t)0x40)
+#define MFXSTM32L152_ALTERNATE_GPIO_EN ((uint8_t)0x08) /* by the way if IDD and TS are enabled they take automatically the AF pins*/
+#define MFXSTM32L152_IDD_EN ((uint8_t)0x04)
+#define MFXSTM32L152_TS_EN ((uint8_t)0x02)
+#define MFXSTM32L152_GPIO_EN ((uint8_t)0x01)
+
+ /**
+ * @brief MFXSTM32L152_REG_ADR_ERROR_SRC choices
+ */
+#define MFXSTM32L152_IDD_ERROR_SRC ((uint8_t)0x04) /* Error raised by Idd */
+#define MFXSTM32L152_TS_ERROR_SRC ((uint8_t)0x02) /* Error raised by Touch Screen */
+#define MFXSTM32L152_GPIO_ERROR_SRC ((uint8_t)0x01) /* Error raised by Gpio */
+
+ /**
+ * @brief MFXSTM32L152_REG_ADR_MFX_IRQ_OUT choices
+ */
+#define MFXSTM32L152_OUT_PIN_TYPE_OPENDRAIN ((uint8_t)0x00)
+#define MFXSTM32L152_OUT_PIN_TYPE_PUSHPULL ((uint8_t)0x01)
+#define MFXSTM32L152_OUT_PIN_POLARITY_LOW ((uint8_t)0x00)
+#define MFXSTM32L152_OUT_PIN_POLARITY_HIGH ((uint8_t)0x02)
+
+ /**
+ * @brief REG_ADR_IRQ_SRC_EN, REG_ADR_IRQ_PENDING & REG_ADR_IRQ_ACK choices
+ */
+#define MFXSTM32L152_IRQ_TS_OVF ((uint8_t)0x80) /* TouchScreen FIFO Overflow irq*/
+#define MFXSTM32L152_IRQ_TS_FULL ((uint8_t)0x40) /* TouchScreen FIFO Full irq*/
+#define MFXSTM32L152_IRQ_TS_TH ((uint8_t)0x20) /* TouchScreen FIFO threshold triggered irq*/
+#define MFXSTM32L152_IRQ_TS_NE ((uint8_t)0x10) /* TouchScreen FIFO Not Empty irq*/
+#define MFXSTM32L152_IRQ_TS_DET ((uint8_t)0x08) /* TouchScreen Detect irq*/
+#define MFXSTM32L152_IRQ_ERROR ((uint8_t)0x04) /* Error message from MFXSTM32L152 firmware irq */
+#define MFXSTM32L152_IRQ_IDD ((uint8_t)0x02) /* IDD function irq */
+#define MFXSTM32L152_IRQ_GPIO ((uint8_t)0x01) /* General GPIO irq (only for SRC_EN and PENDING) */
+#define MFXSTM32L152_IRQ_ALL ((uint8_t)0xFF) /* All global interrupts */
+#define MFXSTM32L152_IRQ_TS (MFXSTM32L152_IRQ_TS_DET | MFXSTM32L152_IRQ_TS_NE | MFXSTM32L152_IRQ_TS_TH | MFXSTM32L152_IRQ_TS_FULL | MFXSTM32L152_IRQ_TS_OVF )
+
+
+ /**
+ * @brief GPIO: 24 programmable input/output called MFXSTM32L152_GPIO[23:0] are provided
+ */
+
+ /**
+ * @brief Reg addr: GPIO DIRECTION (R/W): GPIO pins direction: (0) input, (1) output.
+ */
+#define MFXSTM32L152_REG_ADR_GPIO_DIR1 ((uint8_t)0x60) /* gpio [0:7] */
+#define MFXSTM32L152_REG_ADR_GPIO_DIR2 ((uint8_t)0x61) /* gpio [8:15] */
+#define MFXSTM32L152_REG_ADR_GPIO_DIR3 ((uint8_t)0x62) /* agpio [0:7] */
+ /**
+ * @brief Reg addr: GPIO TYPE (R/W): If GPIO in output: (0) output push pull, (1) output open drain.
+ * If GPIO in input: (0) input without pull resistor, (1) input with pull resistor.
+ */
+#define MFXSTM32L152_REG_ADR_GPIO_TYPE1 ((uint8_t)0x64) /* gpio [0:7] */
+#define MFXSTM32L152_REG_ADR_GPIO_TYPE2 ((uint8_t)0x65) /* gpio [8:15] */
+#define MFXSTM32L152_REG_ADR_GPIO_TYPE3 ((uint8_t)0x66) /* agpio [0:7] */
+ /**
+ * @brief Reg addr: GPIO PULL_UP_PULL_DOWN (R/W): discussion open with Jean Claude
+ */
+#define MFXSTM32L152_REG_ADR_GPIO_PUPD1 ((uint8_t)0x68) /* gpio [0:7] */
+#define MFXSTM32L152_REG_ADR_GPIO_PUPD2 ((uint8_t)0x69) /* gpio [8:15] */
+#define MFXSTM32L152_REG_ADR_GPIO_PUPD3 ((uint8_t)0x6A) /* agpio [0:7] */
+ /**
+ * @brief Reg addr: GPIO SET (W): When GPIO is in output mode, write (1) puts the corresponding GPO in High level.
+ */
+#define MFXSTM32L152_REG_ADR_GPO_SET1 ((uint8_t)0x6C) /* gpio [0:7] */
+#define MFXSTM32L152_REG_ADR_GPO_SET2 ((uint8_t)0x6D) /* gpio [8:15] */
+#define MFXSTM32L152_REG_ADR_GPO_SET3 ((uint8_t)0x6E) /* agpio [0:7] */
+ /**
+ * @brief Reg addr: GPIO CLEAR (W): When GPIO is in output mode, write (1) puts the corresponding GPO in Low level.
+ */
+#define MFXSTM32L152_REG_ADR_GPO_CLR1 ((uint8_t)0x70) /* gpio [0:7] */
+#define MFXSTM32L152_REG_ADR_GPO_CLR2 ((uint8_t)0x71) /* gpio [8:15] */
+#define MFXSTM32L152_REG_ADR_GPO_CLR3 ((uint8_t)0x72) /* agpio [0:7] */
+ /**
+ * @brief Reg addr: GPIO STATE (R): Give state of the GPIO pin.
+ */
+#define MFXSTM32L152_REG_ADR_GPIO_STATE1 ((uint8_t)0x10) /* gpio [0:7] */
+#define MFXSTM32L152_REG_ADR_GPIO_STATE2 ((uint8_t)0x11) /* gpio [8:15] */
+#define MFXSTM32L152_REG_ADR_GPIO_STATE3 ((uint8_t)0x12) /* agpio [0:7] */
+
+ /**
+ * @brief GPIO IRQ_GPIs
+ */
+/* GPIOs can INDIVIDUALLY generate interruption to the Main MCU thanks to the MFXSTM32L152_IRQ_OUT signal */
+/* the general MFXSTM32L152_IRQ_GPIO_SRC_EN shall be enabled too */
+ /**
+ * @brief GPIO IRQ_GPI_SRC1/2/3 (R/W): registers enable or not the feature to generate irq
+ */
+#define MFXSTM32L152_REG_ADR_IRQ_GPI_SRC1 ((uint8_t)0x48) /* gpio [0:7] */
+#define MFXSTM32L152_REG_ADR_IRQ_GPI_SRC2 ((uint8_t)0x49) /* gpio [8:15] */
+#define MFXSTM32L152_REG_ADR_IRQ_GPI_SRC3 ((uint8_t)0x4A) /* agpio [0:7] */
+ /**
+ * @brief GPIO IRQ_GPI_EVT1/2/3 (R/W): Irq generated on level (0) or edge (1).
+ */
+#define MFXSTM32L152_REG_ADR_IRQ_GPI_EVT1 ((uint8_t)0x4C) /* gpio [0:7] */
+#define MFXSTM32L152_REG_ADR_IRQ_GPI_EVT2 ((uint8_t)0x4D) /* gpio [8:15] */
+#define MFXSTM32L152_REG_ADR_IRQ_GPI_EVT3 ((uint8_t)0x4E) /* agpio [0:7] */
+ /**
+ * @brief GPIO IRQ_GPI_TYPE1/2/3 (R/W): Irq generated on (0) : Low level or Falling edge. (1) : High level or Rising edge.
+ */
+#define MFXSTM32L152_REG_ADR_IRQ_GPI_TYPE1 ((uint8_t)0x50) /* gpio [0:7] */
+#define MFXSTM32L152_REG_ADR_IRQ_GPI_TYPE2 ((uint8_t)0x51) /* gpio [8:15] */
+#define MFXSTM32L152_REG_ADR_IRQ_GPI_TYPE3 ((uint8_t)0x52) /* agpio [0:7] */
+ /**
+ * @brief GPIO IRQ_GPI_PENDING1/2/3 (R): irq occurs
+ */
+#define MFXSTM32L152_REG_ADR_IRQ_GPI_PENDING1 ((uint8_t)0x0C) /* gpio [0:7] */
+#define MFXSTM32L152_REG_ADR_IRQ_GPI_PENDING2 ((uint8_t)0x0D) /* gpio [8:15] */
+#define MFXSTM32L152_REG_ADR_IRQ_GPI_PENDING3 ((uint8_t)0x0E) /* agpio [0:7] */
+ /**
+ * @brief GPIO IRQ_GPI_ACK1/2/3 (W): Write (1) to acknowledge IRQ event
+ */
+#define MFXSTM32L152_REG_ADR_IRQ_GPI_ACK1 ((uint8_t)0x54) /* gpio [0:7] */
+#define MFXSTM32L152_REG_ADR_IRQ_GPI_ACK2 ((uint8_t)0x55) /* gpio [8:15] */
+#define MFXSTM32L152_REG_ADR_IRQ_GPI_ACK3 ((uint8_t)0x56) /* agpio [0:7] */
+
+
+ /**
+ * @brief GPIO: IO Pins definition
+ */
+#define MFXSTM32L152_GPIO_PIN_0 ((uint32_t)0x0001)
+#define MFXSTM32L152_GPIO_PIN_1 ((uint32_t)0x0002)
+#define MFXSTM32L152_GPIO_PIN_2 ((uint32_t)0x0004)
+#define MFXSTM32L152_GPIO_PIN_3 ((uint32_t)0x0008)
+#define MFXSTM32L152_GPIO_PIN_4 ((uint32_t)0x0010)
+#define MFXSTM32L152_GPIO_PIN_5 ((uint32_t)0x0020)
+#define MFXSTM32L152_GPIO_PIN_6 ((uint32_t)0x0040)
+#define MFXSTM32L152_GPIO_PIN_7 ((uint32_t)0x0080)
+
+#define MFXSTM32L152_GPIO_PIN_8 ((uint32_t)0x0100)
+#define MFXSTM32L152_GPIO_PIN_9 ((uint32_t)0x0200)
+#define MFXSTM32L152_GPIO_PIN_10 ((uint32_t)0x0400)
+#define MFXSTM32L152_GPIO_PIN_11 ((uint32_t)0x0800)
+#define MFXSTM32L152_GPIO_PIN_12 ((uint32_t)0x1000)
+#define MFXSTM32L152_GPIO_PIN_13 ((uint32_t)0x2000)
+#define MFXSTM32L152_GPIO_PIN_14 ((uint32_t)0x4000)
+#define MFXSTM32L152_GPIO_PIN_15 ((uint32_t)0x8000)
+
+#define MFXSTM32L152_GPIO_PIN_16 ((uint32_t)0x010000)
+#define MFXSTM32L152_GPIO_PIN_17 ((uint32_t)0x020000)
+#define MFXSTM32L152_GPIO_PIN_18 ((uint32_t)0x040000)
+#define MFXSTM32L152_GPIO_PIN_19 ((uint32_t)0x080000)
+#define MFXSTM32L152_GPIO_PIN_20 ((uint32_t)0x100000)
+#define MFXSTM32L152_GPIO_PIN_21 ((uint32_t)0x200000)
+#define MFXSTM32L152_GPIO_PIN_22 ((uint32_t)0x400000)
+#define MFXSTM32L152_GPIO_PIN_23 ((uint32_t)0x800000)
+
+#define MFXSTM32L152_AGPIO_PIN_0 MFXSTM32L152_GPIO_PIN_16
+#define MFXSTM32L152_AGPIO_PIN_1 MFXSTM32L152_GPIO_PIN_17
+#define MFXSTM32L152_AGPIO_PIN_2 MFXSTM32L152_GPIO_PIN_18
+#define MFXSTM32L152_AGPIO_PIN_3 MFXSTM32L152_GPIO_PIN_19
+#define MFXSTM32L152_AGPIO_PIN_4 MFXSTM32L152_GPIO_PIN_20
+#define MFXSTM32L152_AGPIO_PIN_5 MFXSTM32L152_GPIO_PIN_21
+#define MFXSTM32L152_AGPIO_PIN_6 MFXSTM32L152_GPIO_PIN_22
+#define MFXSTM32L152_AGPIO_PIN_7 MFXSTM32L152_GPIO_PIN_23
+
+#define MFXSTM32L152_GPIO_PINS_ALL ((uint32_t)0xFFFFFF)
+
+ /**
+ * @brief GPIO: constant
+ */
+#define MFXSTM32L152_GPIO_DIR_IN ((uint8_t)0x0)
+#define MFXSTM32L152_GPIO_DIR_OUT ((uint8_t)0x1)
+#define MFXSTM32L152_IRQ_GPI_EVT_LEVEL ((uint8_t)0x0)
+#define MFXSTM32L152_IRQ_GPI_EVT_EDGE ((uint8_t)0x1)
+#define MFXSTM32L152_IRQ_GPI_TYPE_LLFE ((uint8_t)0x0) /* Low Level Falling Edge */
+#define MFXSTM32L152_IRQ_GPI_TYPE_HLRE ((uint8_t)0x1) /*High Level Raising Edge */
+#define MFXSTM32L152_GPI_WITHOUT_PULL_RESISTOR ((uint8_t)0x0)
+#define MFXSTM32L152_GPI_WITH_PULL_RESISTOR ((uint8_t)0x1)
+#define MFXSTM32L152_GPO_PUSH_PULL ((uint8_t)0x0)
+#define MFXSTM32L152_GPO_OPEN_DRAIN ((uint8_t)0x1)
+#define MFXSTM32L152_GPIO_PULL_DOWN ((uint8_t)0x0)
+#define MFXSTM32L152_GPIO_PULL_UP ((uint8_t)0x1)
+
+
+ /**
+ * @brief TOUCH SCREEN Registers
+ */
+
+ /**
+ * @brief Touch Screen Registers
+ */
+#define MFXSTM32L152_TS_SETTLING ((uint8_t)0xA0)
+#define MFXSTM32L152_TS_TOUCH_DET_DELAY ((uint8_t)0xA1)
+#define MFXSTM32L152_TS_AVE ((uint8_t)0xA2)
+#define MFXSTM32L152_TS_TRACK ((uint8_t)0xA3)
+#define MFXSTM32L152_TS_FIFO_TH ((uint8_t)0xA4)
+#define MFXSTM32L152_TS_FIFO_STA ((uint8_t)0x20)
+#define MFXSTM32L152_TS_FIFO_LEVEL ((uint8_t)0x21)
+#define MFXSTM32L152_TS_XY_DATA ((uint8_t)0x24)
+
+ /**
+ * @brief TS registers masks
+ */
+#define MFXSTM32L152_TS_CTRL_STATUS ((uint8_t)0x08)
+#define MFXSTM32L152_TS_CLEAR_FIFO ((uint8_t)0x80)
+
+
+/**
+ * @brief Register address: Idd control register (R/W)
+ */
+#define MFXSTM32L152_REG_ADR_IDD_CTRL ((uint8_t)0x80)
+
+/**
+ * @brief Register address: Idd pre delay register (R/W)
+ */
+#define MFXSTM32L152_REG_ADR_IDD_PRE_DELAY ((uint8_t)0x81)
+
+/**
+ * @brief Register address: Idd Shunt registers (R/W)
+ */
+#define MFXSTM32L152_REG_ADR_IDD_SHUNT0_MSB ((uint8_t)0x82)
+#define MFXSTM32L152_REG_ADR_IDD_SHUNT0_LSB ((uint8_t)0x83)
+#define MFXSTM32L152_REG_ADR_IDD_SHUNT1_MSB ((uint8_t)0x84)
+#define MFXSTM32L152_REG_ADR_IDD_SHUNT1_LSB ((uint8_t)0x85)
+#define MFXSTM32L152_REG_ADR_IDD_SHUNT2_MSB ((uint8_t)0x86)
+#define MFXSTM32L152_REG_ADR_IDD_SHUNT2_LSB ((uint8_t)0x87)
+#define MFXSTM32L152_REG_ADR_IDD_SHUNT3_MSB ((uint8_t)0x88)
+#define MFXSTM32L152_REG_ADR_IDD_SHUNT3_LSB ((uint8_t)0x89)
+#define MFXSTM32L152_REG_ADR_IDD_SHUNT4_MSB ((uint8_t)0x8A)
+#define MFXSTM32L152_REG_ADR_IDD_SHUNT4_LSB ((uint8_t)0x8B)
+
+/**
+ * @brief Register address: Idd ampli gain register (R/W)
+ */
+#define MFXSTM32L152_REG_ADR_IDD_GAIN_MSB ((uint8_t)0x8C)
+#define MFXSTM32L152_REG_ADR_IDD_GAIN_LSB ((uint8_t)0x8D)
+
+/**
+ * @brief Register address: Idd VDD min register (R/W)
+ */
+#define MFXSTM32L152_REG_ADR_IDD_VDD_MIN_MSB ((uint8_t)0x8E)
+#define MFXSTM32L152_REG_ADR_IDD_VDD_MIN_LSB ((uint8_t)0x8F)
+
+/**
+ * @brief Register address: Idd value register (R)
+ */
+#define MFXSTM32L152_REG_ADR_IDD_VALUE_MSB ((uint8_t)0x14)
+#define MFXSTM32L152_REG_ADR_IDD_VALUE_MID ((uint8_t)0x15)
+#define MFXSTM32L152_REG_ADR_IDD_VALUE_LSB ((uint8_t)0x16)
+
+/**
+ * @brief Register address: Idd calibration offset register (R)
+ */
+#define MFXSTM32L152_REG_ADR_IDD_CAL_OFFSET_MSB ((uint8_t)0x18)
+#define MFXSTM32L152_REG_ADR_IDD_CAL_OFFSET_LSB ((uint8_t)0x19)
+
+/**
+ * @brief Register address: Idd shunt used offset register (R)
+ */
+#define MFXSTM32L152_REG_ADR_IDD_SHUNT_USED ((uint8_t)0x1A)
+
+/**
+ * @brief Register address: shunt stabilisation delay registers (R/W)
+ */
+#define MFXSTM32L152_REG_ADR_IDD_SH0_STABILIZATION ((uint8_t)0x90)
+#define MFXSTM32L152_REG_ADR_IDD_SH1_STABILIZATION ((uint8_t)0x91)
+#define MFXSTM32L152_REG_ADR_IDD_SH2_STABILIZATION ((uint8_t)0x92)
+#define MFXSTM32L152_REG_ADR_IDD_SH3_STABILIZATION ((uint8_t)0x93)
+#define MFXSTM32L152_REG_ADR_IDD_SH4_STABILIZATION ((uint8_t)0x94)
+
+/**
+ * @brief Register address: Idd number of measurements register (R/W)
+ */
+#define MFXSTM32L152_REG_ADR_IDD_NBR_OF_MEAS ((uint8_t)0x96)
+
+/**
+ * @brief Register address: Idd delta delay between 2 measurements register (R/W)
+ */
+#define MFXSTM32L152_REG_ADR_IDD_MEAS_DELTA_DELAY ((uint8_t)0x97)
+
+/**
+ * @brief Register address: Idd number of shunt on board register (R/W)
+ */
+#define MFXSTM32L152_REG_ADR_IDD_SHUNTS_ON_BOARD ((uint8_t)0x98)
+
+
+
+/** @defgroup IDD_Control_Register_Defines IDD Control Register Defines
+ * @{
+ */
+/**
+ * @brief IDD control register masks
+ */
+#define MFXSTM32L152_IDD_CTRL_REQ ((uint8_t)0x01)
+#define MFXSTM32L152_IDD_CTRL_SHUNT_NB ((uint8_t)0x0E)
+#define MFXSTM32L152_IDD_CTRL_VREF_DIS ((uint8_t)0x40)
+#define MFXSTM32L152_IDD_CTRL_CAL_DIS ((uint8_t)0x80)
+
+/**
+ * @brief IDD Shunt Number
+ */
+#define MFXSTM32L152_IDD_SHUNT_NB_1 ((uint8_t) 0x01)
+#define MFXSTM32L152_IDD_SHUNT_NB_2 ((uint8_t) 0x02)
+#define MFXSTM32L152_IDD_SHUNT_NB_3 ((uint8_t) 0x03)
+#define MFXSTM32L152_IDD_SHUNT_NB_4 ((uint8_t) 0x04)
+#define MFXSTM32L152_IDD_SHUNT_NB_5 ((uint8_t) 0x05)
+
+/**
+ * @brief Vref Measurement
+ */
+#define MFXSTM32L152_IDD_VREF_AUTO_MEASUREMENT_ENABLE ((uint8_t) 0x00)
+#define MFXSTM32L152_IDD_VREF_AUTO_MEASUREMENT_DISABLE ((uint8_t) 0x70)
+
+/**
+ * @brief IDD Calibration
+ */
+#define MFXSTM32L152_IDD_AUTO_CALIBRATION_ENABLE ((uint8_t) 0x00)
+#define MFXSTM32L152_IDD_AUTO_CALIBRATION_DISABLE ((uint8_t) 0x80)
+/**
+ * @}
+ */
+
+/** @defgroup IDD_PreDelay_Defines IDD PreDelay Defines
+ * @{
+ */
+/**
+ * @brief IDD PreDelay masks
+ */
+#define MFXSTM32L152_IDD_PREDELAY_UNIT ((uint8_t) 0x80)
+#define MFXSTM32L152_IDD_PREDELAY_VALUE ((uint8_t) 0x7F)
+
+
+/**
+ * @brief IDD PreDelay unit
+ */
+#define MFXSTM32L152_IDD_PREDELAY_0_5_MS ((uint8_t) 0x00)
+#define MFXSTM32L152_IDD_PREDELAY_20_MS ((uint8_t) 0x80)
+/**
+ * @}
+ */
+
+/** @defgroup IDD_DeltaDelay_Defines IDD Delta DElay Defines
+ * @{
+ */
+/**
+ * @brief IDD Delta Delay masks
+ */
+#define MFXSTM32L152_IDD_DELTADELAY_UNIT ((uint8_t) 0x80)
+#define MFXSTM32L152_IDD_DELTADELAY_VALUE ((uint8_t) 0x7F)
+
+
+/**
+ * @brief IDD Delta Delay unit
+ */
+#define MFXSTM32L152_IDD_DELTADELAY_0_5_MS ((uint8_t) 0x00)
+#define MFXSTM32L152_IDD_DELTADELAY_20_MS ((uint8_t) 0x80)
+
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+
+/* Exported macro ------------------------------------------------------------*/
+
+/** @defgroup MFXSTM32L152_Exported_Macros
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/* Exported functions --------------------------------------------------------*/
+
+/** @defgroup MFXSTM32L152_Exported_Functions
+ * @{
+ */
+
+/**
+ * @brief MFXSTM32L152 Control functions
+ */
+void mfxstm32l152_Init(uint16_t DeviceAddr);
+void mfxstm32l152_DeInit(uint16_t DeviceAddr);
+void mfxstm32l152_Reset(uint16_t DeviceAddr);
+uint16_t mfxstm32l152_ReadID(uint16_t DeviceAddr);
+uint16_t mfxstm32l152_ReadFwVersion(uint16_t DeviceAddr);
+void mfxstm32l152_LowPower(uint16_t DeviceAddr);
+void mfxstm32l152_WakeUp(uint16_t DeviceAddr);
+
+void mfxstm32l152_EnableITSource(uint16_t DeviceAddr, uint8_t Source);
+void mfxstm32l152_DisableITSource(uint16_t DeviceAddr, uint8_t Source);
+uint8_t mfxstm32l152_GlobalITStatus(uint16_t DeviceAddr, uint8_t Source);
+void mfxstm32l152_ClearGlobalIT(uint16_t DeviceAddr, uint8_t Source);
+
+void mfxstm32l152_SetIrqOutPinPolarity(uint16_t DeviceAddr, uint8_t Polarity);
+void mfxstm32l152_SetIrqOutPinType(uint16_t DeviceAddr, uint8_t Type);
+
+
+/**
+ * @brief MFXSTM32L152 IO functionalities functions
+ */
+void mfxstm32l152_IO_Start(uint16_t DeviceAddr, uint32_t IO_Pin);
+uint8_t mfxstm32l152_IO_Config(uint16_t DeviceAddr, uint32_t IO_Pin, IO_ModeTypedef IO_Mode);
+void mfxstm32l152_IO_WritePin(uint16_t DeviceAddr, uint32_t IO_Pin, uint8_t PinState);
+uint32_t mfxstm32l152_IO_ReadPin(uint16_t DeviceAddr, uint32_t IO_Pin);
+void mfxstm32l152_IO_EnableIT(uint16_t DeviceAddr);
+void mfxstm32l152_IO_DisableIT(uint16_t DeviceAddr);
+uint32_t mfxstm32l152_IO_ITStatus(uint16_t DeviceAddr, uint32_t IO_Pin);
+void mfxstm32l152_IO_ClearIT(uint16_t DeviceAddr, uint32_t IO_Pin);
+
+void mfxstm32l152_IO_InitPin(uint16_t DeviceAddr, uint32_t IO_Pin, uint8_t Direction);
+void mfxstm32l152_IO_EnableAF(uint16_t DeviceAddr);
+void mfxstm32l152_IO_DisableAF(uint16_t DeviceAddr);
+void mfxstm32l152_IO_SetIrqTypeMode(uint16_t DeviceAddr, uint32_t IO_Pin, uint8_t Type);
+void mfxstm32l152_IO_SetIrqEvtMode(uint16_t DeviceAddr, uint32_t IO_Pin, uint8_t Evt);
+void mfxstm32l152_IO_EnablePinIT(uint16_t DeviceAddr, uint32_t IO_Pin);
+void mfxstm32l152_IO_DisablePinIT(uint16_t DeviceAddr, uint32_t IO_Pin);
+
+/**
+ * @brief MFXSTM32L152 Touch screen functionalities functions
+ */
+void mfxstm32l152_TS_Start(uint16_t DeviceAddr);
+uint8_t mfxstm32l152_TS_DetectTouch(uint16_t DeviceAddr);
+void mfxstm32l152_TS_GetXY(uint16_t DeviceAddr, uint16_t *X, uint16_t *Y);
+void mfxstm32l152_TS_EnableIT(uint16_t DeviceAddr);
+void mfxstm32l152_TS_DisableIT(uint16_t DeviceAddr);
+uint8_t mfxstm32l152_TS_ITStatus (uint16_t DeviceAddr);
+void mfxstm32l152_TS_ClearIT (uint16_t DeviceAddr);
+
+/**
+ * @brief MFXSTM32L152 IDD current measurement functionalities functions
+ */
+void mfxstm32l152_IDD_Start(uint16_t DeviceAddr);
+void mfxstm32l152_IDD_Config(uint16_t DeviceAddr, IDD_ConfigTypeDef MfxIddConfig);
+void mfxstm32l152_IDD_ConfigShuntNbLimit(uint16_t DeviceAddr, uint8_t ShuntNbLimit);
+void mfxstm32l152_IDD_GetValue(uint16_t DeviceAddr, uint32_t *ReadValue);
+uint8_t mfxstm32l152_IDD_GetShuntUsed(uint16_t DeviceAddr);
+void mfxstm32l152_IDD_EnableIT(uint16_t DeviceAddr);
+void mfxstm32l152_IDD_ClearIT(uint16_t DeviceAddr);
+uint8_t mfxstm32l152_IDD_GetITStatus(uint16_t DeviceAddr);
+void mfxstm32l152_IDD_DisableIT(uint16_t DeviceAddr);
+
+/**
+ * @brief MFXSTM32L152 Error management functions
+ */
+uint8_t mfxstm32l152_Error_ReadSrc(uint16_t DeviceAddr);
+uint8_t mfxstm32l152_Error_ReadMsg(uint16_t DeviceAddr);
+void mfxstm32l152_Error_EnableIT(uint16_t DeviceAddr);
+void mfxstm32l152_Error_ClearIT(uint16_t DeviceAddr);
+uint8_t mfxstm32l152_Error_GetITStatus(uint16_t DeviceAddr);
+void mfxstm32l152_Error_DisableIT(uint16_t DeviceAddr);
+
+uint8_t mfxstm32l152_ReadReg(uint16_t DeviceAddr, uint8_t RegAddr);
+void mfxstm32l152_WriteReg(uint16_t DeviceAddr, uint8_t RegAddr, uint8_t Value);
+
+
+
+/**
+ * @brief iobus prototypes (they should be defined in common/stm32_iobus.h)
+ */
+void MFX_IO_Init(void);
+void MFX_IO_DeInit(void);
+void MFX_IO_ITConfig (void);
+void MFX_IO_EnableWakeupPin(void);
+void MFX_IO_Wakeup(void);
+void MFX_IO_Delay(uint32_t delay);
+void MFX_IO_Write(uint16_t addr, uint8_t reg, uint8_t value);
+uint8_t MFX_IO_Read(uint16_t addr, uint8_t reg);
+uint16_t MFX_IO_ReadMultiple(uint16_t addr, uint8_t reg, uint8_t *buffer, uint16_t length);
+
+/**
+ * @}
+ */
+
+/* Touch screen driver structure */
+extern TS_DrvTypeDef mfxstm32l152_ts_drv;
+
+/* IO driver structure */
+extern IO_DrvTypeDef mfxstm32l152_io_drv;
+
+/* IDD driver structure */
+extern IDD_DrvTypeDef mfxstm32l152_idd_drv;
+
+
+#ifdef __cplusplus
+}
+#endif
+#endif /* __MFXSTM32L152_H */
+
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/P3_SETR2/Components/mx25lm51245g/Release_Notes.html b/P3_SETR2/Components/mx25lm51245g/Release_Notes.html
new file mode 100644
index 0000000..df561ff
--- /dev/null
+++ b/P3_SETR2/Components/mx25lm51245g/Release_Notes.html
@@ -0,0 +1,65 @@
+
+
+
+
+
+
+ Release Notes for MX25LM51245G Component Drivers
+
+
+
+
+
+
+
+
+
+
+Release Notes for MX25LM51245G Component Drivers
+Copyright © 2017 STMicroelectronics
+
+
+
+
+
+
License
+
Licensed by ST under BSD 3-Clause license (the "License"). You may not use this package except in compliance with the License. You may obtain a copy of the License at:
+
https://opensource.org/licenses/BSD-3-Clause
+
Purpose
+
This directory contains the MX25LM51245G component drivers.
+
+
+
Update History
+
+
V1.0.1 / 03-April-2019
+
+
Main Changes
+
+Update release notes format
+Reformat the BSD 3-Clause license declaration in the files header (replace license terms by a web reference to OSI website where those terms lie)
+
+
+
+
+
V1.0.0 / 07-August-2017
+
+
Main Changes
+
+First official release of MX25LM51245G Octal Flash Memory Component driver
+
+
+
+
+
+
+
+
diff --git a/P3_SETR2/Components/mx25lm51245g/mx25lm51245g.h b/P3_SETR2/Components/mx25lm51245g/mx25lm51245g.h
new file mode 100644
index 0000000..f5d6da6
--- /dev/null
+++ b/P3_SETR2/Components/mx25lm51245g/mx25lm51245g.h
@@ -0,0 +1,301 @@
+/**
+ ******************************************************************************
+ * @file mx25lm51245g.h
+ * @author MCD Application Team
+ * @brief This file contains all the description of the MX25LM51245G Octal memory.
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2017 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __MX25LM51245G_H
+#define __MX25LM51245G_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+
+/** @addtogroup BSP
+ * @{
+ */
+
+/** @addtogroup Components
+ * @{
+ */
+
+/** @addtogroup MX25LM51245G
+ * @{
+ */
+
+/** @defgroup MX25LM51245G_Exported_Types
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @defgroup MX25LM51245G_Exported_Constants
+ * @{
+ */
+
+/**
+ * @brief MX25LM51245G Configuration
+ */
+#define MX25LM51245G_FLASH_SIZE 0x4000000 /* 512 MBits => 64 MBytes */
+#define MX25LM51245G_BLOCK_SIZE 0x10000 /* 1024 blocks of 64 KBytes */
+#define MX25LM51245G_SECTOR_SIZE 0x1000 /* 16384 sectors of 4 kBytes */
+#define MX25LM51245G_PAGE_SIZE 0x100 /* 262144 pages of 256 bytes */
+
+#define MX25LM51245G_DUMMY_CYCLES_READ 8
+#define MX25LM51245G_DUMMY_CYCLES_READ_OCTAL_66M 6
+#define MX25LM51245G_DUMMY_CYCLES_READ_OCTAL_84M 8
+#define MX25LM51245G_DUMMY_CYCLES_READ_OCTAL_104M 10
+#define MX25LM51245G_DUMMY_CYCLES_READ_OCTAL_133M 14
+
+#define MX25LM51245G_CR2_DC_66M MX25LM51245G_CR2_DC_6_CYCLES
+#define MX25LM51245G_CR2_DC_84M MX25LM51245G_CR2_DC_8_CYCLES
+#define MX25LM51245G_CR2_DC_104M MX25LM51245G_CR2_DC_10_CYCLES
+#define MX25LM51245G_CR2_DC_133M MX25LM51245G_CR2_DC_14_CYCLES
+
+#define MX25LM51245G_CHIP_ERASE_MAX_TIME 300000
+#define MX25LM51245G_BLOCK_ERASE_MAX_TIME 2000
+#define MX25LM51245G_SECTOR_ERASE_MAX_TIME 400
+#define MX25LM51245G_WRITE_REG_MAX_TIME 40
+
+/**
+ * @brief MX25LM51245G Commands
+ */
+/* Read Operations */
+#define READ_CMD 0x03
+#define READ_4_BYTE_ADDR_CMD 0x13
+
+#define FAST_READ_CMD 0x0B
+#define FAST_READ_4_BYTE_ADDR_CMD 0x0C
+
+#define OCTAL_IO_READ_CMD 0xEC13
+#define OCTAL_IO_DTR_READ_CMD 0xEE11
+
+/* Program Operations */
+#define PAGE_PROG_CMD 0x02
+#define PAGE_PROG_4_BYTE_ADDR_CMD 0x12
+
+#define OCTAL_PAGE_PROG_CMD 0x12ED
+
+/* Erase Operations */
+#define SECTOR_ERASE_CMD 0x20
+#define SECTOR_ERASE_4_BYTE_ADDR_CMD 0x21
+
+#define OCTAL_SECTOR_ERASE_CMD 0x21DE
+
+#define BLOCK_ERASE_CMD 0xD8
+#define BLOCK_ERASE_4_BYTE_ADDR_CMD 0xDC
+
+#define OCTAL_BLOCK_ERASE_CMD 0xDC23
+
+#define CHIP_ERASE_CMD 0x60
+#define CHIP_ERASE_CMD_2 0xC7
+
+#define OCTAL_CHIP_ERASE_CMD 0x609F
+#define OCTAL_CHIP_ERASE_CMD_2 0xC738
+
+#define PROG_ERASE_RESUME_CMD 0x30
+#define PROG_ERASE_SUSPEND_CMD 0xB0
+
+#define OCTAL_PROG_ERASE_RESUME_CMD 0x30CF
+#define OCTAL_PROG_ERASE_SUSPEND_CMD 0xB04F
+
+/* Identification Operations */
+#define READ_ID_CMD 0x9F
+#define READ_SERIAL_FLASH_DISCO_PARAM_CMD 0x5A
+
+#define OCTAL_READ_ID_CMD 0x9F60
+#define OCTAL_READ_SERIAL_FLASH_DISCO_PARAM_CMD 0x5AA5
+
+/* Write Operations */
+#define WRITE_ENABLE_CMD 0x06
+#define WRITE_DISABLE_CMD 0x04
+
+#define OCTAL_WRITE_ENABLE_CMD 0x06F9
+#define OCTAL_WRITE_DISABLE_CMD 0x04FB
+
+/* Register Operations */
+#define READ_STATUS_REG_CMD 0x05
+#define READ_CFG_REG_CMD 0x15
+#define WRITE_STATUS_CFG_REG_CMD 0x01
+
+#define OCTAL_READ_STATUS_REG_CMD 0x05FA
+#define OCTAL_READ_CFG_REG_CMD 0x15EA
+#define OCTAL_WRITE_STATUS_CFG_REG_CMD 0x01FE
+
+#define READ_CFG_REG_2_CMD 0x71
+#define WRITE_CFG_REG_2_CMD 0x72
+
+#define OCTAL_READ_CFG_REG_2_CMD 0x718E
+#define OCTAL_WRITE_CFG_REG_2_CMD 0x728D
+
+#define READ_FAST_BOOT_REG_CMD 0x16
+#define WRITE_FAST_BOOT_REG 0x17
+#define ERASE_FAST_BOOT_REG 0x18
+
+#define OCTAL_READ_FAST_BOOT_REG_CMD 0x16E9
+#define OCTAL_WRITE_FAST_BOOT_REG 0x17E8
+#define OCTAL_ERASE_FAST_BOOT_REG 0x18E7
+
+#define READ_SEC_REG_CMD 0x2B
+#define WRITE_SEC_REG_CMD 0x2F
+
+#define OCTAL_READ_SECURITY_REG_CMD 0x2BD4
+#define OCTAL_WRITE_SECURITY_REG_CMD 0x2FD0
+
+#define READ_LOCK_REG_CMD 0x2D
+#define WRITE_LOCK_REG_CMD 0x2C
+
+#define OCTAL_READ_LOCK_REG_CMD 0x2DD2
+#define OCTAL_WRITE_LOCK_REG_CMD 0x2CD3
+
+#define READ_SPB_STATUS_CMD 0xE2
+#define PROG_SPB_BIT_CMD 0xE3
+#define ERASE_ALL_SPB_BIT_CMD 0xE4
+
+#define OCTAL_READ_SPB_STATUS_CMD 0xE21D
+#define OCTAL_PROG_SPB_BIT_CMD 0xE31C
+#define OCTAL_ERASE_ALL_SPB_BIT_CMD 0xE41B
+
+#define READ_DPB_REG_CMD 0xE0
+#define WRITE_DPB_REG_CMD 0xE1
+
+#define OCTAL_READ_DPB_REG_CMD 0xE01F
+#define OCTAL_WRITE_DPB_REG_CMD 0xE11E
+
+/* Power Down Operations */
+#define DEEP_POWER_DOWN_CMD 0xB9
+#define RELEASE_DEEP_POWER_DOWN_CMD 0xAB
+
+#define OCTAL_ENTER_DEEP_POWER_DOWN_CMD 0xB946
+
+/* Burst Operations */
+#define SET_BURST_LENGTH_CMD 0xC0
+
+#define OCTAL_SET_BURST_LENGTH_CMD 0xC03F
+
+/* One-Time Programmable Operations */
+#define ENTER_SECURED_OTP_CMD 0xB1
+#define EXIT_SECURED_OTP_CMD 0xC1
+
+#define OCTAL_ENTER_SECURED_OTP_CMD 0xB14E
+#define OCTAL_EXIT_SECURED_OTP_CMD 0xC13E
+
+/* No Operation */
+#define NO_OPERATION_CMD 0x00
+
+#define OCTAL_NO_OPERATION_CMD 0x00FF
+
+/* Reset Operations */
+#define RESET_ENABLE_CMD 0x66
+#define RESET_MEMORY_CMD 0x99
+
+#define OCTAL_RESET_ENABLE_CMD 0x6699
+#define OCTAL_RESET_MEMORY_CMD 0x9966
+
+/* Protection Operations */
+#define WRITE_PROTECT_SEL_CMD 0x68
+
+#define OCTAL_WRITE_PROTECT_SEL_CMD 0x6897
+
+#define GANG_BLOCK_LOCK_CMD 0x7E
+#define GANG_BLOCK_UNLOCK_CMD 0x98
+
+#define OCTAL_GANG_BLOCK_LOCK_CMD 0x7E81
+#define OCTAL_GANG_BLOCK_UNLOCK_CMD 0x9867
+
+/**
+ * @brief MX25LM51245G Registers
+ */
+/* Status Register */
+#define MX25LM51245G_SR_WIP ((uint8_t)0x01) /*!< Write in progress */
+#define MX25LM51245G_SR_WEL ((uint8_t)0x02) /*!< Write enable latch */
+#define MX25LM51245G_SR_BP ((uint8_t)0x3C) /*!< Block protect */
+
+/* Configuration Register 1 */
+#define MX25LM51245G_CR1_ODS ((uint8_t)0x07) /*!< Output driver strength */
+#define MX25LM51245G_CR1_TB ((uint8_t)0x08) /*!< Top / bottom */
+
+/* Configuration Register 2 */
+/* Address : 0x00000000 */
+#define MX25LM51245G_CR2_REG1_ADDR ((uint32_t)0x00000000) /*!< CR2 register address 0x00000000 */
+#define MX25LM51245G_CR2_SOPI ((uint8_t)0x01) /*!< STR OPI Enable */
+#define MX25LM51245G_CR2_DOPI ((uint8_t)0x02) /*!< DTR OPI Enable */
+/* Address : 0x00000200 */
+#define MX25LM51245G_CR2_REG2_ADDR ((uint32_t)0x00000200) /*!< CR2 register address 0x00000200 */
+#define MX25LM51245G_CR2_DQSPRC ((uint8_t)0x01) /*!< DTR DQS pre-cycle */
+#define MX25LM51245G_CR2_DOS ((uint8_t)0x02) /*!< DQS on STR mode */
+/* Address : 0x00000300 */
+#define MX25LM51245G_CR2_REG3_ADDR ((uint32_t)0x00000300) /*!< CR2 register address 0x00000300 */
+#define MX25LM51245G_CR2_DC ((uint8_t)0x07) /*!< Dummy cycle */
+#define MX25LM51245G_CR2_DC_20_CYCLES ((uint8_t)0x00) /*!< 20 Dummy cycles */
+#define MX25LM51245G_CR2_DC_18_CYCLES ((uint8_t)0x01) /*!< 18 Dummy cycles */
+#define MX25LM51245G_CR2_DC_16_CYCLES ((uint8_t)0x02) /*!< 16 Dummy cycles */
+#define MX25LM51245G_CR2_DC_14_CYCLES ((uint8_t)0x03) /*!< 14 Dummy cycles */
+#define MX25LM51245G_CR2_DC_12_CYCLES ((uint8_t)0x04) /*!< 12 Dummy cycles */
+#define MX25LM51245G_CR2_DC_10_CYCLES ((uint8_t)0x05) /*!< 10 Dummy cycles */
+#define MX25LM51245G_CR2_DC_8_CYCLES ((uint8_t)0x06) /*!< 8 Dummy cycles */
+#define MX25LM51245G_CR2_DC_6_CYCLES ((uint8_t)0x07) /*!< 6 Dummy cycles */
+/* Address : 0x00000500 */
+#define MX25LM51245G_CR2_REG4_ADDR ((uint32_t)0x00000500) /*!< CR2 register address 0x00000500 */
+#define MX25LM51245G_CR2_PPTSEL ((uint8_t)0x01) /*!< Preamble pattern selection */
+/* Address : 0x40000000 */
+#define MX25LM51245G_CR2_REG5_ADDR ((uint32_t)0x40000000) /*!< CR2 register address 0x40000000 */
+#define MX25LM51245G_CR2_DEFSOPI ((uint8_t)0x01) /*!< Enable SOPI after power on reset */
+#define MX25LM51245G_CR2_DEFDOPI ((uint8_t)0x02) /*!< Enable DOPI after power on reset */
+
+/* Security Register */
+#define MX25LM51245G_SECR_SOI ((uint8_t)0x01) /*!< Secured OTP indicator */
+#define MX25LM51245G_SECR_LDSO ((uint8_t)0x02) /*!< Lock-down secured OTP */
+#define MX25LM51245G_SECR_PSB ((uint8_t)0x04) /*!< Program suspend bit */
+#define MX25LM51245G_SECR_ESB ((uint8_t)0x08) /*!< Erase suspend bit */
+#define MX25LM51245G_SECR_P_FAIL ((uint8_t)0x20) /*!< Program fail flag */
+#define MX25LM51245G_SECR_E_FAIL ((uint8_t)0x40) /*!< Erase fail flag */
+#define MX25LM51245G_SECR_WPSEL ((uint8_t)0x40) /*!< Write protection selection */
+/**
+ * @}
+ */
+
+/** @defgroup MX25LM51245G_Exported_Functions
+ * @{
+ */
+/**
+ * @}
+ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MX25LM51245G_H */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/P3_SETR2/Components/mx25r6435f/Release_Notes.html b/P3_SETR2/Components/mx25r6435f/Release_Notes.html
new file mode 100644
index 0000000..ac8da92
--- /dev/null
+++ b/P3_SETR2/Components/mx25r6435f/Release_Notes.html
@@ -0,0 +1,65 @@
+
+
+
+
+
+
+ Release Notes for MX25R6435F Component Drivers
+
+
+
+
+
+
+
+
+
+
+Release Notes for MX25R6435F Component Drivers
+Copyright © 2017 STMicroelectronics
+
+
+
+
+
+
License
+
Licensed by ST under BSD 3-Clause license (the "License"). You may not use this package except in compliance with the License. You may obtain a copy of the License at:
+
https://opensource.org/licenses/BSD-3-Clause
+
Purpose
+
This directory contains the MX25R6435F component drivers.
+
+
+
Update History
+
+
V1.0.1 / 03-April-2019
+
+
Main Changes
+
+Update release notes format
+Reformat the BSD 3-Clause license declaration in the files header (replace license terms by a web reference to OSI website where those terms lie)
+
+
+
+
+
V1.0.0 / 07-August-2017
+
+
Main Changes
+
+First official release of MX256435F QuadSPI Flash memory
+
+
+
+
+
+
+
+
diff --git a/P3_SETR2/Components/mx25r6435f/mx25r6435f.h b/P3_SETR2/Components/mx25r6435f/mx25r6435f.h
new file mode 100644
index 0000000..7019e28
--- /dev/null
+++ b/P3_SETR2/Components/mx25r6435f/mx25r6435f.h
@@ -0,0 +1,193 @@
+/**
+ ******************************************************************************
+ * @file mx25r6435f.h
+ * @author MCD Application Team
+ * @brief This file contains all the description of the MX25R6435F QSPI memory.
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2017 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __MX25R6435F_H
+#define __MX25R6435F_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+
+/** @addtogroup BSP
+ * @{
+ */
+
+/** @addtogroup Components
+ * @{
+ */
+
+/** @addtogroup mx25r6435f
+ * @{
+ */
+
+/** @defgroup MX25R6435F_Exported_Types
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @defgroup MX25R6435F_Exported_Constants
+ * @{
+ */
+
+/**
+ * @brief MX25R6435F Configuration
+ */
+#define MX25R6435F_FLASH_SIZE 0x800000 /* 64 MBits => 8MBytes */
+#define MX25R6435F_BLOCK_SIZE 0x10000 /* 128 blocks of 64KBytes */
+#define MX25R6435F_SUBBLOCK_SIZE 0x8000 /* 256 blocks of 32KBytes */
+#define MX25R6435F_SECTOR_SIZE 0x1000 /* 2048 sectors of 4kBytes */
+#define MX25R6435F_PAGE_SIZE 0x100 /* 32768 pages of 256 bytes */
+
+#define MX25R6435F_DUMMY_CYCLES_READ 8
+#define MX25R6435F_DUMMY_CYCLES_READ_DUAL 4
+#define MX25R6435F_DUMMY_CYCLES_READ_QUAD 4
+#define MX25R6435F_DUMMY_CYCLES_2READ 2
+#define MX25R6435F_DUMMY_CYCLES_4READ 4
+
+#define MX25R6435F_ALT_BYTES_PE_MODE 0xA5
+#define MX25R6435F_ALT_BYTES_NO_PE_MODE 0xAA
+
+#define MX25R6435F_CHIP_ERASE_MAX_TIME 240000
+#define MX25R6435F_BLOCK_ERASE_MAX_TIME 3500
+#define MX25R6435F_SUBBLOCK_ERASE_MAX_TIME 3000
+#define MX25R6435F_SECTOR_ERASE_MAX_TIME 240
+
+/**
+ * @brief MX25R6435F Commands
+ */
+/* Read Operations */
+#define READ_CMD 0x03
+#define FAST_READ_CMD 0x0B
+#define DUAL_OUT_READ_CMD 0x3B
+#define DUAL_INOUT_READ_CMD 0xBB
+#define QUAD_OUT_READ_CMD 0x6B
+#define QUAD_INOUT_READ_CMD 0xEB
+
+/* Program Operations */
+#define PAGE_PROG_CMD 0x02
+#define QUAD_PAGE_PROG_CMD 0x38
+
+/* Erase Operations */
+#define SECTOR_ERASE_CMD 0x20
+#define SUBBLOCK_ERASE_CMD 0x52
+#define BLOCK_ERASE_CMD 0xD8
+#define CHIP_ERASE_CMD 0x60
+#define CHIP_ERASE_CMD_2 0xC7
+
+#define PROG_ERASE_RESUME_CMD 0x7A
+#define PROG_ERASE_RESUME_CMD_2 0x30
+#define PROG_ERASE_SUSPEND_CMD 0x75
+#define PROG_ERASE_SUSPEND_CMD_2 0xB0
+
+/* Identification Operations */
+#define READ_ID_CMD 0x9F
+#define READ_ELECTRONIC_ID_CMD 0xAB
+#define READ_ELEC_MANUFACTURER_DEVICE_ID_CMD 0x90
+#define READ_SERIAL_FLASH_DISCO_PARAM_CMD 0x5A
+
+/* Write Operations */
+#define WRITE_ENABLE_CMD 0x06
+#define WRITE_DISABLE_CMD 0x04
+
+/* Register Operations */
+#define READ_STATUS_REG_CMD 0x05
+#define READ_CFG_REG_CMD 0x15
+#define WRITE_STATUS_CFG_REG_CMD 0x01
+
+#define READ_SEC_REG_CMD 0x2B
+#define WRITE_SEC_REG_CMD 0x2F
+
+/* Power Down Operations */
+#define DEEP_POWER_DOWN_CMD 0xB9
+
+/* Burst Operations */
+#define SET_BURST_LENGTH_CMD 0xC0
+
+/* One-Time Programmable Operations */
+#define ENTER_SECURED_OTP_CMD 0xB1
+#define EXIT_SECURED_OTP_CMD 0xC1
+
+/* No Operation */
+#define NO_OPERATION_CMD 0x00
+
+/* Reset Operations */
+#define RESET_ENABLE_CMD 0x66
+#define RESET_MEMORY_CMD 0x99
+#define RELEASE_READ_ENHANCED_CMD 0xFF
+
+/**
+ * @brief MX25R6435F Registers
+ */
+/* Status Register */
+#define MX25R6435F_SR_WIP ((uint8_t)0x01) /*!< Write in progress */
+#define MX25R6435F_SR_WEL ((uint8_t)0x02) /*!< Write enable latch */
+#define MX25R6435F_SR_BP ((uint8_t)0x3C) /*!< Block protect */
+#define MX25R6435F_SR_QE ((uint8_t)0x40) /*!< Quad enable */
+#define MX25R6435F_SR_SRWD ((uint8_t)0x80) /*!< Status register write disable */
+
+/* Configuration Register 1 */
+#define MX25R6435F_CR1_TB ((uint8_t)0x08) /*!< Top / bottom */
+
+/* Configuration Register 2 */
+#define MX25R6435F_CR2_LH_SWITCH ((uint8_t)0x02) /*!< Low power / high performance switch */
+
+/* Security Register */
+#define MX25R6435F_SECR_SOI ((uint8_t)0x01) /*!< Secured OTP indicator */
+#define MX25R6435F_SECR_LDSO ((uint8_t)0x02) /*!< Lock-down secured OTP */
+#define MX25R6435F_SECR_PSB ((uint8_t)0x04) /*!< Program suspend bit */
+#define MX25R6435F_SECR_ESB ((uint8_t)0x08) /*!< Erase suspend bit */
+#define MX25R6435F_SECR_P_FAIL ((uint8_t)0x20) /*!< Program fail flag */
+#define MX25R6435F_SECR_E_FAIL ((uint8_t)0x40) /*!< Erase fail flag */
+
+/**
+ * @}
+ */
+
+/** @defgroup MX25R6435F_Exported_Functions
+ * @{
+ */
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MX25R6435F_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/P3_SETR2/Components/n25q128a/Release_Notes.html b/P3_SETR2/Components/n25q128a/Release_Notes.html
new file mode 100644
index 0000000..4b48544
--- /dev/null
+++ b/P3_SETR2/Components/n25q128a/Release_Notes.html
@@ -0,0 +1,73 @@
+
+
+
+
+
+
+ Release Notes for N25Q128A Component Drivers
+
+
+
+
+
+
+
+
+
+
+Release Notes for N25Q128A Component Drivers
+Copyright © 2015 STMicroelectronics
+
+
+
+
+
+
License
+
Licensed by ST under BSD 3-Clause license (the "License"). You may not use this package except in compliance with the License. You may obtain a copy of the License at:
+
https://opensource.org/licenses/BSD-3-Clause
+
Purpose
+
This directory contains the N25Q128A component drivers.
+
+
+
Update History
+
+
V1.0.2 / 03-April-2019
+
+
Main Changes
+
+Update release notes format
+
+
+
+
+
V1.0.1 / 31-August-2018
+
+
Main Changes
+
+Reformat the BSD 3-Clause license declaration in the files header (replace license terms by a web reference to OSI website where those terms lie)
+
+
+
+
+
V1.0.0 / 29-May-2015
+
+
Main Changes
+
+First official release of N25Q128A QuadSPI Flash Component driver
+
+
+
+
+
+
+
+
diff --git a/P3_SETR2/Components/n25q128a/n25q128a.h b/P3_SETR2/Components/n25q128a/n25q128a.h
new file mode 100644
index 0000000..2a5d301
--- /dev/null
+++ b/P3_SETR2/Components/n25q128a/n25q128a.h
@@ -0,0 +1,201 @@
+/**
+ ******************************************************************************
+ * @file n25q128a.h
+ * @author MCD Application Team
+ * @brief This file contains all the description of the N25Q128A QSPI memory.
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2015 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __N25Q128A_H
+#define __N25Q128A_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+
+/** @addtogroup BSP
+ * @{
+ */
+
+/** @addtogroup Components
+ * @{
+ */
+
+/** @addtogroup n25q128a
+ * @{
+ */
+
+/** @defgroup N25Q128A_Exported_Types
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @defgroup N25Q128A_Exported_Constants
+ * @{
+ */
+
+/**
+ * @brief N25Q128A Configuration
+ */
+#define N25Q128A_FLASH_SIZE 0x1000000 /* 128 MBits => 16MBytes */
+#define N25Q128A_SECTOR_SIZE 0x10000 /* 256 sectors of 64KBytes */
+#define N25Q128A_SUBSECTOR_SIZE 0x1000 /* 4096 subsectors of 4kBytes */
+#define N25Q128A_PAGE_SIZE 0x100 /* 65536 pages of 256 bytes */
+
+#define N25Q128A_DUMMY_CYCLES_READ 8
+#define N25Q128A_DUMMY_CYCLES_READ_QUAD 10
+
+#define N25Q128A_BULK_ERASE_MAX_TIME 250000
+#define N25Q128A_SECTOR_ERASE_MAX_TIME 3000
+#define N25Q128A_SUBSECTOR_ERASE_MAX_TIME 800
+
+/**
+ * @brief N25Q128A Commands
+ */
+/* Reset Operations */
+#define RESET_ENABLE_CMD 0x66
+#define RESET_MEMORY_CMD 0x99
+
+/* Identification Operations */
+#define READ_ID_CMD 0x9E
+#define READ_ID_CMD2 0x9F
+#define MULTIPLE_IO_READ_ID_CMD 0xAF
+#define READ_SERIAL_FLASH_DISCO_PARAM_CMD 0x5A
+
+/* Read Operations */
+#define READ_CMD 0x03
+#define FAST_READ_CMD 0x0B
+#define DUAL_OUT_FAST_READ_CMD 0x3B
+#define DUAL_INOUT_FAST_READ_CMD 0xBB
+#define QUAD_OUT_FAST_READ_CMD 0x6B
+#define QUAD_INOUT_FAST_READ_CMD 0xEB
+
+/* Write Operations */
+#define WRITE_ENABLE_CMD 0x06
+#define WRITE_DISABLE_CMD 0x04
+
+/* Register Operations */
+#define READ_STATUS_REG_CMD 0x05
+#define WRITE_STATUS_REG_CMD 0x01
+
+#define READ_LOCK_REG_CMD 0xE8
+#define WRITE_LOCK_REG_CMD 0xE5
+
+#define READ_FLAG_STATUS_REG_CMD 0x70
+#define CLEAR_FLAG_STATUS_REG_CMD 0x50
+
+#define READ_NONVOL_CFG_REG_CMD 0xB5
+#define WRITE_NONVOL_CFG_REG_CMD 0xB1
+
+#define READ_VOL_CFG_REG_CMD 0x85
+#define WRITE_VOL_CFG_REG_CMD 0x81
+
+#define READ_ENHANCED_VOL_CFG_REG_CMD 0x65
+#define WRITE_ENHANCED_VOL_CFG_REG_CMD 0x61
+
+/* Program Operations */
+#define PAGE_PROG_CMD 0x02
+#define DUAL_IN_FAST_PROG_CMD 0xA2
+#define EXT_DUAL_IN_FAST_PROG_CMD 0xD2
+#define QUAD_IN_FAST_PROG_CMD 0x32
+#define EXT_QUAD_IN_FAST_PROG_CMD 0x12
+
+/* Erase Operations */
+#define SUBSECTOR_ERASE_CMD 0x20
+#define SECTOR_ERASE_CMD 0xD8
+#define BULK_ERASE_CMD 0xC7
+
+#define PROG_ERASE_RESUME_CMD 0x7A
+#define PROG_ERASE_SUSPEND_CMD 0x75
+
+/* One-Time Programmable Operations */
+#define READ_OTP_ARRAY_CMD 0x4B
+#define PROG_OTP_ARRAY_CMD 0x42
+
+/**
+ * @brief N25Q128A Registers
+ */
+/* Status Register */
+#define N25Q128A_SR_WIP ((uint8_t)0x01) /*!< Write in progress */
+#define N25Q128A_SR_WREN ((uint8_t)0x02) /*!< Write enable latch */
+#define N25Q128A_SR_BLOCKPR ((uint8_t)0x5C) /*!< Block protected against program and erase operations */
+#define N25Q128A_SR_PRBOTTOM ((uint8_t)0x20) /*!< Protected memory area defined by BLOCKPR starts from top or bottom */
+#define N25Q128A_SR_SRWREN ((uint8_t)0x80) /*!< Status register write enable/disable */
+
+/* Nonvolatile Configuration Register */
+#define N25Q128A_NVCR_LOCK ((uint16_t)0x0001) /*!< Lock nonvolatile configuration register */
+#define N25Q128A_NVCR_DUAL ((uint16_t)0x0004) /*!< Dual I/O protocol */
+#define N25Q128A_NVCR_QUAB ((uint16_t)0x0008) /*!< Quad I/O protocol */
+#define N25Q128A_NVCR_RH ((uint16_t)0x0010) /*!< Reset/hold */
+#define N25Q128A_NVCR_ODS ((uint16_t)0x01C0) /*!< Output driver strength */
+#define N25Q128A_NVCR_XIP ((uint16_t)0x0E00) /*!< XIP mode at power-on reset */
+#define N25Q128A_NVCR_NB_DUMMY ((uint16_t)0xF000) /*!< Number of dummy clock cycles */
+
+/* Volatile Configuration Register */
+#define N25Q128A_VCR_WRAP ((uint8_t)0x03) /*!< Wrap */
+#define N25Q128A_VCR_XIP ((uint8_t)0x08) /*!< XIP */
+#define N25Q128A_VCR_NB_DUMMY ((uint8_t)0xF0) /*!< Number of dummy clock cycles */
+
+/* Enhanced Volatile Configuration Register */
+#define N25Q128A_EVCR_ODS ((uint8_t)0x07) /*!< Output driver strength */
+#define N25Q128A_EVCR_VPPA ((uint8_t)0x08) /*!< Vpp accelerator */
+#define N25Q128A_EVCR_RH ((uint8_t)0x10) /*!< Reset/hold */
+#define N25Q128A_EVCR_DUAL ((uint8_t)0x40) /*!< Dual I/O protocol */
+#define N25Q128A_EVCR_QUAD ((uint8_t)0x80) /*!< Quad I/O protocol */
+
+/* Flag Status Register */
+#define N25Q128A_FSR_PRERR ((uint8_t)0x02) /*!< Protection error */
+#define N25Q128A_FSR_PGSUS ((uint8_t)0x04) /*!< Program operation suspended */
+#define N25Q128A_FSR_VPPERR ((uint8_t)0x08) /*!< Invalid voltage during program or erase */
+#define N25Q128A_FSR_PGERR ((uint8_t)0x10) /*!< Program error */
+#define N25Q128A_FSR_ERERR ((uint8_t)0x20) /*!< Erase error */
+#define N25Q128A_FSR_ERSUS ((uint8_t)0x40) /*!< Erase operation suspended */
+#define N25Q128A_FSR_READY ((uint8_t)0x80) /*!< Ready or command in progress */
+
+/**
+ * @}
+ */
+
+/** @defgroup N25Q128A_Exported_Functions
+ * @{
+ */
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __N25Q128A_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/P3_SETR2/Components/n25q256a/Release_Notes.html b/P3_SETR2/Components/n25q256a/Release_Notes.html
new file mode 100644
index 0000000..005cd1a
--- /dev/null
+++ b/P3_SETR2/Components/n25q256a/Release_Notes.html
@@ -0,0 +1,65 @@
+
+
+
+
+
+
+ Release Notes for N25Q256A Component Drivers
+
+
+
+
+
+
+
+
+
+
+Release Notes for N25Q256A Component Drivers
+Copyright © 2015 STMicroelectronics
+
+
+
+
+
+
License
+
Licensed by ST under BSD 3-Clause license (the "License"). You may not use this package except in compliance with the License. You may obtain a copy of the License at:
+
https://opensource.org/licenses/BSD-3-Clause
+
Purpose
+
This directory contains the N25Q256A component drivers.
+
+
+
Update History
+
+
V1.0.1 / 03-April-2019
+
+
Main Changes
+
+Update release notes format
+Reformat the BSD 3-Clause license declaration in the files header (replace license terms by a web reference to OSI website where those terms lie)
+
+
+
+
+
V1.0.0 / 07-August-2017
+
+
Main Changes
+
+First official release
+
+
+
+
+
+
+
+
diff --git a/P3_SETR2/Components/n25q256a/n25q256a.h b/P3_SETR2/Components/n25q256a/n25q256a.h
new file mode 100644
index 0000000..98b605d
--- /dev/null
+++ b/P3_SETR2/Components/n25q256a/n25q256a.h
@@ -0,0 +1,243 @@
+/**
+ ******************************************************************************
+ * @file n25q256a.h
+ * @author MCD Application Team
+ * @brief This file contains all the description of the N25Q256A QSPI memory.
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2015 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __N25Q256A_H
+#define __N25Q256A_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+
+/** @addtogroup BSP
+ * @{
+ */
+
+/** @addtogroup Components
+ * @{
+ */
+
+/** @addtogroup n25q256a
+ * @{
+ */
+
+/** @defgroup N25Q256A_Exported_Types
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @defgroup N25Q256A_Exported_Constants
+ * @{
+ */
+
+/**
+ * @brief N25Q256A Configuration
+ */
+#define N25Q256A_FLASH_SIZE 0x2000000 /* 256 MBits => 32MBytes */
+#define N25Q256A_SECTOR_SIZE 0x10000 /* 512 sectors of 64KBytes */
+#define N25Q256A_SUBSECTOR_SIZE 0x1000 /* 8192 subsectors of 4kBytes */
+#define N25Q256A_PAGE_SIZE 0x100 /* 131072 pages of 256 bytes */
+
+#define N25Q256A_DUMMY_CYCLES_READ 8
+#define N25Q256A_DUMMY_CYCLES_READ_QUAD 10
+#define N25Q256A_DUMMY_CYCLES_READ_DTR 6
+#define N25Q256A_DUMMY_CYCLES_READ_QUAD_DTR 8
+
+#define N25Q256A_BULK_ERASE_MAX_TIME 480000
+#define N25Q256A_SECTOR_ERASE_MAX_TIME 3000
+#define N25Q256A_SUBSECTOR_ERASE_MAX_TIME 800
+
+/**
+ * @brief N25Q256A Commands
+ */
+/* Reset Operations */
+#define RESET_ENABLE_CMD 0x66
+#define RESET_MEMORY_CMD 0x99
+
+/* Identification Operations */
+#define READ_ID_CMD 0x9E
+#define READ_ID_CMD2 0x9F
+#define MULTIPLE_IO_READ_ID_CMD 0xAF
+#define READ_SERIAL_FLASH_DISCO_PARAM_CMD 0x5A
+
+/* Read Operations */
+#define READ_CMD 0x03
+#define READ_4_BYTE_ADDR_CMD 0x13
+
+#define FAST_READ_CMD 0x0B
+#define FAST_READ_DTR_CMD 0x0D
+#define FAST_READ_4_BYTE_ADDR_CMD 0x0C
+
+#define DUAL_OUT_FAST_READ_CMD 0x3B
+#define DUAL_OUT_FAST_READ_DTR_CMD 0x3D
+#define DUAL_OUT_FAST_READ_4_BYTE_ADDR_CMD 0x3C
+
+#define DUAL_INOUT_FAST_READ_CMD 0xBB
+#define DUAL_INOUT_FAST_READ_DTR_CMD 0xBD
+#define DUAL_INOUT_FAST_READ_4_BYTE_ADDR_CMD 0xBC
+
+#define QUAD_OUT_FAST_READ_CMD 0x6B
+#define QUAD_OUT_FAST_READ_DTR_CMD 0x6D
+#define QUAD_OUT_FAST_READ_4_BYTE_ADDR_CMD 0x6C
+
+#define QUAD_INOUT_FAST_READ_CMD 0xEB
+#define QUAD_INOUT_FAST_READ_DTR_CMD 0xED
+#define QUAD_INOUT_FAST_READ_4_BYTE_ADDR_CMD 0xEC
+
+/* Write Operations */
+#define WRITE_ENABLE_CMD 0x06
+#define WRITE_DISABLE_CMD 0x04
+
+/* Register Operations */
+#define READ_STATUS_REG_CMD 0x05
+#define WRITE_STATUS_REG_CMD 0x01
+
+#define READ_LOCK_REG_CMD 0xE8
+#define WRITE_LOCK_REG_CMD 0xE5
+
+#define READ_FLAG_STATUS_REG_CMD 0x70
+#define CLEAR_FLAG_STATUS_REG_CMD 0x50
+
+#define READ_NONVOL_CFG_REG_CMD 0xB5
+#define WRITE_NONVOL_CFG_REG_CMD 0xB1
+
+#define READ_VOL_CFG_REG_CMD 0x85
+#define WRITE_VOL_CFG_REG_CMD 0x81
+
+#define READ_ENHANCED_VOL_CFG_REG_CMD 0x65
+#define WRITE_ENHANCED_VOL_CFG_REG_CMD 0x61
+
+#define READ_EXT_ADDR_REG_CMD 0xC8
+#define WRITE_EXT_ADDR_REG_CMD 0xC5
+
+/* Program Operations */
+#define PAGE_PROG_CMD 0x02
+#define PAGE_PROG_4_BYTE_ADDR_CMD 0x12
+
+#define DUAL_IN_FAST_PROG_CMD 0xA2
+#define EXT_DUAL_IN_FAST_PROG_CMD 0xD2
+
+#define QUAD_IN_FAST_PROG_CMD 0x32
+#define EXT_QUAD_IN_FAST_PROG_CMD 0x12 /*0x38*/
+#define QUAD_IN_FAST_PROG_4_BYTE_ADDR_CMD 0x34
+
+/* Erase Operations */
+#define SUBSECTOR_ERASE_CMD 0x20
+#define SUBSECTOR_ERASE_4_BYTE_ADDR_CMD 0x21
+
+#define SECTOR_ERASE_CMD 0xD8
+#define SECTOR_ERASE_4_BYTE_ADDR_CMD 0xDC
+
+#define BULK_ERASE_CMD 0xC7
+
+#define PROG_ERASE_RESUME_CMD 0x7A
+#define PROG_ERASE_SUSPEND_CMD 0x75
+
+/* One-Time Programmable Operations */
+#define READ_OTP_ARRAY_CMD 0x4B
+#define PROG_OTP_ARRAY_CMD 0x42
+
+/* 4-byte Address Mode Operations */
+#define ENTER_4_BYTE_ADDR_MODE_CMD 0xB7
+#define EXIT_4_BYTE_ADDR_MODE_CMD 0xE9
+
+/* Quad Operations */
+#define ENTER_QUAD_CMD 0x35
+#define EXIT_QUAD_CMD 0xF5
+
+/**
+ * @brief N25Q256A Registers
+ */
+/* Status Register */
+#define N25Q256A_SR_WIP ((uint8_t)0x01) /*!< Write in progress */
+#define N25Q256A_SR_WREN ((uint8_t)0x02) /*!< Write enable latch */
+#define N25Q256A_SR_BLOCKPR ((uint8_t)0x5C) /*!< Block protected against program and erase operations */
+#define N25Q256A_SR_PRBOTTOM ((uint8_t)0x20) /*!< Protected memory area defined by BLOCKPR starts from top or bottom */
+#define N25Q256A_SR_SRWREN ((uint8_t)0x80) /*!< Status register write enable/disable */
+
+/* Nonvolatile Configuration Register */
+#define N25Q256A_NVCR_NBADDR ((uint16_t)0x0001) /*!< 3-bytes or 4-bytes addressing */
+#define N25Q256A_NVCR_SEGMENT ((uint16_t)0x0002) /*!< Upper or lower 128Mb segment selected by default */
+#define N25Q256A_NVCR_DUAL ((uint16_t)0x0004) /*!< Dual I/O protocol */
+#define N25Q256A_NVCR_QUAB ((uint16_t)0x0008) /*!< Quad I/O protocol */
+#define N25Q256A_NVCR_RH ((uint16_t)0x0010) /*!< Reset/hold */
+#define N25Q256A_NVCR_ODS ((uint16_t)0x01C0) /*!< Output driver strength */
+#define N25Q256A_NVCR_XIP ((uint16_t)0x0E00) /*!< XIP mode at power-on reset */
+#define N25Q256A_NVCR_NB_DUMMY ((uint16_t)0xF000) /*!< Number of dummy clock cycles */
+
+/* Volatile Configuration Register */
+#define N25Q256A_VCR_WRAP ((uint8_t)0x03) /*!< Wrap */
+#define N25Q256A_VCR_XIP ((uint8_t)0x08) /*!< XIP */
+#define N25Q256A_VCR_NB_DUMMY ((uint8_t)0xF0) /*!< Number of dummy clock cycles */
+
+/* Extended Address Register */
+#define N25Q256A_EAR_A24 ((uint8_t)0x01) /*!< Select the lower or upper 128Mb segment */
+
+/* Enhanced Volatile Configuration Register */
+#define N25Q256A_EVCR_ODS ((uint8_t)0x07) /*!< Output driver strength */
+#define N25Q256A_EVCR_VPPA ((uint8_t)0x08) /*!< Vpp accelerator */
+#define N25Q256A_EVCR_RH ((uint8_t)0x10) /*!< Reset/hold */
+#define N25Q256A_EVCR_DUAL ((uint8_t)0x40) /*!< Dual I/O protocol */
+#define N25Q256A_EVCR_QUAD ((uint8_t)0x80) /*!< Quad I/O protocol */
+
+/* Flag Status Register */
+#define N25Q256A_FSR_NBADDR ((uint8_t)0x01) /*!< 3-bytes or 4-bytes addressing */
+#define N25Q256A_FSR_PRERR ((uint8_t)0x02) /*!< Protection error */
+#define N25Q256A_FSR_PGSUS ((uint8_t)0x04) /*!< Program operation suspended */
+#define N25Q256A_FSR_VPPERR ((uint8_t)0x08) /*!< Invalid voltage during program or erase */
+#define N25Q256A_FSR_PGERR ((uint8_t)0x10) /*!< Program error */
+#define N25Q256A_FSR_ERERR ((uint8_t)0x20) /*!< Erase error */
+#define N25Q256A_FSR_ERSUS ((uint8_t)0x40) /*!< Erase operation suspended */
+#define N25Q256A_FSR_READY ((uint8_t)0x80) /*!< Ready or command in progress */
+
+/**
+ * @}
+ */
+
+/** @defgroup N25Q256A_Exported_Functions
+ * @{
+ */
+/**
+ * @}
+ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __N25Q256A_H */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/P3_SETR2/Components/ov9655/Release_Notes.html b/P3_SETR2/Components/ov9655/Release_Notes.html
new file mode 100644
index 0000000..5ce5300
--- /dev/null
+++ b/P3_SETR2/Components/ov9655/Release_Notes.html
@@ -0,0 +1,73 @@
+
+
+
+
+
+
+ Release Notes for OV9655 Component Drivers
+
+
+
+
+
+
+
+
+
+
+Release Notes for OV9655 Component Drivers
+Copyright © 2015 STMicroelectronics
+
+
+
+
+
+
License
+
Licensed by ST under BSD 3-Clause license (the "License"). You may not use this package except in compliance with the License. You may obtain a copy of the License at:
+
https://opensource.org/licenses/BSD-3-Clause
+
Purpose
+
This directory contains the OV9655 component drivers.
+
+
+
Update History
+
+
V1.0.2 / 03-April-2019
+
+
Main Changes
+
+Update release notes format
+
+
+
+
+
V1.0.1 / 31-August-2018
+
+
Main Changes
+
+Reformat the BSD 3-Clause license declaration in the files header (replace license terms by a web reference to OSI website where those terms lie)
+
+
+
+
+
V1.0.0 / 25-June-2015
+
+
Main Changes
+
+First official release
+
+
+
+
+
+
+
+
diff --git a/P3_SETR2/Components/ov9655/ov9655.c b/P3_SETR2/Components/ov9655/ov9655.c
new file mode 100644
index 0000000..ddf9f9a
--- /dev/null
+++ b/P3_SETR2/Components/ov9655/ov9655.c
@@ -0,0 +1,843 @@
+/**
+ ******************************************************************************
+ * @file ov9655.c
+ * @author MCD Application Team
+ * @brief This file provides the OV9655 camera driver
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2015 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/* Includes ------------------------------------------------------------------*/
+#include "ov9655.h"
+
+/** @addtogroup BSP
+ * @{
+ */
+
+/** @addtogroup Components
+ * @{
+ */
+
+/** @addtogroup OV9655
+ * @brief This file provides a set of functions needed to drive the
+ * OV9655 Camera module.
+ * @{
+ */
+
+/** @defgroup OV9655_Private_TypesDefinitions
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @defgroup OV9655_Private_Defines
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @defgroup OV9655_Private_Macros
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @defgroup OV9655_Private_FunctionPrototypes
+ * @{
+ */
+static uint64_t ov9655_ConvertValue(uint32_t feature, uint32_t value);
+/**
+ * @}
+ */
+
+/** @defgroup OV9655_Private_Variables
+ * @{
+ */
+
+CAMERA_DrvTypeDef ov9655_drv =
+{
+ ov9655_Init,
+ ov9655_ReadID,
+ ov9655_Config,
+};
+
+/* Initialization sequence for VGA resolution (640x480)*/
+const unsigned char OV9655_VGA[][2]=
+{
+ {0x00, 0x00},
+ {0x01, 0x80},
+ {0x02, 0x80},
+ {0xb5, 0x00},
+ {0x35, 0x00},
+ {0xa8, 0xc1},
+ {0x3a, 0xcc},
+ {0x3d, 0x99},
+ {0x77, 0x02},
+ {0x13, 0xe7},
+ {0x26, 0x72},
+ {0x27, 0x08},
+ {0x28, 0x08},
+ {0x2c, 0x08},
+ {0xab, 0x04},
+ {0x6e, 0x00},
+ {0x6d, 0x55},
+ {0x00, 0x11},
+ {0x10, 0x7b},
+ {0xbb, 0xae},
+ {0x11, 0x03},
+ {0x72, 0x00},
+ {0x3e, 0x0c},
+ {0x74, 0x3a},
+ {0x76, 0x01},
+ {0x75, 0x35},
+ {0x73, 0x00},
+ {0xc7, 0x80},
+ {0x62, 0x00},
+ {0x63, 0x00},
+ {0x64, 0x02},
+ {0x65, 0x20},
+ {0x66, 0x01},
+ {0xc3, 0x4e},
+ {0x33, 0x00},
+ {0xa4, 0x50},
+ {0xaa, 0x92},
+ {0xc2, 0x01},
+ {0xc1, 0xc8},
+ {0x1e, 0x04},
+ {0xa9, 0xef},
+ {0x0e, 0x61},
+ {0x39, 0x57},
+ {0x0f, 0x48},
+ {0x24, 0x3c},
+ {0x25, 0x36},
+ {0x12, 0x63},
+ {0x03, 0x12},
+ {0x32, 0xff},
+ {0x17, 0x16},
+ {0x18, 0x02},
+ {0x19, 0x01},
+ {0x1a, 0x3d},
+ {0x36, 0xfa},
+ {0x69, 0x0a},
+ {0x8c, 0x8d},
+ {0xc0, 0xaa},
+ {0x40, 0xd0},
+ {0x43, 0x14},
+ {0x44, 0xf0},
+ {0x45, 0x46},
+ {0x46, 0x62},
+ {0x47, 0x2a},
+ {0x48, 0x3c},
+ {0x59, 0x85},
+ {0x5a, 0xa9},
+ {0x5b, 0x64},
+ {0x5c, 0x84},
+ {0x5d, 0x53},
+ {0x5e, 0x0e},
+ {0x6c, 0x0c},
+ {0xc6, 0x85},
+ {0xcb, 0xf0},
+ {0xcc, 0xd8},
+ {0x71, 0x78},
+ {0xa5, 0x68},
+ {0x6f, 0x9e},
+ {0x42, 0xc0},
+ {0x3f, 0x82},
+ {0x8a, 0x23},
+ {0x14, 0x3a},
+ {0x3b, 0xcc},
+ {0x34, 0x3d},
+ {0x41, 0x40},
+ {0xc9, 0xe0},
+ {0xca, 0xe8},
+ {0xcd, 0x93},
+ {0x7a, 0x20},
+ {0x7b, 0x1c},
+ {0x7c, 0x28},
+ {0x7d, 0x3c},
+ {0x7e, 0x5a},
+ {0x7f, 0x68},
+ {0x80, 0x76},
+ {0x81, 0x80},
+ {0x82, 0x88},
+ {0x83, 0x8f},
+ {0x84, 0x96},
+ {0x85, 0xa3},
+ {0x86, 0xaf},
+ {0x87, 0xc4},
+ {0x88, 0xd7},
+ {0x89, 0xe8},
+ {0x4f, 0x98},
+ {0x50, 0x98},
+ {0x51, 0x00},
+ {0x52, 0x28},
+ {0x53, 0x70},
+ {0x54, 0x98},
+ {0x58, 0x1a},
+ {0x6b, 0x5a},
+ {0x90, 0x92},
+ {0x91, 0x92},
+ {0x9f, 0x90},
+ {0xa0, 0x90},
+ {0x16, 0x24},
+ {0x2a, 0x00},
+ {0x2b, 0x00},
+ {0xac, 0x80},
+ {0xad, 0x80},
+ {0xae, 0x80},
+ {0xaf, 0x80},
+ {0xb2, 0xf2},
+ {0xb3, 0x20},
+ {0xb4, 0x20},
+ {0xb6, 0xaf},
+ {0x29, 0x15},
+ {0x9d, 0x02},
+ {0x9e, 0x02},
+ {0x9e, 0x02},
+ {0x04, 0x03},
+ {0x05, 0x2e},
+ {0x06, 0x2e},
+ {0x07, 0x2e},
+ {0x08, 0x2e},
+ {0x2f, 0x2e},
+ {0x4a, 0xe9},
+ {0x4b, 0xdd},
+ {0x4c, 0xdd},
+ {0x4d, 0xdd},
+ {0x4e, 0xdd},
+ {0x70, 0x06},
+ {0xa6, 0x40},
+ {0xbc, 0x02},
+ {0xbd, 0x01},
+ {0xbe, 0x02},
+ {0xbf, 0x01},
+};
+
+/* Initialization sequence for QVGA resolution (320x240) */
+const unsigned char OV9655_QVGA[][2]=
+{
+ {0x00, 0x00},
+ {0x01, 0x80},
+ {0x02, 0x80},
+ {0x03, 0x02},
+ {0x04, 0x03},
+ {0x09, 0x01},
+ {0x0b, 0x57},
+ {0x0e, 0x61},
+ {0x0f, 0x40},
+ {0x11, 0x01},
+ {0x12, 0x62},
+ {0x13, 0xc7},
+ {0x14, 0x3a},
+ {0x16, 0x24},
+ {0x17, 0x18},
+ {0x18, 0x04},
+ {0x19, 0x01},
+ {0x1a, 0x81},
+ {0x1e, 0x00},
+ {0x24, 0x3c},
+ {0x25, 0x36},
+ {0x26, 0x72},
+ {0x27, 0x08},
+ {0x28, 0x08},
+ {0x29, 0x15},
+ {0x2a, 0x00},
+ {0x2b, 0x00},
+ {0x2c, 0x08},
+ {0x32, 0x12},
+ {0x33, 0x00},
+ {0x34, 0x3f},
+ {0x35, 0x00},
+ {0x36, 0x3a},
+ {0x38, 0x72},
+ {0x39, 0x57},
+ {0x3a, 0xcc},
+ {0x3b, 0x04},
+ {0x3d, 0x99},
+ {0x3e, 0x02},
+ {0x3f, 0xc1},
+ {0x40, 0xc0},
+ {0x41, 0x41},
+ {0x42, 0xc0},
+ {0x43, 0x0a},
+ {0x44, 0xf0},
+ {0x45, 0x46},
+ {0x46, 0x62},
+ {0x47, 0x2a},
+ {0x48, 0x3c},
+ {0x4a, 0xfc},
+ {0x4b, 0xfc},
+ {0x4c, 0x7f},
+ {0x4d, 0x7f},
+ {0x4e, 0x7f},
+ {0x4f, 0x98},
+ {0x50, 0x98},
+ {0x51, 0x00},
+ {0x52, 0x28},
+ {0x53, 0x70},
+ {0x54, 0x98},
+ {0x58, 0x1a},
+ {0x59, 0x85},
+ {0x5a, 0xa9},
+ {0x5b, 0x64},
+ {0x5c, 0x84},
+ {0x5d, 0x53},
+ {0x5e, 0x0e},
+ {0x5f, 0xf0},
+ {0x60, 0xf0},
+ {0x61, 0xf0},
+ {0x62, 0x00},
+ {0x63, 0x00},
+ {0x64, 0x02},
+ {0x65, 0x20},
+ {0x66, 0x00},
+ {0x69, 0x0a},
+ {0x6b, 0x5a},
+ {0x6c, 0x04},
+ {0x6d, 0x55},
+ {0x6e, 0x00},
+ {0x6f, 0x9d},
+ {0x70, 0x21},
+ {0x71, 0x78},
+ {0x72, 0x11},
+ {0x73, 0x01},
+ {0x74, 0x10},
+ {0x75, 0x10},
+ {0x76, 0x01},
+ {0x77, 0x02},
+ {0x7A, 0x12},
+ {0x7B, 0x08},
+ {0x7C, 0x16},
+ {0x7D, 0x30},
+ {0x7E, 0x5e},
+ {0x7F, 0x72},
+ {0x80, 0x82},
+ {0x81, 0x8e},
+ {0x82, 0x9a},
+ {0x83, 0xa4},
+ {0x84, 0xac},
+ {0x85, 0xb8},
+ {0x86, 0xc3},
+ {0x87, 0xd6},
+ {0x88, 0xe6},
+ {0x89, 0xf2},
+ {0x8a, 0x24},
+ {0x8c, 0x80},
+ {0x90, 0x7d},
+ {0x91, 0x7b},
+ {0x9d, 0x02},
+ {0x9e, 0x02},
+ {0x9f, 0x7a},
+ {0xa0, 0x79},
+ {0xa1, 0x40},
+ {0xa4, 0x50},
+ {0xa5, 0x68},
+ {0xa6, 0x4a},
+ {0xa8, 0xc1},
+ {0xa9, 0xef},
+ {0xaa, 0x92},
+ {0xab, 0x04},
+ {0xac, 0x80},
+ {0xad, 0x80},
+ {0xae, 0x80},
+ {0xaf, 0x80},
+ {0xb2, 0xf2},
+ {0xb3, 0x20},
+ {0xb4, 0x20},
+ {0xb5, 0x00},
+ {0xb6, 0xaf},
+ {0xb6, 0xaf},
+ {0xbb, 0xae},
+ {0xbc, 0x7f},
+ {0xbd, 0x7f},
+ {0xbe, 0x7f},
+ {0xbf, 0x7f},
+ {0xbf, 0x7f},
+ {0xc0, 0xaa},
+ {0xc1, 0xc0},
+ {0xc2, 0x01},
+ {0xc3, 0x4e},
+ {0xc6, 0x05},
+ {0xc7, 0x81},
+ {0xc9, 0xe0},
+ {0xca, 0xe8},
+ {0xcb, 0xf0},
+ {0xcc, 0xd8},
+ {0xcd, 0x93},
+ {0x12, 0x63},
+ {0x40, 0x10},
+};
+
+/* Initialization sequence for QQVGA resolution (160x120) */
+const char OV9655_QQVGA[][2]=
+{
+ {0x00, 0x00},
+ {0x01, 0x80},
+ {0x02, 0x80},
+ {0x03, 0x02},
+ {0x04, 0x03},
+ {0x09, 0x01},
+ {0x0b, 0x57},
+ {0x0e, 0x61},
+ {0x0f, 0x40},
+ {0x11, 0x01},
+ {0x12, 0x62},
+ {0x13, 0xc7},
+ {0x14, 0x3a},
+ {0x16, 0x24},
+ {0x17, 0x18},
+ {0x18, 0x04},
+ {0x19, 0x01},
+ {0x1a, 0x81},
+ {0x1e, 0x00},
+ {0x24, 0x3c},
+ {0x25, 0x36},
+ {0x26, 0x72},
+ {0x27, 0x08},
+ {0x28, 0x08},
+ {0x29, 0x15},
+ {0x2a, 0x00},
+ {0x2b, 0x00},
+ {0x2c, 0x08},
+ {0x32, 0xa4},
+ {0x33, 0x00},
+ {0x34, 0x3f},
+ {0x35, 0x00},
+ {0x36, 0x3a},
+ {0x38, 0x72},
+ {0x39, 0x57},
+ {0x3a, 0xcc},
+ {0x3b, 0x04},
+ {0x3d, 0x99},
+ {0x3e, 0x0e},
+ {0x3f, 0xc1},
+ {0x40, 0xc0},
+ {0x41, 0x41},
+ {0x42, 0xc0},
+ {0x43, 0x0a},
+ {0x44, 0xf0},
+ {0x45, 0x46},
+ {0x46, 0x62},
+ {0x47, 0x2a},
+ {0x48, 0x3c},
+ {0x4a, 0xfc},
+ {0x4b, 0xfc},
+ {0x4c, 0x7f},
+ {0x4d, 0x7f},
+ {0x4e, 0x7f},
+ {0x4f, 0x98},
+ {0x50, 0x98},
+ {0x51, 0x00},
+ {0x52, 0x28},
+ {0x53, 0x70},
+ {0x54, 0x98},
+ {0x58, 0x1a},
+ {0x59, 0x85},
+ {0x5a, 0xa9},
+ {0x5b, 0x64},
+ {0x5c, 0x84},
+ {0x5d, 0x53},
+ {0x5e, 0x0e},
+ {0x5f, 0xf0},
+ {0x60, 0xf0},
+ {0x61, 0xf0},
+ {0x62, 0x00},
+ {0x63, 0x00},
+ {0x64, 0x02},
+ {0x65, 0x20},
+ {0x66, 0x00},
+ {0x69, 0x0a},
+ {0x6b, 0x5a},
+ {0x6c, 0x04},
+ {0x6d, 0x55},
+ {0x6e, 0x00},
+ {0x6f, 0x9d},
+ {0x70, 0x21},
+ {0x71, 0x78},
+ {0x72, 0x22},
+ {0x73, 0x02},
+ {0x74, 0x10},
+ {0x75, 0x10},
+ {0x76, 0x01},
+ {0x77, 0x02},
+ {0x7A, 0x12},
+ {0x7B, 0x08},
+ {0x7C, 0x16},
+ {0x7D, 0x30},
+ {0x7E, 0x5e},
+ {0x7F, 0x72},
+ {0x80, 0x82},
+ {0x81, 0x8e},
+ {0x82, 0x9a},
+ {0x83, 0xa4},
+ {0x84, 0xac},
+ {0x85, 0xb8},
+ {0x86, 0xc3},
+ {0x87, 0xd6},
+ {0x88, 0xe6},
+ {0x89, 0xf2},
+ {0x8a, 0x24},
+ {0x8c, 0x80},
+ {0x90, 0x7d},
+ {0x91, 0x7b},
+ {0x9d, 0x02},
+ {0x9e, 0x02},
+ {0x9f, 0x7a},
+ {0xa0, 0x79},
+ {0xa1, 0x40},
+ {0xa4, 0x50},
+ {0xa5, 0x68},
+ {0xa6, 0x4a},
+ {0xa8, 0xc1},
+ {0xa9, 0xef},
+ {0xaa, 0x92},
+ {0xab, 0x04},
+ {0xac, 0x80},
+ {0xad, 0x80},
+ {0xae, 0x80},
+ {0xaf, 0x80},
+ {0xb2, 0xf2},
+ {0xb3, 0x20},
+ {0xb4, 0x20},
+ {0xb5, 0x00},
+ {0xb6, 0xaf},
+ {0xb6, 0xaf},
+ {0xbb, 0xae},
+ {0xbc, 0x7f},
+ {0xbd, 0x7f},
+ {0xbe, 0x7f},
+ {0xbf, 0x7f},
+ {0xbf, 0x7f},
+ {0xc0, 0xaa},
+ {0xc1, 0xc0},
+ {0xc2, 0x01},
+ {0xc3, 0x4e},
+ {0xc6, 0x05},
+ {0xc7, 0x82},
+ {0xc9, 0xe0},
+ {0xca, 0xe8},
+ {0xcb, 0xf0},
+ {0xcc, 0xd8},
+ {0xcd, 0x93},
+ {0x12, 0x63},
+ {0x40, 0x10},
+};
+
+/**
+ * @}
+ */
+
+/** @defgroup OV9655_Private_Functions
+ * @{
+ */
+
+/**
+ * @brief Initializes the OV9655 CAMERA component.
+ * @param DeviceAddr: Device address on communication Bus.
+ * @param resolution: Camera resolution
+ * @retval None
+ */
+void ov9655_Init(uint16_t DeviceAddr, uint32_t resolution)
+{
+ uint32_t index;
+
+ /* Initialize I2C */
+ CAMERA_IO_Init();
+
+ /* Prepare the camera to be configured by resetting all its registers */
+ CAMERA_IO_Write(DeviceAddr, OV9655_SENSOR_COM7, 0x80);
+ CAMERA_Delay(200);
+
+ /* Initialize OV9655 */
+ switch (resolution)
+ {
+ case CAMERA_R160x120:
+ {
+ for(index=0; index<(sizeof(OV9655_QQVGA)/2); index++)
+ {
+ CAMERA_IO_Write(DeviceAddr, OV9655_QQVGA[index][0], OV9655_QQVGA[index][1]);
+ CAMERA_Delay(2);
+ }
+ break;
+ }
+ case CAMERA_R320x240:
+ {
+ for(index=0; index<(sizeof(OV9655_QVGA)/2); index++)
+ {
+ CAMERA_IO_Write(DeviceAddr, OV9655_QVGA[index][0], OV9655_QVGA[index][1]);
+ CAMERA_Delay(2);
+ }
+ break;
+ }
+ case CAMERA_R480x272:
+ {
+ /* Not supported resolution */
+ break;
+ }
+ case CAMERA_R640x480:
+ {
+ for(index=0; index<(sizeof(OV9655_VGA)/2); index++)
+ {
+ CAMERA_IO_Write(DeviceAddr, OV9655_VGA[index][0], OV9655_VGA[index][1]);
+ CAMERA_Delay(2);
+ }
+ break;
+ }
+ default:
+ {
+ break;
+ }
+ }
+}
+
+/**
+ * @brief Configures the OV9655 camera feature.
+ * @param DeviceAddr: Device address on communication Bus.
+ * @param feature: Camera feature to be configured
+ * @param value: Value to be configured
+ * @param brightness_value: Brightness value to be configured
+ * @retval None
+ */
+void ov9655_Config(uint16_t DeviceAddr, uint32_t feature, uint32_t value, uint32_t brightness_value)
+{
+ uint8_t tslb, mtx1, mtx2, mtx3, mtx4, mtx5, mtx6;
+ uint64_t value_tmp;
+ uint32_t br_value;
+
+ /* Convert the input value into ov9655 parameters */
+ value_tmp = ov9655_ConvertValue(feature, value);
+ br_value = (uint32_t)ov9655_ConvertValue(CAMERA_CONTRAST_BRIGHTNESS, brightness_value);
+
+ switch(feature)
+ {
+ case CAMERA_CONTRAST_BRIGHTNESS:
+ {
+ CAMERA_IO_Write(DeviceAddr, OV9655_SENSOR_BRTN, br_value);
+ CAMERA_IO_Write(DeviceAddr, OV9655_SENSOR_CNST1, value_tmp);
+ break;
+ }
+ case CAMERA_BLACK_WHITE:
+ case CAMERA_COLOR_EFFECT:
+ {
+ tslb = (uint8_t)(value_tmp >> 48);
+ mtx1 = (uint8_t)(value_tmp >> 40);
+ mtx2 = (uint8_t)(value_tmp >> 32);
+ mtx3 = (uint8_t)(value_tmp >> 24);
+ mtx4 = (uint8_t)(value_tmp >> 16);
+ mtx5 = (uint8_t)(value_tmp >> 8);
+ mtx6 = (uint8_t)(value_tmp);
+ CAMERA_IO_Write(DeviceAddr, OV9655_SENSOR_TSLB, tslb);
+ CAMERA_IO_Write(DeviceAddr, OV9655_SENSOR_MTX1, mtx1);
+ CAMERA_IO_Write(DeviceAddr, OV9655_SENSOR_MTX2, mtx2);
+ CAMERA_IO_Write(DeviceAddr, OV9655_SENSOR_MTX3, mtx3);
+ CAMERA_IO_Write(DeviceAddr, OV9655_SENSOR_MTX4, mtx4);
+ CAMERA_IO_Write(DeviceAddr, OV9655_SENSOR_MTX5, mtx5);
+ CAMERA_IO_Write(DeviceAddr, OV9655_SENSOR_MTX6, mtx6);
+ break;
+ }
+ default:
+ {
+ break;
+ }
+ }
+}
+
+/**
+ * @brief Read the OV9655 Camera identity.
+ * @param DeviceAddr: Device address on communication Bus.
+ * @retval the OV9655 ID
+ */
+uint16_t ov9655_ReadID(uint16_t DeviceAddr)
+{
+ /* Initialize I2C */
+ CAMERA_IO_Init();
+
+ /* Get the camera ID */
+ return (CAMERA_IO_Read(DeviceAddr, OV9655_SENSOR_PIDH));
+}
+
+/******************************************************************************
+ Static Functions
+*******************************************************************************/
+/**
+ * @brief Convert input values into ov9655 parameters.
+ * @param feature: Camera feature to be configured
+ * @param value: Value to be configured
+ * @retval The converted value
+ */
+static uint64_t ov9655_ConvertValue(uint32_t feature, uint32_t value)
+{
+ uint64_t ret = 0;
+
+ switch(feature)
+ {
+ case CAMERA_BLACK_WHITE:
+ {
+ switch(value)
+ {
+ case CAMERA_BLACK_WHITE_BW:
+ {
+ ret = OV9655_BLACK_WHITE_BW;
+ break;
+ }
+ case CAMERA_BLACK_WHITE_NEGATIVE:
+ {
+ ret = OV9655_BLACK_WHITE_NEGATIVE;
+ break;
+ }
+ case CAMERA_BLACK_WHITE_BW_NEGATIVE:
+ {
+ ret = OV9655_BLACK_WHITE_BW_NEGATIVE;
+ break;
+ }
+ case CAMERA_BLACK_WHITE_NORMAL:
+ {
+ ret = OV9655_BLACK_WHITE_NORMAL;
+ break;
+ }
+ default:
+ {
+ ret = OV9655_BLACK_WHITE_NORMAL;
+ break;
+ }
+ }
+ break;
+ }
+ case CAMERA_CONTRAST_BRIGHTNESS:
+ {
+ switch(value)
+ {
+ case CAMERA_BRIGHTNESS_LEVEL0:
+ {
+ ret = OV9655_BRIGHTNESS_LEVEL0;
+ break;
+ }
+ case CAMERA_BRIGHTNESS_LEVEL1:
+ {
+ ret = OV9655_BRIGHTNESS_LEVEL1;
+ break;
+ }
+ case CAMERA_BRIGHTNESS_LEVEL2:
+ {
+ ret = OV9655_BRIGHTNESS_LEVEL2;
+ break;
+ }
+ case CAMERA_BRIGHTNESS_LEVEL3:
+ {
+ ret = OV9655_BRIGHTNESS_LEVEL3;
+ break;
+ }
+ case CAMERA_BRIGHTNESS_LEVEL4:
+ {
+ ret = OV9655_BRIGHTNESS_LEVEL4;
+ break;
+ }
+ case CAMERA_CONTRAST_LEVEL0:
+ {
+ ret = OV9655_CONTRAST_LEVEL0;
+ break;
+ }
+ case CAMERA_CONTRAST_LEVEL1:
+ {
+ ret = OV9655_CONTRAST_LEVEL1;
+ break;
+ }
+ case CAMERA_CONTRAST_LEVEL2:
+ {
+ ret = OV9655_CONTRAST_LEVEL2;
+ break;
+ }
+ case CAMERA_CONTRAST_LEVEL3:
+ {
+ ret = OV9655_CONTRAST_LEVEL3;
+ break;
+ }
+ case CAMERA_CONTRAST_LEVEL4:
+ {
+ ret = OV9655_CONTRAST_LEVEL4;
+ break;
+ }
+ default:
+ {
+ ret = OV9655_CONTRAST_LEVEL0;
+ break;
+ }
+ }
+ break;
+ }
+ case CAMERA_COLOR_EFFECT:
+ {
+ switch(value)
+ {
+ case CAMERA_COLOR_EFFECT_ANTIQUE:
+ {
+ ret = OV9655_COLOR_EFFECT_ANTIQUE;
+ break;
+ }
+ case CAMERA_COLOR_EFFECT_BLUE:
+ {
+ ret = OV9655_COLOR_EFFECT_BLUE;
+ break;
+ }
+ case CAMERA_COLOR_EFFECT_GREEN:
+ {
+ ret = OV9655_COLOR_EFFECT_GREEN;
+ break;
+ }
+ case CAMERA_COLOR_EFFECT_RED:
+ {
+ ret = OV9655_COLOR_EFFECT_RED;
+ break;
+ }
+ case CAMERA_COLOR_EFFECT_NONE:
+ default:
+ {
+ ret = OV9655_COLOR_EFFECT_NONE;
+ break;
+ }
+ }
+ break;
+ default:
+ {
+ ret = 0;
+ break;
+ }
+ }
+ }
+
+ return ret;
+}
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/P3_SETR2/Components/ov9655/ov9655.h b/P3_SETR2/Components/ov9655/ov9655.h
new file mode 100644
index 0000000..4578d47
--- /dev/null
+++ b/P3_SETR2/Components/ov9655/ov9655.h
@@ -0,0 +1,141 @@
+/**
+ ******************************************************************************
+ * @file ov9655.h
+ * @author MCD Application Team
+ * @brief This file contains all the functions prototypes for the ov9655.c
+ * driver.
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2015 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __OV9655_H
+#define __OV9655_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "../Common/camera.h"
+
+/** @addtogroup BSP
+ * @{
+ */
+
+/** @addtogroup Components
+ * @{
+ */
+
+/** @addtogroup ov9655
+ * @{
+ */
+
+/** @defgroup OV9655_Exported_Types
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @defgroup OV9655_Exported_Constants
+ * @{
+ */
+/**
+ * @brief OV9655 ID
+ */
+#define OV9655_ID 0x96
+/**
+ * @brief OV9655 Registers
+ */
+
+/* OV9655 Registers definition */
+#define OV9655_SENSOR_PIDH 0x0A
+#define OV9655_SENSOR_PIDL 0x0B
+#define OV9655_SENSOR_COM7 0x12
+#define OV9655_SENSOR_TSLB 0x3A
+#define OV9655_SENSOR_MTX1 0x4F
+#define OV9655_SENSOR_MTX2 0x50
+#define OV9655_SENSOR_MTX3 0x51
+#define OV9655_SENSOR_MTX4 0x52
+#define OV9655_SENSOR_MTX5 0x53
+#define OV9655_SENSOR_MTX6 0x54
+#define OV9655_SENSOR_BRTN 0x55
+#define OV9655_SENSOR_CNST1 0x56
+#define OV9655_SENSOR_CNST2 0x57
+
+/**
+ * @brief OV9655 Features Parameters
+ */
+#define OV9655_BRIGHTNESS_LEVEL0 0xB0 /* Brightness level -2 */
+#define OV9655_BRIGHTNESS_LEVEL1 0x98 /* Brightness level -1 */
+#define OV9655_BRIGHTNESS_LEVEL2 0x00 /* Brightness level 0 */
+#define OV9655_BRIGHTNESS_LEVEL3 0x18 /* Brightness level +1 */
+#define OV9655_BRIGHTNESS_LEVEL4 0x30 /* Brightness level +2 */
+
+#define OV9655_BLACK_WHITE_BW 0xCC000000000000 /* Black and white effect */
+#define OV9655_BLACK_WHITE_NEGATIVE 0xEC808000008080 /* Negative effect */
+#define OV9655_BLACK_WHITE_BW_NEGATIVE 0xEC000000000000 /* BW and Negative effect */
+#define OV9655_BLACK_WHITE_NORMAL 0xCC808000008080 /* Normal effect */
+
+#define OV9655_CONTRAST_LEVEL0 0x30 /* Contrast level -2 */
+#define OV9655_CONTRAST_LEVEL1 0x38 /* Contrast level -1 */
+#define OV9655_CONTRAST_LEVEL2 0x40 /* Contrast level 0 */
+#define OV9655_CONTRAST_LEVEL3 0x50 /* Contrast level +1 */
+#define OV9655_CONTRAST_LEVEL4 0x60 /* Contrast level +2 */
+
+#define OV9655_COLOR_EFFECT_NONE 0xCC808000008080 /* No color effect */
+#define OV9655_COLOR_EFFECT_ANTIQUE 0xCC000020F00000 /* Antique effect */
+#define OV9655_COLOR_EFFECT_BLUE 0xCC000000000060 /* Blue effect */
+#define OV9655_COLOR_EFFECT_GREEN 0xCC000000008000 /* Green effect */
+#define OV9655_COLOR_EFFECT_RED 0xCC600000000000 /* Red effect */
+/**
+ * @}
+ */
+
+/** @defgroup OV9655_Exported_Functions
+ * @{
+ */
+void ov9655_Init(uint16_t DeviceAddr, uint32_t resolution);
+void ov9655_Config(uint16_t DeviceAddr, uint32_t feature, uint32_t value, uint32_t BR_value);
+uint16_t ov9655_ReadID(uint16_t DeviceAddr);
+
+void CAMERA_IO_Init(void);
+void CAMERA_IO_Write(uint8_t addr, uint8_t reg, uint8_t value);
+uint8_t CAMERA_IO_Read(uint8_t addr, uint8_t reg);
+void CAMERA_Delay(uint32_t delay);
+
+/* CAMERA driver structure */
+extern CAMERA_DrvTypeDef ov9655_drv;
+/**
+ * @}
+ */
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __OV9655_H */
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/P3_SETR2/Components/rk043fn48h/Release_Notes.html b/P3_SETR2/Components/rk043fn48h/Release_Notes.html
new file mode 100644
index 0000000..0ad14b8
--- /dev/null
+++ b/P3_SETR2/Components/rk043fn48h/Release_Notes.html
@@ -0,0 +1,73 @@
+
+
+
+
+
+
+ Release Notes for RK043FN48H-CT672B LCD Component Drivers
+
+
+
+
+
+
+
+
+
+
+Release Notes for RK043FN48H-CT672B LCD Component Drivers
+Copyright © 2015 STMicroelectronics
+
+
+
+
+
+
License
+
Licensed by ST under BSD 3-Clause license (the "License"). You may not use this package except in compliance with the License. You may obtain a copy of the License at:
+
https://opensource.org/licenses/BSD-3-Clause
+
Purpose
+
This directory contains the RK043FN48H-CT672B LCD component drivers.
+
+
+
Update History
+
+
V1.0.2 / 03-April-2019
+
+
Main Changes
+
+Update release notes format
+
+
+
+
+
V1.0.1 / 31-August-2018
+
+
Main Changes
+
+Reformat the BSD 3-Clause license declaration in the files header (replace license terms by a web reference to OSI website where those terms lie)
+
+
+
+
+
V1.0.0 / 25-June-2015
+
+
Main Changes
+
+First official release
+
+
+
+
+
+
+
+
diff --git a/P3_SETR2/Components/rk043fn48h/rk043fn48h.h b/P3_SETR2/Components/rk043fn48h/rk043fn48h.h
new file mode 100644
index 0000000..401c8c5
--- /dev/null
+++ b/P3_SETR2/Components/rk043fn48h/rk043fn48h.h
@@ -0,0 +1,103 @@
+/**
+ ******************************************************************************
+ * @file rk043fn48h.h
+ * @author MCD Application Team
+ * @brief This file contains all the constants parameters for the RK043FN48H-CT672B
+ * LCD component.
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2015 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __RK043FN48H_H
+#define __RK043FN48H_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+
+/** @addtogroup BSP
+ * @{
+ */
+
+/** @addtogroup Components
+ * @{
+ */
+
+/** @addtogroup rk043fn48h
+ * @{
+ */
+
+/** @defgroup RK043FN48H_Exported_Types
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @defgroup RK043FN48H_Exported_Constants
+ * @{
+ */
+
+/**
+ * @brief RK043FN48H Size
+ */
+#define RK043FN48H_WIDTH ((uint16_t)480) /* LCD PIXEL WIDTH */
+#define RK043FN48H_HEIGHT ((uint16_t)272) /* LCD PIXEL HEIGHT */
+
+/**
+ * @brief RK043FN48H Timing
+ */
+#define RK043FN48H_HSYNC ((uint16_t)41) /* Horizontal synchronization */
+#define RK043FN48H_HBP ((uint16_t)13) /* Horizontal back porch */
+#define RK043FN48H_HFP ((uint16_t)32) /* Horizontal front porch */
+#define RK043FN48H_VSYNC ((uint16_t)10) /* Vertical synchronization */
+#define RK043FN48H_VBP ((uint16_t)2) /* Vertical back porch */
+#define RK043FN48H_VFP ((uint16_t)2) /* Vertical front porch */
+
+/**
+ * @brief RK043FN48H frequency divider
+ */
+#define RK043FN48H_FREQUENCY_DIVIDER 5 /* LCD Frequency divider */
+/**
+ * @}
+ */
+
+/** @defgroup RK043FN48H_Exported_Functions
+ * @{
+ */
+
+/**
+ * @}
+ */
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __RK043FN48H_H */
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/P3_SETR2/Components/st25dv/Release_Notes.html b/P3_SETR2/Components/st25dv/Release_Notes.html
new file mode 100644
index 0000000..d3eb0aa
--- /dev/null
+++ b/P3_SETR2/Components/st25dv/Release_Notes.html
@@ -0,0 +1,55 @@
+
+
+
+
+
+
+ Release Notes for ST25DV-I2C Component Driver
+
+
+
+
+
+
+
+
+
+
+Release Notes for ST25DV-I2C Component Driver
+Copyright © 2020 STMicroelectronics
+
+
+
+
+
+
License
+
Licensed by ST under BSD 3-Clause license (the "License"). You may not use this package except in compliance with the License. You may obtain a copy of the License at:
+
https://opensource.org/licenses/BSD-3-Clause
+
Purpose
+
This directory contains the ST25DV-I2C component drivers.
+
+
+
Update History
+
+
V1.0.0 / 30-April-2020
+
+
Main Changes
+
+First official release.
+
+
+
+
+
+
+
+
diff --git a/P3_SETR2/Components/st25dv/_htmresc/mini-st.css b/P3_SETR2/Components/st25dv/_htmresc/mini-st.css
new file mode 100644
index 0000000..9b2d0a9
--- /dev/null
+++ b/P3_SETR2/Components/st25dv/_htmresc/mini-st.css
@@ -0,0 +1,1700 @@
+@charset "UTF-8";
+/*
+ Flavor name: Default (mini-default)
+ Author: Angelos Chalaris (chalarangelo@gmail.com)
+ Maintainers: Angelos Chalaris
+ mini.css version: v3.0.0-alpha.3
+*/
+/*
+ Browsers resets and base typography.
+*/
+/* Core module CSS variable definitions */
+:root {
+ --fore-color: #111;
+ --secondary-fore-color: #444;
+ --back-color: #f8f8f8;
+ --secondary-back-color: #f0f0f0;
+ --blockquote-color: #f57c00;
+ --pre-color: #1565c0;
+ --border-color: #aaa;
+ --secondary-border-color: #ddd;
+ --heading-ratio: 1.19;
+ --universal-margin: 0.5rem;
+ --universal-padding: 0.125rem;
+ --universal-border-radius: 0.125rem;
+ --a-link-color: #0277bd;
+ --a-visited-color: #01579b; }
+
+html {
+ font-size: 14px; }
+
+a, b, del, em, i, ins, q, span, strong, u {
+ font-size: 1em; }
+
+html, * {
+ font-family: -apple-system, BlinkMacSystemFont, "Segoe UI", Roboto, Ubuntu, "Helvetica Neue", Helvetica, sans-serif;
+ line-height: 1.4;
+ -webkit-text-size-adjust: 100%; }
+
+* {
+ font-size: 1rem; }
+
+body {
+ margin: 0;
+ color: var(--fore-color);
+ background: var(--back-color); }
+
+details {
+ display: block; }
+
+summary {
+ display: list-item; }
+
+abbr[title] {
+ border-bottom: none;
+ text-decoration: underline dotted; }
+
+input {
+ overflow: visible; }
+
+img {
+ max-width: 100%;
+ height: auto; }
+
+h1, h2, h3, h4, h5, h6 {
+ line-height: 1.2;
+ margin: calc(1.5 * var(--universal-margin)) var(--universal-margin);
+ font-weight: 500; }
+ h1 small, h2 small, h3 small, h4 small, h5 small, h6 small {
+ color: var(--secondary-fore-color);
+ display: block;
+ margin-top: -0.25rem; }
+
+h1 {
+ font-size: calc(1rem * var(--heading-ratio) * var(--heading-ratio) * var(--heading-ratio)); }
+
+h2 {
+ font-size: calc(1rem * var(--heading-ratio) * var(--heading-ratio); );
+ background: var(--mark-back-color);
+ font-weight: 600;
+ padding: 0.1em 0.5em 0.2em 0.5em;
+ color: var(--mark-fore-color); }
+
+h3 {
+ font-size: calc(1rem * var(--heading-ratio));
+ padding-left: calc(2 * var(--universal-margin));
+ /* background: var(--border-color); */
+ }
+
+h4 {
+ font-size: 1rem;);
+ padding-left: calc(4 * var(--universal-margin)); }
+
+h5 {
+ font-size: 1rem; }
+
+h6 {
+ font-size: calc(1rem / var(--heading-ratio)); }
+
+p {
+ margin: var(--universal-margin); }
+
+ol, ul {
+ margin: var(--universal-margin);
+ padding-left: calc(6 * var(--universal-margin)); }
+
+b, strong {
+ font-weight: 700; }
+
+hr {
+ box-sizing: content-box;
+ border: 0;
+ line-height: 1.25em;
+ margin: var(--universal-margin);
+ height: 0.0625rem;
+ background: linear-gradient(to right, transparent, var(--border-color) 20%, var(--border-color) 80%, transparent); }
+
+blockquote {
+ display: block;
+ position: relative;
+ font-style: italic;
+ color: var(--secondary-fore-color);
+ margin: var(--universal-margin);
+ padding: calc(3 * var(--universal-padding));
+ border: 0.0625rem solid var(--secondary-border-color);
+ border-left: 0.375rem solid var(--blockquote-color);
+ border-radius: 0 var(--universal-border-radius) var(--universal-border-radius) 0; }
+ blockquote:before {
+ position: absolute;
+ top: calc(0rem - var(--universal-padding));
+ left: 0;
+ font-family: sans-serif;
+ font-size: 3rem;
+ font-weight: 700;
+ content: "\201c";
+ color: var(--blockquote-color); }
+ blockquote[cite]:after {
+ font-style: normal;
+ font-size: 0.75em;
+ font-weight: 700;
+ content: "\a— " attr(cite);
+ white-space: pre; }
+
+code, kbd, pre, samp {
+ font-family: Menlo, Consolas, monospace;
+ font-size: 0.85em; }
+
+code {
+ background: var(--secondary-back-color);
+ border-radius: var(--universal-border-radius);
+ padding: calc(var(--universal-padding) / 4) calc(var(--universal-padding) / 2); }
+
+kbd {
+ background: var(--fore-color);
+ color: var(--back-color);
+ border-radius: var(--universal-border-radius);
+ padding: calc(var(--universal-padding) / 4) calc(var(--universal-padding) / 2); }
+
+pre {
+ overflow: auto;
+ background: var(--secondary-back-color);
+ padding: calc(1.5 * var(--universal-padding));
+ margin: var(--universal-margin);
+ border: 0.0625rem solid var(--secondary-border-color);
+ border-left: 0.25rem solid var(--pre-color);
+ border-radius: 0 var(--universal-border-radius) var(--universal-border-radius) 0; }
+
+sup, sub, code, kbd {
+ line-height: 0;
+ position: relative;
+ vertical-align: baseline; }
+
+small, sup, sub, figcaption {
+ font-size: 0.75em; }
+
+sup {
+ top: -0.5em; }
+
+sub {
+ bottom: -0.25em; }
+
+figure {
+ margin: var(--universal-margin); }
+
+figcaption {
+ color: var(--secondary-fore-color); }
+
+a {
+ text-decoration: none; }
+ a:link {
+ color: var(--a-link-color); }
+ a:visited {
+ color: var(--a-visited-color); }
+ a:hover, a:focus {
+ text-decoration: underline; }
+
+/*
+ Definitions for the grid system, cards and containers.
+*/
+.container {
+ margin: 0 auto;
+ padding: 0 calc(1.5 * var(--universal-padding)); }
+
+.row {
+ box-sizing: border-box;
+ display: flex;
+ flex: 0 1 auto;
+ flex-flow: row wrap; }
+
+.col-sm,
+[class^='col-sm-'],
+[class^='col-sm-offset-'],
+.row[class*='cols-sm-'] > * {
+ box-sizing: border-box;
+ flex: 0 0 auto;
+ padding: 0 calc(var(--universal-padding) / 2); }
+
+.col-sm,
+.row.cols-sm > * {
+ max-width: 100%;
+ flex-grow: 1;
+ flex-basis: 0; }
+
+.col-sm-1,
+.row.cols-sm-1 > * {
+ max-width: 8.3333333333%;
+ flex-basis: 8.3333333333%; }
+
+.col-sm-offset-0 {
+ margin-left: 0; }
+
+.col-sm-2,
+.row.cols-sm-2 > * {
+ max-width: 16.6666666667%;
+ flex-basis: 16.6666666667%; }
+
+.col-sm-offset-1 {
+ margin-left: 8.3333333333%; }
+
+.col-sm-3,
+.row.cols-sm-3 > * {
+ max-width: 25%;
+ flex-basis: 25%; }
+
+.col-sm-offset-2 {
+ margin-left: 16.6666666667%; }
+
+.col-sm-4,
+.row.cols-sm-4 > * {
+ max-width: 33.3333333333%;
+ flex-basis: 33.3333333333%; }
+
+.col-sm-offset-3 {
+ margin-left: 25%; }
+
+.col-sm-5,
+.row.cols-sm-5 > * {
+ max-width: 41.6666666667%;
+ flex-basis: 41.6666666667%; }
+
+.col-sm-offset-4 {
+ margin-left: 33.3333333333%; }
+
+.col-sm-6,
+.row.cols-sm-6 > * {
+ max-width: 50%;
+ flex-basis: 50%; }
+
+.col-sm-offset-5 {
+ margin-left: 41.6666666667%; }
+
+.col-sm-7,
+.row.cols-sm-7 > * {
+ max-width: 58.3333333333%;
+ flex-basis: 58.3333333333%; }
+
+.col-sm-offset-6 {
+ margin-left: 50%; }
+
+.col-sm-8,
+.row.cols-sm-8 > * {
+ max-width: 66.6666666667%;
+ flex-basis: 66.6666666667%; }
+
+.col-sm-offset-7 {
+ margin-left: 58.3333333333%; }
+
+.col-sm-9,
+.row.cols-sm-9 > * {
+ max-width: 75%;
+ flex-basis: 75%; }
+
+.col-sm-offset-8 {
+ margin-left: 66.6666666667%; }
+
+.col-sm-10,
+.row.cols-sm-10 > * {
+ max-width: 83.3333333333%;
+ flex-basis: 83.3333333333%; }
+
+.col-sm-offset-9 {
+ margin-left: 75%; }
+
+.col-sm-11,
+.row.cols-sm-11 > * {
+ max-width: 91.6666666667%;
+ flex-basis: 91.6666666667%; }
+
+.col-sm-offset-10 {
+ margin-left: 83.3333333333%; }
+
+.col-sm-12,
+.row.cols-sm-12 > * {
+ max-width: 100%;
+ flex-basis: 100%; }
+
+.col-sm-offset-11 {
+ margin-left: 91.6666666667%; }
+
+.col-sm-normal {
+ order: initial; }
+
+.col-sm-first {
+ order: -999; }
+
+.col-sm-last {
+ order: 999; }
+
+@media screen and (min-width: 500px) {
+ .col-md,
+ [class^='col-md-'],
+ [class^='col-md-offset-'],
+ .row[class*='cols-md-'] > * {
+ box-sizing: border-box;
+ flex: 0 0 auto;
+ padding: 0 calc(var(--universal-padding) / 2); }
+
+ .col-md,
+ .row.cols-md > * {
+ max-width: 100%;
+ flex-grow: 1;
+ flex-basis: 0; }
+
+ .col-md-1,
+ .row.cols-md-1 > * {
+ max-width: 8.3333333333%;
+ flex-basis: 8.3333333333%; }
+
+ .col-md-offset-0 {
+ margin-left: 0; }
+
+ .col-md-2,
+ .row.cols-md-2 > * {
+ max-width: 16.6666666667%;
+ flex-basis: 16.6666666667%; }
+
+ .col-md-offset-1 {
+ margin-left: 8.3333333333%; }
+
+ .col-md-3,
+ .row.cols-md-3 > * {
+ max-width: 25%;
+ flex-basis: 25%; }
+
+ .col-md-offset-2 {
+ margin-left: 16.6666666667%; }
+
+ .col-md-4,
+ .row.cols-md-4 > * {
+ max-width: 33.3333333333%;
+ flex-basis: 33.3333333333%; }
+
+ .col-md-offset-3 {
+ margin-left: 25%; }
+
+ .col-md-5,
+ .row.cols-md-5 > * {
+ max-width: 41.6666666667%;
+ flex-basis: 41.6666666667%; }
+
+ .col-md-offset-4 {
+ margin-left: 33.3333333333%; }
+
+ .col-md-6,
+ .row.cols-md-6 > * {
+ max-width: 50%;
+ flex-basis: 50%; }
+
+ .col-md-offset-5 {
+ margin-left: 41.6666666667%; }
+
+ .col-md-7,
+ .row.cols-md-7 > * {
+ max-width: 58.3333333333%;
+ flex-basis: 58.3333333333%; }
+
+ .col-md-offset-6 {
+ margin-left: 50%; }
+
+ .col-md-8,
+ .row.cols-md-8 > * {
+ max-width: 66.6666666667%;
+ flex-basis: 66.6666666667%; }
+
+ .col-md-offset-7 {
+ margin-left: 58.3333333333%; }
+
+ .col-md-9,
+ .row.cols-md-9 > * {
+ max-width: 75%;
+ flex-basis: 75%; }
+
+ .col-md-offset-8 {
+ margin-left: 66.6666666667%; }
+
+ .col-md-10,
+ .row.cols-md-10 > * {
+ max-width: 83.3333333333%;
+ flex-basis: 83.3333333333%; }
+
+ .col-md-offset-9 {
+ margin-left: 75%; }
+
+ .col-md-11,
+ .row.cols-md-11 > * {
+ max-width: 91.6666666667%;
+ flex-basis: 91.6666666667%; }
+
+ .col-md-offset-10 {
+ margin-left: 83.3333333333%; }
+
+ .col-md-12,
+ .row.cols-md-12 > * {
+ max-width: 100%;
+ flex-basis: 100%; }
+
+ .col-md-offset-11 {
+ margin-left: 91.6666666667%; }
+
+ .col-md-normal {
+ order: initial; }
+
+ .col-md-first {
+ order: -999; }
+
+ .col-md-last {
+ order: 999; } }
+@media screen and (min-width: 1280px) {
+ .col-lg,
+ [class^='col-lg-'],
+ [class^='col-lg-offset-'],
+ .row[class*='cols-lg-'] > * {
+ box-sizing: border-box;
+ flex: 0 0 auto;
+ padding: 0 calc(var(--universal-padding) / 2); }
+
+ .col-lg,
+ .row.cols-lg > * {
+ max-width: 100%;
+ flex-grow: 1;
+ flex-basis: 0; }
+
+ .col-lg-1,
+ .row.cols-lg-1 > * {
+ max-width: 8.3333333333%;
+ flex-basis: 8.3333333333%; }
+
+ .col-lg-offset-0 {
+ margin-left: 0; }
+
+ .col-lg-2,
+ .row.cols-lg-2 > * {
+ max-width: 16.6666666667%;
+ flex-basis: 16.6666666667%; }
+
+ .col-lg-offset-1 {
+ margin-left: 8.3333333333%; }
+
+ .col-lg-3,
+ .row.cols-lg-3 > * {
+ max-width: 25%;
+ flex-basis: 25%; }
+
+ .col-lg-offset-2 {
+ margin-left: 16.6666666667%; }
+
+ .col-lg-4,
+ .row.cols-lg-4 > * {
+ max-width: 33.3333333333%;
+ flex-basis: 33.3333333333%; }
+
+ .col-lg-offset-3 {
+ margin-left: 25%; }
+
+ .col-lg-5,
+ .row.cols-lg-5 > * {
+ max-width: 41.6666666667%;
+ flex-basis: 41.6666666667%; }
+
+ .col-lg-offset-4 {
+ margin-left: 33.3333333333%; }
+
+ .col-lg-6,
+ .row.cols-lg-6 > * {
+ max-width: 50%;
+ flex-basis: 50%; }
+
+ .col-lg-offset-5 {
+ margin-left: 41.6666666667%; }
+
+ .col-lg-7,
+ .row.cols-lg-7 > * {
+ max-width: 58.3333333333%;
+ flex-basis: 58.3333333333%; }
+
+ .col-lg-offset-6 {
+ margin-left: 50%; }
+
+ .col-lg-8,
+ .row.cols-lg-8 > * {
+ max-width: 66.6666666667%;
+ flex-basis: 66.6666666667%; }
+
+ .col-lg-offset-7 {
+ margin-left: 58.3333333333%; }
+
+ .col-lg-9,
+ .row.cols-lg-9 > * {
+ max-width: 75%;
+ flex-basis: 75%; }
+
+ .col-lg-offset-8 {
+ margin-left: 66.6666666667%; }
+
+ .col-lg-10,
+ .row.cols-lg-10 > * {
+ max-width: 83.3333333333%;
+ flex-basis: 83.3333333333%; }
+
+ .col-lg-offset-9 {
+ margin-left: 75%; }
+
+ .col-lg-11,
+ .row.cols-lg-11 > * {
+ max-width: 91.6666666667%;
+ flex-basis: 91.6666666667%; }
+
+ .col-lg-offset-10 {
+ margin-left: 83.3333333333%; }
+
+ .col-lg-12,
+ .row.cols-lg-12 > * {
+ max-width: 100%;
+ flex-basis: 100%; }
+
+ .col-lg-offset-11 {
+ margin-left: 91.6666666667%; }
+
+ .col-lg-normal {
+ order: initial; }
+
+ .col-lg-first {
+ order: -999; }
+
+ .col-lg-last {
+ order: 999; } }
+/* Card component CSS variable definitions */
+:root {
+ --card-back-color: #f8f8f8;
+ --card-fore-color: #111;
+ --card-border-color: #ddd; }
+
+.card {
+ display: flex;
+ flex-direction: column;
+ justify-content: space-between;
+ align-self: center;
+ position: relative;
+ width: 100%;
+ background: var(--card-back-color);
+ color: var(--card-fore-color);
+ border: 0.0625rem solid var(--card-border-color);
+ border-radius: var(--universal-border-radius);
+ margin: var(--universal-margin);
+ overflow: hidden; }
+ @media screen and (min-width: 320px) {
+ .card {
+ max-width: 320px; } }
+ .card > .sectione {
+ background: var(--card-back-color);
+ color: var(--card-fore-color);
+ box-sizing: border-box;
+ margin: 0;
+ border: 0;
+ border-radius: 0;
+ border-bottom: 0.0625rem solid var(--card-border-color);
+ padding: var(--universal-padding);
+ width: 100%; }
+ .card > .sectione.media {
+ height: 200px;
+ padding: 0;
+ -o-object-fit: cover;
+ object-fit: cover; }
+ .card > .sectione:last-child {
+ border-bottom: 0; }
+
+/*
+ Custom elements for card elements.
+*/
+@media screen and (min-width: 240px) {
+ .card.small {
+ max-width: 240px; } }
+@media screen and (min-width: 480px) {
+ .card.large {
+ max-width: 480px; } }
+.card.fluid {
+ max-width: 100%;
+ width: auto; }
+
+.card.warning {
+/* --card-back-color: #ffca28; */
+ --card-back-color: #e5b8b7;
+ --card-border-color: #e8b825; }
+
+.card.error {
+ --card-back-color: #b71c1c;
+ --card-fore-color: #f8f8f8;
+ --card-border-color: #a71a1a; }
+
+.card > .sectione.dark {
+ --card-back-color: #e0e0e0; }
+
+.card > .sectione.double-padded {
+ padding: calc(1.5 * var(--universal-padding)); }
+
+/*
+ Definitions for forms and input elements.
+*/
+/* Input_control module CSS variable definitions */
+:root {
+ --form-back-color: #f0f0f0;
+ --form-fore-color: #111;
+ --form-border-color: #ddd;
+ --input-back-color: #f8f8f8;
+ --input-fore-color: #111;
+ --input-border-color: #ddd;
+ --input-focus-color: #0288d1;
+ --input-invalid-color: #d32f2f;
+ --button-back-color: #e2e2e2;
+ --button-hover-back-color: #dcdcdc;
+ --button-fore-color: #212121;
+ --button-border-color: transparent;
+ --button-hover-border-color: transparent;
+ --button-group-border-color: rgba(124, 124, 124, 0.54); }
+
+form {
+ background: var(--form-back-color);
+ color: var(--form-fore-color);
+ border: 0.0625rem solid var(--form-border-color);
+ border-radius: var(--universal-border-radius);
+ margin: var(--universal-margin);
+ padding: calc(2 * var(--universal-padding)) var(--universal-padding); }
+
+fieldset {
+ border: 0.0625rem solid var(--form-border-color);
+ border-radius: var(--universal-border-radius);
+ margin: calc(var(--universal-margin) / 4);
+ padding: var(--universal-padding); }
+
+legend {
+ box-sizing: border-box;
+ display: table;
+ max-width: 100%;
+ white-space: normal;
+ font-weight: 700;
+ padding: calc(var(--universal-padding) / 2); }
+
+label {
+ padding: calc(var(--universal-padding) / 2) var(--universal-padding); }
+
+.input-group {
+ display: inline-block; }
+ .input-group.fluid {
+ display: flex;
+ align-items: center;
+ justify-content: center; }
+ .input-group.fluid > input {
+ max-width: 100%;
+ flex-grow: 1;
+ flex-basis: 0px; }
+ @media screen and (max-width: 499px) {
+ .input-group.fluid {
+ align-items: stretch;
+ flex-direction: column; } }
+ .input-group.vertical {
+ display: flex;
+ align-items: stretch;
+ flex-direction: column; }
+ .input-group.vertical > input {
+ max-width: 100%;
+ flex-grow: 1;
+ flex-basis: 0px; }
+
+[type="number"]::-webkit-inner-spin-button, [type="number"]::-webkit-outer-spin-button {
+ height: auto; }
+
+[type="search"] {
+ -webkit-appearance: textfield;
+ outline-offset: -2px; }
+
+[type="search"]::-webkit-search-cancel-button,
+[type="search"]::-webkit-search-decoration {
+ -webkit-appearance: none; }
+
+input:not([type]), [type="text"], [type="email"], [type="number"], [type="search"],
+[type="password"], [type="url"], [type="tel"], [type="checkbox"], [type="radio"], textarea, select {
+ box-sizing: border-box;
+ background: var(--input-back-color);
+ color: var(--input-fore-color);
+ border: 0.0625rem solid var(--input-border-color);
+ border-radius: var(--universal-border-radius);
+ margin: calc(var(--universal-margin) / 2);
+ padding: var(--universal-padding) calc(1.5 * var(--universal-padding)); }
+
+input:not([type="button"]):not([type="submit"]):not([type="reset"]):hover, input:not([type="button"]):not([type="submit"]):not([type="reset"]):focus, textarea:hover, textarea:focus, select:hover, select:focus {
+ border-color: var(--input-focus-color);
+ box-shadow: none; }
+input:not([type="button"]):not([type="submit"]):not([type="reset"]):invalid, input:not([type="button"]):not([type="submit"]):not([type="reset"]):focus:invalid, textarea:invalid, textarea:focus:invalid, select:invalid, select:focus:invalid {
+ border-color: var(--input-invalid-color);
+ box-shadow: none; }
+input:not([type="button"]):not([type="submit"]):not([type="reset"])[readonly], textarea[readonly], select[readonly] {
+ background: var(--secondary-back-color); }
+
+select {
+ max-width: 100%; }
+
+option {
+ overflow: hidden;
+ text-overflow: ellipsis; }
+
+[type="checkbox"], [type="radio"] {
+ -webkit-appearance: none;
+ -moz-appearance: none;
+ appearance: none;
+ position: relative;
+ height: calc(1rem + var(--universal-padding) / 2);
+ width: calc(1rem + var(--universal-padding) / 2);
+ vertical-align: text-bottom;
+ padding: 0;
+ flex-basis: calc(1rem + var(--universal-padding) / 2) !important;
+ flex-grow: 0 !important; }
+ [type="checkbox"]:checked:before, [type="radio"]:checked:before {
+ position: absolute; }
+
+[type="checkbox"]:checked:before {
+ content: '\2713';
+ font-family: sans-serif;
+ font-size: calc(1rem + var(--universal-padding) / 2);
+ top: calc(0rem - var(--universal-padding));
+ left: calc(var(--universal-padding) / 4); }
+
+[type="radio"] {
+ border-radius: 100%; }
+ [type="radio"]:checked:before {
+ border-radius: 100%;
+ content: '';
+ top: calc(0.0625rem + var(--universal-padding) / 2);
+ left: calc(0.0625rem + var(--universal-padding) / 2);
+ background: var(--input-fore-color);
+ width: 0.5rem;
+ height: 0.5rem; }
+
+:placeholder-shown {
+ color: var(--input-fore-color); }
+
+::-ms-placeholder {
+ color: var(--input-fore-color);
+ opacity: 0.54; }
+
+button::-moz-focus-inner, [type="button"]::-moz-focus-inner, [type="reset"]::-moz-focus-inner, [type="submit"]::-moz-focus-inner {
+ border-style: none;
+ padding: 0; }
+
+button, html [type="button"], [type="reset"], [type="submit"] {
+ -webkit-appearance: button; }
+
+button {
+ overflow: visible;
+ text-transform: none; }
+
+button, [type="button"], [type="submit"], [type="reset"],
+a.button, label.button, .button,
+a[role="button"], label[role="button"], [role="button"] {
+ display: inline-block;
+ background: var(--button-back-color);
+ color: var(--button-fore-color);
+ border: 0.0625rem solid var(--button-border-color);
+ border-radius: var(--universal-border-radius);
+ padding: var(--universal-padding) calc(1.5 * var(--universal-padding));
+ margin: var(--universal-margin);
+ text-decoration: none;
+ cursor: pointer;
+ transition: background 0.3s; }
+ button:hover, button:focus, [type="button"]:hover, [type="button"]:focus, [type="submit"]:hover, [type="submit"]:focus, [type="reset"]:hover, [type="reset"]:focus,
+ a.button:hover,
+ a.button:focus, label.button:hover, label.button:focus, .button:hover, .button:focus,
+ a[role="button"]:hover,
+ a[role="button"]:focus, label[role="button"]:hover, label[role="button"]:focus, [role="button"]:hover, [role="button"]:focus {
+ background: var(--button-hover-back-color);
+ border-color: var(--button-hover-border-color); }
+
+input:disabled, input[disabled], textarea:disabled, textarea[disabled], select:disabled, select[disabled], button:disabled, button[disabled], .button:disabled, .button[disabled], [role="button"]:disabled, [role="button"][disabled] {
+ cursor: not-allowed;
+ opacity: 0.75; }
+
+.button-group {
+ display: flex;
+ border: 0.0625rem solid var(--button-group-border-color);
+ border-radius: var(--universal-border-radius);
+ margin: var(--universal-margin); }
+ .button-group > button, .button-group [type="button"], .button-group > [type="submit"], .button-group > [type="reset"], .button-group > .button, .button-group > [role="button"] {
+ margin: 0;
+ max-width: 100%;
+ flex: 1 1 auto;
+ text-align: center;
+ border: 0;
+ border-radius: 0;
+ box-shadow: none; }
+ .button-group > :not(:first-child) {
+ border-left: 0.0625rem solid var(--button-group-border-color); }
+ @media screen and (max-width: 499px) {
+ .button-group {
+ flex-direction: column; }
+ .button-group > :not(:first-child) {
+ border: 0;
+ border-top: 0.0625rem solid var(--button-group-border-color); } }
+
+/*
+ Custom elements for forms and input elements.
+*/
+button.primary, [type="button"].primary, [type="submit"].primary, [type="reset"].primary, .button.primary, [role="button"].primary {
+ --button-back-color: #1976d2;
+ --button-fore-color: #f8f8f8; }
+ button.primary:hover, button.primary:focus, [type="button"].primary:hover, [type="button"].primary:focus, [type="submit"].primary:hover, [type="submit"].primary:focus, [type="reset"].primary:hover, [type="reset"].primary:focus, .button.primary:hover, .button.primary:focus, [role="button"].primary:hover, [role="button"].primary:focus {
+ --button-hover-back-color: #1565c0; }
+
+button.secondary, [type="button"].secondary, [type="submit"].secondary, [type="reset"].secondary, .button.secondary, [role="button"].secondary {
+ --button-back-color: #d32f2f;
+ --button-fore-color: #f8f8f8; }
+ button.secondary:hover, button.secondary:focus, [type="button"].secondary:hover, [type="button"].secondary:focus, [type="submit"].secondary:hover, [type="submit"].secondary:focus, [type="reset"].secondary:hover, [type="reset"].secondary:focus, .button.secondary:hover, .button.secondary:focus, [role="button"].secondary:hover, [role="button"].secondary:focus {
+ --button-hover-back-color: #c62828; }
+
+button.tertiary, [type="button"].tertiary, [type="submit"].tertiary, [type="reset"].tertiary, .button.tertiary, [role="button"].tertiary {
+ --button-back-color: #308732;
+ --button-fore-color: #f8f8f8; }
+ button.tertiary:hover, button.tertiary:focus, [type="button"].tertiary:hover, [type="button"].tertiary:focus, [type="submit"].tertiary:hover, [type="submit"].tertiary:focus, [type="reset"].tertiary:hover, [type="reset"].tertiary:focus, .button.tertiary:hover, .button.tertiary:focus, [role="button"].tertiary:hover, [role="button"].tertiary:focus {
+ --button-hover-back-color: #277529; }
+
+button.inverse, [type="button"].inverse, [type="submit"].inverse, [type="reset"].inverse, .button.inverse, [role="button"].inverse {
+ --button-back-color: #212121;
+ --button-fore-color: #f8f8f8; }
+ button.inverse:hover, button.inverse:focus, [type="button"].inverse:hover, [type="button"].inverse:focus, [type="submit"].inverse:hover, [type="submit"].inverse:focus, [type="reset"].inverse:hover, [type="reset"].inverse:focus, .button.inverse:hover, .button.inverse:focus, [role="button"].inverse:hover, [role="button"].inverse:focus {
+ --button-hover-back-color: #111; }
+
+button.small, [type="button"].small, [type="submit"].small, [type="reset"].small, .button.small, [role="button"].small {
+ padding: calc(0.5 * var(--universal-padding)) calc(0.75 * var(--universal-padding));
+ margin: var(--universal-margin); }
+
+button.large, [type="button"].large, [type="submit"].large, [type="reset"].large, .button.large, [role="button"].large {
+ padding: calc(1.5 * var(--universal-padding)) calc(2 * var(--universal-padding));
+ margin: var(--universal-margin); }
+
+/*
+ Definitions for navigation elements.
+*/
+/* Navigation module CSS variable definitions */
+:root {
+ --header-back-color: #f8f8f8;
+ --header-hover-back-color: #f0f0f0;
+ --header-fore-color: #444;
+ --header-border-color: #ddd;
+ --nav-back-color: #f8f8f8;
+ --nav-hover-back-color: #f0f0f0;
+ --nav-fore-color: #444;
+ --nav-border-color: #ddd;
+ --nav-link-color: #0277bd;
+ --footer-fore-color: #444;
+ --footer-back-color: #f8f8f8;
+ --footer-border-color: #ddd;
+ --footer-link-color: #0277bd;
+ --drawer-back-color: #f8f8f8;
+ --drawer-hover-back-color: #f0f0f0;
+ --drawer-border-color: #ddd;
+ --drawer-close-color: #444; }
+
+header {
+ height: 3.1875rem;
+ background: var(--header-back-color);
+ color: var(--header-fore-color);
+ border-bottom: 0.0625rem solid var(--header-border-color);
+ padding: calc(var(--universal-padding) / 4) 0;
+ white-space: nowrap;
+ overflow-x: auto;
+ overflow-y: hidden; }
+ header.row {
+ box-sizing: content-box; }
+ header .logo {
+ color: var(--header-fore-color);
+ font-size: 1.75rem;
+ padding: var(--universal-padding) calc(2 * var(--universal-padding));
+ text-decoration: none; }
+ header button, header [type="button"], header .button, header [role="button"] {
+ box-sizing: border-box;
+ position: relative;
+ top: calc(0rem - var(--universal-padding) / 4);
+ height: calc(3.1875rem + var(--universal-padding) / 2);
+ background: var(--header-back-color);
+ line-height: calc(3.1875rem - var(--universal-padding) * 1.5);
+ text-align: center;
+ color: var(--header-fore-color);
+ border: 0;
+ border-radius: 0;
+ margin: 0;
+ text-transform: uppercase; }
+ header button:hover, header button:focus, header [type="button"]:hover, header [type="button"]:focus, header .button:hover, header .button:focus, header [role="button"]:hover, header [role="button"]:focus {
+ background: var(--header-hover-back-color); }
+
+nav {
+ background: var(--nav-back-color);
+ color: var(--nav-fore-color);
+ border: 0.0625rem solid var(--nav-border-color);
+ border-radius: var(--universal-border-radius);
+ margin: var(--universal-margin); }
+ nav * {
+ padding: var(--universal-padding) calc(1.5 * var(--universal-padding)); }
+ nav a, nav a:visited {
+ display: block;
+ color: var(--nav-link-color);
+ border-radius: var(--universal-border-radius);
+ transition: background 0.3s; }
+ nav a:hover, nav a:focus, nav a:visited:hover, nav a:visited:focus {
+ text-decoration: none;
+ background: var(--nav-hover-back-color); }
+ nav .sublink-1 {
+ position: relative;
+ margin-left: calc(2 * var(--universal-padding)); }
+ nav .sublink-1:before {
+ position: absolute;
+ left: calc(var(--universal-padding) - 1 * var(--universal-padding));
+ top: -0.0625rem;
+ content: '';
+ height: 100%;
+ border: 0.0625rem solid var(--nav-border-color);
+ border-left: 0; }
+ nav .sublink-2 {
+ position: relative;
+ margin-left: calc(4 * var(--universal-padding)); }
+ nav .sublink-2:before {
+ position: absolute;
+ left: calc(var(--universal-padding) - 3 * var(--universal-padding));
+ top: -0.0625rem;
+ content: '';
+ height: 100%;
+ border: 0.0625rem solid var(--nav-border-color);
+ border-left: 0; }
+
+footer {
+ background: var(--footer-back-color);
+ color: var(--footer-fore-color);
+ border-top: 0.0625rem solid var(--footer-border-color);
+ padding: calc(2 * var(--universal-padding)) var(--universal-padding);
+ font-size: 0.875rem; }
+ footer a, footer a:visited {
+ color: var(--footer-link-color); }
+
+header.sticky {
+ position: -webkit-sticky;
+ position: sticky;
+ z-index: 1101;
+ top: 0; }
+
+footer.sticky {
+ position: -webkit-sticky;
+ position: sticky;
+ z-index: 1101;
+ bottom: 0; }
+
+.drawer-toggle:before {
+ display: inline-block;
+ position: relative;
+ vertical-align: bottom;
+ content: '\00a0\2261\00a0';
+ font-family: sans-serif;
+ font-size: 1.5em; }
+@media screen and (min-width: 500px) {
+ .drawer-toggle:not(.persistent) {
+ display: none; } }
+
+[type="checkbox"].drawer {
+ height: 1px;
+ width: 1px;
+ margin: -1px;
+ overflow: hidden;
+ position: absolute;
+ clip: rect(0 0 0 0);
+ -webkit-clip-path: inset(100%);
+ clip-path: inset(100%); }
+ [type="checkbox"].drawer + * {
+ display: block;
+ box-sizing: border-box;
+ position: fixed;
+ top: 0;
+ width: 320px;
+ height: 100vh;
+ overflow-y: auto;
+ background: var(--drawer-back-color);
+ border: 0.0625rem solid var(--drawer-border-color);
+ border-radius: 0;
+ margin: 0;
+ z-index: 1110;
+ right: -320px;
+ transition: right 0.3s; }
+ [type="checkbox"].drawer + * .drawer-close {
+ position: absolute;
+ top: var(--universal-margin);
+ right: var(--universal-margin);
+ z-index: 1111;
+ width: 2rem;
+ height: 2rem;
+ border-radius: var(--universal-border-radius);
+ padding: var(--universal-padding);
+ margin: 0;
+ cursor: pointer;
+ transition: background 0.3s; }
+ [type="checkbox"].drawer + * .drawer-close:before {
+ display: block;
+ content: '\00D7';
+ color: var(--drawer-close-color);
+ position: relative;
+ font-family: sans-serif;
+ font-size: 2rem;
+ line-height: 1;
+ text-align: center; }
+ [type="checkbox"].drawer + * .drawer-close:hover, [type="checkbox"].drawer + * .drawer-close:focus {
+ background: var(--drawer-hover-back-color); }
+ @media screen and (max-width: 320px) {
+ [type="checkbox"].drawer + * {
+ width: 100%; } }
+ [type="checkbox"].drawer:checked + * {
+ right: 0; }
+ @media screen and (min-width: 500px) {
+ [type="checkbox"].drawer:not(.persistent) + * {
+ position: static;
+ height: 100%;
+ z-index: 1100; }
+ [type="checkbox"].drawer:not(.persistent) + * .drawer-close {
+ display: none; } }
+
+/*
+ Definitions for the responsive table component.
+*/
+/* Table module CSS variable definitions. */
+:root {
+ --table-border-color: #aaa;
+ --table-border-separator-color: #666;
+ --table-head-back-color: #e6e6e6;
+ --table-head-fore-color: #111;
+ --table-body-back-color: #f8f8f8;
+ --table-body-fore-color: #111;
+ --table-body-alt-back-color: #eee; }
+
+table {
+ border-collapse: separate;
+ border-spacing: 0;
+ : margin: calc(1.5 * var(--universal-margin)) var(--universal-margin);
+ display: flex;
+ flex: 0 1 auto;
+ flex-flow: row wrap;
+ padding: var(--universal-padding);
+ padding-top: 0;
+ margin: calc(1.5 * var(--universal-margin)) var(--universal-margin); }
+ table caption {
+ font-size: 1.25 * rem;
+ margin: calc(2 * var(--universal-margin)) 0;
+ max-width: 100%;
+ flex: 0 0 100%;
+ text-align: left;}
+ table thead, table tbody {
+ display: flex;
+ flex-flow: row wrap;
+ border: 0.0625rem solid var(--table-border-color); }
+ table thead {
+ z-index: 999;
+ border-radius: var(--universal-border-radius) var(--universal-border-radius) 0 0;
+ border-bottom: 0.0625rem solid var(--table-border-separator-color); }
+ table tbody {
+ border-top: 0;
+ margin-top: calc(0 - var(--universal-margin));
+ border-radius: 0 0 var(--universal-border-radius) var(--universal-border-radius); }
+ table tr {
+ display: flex;
+ padding: 0; }
+ table th, table td {
+ padding: calc(0.5 * var(--universal-padding));
+ font-size: 0.9rem; }
+ table th {
+ text-align: left;
+ background: var(--table-head-back-color);
+ color: var(--table-head-fore-color); }
+ table td {
+ background: var(--table-body-back-color);
+ color: var(--table-body-fore-color);
+ border-top: 0.0625rem solid var(--table-border-color); }
+
+table:not(.horizontal) {
+ overflow: auto;
+ max-height: 850px; }
+ table:not(.horizontal) thead, table:not(.horizontal) tbody {
+ max-width: 100%;
+ flex: 0 0 100%; }
+ table:not(.horizontal) tr {
+ flex-flow: row wrap;
+ flex: 0 0 100%; }
+ table:not(.horizontal) th, table:not(.horizontal) td {
+ flex: 1 0 0%;
+ overflow: hidden;
+ text-overflow: ellipsis; }
+ table:not(.horizontal) thead {
+ position: sticky;
+ top: 0; }
+ table:not(.horizontal) tbody tr:first-child td {
+ border-top: 0; }
+
+table.horizontal {
+ border: 0; }
+ table.horizontal thead, table.horizontal tbody {
+ border: 0;
+ flex-flow: row nowrap; }
+ table.horizontal tbody {
+ overflow: auto;
+ justify-content: space-between;
+ flex: 1 0 0;
+ margin-left: calc( 4 * var(--universal-margin));
+ padding-bottom: calc(var(--universal-padding) / 4); }
+ table.horizontal tr {
+ flex-direction: column;
+ flex: 1 0 auto; }
+ table.horizontal th, table.horizontal td {
+ width: 100%;
+ border: 0;
+ border-bottom: 0.0625rem solid var(--table-border-color); }
+ table.horizontal th:not(:first-child), table.horizontal td:not(:first-child) {
+ border-top: 0; }
+ table.horizontal th {
+ text-align: right;
+ border-left: 0.0625rem solid var(--table-border-color);
+ border-right: 0.0625rem solid var(--table-border-separator-color); }
+ table.horizontal thead tr:first-child {
+ padding-left: 0; }
+ table.horizontal th:first-child, table.horizontal td:first-child {
+ border-top: 0.0625rem solid var(--table-border-color); }
+ table.horizontal tbody tr:last-child td {
+ border-right: 0.0625rem solid var(--table-border-color); }
+ table.horizontal tbody tr:last-child td:first-child {
+ border-top-right-radius: 0.25rem; }
+ table.horizontal tbody tr:last-child td:last-child {
+ border-bottom-right-radius: 0.25rem; }
+ table.horizontal thead tr:first-child th:first-child {
+ border-top-left-radius: 0.25rem; }
+ table.horizontal thead tr:first-child th:last-child {
+ border-bottom-left-radius: 0.25rem; }
+
+@media screen and (max-width: 499px) {
+ table, table.horizontal {
+ border-collapse: collapse;
+ border: 0;
+ width: 100%;
+ display: table; }
+ table thead, table th, table.horizontal thead, table.horizontal th {
+ border: 0;
+ height: 1px;
+ width: 1px;
+ margin: -1px;
+ overflow: hidden;
+ padding: 0;
+ position: absolute;
+ clip: rect(0 0 0 0);
+ -webkit-clip-path: inset(100%);
+ clip-path: inset(100%); }
+ table tbody, table.horizontal tbody {
+ border: 0;
+ display: table-row-group; }
+ table tr, table.horizontal tr {
+ display: block;
+ border: 0.0625rem solid var(--table-border-color);
+ border-radius: var(--universal-border-radius);
+ background: #fafafa;
+ padding: var(--universal-padding);
+ margin: var(--universal-margin);
+ margin-bottom: calc(2 * var(--universal-margin)); }
+ table th, table td, table.horizontal th, table.horizontal td {
+ width: auto; }
+ table td, table.horizontal td {
+ display: block;
+ border: 0;
+ text-align: right; }
+ table td:before, table.horizontal td:before {
+ content: attr(data-label);
+ float: left;
+ font-weight: 600; }
+ table th:first-child, table td:first-child, table.horizontal th:first-child, table.horizontal td:first-child {
+ border-top: 0; }
+ table tbody tr:last-child td, table.horizontal tbody tr:last-child td {
+ border-right: 0; } }
+:root {
+ --table-body-alt-back-color: #eee; }
+
+table tr:nth-of-type(2n) > td {
+ background: var(--table-body-alt-back-color); }
+
+@media screen and (max-width: 500px) {
+ table tr:nth-of-type(2n) {
+ background: var(--table-body-alt-back-color); } }
+:root {
+ --table-body-hover-back-color: #90caf9; }
+
+table.hoverable tr:hover, table.hoverable tr:hover > td, table.hoverable tr:focus, table.hoverable tr:focus > td {
+ background: var(--table-body-hover-back-color); }
+
+@media screen and (max-width: 500px) {
+ table.hoverable tr:hover, table.hoverable tr:hover > td, table.hoverable tr:focus, table.hoverable tr:focus > td {
+ background: var(--table-body-hover-back-color); } }
+/*
+ Definitions for contextual background elements, toasts and tooltips.
+*/
+/* Contextual module CSS variable definitions */
+:root {
+ --mark-back-color: #0277bd;
+ --mark-fore-color: #fafafa; }
+
+mark {
+ background: var(--mark-back-color);
+ color: var(--mark-fore-color);
+ font-size: 0.95em;
+ line-height: 1em;
+ border-radius: var(--universal-border-radius);
+ padding: calc(var(--universal-padding) / 4) calc(var(--universal-padding) / 2); }
+ mark.inline-block {
+ display: inline-block;
+ font-size: 1em;
+ line-height: 1.5;
+ padding: calc(var(--universal-padding) / 2) var(--universal-padding); }
+
+:root {
+ --toast-back-color: #424242;
+ --toast-fore-color: #fafafa; }
+
+.toast {
+ position: fixed;
+ bottom: calc(var(--universal-margin) * 3);
+ left: 50%;
+ transform: translate(-50%, -50%);
+ z-index: 1111;
+ color: var(--toast-fore-color);
+ background: var(--toast-back-color);
+ border-radius: calc(var(--universal-border-radius) * 16);
+ padding: var(--universal-padding) calc(var(--universal-padding) * 3); }
+
+:root {
+ --tooltip-back-color: #212121;
+ --tooltip-fore-color: #fafafa; }
+
+.tooltip {
+ position: relative;
+ display: inline-block; }
+ .tooltip:before, .tooltip:after {
+ position: absolute;
+ opacity: 0;
+ clip: rect(0 0 0 0);
+ -webkit-clip-path: inset(100%);
+ clip-path: inset(100%);
+ transition: all 0.3s;
+ z-index: 1010;
+ left: 50%; }
+ .tooltip:not(.bottom):before, .tooltip:not(.bottom):after {
+ bottom: 75%; }
+ .tooltip.bottom:before, .tooltip.bottom:after {
+ top: 75%; }
+ .tooltip:hover:before, .tooltip:hover:after, .tooltip:focus:before, .tooltip:focus:after {
+ opacity: 1;
+ clip: auto;
+ -webkit-clip-path: inset(0%);
+ clip-path: inset(0%); }
+ .tooltip:before {
+ content: '';
+ background: transparent;
+ border: var(--universal-margin) solid transparent;
+ left: calc(50% - var(--universal-margin)); }
+ .tooltip:not(.bottom):before {
+ border-top-color: #212121; }
+ .tooltip.bottom:before {
+ border-bottom-color: #212121; }
+ .tooltip:after {
+ content: attr(aria-label);
+ color: var(--tooltip-fore-color);
+ background: var(--tooltip-back-color);
+ border-radius: var(--universal-border-radius);
+ padding: var(--universal-padding);
+ white-space: nowrap;
+ transform: translateX(-50%); }
+ .tooltip:not(.bottom):after {
+ margin-bottom: calc(2 * var(--universal-margin)); }
+ .tooltip.bottom:after {
+ margin-top: calc(2 * var(--universal-margin)); }
+
+:root {
+ --modal-overlay-color: rgba(0, 0, 0, 0.45);
+ --modal-close-color: #444;
+ --modal-close-hover-color: #f0f0f0; }
+
+[type="checkbox"].modal {
+ height: 1px;
+ width: 1px;
+ margin: -1px;
+ overflow: hidden;
+ position: absolute;
+ clip: rect(0 0 0 0);
+ -webkit-clip-path: inset(100%);
+ clip-path: inset(100%); }
+ [type="checkbox"].modal + div {
+ position: fixed;
+ top: 0;
+ left: 0;
+ display: none;
+ width: 100vw;
+ height: 100vh;
+ background: var(--modal-overlay-color); }
+ [type="checkbox"].modal + div .card {
+ margin: 0 auto;
+ max-height: 50vh;
+ overflow: auto; }
+ [type="checkbox"].modal + div .card .modal-close {
+ position: absolute;
+ top: 0;
+ right: 0;
+ width: 1.75rem;
+ height: 1.75rem;
+ border-radius: var(--universal-border-radius);
+ padding: var(--universal-padding);
+ margin: 0;
+ cursor: pointer;
+ transition: background 0.3s; }
+ [type="checkbox"].modal + div .card .modal-close:before {
+ display: block;
+ content: '\00D7';
+ color: var(--modal-close-color);
+ position: relative;
+ font-family: sans-serif;
+ font-size: 1.75rem;
+ line-height: 1;
+ text-align: center; }
+ [type="checkbox"].modal + div .card .modal-close:hover, [type="checkbox"].modal + div .card .modal-close:focus {
+ background: var(--modal-close-hover-color); }
+ [type="checkbox"].modal:checked + div {
+ display: flex;
+ flex: 0 1 auto;
+ z-index: 1200; }
+ [type="checkbox"].modal:checked + div .card .modal-close {
+ z-index: 1211; }
+
+:root {
+ --collapse-label-back-color: #e8e8e8;
+ --collapse-label-fore-color: #212121;
+ --collapse-label-hover-back-color: #f0f0f0;
+ --collapse-selected-label-back-color: #ececec;
+ --collapse-border-color: #ddd;
+ --collapse-content-back-color: #fafafa;
+ --collapse-selected-label-border-color: #0277bd; }
+
+.collapse {
+ width: calc(100% - 2 * var(--universal-margin));
+ opacity: 1;
+ display: flex;
+ flex-direction: column;
+ margin: var(--universal-margin);
+ border-radius: var(--universal-border-radius); }
+ .collapse > [type="radio"], .collapse > [type="checkbox"] {
+ height: 1px;
+ width: 1px;
+ margin: -1px;
+ overflow: hidden;
+ position: absolute;
+ clip: rect(0 0 0 0);
+ -webkit-clip-path: inset(100%);
+ clip-path: inset(100%); }
+ .collapse > label {
+ flex-grow: 1;
+ display: inline-block;
+ height: 1.5rem;
+ cursor: pointer;
+ transition: background 0.3s;
+ color: var(--collapse-label-fore-color);
+ background: var(--collapse-label-back-color);
+ border: 0.0625rem solid var(--collapse-border-color);
+ padding: calc(1.5 * var(--universal-padding)); }
+ .collapse > label:hover, .collapse > label:focus {
+ background: var(--collapse-label-hover-back-color); }
+ .collapse > label + div {
+ flex-basis: auto;
+ height: 1px;
+ width: 1px;
+ margin: -1px;
+ overflow: hidden;
+ position: absolute;
+ clip: rect(0 0 0 0);
+ -webkit-clip-path: inset(100%);
+ clip-path: inset(100%);
+ transition: max-height 0.3s;
+ max-height: 1px; }
+ .collapse > :checked + label {
+ background: var(--collapse-selected-label-back-color);
+ border-bottom-color: var(--collapse-selected-label-border-color); }
+ .collapse > :checked + label + div {
+ box-sizing: border-box;
+ position: relative;
+ width: 100%;
+ height: auto;
+ overflow: auto;
+ margin: 0;
+ background: var(--collapse-content-back-color);
+ border: 0.0625rem solid var(--collapse-border-color);
+ border-top: 0;
+ padding: var(--universal-padding);
+ clip: auto;
+ -webkit-clip-path: inset(0%);
+ clip-path: inset(0%);
+ max-height: 850px; }
+ .collapse > label:not(:first-of-type) {
+ border-top: 0; }
+ .collapse > label:first-of-type {
+ border-radius: var(--universal-border-radius) var(--universal-border-radius) 0 0; }
+ .collapse > label:last-of-type:not(:first-of-type) {
+ border-radius: 0 0 var(--universal-border-radius) var(--universal-border-radius); }
+ .collapse > label:last-of-type:first-of-type {
+ border-radius: var(--universal-border-radius); }
+ .collapse > :checked:last-of-type:not(:first-of-type) + label {
+ border-radius: 0; }
+ .collapse > :checked:last-of-type + label + div {
+ border-radius: 0 0 var(--universal-border-radius) var(--universal-border-radius); }
+
+/*
+ Custom elements for contextual background elements, toasts and tooltips.
+*/
+mark.secondary {
+ --mark-back-color: #d32f2f; }
+
+mark.tertiary {
+ --mark-back-color: #308732; }
+
+mark.tag {
+ padding: calc(var(--universal-padding)/2) var(--universal-padding);
+ border-radius: 1em; }
+
+/*
+ Definitions for progress elements and spinners.
+*/
+/* Progess module CSS variable definitions */
+:root {
+ --progress-back-color: #ddd;
+ --progress-fore-color: #555; }
+
+progress {
+ display: block;
+ vertical-align: baseline;
+ -webkit-appearance: none;
+ -moz-appearance: none;
+ appearance: none;
+ height: 0.75rem;
+ width: calc(100% - 2 * var(--universal-margin));
+ margin: var(--universal-margin);
+ border: 0;
+ border-radius: calc(2 * var(--universal-border-radius));
+ background: var(--progress-back-color);
+ color: var(--progress-fore-color); }
+ progress::-webkit-progress-value {
+ background: var(--progress-fore-color);
+ border-top-left-radius: calc(2 * var(--universal-border-radius));
+ border-bottom-left-radius: calc(2 * var(--universal-border-radius)); }
+ progress::-webkit-progress-bar {
+ background: var(--progress-back-color); }
+ progress::-moz-progress-bar {
+ background: var(--progress-fore-color);
+ border-top-left-radius: calc(2 * var(--universal-border-radius));
+ border-bottom-left-radius: calc(2 * var(--universal-border-radius)); }
+ progress[value="1000"]::-webkit-progress-value {
+ border-radius: calc(2 * var(--universal-border-radius)); }
+ progress[value="1000"]::-moz-progress-bar {
+ border-radius: calc(2 * var(--universal-border-radius)); }
+ progress.inline {
+ display: inline-block;
+ vertical-align: middle;
+ width: 60%; }
+
+:root {
+ --spinner-back-color: #ddd;
+ --spinner-fore-color: #555; }
+
+@keyframes spinner-donut-anim {
+ 0% {
+ transform: rotate(0deg); }
+ 100% {
+ transform: rotate(360deg); } }
+.spinner {
+ display: inline-block;
+ margin: var(--universal-margin);
+ border: 0.25rem solid var(--spinner-back-color);
+ border-left: 0.25rem solid var(--spinner-fore-color);
+ border-radius: 50%;
+ width: 1.25rem;
+ height: 1.25rem;
+ animation: spinner-donut-anim 1.2s linear infinite; }
+
+/*
+ Custom elements for progress bars and spinners.
+*/
+progress.primary {
+ --progress-fore-color: #1976d2; }
+
+progress.secondary {
+ --progress-fore-color: #d32f2f; }
+
+progress.tertiary {
+ --progress-fore-color: #308732; }
+
+.spinner.primary {
+ --spinner-fore-color: #1976d2; }
+
+.spinner.secondary {
+ --spinner-fore-color: #d32f2f; }
+
+.spinner.tertiary {
+ --spinner-fore-color: #308732; }
+
+/*
+ Definitions for icons - powered by Feather (https://feathericons.com/).
+*/
+span[class^='icon-'] {
+ display: inline-block;
+ height: 1em;
+ width: 1em;
+ vertical-align: -0.125em;
+ background-size: contain;
+ margin: 0 calc(var(--universal-margin) / 4); }
+ span[class^='icon-'].secondary {
+ -webkit-filter: invert(25%);
+ filter: invert(25%); }
+ span[class^='icon-'].inverse {
+ -webkit-filter: invert(100%);
+ filter: invert(100%); }
+
+span.icon-alert {
+ background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%23111' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Ccircle cx='12' cy='12' r='10'%3E%3C/circle%3E%3Cline x1='12' y1='8' x2='12' y2='12'%3E%3C/line%3E%3Cline x1='12' y1='16' x2='12' y2='16'%3E%3C/line%3E%3C/svg%3E"); }
+span.icon-bookmark {
+ background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%23111' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M19 21l-7-5-7 5V5a2 2 0 0 1 2-2h10a2 2 0 0 1 2 2z'%3E%3C/path%3E%3C/svg%3E"); }
+span.icon-calendar {
+ background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%23111' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Crect x='3' y='4' width='18' height='18' rx='2' ry='2'%3E%3C/rect%3E%3Cline x1='16' y1='2' x2='16' y2='6'%3E%3C/line%3E%3Cline x1='8' y1='2' x2='8' y2='6'%3E%3C/line%3E%3Cline x1='3' y1='10' x2='21' y2='10'%3E%3C/line%3E%3C/svg%3E"); }
+span.icon-credit {
+ background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%23111' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Crect x='1' y='4' width='22' height='16' rx='2' ry='2'%3E%3C/rect%3E%3Cline x1='1' y1='10' x2='23' y2='10'%3E%3C/line%3E%3C/svg%3E"); }
+span.icon-edit {
+ background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%23111' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M20 14.66V20a2 2 0 0 1-2 2H4a2 2 0 0 1-2-2V6a2 2 0 0 1 2-2h5.34'%3E%3C/path%3E%3Cpolygon points='18 2 22 6 12 16 8 16 8 12 18 2'%3E%3C/polygon%3E%3C/svg%3E"); }
+span.icon-link {
+ background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%23111' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M18 13v6a2 2 0 0 1-2 2H5a2 2 0 0 1-2-2V8a2 2 0 0 1 2-2h6'%3E%3C/path%3E%3Cpolyline points='15 3 21 3 21 9'%3E%3C/polyline%3E%3Cline x1='10' y1='14' x2='21' y2='3'%3E%3C/line%3E%3C/svg%3E"); }
+span.icon-help {
+ background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%23111' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M9.09 9a3 3 0 0 1 5.83 1c0 2-3 3-3 3'%3E%3C/path%3E%3Ccircle cx='12' cy='12' r='10'%3E%3C/circle%3E%3Cline x1='12' y1='17' x2='12' y2='17'%3E%3C/line%3E%3C/svg%3E"); }
+span.icon-home {
+ background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%23111' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M3 9l9-7 9 7v11a2 2 0 0 1-2 2H5a2 2 0 0 1-2-2z'%3E%3C/path%3E%3Cpolyline points='9 22 9 12 15 12 15 22'%3E%3C/polyline%3E%3C/svg%3E"); }
+span.icon-info {
+ background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%23111' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Ccircle cx='12' cy='12' r='10'%3E%3C/circle%3E%3Cline x1='12' y1='16' x2='12' y2='12'%3E%3C/line%3E%3Cline x1='12' y1='8' x2='12' y2='8'%3E%3C/line%3E%3C/svg%3E"); }
+span.icon-lock {
+ background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%23111' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Crect x='3' y='11' width='18' height='11' rx='2' ry='2'%3E%3C/rect%3E%3Cpath d='M7 11V7a5 5 0 0 1 10 0v4'%3E%3C/path%3E%3C/svg%3E"); }
+span.icon-mail {
+ background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%23111' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M4 4h16c1.1 0 2 .9 2 2v12c0 1.1-.9 2-2 2H4c-1.1 0-2-.9-2-2V6c0-1.1.9-2 2-2z'%3E%3C/path%3E%3Cpolyline points='22,6 12,13 2,6'%3E%3C/polyline%3E%3C/svg%3E"); }
+span.icon-location {
+ background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%23111' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M21 10c0 7-9 13-9 13s-9-6-9-13a9 9 0 0 1 18 0z'%3E%3C/path%3E%3Ccircle cx='12' cy='10' r='3'%3E%3C/circle%3E%3C/svg%3E"); }
+span.icon-phone {
+ background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%23111' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M22 16.92v3a2 2 0 0 1-2.18 2 19.79 19.79 0 0 1-8.63-3.07 19.5 19.5 0 0 1-6-6 19.79 19.79 0 0 1-3.07-8.67A2 2 0 0 1 4.11 2h3a2 2 0 0 1 2 1.72 12.84 12.84 0 0 0 .7 2.81 2 2 0 0 1-.45 2.11L8.09 9.91a16 16 0 0 0 6 6l1.27-1.27a2 2 0 0 1 2.11-.45 12.84 12.84 0 0 0 2.81.7A2 2 0 0 1 22 16.92z'%3E%3C/path%3E%3C/svg%3E"); }
+span.icon-rss {
+ background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%23111' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M4 11a9 9 0 0 1 9 9'%3E%3C/path%3E%3Cpath d='M4 4a16 16 0 0 1 16 16'%3E%3C/path%3E%3Ccircle cx='5' cy='19' r='1'%3E%3C/circle%3E%3C/svg%3E"); }
+span.icon-search {
+ background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%23111' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Ccircle cx='11' cy='11' r='8'%3E%3C/circle%3E%3Cline x1='21' y1='21' x2='16.65' y2='16.65'%3E%3C/line%3E%3C/svg%3E"); }
+span.icon-settings {
+ background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%23111' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Ccircle cx='12' cy='12' r='3'%3E%3C/circle%3E%3Cpath d='M19.4 15a1.65 1.65 0 0 0 .33 1.82l.06.06a2 2 0 0 1 0 2.83 2 2 0 0 1-2.83 0l-.06-.06a1.65 1.65 0 0 0-1.82-.33 1.65 1.65 0 0 0-1 1.51V21a2 2 0 0 1-2 2 2 2 0 0 1-2-2v-.09A1.65 1.65 0 0 0 9 19.4a1.65 1.65 0 0 0-1.82.33l-.06.06a2 2 0 0 1-2.83 0 2 2 0 0 1 0-2.83l.06-.06a1.65 1.65 0 0 0 .33-1.82 1.65 1.65 0 0 0-1.51-1H3a2 2 0 0 1-2-2 2 2 0 0 1 2-2h.09A1.65 1.65 0 0 0 4.6 9a1.65 1.65 0 0 0-.33-1.82l-.06-.06a2 2 0 0 1 0-2.83 2 2 0 0 1 2.83 0l.06.06a1.65 1.65 0 0 0 1.82.33H9a1.65 1.65 0 0 0 1-1.51V3a2 2 0 0 1 2-2 2 2 0 0 1 2 2v.09a1.65 1.65 0 0 0 1 1.51 1.65 1.65 0 0 0 1.82-.33l.06-.06a2 2 0 0 1 2.83 0 2 2 0 0 1 0 2.83l-.06.06a1.65 1.65 0 0 0-.33 1.82V9a1.65 1.65 0 0 0 1.51 1H21a2 2 0 0 1 2 2 2 2 0 0 1-2 2h-.09a1.65 1.65 0 0 0-1.51 1z'%3E%3C/path%3E%3C/svg%3E"); }
+span.icon-share {
+ background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%23111' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Ccircle cx='18' cy='5' r='3'%3E%3C/circle%3E%3Ccircle cx='6' cy='12' r='3'%3E%3C/circle%3E%3Ccircle cx='18' cy='19' r='3'%3E%3C/circle%3E%3Cline x1='8.59' y1='13.51' x2='15.42' y2='17.49'%3E%3C/line%3E%3Cline x1='15.41' y1='6.51' x2='8.59' y2='10.49'%3E%3C/line%3E%3C/svg%3E"); }
+span.icon-cart {
+ background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%23111' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Ccircle cx='9' cy='21' r='1'%3E%3C/circle%3E%3Ccircle cx='20' cy='21' r='1'%3E%3C/circle%3E%3Cpath d='M1 1h4l2.68 13.39a2 2 0 0 0 2 1.61h9.72a2 2 0 0 0 2-1.61L23 6H6'%3E%3C/path%3E%3C/svg%3E"); }
+span.icon-upload {
+ background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%23111' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M21 15v4a2 2 0 0 1-2 2H5a2 2 0 0 1-2-2v-4'%3E%3C/path%3E%3Cpolyline points='17 8 12 3 7 8'%3E%3C/polyline%3E%3Cline x1='12' y1='3' x2='12' y2='15'%3E%3C/line%3E%3C/svg%3E"); }
+span.icon-user {
+ background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%23111' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M20 21v-2a4 4 0 0 0-4-4H8a4 4 0 0 0-4 4v2'%3E%3C/path%3E%3Ccircle cx='12' cy='7' r='4'%3E%3C/circle%3E%3C/svg%3E"); }
+
+/*
+ Definitions for utilities and helper classes.
+*/
+/* Utility module CSS variable definitions */
+:root {
+ --generic-border-color: rgba(0, 0, 0, 0.3);
+ --generic-box-shadow: 0 0.25rem 0.25rem 0 rgba(0, 0, 0, 0.125), 0 0.125rem 0.125rem -0.125rem rgba(0, 0, 0, 0.25); }
+
+.hidden {
+ display: none !important; }
+
+.visually-hidden {
+ position: absolute !important;
+ width: 1px !important;
+ height: 1px !important;
+ margin: -1px !important;
+ border: 0 !important;
+ padding: 0 !important;
+ clip: rect(0 0 0 0) !important;
+ -webkit-clip-path: inset(100%) !important;
+ clip-path: inset(100%) !important;
+ overflow: hidden !important; }
+
+.bordered {
+ border: 0.0625rem solid var(--generic-border-color) !important; }
+
+.rounded {
+ border-radius: var(--universal-border-radius) !important; }
+
+.circular {
+ border-radius: 50% !important; }
+
+.shadowed {
+ box-shadow: var(--generic-box-shadow) !important; }
+
+.responsive-margin {
+ margin: calc(var(--universal-margin) / 4) !important; }
+ @media screen and (min-width: 500px) {
+ .responsive-margin {
+ margin: calc(var(--universal-margin) / 2) !important; } }
+ @media screen and (min-width: 1280px) {
+ .responsive-margin {
+ margin: var(--universal-margin) !important; } }
+
+.responsive-padding {
+ padding: calc(var(--universal-padding) / 4) !important; }
+ @media screen and (min-width: 500px) {
+ .responsive-padding {
+ padding: calc(var(--universal-padding) / 2) !important; } }
+ @media screen and (min-width: 1280px) {
+ .responsive-padding {
+ padding: var(--universal-padding) !important; } }
+
+@media screen and (max-width: 499px) {
+ .hidden-sm {
+ display: none !important; } }
+@media screen and (min-width: 500px) and (max-width: 1279px) {
+ .hidden-md {
+ display: none !important; } }
+@media screen and (min-width: 1280px) {
+ .hidden-lg {
+ display: none !important; } }
+@media screen and (max-width: 499px) {
+ .visually-hidden-sm {
+ position: absolute !important;
+ width: 1px !important;
+ height: 1px !important;
+ margin: -1px !important;
+ border: 0 !important;
+ padding: 0 !important;
+ clip: rect(0 0 0 0) !important;
+ -webkit-clip-path: inset(100%) !important;
+ clip-path: inset(100%) !important;
+ overflow: hidden !important; } }
+@media screen and (min-width: 500px) and (max-width: 1279px) {
+ .visually-hidden-md {
+ position: absolute !important;
+ width: 1px !important;
+ height: 1px !important;
+ margin: -1px !important;
+ border: 0 !important;
+ padding: 0 !important;
+ clip: rect(0 0 0 0) !important;
+ -webkit-clip-path: inset(100%) !important;
+ clip-path: inset(100%) !important;
+ overflow: hidden !important; } }
+@media screen and (min-width: 1280px) {
+ .visually-hidden-lg {
+ position: absolute !important;
+ width: 1px !important;
+ height: 1px !important;
+ margin: -1px !important;
+ border: 0 !important;
+ padding: 0 !important;
+ clip: rect(0 0 0 0) !important;
+ -webkit-clip-path: inset(100%) !important;
+ clip-path: inset(100%) !important;
+ overflow: hidden !important; } }
+
+/*# sourceMappingURL=mini-default.css.map */
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+/**
+ ******************************************************************************
+ * @file st25dv.c
+ * @author MMY Application Team
+ * @brief This file provides set of driver functions to manage communication
+ * between BSP and ST25DV chip.
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2016 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ ******************************************************************************
+ */
+
+/* Includes ------------------------------------------------------------------*/
+#include "st25dv.h"
+
+
+/** @addtogroup BSP
+ * @{
+ */
+
+/** @defgroup ST25DV ST25DV driver
+ * @brief This module implements the functions to drive the ST25DV NFC dynamic tag.
+ * @details As recommended by the STM32 Cube methodology, this driver provides a standard structure to expose the NFC tag standard API.\n
+ * It also provides an extended API through its extended driver structure.\n
+ * To be usable on any MCU, this driver calls several IOBus functions.
+ * The IOBus functions are implemented outside this driver, and are in charge of accessing the MCU peripherals used for the communication with the tag.
+ * @{
+ */
+
+/* External variables --------------------------------------------------------*/
+/* Private typedef -----------------------------------------------------------*/
+/* Private defines -----------------------------------------------------------*/
+
+
+/* Private macros ------------------------------------------------------------*/
+/* Private function prototypes -----------------------------------------------*/
+static int32_t ReadRegWrap(void *Handle, uint16_t Reg, uint8_t *pData, uint16_t Length);
+static int32_t WriteRegWrap(void *Handle, uint16_t Reg, const uint8_t *pData, uint16_t Length);
+static int32_t ST25DV_Init( ST25DV_Object_t* );
+static int32_t ST25DV_ReadID(ST25DV_Object_t* pObj, uint8_t * const pICRef );
+static int32_t ST25DV_IsDeviceReady(ST25DV_Object_t* pObj, const uint32_t Trials );
+static int32_t ST25DV_GetGPOStatus(ST25DV_Object_t* pObj, uint16_t * const pGPOStatus );
+static int32_t ST25DV_ConfigureGPO(ST25DV_Object_t* pObj, const uint16_t ITConf );
+static int32_t ST25DV_ReadData(ST25DV_Object_t* pObj, uint8_t * const pData, const uint16_t TarAddr, const uint16_t NbByte );
+static int32_t ST25DV_WriteData(ST25DV_Object_t* pObj, const uint8_t * const pData, const uint16_t TarAddr, const uint16_t NbByte );
+
+/* Global variables ---------------------------------------------------------*/
+/**
+ * @brief Standard NFC tag driver API for the ST25DV.
+ * @details Provides a generic way to access the ST25DV implementation of the NFC tag standard driver functions.
+ */
+ST25DV_Drv_t St25Dv_Drv =
+{
+ ST25DV_Init,
+ ST25DV_ReadID,
+ ST25DV_IsDeviceReady,
+ ST25DV_GetGPOStatus,
+ ST25DV_ConfigureGPO,
+ ST25DV_ReadData,
+ ST25DV_WriteData,
+};
+
+
+/* Public functions ---------------------------------------------------------*/
+
+/**
+ * @brief Register Component Bus IO operations
+ * @param pObj the device pObj
+ * @retval 0 in case of success, an error code otherwise
+ */
+int32_t ST25DV_RegisterBusIO (ST25DV_Object_t* pObj, ST25DV_IO_t *pIO)
+{
+ int32_t ret = ST25DV_OK;
+
+ if (pObj == NULL)
+ {
+ ret = ST25DV_ERROR;
+ }
+ else
+ {
+ pObj->IO.Init = pIO->Init;
+ pObj->IO.DeInit = pIO->DeInit;
+ pObj->IO.Write = pIO->Write;
+ pObj->IO.Read = pIO->Read;
+ pObj->IO.IsReady = pIO->IsReady;
+ pObj->IO.GetTick = pIO->GetTick;
+
+ pObj->Ctx.ReadReg = ReadRegWrap;
+ pObj->Ctx.WriteReg = WriteRegWrap;
+ pObj->Ctx.handle = pObj;
+
+ if (pObj->IO.Init == NULL)
+ {
+ ret = ST25DV_ERROR;
+ }
+ else
+ {
+ if (pObj->IO.Init() != 0)
+ {
+ ret = ST25DV_ERROR;
+ }
+ }
+ }
+
+ return ret;
+}
+
+/**
+ * @brief ST25DV nfctag Initialization.
+ * @param pObj the device pObj
+ * @retval Component error status.
+ */
+static int32_t ST25DV_Init( ST25DV_Object_t *pObj )
+{
+ int32_t status = ST25DV_OK;
+ if (pObj->IsInitialized == 0U)
+ {
+ uint8_t nfctag_id;
+ ST25DV_ReadID(pObj,&nfctag_id);
+ if( (nfctag_id != I_AM_ST25DV04) && (nfctag_id != I_AM_ST25DV64) )
+ {
+ status = ST25DV_ERROR;
+ } else {
+ pObj->IsInitialized = 1U;
+ }
+ }
+
+ return status;
+}
+
+
+/**
+ * @brief Reads the ST25DV ID.
+ * @param pObj the device pObj
+ * @param pICRef Pointeron a uint8_t used to return the ST25DV ID.
+ * @retval Component error status.
+ */
+static int32_t ST25DV_ReadID(ST25DV_Object_t* pObj, uint8_t * const pICRef )
+{
+ /* Read ICRef on device */
+ return st25dv_get_icref(&(pObj->Ctx), pICRef);
+}
+
+/**
+ * @brief Checks the ST25DV availability.
+ * @param pObj the device pObj
+ * @details The ST25DV I2C is NACKed when a RF communication is on-going.
+ * This function determines if the ST25DV is ready to answer an I2C request.
+ * @param Trials Max number of tentative.
+ * @retval Component error status.
+ */
+static int32_t ST25DV_IsDeviceReady(ST25DV_Object_t* pObj, const uint32_t Trials )
+{
+ /* Test communication with device */
+ return pObj->IO.IsReady(ST25DV_ADDR_DATA_I2C, Trials );
+}
+
+/**
+ * @brief Reads the ST25DV GPO configuration.
+ * @param pObj the device pObj
+ * @param pGPOStatus Pointer on a uint16_t used to return the current GPO consiguration, as:
+ * - RFUSERSTATE = 0x01
+ * - RFBUSY = 0x02
+ * - RFINTERRUPT = 0x04
+ * - FIELDFALLING = 0x08
+ * - FIELDRISING = 0x10
+ * - RFPUTMSG = 0x20
+ * - RFGETMSG = 0x40
+ * - RFWRITE = 0x80
+ *
+ * @retval Component error status.
+ */
+static int32_t ST25DV_GetGPOStatus(ST25DV_Object_t* pObj, uint16_t * const pGPOStatus )
+{
+ uint8_t reg_value;
+ int32_t status;
+
+ /* Read value of GPO register */
+ status = st25dv_get_gpo_all(&(pObj->Ctx), ®_value);
+ if( status == ST25DV_OK )
+ {
+ /* Extract GPO configuration */
+ *pGPOStatus = (uint16_t)reg_value;
+ }
+ return status;
+}
+
+/**
+ * @brief Configures the ST25DV GPO.
+ * @details Needs the I2C Password presentation to be effective.
+ * @param pObj the device pObj
+ * @param ITConf Provides the GPO configuration to apply:
+ * - RFUSERSTATE = 0x01
+ * - RFBUSY = 0x02
+ * - RFINTERRUPT = 0x04
+ * - FIELDFALLING = 0x08
+ * - FIELDRISING = 0x10
+ * - RFPUTMSG = 0x20
+ * - RFGETMSG = 0x40
+ * - RFWRITE = 0x80
+ *
+ * @retval Component error status.
+ */
+static int32_t ST25DV_ConfigureGPO(ST25DV_Object_t* pObj, const uint16_t ITConf )
+{
+ /* Write GPO configuration to register */
+ return st25dv_set_gpo_all( &(pObj->Ctx), (uint8_t *)&ITConf);
+}
+
+/**
+ * @brief Reads N bytes of Data, starting from the specified I2C address.
+ * @param pObj the device pObj
+ * @param pData Pointer used to return the read data.
+ * @param TarAddr I2C data memory address to read.
+ * @param NbByte Number of bytes to be read.
+ * @retval Component error status.
+ */
+static int32_t ST25DV_ReadData(ST25DV_Object_t* pObj, uint8_t * const pData, const uint16_t TarAddr, const uint16_t NbByte )
+{
+ /* Read Data in user memory */
+ return pObj->IO.Read(ST25DV_ADDR_DATA_I2C, TarAddr, pData, NbByte );
+}
+
+/**
+ * @brief Writes N bytes of Data starting from the specified I2C Address.
+ * @param pObj the device pObj
+ * @param pData Pointer on the data to be written.
+ * @param TarAddr I2C data memory address to be written.
+ * @param NbByte Number of bytes to be written.
+ * @retval Component error status.
+ */
+static int32_t ST25DV_WriteData(ST25DV_Object_t* pObj, const uint8_t * const pData, const uint16_t TarAddr, const uint16_t NbByte )
+{
+ int32_t ret;
+ uint16_t split_data_nb;
+ const uint8_t *pdata_index = (const uint8_t *)pData;
+ uint16_t bytes_to_write = NbByte;
+ uint16_t mem_addr = TarAddr;
+
+ /* ST25DV can write a maximum of 256 bytes in EEPROM per i2c communication */
+ do
+ {
+ /* Split write if data to write is superior of max write bytes for ST25DV */
+ if( bytes_to_write > ST25DV_MAX_WRITE_BYTE )
+ {
+ /* DataSize higher than max page write, copy data by page */
+ split_data_nb = (uint16_t)ST25DV_MAX_WRITE_BYTE;
+ }
+ else
+ {
+ /* DataSize lower or equal to max page write, copy only last bytes */
+ split_data_nb = bytes_to_write;
+ }
+ /* Write split_data_nb bytes in memory */
+ ret = pObj->IO.Write( ST25DV_ADDR_DATA_I2C, mem_addr, pdata_index, split_data_nb);
+
+ if( ret == ST25DV_OK )
+ {
+ int32_t pollstatus;
+ /* Poll until EEPROM is available */
+ uint32_t tickstart = pObj->IO.GetTick();
+ /* Wait until ST25DV is ready or timeout occurs */
+ do
+ {
+ pollstatus = pObj->IO.IsReady( ST25DV_ADDR_DATA_I2C, 1 );
+ } while( ( (uint32_t)((int32_t)pObj->IO.GetTick() - (int32_t)tickstart) < ST25DV_WRITE_TIMEOUT) && (pollstatus != ST25DV_OK) );
+
+ if( pollstatus != ST25DV_OK )
+ {
+ ret = ST25DV_TIMEOUT;
+ }
+ }
+
+ /* update index, dest address, size for next write */
+ pdata_index += split_data_nb;
+ mem_addr += split_data_nb;
+ bytes_to_write -= split_data_nb;
+ }
+ while( ( bytes_to_write > 0 ) && ( ret == ST25DV_OK ) );
+
+ return ret;
+}
+
+/**
+ * @brief Reads the ST25DV IC Revision.
+ * @param pObj the device pObj
+ * @param pICRev Pointer on the uint8_t used to return the ST25DV IC Revision number.
+ * @retval Component error status.
+ */
+int32_t ST25DV_ReadICRev(ST25DV_Object_t* pObj, uint8_t * const pICRev )
+{
+ /* Read ICRev on device */
+ return st25dv_get_icrev(&(pObj->Ctx), pICRev);
+}
+
+
+/**
+ * @brief Reads the ST25DV ITtime duration for the GPO pulses.
+ * @param pObj the device pObj
+ * @param pITtime Pointer used to return the coefficient for the GPO Pulse duration (Pulse duration = 302,06 us - ITtime * 512 / fc).
+ * @retval Component error status.
+ */
+int32_t ST25DV_ReadITPulse(ST25DV_Object_t* pObj, ST25DV_PULSE_DURATION * const pITtime )
+{
+ uint8_t reg_value;
+ int32_t status;
+
+ /* Read ITtime register value */
+ status = st25dv_get_ittime_delay( &(pObj->Ctx), ®_value);
+ if( status == ST25DV_OK )
+ {
+ /* Extract delay coefficient value */
+ *pITtime = (ST25DV_PULSE_DURATION)reg_value;
+ }
+ return status;
+}
+
+/**
+ * @brief Configures the ST25DV ITtime duration for the GPO pulse.
+ * @details Needs the I2C Password presentation to be effective.
+ * @param pObj the device pObj
+ * @param ITtime Coefficient for the Pulse duration to be written (Pulse duration = 302,06 us - ITtime * 512 / fc)
+ * @retval Component error status.
+ */
+int32_t ST25DV_WriteITPulse( ST25DV_Object_t* pObj, const ST25DV_PULSE_DURATION ITtime )
+{
+ uint8_t reg_value;
+
+ /* prepare data to write */
+ reg_value = (uint8_t)ITtime;
+
+ /* Write value for ITtime register */
+ return st25dv_set_ittime_delay( &(pObj->Ctx), ®_value );
+}
+
+
+/**
+ * @brief Reads N bytes from Registers, starting at the specified I2C address.
+ * @param pObj the device pObj
+ * @param pData Pointer used to return the read data.
+ * @param TarAddr I2C memory address to be read.
+ * @param NbByte Number of bytes to be read.
+ * @retval Component error status.
+ */
+int32_t ST25DV_ReadRegister(ST25DV_Object_t* pObj, uint8_t * const pData, const uint16_t TarAddr, const uint16_t NbByte )
+{
+ /* Read Data in system memory */
+ return pObj->IO.Read( ST25DV_ADDR_SYST_I2C, TarAddr, pData, NbByte );
+}
+
+/**
+ * @brief Writes N bytes to the specified register.
+ * @param pObj the device pObj
+ * @details Needs the I2C Password presentation to be effective.
+ * @param pData Pointer on the data to be written.
+ * @param TarAddr I2C register address to written.
+ * @param NbByte Number of bytes to be written.
+ * @retval Component error status.
+*/
+int32_t ST25DV_WriteRegister(ST25DV_Object_t* pObj, const uint8_t * const pData, const uint16_t TarAddr, const uint16_t NbByte )
+{
+ int32_t ret;
+ uint8_t split_data_nb;
+ uint16_t bytes_to_write = NbByte;
+ uint16_t mem_addr = TarAddr;
+ const uint8_t *pdata_index = (const uint8_t *)pData;
+
+ /* ST25DV can write a maximum of 256 bytes in EEPROM per i2c communication */
+ do
+ {
+ /* Split write if data to write is superior of max write bytes for ST25DV */
+ if( bytes_to_write > ST25DV_MAX_WRITE_BYTE )
+ {
+ /* DataSize higher than max page write, copy data by page */
+ split_data_nb = (uint8_t)ST25DV_MAX_WRITE_BYTE;
+ }
+ else
+ {
+ /* DataSize lower or equal to max page write, copy only last bytes */
+ split_data_nb = bytes_to_write;
+ }
+ /* Write split_data_nb bytes in register */
+ ret = pObj->IO.Write( ST25DV_ADDR_SYST_I2C, mem_addr, pdata_index, split_data_nb);
+ if( ret == ST25DV_OK )
+ {
+ int32_t pollstatus;
+ /* Poll until EEPROM is available */
+ uint32_t tickstart = pObj->IO.GetTick();
+ /* Wait until ST25DV is ready or timeout occurs */
+ do
+ {
+ pollstatus = pObj->IO.IsReady( ST25DV_ADDR_DATA_I2C, 1 );
+ } while( ( (uint32_t)((int32_t)pObj->IO.GetTick() - (int32_t)tickstart) < ST25DV_WRITE_TIMEOUT) && (pollstatus != ST25DV_OK) );
+
+ if( pollstatus != ST25DV_OK )
+ {
+ ret = ST25DV_TIMEOUT;
+ }
+ }
+
+ /* update index, dest address, size for next write */
+ pdata_index += split_data_nb;
+ mem_addr += split_data_nb;
+ bytes_to_write -= split_data_nb;
+ }
+ while( ( bytes_to_write > 0 ) && ( ret == ST25DV_OK ) );
+
+ return ret;
+}
+
+/**
+ * @brief Reads the ST25DV UID.
+ * @param pObj the device pObj
+ * @param pUid Pointer used to return the ST25DV UID value.
+ * @retval Component error status.
+ */
+int32_t ST25DV_ReadUID(ST25DV_Object_t* pObj, ST25DV_UID * const pUid )
+{
+ uint8_t reg_value[8];
+ uint8_t i;
+ int32_t status;
+
+ /* Read value of UID registers */
+ status = st25dv_get_uid( &(pObj->Ctx), reg_value);
+ if( status == ST25DV_OK )
+ {
+ /* Store information in 2 WORD */
+ pUid->MsbUid = 0;
+
+ for( i = 0; i < 4; i++ )
+ {
+ pUid->MsbUid = (pUid->MsbUid << 8) | reg_value[7 - i];
+ }
+
+ pUid->LsbUid = 0;
+
+ for( i = 0; i < 4; i++ )
+ {
+ pUid->LsbUid = (pUid->LsbUid << 8) | reg_value[3 - i];
+ }
+ }
+ return status;
+}
+
+/**
+ * @brief Reads the ST25DV DSFID.
+ * @param pObj the device pObj
+ * @param pDsfid Pointer used to return the ST25DV DSFID value.
+ * @retval Component error status.
+ */
+int32_t ST25DV_ReadDSFID(ST25DV_Object_t* pObj, uint8_t * const pDsfid )
+{
+ /* Read DSFID register */
+ return st25dv_get_dsfid(&(pObj->Ctx), pDsfid);
+}
+
+/**
+ * @brief Reads the ST25DV DSFID RF Lock state.
+ * @param pObj the device pObj
+ * @param pLockDsfid Pointer on a ST25DV_LOCK_STATUS used to return the DSFID lock state.
+ * @retval Component error status.
+ */
+int32_t ST25DV_ReadDsfidRFProtection(ST25DV_Object_t* pObj, ST25DV_LOCK_STATUS * const pLockDsfid )
+{
+ uint8_t reg_value;
+ int32_t status;
+
+ /* Read register */
+ status = st25dv_get_lockdsfid(&(pObj->Ctx), ®_value );
+ if( status == ST25DV_OK )
+ {
+
+ /* Extract Lock Status */
+ if( reg_value == 0 )
+ {
+ *pLockDsfid = ST25DV_UNLOCKED;
+ }
+ else
+ {
+ *pLockDsfid = ST25DV_LOCKED;
+ }
+ }
+ return status;
+}
+
+/**
+ * @brief Reads the ST25DV AFI.
+ * @param pObj the device pObj
+ * @param pAfi Pointer used to return the ST25DV AFI value.
+ * @retval Component error status.
+ */
+int32_t ST25DV_ReadAFI(ST25DV_Object_t* pObj, uint8_t * const pAfi )
+{
+ /* Read AFI register */
+ return st25dv_get_afi(&(pObj->Ctx), pAfi);
+}
+
+/**
+ * @brief Reads the AFI RF Lock state.
+ * @param pObj the device pObj
+ * @param pLockAfi Pointer on a ST25DV_LOCK_STATUS used to return the ASFID lock state.
+ * @retval Component error status.
+ */
+int32_t ST25DV_ReadAfiRFProtection(ST25DV_Object_t* pObj, ST25DV_LOCK_STATUS * const pLockAfi )
+{
+ uint8_t reg_value;
+ int32_t status;
+
+ /* Read register */
+ status = st25dv_get_lockafi( &(pObj->Ctx), ®_value);
+ if( status == ST25DV_OK )
+ {
+
+ /* Extract Lock Status */
+ if( reg_value == 0 )
+ {
+ *pLockAfi = ST25DV_UNLOCKED;
+ }
+ else
+ {
+ *pLockAfi = ST25DV_LOCKED;
+ }
+ }
+ return status;
+}
+
+/**
+ * @brief Reads the I2C Protected Area state.
+ * @param pObj the device pObj
+ * @param pProtZone Pointer on a ST25DV_I2C_PROT_ZONE structure used to return the Protected Area state.
+ * @retval Component error status.
+ */
+int32_t ST25DV_ReadI2CProtectZone(ST25DV_Object_t* pObj, ST25DV_I2C_PROT_ZONE * const pProtZone )
+{
+ uint8_t reg_value;
+ int32_t status;
+
+ /* Read value of I2c Protected Zone register */
+ status = st25dv_get_i2css_all( &(pObj->Ctx), ®_value);
+ if( status == ST25DV_OK )
+ {
+
+ /* Dispatch information to corresponding struct member */
+ pProtZone->ProtectZone1 = (ST25DV_PROTECTION_CONF)( (reg_value & ST25DV_I2CSS_PZ1_MASK) >> ST25DV_I2CSS_PZ1_SHIFT );
+ pProtZone->ProtectZone2 = (ST25DV_PROTECTION_CONF)( (reg_value & ST25DV_I2CSS_PZ2_MASK) >> ST25DV_I2CSS_PZ2_SHIFT );
+ pProtZone->ProtectZone3 = (ST25DV_PROTECTION_CONF)( (reg_value & ST25DV_I2CSS_PZ3_MASK) >> ST25DV_I2CSS_PZ3_SHIFT );
+ pProtZone->ProtectZone4 = (ST25DV_PROTECTION_CONF)( (reg_value & ST25DV_I2CSS_PZ4_MASK) >> ST25DV_I2CSS_PZ4_SHIFT );
+ }
+ return status;
+}
+
+/**
+ * @brief Sets the I2C write-protected state to an EEPROM Area.
+ * @details Needs the I2C Password presentation to be effective.
+ * @param pObj the device pObj
+ * @param Zone ST25DV_PROTECTION_ZONE value coresponding to the area to protect.
+ * @param ReadWriteProtection ST25DV_PROTECTION_CONF value corresponding to the protection to be set.
+ * @retval Component error status.
+*/
+int32_t ST25DV_WriteI2CProtectZonex(ST25DV_Object_t* pObj, const ST25DV_PROTECTION_ZONE Zone, const ST25DV_PROTECTION_CONF ReadWriteProtection )
+{
+ int32_t status;
+ uint8_t reg_value = 0;
+
+ /* Compute and update new i2c Zone Security Status */
+ switch( Zone )
+ {
+ case ST25DV_PROT_ZONE1:
+ /* Read protection is not allowed for Zone 1 */
+ reg_value = (ReadWriteProtection & 0x01);
+ status = st25dv_set_i2css_pz1( &(pObj->Ctx), ®_value);
+ break;
+ case ST25DV_PROT_ZONE2:
+ reg_value = ReadWriteProtection;
+ status = st25dv_set_i2css_pz2( &(pObj->Ctx), ®_value);
+ break;
+ case ST25DV_PROT_ZONE3:
+ reg_value = ReadWriteProtection;
+ status = st25dv_set_i2css_pz3( &(pObj->Ctx), ®_value);
+ break;
+ case ST25DV_PROT_ZONE4:
+ reg_value = ReadWriteProtection;
+ status = st25dv_set_i2css_pz4( &(pObj->Ctx), ®_value);
+ break;
+
+ default:
+ return ST25DV_ERROR;
+ }
+
+ /* Write I2CZSS register */
+ return status;
+}
+
+/**
+ * @brief Reads the CCile protection state.
+ * @param pObj the device pObj
+ * @param pLockCCFile Pointer on a ST25DV_LOCK_CCFILE value corresponding to the lock state of the CCFile.
+ * @retval Component error status.
+ */
+int32_t ST25DV_ReadLockCCFile(ST25DV_Object_t* pObj, ST25DV_LOCK_CCFILE * const pLockCCFile )
+{
+ uint8_t reg_value;
+ int32_t status;
+
+ /* Get actual LOCKCCFILE register value */
+ status = st25dv_get_lockccfile_all( &(pObj->Ctx), ®_value);
+ if( status == ST25DV_OK )
+ {
+
+ /* Extract CCFile block information */
+ if( reg_value & ST25DV_LOCKCCFILE_BLCK0_MASK )
+ {
+ pLockCCFile->LckBck0 = ST25DV_LOCKED;
+ }
+ else
+ {
+ pLockCCFile->LckBck0 = ST25DV_UNLOCKED;
+ }
+
+ if( reg_value & ST25DV_LOCKCCFILE_BLCK1_MASK )
+ {
+ pLockCCFile->LckBck1 = ST25DV_LOCKED;
+ }
+ else
+ {
+ pLockCCFile->LckBck1 = ST25DV_UNLOCKED;
+ }
+ }
+ return status;
+}
+
+/**
+ * @brief Locks the CCile to prevent any RF write access.
+ * @details Needs the I2C Password presentation to be effective.
+ * @param pObj the device pObj
+ * @param NbBlockCCFile ST25DV_CCFILE_BLOCK value corresponding to the number of blocks to be locked.
+ * @param LockCCFile ST25DV_LOCK_CCFILE value corresponding to the lock state to apply on the CCFile.
+ * @retval Component error status.
+ */
+int32_t ST25DV_WriteLockCCFile(ST25DV_Object_t* pObj, const ST25DV_CCFILE_BLOCK NbBlockCCFile, const ST25DV_LOCK_STATUS LockCCFile )
+{
+ uint8_t reg_value;
+
+ /* Configure value to write on register */
+ if( NbBlockCCFile == ST25DV_CCFILE_1BLCK )
+ {
+ if( LockCCFile == ST25DV_LOCKED )
+ {
+ reg_value = ST25DV_LOCKCCFILE_BLCK0_MASK;
+ }
+ else
+ {
+ reg_value = 0x00;
+ }
+ }
+ else
+ {
+ if( LockCCFile == ST25DV_LOCKED )
+ {
+ reg_value = ST25DV_LOCKCCFILE_BLCK0_MASK | ST25DV_LOCKCCFILE_BLCK1_MASK;
+ }
+ else
+ {
+ reg_value = 0x00;
+ }
+ }
+
+ /* Write LOCKCCFILE register */
+ return st25dv_set_lockccfile_all( &(pObj->Ctx), ®_value);
+}
+
+/**
+ * @brief Reads the Cfg registers protection.
+ * @param pObj the device pObj
+ * @param pLockCfg Pointer on a ST25DV_LOCK_STATUS value corresponding to the Cfg registers lock state.
+ * @retval Component error status.
+ */
+int32_t ST25DV_ReadLockCFG(ST25DV_Object_t* pObj, ST25DV_LOCK_STATUS * const pLockCfg )
+{
+ uint8_t reg_value;
+ int32_t status;
+
+ /* Get actual LOCKCCFILE register value */
+ status = st25dv_get_lockcfg_b0(&(pObj->Ctx), ®_value);
+ if( status == ST25DV_OK )
+ {
+
+ /* Extract LOCKCFG block information */
+ if( reg_value )
+ {
+ *pLockCfg = ST25DV_LOCKED;
+ }
+ else
+ {
+ *pLockCfg = ST25DV_UNLOCKED;
+ }
+ }
+ return status;
+}
+
+/**
+ * @brief Lock/Unlock the Cfg registers, to prevent any RF write access.
+ * @details Needs the I2C Password presentation to be effective.
+ * @param pObj the device pObj
+ * @param LockCfg ST25DV_LOCK_STATUS value corresponding to the lock state to be written.
+ * @retval Component error status.
+ */
+int32_t ST25DV_WriteLockCFG(ST25DV_Object_t* pObj, const ST25DV_LOCK_STATUS LockCfg )
+{
+ uint8_t reg_value;
+
+ /* Configure value to write on register */
+ reg_value = (uint8_t)LockCfg;
+
+ /* Write LOCKCFG register */
+ return st25dv_set_lockcfg_b0(&(pObj->Ctx), ®_value );
+}
+
+/**
+ * @brief Presents I2C password, to authorize the I2C writes to protected areas.
+ * @param pObj the device pObj
+ * @param PassWord Password value on 32bits
+ * @retval Component error status.
+ */
+int32_t ST25DV_PresentI2CPassword(ST25DV_Object_t* pObj, const ST25DV_PASSWD PassWord )
+{
+ uint8_t ai2c_message[17] = {0};
+ uint8_t i;
+
+ /* Build I2C Message with Password + Validation code 0x09 + Password */
+ ai2c_message[8] = 0x09;
+ for( i = 0; i < 4; i++ )
+ {
+ ai2c_message[i] = ( PassWord.MsbPasswd >> ( (3 - i) * 8) ) & 0xFF;
+ ai2c_message[i + 4] = ( PassWord.LsbPasswd >> ( (3 - i) * 8) ) & 0xFF;
+ ai2c_message[i + 9] = ai2c_message[i];
+ ai2c_message[i + 13] = ai2c_message[i + 4];
+ };
+
+ /* Present password to ST25DV */
+ return ST25DV_WriteRegister(pObj, ai2c_message, ST25DV_I2CPASSWD_REG, 17 );
+}
+
+/**
+ * @brief Writes a new I2C password.
+ * @details Needs the I2C Password presentation to be effective.
+ * @param pObj the device pObj
+ * @param PassWord New I2C PassWord value on 32bits.
+ * @retval Component error status.
+ */
+int32_t ST25DV_WriteI2CPassword( ST25DV_Object_t* pObj, const ST25DV_PASSWD PassWord )
+{
+ uint8_t ai2c_message[17] = {0};
+ uint8_t i;
+
+ /* Build I2C Message with Password + Validation code 0x07 + Password */
+ ai2c_message[8] = 0x07;
+
+ for( i = 0; i < 4; i++ )
+ {
+ ai2c_message[i] = ( PassWord.MsbPasswd >> ( (3 - i) * 8) ) & 0xFF;
+ ai2c_message[i + 4] = ( PassWord.LsbPasswd >> ( (3 - i) * 8) ) & 0xFF;
+ ai2c_message[i + 9] = ai2c_message[i];
+ ai2c_message[i + 13] = ai2c_message[i + 4];
+ };
+
+ /* Write new password in I2CPASSWD register */
+ return ST25DV_WriteRegister(pObj, ai2c_message, ST25DV_I2CPASSWD_REG, 17 );
+}
+
+/**
+ * @brief Reads the RF Zone Security Status (defining the allowed RF accesses).
+ * @param pObj the device pObj
+ * @param Zone ST25DV_PROTECTION_ZONE value coresponding to the protected area.
+ * @param pRfprotZone Pointer on a ST25DV_RF_PROT_ZONE value corresponding to the area protection state.
+ * @retval Component error status.
+ */
+int32_t ST25DV_ReadRFZxSS( ST25DV_Object_t* pObj, const ST25DV_PROTECTION_ZONE Zone, ST25DV_RF_PROT_ZONE * const pRfprotZone )
+{
+ uint8_t reg_value;
+ int32_t status;
+
+ /* Read actual value of Sector Security Status register */
+ switch( Zone )
+ {
+ case ST25DV_PROT_ZONE1:
+ status = st25dv_get_rfa1ss_all(&(pObj->Ctx), ®_value);
+ break;
+ case ST25DV_PROT_ZONE2:
+ status = st25dv_get_rfa2ss_all(&(pObj->Ctx), ®_value);
+ break;
+ case ST25DV_PROT_ZONE3:
+ status = st25dv_get_rfa3ss_all(&(pObj->Ctx), ®_value);
+ break;
+ case ST25DV_PROT_ZONE4:
+ status = st25dv_get_rfa4ss_all(&(pObj->Ctx), ®_value);
+ break;
+ default:
+ status = ST25DV_ERROR;
+ }
+
+ if( status == ST25DV_OK )
+ {
+ /* Extract Sector Security Status configuration */
+ pRfprotZone->PasswdCtrl = (ST25DV_PASSWD_PROT_STATUS)((reg_value & ST25DV_RFA1SS_PWDCTRL_MASK) >> ST25DV_RFA1SS_PWDCTRL_SHIFT);
+ pRfprotZone->RWprotection = (ST25DV_PROTECTION_CONF)((reg_value & ST25DV_RFA1SS_RWPROT_MASK) >> ST25DV_RFA1SS_RWPROT_SHIFT);
+ }
+ return status;
+}
+
+/**
+ * @brief Writes the RF Zone Security Status (defining the allowed RF accesses)
+ * @details Needs the I2C Password presentation to be effective.
+ * @param pObj the device pObj
+ * @param Zone ST25DV_PROTECTION_ZONE value corresponding to the area on which to set the RF protection.
+ * @param RfProtZone Pointer on a ST25DV_RF_PROT_ZONE value defininf the protection to be set on the area.
+ * @retval Component error status.
+ */
+int32_t ST25DV_WriteRFZxSS( ST25DV_Object_t* pObj, const ST25DV_PROTECTION_ZONE Zone, const ST25DV_RF_PROT_ZONE RfProtZone )
+{
+ uint8_t reg_value;
+ int32_t status;
+
+
+ /* Update Sector Security Status */
+ reg_value = (RfProtZone.RWprotection << ST25DV_RFA1SS_RWPROT_SHIFT) & ST25DV_RFA1SS_RWPROT_MASK;
+ reg_value |= ((RfProtZone.PasswdCtrl << ST25DV_RFA1SS_PWDCTRL_SHIFT) & ST25DV_RFA1SS_PWDCTRL_MASK);
+
+ /* Write Sector Security register */
+ switch( Zone )
+ {
+ case ST25DV_PROT_ZONE1:
+ status = st25dv_set_rfa1ss_all(&(pObj->Ctx), ®_value);
+ break;
+ case ST25DV_PROT_ZONE2:
+ status = st25dv_set_rfa2ss_all(&(pObj->Ctx), ®_value);
+ break;
+ case ST25DV_PROT_ZONE3:
+ status = st25dv_set_rfa3ss_all(&(pObj->Ctx), ®_value);
+ break;
+ case ST25DV_PROT_ZONE4:
+ status = st25dv_set_rfa4ss_all(&(pObj->Ctx), ®_value);
+ break;
+
+ default:
+ status = ST25DV_ERROR;
+ }
+ return status;
+}
+
+/**
+ * @brief Reads the value of the an area end address.
+ * @param pObj the device pObj
+ * @param EndZone ST25DV_END_ZONE value corresponding to an area end address.
+ * @param pEndZ Pointer used to return the end address of the area.
+ * @retval Component error status.
+ */
+int32_t ST25DV_ReadEndZonex( ST25DV_Object_t* pObj, const ST25DV_END_ZONE EndZone, uint8_t * pEndZ )
+{
+ int32_t status;
+
+ /* Read the corresponding End zone */
+ switch( EndZone )
+ {
+ case ST25DV_ZONE_END1:
+ status = st25dv_get_enda1(&(pObj->Ctx),pEndZ);
+ break;
+ case ST25DV_ZONE_END2:
+ status = st25dv_get_enda2(&(pObj->Ctx),pEndZ);
+ break;
+ case ST25DV_ZONE_END3:
+ status = st25dv_get_enda3(&(pObj->Ctx),pEndZ);
+ break;
+
+ default:
+ status = ST25DV_ERROR;
+ }
+
+ return status;
+}
+
+/**
+ * @brief Sets the end address of an area.
+ * @details Needs the I2C Password presentation to be effective.
+ * @note The ST25DV answers a NACK when setting the EndZone2 & EndZone3 to same value than repectively EndZone1 & EndZone2.\n
+ * These NACKs are ok.
+ * @param pObj the device pObj
+ * @param EndZone ST25DV_END_ZONE value corresponding to an area.
+ * @param EndZ End zone value to be written.
+ * @retval Component error status.
+ */
+int32_t ST25DV_WriteEndZonex( ST25DV_Object_t* pObj, const ST25DV_END_ZONE EndZone, const uint8_t EndZ )
+{
+ int32_t status;
+
+ /* Write the corresponding End zone value in register */
+ switch( EndZone )
+ {
+ case ST25DV_ZONE_END1:
+ status = st25dv_set_enda1(&(pObj->Ctx),&EndZ);
+ break;
+ case ST25DV_ZONE_END2:
+ status = st25dv_set_enda2(&(pObj->Ctx),&EndZ);
+ break;
+ case ST25DV_ZONE_END3:
+ status = st25dv_set_enda3(&(pObj->Ctx),&EndZ);
+ break;
+
+ default:
+ status = ST25DV_ERROR;
+ }
+
+ return status;
+}
+
+/**
+ * @brief Initializes the end address of the ST25DV areas with their default values (end of memory).
+ * @details Needs the I2C Password presentation to be effective..
+ * The ST25DV answers a NACK when setting the EndZone2 & EndZone3 to same value than repectively EndZone1 & EndZone2.
+ * These NACKs are ok.
+ * @param pObj the device pObj
+ * @retval Component error status.
+ */
+int32_t ST25DV_InitEndZone( ST25DV_Object_t* pObj )
+{
+ uint8_t endval = 0xFF;
+ uint32_t maxmemlength;
+ ST25DV_MEM_SIZE memsize;
+ int32_t ret;
+
+ memsize.Mem_Size = 0;
+ memsize.BlockSize = 0;
+
+ /* Get EEPROM mem size */
+ ST25DV_ReadMemSize(pObj, &memsize );
+ maxmemlength = (memsize.Mem_Size + 1) * (memsize.BlockSize + 1);
+
+ /* Compute Max value for endzone register */
+ endval = (maxmemlength / 32) - 1;
+
+ /* Write EndZone value to ST25DV registers */
+ ret = ST25DV_WriteEndZonex(pObj, ST25DV_ZONE_END3, endval );
+ if( (ret == ST25DV_OK) || (ret == ST25DV_NACK) )
+ {
+ ret = ST25DV_WriteEndZonex(pObj, ST25DV_ZONE_END2, endval );
+ if( (ret == ST25DV_OK) || (ret == ST25DV_NACK) )
+ {
+ ret = ST25DV_WriteEndZonex(pObj, ST25DV_ZONE_END1, endval );
+ }
+ }
+ return ret;
+}
+
+/**
+ * @brief Creates user areas with defined lengths.
+ * @details Needs the I2C Password presentation to be effective.
+ * @param pObj the device pObj
+ * @param Zone1Length Length of area1 in bytes (32 to 8192, 0x20 to 0x2000)
+ * @param Zone2Length Length of area2 in bytes (0 to 8128, 0x00 to 0x1FC0)
+ * @param Zone3Length Length of area3 in bytes (0 to 8064, 0x00 to 0x1F80)
+ * @param Zone4Length Length of area4 in bytes (0 to 8000, 0x00 to 0x1F40)
+ * @retval Component error status.
+ */
+int32_t ST25DV_CreateUserZone( ST25DV_Object_t* pObj, uint16_t Zone1Length, uint16_t Zone2Length, uint16_t Zone3Length, uint16_t Zone4Length )
+{
+ uint8_t EndVal;
+ ST25DV_MEM_SIZE memsize;
+ uint16_t maxmemlength = 0;
+ int32_t ret = ST25DV_OK;
+
+ memsize.Mem_Size = 0;
+ memsize.BlockSize = 0;
+
+ ST25DV_ReadMemSize(pObj, &memsize );
+
+ maxmemlength = (memsize.Mem_Size + 1) * (memsize.BlockSize + 1);
+
+ /* Checks that values of different zones are in bounds */
+ if( ( Zone1Length < 32 ) || ( Zone1Length > maxmemlength ) || ( Zone2Length > (maxmemlength - 32) )
+ || ( Zone3Length > (maxmemlength - 64) ) || ( Zone4Length > (maxmemlength - 96) ) )
+ {
+ ret = ST25DV_ERROR;
+ }
+
+ /* Checks that the total is less than the authorised maximum */
+ if( ( Zone1Length + Zone2Length + Zone3Length + Zone4Length ) > maxmemlength )
+ {
+ ret = ST25DV_ERROR;
+ }
+
+ if ( ret == ST25DV_OK)
+ {
+ /* if The value for each Length is not a multiple of 64 correct it. */
+ if( (Zone1Length % 32) != 0 )
+ {
+ Zone1Length = Zone1Length - ( Zone1Length % 32 );
+ }
+
+ if( (Zone2Length % 32) != 0 )
+ {
+ Zone2Length = Zone2Length - ( Zone2Length % 32 );
+ }
+
+ if( (Zone3Length % 32) != 0 )
+ {
+ Zone3Length = Zone3Length - ( Zone3Length % 32 );
+ }
+
+ /* First right 0xFF in each Endx value */
+ ret = ST25DV_InitEndZone( pObj);
+ if( (ret == ST25DV_OK) || (ret == ST25DV_NACK) )
+ {
+ /* Then Write corresponding value for each zone */
+ EndVal = (uint8_t)( (Zone1Length / 32 ) - 1 );
+ ret = ST25DV_WriteEndZonex(pObj, ST25DV_ZONE_END1, EndVal );
+ if( (ret == ST25DV_OK) || (ret == ST25DV_NACK) )
+ {
+
+ EndVal = (uint8_t)( ((Zone1Length + Zone2Length) / 32 ) - 1 );
+ ret = ST25DV_WriteEndZonex(pObj, ST25DV_ZONE_END2, EndVal );
+ if( (ret == ST25DV_OK) || (ret == ST25DV_NACK) )
+ {
+ EndVal = (uint8_t)( ((Zone1Length + Zone2Length + Zone3Length) / 32 ) - 1 );
+ ret = ST25DV_WriteEndZonex(pObj, ST25DV_ZONE_END3, EndVal );
+ }
+ }
+ }
+ }
+ return ret;
+}
+
+/**
+ * @brief Reads the ST25DV Memory Size.
+ * @param pObj the device pObj
+ * @param pSizeInfo Pointer on a ST25DV_MEM_SIZE structure used to return the Memory size information.
+ * @retval Component error status.
+ */
+int32_t ST25DV_ReadMemSize( ST25DV_Object_t* pObj, ST25DV_MEM_SIZE * const pSizeInfo )
+{
+ uint8_t memsize_msb;
+ uint8_t memsize_lsb;
+ int32_t status;
+
+ /* Read actual value of MEM_SIZE register */
+ status = st25dv_get_mem_size_lsb(&(pObj->Ctx), &memsize_lsb);
+ if( status == ST25DV_OK )
+ {
+ status = st25dv_get_mem_size_msb(&(pObj->Ctx), &memsize_msb);
+ if( status == ST25DV_OK )
+ {
+ status = st25dv_get_blk_size(&(pObj->Ctx), &(pSizeInfo->BlockSize));
+ if( status == ST25DV_OK )
+ {
+ /* Extract Memory information */
+ pSizeInfo->Mem_Size = memsize_msb;
+ pSizeInfo->Mem_Size = (pSizeInfo->Mem_Size << 8) |memsize_lsb;
+ }
+ }
+ }
+ return status;
+}
+
+/**
+ * @brief Reads the Energy harvesting mode.
+ * @param pObj the device pObj
+ * @param pEH_mode Pointer on a ST25DV_EH_MODE_STATUS value corresponding to the Energy Harvesting state.
+ * @retval Component error status.
+ */
+int32_t ST25DV_ReadEHMode( ST25DV_Object_t* pObj, ST25DV_EH_MODE_STATUS * const pEH_mode )
+{
+ uint8_t reg_value;
+ int32_t status;
+
+ /* Read actual value of EH_MODE register */
+ status = st25dv_get_eh_mode( &(pObj->Ctx), ®_value);
+ if( status == ST25DV_OK )
+ {
+ /* Extract EH_mode configuration */
+ if( reg_value )
+ {
+ *pEH_mode = ST25DV_EH_ON_DEMAND;
+ }
+ else
+ {
+ *pEH_mode = ST25DV_EH_ACTIVE_AFTER_BOOT;
+ }
+ }
+
+ return status;
+}
+
+/**
+ * @brief Sets the Energy harvesting mode.
+ * @details Needs the I2C Password presentation to be effective.
+ * @param pObj the device pObj
+ * @param EH_mode ST25DV_EH_MODE_STATUS value for the Energy harvesting mode to be set.
+ * @retval Component error status.
+ */
+int32_t ST25DV_WriteEHMode( ST25DV_Object_t* pObj, const ST25DV_EH_MODE_STATUS EH_mode )
+{
+ uint8_t reg_value;
+
+ /* Update EH_mode */
+ reg_value = (uint8_t)EH_mode;
+
+ /* Write EH_MODE register */
+ return st25dv_set_eh_mode(&(pObj->Ctx), ®_value);
+}
+
+/**
+ * @brief Reads the RF Management configuration.
+ * @param pObj the device pObj
+ * @param pRF_Mngt Pointer on a ST25DV_RF_MNGT structure used to return the RF Management configuration.
+ * @retval Component error status.
+ */
+int32_t ST25DV_ReadRFMngt( ST25DV_Object_t* pObj, ST25DV_RF_MNGT * const pRF_Mngt )
+{
+ int32_t status;
+ uint8_t reg_value = 0;
+
+ /* Read actual value of RF_MNGT register */
+ status = st25dv_get_rf_mngt_all(&(pObj->Ctx), ®_value);
+
+ if( status == ST25DV_OK )
+ {
+ /* Extract RF Disable information */
+ if( (reg_value & ST25DV_RF_MNGT_RFDIS_MASK) == ST25DV_RF_MNGT_RFDIS_MASK )
+ {
+ pRF_Mngt->RfDisable = ST25DV_ENABLE;
+ }
+ else
+ {
+ pRF_Mngt->RfDisable = ST25DV_DISABLE;
+ }
+
+ /* Extract RF Sleep information */
+ if( (reg_value & ST25DV_RF_MNGT_RFSLEEP_MASK) == ST25DV_RF_MNGT_RFSLEEP_MASK )
+ {
+ pRF_Mngt->RfSleep = ST25DV_ENABLE;
+ }
+ else
+ {
+ pRF_Mngt->RfSleep = ST25DV_DISABLE;
+ }
+ }
+
+ return status;
+}
+
+/**
+ * @brief Sets the RF Management configuration.
+ * @details Needs the I2C Password presentation to be effective.
+ * @param pObj the device pObj
+ * @param Rfmngt Value of the RF Management configuration to be written.
+ * @retval Component error status.
+ */
+int32_t ST25DV_WriteRFMngt( ST25DV_Object_t* pObj, const uint8_t Rfmngt )
+{
+ /* Write RF_MNGT register */
+ return st25dv_set_rf_mngt_all(&(pObj->Ctx), &Rfmngt);
+}
+
+/**
+ * @brief Reads the RFDisable register information.
+ * @param pRFDisable Pointer on a ST25DV_EN_STATUS value corresponding to the RF Disable status.
+ * @retval Component error status.
+ */
+int32_t ST25DV_GetRFDisable( ST25DV_Object_t* pObj, ST25DV_EN_STATUS * const pRFDisable )
+{
+ int32_t status;
+ uint8_t reg_value = 0;
+
+ /* Read actual value of RF_MNGT register */
+ status = st25dv_get_rf_mngt_rfdis(&(pObj->Ctx), ®_value);
+
+ /* Extract RFDisable information */
+ if( status == ST25DV_OK )
+ {
+ if( reg_value )
+ {
+ *pRFDisable = ST25DV_ENABLE;
+ }
+ else
+ {
+ *pRFDisable = ST25DV_DISABLE;
+ }
+ }
+
+ return status;
+}
+
+/**
+ * @brief Sets the RF Disable configuration.
+ * @details Needs the I2C Password presentation to be effective.
+ * @param pObj the device pObj
+ * @retval Component error status.
+ */
+int32_t ST25DV_SetRFDisable( ST25DV_Object_t* pObj )
+{
+ uint8_t reg_value = 1;
+
+ /* Write RF_MNGT register */
+ return st25dv_set_rf_mngt_rfdis(&(pObj->Ctx), ®_value);
+}
+
+/**
+ * @brief Resets the RF Disable configuration
+ * @details Needs the I2C Password presentation to be effective.
+ * @param pObj the device pObj
+ * @retval Component error status.
+ */
+int32_t ST25DV_ResetRFDisable( ST25DV_Object_t* pObj )
+{
+ uint8_t reg_value = 0;
+
+ /* Write RF_MNGT register */
+ return st25dv_set_rf_mngt_rfdis(&(pObj->Ctx), ®_value);
+}
+
+/**
+ * @brief Reads the RFSleep register information.
+ * @param pObj the device pObj
+ * @param pRFSleep Pointer on a ST25DV_EN_STATUS value corresponding to the RF Sleep status.
+ * @retval Component error status.
+ */
+int32_t ST25DV_GetRFSleep( ST25DV_Object_t* pObj, ST25DV_EN_STATUS * const pRFSleep )
+{
+ int32_t status;
+ uint8_t reg_value = 0;
+
+
+ /* Read actual value of RF_MNGT register */
+ status = st25dv_get_rf_mngt_rfsleep(&(pObj->Ctx), ®_value);
+
+ /* Extract RFDisable information */
+ if( status == ST25DV_OK )
+ {
+ if( reg_value )
+ {
+ *pRFSleep = ST25DV_ENABLE;
+ }
+ else
+ {
+ *pRFSleep = ST25DV_DISABLE;
+ }
+ }
+
+ return status;
+}
+
+/**
+ * @brief Sets the RF Sleep configuration.
+ * @details Needs the I2C Password presentation to be effective.
+ * @param pObj the device pObj
+ * @retval Component error status.
+ */
+int32_t ST25DV_SetRFSleep(ST25DV_Object_t* pObj )
+{
+ uint8_t reg_value = 1;
+
+ /* Write RF_MNGT register */
+ return st25dv_set_rf_mngt_rfsleep(&(pObj->Ctx), ®_value);
+}
+
+/**
+ * @brief Resets the RF Sleep configuration.
+ * @details Needs the I2C Password presentation to be effective.
+ * @param pObj the device pObj
+ * @retval Component error status.
+ */
+int32_t ST25DV_ResetRFSleep( ST25DV_Object_t* pObj )
+{
+ uint8_t reg_value = 0;
+
+ /* Write RF_MNGT register */
+ return st25dv_set_rf_mngt_rfsleep(&(pObj->Ctx), ®_value);
+}
+
+/**
+ * @brief Reads the Mailbox mode.
+ * @param pObj the device pObj
+ * @param pMB_mode Pointer on a ST25DV_EH_MODE_STATUS value used to return the Mailbox mode.
+ * @retval Component error status.
+ */
+int32_t ST25DV_ReadMBMode( ST25DV_Object_t* pObj, ST25DV_EN_STATUS * const pMB_mode )
+{
+ uint8_t reg_value;
+ int32_t status;
+
+ /* Read actual value of MB_MODE register */
+ status = st25dv_get_mb_mode_rw(&(pObj->Ctx), ®_value);
+ if( status == ST25DV_OK )
+ {
+ /* Extract Mailbox mode status */
+ if( reg_value )
+ {
+ *pMB_mode = ST25DV_ENABLE;
+ }
+ else
+ {
+ *pMB_mode = ST25DV_DISABLE;
+ }
+ }
+ return status;
+}
+
+/**
+ * @brief Sets the Mailbox mode.
+ * @details Needs the I2C Password presentation to be effective.
+ * @param pObj the device pObj
+ * @param MB_mode ST25DV_EN_STATUS value corresponding to the Mailbox mode to be set.
+ * @retval Component error status.
+ */
+int32_t ST25DV_WriteMBMode( ST25DV_Object_t* pObj, const ST25DV_EN_STATUS MB_mode )
+{
+ uint8_t reg_value;
+ int32_t status;
+ /* Update Mailbox mode status */
+ reg_value = (uint8_t)MB_mode;
+
+ /* Write MB_MODE register */
+ status = st25dv_set_mb_mode_rw(&(pObj->Ctx), ®_value);
+
+ return status;
+}
+
+/**
+ * @brief Reads the Mailbox watchdog duration coefficient.
+ * @param pObj the device pObj
+ * @param pWdgDelay Pointer on a uint8_t used to return the watchdog duration coefficient.
+ * @retval Component error status.
+ */
+int32_t ST25DV_ReadMBWDG( ST25DV_Object_t* pObj, uint8_t * const pWdgDelay )
+{
+ /* Read actual value of MB_WDG register */
+ return st25dv_get_mb_wdg_delay(&(pObj->Ctx), pWdgDelay);
+}
+
+/**
+ * @brief Writes the Mailbox watchdog coefficient delay
+ * @details Needs the I2C Password presentation to be effective.
+ * @param pObj the device pObj
+ * @param WdgDelay Watchdog duration coefficient to be written (Watch dog duration = MB_WDG*30 ms +/- 6%).
+ * @retval Component error status.
+ */
+int32_t ST25DV_WriteMBWDG( ST25DV_Object_t* pObj, const uint8_t WdgDelay )
+{
+ /* Write MB_WDG register */
+ return st25dv_set_mb_wdg_delay(&(pObj->Ctx), &WdgDelay);
+}
+
+/**
+ * @brief Reads N bytes of data from the Mailbox, starting at the specified byte offset.
+ * @param pObj the device pObj
+ * @param pData Pointer on the buffer used to return the read data.
+ * @param Offset Offset in the Mailbox memory, byte number to start the read.
+ * @param NbByte Number of bytes to be read.
+ * @retval Component error status.
+ */
+int32_t ST25DV_ReadMailboxData( ST25DV_Object_t* pObj, uint8_t * const pData, const uint16_t Offset, const uint16_t NbByte )
+{
+ int32_t status = ST25DV_ERROR;
+ if( Offset <= ST25DV_MAX_MAILBOX_LENGTH )
+ {
+ status = pObj->IO.Read( ST25DV_ADDR_DATA_I2C, ST25DV_MAILBOX_RAM_REG + Offset, pData, NbByte );
+ }
+ /* Read Data in user memory */
+ return status;
+}
+
+/**
+ * @brief Writes N bytes of data in the Mailbox, starting from first Mailbox Address.
+ * @param pObj the device pObj
+ * @param pData Pointer to the buffer containing the data to be written.
+ * @param NbByte Number of bytes to be written.
+ * @retval Component error status.
+ */
+int32_t ST25DV_WriteMailboxData( ST25DV_Object_t* pObj, const uint8_t * const pData, const uint16_t NbByte )
+{
+ int32_t status = ST25DV_ERROR;
+
+ /* ST25DV can write a maximum of 256 bytes in Mailbox */
+ if( NbByte <= ST25DV_MAX_MAILBOX_LENGTH )
+ {
+ /* Write NbByte data in memory */
+ status = pObj->IO.Write( ST25DV_ADDR_DATA_I2C, ST25DV_MAILBOX_RAM_REG, pData, NbByte );
+ }
+
+ return status;
+}
+
+/**
+ * @brief Reads N bytes from the mailbox registers, starting at the specified I2C address.
+ * @param pObj the device pObj
+ * @param pData Pointer on the buffer used to return the data.
+ * @param TarAddr I2C memory address to be read.
+ * @param NbByte Number of bytes to be read.
+ * @retval Component error status.
+ */
+int32_t ST25DV_ReadMailboxRegister( ST25DV_Object_t* pObj, uint8_t * const pData, const uint16_t TarAddr, const uint16_t NbByte )
+{
+ int32_t status = ST25DV_ERROR;
+ if( (TarAddr >= ST25DV_GPO_DYN_REG) && (TarAddr <= ST25DV_MBLEN_DYN_REG) )
+ {
+ status = pObj->IO.Read( ST25DV_ADDR_DATA_I2C, TarAddr,pData, NbByte);
+ }
+
+ return status;
+}
+
+/**
+ * @brief Writes N bytes to the specified mailbox register.
+ * @param pObj the device pObj
+ * @param pData Pointer on the data to be written.
+ * @param TarAddr I2C register address to be written.
+ * @param NbByte Number of bytes to be written.
+ * @retval Component error status.
+ */
+int32_t ST25DV_WriteMailboxRegister( ST25DV_Object_t* pObj, const uint8_t * const pData, const uint16_t TarAddr, const uint16_t NbByte )
+{
+ int32_t status = ST25DV_ERROR;
+ if( (TarAddr >= ST25DV_GPO_DYN_REG) && (TarAddr <= ST25DV_MBLEN_DYN_REG) )
+ {
+ status = pObj->IO.Write( ST25DV_ADDR_DATA_I2C, TarAddr,pData, NbByte);
+ }
+
+ /* Write NbByte data in memory */
+ return status;
+}
+
+/**
+ * @brief Reads the status of the security session open register.
+ * @param pObj the device pObj
+ * @param pSession Pointer on a ST25DV_I2CSSO_STATUS value used to return the session status.
+ * @retval Component error status.
+ */
+int32_t ST25DV_ReadI2CSecuritySession_Dyn( ST25DV_Object_t* pObj, ST25DV_I2CSSO_STATUS * const pSession )
+{
+ uint8_t reg_value;
+ int32_t status;
+
+ /* Read actual value of I2C_SSO_DYN register */
+ status = st25dv_get_i2c_sso_dyn_i2csso(&(pObj->Ctx), ®_value);
+ if( status == ST25DV_OK )
+ {
+
+ /* Extract Open session information */
+ if( reg_value )
+ {
+ *pSession = ST25DV_SESSION_OPEN;
+ }
+ else
+ {
+ *pSession = ST25DV_SESSION_CLOSED;
+ }
+ }
+ return status;
+}
+
+/**
+ * @brief Reads the IT status register from the ST25DV.
+ * @param pObj the device pObj
+ * @param pITStatus Pointer on uint8_t, used to return the IT status, such as:
+ * - RFUSERSTATE = 0x01
+ * - RFBUSY = 0x02
+ * - RFINTERRUPT = 0x04
+ * - FIELDFALLING = 0x08
+ * - FIELDRISING = 0x10
+ * - RFPUTMSG = 0x20
+ * - RFGETMSG = 0x40
+ * - RFWRITE = 0x80
+ *
+ * @retval Component error status.
+ */
+int32_t ST25DV_ReadITSTStatus_Dyn( ST25DV_Object_t* pObj, uint8_t * const pITStatus )
+{
+ /* Read value of ITStatus register */
+ return st25dv_get_itsts_dyn_all(&(pObj->Ctx), pITStatus );
+}
+
+/**
+ * @brief Read value of dynamic GPO register configuration.
+ * @param pObj the device pObj
+ * @param pGPO ST25DV_GPO pointer of the dynamic GPO configuration to store.
+ * @retval Component error status.
+ */
+int32_t ST25DV_ReadGPO_Dyn( ST25DV_Object_t* pObj, uint8_t *GPOConfig )
+{
+ /* Read actual value of ST25DV_GPO_DYN_REG register */
+ return st25dv_get_gpo_dyn_all(&(pObj->Ctx), GPOConfig);
+}
+
+/**
+ * @brief Get dynamique GPO enable status
+ * @param pObj the device pObj
+ * @param pGPO_en ST25DV_EN_STATUS pointer of the GPO enable status to store
+ * @retval Component error status.
+ */
+int32_t ST25DV_GetGPO_en_Dyn( ST25DV_Object_t* pObj, ST25DV_EN_STATUS * const pGPO_en )
+{
+ uint8_t reg_value;
+ int32_t status;
+
+ /* Read actual value of GPO_DYN register */
+ status = st25dv_get_gpo_dyn_enable(&(pObj->Ctx), ®_value);
+ if( status == ST25DV_OK )
+ {
+ /* Extract GPO enable status information */
+ if( reg_value )
+ {
+ *pGPO_en = ST25DV_ENABLE;
+ }
+ else
+ {
+ *pGPO_en = ST25DV_DISABLE;
+ }
+ }
+ return status;
+}
+
+/**
+ * @brief Set dynamique GPO enable configuration.
+ * @param pObj the device pObj
+ * @param None No parameters.
+ * @retval Component error status.
+ */
+int32_t ST25DV_SetGPO_en_Dyn( ST25DV_Object_t* pObj )
+{
+ uint8_t reg_value = 1;
+
+ /* Write GPO_DYN Register */
+ return st25dv_set_gpo_dyn_enable(&(pObj->Ctx), ®_value);
+}
+
+/**
+ * @brief Reset dynamique GPO enable configuration.
+ * @param pObj the device pObj
+ * @param None No parameters.
+ * @retval Component error status.
+ */
+int32_t ST25DV_ResetGPO_en_Dyn( ST25DV_Object_t* pObj )
+{
+ uint8_t reg_value = 0;
+
+ /* Write GPO_DYN Register */
+ return st25dv_set_gpo_dyn_enable(&(pObj->Ctx), ®_value);
+}
+
+/**
+ * @brief Read value of dynamic EH Ctrl register configuration
+ * @param pObj the device pObj
+ * @param pEH_CTRL : ST25DV_EH_CTRL pointer of the dynamic EH Ctrl configuration to store
+ * @retval Component error status.
+ */
+int32_t ST25DV_ReadEHCtrl_Dyn( ST25DV_Object_t* pObj, ST25DV_EH_CTRL * const pEH_CTRL )
+{
+ int32_t status;
+ uint8_t reg_value = 0;
+
+ /* Read actual value of ST25DV_EH_CTRL_DYN_REG register */
+ status = st25dv_get_eh_ctrl_dyn_all(&(pObj->Ctx), ®_value);
+
+ if( status == ST25DV_OK )
+ {
+ /* Extract EH EN Mode configuration */
+ if( (reg_value & ST25DV_EH_CTRL_DYN_EH_EN_MASK) == ST25DV_EH_CTRL_DYN_EH_EN_MASK )
+ {
+ pEH_CTRL->EH_EN_Mode = ST25DV_ENABLE;
+ }
+ else
+ {
+ pEH_CTRL->EH_EN_Mode = ST25DV_DISABLE;
+ }
+
+ /* Extract EH_ON configuration */
+ if( (reg_value & ST25DV_EH_CTRL_DYN_EH_ON_MASK) == ST25DV_EH_CTRL_DYN_EH_ON_MASK )
+ {
+ pEH_CTRL->EH_on = ST25DV_ENABLE;
+ }
+ else
+ {
+ pEH_CTRL->EH_on = ST25DV_DISABLE;
+ }
+
+ /* Extract FIELD_ON configuration */
+ if( (reg_value & ST25DV_EH_CTRL_DYN_FIELD_ON_MASK) == ST25DV_EH_CTRL_DYN_FIELD_ON_MASK )
+ {
+ pEH_CTRL->Field_on = ST25DV_ENABLE;
+ }
+ else
+ {
+ pEH_CTRL->Field_on = ST25DV_DISABLE;
+ }
+
+ /* Extract VCC_ON configuration */
+ if( (reg_value & ST25DV_EH_CTRL_DYN_VCC_ON_MASK) == ST25DV_EH_CTRL_DYN_VCC_ON_MASK )
+ {
+ pEH_CTRL->VCC_on = ST25DV_ENABLE;
+ }
+ else
+ {
+ pEH_CTRL->VCC_on = ST25DV_DISABLE;
+ }
+ }
+
+ return status;
+}
+
+/**
+ * @brief Reads the Energy Harvesting dynamic status.
+ * @param pObj the device pObj
+ * @param pEH_Val Pointer on a ST25DV_EN_STATUS value used to return the Energy Harvesting dynamic status.
+ * @retval Component error status.
+ */
+int32_t ST25DV_GetEHENMode_Dyn( ST25DV_Object_t* pObj, ST25DV_EN_STATUS * const pEH_Val )
+{
+ uint8_t reg_value;
+ int32_t status;
+
+ /* Read actual value of EH_CTRL_DYN register */
+ status = st25dv_get_eh_ctrl_dyn_eh_en(&(pObj->Ctx), ®_value);
+ if( status == ST25DV_OK )
+ {
+
+ /* Extract Energy Harvesting status information */
+ if( reg_value )
+ {
+ *pEH_Val = ST25DV_ENABLE;
+ }
+ else
+ {
+ *pEH_Val = ST25DV_DISABLE;
+ }
+ }
+ return status;
+}
+
+/**
+ * @brief Dynamically sets the Energy Harvesting mode.
+ * @param pObj the device pObj
+ * @retval Component error status.
+ */
+int32_t ST25DV_SetEHENMode_Dyn( ST25DV_Object_t* pObj )
+{
+ uint8_t reg_value = 1;
+
+ /* Write EH_CTRL_DYN Register */
+ return st25dv_set_eh_ctrl_dyn_eh_en(&(pObj->Ctx), ®_value);
+}
+
+/**
+ * @brief Dynamically unsets the Energy Harvesting mode.
+ * @param pObj the device pObj
+ * @retval Component error status.
+ */
+int32_t ST25DV_ResetEHENMode_Dyn( ST25DV_Object_t* pObj )
+{
+ uint8_t reg_value = 0;
+
+ /* Write EH_CTRL_DYN Register */
+ return st25dv_set_eh_ctrl_dyn_eh_en(&(pObj->Ctx), ®_value);
+}
+
+/**
+ * @brief Reads the EH_ON status from the EH_CTRL_DYN register.
+ * @param pObj the device pObj
+ * @param pEHON Pointer on a ST25DV_EN_STATUS value used to return the EHON status.
+ * @retval Component error status.
+ */
+int32_t ST25DV_GetEHON_Dyn( ST25DV_Object_t* pObj, ST25DV_EN_STATUS * const pEHON )
+{
+ int32_t status;
+ uint8_t reg_value = 0;
+
+ /* Read actual value of EH_CTRL_DYN register */
+ status = st25dv_get_eh_ctrl_dyn_eh_on(&(pObj->Ctx), ®_value);
+
+ /* Extract RF Field information */
+ if( status == ST25DV_OK )
+ {
+ if( reg_value )
+ {
+ *pEHON = ST25DV_ENABLE;
+ }
+ else
+ {
+ *pEHON = ST25DV_DISABLE;
+ }
+ }
+
+ return status;
+}
+
+/**
+ * @brief Checks if RF Field is present in front of the ST25DV.
+ * @param pObj the device pObj
+ * @param pRF_Field Pointer on a ST25DV_FIELD_STATUS value used to return the field presence.
+ * @retval Component error status.
+ */
+int32_t ST25DV_GetRFField_Dyn( ST25DV_Object_t* pObj, ST25DV_FIELD_STATUS * const pRF_Field )
+{
+ int32_t status;
+ uint8_t reg_value = 0;
+
+ /* Read actual value of EH_CTRL_DYN register */
+ status = st25dv_get_eh_ctrl_dyn_field_on(&(pObj->Ctx), ®_value );
+
+ /* Extract RF Field information */
+ if( status == ST25DV_OK )
+ {
+ if( reg_value )
+ {
+ *pRF_Field = ST25DV_FIELD_ON;
+ }
+ else
+ {
+ *pRF_Field = ST25DV_FIELD_OFF;
+ }
+ }
+
+ return status;
+}
+
+/**
+ * @brief Check if VCC is supplying the ST25DV.
+ * @param pObj the device pObj
+ * @param pVCC ST25DV_VCC_STATUS pointer of the VCC status to store
+ * @retval Component error status.
+ */
+int32_t ST25DV_GetVCC_Dyn( ST25DV_Object_t* pObj, ST25DV_VCC_STATUS * const pVCC )
+{
+ int32_t status;
+ uint8_t reg_value = 0;
+
+ /* Read actual value of EH_CTRL_DYN register */
+ status = st25dv_get_eh_ctrl_dyn_vcc_on(&(pObj->Ctx), ®_value );
+
+ /* Extract VCC information */
+ if( status == ST25DV_OK )
+ {
+ if( reg_value )
+ {
+ *pVCC = ST25DV_VCC_ON;
+ }
+ else
+ {
+ *pVCC = ST25DV_VCC_OFF;
+ }
+ }
+
+ return status;
+}
+
+/**
+ * @brief Read value of dynamic RF Management configuration
+ * @param pObj the device pObj
+ * @param pRF_Mngt : ST25DV_RF_MNGT pointer of the dynamic RF Management configuration to store
+ * @retval Component error status.
+ */
+int32_t ST25DV_ReadRFMngt_Dyn( ST25DV_Object_t* pObj, ST25DV_RF_MNGT * const pRF_Mngt )
+{
+ int32_t status;
+ uint8_t reg_value = 0;
+
+ /* Read actual value of RF_MNGT_DYN register */
+ status = st25dv_get_rf_mngt_dyn_all(&(pObj->Ctx), ®_value);
+
+ if( status == ST25DV_OK )
+ {
+ /* Extract RF Disable configuration */
+ if( (reg_value & ST25DV_RF_MNGT_DYN_RFDIS_MASK) == ST25DV_RF_MNGT_DYN_RFDIS_MASK )
+ {
+ pRF_Mngt->RfDisable = ST25DV_ENABLE;
+ }
+ else
+ {
+ pRF_Mngt->RfDisable = ST25DV_DISABLE;
+ }
+
+ /* Extract RF Sleep configuration */
+ if( (reg_value & ST25DV_RF_MNGT_DYN_RFSLEEP_MASK) == ST25DV_RF_MNGT_DYN_RFSLEEP_MASK )
+ {
+ pRF_Mngt->RfSleep = ST25DV_ENABLE;
+ }
+ else
+ {
+ pRF_Mngt->RfSleep = ST25DV_DISABLE;
+ }
+ }
+
+ return status;
+}
+
+/**
+ * @brief Writes a value to the RF Management dynamic register.
+ * @param pObj the device pObj
+ * @param RF_Mngt Value to be written to the RF Management dynamic register.
+ * @retval Component error status.
+ */
+int32_t ST25DV_WriteRFMngt_Dyn( ST25DV_Object_t* pObj, const uint8_t RF_Mngt )
+{
+ /* Write value to RF_MNGT_DYN register */
+ return st25dv_set_rf_mngt_dyn_all(&(pObj->Ctx), &RF_Mngt);
+}
+
+/**
+ * @brief Reads the RFDisable dynamic register information.
+ * @param pObj the device pObj
+ * @param pRFDisable Pointer on a ST25DV_EN_STATUS value used to return the RF Disable state.
+ * @retval Component error status.
+ */
+int32_t ST25DV_GetRFDisable_Dyn( ST25DV_Object_t* pObj, ST25DV_EN_STATUS * const pRFDisable )
+{
+ int32_t status;
+ uint8_t reg_value = 0;
+
+ /* Read actual value of RF_MNGT_DYN register */
+ status = st25dv_get_rf_mngt_dyn_rfdis(&(pObj->Ctx), ®_value);
+
+ /* Extract RFDisable information */
+ if( status == ST25DV_OK )
+ {
+ if( reg_value )
+ {
+ *pRFDisable = ST25DV_ENABLE;
+ }
+ else
+ {
+ *pRFDisable = ST25DV_DISABLE;
+ }
+ }
+
+ return status;
+}
+
+/**
+ * @brief Sets the RF Disable dynamic configuration.
+ * @param pObj the device pObj
+ * @retval Component error status.
+ */
+int32_t ST25DV_SetRFDisable_Dyn( ST25DV_Object_t* pObj )
+{
+ uint8_t reg_value = 1;
+
+ return st25dv_set_rf_mngt_dyn_rfdis(&(pObj->Ctx), ®_value);
+}
+
+/**
+ * @brief Unsets the RF Disable dynamic configuration.
+ * @param pObj the device pObj
+ * @retval Component error status.
+ */
+int32_t ST25DV_ResetRFDisable_Dyn( ST25DV_Object_t* pObj )
+{
+ uint8_t reg_value = 0;
+
+ return st25dv_set_rf_mngt_dyn_rfdis(&(pObj->Ctx), ®_value);
+}
+
+/**
+ * @brief Reads the RFSleep dynamic register information.
+ * @param pObj the device pObj
+ * @param pRFSleep Pointer on a ST25DV_EN_STATUS values used to return the RF Sleep state.
+ * @retval Component error status.
+ */
+int32_t ST25DV_GetRFSleep_Dyn( ST25DV_Object_t* pObj, ST25DV_EN_STATUS * const pRFSleep )
+{
+ int32_t status;
+ uint8_t reg_value = 0;
+
+ /* Read actual value of RF_MNGT_DYN register */
+ status = st25dv_get_rf_mngt_dyn_rfsleep(&(pObj->Ctx), ®_value);
+
+ /* Extract RFSleep information */
+ if( status == ST25DV_OK )
+ {
+ if( reg_value )
+ {
+ *pRFSleep = ST25DV_ENABLE;
+ }
+ else
+ {
+ *pRFSleep = ST25DV_DISABLE;
+ }
+ }
+
+ return status;
+}
+
+/**
+ * @brief Sets the RF Sleep dynamic configuration.
+ * @param pObj the device pObj
+ * @retval Component error status.
+ */
+int32_t ST25DV_SetRFSleep_Dyn( ST25DV_Object_t* pObj )
+{
+ uint8_t reg_value = 1;
+
+ return st25dv_set_rf_mngt_dyn_rfsleep(&(pObj->Ctx), ®_value);
+}
+
+/**
+ * @brief Unsets the RF Sleep dynamic configuration.
+ * @param pObj the device pObj
+ * @retval Component error status.
+ */
+int32_t ST25DV_ResetRFSleep_Dyn( ST25DV_Object_t* pObj )
+{
+ uint8_t reg_value = 0;
+
+ return st25dv_set_rf_mngt_dyn_rfsleep(&(pObj->Ctx), ®_value);
+}
+
+/**
+ * @brief Reads the Mailbox ctrl dynamic register.
+ * @param pObj the device pObj
+ * @param pCtrlStatus Pointer on a ST25DV_MB_CTRL_DYN_STATUS structure used to return the dynamic Mailbox ctrl information.
+ * @retval Component error status.
+ */
+int32_t ST25DV_ReadMBCtrl_Dyn( ST25DV_Object_t* pObj, ST25DV_MB_CTRL_DYN_STATUS * const pCtrlStatus )
+{
+ uint8_t reg_value;
+ int32_t status;
+
+ /* Read MB_CTRL_DYN register */
+ status = st25dv_get_mb_ctrl_dyn_all(&(pObj->Ctx), ®_value);
+ if( status == ST25DV_OK )
+ {
+ /* Extract Mailbox ctrl information */
+ pCtrlStatus->MbEnable = (reg_value & ST25DV_MB_CTRL_DYN_MBEN_MASK) >> ST25DV_MB_CTRL_DYN_MBEN_SHIFT;
+ pCtrlStatus->HostPutMsg = (reg_value & ST25DV_MB_CTRL_DYN_HOSTPUTMSG_MASK) >> ST25DV_MB_CTRL_DYN_HOSTPUTMSG_SHIFT;
+ pCtrlStatus->RfPutMsg = (reg_value & ST25DV_MB_CTRL_DYN_RFPUTMSG_MASK) >> ST25DV_MB_CTRL_DYN_RFPUTMSG_SHIFT;
+ pCtrlStatus->HostMissMsg = (reg_value & ST25DV_MB_CTRL_DYN_HOSTMISSMSG_MASK) >> ST25DV_MB_CTRL_DYN_HOSTMISSMSG_SHIFT;
+ pCtrlStatus->RFMissMsg = (reg_value & ST25DV_MB_CTRL_DYN_RFMISSMSG_MASK) >> ST25DV_MB_CTRL_DYN_RFMISSMSG_SHIFT;
+ pCtrlStatus->CurrentMsg = (ST25DV_CURRENT_MSG)((reg_value & ST25DV_MB_CTRL_DYN_CURRENTMSG_MASK) >> ST25DV_MB_CTRL_DYN_CURRENTMSG_SHIFT);
+ }
+ return status;
+}
+
+/**
+ * @brief Reads the Mailbox Enable dynamic configuration.
+ * @param pObj the device pObj
+ * @retval Component error status.
+ */
+int32_t ST25DV_GetMBEN_Dyn( ST25DV_Object_t* pObj, ST25DV_EN_STATUS * const pMBEN )
+{
+ uint8_t reg_value;
+ int32_t status;
+
+ /* Read MB_CTRL_DYN register */
+ status = st25dv_get_mb_ctrl_dyn_mben( &(pObj->Ctx),®_value );
+ if( status == ST25DV_OK )
+ {
+ if( reg_value )
+ {
+ *pMBEN = ST25DV_ENABLE;
+ }
+ else
+ {
+ *pMBEN = ST25DV_DISABLE;
+ }
+ }
+ return status;
+}
+
+/**
+ * @brief Sets the Mailbox Enable dynamic configuration.
+ * @param pObj the device pObj
+ * @retval Component error status.
+ */
+int32_t ST25DV_SetMBEN_Dyn( ST25DV_Object_t* pObj )
+{
+ uint8_t reg_value = 1;
+
+ /* Write MB_CTRL_DYN register */
+ return st25dv_set_mb_ctrl_dyn_mben( &(pObj->Ctx),®_value );
+}
+
+/**
+ * @brief Unsets the Mailbox Enable dynamic configuration.
+ * @param pObj the device pObj
+ * @retval Component error status.
+ */
+int32_t ST25DV_ResetMBEN_Dyn( ST25DV_Object_t* pObj )
+{
+ uint8_t reg_value = 0;
+
+ /* Write MB_CTRL_DYN register */
+ return st25dv_set_mb_ctrl_dyn_mben( &(pObj->Ctx),®_value );
+}
+
+/**
+ * @brief Reads the Mailbox message length dynamic register.
+ * @param pMBLength Pointer on a uint8_t used to return the Mailbox message length.
+ * @param pObj the device pObj
+ * @retval Component error status.
+ */
+int32_t ST25DV_ReadMBLength_Dyn( ST25DV_Object_t* pObj, uint8_t * const pMBLength )
+{
+ /* Read actual value of MBLEN_DYN register */
+ return st25dv_get_mblen_dyn_mblen( &(pObj->Ctx),pMBLength );
+}
+
+static int32_t ReadRegWrap(void *handle, uint16_t Reg, uint8_t* pData, uint16_t len)
+{
+ int32_t status;
+ ST25DV_Object_t *pObj = (ST25DV_Object_t *)handle;
+ if(Reg & (ST25DV_IS_DYNAMIC_REGISTER))
+ {
+ status = pObj->IO.Read(ST25DV_ADDR_DATA_I2C, Reg, pData, len);
+ } else {
+ status = pObj->IO.Read(ST25DV_ADDR_SYST_I2C, Reg, pData, len);
+ }
+ return status;
+}
+
+static int32_t WriteRegWrap(void *handle, uint16_t Reg, const uint8_t* pData, uint16_t len)
+{
+ int32_t ret;
+ ST25DV_Object_t *pObj = (ST25DV_Object_t *)handle;
+ if(Reg & (ST25DV_IS_DYNAMIC_REGISTER))
+ {
+ ret = pObj->IO.Write(ST25DV_ADDR_DATA_I2C, Reg, pData, len);
+ } else {
+ ret = pObj->IO.Write(ST25DV_ADDR_SYST_I2C, Reg, pData, len);
+ if( ret == ST25DV_OK )
+ {
+ int32_t pollstatus;
+ /* Poll until EEPROM is available */
+ uint32_t tickstart = pObj->IO.GetTick();
+ /* Wait until ST25DV is ready or timeout occurs */
+ do
+ {
+ pollstatus = pObj->IO.IsReady( ST25DV_ADDR_SYST_I2C, 1 );
+ } while( ( (uint32_t)((int32_t)pObj->IO.GetTick() - (int32_t)tickstart) < ST25DV_WRITE_TIMEOUT) && (pollstatus != ST25DV_OK) );
+
+ if( pollstatus != ST25DV_OK )
+ {
+ ret = ST25DV_TIMEOUT;
+ }
+ }
+ }
+
+ return ret;
+}
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+
+/******************* (C) COPYRIGHT 2016 STMicroelectronics *****END OF FILE****/
diff --git a/P3_SETR2/Components/st25dv/st25dv.h b/P3_SETR2/Components/st25dv/st25dv.h
new file mode 100644
index 0000000..11e8153
--- /dev/null
+++ b/P3_SETR2/Components/st25dv/st25dv.h
@@ -0,0 +1,459 @@
+/**
+ ******************************************************************************
+ * @file st25dv.h
+ * @author MMY Application Team
+ * @brief This file provides set of driver functions to manage communication
+ * @brief between MCU and ST25DV chip
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2016 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef ST25DV_H
+#define ST25DV_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "st25dv_reg.h"
+
+/** @addtogroup BSP
+ * @{
+ */
+
+
+/** @addtogroup ST25DV
+ * @{
+ */
+
+/* Exported types ------------------------------------------------------------*/
+
+/**
+ * @brief ST25DV Enable Disable enumerator definition.
+ */
+typedef enum
+{
+ ST25DV_DISABLE = 0,
+ ST25DV_ENABLE
+} ST25DV_EN_STATUS;
+
+/**
+ * @brief ST25DV Energy Harvesting mode enumerator definition.
+ */
+typedef enum
+{
+ ST25DV_EH_ACTIVE_AFTER_BOOT = 0,
+ ST25DV_EH_ON_DEMAND
+} ST25DV_EH_MODE_STATUS;
+
+/**
+ * @brief ST25DV FIELD status enumerator definition.
+ */
+typedef enum
+{
+ ST25DV_FIELD_OFF = 0,
+ ST25DV_FIELD_ON
+} ST25DV_FIELD_STATUS;
+
+/**
+ * @brief ST25DV VCC status enumerator definition
+ */
+typedef enum
+{
+ ST25DV_VCC_OFF = 0,
+ ST25DV_VCC_ON
+} ST25DV_VCC_STATUS;
+
+/**
+ * @brief ST25DV protection status enumerator definition
+ */
+typedef enum
+{
+ ST25DV_NO_PROT = 0,
+ ST25DV_WRITE_PROT,
+ ST25DV_READ_PROT,
+ ST25DV_READWRITE_PROT
+} ST25DV_PROTECTION_CONF;
+
+/**
+ * @brief ST25DV area protection enumerator definition.
+ */
+typedef enum
+{
+ ST25DV_PROT_ZONE1 = 0,
+ ST25DV_PROT_ZONE2,
+ ST25DV_PROT_ZONE3,
+ ST25DV_PROT_ZONE4
+} ST25DV_PROTECTION_ZONE;
+
+/**
+ * @brief ST25DV password protection status enumerator definition.
+ */
+typedef enum
+{
+ ST25DV_NOT_PROTECTED = 0,
+ ST25DV_PROT_PASSWD1,
+ ST25DV_PROT_PASSWD2,
+ ST25DV_PROT_PASSWD3
+} ST25DV_PASSWD_PROT_STATUS;
+
+/**
+ * @brief ST25DV lock status enumerator definition.
+ */
+typedef enum
+{
+ ST25DV_UNLOCKED = 0,
+ ST25DV_LOCKED
+} ST25DV_LOCK_STATUS;
+
+/**
+ * @brief ST25DV Number of Blocks for the CCFile enumerator definition.
+ */
+typedef enum
+{
+ ST25DV_CCFILE_1BLCK = 0,
+ ST25DV_CCFILE_2BLCK
+} ST25DV_CCFILE_BLOCK;
+
+/**
+ * @brief ST25DV session status enumerator definition.
+ */
+typedef enum
+{
+ ST25DV_SESSION_CLOSED = 0,
+ ST25DV_SESSION_OPEN
+} ST25DV_I2CSSO_STATUS;
+
+/**
+ * @brief ST25DV area end address enumerator definition.
+ */
+typedef enum
+{
+ ST25DV_ZONE_END1 = 0,
+ ST25DV_ZONE_END2,
+ ST25DV_ZONE_END3
+} ST25DV_END_ZONE;
+
+/**
+ * @brief ST25DV IT pulse duration enumerator definition.
+ */
+typedef enum
+{
+ ST25DV_302_US = 0,
+ ST25DV_264_US,
+ ST25DV_226_US,
+ ST25DV_188_US,
+ ST25DV_151_US,
+ ST25DV_113_US,
+ ST25DV_75_US,
+ ST25DV_37_US
+} ST25DV_PULSE_DURATION;
+
+/**
+ * @brief ST25DV Mailbox Current Message enumerator definition
+ */
+typedef enum
+{
+ ST25DV_NO_MSG = 0,
+ ST25DV_HOST_MSG,
+ ST25DV_RF_MSG
+} ST25DV_CURRENT_MSG;
+
+/**
+ * @brief ST25DV EH Ctrl structure definition
+ */
+typedef struct
+{
+ ST25DV_EN_STATUS EH_EN_Mode;
+ ST25DV_EN_STATUS EH_on;
+ ST25DV_EN_STATUS Field_on;
+ ST25DV_EN_STATUS VCC_on;
+} ST25DV_EH_CTRL;
+
+/**
+ * @brief ST25DV GPO structure definition
+ */
+typedef struct
+{
+ ST25DV_EN_STATUS GPO_RFUser_en;
+ ST25DV_EN_STATUS GPO_RFActivity_en;
+ ST25DV_EN_STATUS GPO_RFInterrupt_en;
+ ST25DV_EN_STATUS GPO_FieldChange_en;
+ ST25DV_EN_STATUS GPO_RFPutMsg_en;
+ ST25DV_EN_STATUS GPO_RFGetMsg_en;
+ ST25DV_EN_STATUS GPO_RFWrite_en;
+ ST25DV_EN_STATUS GPO_Enable;
+} ST25DV_GPO;
+
+/**
+ * @brief ST25DV RF Management structure definition.
+ */
+typedef struct
+{
+ ST25DV_EN_STATUS RfDisable;
+ ST25DV_EN_STATUS RfSleep;
+} ST25DV_RF_MNGT;
+
+/**
+ * @brief ST25DV RF Area protection structure definition.
+ */
+typedef struct
+{
+ ST25DV_PASSWD_PROT_STATUS PasswdCtrl;
+ ST25DV_PROTECTION_CONF RWprotection;
+} ST25DV_RF_PROT_ZONE;
+
+/**
+ * @brief ST25DV I2C Area protection structure definition.
+ */
+typedef struct
+{
+ ST25DV_PROTECTION_CONF ProtectZone1;
+ ST25DV_PROTECTION_CONF ProtectZone2;
+ ST25DV_PROTECTION_CONF ProtectZone3;
+ ST25DV_PROTECTION_CONF ProtectZone4;
+} ST25DV_I2C_PROT_ZONE;
+
+/**
+ * @brief ST25DV MB_CTRL_DYN register structure definition.
+ */
+typedef struct
+{
+ uint8_t MbEnable;
+ uint8_t HostPutMsg;
+ uint8_t RfPutMsg;
+ uint8_t HostMissMsg;
+ uint8_t RFMissMsg;
+ ST25DV_CURRENT_MSG CurrentMsg;
+} ST25DV_MB_CTRL_DYN_STATUS;
+
+/**
+ * @brief ST25DV Lock CCFile structure definition.
+ */
+typedef struct
+{
+ ST25DV_LOCK_STATUS LckBck0;
+ ST25DV_LOCK_STATUS LckBck1;
+} ST25DV_LOCK_CCFILE;
+
+/**
+ * @brief ST25DV Memory size structure definition.
+ */
+typedef struct
+{
+ uint8_t BlockSize;
+ uint16_t Mem_Size;
+} ST25DV_MEM_SIZE;
+
+/**
+ * @brief ST25DV UID information structure definition.
+ */
+typedef struct
+{
+ uint32_t MsbUid;
+ uint32_t LsbUid;
+} ST25DV_UID;
+
+/**
+ * @brief ST25DV Password structure definition.
+ */
+typedef struct
+{
+ uint32_t MsbPasswd;
+ uint32_t LsbPasswd;
+} ST25DV_PASSWD;
+
+
+typedef int32_t (*ST25DV_Init_Func) (void);
+typedef int32_t (*ST25DV_DeInit_Func) (void);
+typedef uint32_t (*ST25DV_GetTick_Func) (void);
+typedef int32_t (*ST25DV_Write_Func)(uint16_t, uint16_t, const uint8_t*, uint16_t);
+typedef int32_t (*ST25DV_Read_Func) (uint16_t, uint16_t, uint8_t*, uint16_t);
+typedef int32_t (*ST25DV_IsReady_Func) (uint16_t, const uint32_t);
+
+typedef struct {
+ ST25DV_Init_Func Init;
+ ST25DV_DeInit_Func DeInit;
+ ST25DV_IsReady_Func IsReady;
+ ST25DV_Write_Func Write;
+ ST25DV_Read_Func Read;
+ ST25DV_GetTick_Func GetTick;
+} ST25DV_IO_t;
+
+
+typedef struct {
+ ST25DV_IO_t IO ;
+ st25dv_ctx_t Ctx ;
+ uint32_t IsInitialized;
+
+} ST25DV_Object_t;
+
+
+#ifndef DOXYGEN_SHOULD_SKIP_THIS
+/**
+ * @brief NFCTAG standard driver API structure definition.
+ */
+typedef struct
+{
+ int32_t (*Init)( void* );
+ int32_t (*ReadID)( void*, uint8_t * const );
+ int32_t (*IsReady)( void*, const uint32_t );
+ int32_t (*GetITStatus)( void*, uint16_t * const );
+ int32_t (*ConfigIT)( void*, const uint16_t );
+ int32_t (*ReadData)( void*, uint8_t * const, const uint16_t, const uint16_t );
+ int32_t (*WriteData)( void*, const uint8_t * const, const uint16_t, const uint16_t );
+} NFCTAG_DrvTypeDef;
+
+typedef struct
+{
+ int32_t (*Init)( ST25DV_Object_t* );
+ int32_t (*ReadID)( ST25DV_Object_t*, uint8_t * const );
+ int32_t (*IsReady)( ST25DV_Object_t*, const uint32_t );
+ int32_t (*GetITStatus)( ST25DV_Object_t*, uint16_t * const );
+ int32_t (*ConfigIT)( ST25DV_Object_t*, const uint16_t );
+ int32_t (*ReadData)( ST25DV_Object_t*, uint8_t * const, const uint16_t, const uint16_t );
+ int32_t (*WriteData)( ST25DV_Object_t*, const uint8_t * const, const uint16_t, const uint16_t );
+} ST25DV_Drv_t;
+
+
+#endif
+
+/* Exported constants --------------------------------------------------------*/
+/** @brief ST25DV 4Kbits ICref */
+#define I_AM_ST25DV04 0x24
+/** @brief ST25DV 16/64Kbits ICref */
+#define I_AM_ST25DV64 0x26
+
+/** @brief Check ST25DV Open Drain version */
+#define ST25DV_AM_I_OPEN_DRAIN(x) (((x) == 0x26) || ((x) == 0x24))
+/** @brief Check ST25DV CMOS version */
+#define ST25DV_AM_I_CMOS(x) (((x) == 0x27) || ((x) == 0x25))
+
+
+#ifndef NULL
+#define NULL (void *) 0
+#endif
+
+/** @brief I2C address to be used for ST25DV Data accesses. */
+#define ST25DV_ADDR_DATA_I2C 0xA6
+/** @brief I2C address to be used for ST25DV System accesses. */
+#define ST25DV_ADDR_SYST_I2C 0xAE
+
+/** @brief I2C Time out (ms), min value : (Max write bytes) / (Internal page write) * tw (256/4)*5. */
+#define ST25DV_WRITE_TIMEOUT 320
+
+/** @brief Size of the ST25DV write buffer. */
+#define ST25DV_MAX_WRITE_BYTE 256
+/** @brief Size of the ST25DVMailbox memory. */
+#define ST25DV_MAX_MAILBOX_LENGTH 256
+
+/** @brief Offset of ST25DV dynamic registers. */
+#define ST25DV_IS_DYNAMIC_REGISTER 0x2000
+
+
+/* External variables --------------------------------------------------------*/
+/* NFCTAG driver structure */
+extern ST25DV_Drv_t St25Dv_Drv;
+
+/* Exported macro ------------------------------------------------------------*/
+/* Imported functions ------------------------------------------------------- */
+
+/* Exported functions ------------------------------------------------------- */
+int32_t ST25DV_ReadRegister( ST25DV_Object_t*, uint8_t * const, const uint16_t, const uint16_t );
+int32_t ST25DV_WriteRegister( ST25DV_Object_t*, const uint8_t * const, const uint16_t, const uint16_t );
+int32_t ST25DV_RegisterBusIO (ST25DV_Object_t* pObj, ST25DV_IO_t *pIO);
+int32_t ST25DV_ReadMemSize( ST25DV_Object_t* pObj, ST25DV_MEM_SIZE * const pSizeInfo );
+int32_t ST25DV_ReadICRev(ST25DV_Object_t* pObj, uint8_t * const pICRev );
+int32_t ST25DV_ReadITPulse(ST25DV_Object_t* pObj, ST25DV_PULSE_DURATION * const pITtime );
+int32_t ST25DV_WriteITPulse(ST25DV_Object_t* pObj, const ST25DV_PULSE_DURATION ITtime );
+int32_t ST25DV_ReadUID(ST25DV_Object_t* pObj, ST25DV_UID * const pUid );
+int32_t ST25DV_ReadDSFID(ST25DV_Object_t* pObj, uint8_t * const pDsfid );
+int32_t ST25DV_ReadDsfidRFProtection(ST25DV_Object_t* pObj, ST25DV_LOCK_STATUS * const pLockDsfid );
+int32_t ST25DV_ReadAFI(ST25DV_Object_t* pObj, uint8_t * const pAfi );
+int32_t ST25DV_ReadAfiRFProtection(ST25DV_Object_t* pObj, ST25DV_LOCK_STATUS * const pLockAfi );
+int32_t ST25DV_ReadI2CProtectZone(ST25DV_Object_t* pObj, ST25DV_I2C_PROT_ZONE * const pProtZone );
+int32_t ST25DV_WriteI2CProtectZonex( ST25DV_Object_t* pObj, const ST25DV_PROTECTION_ZONE Zone, const ST25DV_PROTECTION_CONF ReadWriteProtection );
+int32_t ST25DV_ReadLockCCFile( ST25DV_Object_t* pObj, ST25DV_LOCK_CCFILE * const pLockCCFile );
+int32_t ST25DV_WriteLockCCFile( ST25DV_Object_t* pObj, const ST25DV_CCFILE_BLOCK NbBlockCCFile, const ST25DV_LOCK_STATUS LockCCFile );
+int32_t ST25DV_ReadLockCFG( ST25DV_Object_t* pObj, ST25DV_LOCK_STATUS * const pLockCfg );
+int32_t ST25DV_WriteLockCFG( ST25DV_Object_t* pObj, const ST25DV_LOCK_STATUS LockCfg );
+int32_t ST25DV_PresentI2CPassword( ST25DV_Object_t* pObj, const ST25DV_PASSWD PassWord );
+int32_t ST25DV_WriteI2CPassword( ST25DV_Object_t* pObj, const ST25DV_PASSWD PassWord );
+int32_t ST25DV_ReadRFZxSS( ST25DV_Object_t* pObj, const ST25DV_PROTECTION_ZONE Zone, ST25DV_RF_PROT_ZONE * const pRfprotZone );
+int32_t ST25DV_WriteRFZxSS( ST25DV_Object_t* pObj, const ST25DV_PROTECTION_ZONE Zone, const ST25DV_RF_PROT_ZONE RfProtZone );
+int32_t ST25DV_ReadEndZonex( ST25DV_Object_t* pObj, const ST25DV_END_ZONE EndZone, uint8_t * pEndZ );
+int32_t ST25DV_WriteEndZonex( ST25DV_Object_t* pObj, const ST25DV_END_ZONE EndZone, const uint8_t EndZ );
+int32_t ST25DV_InitEndZone( ST25DV_Object_t* pObj );
+int32_t ST25DV_CreateUserZone( ST25DV_Object_t* pObj, uint16_t Zone1Length, uint16_t Zone2Length, uint16_t Zone3Length, uint16_t Zone4Length );
+int32_t ST25DV_ReadMemSize( ST25DV_Object_t* pObj, ST25DV_MEM_SIZE * const pSizeInfo );
+int32_t ST25DV_ReadEHMode( ST25DV_Object_t* pObj, ST25DV_EH_MODE_STATUS * const pEH_mode );
+int32_t ST25DV_WriteEHMode( ST25DV_Object_t* pObj, const ST25DV_EH_MODE_STATUS EH_mode );
+int32_t ST25DV_ReadRFMngt( ST25DV_Object_t* pObj, ST25DV_RF_MNGT * const pRF_Mngt );
+int32_t ST25DV_WriteRFMngt( ST25DV_Object_t* pObj, const uint8_t Rfmngt );
+int32_t ST25DV_GetRFDisable( ST25DV_Object_t* pObj, ST25DV_EN_STATUS * const pRFDisable );
+int32_t ST25DV_SetRFDisable( ST25DV_Object_t* pObj );
+int32_t ST25DV_ResetRFDisable( ST25DV_Object_t* pObj );
+int32_t ST25DV_GetRFSleep( ST25DV_Object_t* pObj, ST25DV_EN_STATUS * const pRFSleep );
+int32_t ST25DV_SetRFSleep( ST25DV_Object_t* pObj );
+int32_t ST25DV_ResetRFSleep( ST25DV_Object_t* pObj );
+int32_t ST25DV_ReadMBMode( ST25DV_Object_t* pObj, ST25DV_EN_STATUS * const pMB_mode );
+int32_t ST25DV_WriteMBMode( ST25DV_Object_t* pObj, const ST25DV_EN_STATUS MB_mode );
+int32_t ST25DV_ReadMBWDG( ST25DV_Object_t* pObj, uint8_t * const pWdgDelay );
+int32_t ST25DV_WriteMBWDG( ST25DV_Object_t* pObj, const uint8_t WdgDelay );
+int32_t ST25DV_ReadMailboxData( ST25DV_Object_t* pObj, uint8_t * const pData, const uint16_t TarAddr, const uint16_t NbByte );
+int32_t ST25DV_WriteMailboxData( ST25DV_Object_t* pObj, const uint8_t * const pData, const uint16_t NbByte );
+int32_t ST25DV_ReadMailboxRegister( ST25DV_Object_t* pObj, uint8_t * const pData, const uint16_t TarAddr, const uint16_t NbByte );
+int32_t ST25DV_WriteMailboxRegister( ST25DV_Object_t* pObj, const uint8_t * const pData, const uint16_t TarAddr, const uint16_t NbByte );
+int32_t ST25DV_ReadI2CSecuritySession_Dyn( ST25DV_Object_t* pObj, ST25DV_I2CSSO_STATUS * const pSession );
+int32_t ST25DV_ReadITSTStatus_Dyn( ST25DV_Object_t* pObj, uint8_t * const pITStatus );
+int32_t ST25DV_ReadGPO_Dyn( ST25DV_Object_t* pObj, uint8_t *GPOConfig );
+int32_t ST25DV_GetGPO_en_Dyn( ST25DV_Object_t* pObj, ST25DV_EN_STATUS * const pGPO_en );
+int32_t ST25DV_SetGPO_en_Dyn( ST25DV_Object_t* pObj );
+int32_t ST25DV_ResetGPO_en_Dyn( ST25DV_Object_t* pObj );
+int32_t ST25DV_ReadEHCtrl_Dyn( ST25DV_Object_t* pObj, ST25DV_EH_CTRL * const pEH_CTRL );
+int32_t ST25DV_GetEHENMode_Dyn( ST25DV_Object_t* pObj, ST25DV_EN_STATUS * const pEH_Val );
+int32_t ST25DV_SetEHENMode_Dyn( ST25DV_Object_t* pObj );
+int32_t ST25DV_ResetEHENMode_Dyn( ST25DV_Object_t* pObj );
+int32_t ST25DV_GetEHON_Dyn( ST25DV_Object_t* pObj, ST25DV_EN_STATUS * const pEHON );
+int32_t ST25DV_GetRFField_Dyn( ST25DV_Object_t* pObj, ST25DV_FIELD_STATUS * const pRF_Field );
+int32_t ST25DV_GetVCC_Dyn( ST25DV_Object_t* pObj, ST25DV_VCC_STATUS * const pVCC );
+int32_t ST25DV_ReadRFMngt_Dyn( ST25DV_Object_t* pObj, ST25DV_RF_MNGT * const pRF_Mngt );
+int32_t ST25DV_WriteRFMngt_Dyn( ST25DV_Object_t* pObj, const uint8_t RF_Mngt );
+int32_t ST25DV_GetRFDisable_Dyn( ST25DV_Object_t* pObj, ST25DV_EN_STATUS * const pRFDisable );
+int32_t ST25DV_SetRFDisable_Dyn( ST25DV_Object_t* pObj );
+int32_t ST25DV_ResetRFDisable_Dyn( ST25DV_Object_t* pObj );
+int32_t ST25DV_GetRFSleep_Dyn( ST25DV_Object_t* pObj, ST25DV_EN_STATUS * const pRFSleep );
+int32_t ST25DV_SetRFSleep_Dyn( ST25DV_Object_t* pObj );
+int32_t ST25DV_ResetRFSleep_Dyn( ST25DV_Object_t* pObj );
+int32_t ST25DV_ReadMBCtrl_Dyn( ST25DV_Object_t* pObj, ST25DV_MB_CTRL_DYN_STATUS * const pCtrlStatus );
+int32_t ST25DV_GetMBEN_Dyn( ST25DV_Object_t* pObj, ST25DV_EN_STATUS * const pMBEN );
+int32_t ST25DV_SetMBEN_Dyn( ST25DV_Object_t* pObj );
+int32_t ST25DV_ResetMBEN_Dyn( ST25DV_Object_t* pObj );
+int32_t ST25DV_ReadMBLength_Dyn( ST25DV_Object_t* pObj, uint8_t * const pMBLength );
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+
+#ifdef __cplusplus
+ }
+#endif
+#endif /* ST25DV_H */
+
+/******************* (C) COPYRIGHT 2016 STMicroelectronics *****END OF FILE****/
diff --git a/P3_SETR2/Components/st25dv/st25dv_reg.c b/P3_SETR2/Components/st25dv/st25dv_reg.c
new file mode 100644
index 0000000..c57c5d2
--- /dev/null
+++ b/P3_SETR2/Components/st25dv/st25dv_reg.c
@@ -0,0 +1,1492 @@
+/**
+ ******************************************************************************
+ * @file st25dv_reg.h
+ * @author MMY Application Team
+ * @brief This file provides set of functions to access st25dv-i2c registers.
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2016 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ ******************************************************************************
+ */
+
+#include "st25dv_reg.h"
+
+int32_t st25dv_readreg (st25dv_ctx_t *ctx, uint16_t reg, uint8_t* data, uint16_t len)
+{
+ return ctx->ReadReg(ctx->handle, reg, data, len);
+}
+
+int32_t st25dv_WriteReg (st25dv_ctx_t *ctx, uint16_t reg, uint8_t const *data, uint16_t len)
+{
+ return ctx->WriteReg(ctx->handle, reg, data, len);
+}
+
+
+/**** Copy generated code hereafter ****/
+int32_t st25dv_get_icref (st25dv_ctx_t *ctx, uint8_t *value)
+{
+ if( st25dv_readreg(ctx, (ST25DV_ICREF_REG), (uint8_t *)value, 1))
+ return ST25DV_ERROR;
+ return ST25DV_OK;
+}
+
+int32_t st25dv_get_enda1 (st25dv_ctx_t *ctx, uint8_t *value)
+{
+ if( st25dv_readreg(ctx, (ST25DV_ENDA1_REG), (uint8_t *)value, 1))
+ return ST25DV_ERROR;
+ return ST25DV_OK;
+}
+
+int32_t st25dv_set_enda1 (st25dv_ctx_t *ctx, const uint8_t *value)
+{
+ return st25dv_WriteReg(ctx, (ST25DV_ENDA1_REG), value, 1);
+}
+
+int32_t st25dv_get_enda2 (st25dv_ctx_t *ctx, uint8_t *value)
+{
+ if( st25dv_readreg(ctx, (ST25DV_ENDA2_REG), (uint8_t *)value, 1))
+ return ST25DV_ERROR;
+ return ST25DV_OK;
+}
+
+int32_t st25dv_set_enda2 (st25dv_ctx_t *ctx, const uint8_t *value)
+{
+ return st25dv_WriteReg(ctx, (ST25DV_ENDA2_REG), value, 1);
+}
+
+int32_t st25dv_get_enda3 (st25dv_ctx_t *ctx, uint8_t *value)
+{
+ if( st25dv_readreg(ctx, (ST25DV_ENDA3_REG), (uint8_t *)value, 1))
+ return ST25DV_ERROR;
+ return ST25DV_OK;
+}
+
+int32_t st25dv_set_enda3 (st25dv_ctx_t *ctx, const uint8_t *value)
+{
+ return st25dv_WriteReg(ctx, (ST25DV_ENDA3_REG), value, 1);
+}
+
+int32_t st25dv_get_dsfid (st25dv_ctx_t *ctx, uint8_t *value)
+{
+ if( st25dv_readreg(ctx, (ST25DV_DSFID_REG), (uint8_t *)value, 1))
+ return ST25DV_ERROR;
+ return ST25DV_OK;
+}
+
+int32_t st25dv_get_afi (st25dv_ctx_t *ctx, uint8_t *value)
+{
+ if( st25dv_readreg(ctx, (ST25DV_AFI_REG), (uint8_t *)value, 1))
+ return ST25DV_ERROR;
+ return ST25DV_OK;
+}
+
+int32_t st25dv_get_mem_size_msb (st25dv_ctx_t *ctx, uint8_t *value)
+{
+ if( st25dv_readreg(ctx, (ST25DV_MEM_SIZE_MSB_REG), (uint8_t *)value, 1))
+ return ST25DV_ERROR;
+ return ST25DV_OK;
+}
+
+int32_t st25dv_get_blk_size (st25dv_ctx_t *ctx, uint8_t *value)
+{
+ if( st25dv_readreg(ctx, (ST25DV_BLK_SIZE_REG), (uint8_t *)value, 1))
+ return ST25DV_ERROR;
+ return ST25DV_OK;
+}
+
+int32_t st25dv_get_mem_size_lsb (st25dv_ctx_t *ctx, uint8_t *value)
+{
+ if( st25dv_readreg(ctx, (ST25DV_MEM_SIZE_LSB_REG), (uint8_t *)value, 1))
+ return ST25DV_ERROR;
+ return ST25DV_OK;
+}
+
+int32_t st25dv_get_icrev (st25dv_ctx_t *ctx, uint8_t *value)
+{
+ if( st25dv_readreg(ctx, (ST25DV_ICREV_REG), (uint8_t *)value, 1))
+ return ST25DV_ERROR;
+ return ST25DV_OK;
+}
+
+int32_t st25dv_get_uid (st25dv_ctx_t *ctx, uint8_t *value)
+{
+ if( st25dv_readreg(ctx, (ST25DV_UID_REG), (uint8_t *)value, 8))
+ return ST25DV_ERROR;
+ return ST25DV_OK;
+}
+
+int32_t st25dv_get_i2cpasswd (st25dv_ctx_t *ctx, uint8_t *value)
+{
+ if( st25dv_readreg(ctx, (ST25DV_I2CPASSWD_REG), (uint8_t *)value, 8))
+ return ST25DV_ERROR;
+ return ST25DV_OK;
+}
+
+int32_t st25dv_set_i2cpasswd (st25dv_ctx_t *ctx, const uint8_t *value)
+{
+ if( st25dv_WriteReg(ctx, (ST25DV_I2CPASSWD_REG), value, 1))
+ return ST25DV_ERROR;
+ return ST25DV_OK;
+}
+
+int32_t st25dv_get_lockdsfid (st25dv_ctx_t *ctx, uint8_t *value)
+{
+ if( st25dv_readreg(ctx, (ST25DV_LOCKDSFID_REG), (uint8_t *)value, 1))
+ return ST25DV_ERROR;
+ return ST25DV_OK;
+}
+
+int32_t st25dv_get_lockafi (st25dv_ctx_t *ctx, uint8_t *value)
+{
+ if( st25dv_readreg(ctx, (ST25DV_LOCKAFI_REG), (uint8_t *)value, 1))
+ return ST25DV_ERROR;
+ return ST25DV_OK;
+}
+
+int32_t st25dv_get_mb_mode_rw (st25dv_ctx_t *ctx, uint8_t *value)
+{
+ if( st25dv_readreg(ctx, (ST25DV_MB_MODE_REG), (uint8_t *)value, 1))
+ return ST25DV_ERROR;
+ *value &= (ST25DV_MB_MODE_RW_MASK);
+ *value = *value >> (ST25DV_MB_MODE_RW_SHIFT);
+ return ST25DV_OK;
+}
+
+int32_t st25dv_set_mb_mode_rw (st25dv_ctx_t *ctx, const uint8_t *value)
+{
+ uint8_t reg_value;
+ if( st25dv_readreg(ctx, (ST25DV_MB_MODE_REG), ®_value, 1))
+ return ST25DV_ERROR;
+
+ reg_value = ( (*value << (ST25DV_MB_MODE_RW_SHIFT)) & (ST25DV_MB_MODE_RW_MASK)) |
+ (reg_value & ~(ST25DV_MB_MODE_RW_MASK));
+
+ if( st25dv_WriteReg(ctx, (ST25DV_MB_MODE_REG), ®_value, 1))
+ return ST25DV_ERROR;
+ return ST25DV_OK;
+}
+
+int32_t st25dv_get_mblen_dyn_mblen (st25dv_ctx_t *ctx, uint8_t *value)
+{
+ if( st25dv_readreg(ctx, (ST25DV_MBLEN_DYN_REG), (uint8_t *)value, 1))
+ return ST25DV_ERROR;
+ return ST25DV_OK;
+}
+
+int32_t st25dv_get_mb_ctrl_dyn_mben (st25dv_ctx_t *ctx, uint8_t *value)
+{
+ if( st25dv_readreg(ctx, (ST25DV_MB_CTRL_DYN_REG), (uint8_t *)value, 1))
+ return ST25DV_ERROR;
+ *value &= (ST25DV_MB_CTRL_DYN_MBEN_MASK);
+ *value = *value >> (ST25DV_MB_CTRL_DYN_MBEN_SHIFT);
+ return ST25DV_OK;
+}
+
+int32_t st25dv_set_mb_ctrl_dyn_mben (st25dv_ctx_t *ctx, const uint8_t *value)
+{
+ uint8_t reg_value;
+ if( st25dv_readreg(ctx, (ST25DV_MB_CTRL_DYN_REG), ®_value, 1))
+ return ST25DV_ERROR;
+
+ reg_value = ( (*value << (ST25DV_MB_CTRL_DYN_MBEN_SHIFT)) & (ST25DV_MB_CTRL_DYN_MBEN_MASK)) |
+ (reg_value & ~(ST25DV_MB_CTRL_DYN_MBEN_MASK));
+
+ if( st25dv_WriteReg(ctx, (ST25DV_MB_CTRL_DYN_REG), ®_value, 1))
+ return ST25DV_ERROR;
+ return ST25DV_OK;
+}
+
+int32_t st25dv_get_mb_ctrl_dyn_hostputmsg (st25dv_ctx_t *ctx, uint8_t *value)
+{
+ if( st25dv_readreg(ctx, (ST25DV_MB_CTRL_DYN_REG), (uint8_t *)value, 1))
+ return ST25DV_ERROR;
+ *value &= (ST25DV_MB_CTRL_DYN_HOSTPUTMSG_MASK);
+ *value = *value >> (ST25DV_MB_CTRL_DYN_HOSTPUTMSG_SHIFT);
+ return ST25DV_OK;
+}
+
+int32_t st25dv_get_mb_ctrl_dyn_rfputmsg (st25dv_ctx_t *ctx, uint8_t *value)
+{
+ if( st25dv_readreg(ctx, (ST25DV_MB_CTRL_DYN_REG), (uint8_t *)value, 1))
+ return ST25DV_ERROR;
+ *value &= (ST25DV_MB_CTRL_DYN_RFPUTMSG_MASK);
+ *value = *value >> (ST25DV_MB_CTRL_DYN_RFPUTMSG_SHIFT);
+ return ST25DV_OK;
+}
+
+int32_t st25dv_get_mb_ctrl_dyn_streserved (st25dv_ctx_t *ctx, uint8_t *value)
+{
+ if( st25dv_readreg(ctx, (ST25DV_MB_CTRL_DYN_REG), (uint8_t *)value, 1))
+ return ST25DV_ERROR;
+ *value &= (ST25DV_MB_CTRL_DYN_STRESERVED_MASK);
+ *value = *value >> (ST25DV_MB_CTRL_DYN_STRESERVED_SHIFT);
+ return ST25DV_OK;
+}
+
+int32_t st25dv_get_mb_ctrl_dyn_hostmissmsg (st25dv_ctx_t *ctx, uint8_t *value)
+{
+ if( st25dv_readreg(ctx, (ST25DV_MB_CTRL_DYN_REG), (uint8_t *)value, 1))
+ return ST25DV_ERROR;
+ *value &= (ST25DV_MB_CTRL_DYN_HOSTMISSMSG_MASK);
+ *value = *value >> (ST25DV_MB_CTRL_DYN_HOSTMISSMSG_SHIFT);
+ return ST25DV_OK;
+}
+
+int32_t st25dv_get_mb_ctrl_dyn_rfmissmsg (st25dv_ctx_t *ctx, uint8_t *value)
+{
+ if( st25dv_readreg(ctx, (ST25DV_MB_CTRL_DYN_REG), (uint8_t *)value, 1))
+ return ST25DV_ERROR;
+ *value &= (ST25DV_MB_CTRL_DYN_RFMISSMSG_MASK);
+ *value = *value >> (ST25DV_MB_CTRL_DYN_RFMISSMSG_SHIFT);
+ return ST25DV_OK;
+}
+
+int32_t st25dv_get_mb_ctrl_dyn_currentmsg (st25dv_ctx_t *ctx, uint8_t *value)
+{
+ if( st25dv_readreg(ctx, (ST25DV_MB_CTRL_DYN_REG), (uint8_t *)value, 1))
+ return ST25DV_ERROR;
+ *value &= (ST25DV_MB_CTRL_DYN_CURRENTMSG_MASK);
+ *value = *value >> (ST25DV_MB_CTRL_DYN_CURRENTMSG_SHIFT);
+ return ST25DV_OK;
+}
+
+int32_t st25dv_get_mb_ctrl_dyn_all (st25dv_ctx_t *ctx, uint8_t *value)
+{
+ if( st25dv_readreg(ctx, (ST25DV_MB_CTRL_DYN_REG), (uint8_t *)value, 1))
+ return ST25DV_ERROR;
+ return ST25DV_OK;
+}
+
+int32_t st25dv_get_mb_wdg_delay (st25dv_ctx_t *ctx, uint8_t *value)
+{
+ if( st25dv_readreg(ctx, (ST25DV_MB_WDG_REG), (uint8_t *)value, 1))
+ return ST25DV_ERROR;
+ *value &= (ST25DV_MB_WDG_DELAY_MASK);
+ *value = *value >> (ST25DV_MB_WDG_DELAY_SHIFT);
+ return ST25DV_OK;
+}
+
+int32_t st25dv_set_mb_wdg_delay (st25dv_ctx_t *ctx, const uint8_t *value)
+{
+ uint8_t reg_value;
+ if( st25dv_readreg(ctx, (ST25DV_MB_WDG_REG), ®_value, 1))
+ return ST25DV_ERROR;
+
+ reg_value = ( (*value << (ST25DV_MB_WDG_DELAY_SHIFT)) & (ST25DV_MB_WDG_DELAY_MASK)) |
+ (reg_value & ~(ST25DV_MB_WDG_DELAY_MASK));
+
+ if( st25dv_WriteReg(ctx, (ST25DV_MB_WDG_REG), ®_value, 1))
+ return ST25DV_ERROR;
+ return ST25DV_OK;
+}
+
+int32_t st25dv_get_gpo_rfuserstate (st25dv_ctx_t *ctx, uint8_t *value)
+{
+ if( st25dv_readreg(ctx, (ST25DV_GPO_REG), (uint8_t *)value, 1))
+ return ST25DV_ERROR;
+ *value &= (ST25DV_GPO_RFUSERSTATE_MASK);
+ *value = *value >> (ST25DV_GPO_RFUSERSTATE_SHIFT);
+ return ST25DV_OK;
+}
+
+int32_t st25dv_set_gpo_rfuserstate (st25dv_ctx_t *ctx, const uint8_t *value)
+{
+ uint8_t reg_value;
+ if( st25dv_readreg(ctx, (ST25DV_GPO_REG), ®_value, 1))
+ return ST25DV_ERROR;
+
+ reg_value = ( (*value << (ST25DV_GPO_RFUSERSTATE_SHIFT)) & (ST25DV_GPO_RFUSERSTATE_MASK)) |
+ (reg_value & ~(ST25DV_GPO_RFUSERSTATE_MASK));
+
+ if( st25dv_WriteReg(ctx, (ST25DV_GPO_REG), ®_value, 1))
+ return ST25DV_ERROR;
+ return ST25DV_OK;
+}
+
+int32_t st25dv_get_gpo_rfactivity (st25dv_ctx_t *ctx, uint8_t *value)
+{
+ if( st25dv_readreg(ctx, (ST25DV_GPO_REG), (uint8_t *)value, 1))
+ return ST25DV_ERROR;
+ *value &= (ST25DV_GPO_RFACTIVITY_MASK);
+ *value = *value >> (ST25DV_GPO_RFACTIVITY_SHIFT);
+ return ST25DV_OK;
+}
+
+int32_t st25dv_set_gpo_rfactivity (st25dv_ctx_t *ctx, const uint8_t *value)
+{
+ uint8_t reg_value;
+ if( st25dv_readreg(ctx, (ST25DV_GPO_REG), ®_value, 1))
+ return ST25DV_ERROR;
+
+ reg_value = ( (*value << (ST25DV_GPO_RFACTIVITY_SHIFT)) & (ST25DV_GPO_RFACTIVITY_MASK)) |
+ (reg_value & ~(ST25DV_GPO_RFACTIVITY_MASK));
+
+ if( st25dv_WriteReg(ctx, (ST25DV_GPO_REG), ®_value, 1))
+ return ST25DV_ERROR;
+ return ST25DV_OK;
+}
+
+int32_t st25dv_get_gpo_rfinterrupt (st25dv_ctx_t *ctx, uint8_t *value)
+{
+ if( st25dv_readreg(ctx, (ST25DV_GPO_REG), (uint8_t *)value, 1))
+ return ST25DV_ERROR;
+ *value &= (ST25DV_GPO_RFINTERRUPT_MASK);
+ *value = *value >> (ST25DV_GPO_RFINTERRUPT_SHIFT);
+ return ST25DV_OK;
+}
+
+int32_t st25dv_set_gpo_rfinterrupt (st25dv_ctx_t *ctx, const uint8_t *value)
+{
+ uint8_t reg_value;
+ if( st25dv_readreg(ctx, (ST25DV_GPO_REG), ®_value, 1))
+ return ST25DV_ERROR;
+
+ reg_value = ( (*value << (ST25DV_GPO_RFINTERRUPT_SHIFT)) & (ST25DV_GPO_RFINTERRUPT_MASK)) |
+ (reg_value & ~(ST25DV_GPO_RFINTERRUPT_MASK));
+
+ if( st25dv_WriteReg(ctx, (ST25DV_GPO_REG), ®_value, 1))
+ return ST25DV_ERROR;
+ return ST25DV_OK;
+}
+
+int32_t st25dv_get_gpo_fieldchange (st25dv_ctx_t *ctx, uint8_t *value)
+{
+ if( st25dv_readreg(ctx, (ST25DV_GPO_REG), (uint8_t *)value, 1))
+ return ST25DV_ERROR;
+ *value &= (ST25DV_GPO_FIELDCHANGE_MASK);
+ *value = *value >> (ST25DV_GPO_FIELDCHANGE_SHIFT);
+ return ST25DV_OK;
+}
+
+int32_t st25dv_set_gpo_fieldchange (st25dv_ctx_t *ctx, const uint8_t *value)
+{
+ uint8_t reg_value;
+ if( st25dv_readreg(ctx, (ST25DV_GPO_REG), ®_value, 1))
+ return ST25DV_ERROR;
+
+ reg_value = ( (*value << (ST25DV_GPO_FIELDCHANGE_SHIFT)) & (ST25DV_GPO_FIELDCHANGE_MASK)) |
+ (reg_value & ~(ST25DV_GPO_FIELDCHANGE_MASK));
+
+ if( st25dv_WriteReg(ctx, (ST25DV_GPO_REG), ®_value, 1))
+ return ST25DV_ERROR;
+ return ST25DV_OK;
+}
+
+int32_t st25dv_get_gpo_rfputmsg (st25dv_ctx_t *ctx, uint8_t *value)
+{
+ if( st25dv_readreg(ctx, (ST25DV_GPO_REG), (uint8_t *)value, 1))
+ return ST25DV_ERROR;
+ *value &= (ST25DV_GPO_RFPUTMSG_MASK);
+ *value = *value >> (ST25DV_GPO_RFPUTMSG_SHIFT);
+ return ST25DV_OK;
+}
+
+int32_t st25dv_set_gpo_rfputmsg (st25dv_ctx_t *ctx, const uint8_t *value)
+{
+ uint8_t reg_value;
+ if( st25dv_readreg(ctx, (ST25DV_GPO_REG), ®_value, 1))
+ return ST25DV_ERROR;
+
+ reg_value = ( (*value << (ST25DV_GPO_RFPUTMSG_SHIFT)) & (ST25DV_GPO_RFPUTMSG_MASK)) |
+ (reg_value & ~(ST25DV_GPO_RFPUTMSG_MASK));
+
+ if( st25dv_WriteReg(ctx, (ST25DV_GPO_REG), ®_value, 1))
+ return ST25DV_ERROR;
+ return ST25DV_OK;
+}
+
+int32_t st25dv_get_gpo_rfgetmsg (st25dv_ctx_t *ctx, uint8_t *value)
+{
+ if( st25dv_readreg(ctx, (ST25DV_GPO_REG), (uint8_t *)value, 1))
+ return ST25DV_ERROR;
+ *value &= (ST25DV_GPO_RFGETMSG_MASK);
+ *value = *value >> (ST25DV_GPO_RFGETMSG_SHIFT);
+ return ST25DV_OK;
+}
+
+int32_t st25dv_set_gpo_rfgetmsg (st25dv_ctx_t *ctx, const uint8_t *value)
+{
+ uint8_t reg_value;
+ if( st25dv_readreg(ctx, (ST25DV_GPO_REG), ®_value, 1))
+ return ST25DV_ERROR;
+
+ reg_value = ( (*value << (ST25DV_GPO_RFGETMSG_SHIFT)) & (ST25DV_GPO_RFGETMSG_MASK)) |
+ (reg_value & ~(ST25DV_GPO_RFGETMSG_MASK));
+
+ if( st25dv_WriteReg(ctx, (ST25DV_GPO_REG), ®_value, 1))
+ return ST25DV_ERROR;
+ return ST25DV_OK;
+}
+
+int32_t st25dv_get_gpo_rfwrite (st25dv_ctx_t *ctx, uint8_t *value)
+{
+ if( st25dv_readreg(ctx, (ST25DV_GPO_REG), (uint8_t *)value, 1))
+ return ST25DV_ERROR;
+ *value &= (ST25DV_GPO_RFWRITE_MASK);
+ *value = *value >> (ST25DV_GPO_RFWRITE_SHIFT);
+ return ST25DV_OK;
+}
+
+int32_t st25dv_set_gpo_rfwrite (st25dv_ctx_t *ctx, const uint8_t *value)
+{
+ uint8_t reg_value;
+ if( st25dv_readreg(ctx, (ST25DV_GPO_REG), ®_value, 1))
+ return ST25DV_ERROR;
+
+ reg_value = ( (*value << (ST25DV_GPO_RFWRITE_SHIFT)) & (ST25DV_GPO_RFWRITE_MASK)) |
+ (reg_value & ~(ST25DV_GPO_RFWRITE_MASK));
+
+ if( st25dv_WriteReg(ctx, (ST25DV_GPO_REG), ®_value, 1))
+ return ST25DV_ERROR;
+ return ST25DV_OK;
+}
+
+int32_t st25dv_get_gpo_enable (st25dv_ctx_t *ctx, uint8_t *value)
+{
+ if( st25dv_readreg(ctx, (ST25DV_GPO_REG), (uint8_t *)value, 1))
+ return ST25DV_ERROR;
+ *value &= (ST25DV_GPO_ENABLE_MASK);
+ *value = *value >> (ST25DV_GPO_ENABLE_SHIFT);
+ return ST25DV_OK;
+}
+
+int32_t st25dv_set_gpo_enable (st25dv_ctx_t *ctx, const uint8_t *value)
+{
+ uint8_t reg_value;
+ if( st25dv_readreg(ctx, (ST25DV_GPO_REG), ®_value, 1))
+ return ST25DV_ERROR;
+
+ reg_value = ( (*value << (ST25DV_GPO_ENABLE_SHIFT)) & (ST25DV_GPO_ENABLE_MASK)) |
+ (reg_value & ~(ST25DV_GPO_ENABLE_MASK));
+
+ if( st25dv_WriteReg(ctx, (ST25DV_GPO_REG), ®_value, 1))
+ return ST25DV_ERROR;
+ return ST25DV_OK;
+}
+
+int32_t st25dv_get_gpo_all (st25dv_ctx_t *ctx, uint8_t *value)
+{
+ if( st25dv_readreg(ctx, (ST25DV_GPO_REG), (uint8_t *)value, 1))
+ return ST25DV_ERROR;
+ return ST25DV_OK;
+}
+
+int32_t st25dv_set_gpo_all (st25dv_ctx_t *ctx, const uint8_t *value)
+{
+ if( st25dv_WriteReg(ctx, (ST25DV_GPO_REG), value, 1))
+ return ST25DV_ERROR;
+ return ST25DV_OK;
+}
+
+int32_t st25dv_get_gpo_dyn_rfuserstate (st25dv_ctx_t *ctx, uint8_t *value)
+{
+ if( st25dv_readreg(ctx, (ST25DV_GPO_DYN_REG), (uint8_t *)value, 1))
+ return ST25DV_ERROR;
+ *value &= (ST25DV_GPO_DYN_RFUSERSTATE_MASK);
+ *value = *value >> (ST25DV_GPO_DYN_RFUSERSTATE_SHIFT);
+ return ST25DV_OK;
+}
+
+int32_t st25dv_set_gpo_dyn_rfuserstate (st25dv_ctx_t *ctx, const uint8_t *value)
+{
+ uint8_t reg_value;
+ if( st25dv_readreg(ctx, (ST25DV_GPO_DYN_REG), ®_value, 1))
+ return ST25DV_ERROR;
+
+ reg_value = ( (*value << (ST25DV_GPO_DYN_RFUSERSTATE_SHIFT)) & (ST25DV_GPO_DYN_RFUSERSTATE_MASK)) |
+ (reg_value & ~(ST25DV_GPO_DYN_RFUSERSTATE_MASK));
+
+ if( st25dv_WriteReg(ctx, (ST25DV_GPO_DYN_REG), ®_value, 1))
+ return ST25DV_ERROR;
+ return ST25DV_OK;
+}
+
+int32_t st25dv_get_gpo_dyn_rfactivity (st25dv_ctx_t *ctx, uint8_t *value)
+{
+ if( st25dv_readreg(ctx, (ST25DV_GPO_DYN_REG), (uint8_t *)value, 1))
+ return ST25DV_ERROR;
+ *value &= (ST25DV_GPO_DYN_RFACTIVITY_MASK);
+ *value = *value >> (ST25DV_GPO_DYN_RFACTIVITY_SHIFT);
+ return ST25DV_OK;
+}
+
+int32_t st25dv_set_gpo_dyn_rfactivity (st25dv_ctx_t *ctx, const uint8_t *value)
+{
+ uint8_t reg_value;
+ if( st25dv_readreg(ctx, (ST25DV_GPO_DYN_REG), ®_value, 1))
+ return ST25DV_ERROR;
+
+ reg_value = ( (*value << (ST25DV_GPO_DYN_RFACTIVITY_SHIFT)) & (ST25DV_GPO_DYN_RFACTIVITY_MASK)) |
+ (reg_value & ~(ST25DV_GPO_DYN_RFACTIVITY_MASK));
+
+ if( st25dv_WriteReg(ctx, (ST25DV_GPO_DYN_REG), ®_value, 1))
+ return ST25DV_ERROR;
+ return ST25DV_OK;
+}
+
+int32_t st25dv_get_gpo_dyn_rfinterrupt (st25dv_ctx_t *ctx, uint8_t *value)
+{
+ if( st25dv_readreg(ctx, (ST25DV_GPO_DYN_REG), (uint8_t *)value, 1))
+ return ST25DV_ERROR;
+ *value &= (ST25DV_GPO_DYN_RFINTERRUPT_MASK);
+ *value = *value >> (ST25DV_GPO_DYN_RFINTERRUPT_SHIFT);
+ return ST25DV_OK;
+}
+
+int32_t st25dv_set_gpo_dyn_rfinterrupt (st25dv_ctx_t *ctx, const uint8_t *value)
+{
+ uint8_t reg_value;
+ if( st25dv_readreg(ctx, (ST25DV_GPO_DYN_REG), ®_value, 1))
+ return ST25DV_ERROR;
+
+ reg_value = ( (*value << (ST25DV_GPO_DYN_RFINTERRUPT_SHIFT)) & (ST25DV_GPO_DYN_RFINTERRUPT_MASK)) |
+ (reg_value & ~(ST25DV_GPO_DYN_RFINTERRUPT_MASK));
+
+ if( st25dv_WriteReg(ctx, (ST25DV_GPO_DYN_REG), ®_value, 1))
+ return ST25DV_ERROR;
+ return ST25DV_OK;
+}
+
+int32_t st25dv_get_gpo_dyn_fieldchange (st25dv_ctx_t *ctx, uint8_t *value)
+{
+ if( st25dv_readreg(ctx, (ST25DV_GPO_DYN_REG), (uint8_t *)value, 1))
+ return ST25DV_ERROR;
+ *value &= (ST25DV_GPO_DYN_FIELDCHANGE_MASK);
+ *value = *value >> (ST25DV_GPO_DYN_FIELDCHANGE_SHIFT);
+ return ST25DV_OK;
+}
+
+int32_t st25dv_set_gpo_dyn_fieldchange (st25dv_ctx_t *ctx, const uint8_t *value)
+{
+ uint8_t reg_value;
+ if( st25dv_readreg(ctx, (ST25DV_GPO_DYN_REG), ®_value, 1))
+ return ST25DV_ERROR;
+
+ reg_value = ( (*value << (ST25DV_GPO_DYN_FIELDCHANGE_SHIFT)) & (ST25DV_GPO_DYN_FIELDCHANGE_MASK)) |
+ (reg_value & ~(ST25DV_GPO_DYN_FIELDCHANGE_MASK));
+
+ if( st25dv_WriteReg(ctx, (ST25DV_GPO_DYN_REG), ®_value, 1))
+ return ST25DV_ERROR;
+ return ST25DV_OK;
+}
+
+int32_t st25dv_get_gpo_dyn_rfputmsg (st25dv_ctx_t *ctx, uint8_t *value)
+{
+ if( st25dv_readreg(ctx, (ST25DV_GPO_DYN_REG), (uint8_t *)value, 1))
+ return ST25DV_ERROR;
+ *value &= (ST25DV_GPO_DYN_RFPUTMSG_MASK);
+ *value = *value >> (ST25DV_GPO_DYN_RFPUTMSG_SHIFT);
+ return ST25DV_OK;
+}
+
+int32_t st25dv_set_gpo_dyn_rfputmsg (st25dv_ctx_t *ctx, const uint8_t *value)
+{
+ uint8_t reg_value;
+ if( st25dv_readreg(ctx, (ST25DV_GPO_DYN_REG), ®_value, 1))
+ return ST25DV_ERROR;
+
+ reg_value = ( (*value << (ST25DV_GPO_DYN_RFPUTMSG_SHIFT)) & (ST25DV_GPO_DYN_RFPUTMSG_MASK)) |
+ (reg_value & ~(ST25DV_GPO_DYN_RFPUTMSG_MASK));
+
+ if( st25dv_WriteReg(ctx, (ST25DV_GPO_DYN_REG), ®_value, 1))
+ return ST25DV_ERROR;
+ return ST25DV_OK;
+}
+
+int32_t st25dv_get_gpo_dyn_rfgetmsg (st25dv_ctx_t *ctx, uint8_t *value)
+{
+ if( st25dv_readreg(ctx, (ST25DV_GPO_DYN_REG), (uint8_t *)value, 1))
+ return ST25DV_ERROR;
+ *value &= (ST25DV_GPO_DYN_RFGETMSG_MASK);
+ *value = *value >> (ST25DV_GPO_DYN_RFGETMSG_SHIFT);
+ return ST25DV_OK;
+}
+
+int32_t st25dv_set_gpo_dyn_rfgetmsg (st25dv_ctx_t *ctx, const uint8_t *value)
+{
+ uint8_t reg_value;
+ if( st25dv_readreg(ctx, (ST25DV_GPO_DYN_REG), ®_value, 1))
+ return ST25DV_ERROR;
+
+ reg_value = ( (*value << (ST25DV_GPO_DYN_RFGETMSG_SHIFT)) & (ST25DV_GPO_DYN_RFGETMSG_MASK)) |
+ (reg_value & ~(ST25DV_GPO_DYN_RFGETMSG_MASK));
+
+ if( st25dv_WriteReg(ctx, (ST25DV_GPO_DYN_REG), ®_value, 1))
+ return ST25DV_ERROR;
+ return ST25DV_OK;
+}
+
+int32_t st25dv_get_gpo_dyn_rfwrite (st25dv_ctx_t *ctx, uint8_t *value)
+{
+ if( st25dv_readreg(ctx, (ST25DV_GPO_DYN_REG), (uint8_t *)value, 1))
+ return ST25DV_ERROR;
+ *value &= (ST25DV_GPO_DYN_RFWRITE_MASK);
+ *value = *value >> (ST25DV_GPO_DYN_RFWRITE_SHIFT);
+ return ST25DV_OK;
+}
+
+int32_t st25dv_set_gpo_dyn_rfwrite (st25dv_ctx_t *ctx, const uint8_t *value)
+{
+ uint8_t reg_value;
+ if( st25dv_readreg(ctx, (ST25DV_GPO_DYN_REG), ®_value, 1))
+ return ST25DV_ERROR;
+
+ reg_value = ( (*value << (ST25DV_GPO_DYN_RFWRITE_SHIFT)) & (ST25DV_GPO_DYN_RFWRITE_MASK)) |
+ (reg_value & ~(ST25DV_GPO_DYN_RFWRITE_MASK));
+
+ if( st25dv_WriteReg(ctx, (ST25DV_GPO_DYN_REG), ®_value, 1))
+ return ST25DV_ERROR;
+ return ST25DV_OK;
+}
+
+int32_t st25dv_get_gpo_dyn_enable (st25dv_ctx_t *ctx, uint8_t *value)
+{
+ if( st25dv_readreg(ctx, (ST25DV_GPO_DYN_REG), (uint8_t *)value, 1))
+ return ST25DV_ERROR;
+ *value &= (ST25DV_GPO_DYN_ENABLE_MASK);
+ *value = *value >> (ST25DV_GPO_DYN_ENABLE_SHIFT);
+ return ST25DV_OK;
+}
+
+int32_t st25dv_set_gpo_dyn_enable (st25dv_ctx_t *ctx, const uint8_t *value)
+{
+ uint8_t reg_value;
+ if( st25dv_readreg(ctx, (ST25DV_GPO_DYN_REG), ®_value, 1))
+ return ST25DV_ERROR;
+
+ reg_value = ( (*value << (ST25DV_GPO_DYN_ENABLE_SHIFT)) & (ST25DV_GPO_DYN_ENABLE_MASK)) |
+ (reg_value & ~(ST25DV_GPO_DYN_ENABLE_MASK));
+
+ if( st25dv_WriteReg(ctx, (ST25DV_GPO_DYN_REG), ®_value, 1))
+ return ST25DV_ERROR;
+ return ST25DV_OK;
+}
+
+int32_t st25dv_get_gpo_dyn_all (st25dv_ctx_t *ctx, uint8_t *value)
+{
+ if( st25dv_readreg(ctx, (ST25DV_GPO_DYN_REG), (uint8_t *)value, 1))
+ return ST25DV_ERROR;
+ return ST25DV_OK;
+}
+
+int32_t st25dv_set_gpo_dyn_all (st25dv_ctx_t *ctx, const uint8_t *value)
+{
+ if( st25dv_WriteReg(ctx, (ST25DV_GPO_DYN_REG), value, 1))
+ return ST25DV_ERROR;
+ return ST25DV_OK;
+}
+
+int32_t st25dv_get_ittime_delay (st25dv_ctx_t *ctx, uint8_t *value)
+{
+ if( st25dv_readreg(ctx, (ST25DV_ITTIME_REG), (uint8_t *)value, 1))
+ return ST25DV_ERROR;
+ *value &= (ST25DV_ITTIME_DELAY_MASK);
+ *value = *value >> (ST25DV_ITTIME_DELAY_SHIFT);
+ return ST25DV_OK;
+}
+
+int32_t st25dv_set_ittime_delay (st25dv_ctx_t *ctx, const uint8_t *value)
+{
+ uint8_t reg_value;
+ if( st25dv_readreg(ctx, (ST25DV_ITTIME_REG), ®_value, 1))
+ return ST25DV_ERROR;
+
+ reg_value = ( (*value << (ST25DV_ITTIME_DELAY_SHIFT)) & (ST25DV_ITTIME_DELAY_MASK)) |
+ (reg_value & ~(ST25DV_ITTIME_DELAY_MASK));
+
+ if( st25dv_WriteReg(ctx, (ST25DV_ITTIME_REG), ®_value, 1))
+ return ST25DV_ERROR;
+ return ST25DV_OK;
+}
+
+int32_t st25dv_get_itsts_dyn_rfuserstate (st25dv_ctx_t *ctx, uint8_t *value)
+{
+ if( st25dv_readreg(ctx, (ST25DV_ITSTS_DYN_REG), (uint8_t *)value, 1))
+ return ST25DV_ERROR;
+ *value &= (ST25DV_ITSTS_DYN_RFUSERSTATE_MASK);
+ *value = *value >> (ST25DV_ITSTS_DYN_RFUSERSTATE_SHIFT);
+ return ST25DV_OK;
+}
+
+int32_t st25dv_get_itsts_dyn_rfactivity (st25dv_ctx_t *ctx, uint8_t *value)
+{
+ if( st25dv_readreg(ctx, (ST25DV_ITSTS_DYN_REG), (uint8_t *)value, 1))
+ return ST25DV_ERROR;
+ *value &= (ST25DV_ITSTS_DYN_RFACTIVITY_MASK);
+ *value = *value >> (ST25DV_ITSTS_DYN_RFACTIVITY_SHIFT);
+ return ST25DV_OK;
+}
+
+int32_t st25dv_get_itsts_dyn_rfinterrupt (st25dv_ctx_t *ctx, uint8_t *value)
+{
+ if( st25dv_readreg(ctx, (ST25DV_ITSTS_DYN_REG), (uint8_t *)value, 1))
+ return ST25DV_ERROR;
+ *value &= (ST25DV_ITSTS_DYN_RFINTERRUPT_MASK);
+ *value = *value >> (ST25DV_ITSTS_DYN_RFINTERRUPT_SHIFT);
+ return ST25DV_OK;
+}
+
+int32_t st25dv_get_itsts_dyn_fieldfalling (st25dv_ctx_t *ctx, uint8_t *value)
+{
+ if( st25dv_readreg(ctx, (ST25DV_ITSTS_DYN_REG), (uint8_t *)value, 1))
+ return ST25DV_ERROR;
+ *value &= (ST25DV_ITSTS_DYN_FIELDFALLING_MASK);
+ *value = *value >> (ST25DV_ITSTS_DYN_FIELDFALLING_SHIFT);
+ return ST25DV_OK;
+}
+
+int32_t st25dv_get_itsts_dyn_fieldrising (st25dv_ctx_t *ctx, uint8_t *value)
+{
+ if( st25dv_readreg(ctx, (ST25DV_ITSTS_DYN_REG), (uint8_t *)value, 1))
+ return ST25DV_ERROR;
+ *value &= (ST25DV_ITSTS_DYN_FIELDRISING_MASK);
+ *value = *value >> (ST25DV_ITSTS_DYN_FIELDRISING_SHIFT);
+ return ST25DV_OK;
+}
+
+int32_t st25dv_get_itsts_dyn_rfputmsg (st25dv_ctx_t *ctx, uint8_t *value)
+{
+ if( st25dv_readreg(ctx, (ST25DV_ITSTS_DYN_REG), (uint8_t *)value, 1))
+ return ST25DV_ERROR;
+ *value &= (ST25DV_ITSTS_DYN_RFPUTMSG_MASK);
+ *value = *value >> (ST25DV_ITSTS_DYN_RFPUTMSG_SHIFT);
+ return ST25DV_OK;
+}
+
+int32_t st25dv_get_itsts_dyn_rfgetmsg (st25dv_ctx_t *ctx, uint8_t *value)
+{
+ if( st25dv_readreg(ctx, (ST25DV_ITSTS_DYN_REG), (uint8_t *)value, 1))
+ return ST25DV_ERROR;
+ *value &= (ST25DV_ITSTS_DYN_RFGETMSG_MASK);
+ *value = *value >> (ST25DV_ITSTS_DYN_RFGETMSG_SHIFT);
+ return ST25DV_OK;
+}
+
+int32_t st25dv_get_itsts_dyn_rfwrite (st25dv_ctx_t *ctx, uint8_t *value)
+{
+ if( st25dv_readreg(ctx, (ST25DV_ITSTS_DYN_REG), (uint8_t *)value, 1))
+ return ST25DV_ERROR;
+ *value &= (ST25DV_ITSTS_DYN_RFWRITE_MASK);
+ *value = *value >> (ST25DV_ITSTS_DYN_RFWRITE_SHIFT);
+ return ST25DV_OK;
+}
+
+int32_t st25dv_get_itsts_dyn_all (st25dv_ctx_t *ctx, uint8_t *value)
+{
+ if( st25dv_readreg(ctx, (ST25DV_ITSTS_DYN_REG), (uint8_t *)value, 1))
+ return ST25DV_ERROR;
+ return ST25DV_OK;
+}
+
+int32_t st25dv_get_eh_mode (st25dv_ctx_t *ctx, uint8_t *value)
+{
+ if( st25dv_readreg(ctx, (ST25DV_EH_MODE_REG), (uint8_t *)value, 1))
+ return ST25DV_ERROR;
+ *value &= (ST25DV_EH_MODE_MASK);
+ *value = *value >> (ST25DV_EH_MODE_SHIFT);
+ return ST25DV_OK;
+}
+
+int32_t st25dv_set_eh_mode (st25dv_ctx_t *ctx, const uint8_t *value)
+{
+ uint8_t reg_value;
+ if( st25dv_readreg(ctx, (ST25DV_EH_MODE_REG), ®_value, 1))
+ return ST25DV_ERROR;
+
+ reg_value = ( (*value << (ST25DV_EH_MODE_SHIFT)) & (ST25DV_EH_MODE_MASK)) |
+ (reg_value & ~(ST25DV_EH_MODE_MASK));
+
+ if( st25dv_WriteReg(ctx, (ST25DV_EH_MODE_REG), ®_value, 1))
+ return ST25DV_ERROR;
+ return ST25DV_OK;
+}
+
+int32_t st25dv_get_eh_ctrl_dyn_eh_en (st25dv_ctx_t *ctx, uint8_t *value)
+{
+ if( st25dv_readreg(ctx, (ST25DV_EH_CTRL_DYN_REG), (uint8_t *)value, 1))
+ return ST25DV_ERROR;
+ *value &= (ST25DV_EH_CTRL_DYN_EH_EN_MASK);
+ *value = *value >> (ST25DV_EH_CTRL_DYN_EH_EN_SHIFT);
+ return ST25DV_OK;
+}
+
+int32_t st25dv_set_eh_ctrl_dyn_eh_en (st25dv_ctx_t *ctx, const uint8_t *value)
+{
+ uint8_t reg_value;
+ if( st25dv_readreg(ctx, (ST25DV_EH_CTRL_DYN_REG), ®_value, 1))
+ return ST25DV_ERROR;
+
+ reg_value = ( (*value << (ST25DV_EH_CTRL_DYN_EH_EN_SHIFT)) & (ST25DV_EH_CTRL_DYN_EH_EN_MASK)) |
+ (reg_value & ~(ST25DV_EH_CTRL_DYN_EH_EN_MASK));
+
+ if( st25dv_WriteReg(ctx, (ST25DV_EH_CTRL_DYN_REG), ®_value, 1))
+ return ST25DV_ERROR;
+ return ST25DV_OK;
+}
+
+int32_t st25dv_get_eh_ctrl_dyn_eh_on (st25dv_ctx_t *ctx, uint8_t *value)
+{
+ if( st25dv_readreg(ctx, (ST25DV_EH_CTRL_DYN_REG), (uint8_t *)value, 1))
+ return ST25DV_ERROR;
+ *value &= (ST25DV_EH_CTRL_DYN_EH_ON_MASK);
+ *value = *value >> (ST25DV_EH_CTRL_DYN_EH_ON_SHIFT);
+ return ST25DV_OK;
+}
+
+int32_t st25dv_get_eh_ctrl_dyn_field_on (st25dv_ctx_t *ctx, uint8_t *value)
+{
+ if( st25dv_readreg(ctx, (ST25DV_EH_CTRL_DYN_REG), (uint8_t *)value, 1))
+ return ST25DV_ERROR;
+ *value &= (ST25DV_EH_CTRL_DYN_FIELD_ON_MASK);
+ *value = *value >> (ST25DV_EH_CTRL_DYN_FIELD_ON_SHIFT);
+ return ST25DV_OK;
+}
+
+int32_t st25dv_get_eh_ctrl_dyn_vcc_on (st25dv_ctx_t *ctx, uint8_t *value)
+{
+ if( st25dv_readreg(ctx, (ST25DV_EH_CTRL_DYN_REG), (uint8_t *)value, 1))
+ return ST25DV_ERROR;
+ *value &= (ST25DV_EH_CTRL_DYN_VCC_ON_MASK);
+ *value = *value >> (ST25DV_EH_CTRL_DYN_VCC_ON_SHIFT);
+ return ST25DV_OK;
+}
+
+int32_t st25dv_get_eh_ctrl_dyn_all (st25dv_ctx_t *ctx, uint8_t *value)
+{
+ if( st25dv_readreg(ctx, (ST25DV_EH_CTRL_DYN_REG), (uint8_t *)value, 1))
+ return ST25DV_ERROR;
+ *value &= (ST25DV_EH_CTRL_DYN_ALL_MASK);
+ *value = *value >> (ST25DV_EH_CTRL_DYN_ALL_SHIFT);
+ return ST25DV_OK;
+}
+
+int32_t st25dv_get_rf_mngt_rfdis (st25dv_ctx_t *ctx, uint8_t *value)
+{
+ if( st25dv_readreg(ctx, (ST25DV_RF_MNGT_REG), (uint8_t *)value, 1))
+ return ST25DV_ERROR;
+ *value &= (ST25DV_RF_MNGT_RFDIS_MASK);
+ *value = *value >> (ST25DV_RF_MNGT_RFDIS_SHIFT);
+ return ST25DV_OK;
+}
+
+int32_t st25dv_set_rf_mngt_rfdis (st25dv_ctx_t *ctx, const uint8_t *value)
+{
+ uint8_t reg_value;
+ if( st25dv_readreg(ctx, (ST25DV_RF_MNGT_REG), ®_value, 1))
+ return ST25DV_ERROR;
+
+ reg_value = ( (*value << (ST25DV_RF_MNGT_RFDIS_SHIFT)) & (ST25DV_RF_MNGT_RFDIS_MASK)) |
+ (reg_value & ~(ST25DV_RF_MNGT_RFDIS_MASK));
+
+ if( st25dv_WriteReg(ctx, (ST25DV_RF_MNGT_REG), ®_value, 1))
+ return ST25DV_ERROR;
+ return ST25DV_OK;
+}
+
+int32_t st25dv_get_rf_mngt_rfsleep (st25dv_ctx_t *ctx, uint8_t *value)
+{
+ if( st25dv_readreg(ctx, (ST25DV_RF_MNGT_REG), (uint8_t *)value, 1))
+ return ST25DV_ERROR;
+ *value &= (ST25DV_RF_MNGT_RFSLEEP_MASK);
+ *value = *value >> (ST25DV_RF_MNGT_RFSLEEP_SHIFT);
+ return ST25DV_OK;
+}
+
+int32_t st25dv_set_rf_mngt_rfsleep (st25dv_ctx_t *ctx, const uint8_t *value)
+{
+ uint8_t reg_value;
+ if( st25dv_readreg(ctx, (ST25DV_RF_MNGT_REG), ®_value, 1))
+ return ST25DV_ERROR;
+
+ reg_value = ( (*value << (ST25DV_RF_MNGT_RFSLEEP_SHIFT)) & (ST25DV_RF_MNGT_RFSLEEP_MASK)) |
+ (reg_value & ~(ST25DV_RF_MNGT_RFSLEEP_MASK));
+
+ if( st25dv_WriteReg(ctx, (ST25DV_RF_MNGT_REG), ®_value, 1))
+ return ST25DV_ERROR;
+ return ST25DV_OK;
+}
+
+int32_t st25dv_get_rf_mngt_all (st25dv_ctx_t *ctx, uint8_t *value)
+{
+ if( st25dv_readreg(ctx, (ST25DV_RF_MNGT_REG), (uint8_t *)value, 1))
+ return ST25DV_ERROR;
+ *value &= (ST25DV_RF_MNGT_ALL_MASK);
+ *value = *value >> (ST25DV_RF_MNGT_ALL_SHIFT);
+ return ST25DV_OK;
+}
+
+int32_t st25dv_set_rf_mngt_all (st25dv_ctx_t *ctx, const uint8_t *value)
+{
+ uint8_t reg_value;
+ if( st25dv_readreg(ctx, (ST25DV_RF_MNGT_REG), ®_value, 1))
+ return ST25DV_ERROR;
+
+ reg_value = ( (*value << (ST25DV_RF_MNGT_ALL_SHIFT)) & (ST25DV_RF_MNGT_ALL_MASK)) |
+ (reg_value & ~(ST25DV_RF_MNGT_ALL_MASK));
+
+ if( st25dv_WriteReg(ctx, (ST25DV_RF_MNGT_REG), ®_value, 1))
+ return ST25DV_ERROR;
+ return ST25DV_OK;
+}
+
+int32_t st25dv_get_rf_mngt_dyn_rfdis (st25dv_ctx_t *ctx, uint8_t *value)
+{
+ if( st25dv_readreg(ctx, (ST25DV_RF_MNGT_DYN_REG), (uint8_t *)value, 1))
+ return ST25DV_ERROR;
+ *value &= (ST25DV_RF_MNGT_DYN_RFDIS_MASK);
+ *value = *value >> (ST25DV_RF_MNGT_DYN_RFDIS_SHIFT);
+ return ST25DV_OK;
+}
+
+int32_t st25dv_set_rf_mngt_dyn_rfdis (st25dv_ctx_t *ctx, const uint8_t *value)
+{
+ uint8_t reg_value;
+ if( st25dv_readreg(ctx, (ST25DV_RF_MNGT_DYN_REG), ®_value, 1))
+ return ST25DV_ERROR;
+
+ reg_value = ( (*value << (ST25DV_RF_MNGT_DYN_RFDIS_SHIFT)) & (ST25DV_RF_MNGT_DYN_RFDIS_MASK)) |
+ (reg_value & ~(ST25DV_RF_MNGT_DYN_RFDIS_MASK));
+
+ if( st25dv_WriteReg(ctx, (ST25DV_RF_MNGT_DYN_REG), ®_value, 1))
+ return ST25DV_ERROR;
+ return ST25DV_OK;
+}
+
+int32_t st25dv_get_rf_mngt_dyn_rfsleep (st25dv_ctx_t *ctx, uint8_t *value)
+{
+ if( st25dv_readreg(ctx, (ST25DV_RF_MNGT_DYN_REG), (uint8_t *)value, 1))
+ return ST25DV_ERROR;
+ *value &= (ST25DV_RF_MNGT_DYN_RFSLEEP_MASK);
+ *value = *value >> (ST25DV_RF_MNGT_DYN_RFSLEEP_SHIFT);
+ return ST25DV_OK;
+}
+
+int32_t st25dv_set_rf_mngt_dyn_rfsleep (st25dv_ctx_t *ctx, const uint8_t *value)
+{
+ uint8_t reg_value;
+ if( st25dv_readreg(ctx, (ST25DV_RF_MNGT_DYN_REG), ®_value, 1))
+ return ST25DV_ERROR;
+
+ reg_value = ( (*value << (ST25DV_RF_MNGT_DYN_RFSLEEP_SHIFT)) & (ST25DV_RF_MNGT_DYN_RFSLEEP_MASK)) |
+ (reg_value & ~(ST25DV_RF_MNGT_DYN_RFSLEEP_MASK));
+
+ if( st25dv_WriteReg(ctx, (ST25DV_RF_MNGT_DYN_REG), ®_value, 1))
+ return ST25DV_ERROR;
+ return ST25DV_OK;
+}
+
+int32_t st25dv_get_rf_mngt_dyn_all (st25dv_ctx_t *ctx, uint8_t *value)
+{
+ if( st25dv_readreg(ctx, (ST25DV_RF_MNGT_DYN_REG), (uint8_t *)value, 1))
+ return ST25DV_ERROR;
+ *value &= (ST25DV_RF_MNGT_DYN_ALL_MASK);
+ *value = *value >> (ST25DV_RF_MNGT_DYN_ALL_SHIFT);
+ return ST25DV_OK;
+}
+
+int32_t st25dv_set_rf_mngt_dyn_all (st25dv_ctx_t *ctx, const uint8_t *value)
+{
+ uint8_t reg_value;
+ if( st25dv_readreg(ctx, (ST25DV_RF_MNGT_DYN_REG), ®_value, 1))
+ return ST25DV_ERROR;
+
+ reg_value = ( (*value << (ST25DV_RF_MNGT_DYN_ALL_SHIFT)) & (ST25DV_RF_MNGT_DYN_ALL_MASK)) |
+ (reg_value & ~(ST25DV_RF_MNGT_DYN_ALL_MASK));
+
+ if( st25dv_WriteReg(ctx, (ST25DV_RF_MNGT_DYN_REG), ®_value, 1))
+ return ST25DV_ERROR;
+ return ST25DV_OK;
+}
+
+int32_t st25dv_get_rfa1ss_pwdctrl (st25dv_ctx_t *ctx, uint8_t *value)
+{
+ if( st25dv_readreg(ctx, (ST25DV_RFA1SS_REG), (uint8_t *)value, 1))
+ return ST25DV_ERROR;
+ *value &= (ST25DV_RFA1SS_PWDCTRL_MASK);
+ *value = *value >> (ST25DV_RFA1SS_PWDCTRL_SHIFT);
+ return ST25DV_OK;
+}
+
+int32_t st25dv_set_rfa1ss_pwdctrl (st25dv_ctx_t *ctx, const uint8_t *value)
+{
+ uint8_t reg_value;
+ if( st25dv_readreg(ctx, (ST25DV_RFA1SS_REG), ®_value, 1))
+ return ST25DV_ERROR;
+
+ reg_value = ( (*value << (ST25DV_RFA1SS_PWDCTRL_SHIFT)) & (ST25DV_RFA1SS_PWDCTRL_MASK)) |
+ (reg_value & ~(ST25DV_RFA1SS_PWDCTRL_MASK));
+
+ if( st25dv_WriteReg(ctx, (ST25DV_RFA1SS_REG), ®_value, 1))
+ return ST25DV_ERROR;
+ return ST25DV_OK;
+}
+
+int32_t st25dv_get_rfa1ss_rwprot (st25dv_ctx_t *ctx, uint8_t *value)
+{
+ if( st25dv_readreg(ctx, (ST25DV_RFA1SS_REG), (uint8_t *)value, 1))
+ return ST25DV_ERROR;
+ *value &= (ST25DV_RFA1SS_RWPROT_MASK);
+ *value = *value >> (ST25DV_RFA1SS_RWPROT_SHIFT);
+ return ST25DV_OK;
+}
+
+int32_t st25dv_set_rfa1ss_rwprot (st25dv_ctx_t *ctx, const uint8_t *value)
+{
+ uint8_t reg_value;
+ if( st25dv_readreg(ctx, (ST25DV_RFA1SS_REG), ®_value, 1))
+ return ST25DV_ERROR;
+
+ reg_value = ( (*value << (ST25DV_RFA1SS_RWPROT_SHIFT)) & (ST25DV_RFA1SS_RWPROT_MASK)) |
+ (reg_value & ~(ST25DV_RFA1SS_RWPROT_MASK));
+
+ if( st25dv_WriteReg(ctx, (ST25DV_RFA1SS_REG), ®_value, 1))
+ return ST25DV_ERROR;
+ return ST25DV_OK;
+}
+
+int32_t st25dv_get_rfa1ss_all (st25dv_ctx_t *ctx, uint8_t *value)
+{
+ if( st25dv_readreg(ctx, (ST25DV_RFA1SS_REG), (uint8_t *)value, 1))
+ return ST25DV_ERROR;
+ *value &= (ST25DV_RFA1SS_ALL_MASK);
+ *value = *value >> (ST25DV_RFA1SS_ALL_SHIFT);
+ return ST25DV_OK;
+}
+
+int32_t st25dv_set_rfa1ss_all (st25dv_ctx_t *ctx, const uint8_t *value)
+{
+ uint8_t reg_value;
+ if( st25dv_readreg(ctx, (ST25DV_RFA1SS_REG), ®_value, 1))
+ return ST25DV_ERROR;
+
+ reg_value = ( (*value << (ST25DV_RFA1SS_ALL_SHIFT)) & (ST25DV_RFA1SS_ALL_MASK)) |
+ (reg_value & ~(ST25DV_RFA1SS_ALL_MASK));
+
+ if( st25dv_WriteReg(ctx, (ST25DV_RFA1SS_REG), ®_value, 1))
+ return ST25DV_ERROR;
+ return ST25DV_OK;
+}
+
+int32_t st25dv_get_rfa2ss_pwdctrl (st25dv_ctx_t *ctx, uint8_t *value)
+{
+ if( st25dv_readreg(ctx, (ST25DV_RFA2SS_REG), (uint8_t *)value, 1))
+ return ST25DV_ERROR;
+ *value &= (ST25DV_RFA2SS_PWDCTRL_MASK);
+ *value = *value >> (ST25DV_RFA2SS_PWDCTRL_SHIFT);
+ return ST25DV_OK;
+}
+
+int32_t st25dv_set_rfa2ss_pwdctrl (st25dv_ctx_t *ctx, const uint8_t *value)
+{
+ uint8_t reg_value;
+ if( st25dv_readreg(ctx, (ST25DV_RFA2SS_REG), ®_value, 1))
+ return ST25DV_ERROR;
+
+ reg_value = ( (*value << (ST25DV_RFA2SS_PWDCTRL_SHIFT)) & (ST25DV_RFA2SS_PWDCTRL_MASK)) |
+ (reg_value & ~(ST25DV_RFA2SS_PWDCTRL_MASK));
+
+ if( st25dv_WriteReg(ctx, (ST25DV_RFA2SS_REG), ®_value, 1))
+ return ST25DV_ERROR;
+ return ST25DV_OK;
+}
+
+int32_t st25dv_get_rfa2ss_rwprot (st25dv_ctx_t *ctx, uint8_t *value)
+{
+ if( st25dv_readreg(ctx, (ST25DV_RFA2SS_REG), (uint8_t *)value, 1))
+ return ST25DV_ERROR;
+ *value &= (ST25DV_RFA2SS_RWPROT_MASK);
+ *value = *value >> (ST25DV_RFA2SS_RWPROT_SHIFT);
+ return ST25DV_OK;
+}
+
+int32_t st25dv_set_rfa2ss_rwprot (st25dv_ctx_t *ctx, const uint8_t *value)
+{
+ uint8_t reg_value;
+ if( st25dv_readreg(ctx, (ST25DV_RFA2SS_REG), ®_value, 1))
+ return ST25DV_ERROR;
+
+ reg_value = ( (*value << (ST25DV_RFA2SS_RWPROT_SHIFT)) & (ST25DV_RFA2SS_RWPROT_MASK)) |
+ (reg_value & ~(ST25DV_RFA2SS_RWPROT_MASK));
+
+ if( st25dv_WriteReg(ctx, (ST25DV_RFA2SS_REG), ®_value, 1))
+ return ST25DV_ERROR;
+ return ST25DV_OK;
+}
+
+int32_t st25dv_get_rfa2ss_all (st25dv_ctx_t *ctx, uint8_t *value)
+{
+ if( st25dv_readreg(ctx, (ST25DV_RFA2SS_REG), (uint8_t *)value, 1))
+ return ST25DV_ERROR;
+ *value &= (ST25DV_RFA2SS_ALL_MASK);
+ *value = *value >> (ST25DV_RFA2SS_ALL_SHIFT);
+ return ST25DV_OK;
+}
+
+int32_t st25dv_set_rfa2ss_all (st25dv_ctx_t *ctx, const uint8_t *value)
+{
+ uint8_t reg_value;
+ if( st25dv_readreg(ctx, (ST25DV_RFA2SS_REG), ®_value, 1))
+ return ST25DV_ERROR;
+
+ reg_value = ( (*value << (ST25DV_RFA2SS_ALL_SHIFT)) & (ST25DV_RFA2SS_ALL_MASK)) |
+ (reg_value & ~(ST25DV_RFA2SS_ALL_MASK));
+
+ if( st25dv_WriteReg(ctx, (ST25DV_RFA2SS_REG), ®_value, 1))
+ return ST25DV_ERROR;
+ return ST25DV_OK;
+}
+
+int32_t st25dv_get_rfa3ss_pwdctrl (st25dv_ctx_t *ctx, uint8_t *value)
+{
+ if( st25dv_readreg(ctx, (ST25DV_RFA3SS_REG), (uint8_t *)value, 1))
+ return ST25DV_ERROR;
+ *value &= (ST25DV_RFA3SS_PWDCTRL_MASK);
+ *value = *value >> (ST25DV_RFA3SS_PWDCTRL_SHIFT);
+ return ST25DV_OK;
+}
+
+int32_t st25dv_set_rfa3ss_pwdctrl (st25dv_ctx_t *ctx, const uint8_t *value)
+{
+ uint8_t reg_value;
+ if( st25dv_readreg(ctx, (ST25DV_RFA3SS_REG), ®_value, 1))
+ return ST25DV_ERROR;
+
+ reg_value = ( (*value << (ST25DV_RFA3SS_PWDCTRL_SHIFT)) & (ST25DV_RFA3SS_PWDCTRL_MASK)) |
+ (reg_value & ~(ST25DV_RFA3SS_PWDCTRL_MASK));
+
+ if( st25dv_WriteReg(ctx, (ST25DV_RFA3SS_REG), ®_value, 1))
+ return ST25DV_ERROR;
+ return ST25DV_OK;
+}
+
+int32_t st25dv_get_rfa3ss_rwprot (st25dv_ctx_t *ctx, uint8_t *value)
+{
+ if( st25dv_readreg(ctx, (ST25DV_RFA3SS_REG), (uint8_t *)value, 1))
+ return ST25DV_ERROR;
+ *value &= (ST25DV_RFA3SS_RWPROT_MASK);
+ *value = *value >> (ST25DV_RFA3SS_RWPROT_SHIFT);
+ return ST25DV_OK;
+}
+
+int32_t st25dv_set_rfa3ss_rwprot (st25dv_ctx_t *ctx, const uint8_t *value)
+{
+ uint8_t reg_value;
+ if( st25dv_readreg(ctx, (ST25DV_RFA3SS_REG), ®_value, 1))
+ return ST25DV_ERROR;
+
+ reg_value = ( (*value << (ST25DV_RFA3SS_RWPROT_SHIFT)) & (ST25DV_RFA3SS_RWPROT_MASK)) |
+ (reg_value & ~(ST25DV_RFA3SS_RWPROT_MASK));
+
+ if( st25dv_WriteReg(ctx, (ST25DV_RFA3SS_REG), ®_value, 1))
+ return ST25DV_ERROR;
+ return ST25DV_OK;
+}
+
+int32_t st25dv_get_rfa3ss_all (st25dv_ctx_t *ctx, uint8_t *value)
+{
+ if( st25dv_readreg(ctx, (ST25DV_RFA3SS_REG), (uint8_t *)value, 1))
+ return ST25DV_ERROR;
+ *value &= (ST25DV_RFA3SS_ALL_MASK);
+ *value = *value >> (ST25DV_RFA3SS_ALL_SHIFT);
+ return ST25DV_OK;
+}
+
+int32_t st25dv_set_rfa3ss_all (st25dv_ctx_t *ctx, const uint8_t *value)
+{
+ uint8_t reg_value;
+ if( st25dv_readreg(ctx, (ST25DV_RFA3SS_REG), ®_value, 1))
+ return ST25DV_ERROR;
+
+ reg_value = ( (*value << (ST25DV_RFA3SS_ALL_SHIFT)) & (ST25DV_RFA3SS_ALL_MASK)) |
+ (reg_value & ~(ST25DV_RFA3SS_ALL_MASK));
+
+ if( st25dv_WriteReg(ctx, (ST25DV_RFA3SS_REG), ®_value, 1))
+ return ST25DV_ERROR;
+ return ST25DV_OK;
+}
+
+int32_t st25dv_get_rfa4ss_pwdctrl (st25dv_ctx_t *ctx, uint8_t *value)
+{
+ if( st25dv_readreg(ctx, (ST25DV_RFA4SS_REG), (uint8_t *)value, 1))
+ return ST25DV_ERROR;
+ *value &= (ST25DV_RFA4SS_PWDCTRL_MASK);
+ *value = *value >> (ST25DV_RFA4SS_PWDCTRL_SHIFT);
+ return ST25DV_OK;
+}
+
+int32_t st25dv_set_rfa4ss_pwdctrl (st25dv_ctx_t *ctx, const uint8_t *value)
+{
+ uint8_t reg_value;
+ if( st25dv_readreg(ctx, (ST25DV_RFA4SS_REG), ®_value, 1))
+ return ST25DV_ERROR;
+
+ reg_value = ( (*value << (ST25DV_RFA4SS_PWDCTRL_SHIFT)) & (ST25DV_RFA4SS_PWDCTRL_MASK)) |
+ (reg_value & ~(ST25DV_RFA4SS_PWDCTRL_MASK));
+
+ if( st25dv_WriteReg(ctx, (ST25DV_RFA4SS_REG), ®_value, 1))
+ return ST25DV_ERROR;
+ return ST25DV_OK;
+}
+
+int32_t st25dv_get_rfa4ss_rwprot (st25dv_ctx_t *ctx, uint8_t *value)
+{
+ if( st25dv_readreg(ctx, (ST25DV_RFA4SS_REG), (uint8_t *)value, 1))
+ return ST25DV_ERROR;
+ *value &= (ST25DV_RFA4SS_RWPROT_MASK);
+ *value = *value >> (ST25DV_RFA4SS_RWPROT_SHIFT);
+ return ST25DV_OK;
+}
+
+int32_t st25dv_set_rfa4ss_rwprot (st25dv_ctx_t *ctx, const uint8_t *value)
+{
+ uint8_t reg_value;
+ if( st25dv_readreg(ctx, (ST25DV_RFA4SS_REG), ®_value, 1))
+ return ST25DV_ERROR;
+
+ reg_value = ( (*value << (ST25DV_RFA4SS_RWPROT_SHIFT)) & (ST25DV_RFA4SS_RWPROT_MASK)) |
+ (reg_value & ~(ST25DV_RFA4SS_RWPROT_MASK));
+
+ if( st25dv_WriteReg(ctx, (ST25DV_RFA4SS_REG), ®_value, 1))
+ return ST25DV_ERROR;
+ return ST25DV_OK;
+}
+
+int32_t st25dv_get_rfa4ss_all (st25dv_ctx_t *ctx, uint8_t *value)
+{
+ if( st25dv_readreg(ctx, (ST25DV_RFA4SS_REG), (uint8_t *)value, 1))
+ return ST25DV_ERROR;
+ *value &= (ST25DV_RFA4SS_ALL_MASK);
+ *value = *value >> (ST25DV_RFA4SS_ALL_SHIFT);
+ return ST25DV_OK;
+}
+
+int32_t st25dv_set_rfa4ss_all (st25dv_ctx_t *ctx, const uint8_t *value)
+{
+ uint8_t reg_value;
+ if( st25dv_readreg(ctx, (ST25DV_RFA4SS_REG), ®_value, 1))
+ return ST25DV_ERROR;
+
+ reg_value = ( (*value << (ST25DV_RFA4SS_ALL_SHIFT)) & (ST25DV_RFA4SS_ALL_MASK)) |
+ (reg_value & ~(ST25DV_RFA4SS_ALL_MASK));
+
+ if( st25dv_WriteReg(ctx, (ST25DV_RFA4SS_REG), ®_value, 1))
+ return ST25DV_ERROR;
+ return ST25DV_OK;
+}
+
+int32_t st25dv_get_i2css_pz1 (st25dv_ctx_t *ctx, uint8_t *value)
+{
+ if( st25dv_readreg(ctx, (ST25DV_I2CSS_REG), (uint8_t *)value, 1))
+ return ST25DV_ERROR;
+ *value &= (ST25DV_I2CSS_PZ1_MASK);
+ *value = *value >> (ST25DV_I2CSS_PZ1_SHIFT);
+ return ST25DV_OK;
+}
+
+int32_t st25dv_set_i2css_pz1 (st25dv_ctx_t *ctx, const uint8_t *value)
+{
+ uint8_t reg_value;
+ if( st25dv_readreg(ctx, (ST25DV_I2CSS_REG), ®_value, 1))
+ return ST25DV_ERROR;
+
+ reg_value = ( (*value << (ST25DV_I2CSS_PZ1_SHIFT)) & (ST25DV_I2CSS_PZ1_MASK)) |
+ (reg_value & ~(ST25DV_I2CSS_PZ1_MASK));
+
+ if( st25dv_WriteReg(ctx, (ST25DV_I2CSS_REG), ®_value, 1))
+ return ST25DV_ERROR;
+ return ST25DV_OK;
+}
+
+int32_t st25dv_get_i2css_pz2 (st25dv_ctx_t *ctx, uint8_t *value)
+{
+ if( st25dv_readreg(ctx, (ST25DV_I2CSS_REG), (uint8_t *)value, 1))
+ return ST25DV_ERROR;
+ *value &= (ST25DV_I2CSS_PZ2_MASK);
+ *value = *value >> (ST25DV_I2CSS_PZ2_SHIFT);
+ return ST25DV_OK;
+}
+
+int32_t st25dv_set_i2css_pz2 (st25dv_ctx_t *ctx, const uint8_t *value)
+{
+ uint8_t reg_value;
+ if( st25dv_readreg(ctx, (ST25DV_I2CSS_REG), ®_value, 1))
+ return ST25DV_ERROR;
+
+ reg_value = ( (*value << (ST25DV_I2CSS_PZ2_SHIFT)) & (ST25DV_I2CSS_PZ2_MASK)) |
+ (reg_value & ~(ST25DV_I2CSS_PZ2_MASK));
+
+ if( st25dv_WriteReg(ctx, (ST25DV_I2CSS_REG), ®_value, 1))
+ return ST25DV_ERROR;
+ return ST25DV_OK;
+}
+
+int32_t st25dv_get_i2css_pz3 (st25dv_ctx_t *ctx, uint8_t *value)
+{
+ if( st25dv_readreg(ctx, (ST25DV_I2CSS_REG), (uint8_t *)value, 1))
+ return ST25DV_ERROR;
+ *value &= (ST25DV_I2CSS_PZ3_MASK);
+ *value = *value >> (ST25DV_I2CSS_PZ3_SHIFT);
+ return ST25DV_OK;
+}
+
+int32_t st25dv_set_i2css_pz3 (st25dv_ctx_t *ctx, const uint8_t *value)
+{
+ uint8_t reg_value;
+ if( st25dv_readreg(ctx, (ST25DV_I2CSS_REG), ®_value, 1))
+ return ST25DV_ERROR;
+
+ reg_value = ( (*value << (ST25DV_I2CSS_PZ3_SHIFT)) & (ST25DV_I2CSS_PZ3_MASK)) |
+ (reg_value & ~(ST25DV_I2CSS_PZ3_MASK));
+
+ if( st25dv_WriteReg(ctx, (ST25DV_I2CSS_REG), ®_value, 1))
+ return ST25DV_ERROR;
+ return ST25DV_OK;
+}
+
+int32_t st25dv_get_i2css_pz4 (st25dv_ctx_t *ctx, uint8_t *value)
+{
+ if( st25dv_readreg(ctx, (ST25DV_I2CSS_REG), (uint8_t *)value, 1))
+ return ST25DV_ERROR;
+ *value &= (ST25DV_I2CSS_PZ4_MASK);
+ *value = *value >> (ST25DV_I2CSS_PZ4_SHIFT);
+ return ST25DV_OK;
+}
+
+int32_t st25dv_set_i2css_pz4 (st25dv_ctx_t *ctx, const uint8_t *value)
+{
+ uint8_t reg_value;
+ if( st25dv_readreg(ctx, (ST25DV_I2CSS_REG), ®_value, 1))
+ return ST25DV_ERROR;
+
+ reg_value = ( (*value << (ST25DV_I2CSS_PZ4_SHIFT)) & (ST25DV_I2CSS_PZ4_MASK)) |
+ (reg_value & ~(ST25DV_I2CSS_PZ4_MASK));
+
+ if( st25dv_WriteReg(ctx, (ST25DV_I2CSS_REG), ®_value, 1))
+ return ST25DV_ERROR;
+ return ST25DV_OK;
+}
+
+int32_t st25dv_get_i2css_all (st25dv_ctx_t *ctx, uint8_t *value)
+{
+ if( st25dv_readreg(ctx, (ST25DV_I2CSS_REG), (uint8_t *)value, 1))
+ return ST25DV_ERROR;
+ return ST25DV_OK;
+}
+
+int32_t st25dv_set_i2css_all (st25dv_ctx_t *ctx, const uint8_t *value)
+{
+ if( st25dv_WriteReg(ctx, (ST25DV_I2CSS_REG), value, 1))
+ return ST25DV_ERROR;
+ return ST25DV_OK;
+}
+
+int32_t st25dv_get_lockccfile_blck0 (st25dv_ctx_t *ctx, uint8_t *value)
+{
+ if( st25dv_readreg(ctx, (ST25DV_LOCKCCFILE_REG), (uint8_t *)value, 1))
+ return ST25DV_ERROR;
+ *value &= (ST25DV_LOCKCCFILE_BLCK0_MASK);
+ *value = *value >> (ST25DV_LOCKCCFILE_BLCK0_SHIFT);
+ return ST25DV_OK;
+}
+
+int32_t st25dv_set_lockccfile_blck0 (st25dv_ctx_t *ctx, const uint8_t *value)
+{
+ uint8_t reg_value;
+ if( st25dv_readreg(ctx, (ST25DV_LOCKCCFILE_REG), ®_value, 1))
+ return ST25DV_ERROR;
+
+ reg_value = ( (*value << (ST25DV_LOCKCCFILE_BLCK0_SHIFT)) & (ST25DV_LOCKCCFILE_BLCK0_MASK)) |
+ (reg_value & ~(ST25DV_LOCKCCFILE_BLCK0_MASK));
+
+ if( st25dv_WriteReg(ctx, (ST25DV_LOCKCCFILE_REG), ®_value, 1))
+ return ST25DV_ERROR;
+ return ST25DV_OK;
+}
+
+int32_t st25dv_get_lockccfile_blck1 (st25dv_ctx_t *ctx, uint8_t *value)
+{
+ if( st25dv_readreg(ctx, (ST25DV_LOCKCCFILE_REG), (uint8_t *)value, 1))
+ return ST25DV_ERROR;
+ *value &= (ST25DV_LOCKCCFILE_BLCK1_MASK);
+ *value = *value >> (ST25DV_LOCKCCFILE_BLCK1_SHIFT);
+ return ST25DV_OK;
+}
+
+int32_t st25dv_set_lockccfile_blck1 (st25dv_ctx_t *ctx, const uint8_t *value)
+{
+ uint8_t reg_value;
+ if( st25dv_readreg(ctx, (ST25DV_LOCKCCFILE_REG), ®_value, 1))
+ return ST25DV_ERROR;
+
+ reg_value = ( (*value << (ST25DV_LOCKCCFILE_BLCK1_SHIFT)) & (ST25DV_LOCKCCFILE_BLCK1_MASK)) |
+ (reg_value & ~(ST25DV_LOCKCCFILE_BLCK1_MASK));
+
+ if( st25dv_WriteReg(ctx, (ST25DV_LOCKCCFILE_REG), ®_value, 1))
+ return ST25DV_ERROR;
+ return ST25DV_OK;
+}
+
+int32_t st25dv_get_lockccfile_all (st25dv_ctx_t *ctx, uint8_t *value)
+{
+ if( st25dv_readreg(ctx, (ST25DV_LOCKCCFILE_REG), (uint8_t *)value, 1))
+ return ST25DV_ERROR;
+ *value &= (ST25DV_LOCKCCFILE_ALL_MASK);
+ *value = *value >> (ST25DV_LOCKCCFILE_ALL_SHIFT);
+ return ST25DV_OK;
+}
+
+int32_t st25dv_set_lockccfile_all (st25dv_ctx_t *ctx, const uint8_t *value)
+{
+ uint8_t reg_value;
+ if( st25dv_readreg(ctx, (ST25DV_LOCKCCFILE_REG), ®_value, 1))
+ return ST25DV_ERROR;
+
+ reg_value = ( (*value << (ST25DV_LOCKCCFILE_ALL_SHIFT)) & (ST25DV_LOCKCCFILE_ALL_MASK)) |
+ (reg_value & ~(ST25DV_LOCKCCFILE_ALL_MASK));
+
+ if( st25dv_WriteReg(ctx, (ST25DV_LOCKCCFILE_REG), ®_value, 1))
+ return ST25DV_ERROR;
+ return ST25DV_OK;
+}
+
+int32_t st25dv_get_lockcfg_b0 (st25dv_ctx_t *ctx, uint8_t *value)
+{
+ if( st25dv_readreg(ctx, (ST25DV_LOCKCFG_REG), (uint8_t *)value, 1))
+ return ST25DV_ERROR;
+ *value &= (ST25DV_LOCKCFG_B0_MASK);
+ *value = *value >> (ST25DV_LOCKCFG_B0_SHIFT);
+ return ST25DV_OK;
+}
+
+int32_t st25dv_set_lockcfg_b0 (st25dv_ctx_t *ctx, const uint8_t *value)
+{
+ uint8_t reg_value;
+ if( st25dv_readreg(ctx, (ST25DV_LOCKCFG_REG), ®_value, 1))
+ return ST25DV_ERROR;
+
+ reg_value = ( (*value << (ST25DV_LOCKCFG_B0_SHIFT)) & (ST25DV_LOCKCFG_B0_MASK)) |
+ (reg_value & ~(ST25DV_LOCKCFG_B0_MASK));
+
+ if( st25dv_WriteReg(ctx, (ST25DV_LOCKCFG_REG), ®_value, 1))
+ return ST25DV_ERROR;
+ return ST25DV_OK;
+}
+
+int32_t st25dv_get_i2c_sso_dyn_i2csso (st25dv_ctx_t *ctx, uint8_t *value)
+{
+ if( st25dv_readreg(ctx, (ST25DV_I2C_SSO_DYN_REG), (uint8_t *)value, 1))
+ return ST25DV_ERROR;
+ *value &= (ST25DV_I2C_SSO_DYN_I2CSSO_MASK);
+ *value = *value >> (ST25DV_I2C_SSO_DYN_I2CSSO_SHIFT);
+ return ST25DV_OK;
+}
+
+
+
diff --git a/P3_SETR2/Components/st25dv/st25dv_reg.h b/P3_SETR2/Components/st25dv/st25dv_reg.h
new file mode 100644
index 0000000..aefbf41
--- /dev/null
+++ b/P3_SETR2/Components/st25dv/st25dv_reg.h
@@ -0,0 +1,501 @@
+/**
+ ******************************************************************************
+ * @file st25dv_reg.h
+ * @author MMY Application Team
+ * @brief This file provides set of functions to access st25dv-i2c registers.
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2016 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ ******************************************************************************
+ */
+#ifndef ST25DV_REG_H
+#define ST25DV_REG_H
+
+#include
+
+/* Registers i2c address */
+/** @brief ST25DV GPO register address. */
+#define ST25DV_GPO_REG 0x0000
+/** @brief ST25DV IT duration register address. */
+#define ST25DV_ITTIME_REG 0x0001
+/** @brief ST25DV Energy Harvesting register address. */
+#define ST25DV_EH_MODE_REG 0x0002
+/** @brief ST25DV RF management register address. */
+#define ST25DV_RF_MNGT_REG 0x0003
+/** @brief ST25DV Area 1 security register address. */
+#define ST25DV_RFA1SS_REG 0x0004
+/** @brief ST25DV Area 1 end address register address. */
+#define ST25DV_ENDA1_REG 0x0005
+/** @brief ST25DV Area 2 security register address. */
+#define ST25DV_RFA2SS_REG 0x0006
+/** @brief ST25DV Area 2 end address register address. */
+#define ST25DV_ENDA2_REG 0x0007
+/** @brief ST25DV Area 3 security register address. */
+#define ST25DV_RFA3SS_REG 0x0008
+/** @brief ST25DV Area 3 end address register address. */
+#define ST25DV_ENDA3_REG 0x0009
+/** @brief ST25DV Area 4 security register address. */
+#define ST25DV_RFA4SS_REG 0x000A
+/** @brief ST25DV I2C security register address. */
+#define ST25DV_I2CSS_REG 0x000B
+/** @brief ST25DV Capability Container lock register address. */
+#define ST25DV_LOCKCCFILE_REG 0x000C
+/** @brief ST25DV Mailbox mode register address. */
+#define ST25DV_MB_MODE_REG 0x000D
+/** @brief ST25DV Mailbox Watchdog register address. */
+#define ST25DV_MB_WDG_REG 0x000E
+/** @brief ST25DV Configuration lock register address. */
+#define ST25DV_LOCKCFG_REG 0x000F
+/** @brief ST25DV DSFID lock register address. */
+#define ST25DV_LOCKDSFID_REG 0x0010
+/** @brief ST25DV AFI lock register address. */
+#define ST25DV_LOCKAFI_REG 0x0011
+/** @brief ST25DV DSFID register address. */
+#define ST25DV_DSFID_REG 0x0012
+/** @brief ST25DV AFI register address. */
+#define ST25DV_AFI_REG 0x0013
+/** @brief ST25DV Memory size register address. */
+#define ST25DV_MEM_SIZE_LSB_REG 0x0014
+/** @brief ST25DV Memory size register address. */
+#define ST25DV_MEM_SIZE_MSB_REG 0x0015
+/** @brief ST25DV Block size register address. */
+#define ST25DV_BLK_SIZE_REG 0x0016
+//** @brief ST25DV ICref register address. */
+#define ST25DV_ICREF_REG 0x0017
+/** @brief ST25DV UID register address. */
+#define ST25DV_UID_REG 0x0018
+/** @brief ST25DV IC revision register address. */
+#define ST25DV_ICREV_REG 0x0020
+/** @brief ST25DV I2C password register address. */
+#define ST25DV_I2CPASSWD_REG 0x0900
+
+/* Dynamic Registers i2c address */
+/** @brief ST25DV GPO dynamic register address. */
+#define ST25DV_GPO_DYN_REG 0x2000
+/** @brief ST25DV Energy Harvesting control dynamic register address. */
+#define ST25DV_EH_CTRL_DYN_REG 0x2002
+/** @brief ST25DV RF management dynamic register address. */
+#define ST25DV_RF_MNGT_DYN_REG 0x2003
+/** @brief ST25DV I2C secure session opened dynamic register address. */
+#define ST25DV_I2C_SSO_DYN_REG 0x2004
+/** @brief ST25DV Interrupt status dynamic register address. */
+#define ST25DV_ITSTS_DYN_REG 0x2005
+/** @brief ST25DV Mailbox control dynamic register address. */
+#define ST25DV_MB_CTRL_DYN_REG 0x2006
+/** @brief ST25DV Mailbox message length dynamic register address. */
+#define ST25DV_MBLEN_DYN_REG 0x2007
+/** @brief ST25DV Mailbox buffer address. */
+#define ST25DV_MAILBOX_RAM_REG 0x2008
+
+/* Registers fields definitions */
+/* MB_MODE */
+#define ST25DV_MB_MODE_RW_SHIFT (0)
+#define ST25DV_MB_MODE_RW_FIELD 0xFE
+#define ST25DV_MB_MODE_RW_MASK 0x01
+
+/* MB_LEN_Dyn */
+#define ST25DV_MBLEN_DYN_MBLEN_SHIFT (0)
+#define ST25DV_MBLEN_DYN_MBLEN_FIELD 0x00
+#define ST25DV_MBLEN_DYN_MBLEN_MASK 0xFF
+
+/* MB_CTRL_Dyn */
+#define ST25DV_MB_CTRL_DYN_MBEN_SHIFT (0)
+#define ST25DV_MB_CTRL_DYN_MBEN_FIELD 0xFE
+#define ST25DV_MB_CTRL_DYN_MBEN_MASK 0x01
+#define ST25DV_MB_CTRL_DYN_HOSTPUTMSG_SHIFT (1)
+#define ST25DV_MB_CTRL_DYN_HOSTPUTMSG_FIELD 0xFD
+#define ST25DV_MB_CTRL_DYN_HOSTPUTMSG_MASK 0x02
+#define ST25DV_MB_CTRL_DYN_RFPUTMSG_SHIFT (2)
+#define ST25DV_MB_CTRL_DYN_RFPUTMSG_FIELD 0xFB
+#define ST25DV_MB_CTRL_DYN_RFPUTMSG_MASK 0x04
+#define ST25DV_MB_CTRL_DYN_STRESERVED_SHIFT (3)
+#define ST25DV_MB_CTRL_DYN_STRESERVED_FIELD 0xF7
+#define ST25DV_MB_CTRL_DYN_STRESERVED_MASK 0x08
+#define ST25DV_MB_CTRL_DYN_HOSTMISSMSG_SHIFT (4)
+#define ST25DV_MB_CTRL_DYN_HOSTMISSMSG_FIELD 0xEF
+#define ST25DV_MB_CTRL_DYN_HOSTMISSMSG_MASK 0x10
+#define ST25DV_MB_CTRL_DYN_RFMISSMSG_SHIFT (5)
+#define ST25DV_MB_CTRL_DYN_RFMISSMSG_FIELD 0xDF
+#define ST25DV_MB_CTRL_DYN_RFMISSMSG_MASK 0x20
+#define ST25DV_MB_CTRL_DYN_CURRENTMSG_SHIFT (6)
+#define ST25DV_MB_CTRL_DYN_CURRENTMSG_FIELD 0x3F
+#define ST25DV_MB_CTRL_DYN_CURRENTMSG_MASK 0xC0
+
+
+/* MB_WDG */
+#define ST25DV_MB_WDG_DELAY_SHIFT (0)
+#define ST25DV_MB_WDG_DELAY_FIELD 0xF8
+#define ST25DV_MB_WDG_DELAY_MASK 0x07
+
+/* GPO */
+#define ST25DV_GPO_RFUSERSTATE_SHIFT (0)
+#define ST25DV_GPO_RFUSERSTATE_FIELD 0xFE
+#define ST25DV_GPO_RFUSERSTATE_MASK 0x01
+#define ST25DV_GPO_RFACTIVITY_SHIFT (1)
+#define ST25DV_GPO_RFACTIVITY_FIELD 0xFD
+#define ST25DV_GPO_RFACTIVITY_MASK 0x02
+#define ST25DV_GPO_RFINTERRUPT_SHIFT (2)
+#define ST25DV_GPO_RFINTERRUPT_FIELD 0xFB
+#define ST25DV_GPO_RFINTERRUPT_MASK 0x04
+#define ST25DV_GPO_FIELDCHANGE_SHIFT (3)
+#define ST25DV_GPO_FIELDCHANGE_FIELD 0xF7
+#define ST25DV_GPO_FIELDCHANGE_MASK 0x08
+#define ST25DV_GPO_RFPUTMSG_SHIFT (4)
+#define ST25DV_GPO_RFPUTMSG_FIELD 0xEF
+#define ST25DV_GPO_RFPUTMSG_MASK 0x10
+#define ST25DV_GPO_RFGETMSG_SHIFT (5)
+#define ST25DV_GPO_RFGETMSG_FIELD 0xDF
+#define ST25DV_GPO_RFGETMSG_MASK 0x20
+#define ST25DV_GPO_RFWRITE_SHIFT (6)
+#define ST25DV_GPO_RFWRITE_FIELD 0xBF
+#define ST25DV_GPO_RFWRITE_MASK 0x40
+#define ST25DV_GPO_ENABLE_SHIFT (7)
+#define ST25DV_GPO_ENABLE_FIELD 0x7F
+#define ST25DV_GPO_ENABLE_MASK 0x80
+#define ST25DV_GPO_ALL_SHIFT (0)
+#define ST25DV_GPO_ALL_MASK 0xFF
+
+/* GPO_Dyn */
+#define ST25DV_GPO_DYN_RFUSERSTATE_SHIFT (0)
+#define ST25DV_GPO_DYN_RFUSERSTATE_FIELD 0xFE
+#define ST25DV_GPO_DYN_RFUSERSTATE_MASK 0x01
+#define ST25DV_GPO_DYN_RFACTIVITY_SHIFT (1)
+#define ST25DV_GPO_DYN_RFACTIVITY_FIELD 0xFD
+#define ST25DV_GPO_DYN_RFACTIVITY_MASK 0x02
+#define ST25DV_GPO_DYN_RFINTERRUPT_SHIFT (2)
+#define ST25DV_GPO_DYN_RFINTERRUPT_FIELD 0xFB
+#define ST25DV_GPO_DYN_RFINTERRUPT_MASK 0x04
+#define ST25DV_GPO_DYN_FIELDCHANGE_SHIFT (3)
+#define ST25DV_GPO_DYN_FIELDCHANGE_FIELD 0xF7
+#define ST25DV_GPO_DYN_FIELDCHANGE_MASK 0x08
+#define ST25DV_GPO_DYN_RFPUTMSG_SHIFT (4)
+#define ST25DV_GPO_DYN_RFPUTMSG_FIELD 0xEF
+#define ST25DV_GPO_DYN_RFPUTMSG_MASK 0x10
+#define ST25DV_GPO_DYN_RFGETMSG_SHIFT (5)
+#define ST25DV_GPO_DYN_RFGETMSG_FIELD 0xDF
+#define ST25DV_GPO_DYN_RFGETMSG_MASK 0x20
+#define ST25DV_GPO_DYN_RFWRITE_SHIFT (6)
+#define ST25DV_GPO_DYN_RFWRITE_FIELD 0xBF
+#define ST25DV_GPO_DYN_RFWRITE_MASK 0x40
+#define ST25DV_GPO_DYN_ENABLE_SHIFT (7)
+#define ST25DV_GPO_DYN_ENABLE_FIELD 0x7F
+#define ST25DV_GPO_DYN_ENABLE_MASK 0x80
+#define ST25DV_GPO_DYN_ALL_SHIFT (0)
+#define ST25DV_GPO_DYN_ALL_MASK 0xFF
+
+/* ITTIME */
+#define ST25DV_ITTIME_DELAY_SHIFT (0)
+#define ST25DV_ITTIME_DELAY_FIELD 0xFC
+#define ST25DV_ITTIME_DELAY_MASK 0x03
+
+/* ITSTS_Dyn */
+#define ST25DV_ITSTS_DYN_RFUSERSTATE_SHIFT (0)
+#define ST25DV_ITSTS_DYN_RFUSERSTATE_FIELD 0xFE
+#define ST25DV_ITSTS_DYN_RFUSERSTATE_MASK 0x01
+#define ST25DV_ITSTS_DYN_RFACTIVITY_SHIFT (1)
+#define ST25DV_ITSTS_DYN_RFACTIVITY_FIELD 0xFD
+#define ST25DV_ITSTS_DYN_RFACTIVITY_MASK 0x02
+#define ST25DV_ITSTS_DYN_RFINTERRUPT_SHIFT (2)
+#define ST25DV_ITSTS_DYN_RFINTERRUPT_FIELD 0xFB
+#define ST25DV_ITSTS_DYN_RFINTERRUPT_MASK 0x04
+#define ST25DV_ITSTS_DYN_FIELDFALLING_SHIFT (3)
+#define ST25DV_ITSTS_DYN_FIELDFALLING_FIELD 0xF7
+#define ST25DV_ITSTS_DYN_FIELDFALLING_MASK 0x08
+#define ST25DV_ITSTS_DYN_FIELDRISING_SHIFT (4)
+#define ST25DV_ITSTS_DYN_FIELDRISING_FIELD 0xEF
+#define ST25DV_ITSTS_DYN_FIELDRISING_MASK 0x10
+#define ST25DV_ITSTS_DYN_RFPUTMSG_SHIFT (5)
+#define ST25DV_ITSTS_DYN_RFPUTMSG_FIELD 0xDF
+#define ST25DV_ITSTS_DYN_RFPUTMSG_MASK 0x20
+#define ST25DV_ITSTS_DYN_RFGETMSG_SHIFT (6)
+#define ST25DV_ITSTS_DYN_RFGETMSG_FIELD 0xBF
+#define ST25DV_ITSTS_DYN_RFGETMSG_MASK 0x40
+#define ST25DV_ITSTS_DYN_RFWRITE_SHIFT (7)
+#define ST25DV_ITSTS_DYN_RFWRITE_FIELD 0x7F
+#define ST25DV_ITSTS_DYN_RFWRITE_MASK 0x80
+
+/* EH_MODE */
+#define ST25DV_EH_MODE_SHIFT (0)
+#define ST25DV_EH_MODE_FIELD 0xFE
+#define ST25DV_EH_MODE_MASK 0x01
+
+/* EH_CTRL_Dyn */
+#define ST25DV_EH_CTRL_DYN_EH_EN_SHIFT (0)
+#define ST25DV_EH_CTRL_DYN_EH_EN_FIELD 0xFE
+#define ST25DV_EH_CTRL_DYN_EH_EN_MASK 0x01
+#define ST25DV_EH_CTRL_DYN_EH_ON_SHIFT (1)
+#define ST25DV_EH_CTRL_DYN_EH_ON_FIELD 0xFD
+#define ST25DV_EH_CTRL_DYN_EH_ON_MASK 0x02
+#define ST25DV_EH_CTRL_DYN_FIELD_ON_SHIFT (2)
+#define ST25DV_EH_CTRL_DYN_FIELD_ON_FIELD 0xFB
+#define ST25DV_EH_CTRL_DYN_FIELD_ON_MASK 0x04
+#define ST25DV_EH_CTRL_DYN_VCC_ON_SHIFT (3)
+#define ST25DV_EH_CTRL_DYN_VCC_ON_FIELD 0xF7
+#define ST25DV_EH_CTRL_DYN_VCC_ON_MASK 0x08
+#define ST25DV_EH_CTRL_DYN_ALL_SHIFT (0)
+#define ST25DV_EH_CTRL_DYN_ALL_MASK 0x0F
+
+/* RF_MNGT */
+#define ST25DV_RF_MNGT_RFDIS_SHIFT (0)
+#define ST25DV_RF_MNGT_RFDIS_FIELD 0xFE
+#define ST25DV_RF_MNGT_RFDIS_MASK 0x01
+#define ST25DV_RF_MNGT_RFSLEEP_SHIFT (1)
+#define ST25DV_RF_MNGT_RFSLEEP_FIELD 0xFD
+#define ST25DV_RF_MNGT_RFSLEEP_MASK 0x02
+#define ST25DV_RF_MNGT_ALL_SHIFT (0)
+#define ST25DV_RF_MNGT_ALL_MASK 0x03
+
+/* RF_MNGT_Dyn */
+#define ST25DV_RF_MNGT_DYN_RFDIS_SHIFT (0)
+#define ST25DV_RF_MNGT_DYN_RFDIS_FIELD 0xFE
+#define ST25DV_RF_MNGT_DYN_RFDIS_MASK 0x01
+#define ST25DV_RF_MNGT_DYN_RFSLEEP_SHIFT (1)
+#define ST25DV_RF_MNGT_DYN_RFSLEEP_FIELD 0xFD
+#define ST25DV_RF_MNGT_DYN_RFSLEEP_MASK 0x02
+#define ST25DV_RF_MNGT_DYN_ALL_SHIFT (0)
+#define ST25DV_RF_MNGT_DYN_ALL_MASK 0x03
+
+/* RFA1SS */
+#define ST25DV_RFA1SS_PWDCTRL_SHIFT (0)
+#define ST25DV_RFA1SS_PWDCTRL_FIELD 0xFC
+#define ST25DV_RFA1SS_PWDCTRL_MASK 0x03
+#define ST25DV_RFA1SS_RWPROT_SHIFT (2)
+#define ST25DV_RFA1SS_RWPROT_FIELD 0xF3
+#define ST25DV_RFA1SS_RWPROT_MASK 0x0C
+#define ST25DV_RFA1SS_ALL_SHIFT (0)
+#define ST25DV_RFA1SS_ALL_MASK 0x0F
+
+/* RFA2SS */
+#define ST25DV_RFA2SS_PWDCTRL_SHIFT (0)
+#define ST25DV_RFA2SS_PWDCTRL_FIELD 0xFC
+#define ST25DV_RFA2SS_PWDCTRL_MASK 0x03
+#define ST25DV_RFA2SS_RWPROT_SHIFT (2)
+#define ST25DV_RFA2SS_RWPROT_FIELD 0xF3
+#define ST25DV_RFA2SS_RWPROT_MASK 0x0C
+#define ST25DV_RFA2SS_ALL_SHIFT (0)
+#define ST25DV_RFA2SS_ALL_MASK 0x0F
+
+/* RFA3SS */
+#define ST25DV_RFA3SS_PWDCTRL_SHIFT (0)
+#define ST25DV_RFA3SS_PWDCTRL_FIELD 0xFC
+#define ST25DV_RFA3SS_PWDCTRL_MASK 0x03
+#define ST25DV_RFA3SS_RWPROT_SHIFT (2)
+#define ST25DV_RFA3SS_RWPROT_FIELD 0xF3
+#define ST25DV_RFA3SS_RWPROT_MASK 0x0C
+#define ST25DV_RFA3SS_ALL_SHIFT (0)
+#define ST25DV_RFA3SS_ALL_MASK 0x0F
+
+/* RFA4SS */
+#define ST25DV_RFA4SS_PWDCTRL_SHIFT (0)
+#define ST25DV_RFA4SS_PWDCTRL_FIELD 0xFC
+#define ST25DV_RFA4SS_PWDCTRL_MASK 0x03
+#define ST25DV_RFA4SS_RWPROT_SHIFT (2)
+#define ST25DV_RFA4SS_RWPROT_FIELD 0xF3
+#define ST25DV_RFA4SS_RWPROT_MASK 0x0C
+#define ST25DV_RFA4SS_ALL_SHIFT (0)
+#define ST25DV_RFA4SS_ALL_MASK 0x0F
+
+/* I2CSS */
+#define ST25DV_I2CSS_PZ1_SHIFT (0)
+#define ST25DV_I2CSS_PZ1_FIELD 0xFC
+#define ST25DV_I2CSS_PZ1_MASK 0x03
+#define ST25DV_I2CSS_PZ2_SHIFT (2)
+#define ST25DV_I2CSS_PZ2_FIELD 0xF3
+#define ST25DV_I2CSS_PZ2_MASK 0x0C
+#define ST25DV_I2CSS_PZ3_SHIFT (4)
+#define ST25DV_I2CSS_PZ3_FIELD 0xCF
+#define ST25DV_I2CSS_PZ3_MASK 0x30
+#define ST25DV_I2CSS_PZ4_SHIFT (6)
+#define ST25DV_I2CSS_PZ4_FIELD 0x3F
+#define ST25DV_I2CSS_PZ4_MASK 0xC0
+
+/* LOCKCCFILE */
+#define ST25DV_LOCKCCFILE_BLCK0_SHIFT (0)
+#define ST25DV_LOCKCCFILE_BLCK0_FIELD 0xFE
+#define ST25DV_LOCKCCFILE_BLCK0_MASK 0x01
+#define ST25DV_LOCKCCFILE_BLCK1_SHIFT (1)
+#define ST25DV_LOCKCCFILE_BLCK1_FIELD 0xFD
+#define ST25DV_LOCKCCFILE_BLCK1_MASK 0x02
+#define ST25DV_LOCKCCFILE_ALL_SHIFT (0)
+#define ST25DV_LOCKCCFILE_ALL_MASK 0x03
+
+/* LOCKCFG */
+#define ST25DV_LOCKCFG_B0_SHIFT (0)
+#define ST25DV_LOCKCFG_B0_FIELD 0xFE
+#define ST25DV_LOCKCFG_B0_MASK 0x01
+
+/* I2C_SSO_Dyn */
+#define ST25DV_I2C_SSO_DYN_I2CSSO_SHIFT (0)
+#define ST25DV_I2C_SSO_DYN_I2CSSO_FIELD 0xFE
+#define ST25DV_I2C_SSO_DYN_I2CSSO_MASK 0x01
+
+/**
+ * @brief ST25DV status enumerator definition.
+ */
+#define ST25DV_OK (0)
+#define ST25DV_ERROR (-1)
+#define ST25DV_BUSY (-2)
+#define ST25DV_TIMEOUT (-3)
+#define ST25DV_NACK (-102)
+
+
+typedef int32_t (*ST25DV_WriteReg_Func)(void *, uint16_t, const uint8_t*, uint16_t);
+typedef int32_t (*ST25DV_ReadReg_Func) (void *, uint16_t, uint8_t*, uint16_t);
+
+typedef struct {
+ ST25DV_WriteReg_Func WriteReg;
+ ST25DV_ReadReg_Func ReadReg;
+ void *handle;
+} st25dv_ctx_t;
+
+int32_t st25dv_get_icref (st25dv_ctx_t *ctx, uint8_t *value);
+int32_t st25dv_get_enda1 (st25dv_ctx_t *ctx, uint8_t *value);
+int32_t st25dv_set_enda1 (st25dv_ctx_t *ctx, const uint8_t *value);
+int32_t st25dv_get_enda2 (st25dv_ctx_t *ctx, uint8_t *value);
+int32_t st25dv_set_enda2 (st25dv_ctx_t *ctx, const uint8_t *value);
+int32_t st25dv_get_enda3 (st25dv_ctx_t *ctx, uint8_t *value);
+int32_t st25dv_set_enda3 (st25dv_ctx_t *ctx, const uint8_t *value);
+int32_t st25dv_get_dsfid (st25dv_ctx_t *ctx, uint8_t *value);
+int32_t st25dv_get_afi (st25dv_ctx_t *ctx, uint8_t *value);
+int32_t st25dv_get_mem_size_msb (st25dv_ctx_t *ctx, uint8_t *value);
+int32_t st25dv_get_blk_size (st25dv_ctx_t *ctx, uint8_t *value);
+int32_t st25dv_get_mem_size_lsb (st25dv_ctx_t *ctx, uint8_t *value);
+int32_t st25dv_get_icrev (st25dv_ctx_t *ctx, uint8_t *value);
+int32_t st25dv_get_uid (st25dv_ctx_t *ctx, uint8_t *value);
+int32_t st25dv_get_i2cpasswd (st25dv_ctx_t *ctx, uint8_t *value);
+int32_t st25dv_set_i2cpasswd (st25dv_ctx_t *ctx, const uint8_t *value);
+int32_t st25dv_get_lockdsfid (st25dv_ctx_t *ctx, uint8_t *value);
+int32_t st25dv_get_lockafi (st25dv_ctx_t *ctx, uint8_t *value);
+int32_t st25dv_get_mb_mode_rw (st25dv_ctx_t *ctx, uint8_t *value);
+int32_t st25dv_set_mb_mode_rw (st25dv_ctx_t *ctx, const uint8_t *value);
+int32_t st25dv_get_mblen_dyn_mblen (st25dv_ctx_t *ctx, uint8_t *value);
+int32_t st25dv_get_mb_ctrl_dyn_mben (st25dv_ctx_t *ctx, uint8_t *value);
+int32_t st25dv_set_mb_ctrl_dyn_mben (st25dv_ctx_t *ctx, const uint8_t *value);
+int32_t st25dv_get_mb_ctrl_dyn_hostputmsg (st25dv_ctx_t *ctx, uint8_t *value);
+int32_t st25dv_get_mb_ctrl_dyn_rfputmsg (st25dv_ctx_t *ctx, uint8_t *value);
+int32_t st25dv_get_mb_ctrl_dyn_streserved (st25dv_ctx_t *ctx, uint8_t *value);
+int32_t st25dv_get_mb_ctrl_dyn_hostmissmsg (st25dv_ctx_t *ctx, uint8_t *value);
+int32_t st25dv_get_mb_ctrl_dyn_rfmissmsg (st25dv_ctx_t *ctx, uint8_t *value);
+int32_t st25dv_get_mb_ctrl_dyn_currentmsg (st25dv_ctx_t *ctx, uint8_t *value);
+int32_t st25dv_get_mb_ctrl_dyn_all (st25dv_ctx_t *ctx, uint8_t *value);
+int32_t st25dv_get_mb_wdg_delay (st25dv_ctx_t *ctx, uint8_t *value);
+int32_t st25dv_set_mb_wdg_delay (st25dv_ctx_t *ctx, const uint8_t *value);
+int32_t st25dv_get_gpo_rfuserstate (st25dv_ctx_t *ctx, uint8_t *value);
+int32_t st25dv_set_gpo_rfuserstate (st25dv_ctx_t *ctx, const uint8_t *value);
+int32_t st25dv_get_gpo_rfactivity (st25dv_ctx_t *ctx, uint8_t *value);
+int32_t st25dv_set_gpo_rfactivity (st25dv_ctx_t *ctx, const uint8_t *value);
+int32_t st25dv_get_gpo_rfinterrupt (st25dv_ctx_t *ctx, uint8_t *value);
+int32_t st25dv_set_gpo_rfinterrupt (st25dv_ctx_t *ctx, const uint8_t *value);
+int32_t st25dv_get_gpo_fieldchange (st25dv_ctx_t *ctx, uint8_t *value);
+int32_t st25dv_set_gpo_fieldchange (st25dv_ctx_t *ctx, const uint8_t *value);
+int32_t st25dv_get_gpo_rfputmsg (st25dv_ctx_t *ctx, uint8_t *value);
+int32_t st25dv_set_gpo_rfputmsg (st25dv_ctx_t *ctx, const uint8_t *value);
+int32_t st25dv_get_gpo_rfgetmsg (st25dv_ctx_t *ctx, uint8_t *value);
+int32_t st25dv_set_gpo_rfgetmsg (st25dv_ctx_t *ctx, const uint8_t *value);
+int32_t st25dv_get_gpo_rfwrite (st25dv_ctx_t *ctx, uint8_t *value);
+int32_t st25dv_set_gpo_rfwrite (st25dv_ctx_t *ctx, const uint8_t *value);
+int32_t st25dv_get_gpo_enable (st25dv_ctx_t *ctx, uint8_t *value);
+int32_t st25dv_set_gpo_enable (st25dv_ctx_t *ctx, const uint8_t *value);
+int32_t st25dv_get_gpo_all (st25dv_ctx_t *ctx, uint8_t *value);
+int32_t st25dv_set_gpo_all (st25dv_ctx_t *ctx, const uint8_t *value);
+int32_t st25dv_get_gpo_dyn_rfuserstate (st25dv_ctx_t *ctx, uint8_t *value);
+int32_t st25dv_set_gpo_dyn_rfuserstate (st25dv_ctx_t *ctx, const uint8_t *value);
+int32_t st25dv_get_gpo_dyn_rfactivity (st25dv_ctx_t *ctx, uint8_t *value);
+int32_t st25dv_set_gpo_dyn_rfactivity (st25dv_ctx_t *ctx, const uint8_t *value);
+int32_t st25dv_get_gpo_dyn_rfinterrupt (st25dv_ctx_t *ctx, uint8_t *value);
+int32_t st25dv_set_gpo_dyn_rfinterrupt (st25dv_ctx_t *ctx, const uint8_t *value);
+int32_t st25dv_get_gpo_dyn_fieldchange (st25dv_ctx_t *ctx, uint8_t *value);
+int32_t st25dv_set_gpo_dyn_fieldchang (st25dv_ctx_t *ctx, const uint8_t *value);
+int32_t st25dv_get_gpo_dyn_rfputmsg (st25dv_ctx_t *ctx, uint8_t *value);
+int32_t st25dv_set_gpo_dyn_rfputmsg (st25dv_ctx_t *ctx, const uint8_t *value);
+int32_t st25dv_get_gpo_dyn_rfgetmsg (st25dv_ctx_t *ctx, uint8_t *value);
+int32_t st25dv_set_gpo_dyn_rfgetmsg (st25dv_ctx_t *ctx, const uint8_t *value);
+int32_t st25dv_get_gpo_dyn_rfwrite (st25dv_ctx_t *ctx, uint8_t *value);
+int32_t st25dv_set_gpo_dyn_rfwrite (st25dv_ctx_t *ctx, const uint8_t *value);
+int32_t st25dv_get_gpo_dyn_enable (st25dv_ctx_t *ctx, uint8_t *value);
+int32_t st25dv_set_gpo_dyn_enable (st25dv_ctx_t *ctx, const uint8_t *value);
+int32_t st25dv_get_gpo_dyn_all (st25dv_ctx_t *ctx, uint8_t *value);
+int32_t st25dv_set_gpo_dyn_all (st25dv_ctx_t *ctx, const uint8_t *value);
+int32_t st25dv_get_ittime_delay (st25dv_ctx_t *ctx, uint8_t *value);
+int32_t st25dv_set_ittime_delay (st25dv_ctx_t *ctx, const uint8_t *value);
+int32_t st25dv_get_itsts_dyn_rfuserstate (st25dv_ctx_t *ctx, uint8_t *value);
+int32_t st25dv_get_itsts_dyn_rfactivity (st25dv_ctx_t *ctx, uint8_t *value);
+int32_t st25dv_get_itsts_dyn_rfinterrupt (st25dv_ctx_t *ctx, uint8_t *value);
+int32_t st25dv_get_itsts_dyn_fieldfalling (st25dv_ctx_t *ctx, uint8_t *value);
+int32_t st25dv_get_itsts_dyn_fieldrising (st25dv_ctx_t *ctx, uint8_t *value);
+int32_t st25dv_get_itsts_dyn_rfputmsg (st25dv_ctx_t *ctx, uint8_t *value);
+int32_t st25dv_get_itsts_dyn_rfgetmsg (st25dv_ctx_t *ctx, uint8_t *value);
+int32_t st25dv_get_itsts_dyn_rfwrite (st25dv_ctx_t *ctx, uint8_t *value);
+int32_t st25dv_get_itsts_dyn_all (st25dv_ctx_t *ctx, uint8_t *value);
+int32_t st25dv_get_eh_mode (st25dv_ctx_t *ctx, uint8_t *value);
+int32_t st25dv_set_eh_mode (st25dv_ctx_t *ctx, const uint8_t *value);
+int32_t st25dv_get_eh_ctrl_dyn_eh_en (st25dv_ctx_t *ctx, uint8_t *value);
+int32_t st25dv_set_eh_ctrl_dyn_eh_en (st25dv_ctx_t *ctx, const uint8_t *value);
+int32_t st25dv_get_eh_ctrl_dyn_eh_on (st25dv_ctx_t *ctx, uint8_t *value);
+int32_t st25dv_get_eh_ctrl_dyn_field_on (st25dv_ctx_t *ctx, uint8_t *value);
+int32_t st25dv_get_eh_ctrl_dyn_vcc_on (st25dv_ctx_t *ctx, uint8_t *value);
+int32_t st25dv_get_eh_ctrl_dyn_all (st25dv_ctx_t *ctx, uint8_t *value);
+int32_t st25dv_get_rf_mngt_rfdis (st25dv_ctx_t *ctx, uint8_t *value);
+int32_t st25dv_set_rf_mngt_rfdis (st25dv_ctx_t *ctx, const uint8_t *value);
+int32_t st25dv_get_rf_mngt_rfsleep (st25dv_ctx_t *ctx, uint8_t *value);
+int32_t st25dv_set_rf_mngt_rfsleep (st25dv_ctx_t *ctx, const uint8_t *value);
+int32_t st25dv_get_rf_mngt_all (st25dv_ctx_t *ctx, uint8_t *value);
+int32_t st25dv_set_rf_mngt_all (st25dv_ctx_t *ctx, const uint8_t *value);
+int32_t st25dv_get_rf_mngt_dyn_rfdis (st25dv_ctx_t *ctx, uint8_t *value);
+int32_t st25dv_set_rf_mngt_dyn_rfdis (st25dv_ctx_t *ctx, const uint8_t *value);
+int32_t st25dv_get_rf_mngt_dyn_rfsleep (st25dv_ctx_t *ctx, uint8_t *value);
+int32_t st25dv_set_rf_mngt_dyn_rfsleep (st25dv_ctx_t *ctx, const uint8_t *value);
+int32_t st25dv_get_rf_mngt_dyn_all (st25dv_ctx_t *ctx, uint8_t *value);
+int32_t st25dv_set_rf_mngt_dyn_all (st25dv_ctx_t *ctx, const uint8_t *value);
+int32_t st25dv_get_rfa1ss_pwdctrl (st25dv_ctx_t *ctx, uint8_t *value);
+int32_t st25dv_set_rfa1ss_pwdctrl (st25dv_ctx_t *ctx, const uint8_t *value);
+int32_t st25dv_get_rfa1ss_rwprot (st25dv_ctx_t *ctx, uint8_t *value);
+int32_t st25dv_set_rfa1ss_rwprot (st25dv_ctx_t *ctx, const uint8_t *value);
+int32_t st25dv_get_rfa1ss_all (st25dv_ctx_t *ctx, uint8_t *value);
+int32_t st25dv_set_rfa1ss_all (st25dv_ctx_t *ctx, const uint8_t *value);
+int32_t st25dv_get_rfa2ss_pwdctrl (st25dv_ctx_t *ctx, uint8_t *value);
+int32_t st25dv_set_rfa2ss_pwdctrl (st25dv_ctx_t *ctx, const uint8_t *value);
+int32_t st25dv_get_rfa2ss_rwprot (st25dv_ctx_t *ctx, uint8_t *value);
+int32_t st25dv_set_rfa2ss_rwprot (st25dv_ctx_t *ctx, const uint8_t *value);
+int32_t st25dv_get_rfa2ss_all (st25dv_ctx_t *ctx, uint8_t *value);
+int32_t st25dv_set_rfa2ss_all (st25dv_ctx_t *ctx, const uint8_t *value);
+int32_t st25dv_get_rfa3ss_pwdctrl (st25dv_ctx_t *ctx, uint8_t *value);
+int32_t st25dv_set_rfa3ss_pwdctrl (st25dv_ctx_t *ctx, const uint8_t *value);
+int32_t st25dv_get_rfa3ss_rwprot (st25dv_ctx_t *ctx, uint8_t *value);
+int32_t st25dv_set_rfa3ss_rwprot (st25dv_ctx_t *ctx, const uint8_t *value);
+int32_t st25dv_get_rfa3ss_all (st25dv_ctx_t *ctx, uint8_t *value);
+int32_t st25dv_set_rfa3ss_all (st25dv_ctx_t *ctx, const uint8_t *value);
+int32_t st25dv_get_rfa4ss_pwdctrl (st25dv_ctx_t *ctx, uint8_t *value);
+int32_t st25dv_set_rfa4ss_pwdctrl (st25dv_ctx_t *ctx, const uint8_t *value);
+int32_t st25dv_get_rfa4ss_rwprot (st25dv_ctx_t *ctx, uint8_t *value);
+int32_t st25dv_set_rfa4ss_rwprot (st25dv_ctx_t *ctx, const uint8_t *value);
+int32_t st25dv_get_rfa4ss_all (st25dv_ctx_t *ctx, uint8_t *value);
+int32_t st25dv_set_rfa4ss_all (st25dv_ctx_t *ctx, const uint8_t *value);
+int32_t st25dv_get_i2css_pz1 (st25dv_ctx_t *ctx, uint8_t *value);
+int32_t st25dv_set_i2css_pz1 (st25dv_ctx_t *ctx, const uint8_t *value);
+int32_t st25dv_get_i2css_pz2 (st25dv_ctx_t *ctx, uint8_t *value);
+int32_t st25dv_set_i2css_pz2 (st25dv_ctx_t *ctx, const uint8_t *value);
+int32_t st25dv_get_i2css_pz3 (st25dv_ctx_t *ctx, uint8_t *value);
+int32_t st25dv_set_i2css_pz3 (st25dv_ctx_t *ctx, const uint8_t *value);
+int32_t st25dv_get_i2css_pz4 (st25dv_ctx_t *ctx, uint8_t *value);
+int32_t st25dv_set_i2css_pz4 (st25dv_ctx_t *ctx, const uint8_t *value);
+int32_t st25dv_get_i2css_all (st25dv_ctx_t *ctx, uint8_t *value);
+int32_t st25dv_set_i2css_all (st25dv_ctx_t *ctx, const uint8_t *value);
+int32_t st25dv_get_lockccfile_blck0 (st25dv_ctx_t *ctx, uint8_t *value);
+int32_t st25dv_set_lockccfile_blck0 (st25dv_ctx_t *ctx, const uint8_t *value);
+int32_t st25dv_get_lockccfile_blck1 (st25dv_ctx_t *ctx, uint8_t *value);
+int32_t st25dv_set_lockccfile_blck1 (st25dv_ctx_t *ctx, const uint8_t *value);
+int32_t st25dv_get_lockccfile_all (st25dv_ctx_t *ctx, uint8_t *value);
+int32_t st25dv_set_lockccfile_all (st25dv_ctx_t *ctx, const uint8_t *value);
+int32_t st25dv_get_lockcfg_b0 (st25dv_ctx_t *ctx, uint8_t *value);
+int32_t st25dv_set_lockcfg_b0 (st25dv_ctx_t *ctx, const uint8_t *value);
+int32_t st25dv_get_i2c_sso_dyn_i2csso (st25dv_ctx_t *ctx, uint8_t *value);
+
+#endif
diff --git a/P3_SETR2/Components/st7735/Release_Notes.html b/P3_SETR2/Components/st7735/Release_Notes.html
new file mode 100644
index 0000000..59bd0a5
--- /dev/null
+++ b/P3_SETR2/Components/st7735/Release_Notes.html
@@ -0,0 +1,109 @@
+
+
+
+
+
+
+ Release Notes for ST7735 Component Drivers
+
+
+
+
+
+
+
+
+
+
+Release Notes for ST7735 Component Drivers
+Copyright © 2014 STMicroelectronics
+
+
+
+
+
+
License
+
Licensed by ST under BSD 3-Clause license (the "License"). You may not use this package except in compliance with the License. You may obtain a copy of the License at:
+
https://opensource.org/licenses/BSD-3-Clause
+
Purpose
+
This directory contains the ST7735 component drivers.
+
+
+
Update History
+
+
V1.1.5 / 03-April-2019
+
+
Main Changes
+
+Update release notes format
+
+
+
+
+
V1.1.4 / 17-December-2018
+
+
Main Changes
+
+Fix “Back to Release page” link
+
+
+
+
+
V1.1.3 / 25-October-2018
+
+
Main Changes
+
+Reformat the BSD 3-Clause license declaration in the files header (replace license terms by a web reference to OSI website where those terms lie)
+
+
+
+
+
V1.1.2 / 06-June-2017
+
+
Main Changes
+
+Update comments to be used for PDSC generation
+
+
+
+
+
V1.1.1 / 24-November-2014
+
+
Main Changes
+
+st7735.h: change “\” by “/” in the include path to fix compilation issues under Linux
+
+
+
+
+
V1.1.0 / 22-July-2014
+
+
Main Changes
+
+LCD Component driver update in order to harmonize all LCD controllers Link usage (Change LCD_IO_WriteData to LCD_IO_WriteMultipleData)
+
+
+
+
+
V1.0.0 / 22-April-2014
+
+
Main Changes
+
+First official release
+
+
+
+
+
+
+
+
diff --git a/P3_SETR2/Components/st7735/st7735.c b/P3_SETR2/Components/st7735/st7735.c
new file mode 100644
index 0000000..6225fd2
--- /dev/null
+++ b/P3_SETR2/Components/st7735/st7735.c
@@ -0,0 +1,453 @@
+/**
+ ******************************************************************************
+ * @file st7735.c
+ * @author MCD Application Team
+ * @brief This file includes the driver for ST7735 LCD mounted on the Adafruit
+ * 1.8" TFT LCD shield (reference ID 802).
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2014 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/* Includes ------------------------------------------------------------------*/
+#include "st7735.h"
+
+/** @addtogroup BSP
+ * @{
+ */
+
+/** @addtogroup Components
+ * @{
+ */
+
+/** @addtogroup ST7735
+ * @brief This file provides a set of functions needed to drive the
+ * ST7735 LCD.
+ * @{
+ */
+
+/** @defgroup ST7735_Private_TypesDefinitions
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @defgroup ST7735_Private_Defines
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @defgroup ST7735_Private_Macros
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @defgroup ST7735_Private_Variables
+ * @{
+ */
+
+
+LCD_DrvTypeDef st7735_drv =
+{
+ st7735_Init,
+ 0,
+ st7735_DisplayOn,
+ st7735_DisplayOff,
+ st7735_SetCursor,
+ st7735_WritePixel,
+ 0,
+ st7735_SetDisplayWindow,
+ st7735_DrawHLine,
+ st7735_DrawVLine,
+ st7735_GetLcdPixelWidth,
+ st7735_GetLcdPixelHeight,
+ st7735_DrawBitmap,
+};
+
+static uint16_t ArrayRGB[320] = {0};
+
+/**
+* @}
+*/
+
+/** @defgroup ST7735_Private_FunctionPrototypes
+ * @{
+ */
+
+/**
+* @}
+*/
+
+/** @defgroup ST7735_Private_Functions
+ * @{
+ */
+
+/**
+ * @brief Initialize the ST7735 LCD Component.
+ * @param None
+ * @retval None
+ */
+void st7735_Init(void)
+{
+ uint8_t data = 0;
+
+ /* Initialize ST7735 low level bus layer -----------------------------------*/
+ LCD_IO_Init();
+ /* Out of sleep mode, 0 args, no delay */
+ st7735_WriteReg(LCD_REG_17, 0x00);
+ /* Frame rate ctrl - normal mode, 3 args:Rate = fosc/(1x2+40) * (LINE+2C+2D)*/
+ LCD_IO_WriteReg(LCD_REG_177);
+ data = 0x01;
+ LCD_IO_WriteMultipleData(&data, 1);
+ data = 0x2C;
+ LCD_IO_WriteMultipleData(&data, 1);
+ data = 0x2D;
+ LCD_IO_WriteMultipleData(&data, 1);
+ /* Frame rate control - idle mode, 3 args:Rate = fosc/(1x2+40) * (LINE+2C+2D) */
+ st7735_WriteReg(LCD_REG_178, 0x01);
+ st7735_WriteReg(LCD_REG_178, 0x2C);
+ st7735_WriteReg(LCD_REG_178, 0x2D);
+ /* Frame rate ctrl - partial mode, 6 args: Dot inversion mode, Line inversion mode */
+ st7735_WriteReg(LCD_REG_179, 0x01);
+ st7735_WriteReg(LCD_REG_179, 0x2C);
+ st7735_WriteReg(LCD_REG_179, 0x2D);
+ st7735_WriteReg(LCD_REG_179, 0x01);
+ st7735_WriteReg(LCD_REG_179, 0x2C);
+ st7735_WriteReg(LCD_REG_179, 0x2D);
+ /* Display inversion ctrl, 1 arg, no delay: No inversion */
+ st7735_WriteReg(LCD_REG_180, 0x07);
+ /* Power control, 3 args, no delay: -4.6V , AUTO mode */
+ st7735_WriteReg(LCD_REG_192, 0xA2);
+ st7735_WriteReg(LCD_REG_192, 0x02);
+ st7735_WriteReg(LCD_REG_192, 0x84);
+ /* Power control, 1 arg, no delay: VGH25 = 2.4C VGSEL = -10 VGH = 3 * AVDD */
+ st7735_WriteReg(LCD_REG_193, 0xC5);
+ /* Power control, 2 args, no delay: Opamp current small, Boost frequency */
+ st7735_WriteReg(LCD_REG_194, 0x0A);
+ st7735_WriteReg(LCD_REG_194, 0x00);
+ /* Power control, 2 args, no delay: BCLK/2, Opamp current small & Medium low */
+ st7735_WriteReg(LCD_REG_195, 0x8A);
+ st7735_WriteReg(LCD_REG_195, 0x2A);
+ /* Power control, 2 args, no delay */
+ st7735_WriteReg(LCD_REG_196, 0x8A);
+ st7735_WriteReg(LCD_REG_196, 0xEE);
+ /* Power control, 1 arg, no delay */
+ st7735_WriteReg(LCD_REG_197, 0x0E);
+ /* Don't invert display, no args, no delay */
+ LCD_IO_WriteReg(LCD_REG_32);
+ /* Set color mode, 1 arg, no delay: 16-bit color */
+ st7735_WriteReg(LCD_REG_58, 0x05);
+ /* Column addr set, 4 args, no delay: XSTART = 0, XEND = 127 */
+ LCD_IO_WriteReg(LCD_REG_42);
+ data = 0x00;
+ LCD_IO_WriteMultipleData(&data, 1);
+ LCD_IO_WriteMultipleData(&data, 1);
+ LCD_IO_WriteMultipleData(&data, 1);
+ data = 0x7F;
+ LCD_IO_WriteMultipleData(&data, 1);
+ /* Row addr set, 4 args, no delay: YSTART = 0, YEND = 159 */
+ LCD_IO_WriteReg(LCD_REG_43);
+ data = 0x00;
+ LCD_IO_WriteMultipleData(&data, 1);
+ LCD_IO_WriteMultipleData(&data, 1);
+ LCD_IO_WriteMultipleData(&data, 1);
+ data = 0x9F;
+ LCD_IO_WriteMultipleData(&data, 1);
+ /* Magical unicorn dust, 16 args, no delay */
+ st7735_WriteReg(LCD_REG_224, 0x02);
+ st7735_WriteReg(LCD_REG_224, 0x1c);
+ st7735_WriteReg(LCD_REG_224, 0x07);
+ st7735_WriteReg(LCD_REG_224, 0x12);
+ st7735_WriteReg(LCD_REG_224, 0x37);
+ st7735_WriteReg(LCD_REG_224, 0x32);
+ st7735_WriteReg(LCD_REG_224, 0x29);
+ st7735_WriteReg(LCD_REG_224, 0x2d);
+ st7735_WriteReg(LCD_REG_224, 0x29);
+ st7735_WriteReg(LCD_REG_224, 0x25);
+ st7735_WriteReg(LCD_REG_224, 0x2B);
+ st7735_WriteReg(LCD_REG_224, 0x39);
+ st7735_WriteReg(LCD_REG_224, 0x00);
+ st7735_WriteReg(LCD_REG_224, 0x01);
+ st7735_WriteReg(LCD_REG_224, 0x03);
+ st7735_WriteReg(LCD_REG_224, 0x10);
+ /* Sparkles and rainbows, 16 args, no delay */
+ st7735_WriteReg(LCD_REG_225, 0x03);
+ st7735_WriteReg(LCD_REG_225, 0x1d);
+ st7735_WriteReg(LCD_REG_225, 0x07);
+ st7735_WriteReg(LCD_REG_225, 0x06);
+ st7735_WriteReg(LCD_REG_225, 0x2E);
+ st7735_WriteReg(LCD_REG_225, 0x2C);
+ st7735_WriteReg(LCD_REG_225, 0x29);
+ st7735_WriteReg(LCD_REG_225, 0x2D);
+ st7735_WriteReg(LCD_REG_225, 0x2E);
+ st7735_WriteReg(LCD_REG_225, 0x2E);
+ st7735_WriteReg(LCD_REG_225, 0x37);
+ st7735_WriteReg(LCD_REG_225, 0x3F);
+ st7735_WriteReg(LCD_REG_225, 0x00);
+ st7735_WriteReg(LCD_REG_225, 0x00);
+ st7735_WriteReg(LCD_REG_225, 0x02);
+ st7735_WriteReg(LCD_REG_225, 0x10);
+ /* Normal display on, no args, no delay */
+ st7735_WriteReg(LCD_REG_19, 0x00);
+ /* Main screen turn on, no delay */
+ st7735_WriteReg(LCD_REG_41, 0x00);
+ /* Memory access control: MY = 1, MX = 1, MV = 0, ML = 0 */
+ st7735_WriteReg(LCD_REG_54, 0xC0);
+}
+
+/**
+ * @brief Enables the Display.
+ * @param None
+ * @retval None
+ */
+void st7735_DisplayOn(void)
+{
+ uint8_t data = 0;
+ LCD_IO_WriteReg(LCD_REG_19);
+ LCD_Delay(10);
+ LCD_IO_WriteReg(LCD_REG_41);
+ LCD_Delay(10);
+ LCD_IO_WriteReg(LCD_REG_54);
+ data = 0xC0;
+ LCD_IO_WriteMultipleData(&data, 1);
+}
+
+/**
+ * @brief Disables the Display.
+ * @param None
+ * @retval None
+ */
+void st7735_DisplayOff(void)
+{
+ uint8_t data = 0;
+ LCD_IO_WriteReg(LCD_REG_19);
+ LCD_Delay(10);
+ LCD_IO_WriteReg(LCD_REG_40);
+ LCD_Delay(10);
+ LCD_IO_WriteReg(LCD_REG_54);
+ data = 0xC0;
+ LCD_IO_WriteMultipleData(&data, 1);
+}
+
+/**
+ * @brief Sets Cursor position.
+ * @param Xpos: specifies the X position.
+ * @param Ypos: specifies the Y position.
+ * @retval None
+ */
+void st7735_SetCursor(uint16_t Xpos, uint16_t Ypos)
+{
+ uint8_t data = 0;
+ LCD_IO_WriteReg(LCD_REG_42);
+ data = (Xpos) >> 8;
+ LCD_IO_WriteMultipleData(&data, 1);
+ data = (Xpos) & 0xFF;
+ LCD_IO_WriteMultipleData(&data, 1);
+ LCD_IO_WriteReg(LCD_REG_43);
+ data = (Ypos) >> 8;
+ LCD_IO_WriteMultipleData(&data, 1);
+ data = (Ypos) & 0xFF;
+ LCD_IO_WriteMultipleData(&data, 1);
+ LCD_IO_WriteReg(LCD_REG_44);
+}
+
+/**
+ * @brief Writes pixel.
+ * @param Xpos: specifies the X position.
+ * @param Ypos: specifies the Y position.
+ * @param RGBCode: the RGB pixel color
+ * @retval None
+ */
+void st7735_WritePixel(uint16_t Xpos, uint16_t Ypos, uint16_t RGBCode)
+{
+ uint8_t data = 0;
+ if((Xpos >= ST7735_LCD_PIXEL_WIDTH) || (Ypos >= ST7735_LCD_PIXEL_HEIGHT))
+ {
+ return;
+ }
+
+ /* Set Cursor */
+ st7735_SetCursor(Xpos, Ypos);
+
+ data = RGBCode >> 8;
+ LCD_IO_WriteMultipleData(&data, 1);
+ data = RGBCode;
+ LCD_IO_WriteMultipleData(&data, 1);
+}
+
+
+/**
+ * @brief Writes to the selected LCD register.
+ * @param LCDReg: Address of the selected register.
+ * @param LCDRegValue: value to write to the selected register.
+ * @retval None
+ */
+void st7735_WriteReg(uint8_t LCDReg, uint8_t LCDRegValue)
+{
+ LCD_IO_WriteReg(LCDReg);
+ LCD_IO_WriteMultipleData(&LCDRegValue, 1);
+}
+
+/**
+ * @brief Sets a display window
+ * @param Xpos: specifies the X bottom left position.
+ * @param Ypos: specifies the Y bottom left position.
+ * @param Height: display window height.
+ * @param Width: display window width.
+ * @retval None
+ */
+void st7735_SetDisplayWindow(uint16_t Xpos, uint16_t Ypos, uint16_t Width, uint16_t Height)
+{
+ uint8_t data = 0;
+ /* Column addr set, 4 args, no delay: XSTART = Xpos, XEND = (Xpos + Width - 1) */
+ LCD_IO_WriteReg(LCD_REG_42);
+ data = (Xpos) >> 8;
+ LCD_IO_WriteMultipleData(&data, 1);
+ data = (Xpos) & 0xFF;
+ LCD_IO_WriteMultipleData(&data, 1);
+ data = (Xpos + Width - 1) >> 8;
+ LCD_IO_WriteMultipleData(&data, 1);
+ data = (Xpos + Width - 1) & 0xFF;
+ LCD_IO_WriteMultipleData(&data, 1);
+ /* Row addr set, 4 args, no delay: YSTART = Ypos, YEND = (Ypos + Height - 1) */
+ LCD_IO_WriteReg(LCD_REG_43);
+ data = (Ypos) >> 8;
+ LCD_IO_WriteMultipleData(&data, 1);
+ data = (Ypos) & 0xFF;
+ LCD_IO_WriteMultipleData(&data, 1);
+ data = (Ypos + Height - 1) >> 8;
+ LCD_IO_WriteMultipleData(&data, 1);
+ data = (Ypos + Height - 1) & 0xFF;
+ LCD_IO_WriteMultipleData(&data, 1);
+}
+
+/**
+ * @brief Draws horizontal line.
+ * @param RGBCode: Specifies the RGB color
+ * @param Xpos: specifies the X position.
+ * @param Ypos: specifies the Y position.
+ * @param Length: specifies the line length.
+ * @retval None
+ */
+void st7735_DrawHLine(uint16_t RGBCode, uint16_t Xpos, uint16_t Ypos, uint16_t Length)
+{
+ uint8_t counter = 0;
+
+ if(Xpos + Length > ST7735_LCD_PIXEL_WIDTH) return;
+
+ /* Set Cursor */
+ st7735_SetCursor(Xpos, Ypos);
+
+ for(counter = 0; counter < Length; counter++)
+ {
+ ArrayRGB[counter] = RGBCode;
+ }
+ LCD_IO_WriteMultipleData((uint8_t*)&ArrayRGB[0], Length * 2);
+}
+
+/**
+ * @brief Draws vertical line.
+ * @param RGBCode: Specifies the RGB color
+ * @param Xpos: specifies the X position.
+ * @param Ypos: specifies the Y position.
+ * @param Length: specifies the line length.
+ * @retval None
+ */
+void st7735_DrawVLine(uint16_t RGBCode, uint16_t Xpos, uint16_t Ypos, uint16_t Length)
+{
+ uint8_t counter = 0;
+
+ if(Ypos + Length > ST7735_LCD_PIXEL_HEIGHT) return;
+ for(counter = 0; counter < Length; counter++)
+ {
+ st7735_WritePixel(Xpos, Ypos + counter, RGBCode);
+ }
+}
+
+/**
+ * @brief Gets the LCD pixel Width.
+ * @param None
+ * @retval The Lcd Pixel Width
+ */
+uint16_t st7735_GetLcdPixelWidth(void)
+{
+ return ST7735_LCD_PIXEL_WIDTH;
+}
+
+/**
+ * @brief Gets the LCD pixel Height.
+ * @param None
+ * @retval The Lcd Pixel Height
+ */
+uint16_t st7735_GetLcdPixelHeight(void)
+{
+ return ST7735_LCD_PIXEL_HEIGHT;
+}
+
+/**
+ * @brief Displays a bitmap picture loaded in the internal Flash.
+ * @param BmpAddress: Bmp picture address in the internal Flash.
+ * @retval None
+ */
+void st7735_DrawBitmap(uint16_t Xpos, uint16_t Ypos, uint8_t *pbmp)
+{
+ uint32_t index = 0, size = 0;
+
+ /* Read bitmap size */
+ size = *(volatile uint16_t *) (pbmp + 2);
+ size |= (*(volatile uint16_t *) (pbmp + 4)) << 16;
+ /* Get bitmap data address offset */
+ index = *(volatile uint16_t *) (pbmp + 10);
+ index |= (*(volatile uint16_t *) (pbmp + 12)) << 16;
+ size = (size - index)/2;
+ pbmp += index;
+
+ /* Set GRAM write direction and BGR = 0 */
+ /* Memory access control: MY = 0, MX = 1, MV = 0, ML = 0 */
+ st7735_WriteReg(LCD_REG_54, 0x40);
+
+ /* Set Cursor */
+ st7735_SetCursor(Xpos, Ypos);
+
+ LCD_IO_WriteMultipleData((uint8_t*)pbmp, size*2);
+
+ /* Set GRAM write direction and BGR = 0 */
+ /* Memory access control: MY = 1, MX = 1, MV = 0, ML = 0 */
+ st7735_WriteReg(LCD_REG_54, 0xC0);
+}
+
+/**
+* @}
+*/
+
+/**
+* @}
+*/
+
+/**
+* @}
+*/
+
+/**
+* @}
+*/
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
+
diff --git a/P3_SETR2/Components/st7735/st7735.h b/P3_SETR2/Components/st7735/st7735.h
new file mode 100644
index 0000000..d15e902
--- /dev/null
+++ b/P3_SETR2/Components/st7735/st7735.h
@@ -0,0 +1,196 @@
+/**
+ ******************************************************************************
+ * @file st7735.h
+ * @author MCD Application Team
+ * @brief This file contains all the functions prototypes for the st7735.c
+ * driver.
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2014 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __ST7735_H
+#define __ST7735_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "../Common/lcd.h"
+
+/** @addtogroup BSP
+ * @{
+ */
+
+/** @addtogroup Components
+ * @{
+ */
+
+/** @addtogroup ST7735
+ * @{
+ */
+
+/** @defgroup ST7735_Exported_Types
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @defgroup ST7735_Exported_Constants
+ * @{
+ */
+
+/**
+ * @brief ST7735 Size
+ */
+#define ST7735_LCD_PIXEL_WIDTH ((uint16_t)128)
+#define ST7735_LCD_PIXEL_HEIGHT ((uint16_t)160)
+
+/**
+ * @brief ST7735 Registers
+ */
+#define LCD_REG_0 0x00 /* No Operation: NOP */
+#define LCD_REG_1 0x01 /* Software reset: SWRESET */
+#define LCD_REG_4 0x04 /* Read Display ID: RDDID */
+#define LCD_REG_9 0x09 /* Read Display Statu: RDDST */
+#define LCD_REG_10 0x0A /* Read Display Power: RDDPM */
+#define LCD_REG_11 0x0B /* Read Display: RDDMADCTL */
+#define LCD_REG_12 0x0C /* Read Display Pixel: RDDCOLMOD */
+#define LCD_REG_13 0x0D /* Read Display Image: RDDIM */
+#define LCD_REG_14 0x0E /* Read Display Signal: RDDSM */
+#define LCD_REG_16 0x10 /* Sleep in & booster off: SLPIN */
+#define LCD_REG_17 0x11 /* Sleep out & booster on: SLPOUT */
+#define LCD_REG_18 0x12 /* Partial mode on: PTLON */
+#define LCD_REG_19 0x13 /* Partial off (Normal): NORON */
+#define LCD_REG_32 0x20 /* Display inversion off: INVOFF */
+#define LCD_REG_33 0x21 /* Display inversion on: INVON */
+#define LCD_REG_38 0x26 /* Gamma curve select: GAMSET */
+#define LCD_REG_40 0x28 /* Display off: DISPOFF */
+#define LCD_REG_41 0x29 /* Display on: DISPON */
+#define LCD_REG_42 0x2A /* Column address set: CASET */
+#define LCD_REG_43 0x2B /* Row address set: RASET */
+#define LCD_REG_44 0x2C /* Memory write: RAMWR */
+#define LCD_REG_45 0x2D /* LUT for 4k,65k,262k color: RGBSET */
+#define LCD_REG_46 0x2E /* Memory read: RAMRD*/
+#define LCD_REG_48 0x30 /* Partial start/end address set: PTLAR */
+#define LCD_REG_52 0x34 /* Tearing effect line off: TEOFF */
+#define LCD_REG_53 0x35 /* Tearing effect mode set & on: TEON */
+#define LCD_REG_54 0x36 /* Memory data access control: MADCTL */
+#define LCD_REG_56 0x38 /* Idle mode off: IDMOFF */
+#define LCD_REG_57 0x39 /* Idle mode on: IDMON */
+#define LCD_REG_58 0x3A /* Interface pixel format: COLMOD */
+#define LCD_REG_177 0xB1 /* In normal mode (Full colors): FRMCTR1 */
+#define LCD_REG_178 0xB2 /* In Idle mode (8-colors): FRMCTR2 */
+#define LCD_REG_179 0xB3 /* In partial mode + Full colors: FRMCTR3 */
+#define LCD_REG_180 0xB4 /* Display inversion control: INVCTR */
+#define LCD_REG_192 0xC0 /* Power control setting: PWCTR1 */
+#define LCD_REG_193 0xC1 /* Power control setting: PWCTR2 */
+#define LCD_REG_194 0xC2 /* In normal mode (Full colors): PWCTR3 */
+#define LCD_REG_195 0xC3 /* In Idle mode (8-colors): PWCTR4 */
+#define LCD_REG_196 0xC4 /* In partial mode + Full colors: PWCTR5 */
+#define LCD_REG_197 0xC5 /* VCOM control 1: VMCTR1 */
+#define LCD_REG_199 0xC7 /* Set VCOM offset control: VMOFCTR */
+#define LCD_REG_209 0xD1 /* Set LCM version code: WRID2 */
+#define LCD_REG_210 0xD2 /* Customer Project code: WRID3 */
+#define LCD_REG_217 0xD9 /* NVM control status: NVCTR1 */
+#define LCD_REG_218 0xDA /* Read ID1: RDID1 */
+#define LCD_REG_219 0xDB /* Read ID2: RDID2 */
+#define LCD_REG_220 0xDC /* Read ID3: RDID3 */
+#define LCD_REG_222 0xDE /* NVM Read Command: NVCTR2 */
+#define LCD_REG_223 0xDF /* NVM Write Command: NVCTR3 */
+#define LCD_REG_224 0xE0 /* Set Gamma adjustment (+ polarity): GAMCTRP1 */
+#define LCD_REG_225 0xE1 /* Set Gamma adjustment (- polarity): GAMCTRN1 */
+
+/**
+ * @brief LCD Lines depending on the chosen fonts.
+ */
+#define LCD_LINE_0 LINE(0)
+#define LCD_LINE_1 LINE(1)
+#define LCD_LINE_2 LINE(2)
+#define LCD_LINE_3 LINE(3)
+#define LCD_LINE_4 LINE(4)
+#define LCD_LINE_5 LINE(5)
+#define LCD_LINE_6 LINE(6)
+#define LCD_LINE_7 LINE(7)
+#define LCD_LINE_8 LINE(8)
+#define LCD_LINE_9 LINE(9)
+#define LCD_LINE_10 LINE(10)
+#define LCD_LINE_11 LINE(11)
+#define LCD_LINE_12 LINE(12)
+#define LCD_LINE_13 LINE(13)
+#define LCD_LINE_14 LINE(14)
+#define LCD_LINE_15 LINE(15)
+#define LCD_LINE_16 LINE(16)
+#define LCD_LINE_17 LINE(17)
+#define LCD_LINE_18 LINE(18)
+#define LCD_LINE_19 LINE(19)
+
+/**
+ * @}
+ */
+
+/** @defgroup ADAFRUIT_SPI_LCD_Exported_Functions
+ * @{
+ */
+void st7735_Init(void);
+uint16_t st7735_ReadID(void);
+
+void st7735_DisplayOn(void);
+void st7735_DisplayOff(void);
+void st7735_SetCursor(uint16_t Xpos, uint16_t Ypos);
+void st7735_WritePixel(uint16_t Xpos, uint16_t Ypos, uint16_t RGBCode);
+void st7735_WriteReg(uint8_t LCDReg, uint8_t LCDRegValue);
+uint8_t st7735_ReadReg(uint8_t LCDReg);
+
+void st7735_SetDisplayWindow(uint16_t Xpos, uint16_t Ypos, uint16_t Width, uint16_t Height);
+void st7735_DrawHLine(uint16_t RGBCode, uint16_t Xpos, uint16_t Ypos, uint16_t Length);
+void st7735_DrawVLine(uint16_t RGBCode, uint16_t Xpos, uint16_t Ypos, uint16_t Length);
+
+uint16_t st7735_GetLcdPixelWidth(void);
+uint16_t st7735_GetLcdPixelHeight(void);
+void st7735_DrawBitmap(uint16_t Xpos, uint16_t Ypos, uint8_t *pbmp);
+
+/* LCD driver structure */
+extern LCD_DrvTypeDef st7735_drv;
+
+/* LCD IO functions */
+void LCD_IO_Init(void);
+void LCD_IO_WriteMultipleData(uint8_t *pData, uint32_t Size);
+void LCD_IO_WriteReg(uint8_t Reg);
+void LCD_Delay(uint32_t delay);
+/**
+ * @}
+ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __ST7735_H */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/P3_SETR2/Components/st7789h2/Release_Notes.html b/P3_SETR2/Components/st7789h2/Release_Notes.html
new file mode 100644
index 0000000..434098a
--- /dev/null
+++ b/P3_SETR2/Components/st7789h2/Release_Notes.html
@@ -0,0 +1,109 @@
+
+
+
+
+
+
+ Release Notes for ST7789H2 Component Drivers
+
+
+
+
+
+
+
+
+
+
+Release Notes for ST7789H2 Component Drivers
+Copyright © 2016 STMicroelectronics
+
+
+
+
+
+
License
+
Licensed by ST under BSD 3-Clause license (the "License"). You may not use this package except in compliance with the License. You may obtain a copy of the License at:
+
https://opensource.org/licenses/BSD-3-Clause
+
Purpose
+
This directory contains the ST7789H2 component drivers.
+
+
+
Update History
+
+
V1.1.3 / 03-April-2019
+
+
Main Changes
+
+Update release notes format
+
+
+
+
+
V1.1.2 / 31-August-2018
+
+
Main Changes
+
+Reformat the BSD 3-Clause license declaration in the files header (replace license terms by a web reference to OSI website where those terms lie)
+
+
+
+
+
V1.1.1 / 29-December-2016
+
+
Main Changes
+
+st7789h2.c/.h:
+
+Change “\” by “/” in the include path to fix compilation issue under linux
+
+
+
+
+
+
V1.1.0 / 22-December-2016
+
+
Main Changes
+
+st7789h2.c/.h:
+
+Add 180° orientation support
+
+
+
+
+
+
V1.0.1 / 04-July-2016
+
+
Main Changes
+
+st7789h2.c:
+
+Update ST7789H2_DisplayOn()
+
+
+
+
+
+
V1.0.0 / 04-May-2016
+
+
Main Changes
+
+First official release
+
+
+
+
+
+
+
+
diff --git a/P3_SETR2/Components/st7789h2/st7789h2.c b/P3_SETR2/Components/st7789h2/st7789h2.c
new file mode 100644
index 0000000..5aa7250
--- /dev/null
+++ b/P3_SETR2/Components/st7789h2/st7789h2.c
@@ -0,0 +1,707 @@
+/**
+ ******************************************************************************
+ * @file st7789h2.c
+ * @author MCD Application Team
+ * @brief This file includes the LCD driver for st7789h2 LCD.
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2016 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/* Includes ------------------------------------------------------------------*/
+#include "st7789h2.h"
+
+/** @addtogroup BSP
+ * @{
+ */
+
+/** @addtogroup Components
+ * @{
+ */
+
+/** @defgroup ST7789H2
+ * @brief This file provides a set of functions needed to drive the
+ * FRIDA FRD154BP2901 LCD.
+ * @{
+ */
+
+/** @defgroup ST7789H2_Private_TypesDefinitions ST7789H2 Private TypesDefinitions
+ * @{
+ */
+typedef struct {
+ uint8_t red;
+ uint8_t green;
+ uint8_t blue;
+} ST7789H2_Rgb888;
+
+/**
+ * @}
+ */
+
+/** @defgroup ST7789H2_Private_Defines ST7789H2 Private Defines
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @defgroup ST7789H2_Private_Macros ST7789H2 Private Macros
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @defgroup ST7789H2_Private_Variables ST7789H2 Private Variables
+ * @{
+ */
+LCD_DrvTypeDef ST7789H2_drv =
+{
+ ST7789H2_Init,
+ ST7789H2_ReadID,
+ ST7789H2_DisplayOn,
+ ST7789H2_DisplayOff,
+ ST7789H2_SetCursor,
+ ST7789H2_WritePixel,
+ ST7789H2_ReadPixel,
+ ST7789H2_SetDisplayWindow,
+ ST7789H2_DrawHLine,
+ ST7789H2_DrawVLine,
+ ST7789H2_GetLcdPixelWidth,
+ ST7789H2_GetLcdPixelHeight,
+ ST7789H2_DrawBitmap,
+ ST7789H2_DrawRGBImage,
+};
+
+static uint16_t WindowsXstart = 0;
+static uint16_t WindowsYstart = 0;
+static uint16_t WindowsXend = ST7789H2_LCD_PIXEL_WIDTH-1;
+static uint16_t WindowsYend = ST7789H2_LCD_PIXEL_HEIGHT-1;
+/**
+ * @}
+ */
+
+/** @defgroup ST7789H2_Private_FunctionPrototypes ST7789H2 Private FunctionPrototypes
+ * @{
+ */
+static ST7789H2_Rgb888 ST7789H2_ReadPixel_rgb888(uint16_t Xpos, uint16_t Ypos);
+static void ST7789H2_DrawRGBHLine(uint16_t Xpos, uint16_t Ypos, uint16_t Xsize, uint8_t *pdata);
+
+/**
+ * @}
+ */
+
+/** @defgroup ST7789H2_Private_Functions ST7789H2 Private Functions
+ * @{
+ */
+
+/**
+ * @brief Initialize the st7789h2 LCD Component.
+ * @param None
+ * @retval None
+ */
+void ST7789H2_Init(void)
+{
+ uint8_t parameter[14];
+
+ /* Initialize st7789h2 low level bus layer ----------------------------------*/
+ LCD_IO_Init();
+ /* Sleep In Command */
+ ST7789H2_WriteReg(ST7789H2_SLEEP_IN, (uint8_t*)NULL, 0);
+ /* Wait for 10ms */
+ LCD_IO_Delay(10);
+
+ /* SW Reset Command */
+ ST7789H2_WriteReg(0x01, (uint8_t*)NULL, 0);
+ /* Wait for 200ms */
+ LCD_IO_Delay(200);
+
+ /* Sleep Out Command */
+ ST7789H2_WriteReg(ST7789H2_SLEEP_OUT, (uint8_t*)NULL, 0);
+ /* Wait for 120ms */
+ LCD_IO_Delay(120);
+
+ /* Normal display for Driver Down side */
+ parameter[0] = 0x00;
+ ST7789H2_WriteReg(ST7789H2_NORMAL_DISPLAY, parameter, 1);
+
+ /* Color mode 16bits/pixel */
+ parameter[0] = 0x05;
+ ST7789H2_WriteReg(ST7789H2_COLOR_MODE, parameter, 1);
+
+ /* Display inversion On */
+ ST7789H2_WriteReg(ST7789H2_DISPLAY_INVERSION, (uint8_t*)NULL, 0);
+
+ /* Set Column address CASET */
+ parameter[0] = 0x00;
+ parameter[1] = 0x00;
+ parameter[2] = 0x00;
+ parameter[3] = 0xEF;
+ ST7789H2_WriteReg(ST7789H2_CASET, parameter, 4);
+ /* Set Row address RASET */
+ parameter[0] = 0x00;
+ parameter[1] = 0x00;
+ parameter[2] = 0x00;
+ parameter[3] = 0xEF;
+ ST7789H2_WriteReg(ST7789H2_RASET, parameter, 4);
+
+ /*--------------- ST7789H2 Frame rate setting -------------------------------*/
+ /* PORCH control setting */
+ parameter[0] = 0x0C;
+ parameter[1] = 0x0C;
+ parameter[2] = 0x00;
+ parameter[3] = 0x33;
+ parameter[4] = 0x33;
+ ST7789H2_WriteReg(ST7789H2_PORCH_CTRL, parameter, 5);
+
+ /* GATE control setting */
+ parameter[0] = 0x35;
+ ST7789H2_WriteReg(ST7789H2_GATE_CTRL, parameter, 1);
+
+ /*--------------- ST7789H2 Power setting ------------------------------------*/
+ /* VCOM setting */
+ parameter[0] = 0x1F;
+ ST7789H2_WriteReg(ST7789H2_VCOM_SET, parameter, 1);
+
+ /* LCM Control setting */
+ parameter[0] = 0x2C;
+ ST7789H2_WriteReg(ST7789H2_LCM_CTRL, parameter, 1);
+
+ /* VDV and VRH Command Enable */
+ parameter[0] = 0x01;
+ parameter[1] = 0xC3;
+ ST7789H2_WriteReg(ST7789H2_VDV_VRH_EN, parameter, 2);
+
+ /* VDV Set */
+ parameter[0] = 0x20;
+ ST7789H2_WriteReg(ST7789H2_VDV_SET, parameter, 1);
+
+ /* Frame Rate Control in normal mode */
+ parameter[0] = 0x0F;
+ ST7789H2_WriteReg(ST7789H2_FR_CTRL, parameter, 1);
+
+ /* Power Control */
+ parameter[0] = 0xA4;
+ parameter[1] = 0xA1;
+ ST7789H2_WriteReg(ST7789H2_POWER_CTRL, parameter, 2);
+
+ /*--------------- ST7789H2 Gamma setting ------------------------------------*/
+ /* Positive Voltage Gamma Control */
+ parameter[0] = 0xD0;
+ parameter[1] = 0x08;
+ parameter[2] = 0x11;
+ parameter[3] = 0x08;
+ parameter[4] = 0x0C;
+ parameter[5] = 0x15;
+ parameter[6] = 0x39;
+ parameter[7] = 0x33;
+ parameter[8] = 0x50;
+ parameter[9] = 0x36;
+ parameter[10] = 0x13;
+ parameter[11] = 0x14;
+ parameter[12] = 0x29;
+ parameter[13] = 0x2D;
+ ST7789H2_WriteReg(ST7789H2_PV_GAMMA_CTRL, parameter, 14);
+
+ /* Negative Voltage Gamma Control */
+ parameter[0] = 0xD0;
+ parameter[1] = 0x08;
+ parameter[2] = 0x10;
+ parameter[3] = 0x08;
+ parameter[4] = 0x06;
+ parameter[5] = 0x06;
+ parameter[6] = 0x39;
+ parameter[7] = 0x44;
+ parameter[8] = 0x51;
+ parameter[9] = 0x0B;
+ parameter[10] = 0x16;
+ parameter[11] = 0x14;
+ parameter[12] = 0x2F;
+ parameter[13] = 0x31;
+ ST7789H2_WriteReg(ST7789H2_NV_GAMMA_CTRL, parameter, 14);
+
+ /* Display ON command */
+ ST7789H2_DisplayOn();
+
+ /* Tearing Effect Line On: Option (00h:VSYNC Interface OFF, 01h:VSYNC Interface ON) */
+ parameter[0] = 0x00;
+ ST7789H2_WriteReg(ST7789H2_TEARING_EFFECT, parameter, 1);
+
+}
+
+/**
+ * @brief Set the Display Orientation.
+ * @param orientation: ST7789H2_ORIENTATION_PORTRAIT, ST7789H2_ORIENTATION_LANDSCAPE
+ * or ST7789H2_ORIENTATION_LANDSCAPE_ROT180
+ * @retval None
+ */
+void ST7789H2_SetOrientation(uint32_t orientation)
+{
+ uint8_t parameter[6];
+
+ if(orientation == ST7789H2_ORIENTATION_LANDSCAPE)
+ {
+ parameter[0] = 0x00;
+ }
+ else if(orientation == ST7789H2_ORIENTATION_LANDSCAPE_ROT180)
+ {
+ /* Vertical Scrolling Definition */
+ /* TFA describes the Top Fixed Area */
+ parameter[0] = 0x00;
+ parameter[1] = 0x00;
+ /* VSA describes the height of the Vertical Scrolling Area */
+ parameter[2] = 0x01;
+ parameter[3] = 0xF0;
+ /* BFA describes the Bottom Fixed Area */
+ parameter[4] = 0x00;
+ parameter[5] = 0x00;
+ ST7789H2_WriteReg(ST7789H2_VSCRDEF, parameter, 6);
+
+ /* Vertical Scroll Start Address of RAM */
+ /* GRAM row nbr (320) - Display row nbr (240) = 80 = 0x50 */
+ parameter[0] = 0x00;
+ parameter[1] = 0x50;
+ ST7789H2_WriteReg(ST7789H2_VSCSAD, parameter, 2);
+
+ parameter[0] = 0xC0;
+ }
+ else
+ {
+ parameter[0] = 0x60;
+ }
+ ST7789H2_WriteReg(ST7789H2_NORMAL_DISPLAY, parameter, 1);
+}
+
+/**
+ * @brief Enables the Display.
+ * @param None
+ * @retval None
+ */
+void ST7789H2_DisplayOn(void)
+{
+ /* Display ON command */
+ ST7789H2_WriteReg(ST7789H2_DISPLAY_ON, (uint8_t*)NULL, 0);
+
+ /* Sleep Out command */
+ ST7789H2_WriteReg(ST7789H2_SLEEP_OUT, (uint8_t*)NULL, 0);
+}
+
+/**
+ * @brief Disables the Display.
+ * @param None
+ * @retval None
+ */
+void ST7789H2_DisplayOff(void)
+{
+ uint8_t parameter[1];
+ parameter[0] = 0xFE;
+ /* Display OFF command */
+ ST7789H2_WriteReg(ST7789H2_DISPLAY_OFF, parameter, 1);
+ /* Sleep In Command */
+ ST7789H2_WriteReg(ST7789H2_SLEEP_IN, (uint8_t*)NULL, 0);
+ /* Wait for 10ms */
+ LCD_IO_Delay(10);
+}
+
+/**
+ * @brief Get the LCD pixel Width.
+ * @param None
+ * @retval The Lcd Pixel Width
+ */
+uint16_t ST7789H2_GetLcdPixelWidth(void)
+{
+ return (uint16_t)ST7789H2_LCD_PIXEL_WIDTH;
+}
+
+/**
+ * @brief Get the LCD pixel Height.
+ * @param None
+ * @retval The Lcd Pixel Height
+ */
+uint16_t ST7789H2_GetLcdPixelHeight(void)
+{
+ return (uint16_t)ST7789H2_LCD_PIXEL_HEIGHT;
+}
+
+/**
+ * @brief Get the st7789h2 ID.
+ * @param None
+ * @retval The st7789h2 ID
+ */
+uint16_t ST7789H2_ReadID(void)
+{
+ LCD_IO_Init();
+
+ return ST7789H2_ReadReg(ST7789H2_LCD_ID);
+}
+
+/**
+ * @brief Set Cursor position.
+ * @param Xpos: specifies the X position.
+ * @param Ypos: specifies the Y position.
+ * @retval None
+ */
+void ST7789H2_SetCursor(uint16_t Xpos, uint16_t Ypos)
+{
+ uint8_t parameter[4];
+ /* CASET: Comumn Addrses Set */
+ parameter[0] = 0x00;
+ parameter[1] = 0x00 + Xpos;
+ parameter[2] = 0x00;
+ parameter[3] = 0xEF + Xpos;
+ ST7789H2_WriteReg(ST7789H2_CASET, parameter, 4);
+ /* RASET: Row Addrses Set */
+ parameter[0] = 0x00;
+ parameter[1] = 0x00 + Ypos;
+ parameter[2] = 0x00;
+ parameter[3] = 0xEF + Ypos;
+ ST7789H2_WriteReg(ST7789H2_RASET, parameter, 4);
+}
+
+/**
+ * @brief Write pixel.
+ * @param Xpos: specifies the X position.
+ * @param Ypos: specifies the Y position.
+ * @param RGBCode: the RGB pixel color in RGB565 format
+ * @retval None
+ */
+void ST7789H2_WritePixel(uint16_t Xpos, uint16_t Ypos, uint16_t RGBCode)
+{
+ /* Set Cursor */
+ ST7789H2_SetCursor(Xpos, Ypos);
+
+ /* Prepare to write to LCD RAM */
+ ST7789H2_WriteReg(ST7789H2_WRITE_RAM, (uint8_t*)NULL, 0); /* RAM write data command */
+
+ /* Write RAM data */
+ LCD_IO_WriteData(RGBCode);
+}
+
+/**
+ * @brief Read pixel.
+ * @param Xpos: specifies the X position.
+ * @param Ypos: specifies the Y position.
+ * @retval The RGB pixel color in RGB565 format
+ */
+uint16_t ST7789H2_ReadPixel(uint16_t Xpos, uint16_t Ypos)
+{
+ ST7789H2_Rgb888 rgb888;
+ uint8_t r, g, b;
+ uint16_t rgb565;
+
+ /* Set Cursor */
+ ST7789H2_SetCursor(Xpos, Ypos);
+
+ /* Read RGB888 data from LCD RAM */
+ rgb888 = ST7789H2_ReadPixel_rgb888(Xpos, Ypos);
+
+ /* Convert RGB888 to RGB565 */
+ r = ((rgb888.red & 0xF8) >> 3); /* Extract the red component 5 most significant bits */
+ g = ((rgb888.green & 0xFC) >> 2); /* Extract the green component 6 most significant bits */
+ b = ((rgb888.blue & 0xF8) >> 3); /* Extract the blue component 5 most significant bits */
+
+ rgb565 = ((uint16_t)(r) << 11) + ((uint16_t)(g) << 5) + ((uint16_t)(b) << 0);
+
+ return (rgb565);
+}
+
+/**
+ * @brief Writes to the selected LCD register.
+ * @param Command: command value (or register address as named in st7789h2 doc).
+ * @param Parameters: pointer on parameters value (if command uses one or several parameters).
+ * @param NbParameters: number of command parameters (0 if no parameter)
+ * @retval None
+ */
+void ST7789H2_WriteReg(uint8_t Command, uint8_t *Parameters, uint8_t NbParameters)
+{
+ uint8_t i;
+
+ /* Send command */
+ LCD_IO_WriteReg(Command);
+
+ /* Send command's parameters if any */
+ for (i=0; i Ypos; posY--) /* In BMP files the line order is inverted */
+ {
+ /* Set Cursor */
+ ST7789H2_SetCursor(Xpos, posY - 1);
+
+ /* Draw one line of the picture */
+ ST7789H2_DrawRGBHLine(Xpos, posY - 1, Xsize, (pbmp + (nb_line * Xsize * 2)));
+ nb_line++;
+ }
+}
+
+/**
+ * @brief Displays picture.
+ * @param pdata: picture address.
+ * @param Xpos: Image X position in the LCD
+ * @param Ypos: Image Y position in the LCD
+ * @param Xsize: Image X size in the LCD
+ * @param Ysize: Image Y size in the LCD
+ * @retval None
+ */
+void ST7789H2_DrawRGBImage(uint16_t Xpos, uint16_t Ypos, uint16_t Xsize, uint16_t Ysize, uint8_t *pdata)
+{
+ uint32_t posY;
+ uint32_t nb_line = 0;
+
+ for (posY = Ypos; posY < (Ypos + Ysize); posY ++)
+ {
+ /* Set Cursor */
+ ST7789H2_SetCursor(Xpos, posY);
+
+ /* Draw one line of the picture */
+ ST7789H2_DrawRGBHLine(Xpos, posY, Xsize, (pdata + (nb_line * Xsize * 2)));
+ nb_line++;
+ }
+}
+
+
+/******************************************************************************
+ Static Functions
+*******************************************************************************/
+
+/**
+ * @brief Read pixel from LCD RAM in RGB888 format
+ * @param Xpos: specifies the X position.
+ * @param Ypos: specifies the Y position.
+ * @retval Each RGB pixel color components in a structure
+ */
+static ST7789H2_Rgb888 ST7789H2_ReadPixel_rgb888(uint16_t Xpos, uint16_t Ypos)
+{
+ ST7789H2_Rgb888 rgb888;
+ uint16_t rgb888_part1, rgb888_part2;
+
+ /* In LCD RAM, pixels are 24 bits packed and read with 16 bits access
+ * Here is the pixels components arrangement in memory :
+ * bits: 15 14 13 12 11 10 09 08 | 07 06 05 04 03 02 01 00
+ * address 0 : red pixel 0 X X | green pixel 0 X X
+ * address 1 : blue pixel 0 X X | red pixel 1 X X
+ * address 2 : green pixel 1 X X | blue pixel 1 X X
+ */
+
+ /* Set Cursor */
+ ST7789H2_SetCursor(Xpos, Ypos);
+ /* Prepare to read LCD RAM */
+ ST7789H2_WriteReg(ST7789H2_READ_RAM, (uint8_t*)NULL, 0); /* RAM read data command */
+ /* Dummy read */
+ LCD_IO_ReadData();
+ /* Read first part of the RGB888 data */
+ rgb888_part1 = LCD_IO_ReadData();
+ /* Read first part of the RGB888 data */
+ rgb888_part2 = LCD_IO_ReadData();
+
+ /* red component */
+ rgb888.red = (rgb888_part1 & 0xFC00) >> 8;
+ /* green component */
+ rgb888.green = (rgb888_part1 & 0x00FC) >> 0;
+ /* blue component */
+ rgb888.blue = (rgb888_part2 & 0xFC00) >> 8;
+
+ return rgb888;
+}
+
+
+/**
+ * @brief Displays a single picture line.
+ * @param pdata: picture address.
+ * @param Xpos: Image X position in the LCD
+ * @param Ypos: Image Y position in the LCD
+ * @param Xsize: Image X size in the LCD
+ * @retval None
+ */
+static void ST7789H2_DrawRGBHLine(uint16_t Xpos, uint16_t Ypos, uint16_t Xsize, uint8_t *pdata)
+{
+ uint32_t i = 0;
+ uint32_t posX;
+ uint16_t *rgb565 = (uint16_t*)pdata;
+
+ /* Prepare to write to LCD RAM */
+ ST7789H2_WriteReg(ST7789H2_WRITE_RAM, (uint8_t*)NULL, 0); /* RAM write data command */
+
+ for (posX = Xpos; posX < (Xsize + Xpos); posX++)
+ {
+ if ((posX >= WindowsXstart) && (Ypos >= WindowsYstart) && /* Check we are in the defined window */
+ (posX <= WindowsXend) && (Ypos <= WindowsYend))
+ {
+ if (posX != (Xsize + Xpos)) /* When writing last pixel when size is odd, the third part is not written */
+ {
+ LCD_IO_WriteData(rgb565[i]);
+ }
+ i++;
+ }
+ }
+}
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/P3_SETR2/Components/st7789h2/st7789h2.h b/P3_SETR2/Components/st7789h2/st7789h2.h
new file mode 100644
index 0000000..a1ba08a
--- /dev/null
+++ b/P3_SETR2/Components/st7789h2/st7789h2.h
@@ -0,0 +1,172 @@
+/**
+ ******************************************************************************
+ * @file st7789h2.h
+ * @author MCD Application Team
+ * @brief This file contains all the functions prototypes for the st7789h2.c
+ * driver.
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2016 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __ST7789H2_H
+#define __ST7789H2_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include
+#include "../Common/lcd.h"
+
+/** @addtogroup BSP
+ * @{
+ */
+
+/** @addtogroup Components
+ * @{
+ */
+
+/** @addtogroup ST7789H2
+ * @{
+ */
+
+/** @defgroup ST7789H2_Exported_Types ST7789H2 Exported Types
+ * @{
+ */
+/**
+ * @}
+ */
+
+/** @defgroup ST7789H2_Exported_Constants ST7789H2 Exported Constants
+ * @{
+ */
+/**
+ * @brief ST7789H2 ID
+ */
+#define ST7789H2_ID 0x85
+
+/**
+ * @brief ST7789H2 Size
+ */
+#define ST7789H2_LCD_PIXEL_WIDTH ((uint16_t)240)
+#define ST7789H2_LCD_PIXEL_HEIGHT ((uint16_t)240)
+
+/**
+ * @brief LCD_OrientationTypeDef
+ * Possible values of Display Orientation
+ */
+#define ST7789H2_ORIENTATION_PORTRAIT ((uint32_t)0x00) /* Portrait orientation choice of LCD screen */
+#define ST7789H2_ORIENTATION_LANDSCAPE ((uint32_t)0x01) /* Landscape orientation choice of LCD screen */
+#define ST7789H2_ORIENTATION_LANDSCAPE_ROT180 ((uint32_t)0x02) /* Landscape rotated 180 orientation choice of LCD screen */
+
+/**
+ * @brief ST7789H2 Registers
+ */
+#define ST7789H2_LCD_ID 0x04
+#define ST7789H2_SLEEP_IN 0x10
+#define ST7789H2_SLEEP_OUT 0x11
+#define ST7789H2_PARTIAL_DISPLAY 0x12
+#define ST7789H2_DISPLAY_INVERSION 0x21
+#define ST7789H2_DISPLAY_ON 0x29
+#define ST7789H2_WRITE_RAM 0x2C
+#define ST7789H2_READ_RAM 0x2E
+#define ST7789H2_CASET 0x2A
+#define ST7789H2_RASET 0x2B
+#define ST7789H2_VSCRDEF 0x33 /* Vertical Scroll Definition */
+#define ST7789H2_VSCSAD 0x37 /* Vertical Scroll Start Address of RAM */
+#define ST7789H2_TEARING_EFFECT 0x35
+#define ST7789H2_NORMAL_DISPLAY 0x36
+#define ST7789H2_IDLE_MODE_OFF 0x38
+#define ST7789H2_IDLE_MODE_ON 0x39
+#define ST7789H2_COLOR_MODE 0x3A
+#define ST7789H2_WRCABCMB 0x5E /* Write Content Adaptive Brightness Control */
+#define ST7789H2_RDCABCMB 0x5F /* Read Content Adaptive Brightness Control */
+#define ST7789H2_PORCH_CTRL 0xB2
+#define ST7789H2_GATE_CTRL 0xB7
+#define ST7789H2_VCOM_SET 0xBB
+#define ST7789H2_DISPLAY_OFF 0xBD
+#define ST7789H2_LCM_CTRL 0xC0
+#define ST7789H2_VDV_VRH_EN 0xC2
+#define ST7789H2_VDV_SET 0xC4
+#define ST7789H2_VCOMH_OFFSET_SET 0xC5
+#define ST7789H2_FR_CTRL 0xC6
+#define ST7789H2_POWER_CTRL 0xD0
+#define ST7789H2_PV_GAMMA_CTRL 0xE0
+#define ST7789H2_NV_GAMMA_CTRL 0xE1
+
+/**
+ * @}
+ */
+
+/** @defgroup ST7789H2_Exported_Functions ST7789H2 Exported Functions
+ * @{
+ */
+void ST7789H2_Init(void);
+void ST7789H2_SetOrientation(uint32_t orientation);
+uint16_t ST7789H2_ReadID(void);
+void ST7789H2_WriteReg(uint8_t Command, uint8_t *Parameters, uint8_t NbParameters);
+uint8_t ST7789H2_ReadReg(uint8_t Command);
+
+void ST7789H2_DisplayOn(void);
+void ST7789H2_DisplayOff(void);
+void ST7789H2_SetCursor(uint16_t Xpos, uint16_t Ypos);
+void ST7789H2_WritePixel(uint16_t Xpos, uint16_t Ypos, uint16_t RGBCode);
+uint16_t ST7789H2_ReadPixel(uint16_t Xpos, uint16_t Ypos);
+
+void ST7789H2_DrawHLine(uint16_t RGBCode, uint16_t Xpos, uint16_t Ypos, uint16_t Length);
+void ST7789H2_DrawVLine(uint16_t RGBCode, uint16_t Xpos, uint16_t Ypos, uint16_t Length);
+void ST7789H2_DrawBitmap(uint16_t Xpos, uint16_t Ypos, uint8_t *pbmp);
+void ST7789H2_DrawRGBImage(uint16_t Xpos, uint16_t Ypos, uint16_t Xsize, uint16_t Ysize, uint8_t *pdata);
+
+void ST7789H2_SetDisplayWindow(uint16_t Xpos, uint16_t Ypos, uint16_t Width, uint16_t Height);
+
+
+uint16_t ST7789H2_GetLcdPixelWidth(void);
+uint16_t ST7789H2_GetLcdPixelHeight(void);
+
+/* LCD driver structure */
+extern LCD_DrvTypeDef ST7789H2_drv;
+
+/* LCD IO functions */
+extern void LCD_IO_Init(void);
+extern void LCD_IO_WriteMultipleData(uint16_t *pData, uint32_t Size);
+extern void LCD_IO_WriteReg(uint8_t Reg);
+extern void LCD_IO_WriteData(uint16_t RegValue);
+extern uint16_t LCD_IO_ReadData(void);
+extern void LCD_IO_Delay(uint32_t delay);
+
+/**
+ * @}
+ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __ST7789H2_H */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/P3_SETR2/Components/stmpe1600/Release_Notes.html b/P3_SETR2/Components/stmpe1600/Release_Notes.html
new file mode 100644
index 0000000..102e14a
--- /dev/null
+++ b/P3_SETR2/Components/stmpe1600/Release_Notes.html
@@ -0,0 +1,84 @@
+
+
+
+
+
+
+ Release Notes for STMPE1600 Component Drivers
+
+
+
+
+
+
+
+
+
+
+Release Notes for STMPE1600 Component Drivers
+Copyright © 2015 STMicroelectronics
+
+
+
+
+
+
License
+
Licensed by ST under BSD 3-Clause license (the "License"). You may not use this package except in compliance with the License. You may obtain a copy of the License at:
+
https://opensource.org/licenses/BSD-3-Clause
+
Purpose
+
This directory contains the STMPE1600 component drivers.
+
+
+
Update History
+
+
V1.1.1 / 03-April-2019
+
+
Main Changes
+
+Update release notes format
+Reformat the BSD 3-Clause license declaration in the files header (replace license terms by a web reference to OSI website where those terms lie)
+
+
+
+
+
V1.1.0 / 10-February-2015
+
+
Main Changes
+
+Update IO_Pin parameter to uint32_t in all IO functionalities functions
+This version is to be used with Common V2.0.0 version
+
+
+
+
+
V1.0.1 / 02-December-2014
+
+
Main Changes
+
+stmpe1600.h: change “\” by “/” in the include path to fix compilation issue under Linux
+
+
+
+
+
V1.0.0 / 18-February-2014
+
+
Main Changes
+
+First official release
+
+
+
+
+
+
+
+
diff --git a/P3_SETR2/Components/stmpe1600/stmpe1600.c b/P3_SETR2/Components/stmpe1600/stmpe1600.c
new file mode 100644
index 0000000..391e4db
--- /dev/null
+++ b/P3_SETR2/Components/stmpe1600/stmpe1600.c
@@ -0,0 +1,586 @@
+/**
+ ******************************************************************************
+ * @file stmpe1600.c
+ * @author MCD Application Team
+ * @brief This file provides a set of functions needed to manage the STMPE1600
+ * IO Expander devices.
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2015 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/* Includes ------------------------------------------------------------------*/
+#include "stmpe1600.h"
+
+/** @addtogroup BSP
+ * @{
+ */
+
+/** @addtogroup Components
+ * @{
+ */
+
+/** @defgroup STMPE1600
+ * @{
+ */
+
+/* Private typedef -----------------------------------------------------------*/
+
+/** @defgroup STMPE1600_Private_Types_Definitions
+ * @{
+ */
+
+/* Private define ------------------------------------------------------------*/
+
+/** @defgroup STMPE1600_Private_Defines
+ * @{
+ */
+#define STMPE1600_MAX_INSTANCE 2
+
+/* Private macro -------------------------------------------------------------*/
+
+/** @defgroup STMPE1600_Private_Macros
+ * @{
+ */
+
+/* Private variables ---------------------------------------------------------*/
+static uint16_t tmp = 0;
+
+/** @defgroup STMPE1600_Private_Variables
+ * @{
+ */
+/* IO driver structure initialization */
+IO_DrvTypeDef stmpe1600_io_drv =
+{
+ stmpe1600_Init,
+ stmpe1600_ReadID,
+ stmpe1600_Reset,
+ stmpe1600_Start,
+ stmpe1600_IO_Config,
+ stmpe1600_IO_WritePin,
+ stmpe1600_IO_ReadPin,
+ 0,
+ 0,
+ stmpe1600_IO_ITStatus,
+ stmpe1600_IO_ClearIT,
+};
+
+uint8_t stmpe1600[STMPE1600_MAX_INSTANCE] = {0};
+/**
+ * @}
+ */
+
+/* Private function prototypes -----------------------------------------------*/
+
+/** @defgroup STMPE1600_Private_Function_Prototypes
+ * @{
+ */
+static uint8_t stmpe1600_GetInstance(uint16_t DeviceAddr);
+
+/* Private functions ---------------------------------------------------------*/
+
+/** @defgroup STMPE1600_Private_Functions
+ * @{
+ */
+
+/**
+ * @brief Initialize the stmpe1600 and configure the needed hardware resources
+ * @param DeviceAddr: Device address on communication Bus.
+ * @retval None
+ */
+void stmpe1600_Init(uint16_t DeviceAddr)
+{
+ uint8_t instance;
+ uint8_t empty;
+
+ /* Check if device instance already exists */
+ instance = stmpe1600_GetInstance(DeviceAddr);
+
+ if(instance == 0xFF)
+ {
+ /* Look for empty instance */
+ empty = stmpe1600_GetInstance(0);
+
+ if(empty < STMPE1600_MAX_INSTANCE)
+ {
+ /* Register the current device instance */
+ stmpe1600[empty] = DeviceAddr;
+
+ /* Initialize IO BUS layer */
+ IOE_Init();
+
+ /* Generate stmpe1600 Software reset */
+ stmpe1600_Reset(DeviceAddr);
+ }
+ }
+}
+
+/**
+ * @brief Configures the touch Screen Controller (Single point detection)
+ * @param DeviceAddr: Device address on communication Bus.
+ * @retval None.
+ */
+void stmpe1600_Start(uint16_t DeviceAddr, uint32_t IO_Pin)
+{
+ /*Configuration already done during the initialization */
+}
+
+/**
+ * @brief Reset the stmpe1600 by Software.
+ * @param DeviceAddr: Device address on communication Bus.
+ * @retval None
+ */
+void stmpe1600_Reset(uint16_t DeviceAddr)
+{
+ /* Power Down the stmpe1600 */
+ IOE_Write(DeviceAddr, STMPE1600_REG_SYS_CTRL, (uint16_t)0x80);
+
+ /* Wait for a delay to ensure registers erasing */
+ IOE_Delay(2);
+
+ /* Power On the Codec after the power off: all registers are reinitialized */
+ IOE_Write(DeviceAddr, STMPE1600_REG_SYS_CTRL, (uint16_t)0x00);
+
+ /* Wait for a delay to ensure registers erasing */
+ IOE_Delay(2);
+}
+
+/**
+ * @brief Read the stmpe1600 device ID.
+ * @param DeviceAddr: Device address on communication Bus.
+ * @retval The Device ID (two bytes).
+ */
+uint16_t stmpe1600_ReadID(uint16_t DeviceAddr)
+{
+ uint8_t tmpData[2] = {0 , 0};
+
+ /* Initialize IO BUS layer */
+ IOE_Init();
+
+ /* Read the stmpe1600 device ID */
+ IOE_ReadMultiple(DeviceAddr, STMPE1600_REG_CHP_ID, tmpData, 2);
+
+ /* Return the device ID value */
+ return((uint16_t)tmpData[0] | (((uint16_t)tmpData[1]) << 8));
+}
+
+/**
+ * @brief Set the global interrupt Polarity.
+ * @param DeviceAddr: Device address on communication Bus.
+ * @param Polarity: could be one of these values;
+ * @arg STMPE1600_POLARITY_LOW: Interrupt line is active Low/Falling edge
+ * @arg STMPE1600_POLARITY_HIGH: Interrupt line is active High/Rising edge
+ * @retval None
+ */
+void stmpe1600_SetITPolarity(uint16_t DeviceAddr, uint8_t Polarity)
+{
+ uint8_t tmp = 0;
+
+ /* Get the current register value */
+ tmp = IOE_Read(DeviceAddr, STMPE1600_REG_SYS_CTRL);
+
+ /* Mask the polarity bit */
+ tmp &= ~(uint16_t)0x01;
+
+ /* Set the Interrupt Output line polarity */
+ tmp |= (uint8_t)Polarity;
+
+ /* Set the new register value */
+ IOE_Write(DeviceAddr, STMPE1600_REG_SYS_CTRL, tmp);
+}
+
+/**
+ * @brief Enable the Global interrupt.
+ * @param DeviceAddr: Device address on communication Bus.
+ * @retval None
+ */
+void stmpe1600_EnableGlobalIT(uint16_t DeviceAddr)
+{
+ uint8_t tmpData[2] = {0 , 0};
+
+ /* Configure NVIC IT for IOE */
+ IOE_ITConfig();
+
+ /* Get the current register value */
+ IOE_ReadMultiple(DeviceAddr, STMPE1600_REG_SYS_CTRL, tmpData, 2);
+
+ tmp = ((uint16_t)tmpData[0] | (((uint16_t)tmpData[1]) << 8));
+
+ /* Set the global interrupts to be Enabled */
+ tmp |= (uint16_t)STMPE1600_IT_ENABLE;
+
+ /* Write Back the Interrupt Control register */
+ IOE_WriteMultiple(DeviceAddr, STMPE1600_REG_SYS_CTRL, (uint8_t *)&tmp, 2);
+}
+
+/**
+ * @brief Disable the Global interrupt.
+ * @param DeviceAddr: Device address on communication Bus.
+ * @retval None
+ */
+void stmpe1600_DisableGlobalIT(uint16_t DeviceAddr)
+{
+ uint8_t tmpData[2] = {0 , 0};
+
+ /* Get the current register value */
+ IOE_ReadMultiple(DeviceAddr, STMPE1600_REG_SYS_CTRL, tmpData, 2);
+
+ tmp = ((uint16_t)tmpData[0] | (((uint16_t)tmpData[1]) << 8));
+
+ /* Set the global interrupts to be Enabled */
+ tmp &= ~(uint16_t)STMPE1600_IT_ENABLE;
+
+ /* Write Back the Interrupt Control register */
+ IOE_WriteMultiple(DeviceAddr, STMPE1600_REG_SYS_CTRL, (uint8_t *)&tmp, 2);
+}
+
+/**
+ * @brief Initialize the selected pin(s) direction.
+ * @param DeviceAddr: Device address on communication Bus.
+ * @param IO_Pin: IO pin(s) to be configured.
+ * This parameter could be any combination of the following values:
+ * @arg STMPE1600_PIN_x: where x can be from 0 to 15.
+ * @param Direction: could be STMPE1600_DIRECTION_IN or STMPE1600_DIRECTION_OUT.
+ * @retval None
+ */
+void stmpe1600_IO_InitPin(uint16_t DeviceAddr, uint32_t IO_Pin, uint8_t Direction)
+{
+ uint8_t tmpData[2] = {0 , 0};
+
+ /* Get the current register value */
+ IOE_ReadMultiple(DeviceAddr, STMPE1600_REG_GPDR, tmpData, 2);
+
+ tmp = ((uint16_t)tmpData[0] | (((uint16_t)tmpData[1]) << 8));
+
+ /* Set the Pin direction */
+ if (Direction != STMPE1600_DIRECTION_IN)
+ {
+ tmp |= (uint16_t)IO_Pin;
+ }
+ else
+ {
+ tmp &= ~(uint16_t)IO_Pin;
+ }
+
+ /* Set the new register value */
+ IOE_WriteMultiple(DeviceAddr, STMPE1600_REG_GPDR, (uint8_t *)&tmp, 2);
+}
+
+/**
+ * @brief Configure the IO pin(s) according to IO mode structure value.
+ * @param DeviceAddr: Device address on communication Bus.
+ * @param IO_Pin: The output pin to be set or reset. This parameter can be one
+ * of the following values:
+ * @arg STMPE1600_PIN_x: where x can be from 0 to 7.
+ * @param IO_Mode: The IO pin mode to configure, could be one of the following values:
+ * @arg IO_MODE_INPUT
+ * @arg IO_MODE_OUTPUT
+ * @arg IO_MODE_IT_RISING_EDGE
+ * @arg IO_MODE_IT_FALLING_EDGE
+ * @retval 0 if no error, IO_Mode if error
+ */
+uint8_t stmpe1600_IO_Config(uint16_t DeviceAddr, uint32_t IO_Pin, IO_ModeTypedef IO_Mode)
+{
+ uint8_t error_code = 0;
+ uint8_t buffer[2] = {0,0};
+
+ /* Configure IO pin according to selected IO mode */
+ switch(IO_Mode)
+ {
+ case IO_MODE_INPUT: /* Input mode */
+ stmpe1600_IO_DisablePinIT(DeviceAddr, IO_Pin);
+ stmpe1600_IO_InitPin(DeviceAddr, IO_Pin, STMPE1600_DIRECTION_IN);
+ break;
+
+ case IO_MODE_OUTPUT: /* Output mode */
+ stmpe1600_IO_DisablePinIT(DeviceAddr, IO_Pin);
+ stmpe1600_IO_InitPin(DeviceAddr, IO_Pin, STMPE1600_DIRECTION_OUT);
+ break;
+
+ case IO_MODE_IT_RISING_EDGE: /* Interrupt rising edge mode */
+ stmpe1600_SetITPolarity(DeviceAddr, STMPE1600_POLARITY_HIGH);
+ stmpe1600_IO_EnablePinIT(DeviceAddr, IO_Pin);
+ stmpe1600_IO_InitPin(DeviceAddr, IO_Pin, STMPE1600_DIRECTION_IN);
+ /* Clear all IO IT pending bits if any */
+ stmpe1600_IO_ClearIT(DeviceAddr, IO_Pin);
+
+ /* Read GMPR to enable interrupt */
+ IOE_ReadMultiple(DeviceAddr , STMPE1600_REG_GPMR, buffer, 2);
+ break;
+
+ case IO_MODE_IT_FALLING_EDGE: /* Interrupt falling edge mode */
+ stmpe1600_SetITPolarity(DeviceAddr, STMPE1600_POLARITY_LOW);
+ stmpe1600_IO_EnablePinIT(DeviceAddr, IO_Pin);
+ stmpe1600_IO_InitPin(DeviceAddr, IO_Pin, STMPE1600_DIRECTION_IN);
+
+ /* Clear all IO IT pending bits if any */
+ stmpe1600_IO_ClearIT(DeviceAddr, IO_Pin);
+
+ /* Read GMPR to enable interrupt */
+ IOE_ReadMultiple(DeviceAddr , STMPE1600_REG_GPMR, buffer, 2);
+ break;
+
+ default:
+ error_code = (uint8_t) IO_Mode;
+ break;
+ }
+ return error_code;
+}
+
+/**
+ * @brief Enable polarity inversion of the selected IO pin(s).
+ * @param DeviceAddr: Device address on communication Bus.
+ * @param IO_Pin: IO pin(s) to be configured.
+ * This parameter could be any combination of the following values:
+ * @arg STMPE1600_PIN_x: where x can be from 0 to 15.
+ * @retval None
+ */
+void stmpe1600_IO_PolarityInv_Enable(uint16_t DeviceAddr, uint32_t IO_Pin)
+{
+ uint8_t tmpData[2] = {0 , 0};
+
+ /* Get the current register value */
+ IOE_ReadMultiple(DeviceAddr, STMPE1600_REG_GPPIR, tmpData, 2);
+
+ tmp = ((uint16_t)tmpData[0] | (((uint16_t)tmpData[1]) << 8));
+
+ /* Enable pin polarity inversion */
+ tmp |= (uint16_t)IO_Pin;
+
+ /* Set the new register value */
+ IOE_WriteMultiple(DeviceAddr, STMPE1600_REG_GPPIR, (uint8_t *)&tmp, 2);
+}
+
+/**
+ * @brief Disable polarity inversion of the selected IO pins.
+ * @param DeviceAddr: Device address on communication Bus.
+ * @param IO_Pin: IO pin(s) to be configured.
+ * This parameter could be any combination of the following values:
+ * @arg STMPE1600_PIN_x: where x can be from 0 to 15.
+ * @retval None
+ */
+void stmpe1600_IO_PolarityInv_Disable(uint16_t DeviceAddr, uint32_t IO_Pin)
+{
+ uint8_t tmpData[2] = {0 , 0};
+
+ /* Get the current register value */
+ IOE_ReadMultiple(DeviceAddr, STMPE1600_REG_GPPIR, tmpData, 2);
+
+ tmp = ((uint16_t)tmpData[0] | (((uint16_t)tmpData[1]) << 8));
+
+ /* Disable pin polarity inversion */
+ tmp &= ~ (uint16_t)IO_Pin;
+
+ /* Set the new register value */
+ IOE_WriteMultiple(DeviceAddr, STMPE1600_REG_GPPIR, (uint8_t *)&tmp, 2);
+}
+
+/**
+ * @brief Set the value of the selected IO pins.
+ * @param DeviceAddr: Device address on communication Bus.
+ * @param IO_Pin: IO pin(s) to be set.
+ * This parameter could be any combination of the following values:
+ * @arg STMPE1600_PIN_x: where x can be from 0 to 15.
+ * @param PinState: The value to be set.
+ * @retval None
+ */
+void stmpe1600_IO_WritePin(uint16_t DeviceAddr, uint32_t IO_Pin, uint8_t PinState)
+{
+ uint8_t tmpData[2] = {0 , 0};
+
+ /* Get the current register value */
+ IOE_ReadMultiple(DeviceAddr, STMPE1600_REG_GPMR, tmpData, 2);
+
+ tmp = ((uint16_t)tmpData[0] | (((uint16_t)tmpData[1]) << 8));
+
+ /* Set the pin state */
+ if(PinState != 0)
+ {
+ tmp |= (uint16_t)IO_Pin;
+ }
+ else
+ {
+ tmp &= ~(uint16_t)IO_Pin;
+ }
+
+ /* Set the new register value */
+ IOE_WriteMultiple(DeviceAddr, STMPE1600_REG_GPSR, (uint8_t *)&tmp, 2);
+}
+
+/**
+ * @brief Read the state of the selected IO pin(s).
+ * @param DeviceAddr: Device address on communication Bus.
+ * @param IO_Pin: IO pin(s) to be read.
+ * This parameter could be any combination of the following values:
+ * @arg STMPE1600_PIN_x: where x can be from 0 to 15.
+ * @retval State of the selected IO pin(s).
+ */
+uint32_t stmpe1600_IO_ReadPin(uint16_t DeviceAddr, uint32_t IO_Pin)
+{
+ uint8_t tmpData[2] = {0 , 0};
+
+ /* Get the register value */
+ IOE_ReadMultiple(DeviceAddr, STMPE1600_REG_GPMR, tmpData, 2);
+
+ tmp = ((uint16_t)tmpData[0] | (((uint16_t)tmpData[1]) << 8));
+
+ /* Return the pin(s) state */
+ return(tmp & IO_Pin);
+}
+
+/**
+ * @brief Enable the interrupt mode for the selected IO pin(s).
+ * @param DeviceAddr: Device address on communication Bus.
+ * @param IO_Pin: IO pin(s) to be configured.
+ * This parameter could be any combination of the following values:
+ * @arg STMPE1600_PIN_x: where x can be from 0 to 15.
+ * @retval None
+ */
+void stmpe1600_IO_EnablePinIT(uint16_t DeviceAddr, uint32_t IO_Pin)
+{
+ uint8_t tmpData[2] = {0 , 0};
+
+ /* Enable global interrupt */
+ stmpe1600_EnableGlobalIT(DeviceAddr);
+
+ /* Get the current register value */
+ IOE_ReadMultiple(DeviceAddr, STMPE1600_REG_IEGPIOR, tmpData, 2);
+
+ tmp = ((uint16_t)tmpData[0] | (((uint16_t)tmpData[1]) << 8));
+
+ /* Put pin in IT mode */
+ tmp |= (uint16_t)IO_Pin;
+
+ /* Write the new register value */
+ IOE_WriteMultiple(DeviceAddr, STMPE1600_REG_IEGPIOR, (uint8_t *)&tmp, 2);
+}
+
+/**
+ * @brief Disable the interrupt mode for the selected IO pin(s).
+ * @param DeviceAddr: Device address on communication Bus.
+ * @param IO_Pin: IO pin(s) to be configured.
+ * This parameter could be any combination of the following values:
+ * @arg STMPE1600_PIN_x: where x can be from 0 to 15.
+ * @retval None
+ */
+void stmpe1600_IO_DisablePinIT(uint16_t DeviceAddr, uint32_t IO_Pin)
+{
+ uint8_t tmpData[2] = {0 , 0};
+
+ /* Get the current register value */
+ IOE_ReadMultiple(DeviceAddr, STMPE1600_REG_IEGPIOR, tmpData, 2);
+
+ tmp = ((uint16_t)tmpData[0] | (((uint16_t)tmpData[1]) << 8));
+
+ /* Disable the IT pin mode */
+ tmp &= ~(uint16_t)IO_Pin;
+
+ /* Set the new register value */
+ IOE_WriteMultiple(DeviceAddr, STMPE1600_REG_IEGPIOR, (uint8_t *)&tmp, 2);
+}
+
+/**
+ * @brief Read the IT status of the selected IO pin(s)
+ * (clears all the pending bits if any).
+ * @param DeviceAddr: Device address on communication Bus.
+ * @param IO_Pin: IO pin(s) to be checked.
+ * This parameter could be any combination of the following values:
+ * @arg STMPE1600_PIN_x: where x can be from 0 to 15.
+ * @retval IT Status of the selected IO pin(s).
+ */
+uint32_t stmpe1600_IO_ITStatus(uint16_t DeviceAddr, uint32_t IO_Pin)
+{
+ uint8_t tmpData[2] = {0 , 0};
+
+ /* Get the register value */
+ IOE_ReadMultiple(DeviceAddr, STMPE1600_REG_ISGPIOR, tmpData, 2);
+
+ tmp = ((uint16_t)tmpData[0] | (((uint16_t)tmpData[1]) << 8));
+
+ /* Return the pin IT status */
+ return((tmp & IO_Pin) == IO_Pin);
+}
+
+/**
+ * @brief Detect an IT pending bit from the selected IO pin(s).
+ * (clears all the pending bits if any).
+ * @param DeviceAddr: Device address on communication Bus.
+ * @param IO_Pin: IO pin(s) to be checked.
+ * This parameter could be any combination of the following values:
+ * @arg STMPE1600_PIN_x: where x can be from 0 to 15.
+ * @retval IT pending bit detection status.
+ */
+uint8_t stmpe1600_IO_ReadIT(uint16_t DeviceAddr, uint32_t IO_Pin)
+{
+ uint8_t tmpData[2] = {0 , 0};
+
+ /* Get the register value */
+ IOE_ReadMultiple(DeviceAddr, STMPE1600_REG_ISGPIOR, tmpData, 2);
+
+ tmp = ((uint16_t)tmpData[0] | (((uint16_t)tmpData[1]) << 8));
+
+ /* Return if there is an IT pending bit or not */
+ return(tmp & IO_Pin);
+}
+
+/**
+ * @brief Clear all the IT pending bits if any.
+ * @param DeviceAddr: Device address on communication Bus.
+ * @retval None
+ */
+void stmpe1600_IO_ClearIT(uint16_t DeviceAddr, uint32_t IO_Pin)
+{
+ uint8_t tmpData[2] = {0 , 0};
+
+ /* Get the register value to clear all pending bits */
+ IOE_ReadMultiple(DeviceAddr, STMPE1600_REG_ISGPIOR, tmpData, 2);
+}
+
+/**
+ * @brief Check if the device instance of the selected address is already registered
+ * and return its index
+ * @param DeviceAddr: Device address on communication Bus.
+ * @retval Index of the device instance if registered, 0xFF if not.
+ */
+static uint8_t stmpe1600_GetInstance(uint16_t DeviceAddr)
+{
+ uint8_t idx = 0;
+
+ /* Check all the registered instances */
+ for(idx = 0; idx < STMPE1600_MAX_INSTANCE ; idx ++)
+ {
+ /* Return index if there is address match */
+ if(stmpe1600[idx] == DeviceAddr)
+ {
+ return idx;
+ }
+ }
+
+ return 0xFF;
+}
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/P3_SETR2/Components/stmpe1600/stmpe1600.h b/P3_SETR2/Components/stmpe1600/stmpe1600.h
new file mode 100644
index 0000000..da3ba7a
--- /dev/null
+++ b/P3_SETR2/Components/stmpe1600/stmpe1600.h
@@ -0,0 +1,195 @@
+/**
+ ******************************************************************************
+ * @file stmpe1600.h
+ * @author MCD Application Team
+ * @brief This file contains all the functions prototypes for the
+ * stmpe1600.c IO expander driver.
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2014 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STMPE1600_H
+#define __STMPE1600_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "../Common/io.h"
+
+/** @addtogroup BSP
+ * @{
+ */
+
+/** @addtogroup Component
+ * @{
+ */
+
+/** @defgroup STMPE1600
+ * @{
+ */
+
+/* Exported types ------------------------------------------------------------*/
+
+/** @defgroup STMPE1600_Exported_Types
+ * @{
+ */
+
+/* Exported constants --------------------------------------------------------*/
+
+/** @defgroup STMPE1600_Exported_Constants
+ * @{
+ */
+
+/**
+ * @brief STMPE1600 chip IDs
+ */
+#define STMPE1600_ID 0x1600
+
+/**
+ * @brief Interrupt enable
+ */
+#define STMPE1600_IT_ENABLE 0x04
+
+/**
+ * @brief Identification registers & System Control
+ */
+#define STMPE1600_REG_CHP_ID 0x00
+#define STMPE1600_REG_ID_VERSION 0x02
+#define STMPE1600_REG_SYS_CTRL 0x03
+
+/**
+ * @brief IO Registers
+ */
+
+#define STMPE1600_REG_GPMR 0x10
+#define STMPE1600_REG_GPSR 0x12
+#define STMPE1600_REG_GPDR 0x14
+#define STMPE1600_REG_GPPIR 0x16
+
+/**
+ * @brief Interrupt Control registers
+ */
+#define STMPE1600_REG_IEGPIOR 0x08
+#define STMPE1600_REG_ISGPIOR 0x0A
+
+/**
+ * @brief IO Pins direction
+ */
+#define STMPE1600_DIRECTION_IN 0x00
+#define STMPE1600_DIRECTION_OUT 0x01
+
+/**
+ * @brief IO IT polarity
+ */
+#define STMPE1600_POLARITY_LOW 0x00
+#define STMPE1600_POLARITY_HIGH 0x01
+
+/**
+ * @brief IO Pins
+ */
+#define STMPE1600_PIN_0 0x0001
+#define STMPE1600_PIN_1 0x0002
+#define STMPE1600_PIN_2 0x0004
+#define STMPE1600_PIN_3 0x0008
+#define STMPE1600_PIN_4 0x0010
+#define STMPE1600_PIN_5 0x0020
+#define STMPE1600_PIN_6 0x0040
+#define STMPE1600_PIN_7 0x0080
+#define STMPE1600_PIN_8 0x0100
+#define STMPE1600_PIN_9 0x0200
+#define STMPE1600_PIN_10 0x0400
+#define STMPE1600_PIN_11 0x0800
+#define STMPE1600_PIN_12 0x1000
+#define STMPE1600_PIN_13 0x2000
+#define STMPE1600_PIN_14 0x4000
+#define STMPE1600_PIN_15 0x8000
+#define STMPE1600_PIN_ALL 0xFFFF
+
+/**
+ * @}
+ */
+
+/* Exported macro ------------------------------------------------------------*/
+
+/** @defgroup STMPE1600_Exported_Macros
+ * @{
+ */
+
+/* Exported functions --------------------------------------------------------*/
+
+/** @defgroup STMPE1600_Exported_Functions
+ * @{
+ */
+
+/**
+ * @brief STMPE1600 Control functions
+ */
+void stmpe1600_Init(uint16_t DeviceAddr);
+void stmpe1600_Reset(uint16_t DeviceAddr);
+uint16_t stmpe1600_ReadID(uint16_t DeviceAddr);
+void stmpe1600_SetITPolarity(uint16_t DeviceAddr, uint8_t Polarity);
+void stmpe1600_EnableGlobalIT(uint16_t DeviceAddr);
+void stmpe1600_DisableGlobalIT(uint16_t DeviceAddr);
+
+/**
+ * @brief STMPE1600 IO functionalities functions
+ */
+void stmpe1600_IO_InitPin(uint16_t DeviceAddr, uint32_t IO_Pin, uint8_t Direction);
+uint8_t stmpe1600_IO_Config(uint16_t DeviceAddr, uint32_t IO_Pin, IO_ModeTypedef IO_Mode);
+void stmpe1600_IO_PolarityInv_Enable(uint16_t DeviceAddr, uint32_t IO_Pin);
+void stmpe1600_IO_PolarityInv_Disable(uint16_t DeviceAddr, uint32_t IO_Pin);
+void stmpe1600_IO_WritePin(uint16_t DeviceAddr, uint32_t IO_Pin, uint8_t PinState);
+uint32_t stmpe1600_IO_ReadPin(uint16_t DeviceAddr, uint32_t IO_Pin);
+void stmpe1600_IO_EnablePinIT(uint16_t DeviceAddr, uint32_t IO_Pin);
+void stmpe1600_IO_DisablePinIT(uint16_t DeviceAddr, uint32_t IO_Pin);
+uint32_t stmpe1600_IO_ITStatus(uint16_t DeviceAddr, uint32_t IO_Pin);
+uint8_t stmpe1600_IO_ReadIT(uint16_t DeviceAddr, uint32_t IO_Pin);
+void stmpe1600_IO_ClearIT(uint16_t DeviceAddr, uint32_t IO_Pin);
+void stmpe1600_Start(uint16_t DeviceAddr, uint32_t IO_Pin);
+
+void IOE_Init(void);
+void IOE_ITConfig (void);
+void IOE_Delay(uint32_t delay);
+void IOE_Write(uint8_t addr, uint8_t reg, uint8_t value);
+uint8_t IOE_Read(uint8_t addr, uint8_t reg);
+uint16_t IOE_ReadMultiple(uint8_t addr, uint8_t reg, uint8_t *buffer, uint16_t length);
+void IOE_WriteMultiple(uint8_t addr, uint8_t reg, uint8_t *buffer, uint16_t length);
+
+/* STMPE1600 driver structure */
+extern IO_DrvTypeDef stmpe1600_io_drv;
+
+
+#ifdef __cplusplus
+}
+#endif
+#endif /* __STMPE1600_H */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/P3_SETR2/Components/stmpe811/Release_Notes.html b/P3_SETR2/Components/stmpe811/Release_Notes.html
new file mode 100644
index 0000000..b5d0bdb
--- /dev/null
+++ b/P3_SETR2/Components/stmpe811/Release_Notes.html
@@ -0,0 +1,106 @@
+
+
+
+
+
+
+ Release Notes for STMPE811 Component Drivers
+
+
+
+
+
+
+
+
+
+
+Release Notes for STMPE811 Component Drivers
+Copyright © 2014 STMicroelectronics
+
+
+
+
+
+
License
+
Licensed by ST under BSD 3-Clause license (the "License"). You may not use this package except in compliance with the License. You may obtain a copy of the License at:
+
https://opensource.org/licenses/BSD-3-Clause
+
Purpose
+
This directory contains the STMPE811 component drivers.
+
+
+
Update History
+
+
V2.0.2 / 03-April-2019
+
+
Main Changes
+
+Update release notes format
+
+
+
+
+
V2.0.1 / 31-August-2018
+
+
Main Changes
+
+Reformat the BSD 3-Clause license declaration in the files header (replace license terms by a web reference to OSI website where those terms lie)
+
+
+
+
+
V2.0.0 / 15-December-2014
+
+
Main Changes
+
+All functions: update IO_Pin parameter to uint32_t instead of uint16_t
+Add a return valud for stmpe811_IO_Config() function
+
+
Important Note
+This new version V2.0.0 breaks the compatibility with V1.0.2, and it needs to be used with STM32Cube BSP Common V2.0.0.
+
+
+
+
V1.0.2 / 02-December-2014
+
+
Main Changes
+
+stmpe811.h: change “\” by “/” in the include path to fix compilation issue under Linux
+
+
+
+
+
V1.0.1 / 11-November-2014
+
+
Main Changes
+
+Fix limitation related to the selection of alternate function for TS physical IO
+Fix wrong pins definition of the TS
+Swap implementation of stmpe811_IO_EnableAF() and stmpe811_IO_DisableAF() functions
+Miscellaneous code cleanup of comments update
+
+
+
+
+
V1.0.0 / 18-February-2014
+
+
Main Changes
+
+First official release
+
+
+
+
+
+
+
+
diff --git a/P3_SETR2/Components/stmpe811/stmpe811.c b/P3_SETR2/Components/stmpe811/stmpe811.c
new file mode 100644
index 0000000..20e8f41
--- /dev/null
+++ b/P3_SETR2/Components/stmpe811/stmpe811.c
@@ -0,0 +1,959 @@
+/**
+ ******************************************************************************
+ * @file stmpe811.c
+ * @author MCD Application Team
+ * @brief This file provides a set of functions needed to manage the STMPE811
+ * IO Expander devices.
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2014 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/* Includes ------------------------------------------------------------------*/
+#include "stmpe811.h"
+
+/** @addtogroup BSP
+ * @{
+ */
+
+/** @addtogroup Components
+ * @{
+ */
+
+/** @defgroup STMPE811
+ * @{
+ */
+
+/** @defgroup STMPE811_Private_Types_Definitions
+ * @{
+ */
+
+/** @defgroup STMPE811_Private_Defines
+ * @{
+ */
+#define STMPE811_MAX_INSTANCE 2
+/**
+ * @}
+ */
+
+/** @defgroup STMPE811_Private_Macros
+ * @{
+ */
+/**
+ * @}
+ */
+
+/** @defgroup STMPE811_Private_Variables
+ * @{
+ */
+
+/* Touch screen driver structure initialization */
+TS_DrvTypeDef stmpe811_ts_drv =
+{
+ stmpe811_Init,
+ stmpe811_ReadID,
+ stmpe811_Reset,
+ stmpe811_TS_Start,
+ stmpe811_TS_DetectTouch,
+ stmpe811_TS_GetXY,
+ stmpe811_TS_EnableIT,
+ stmpe811_TS_ClearIT,
+ stmpe811_TS_ITStatus,
+ stmpe811_TS_DisableIT,
+};
+
+/* IO driver structure initialization */
+IO_DrvTypeDef stmpe811_io_drv =
+{
+ stmpe811_Init,
+ stmpe811_ReadID,
+ stmpe811_Reset,
+ stmpe811_IO_Start,
+ stmpe811_IO_Config,
+ stmpe811_IO_WritePin,
+ stmpe811_IO_ReadPin,
+ stmpe811_IO_EnableIT,
+ stmpe811_IO_DisableIT,
+ stmpe811_IO_ITStatus,
+ stmpe811_IO_ClearIT,
+};
+
+/* stmpe811 instances by address */
+uint8_t stmpe811[STMPE811_MAX_INSTANCE] = {0};
+/**
+ * @}
+ */
+
+/** @defgroup STMPE811_Private_Function_Prototypes
+ * @{
+ */
+static uint8_t stmpe811_GetInstance(uint16_t DeviceAddr);
+/**
+ * @}
+ */
+
+/** @defgroup STMPE811_Private_Functions
+ * @{
+ */
+
+/**
+ * @brief Initialize the stmpe811 and configure the needed hardware resources
+ * @param DeviceAddr: Device address on communication Bus.
+ * @retval None
+ */
+void stmpe811_Init(uint16_t DeviceAddr)
+{
+ uint8_t instance;
+ uint8_t empty;
+
+ /* Check if device instance already exists */
+ instance = stmpe811_GetInstance(DeviceAddr);
+
+ /* To prevent double initialization */
+ if(instance == 0xFF)
+ {
+ /* Look for empty instance */
+ empty = stmpe811_GetInstance(0);
+
+ if(empty < STMPE811_MAX_INSTANCE)
+ {
+ /* Register the current device instance */
+ stmpe811[empty] = DeviceAddr;
+
+ /* Initialize IO BUS layer */
+ IOE_Init();
+
+ /* Generate stmpe811 Software reset */
+ stmpe811_Reset(DeviceAddr);
+ }
+ }
+}
+
+/**
+ * @brief Reset the stmpe811 by Software.
+ * @param DeviceAddr: Device address on communication Bus.
+ * @retval None
+ */
+void stmpe811_Reset(uint16_t DeviceAddr)
+{
+ /* Power Down the stmpe811 */
+ IOE_Write(DeviceAddr, STMPE811_REG_SYS_CTRL1, 2);
+
+ /* Wait for a delay to ensure registers erasing */
+ IOE_Delay(10);
+
+ /* Power On the Codec after the power off => all registers are reinitialized */
+ IOE_Write(DeviceAddr, STMPE811_REG_SYS_CTRL1, 0);
+
+ /* Wait for a delay to ensure registers erasing */
+ IOE_Delay(2);
+}
+
+/**
+ * @brief Read the stmpe811 IO Expander device ID.
+ * @param DeviceAddr: Device address on communication Bus.
+ * @retval The Device ID (two bytes).
+ */
+uint16_t stmpe811_ReadID(uint16_t DeviceAddr)
+{
+ /* Initialize IO BUS layer */
+ IOE_Init();
+
+ /* Return the device ID value */
+ return ((IOE_Read(DeviceAddr, STMPE811_REG_CHP_ID_LSB) << 8) |\
+ (IOE_Read(DeviceAddr, STMPE811_REG_CHP_ID_MSB)));
+}
+
+/**
+ * @brief Enable the Global interrupt.
+ * @param DeviceAddr: Device address on communication Bus.
+ * @retval None
+ */
+void stmpe811_EnableGlobalIT(uint16_t DeviceAddr)
+{
+ uint8_t tmp = 0;
+
+ /* Read the Interrupt Control register */
+ tmp = IOE_Read(DeviceAddr, STMPE811_REG_INT_CTRL);
+
+ /* Set the global interrupts to be Enabled */
+ tmp |= (uint8_t)STMPE811_GIT_EN;
+
+ /* Write Back the Interrupt Control register */
+ IOE_Write(DeviceAddr, STMPE811_REG_INT_CTRL, tmp);
+}
+
+/**
+ * @brief Disable the Global interrupt.
+ * @param DeviceAddr: Device address on communication Bus.
+ * @retval None
+ */
+void stmpe811_DisableGlobalIT(uint16_t DeviceAddr)
+{
+ uint8_t tmp = 0;
+
+ /* Read the Interrupt Control register */
+ tmp = IOE_Read(DeviceAddr, STMPE811_REG_INT_CTRL);
+
+ /* Set the global interrupts to be Disabled */
+ tmp &= ~(uint8_t)STMPE811_GIT_EN;
+
+ /* Write Back the Interrupt Control register */
+ IOE_Write(DeviceAddr, STMPE811_REG_INT_CTRL, tmp);
+
+}
+
+/**
+ * @brief Enable the interrupt mode for the selected IT source
+ * @param DeviceAddr: Device address on communication Bus.
+ * @param Source: The interrupt source to be configured, could be:
+ * @arg STMPE811_GIT_IO: IO interrupt
+ * @arg STMPE811_GIT_ADC : ADC interrupt
+ * @arg STMPE811_GIT_FE : Touch Screen Controller FIFO Error interrupt
+ * @arg STMPE811_GIT_FF : Touch Screen Controller FIFO Full interrupt
+ * @arg STMPE811_GIT_FOV : Touch Screen Controller FIFO Overrun interrupt
+ * @arg STMPE811_GIT_FTH : Touch Screen Controller FIFO Threshold interrupt
+ * @arg STMPE811_GIT_TOUCH : Touch Screen Controller Touch Detected interrupt
+ * @retval None
+ */
+void stmpe811_EnableITSource(uint16_t DeviceAddr, uint8_t Source)
+{
+ uint8_t tmp = 0;
+
+ /* Get the current value of the INT_EN register */
+ tmp = IOE_Read(DeviceAddr, STMPE811_REG_INT_EN);
+
+ /* Set the interrupts to be Enabled */
+ tmp |= Source;
+
+ /* Set the register */
+ IOE_Write(DeviceAddr, STMPE811_REG_INT_EN, tmp);
+}
+
+/**
+ * @brief Disable the interrupt mode for the selected IT source
+ * @param DeviceAddr: Device address on communication Bus.
+ * @param Source: The interrupt source to be configured, could be:
+ * @arg STMPE811_GIT_IO: IO interrupt
+ * @arg STMPE811_GIT_ADC : ADC interrupt
+ * @arg STMPE811_GIT_FE : Touch Screen Controller FIFO Error interrupt
+ * @arg STMPE811_GIT_FF : Touch Screen Controller FIFO Full interrupt
+ * @arg STMPE811_GIT_FOV : Touch Screen Controller FIFO Overrun interrupt
+ * @arg STMPE811_GIT_FTH : Touch Screen Controller FIFO Threshold interrupt
+ * @arg STMPE811_GIT_TOUCH : Touch Screen Controller Touch Detected interrupt
+ * @retval None
+ */
+void stmpe811_DisableITSource(uint16_t DeviceAddr, uint8_t Source)
+{
+ uint8_t tmp = 0;
+
+ /* Get the current value of the INT_EN register */
+ tmp = IOE_Read(DeviceAddr, STMPE811_REG_INT_EN);
+
+ /* Set the interrupts to be Enabled */
+ tmp &= ~Source;
+
+ /* Set the register */
+ IOE_Write(DeviceAddr, STMPE811_REG_INT_EN, tmp);
+}
+
+/**
+ * @brief Set the global interrupt Polarity.
+ * @param DeviceAddr: Device address on communication Bus.
+ * @param Polarity: the IT mode polarity, could be one of the following values:
+ * @arg STMPE811_POLARITY_LOW: Interrupt line is active Low/Falling edge
+ * @arg STMPE811_POLARITY_HIGH: Interrupt line is active High/Rising edge
+ * @retval None
+ */
+void stmpe811_SetITPolarity(uint16_t DeviceAddr, uint8_t Polarity)
+{
+ uint8_t tmp = 0;
+
+ /* Get the current register value */
+ tmp = IOE_Read(DeviceAddr, STMPE811_REG_INT_CTRL);
+
+ /* Mask the polarity bits */
+ tmp &= ~(uint8_t)0x04;
+
+ /* Modify the Interrupt Output line configuration */
+ tmp |= Polarity;
+
+ /* Set the new register value */
+ IOE_Write(DeviceAddr, STMPE811_REG_INT_CTRL, tmp);
+
+}
+
+/**
+ * @brief Set the global interrupt Type.
+ * @param DeviceAddr: Device address on communication Bus.
+ * @param Type: Interrupt line activity type, could be one of the following values:
+ * @arg STMPE811_TYPE_LEVEL: Interrupt line is active in level model
+ * @arg STMPE811_TYPE_EDGE: Interrupt line is active in edge model
+ * @retval None
+ */
+void stmpe811_SetITType(uint16_t DeviceAddr, uint8_t Type)
+{
+ uint8_t tmp = 0;
+
+ /* Get the current register value */
+ tmp = IOE_Read(DeviceAddr, STMPE811_REG_INT_CTRL);
+
+ /* Mask the type bits */
+ tmp &= ~(uint8_t)0x02;
+
+ /* Modify the Interrupt Output line configuration */
+ tmp |= Type;
+
+ /* Set the new register value */
+ IOE_Write(DeviceAddr, STMPE811_REG_INT_CTRL, tmp);
+
+}
+
+/**
+ * @brief Check the selected Global interrupt source pending bit
+ * @param DeviceAddr: Device address on communication Bus.
+ * @param Source: the Global interrupt source to be checked, could be:
+ * @arg STMPE811_GIT_IO: IO interrupt
+ * @arg STMPE811_GIT_ADC : ADC interrupt
+ * @arg STMPE811_GIT_FE : Touch Screen Controller FIFO Error interrupt
+ * @arg STMPE811_GIT_FF : Touch Screen Controller FIFO Full interrupt
+ * @arg STMPE811_GIT_FOV : Touch Screen Controller FIFO Overrun interrupt
+ * @arg STMPE811_GIT_FTH : Touch Screen Controller FIFO Threshold interrupt
+ * @arg STMPE811_GIT_TOUCH : Touch Screen Controller Touch Detected interrupt
+ * @retval The checked Global interrupt source status.
+ */
+uint8_t stmpe811_GlobalITStatus(uint16_t DeviceAddr, uint8_t Source)
+{
+ /* Return the global IT source status */
+ return((IOE_Read(DeviceAddr, STMPE811_REG_INT_STA) & Source) == Source);
+}
+
+/**
+ * @brief Return the Global interrupts status
+ * @param DeviceAddr: Device address on communication Bus.
+ * @param Source: the Global interrupt source to be checked, could be:
+ * @arg STMPE811_GIT_IO: IO interrupt
+ * @arg STMPE811_GIT_ADC : ADC interrupt
+ * @arg STMPE811_GIT_FE : Touch Screen Controller FIFO Error interrupt
+ * @arg STMPE811_GIT_FF : Touch Screen Controller FIFO Full interrupt
+ * @arg STMPE811_GIT_FOV : Touch Screen Controller FIFO Overrun interrupt
+ * @arg STMPE811_GIT_FTH : Touch Screen Controller FIFO Threshold interrupt
+ * @arg STMPE811_GIT_TOUCH : Touch Screen Controller Touch Detected interrupt
+ * @retval The checked Global interrupt source status.
+ */
+uint8_t stmpe811_ReadGITStatus(uint16_t DeviceAddr, uint8_t Source)
+{
+ /* Return the global IT source status */
+ return((IOE_Read(DeviceAddr, STMPE811_REG_INT_STA) & Source));
+}
+
+/**
+ * @brief Clear the selected Global interrupt pending bit(s)
+ * @param DeviceAddr: Device address on communication Bus.
+ * @param Source: the Global interrupt source to be cleared, could be any combination
+ * of the following values:
+ * @arg STMPE811_GIT_IO: IO interrupt
+ * @arg STMPE811_GIT_ADC : ADC interrupt
+ * @arg STMPE811_GIT_FE : Touch Screen Controller FIFO Error interrupt
+ * @arg STMPE811_GIT_FF : Touch Screen Controller FIFO Full interrupt
+ * @arg STMPE811_GIT_FOV : Touch Screen Controller FIFO Overrun interrupt
+ * @arg STMPE811_GIT_FTH : Touch Screen Controller FIFO Threshold interrupt
+ * @arg STMPE811_GIT_TOUCH : Touch Screen Controller Touch Detected interrupt
+ * @retval None
+ */
+void stmpe811_ClearGlobalIT(uint16_t DeviceAddr, uint8_t Source)
+{
+ /* Write 1 to the bits that have to be cleared */
+ IOE_Write(DeviceAddr, STMPE811_REG_INT_STA, Source);
+}
+
+/**
+ * @brief Start the IO functionality use and disable the AF for selected IO pin(s).
+ * @param DeviceAddr: Device address on communication Bus.
+ * @param IO_Pin: The IO pin(s) to put in AF. This parameter can be one
+ * of the following values:
+ * @arg STMPE811_PIN_x: where x can be from 0 to 7.
+ * @retval None
+ */
+void stmpe811_IO_Start(uint16_t DeviceAddr, uint32_t IO_Pin)
+{
+ uint8_t mode;
+
+ /* Get the current register value */
+ mode = IOE_Read(DeviceAddr, STMPE811_REG_SYS_CTRL2);
+
+ /* Set the Functionalities to be Disabled */
+ mode &= ~(STMPE811_IO_FCT | STMPE811_ADC_FCT);
+
+ /* Write the new register value */
+ IOE_Write(DeviceAddr, STMPE811_REG_SYS_CTRL2, mode);
+
+ /* Disable AF for the selected IO pin(s) */
+ stmpe811_IO_DisableAF(DeviceAddr, (uint8_t)IO_Pin);
+}
+
+/**
+ * @brief Configures the IO pin(s) according to IO mode structure value.
+ * @param DeviceAddr: Device address on communication Bus.
+ * @param IO_Pin: The output pin to be set or reset. This parameter can be one
+ * of the following values:
+ * @arg STMPE811_PIN_x: where x can be from 0 to 7.
+ * @param IO_Mode: The IO pin mode to configure, could be one of the following values:
+ * @arg IO_MODE_INPUT
+ * @arg IO_MODE_OUTPUT
+ * @arg IO_MODE_IT_RISING_EDGE
+ * @arg IO_MODE_IT_FALLING_EDGE
+ * @arg IO_MODE_IT_LOW_LEVEL
+ * @arg IO_MODE_IT_HIGH_LEVEL
+ * @retval 0 if no error, IO_Mode if error
+ */
+uint8_t stmpe811_IO_Config(uint16_t DeviceAddr, uint32_t IO_Pin, IO_ModeTypedef IO_Mode)
+{
+ uint8_t error_code = 0;
+
+ /* Configure IO pin according to selected IO mode */
+ switch(IO_Mode)
+ {
+ case IO_MODE_INPUT: /* Input mode */
+ stmpe811_IO_InitPin(DeviceAddr, IO_Pin, STMPE811_DIRECTION_IN);
+ break;
+
+ case IO_MODE_OUTPUT: /* Output mode */
+ stmpe811_IO_InitPin(DeviceAddr, IO_Pin, STMPE811_DIRECTION_OUT);
+ break;
+
+ case IO_MODE_IT_RISING_EDGE: /* Interrupt rising edge mode */
+ stmpe811_IO_EnableIT(DeviceAddr);
+ stmpe811_IO_EnablePinIT(DeviceAddr, IO_Pin);
+ stmpe811_IO_InitPin(DeviceAddr, IO_Pin, STMPE811_DIRECTION_IN);
+ stmpe811_SetITType(DeviceAddr, STMPE811_TYPE_EDGE);
+ stmpe811_IO_SetEdgeMode(DeviceAddr, IO_Pin, STMPE811_EDGE_RISING);
+ break;
+
+ case IO_MODE_IT_FALLING_EDGE: /* Interrupt falling edge mode */
+ stmpe811_IO_EnableIT(DeviceAddr);
+ stmpe811_IO_EnablePinIT(DeviceAddr, IO_Pin);
+ stmpe811_IO_InitPin(DeviceAddr, IO_Pin, STMPE811_DIRECTION_IN);
+ stmpe811_SetITType(DeviceAddr, STMPE811_TYPE_EDGE);
+ stmpe811_IO_SetEdgeMode(DeviceAddr, IO_Pin, STMPE811_EDGE_FALLING);
+ break;
+
+ case IO_MODE_IT_LOW_LEVEL: /* Low level interrupt mode */
+ stmpe811_IO_EnableIT(DeviceAddr);
+ stmpe811_IO_EnablePinIT(DeviceAddr, IO_Pin);
+ stmpe811_IO_InitPin(DeviceAddr, IO_Pin, STMPE811_DIRECTION_IN);
+ stmpe811_SetITType(DeviceAddr, STMPE811_TYPE_LEVEL);
+ stmpe811_SetITPolarity(DeviceAddr, STMPE811_POLARITY_LOW);
+ break;
+
+ case IO_MODE_IT_HIGH_LEVEL: /* High level interrupt mode */
+ stmpe811_IO_EnableIT(DeviceAddr);
+ stmpe811_IO_EnablePinIT(DeviceAddr, IO_Pin);
+ stmpe811_IO_InitPin(DeviceAddr, IO_Pin, STMPE811_DIRECTION_IN);
+ stmpe811_SetITType(DeviceAddr, STMPE811_TYPE_LEVEL);
+ stmpe811_SetITPolarity(DeviceAddr, STMPE811_POLARITY_HIGH);
+ break;
+
+ default:
+ error_code = (uint8_t) IO_Mode;
+ break;
+ }
+ return error_code;
+}
+
+/**
+ * @brief Initialize the selected IO pin direction.
+ * @param DeviceAddr: Device address on communication Bus.
+ * @param IO_Pin: The IO pin to be configured. This parameter could be any
+ * combination of the following values:
+ * @arg STMPE811_PIN_x: Where x can be from 0 to 7.
+ * @param Direction: could be STMPE811_DIRECTION_IN or STMPE811_DIRECTION_OUT.
+ * @retval None
+ */
+void stmpe811_IO_InitPin(uint16_t DeviceAddr, uint32_t IO_Pin, uint8_t Direction)
+{
+ uint8_t tmp = 0;
+
+ /* Get all the Pins direction */
+ tmp = IOE_Read(DeviceAddr, STMPE811_REG_IO_DIR);
+
+ /* Set the selected pin direction */
+ if (Direction != STMPE811_DIRECTION_IN)
+ {
+ tmp |= (uint8_t)IO_Pin;
+ }
+ else
+ {
+ tmp &= ~(uint8_t)IO_Pin;
+ }
+
+ /* Write the register new value */
+ IOE_Write(DeviceAddr, STMPE811_REG_IO_DIR, tmp);
+}
+
+/**
+ * @brief Disable the AF for the selected IO pin(s).
+ * @param DeviceAddr: Device address on communication Bus.
+ * @param IO_Pin: The IO pin to be configured. This parameter could be any
+ * combination of the following values:
+ * @arg STMPE811_PIN_x: Where x can be from 0 to 7.
+ * @retval None
+ */
+void stmpe811_IO_DisableAF(uint16_t DeviceAddr, uint32_t IO_Pin)
+{
+ uint8_t tmp = 0;
+
+ /* Get the current state of the IO_AF register */
+ tmp = IOE_Read(DeviceAddr, STMPE811_REG_IO_AF);
+
+ /* Enable the selected pins alternate function */
+ tmp |= (uint8_t)IO_Pin;
+
+ /* Write back the new value in IO AF register */
+ IOE_Write(DeviceAddr, STMPE811_REG_IO_AF, tmp);
+
+}
+
+/**
+ * @brief Enable the AF for the selected IO pin(s).
+ * @param DeviceAddr: Device address on communication Bus.
+ * @param IO_Pin: The IO pin to be configured. This parameter could be any
+ * combination of the following values:
+ * @arg STMPE811_PIN_x: Where x can be from 0 to 7.
+ * @retval None
+ */
+void stmpe811_IO_EnableAF(uint16_t DeviceAddr, uint32_t IO_Pin)
+{
+ uint8_t tmp = 0;
+
+ /* Get the current register value */
+ tmp = IOE_Read(DeviceAddr, STMPE811_REG_IO_AF);
+
+ /* Enable the selected pins alternate function */
+ tmp &= ~(uint8_t)IO_Pin;
+
+ /* Write back the new register value */
+ IOE_Write(DeviceAddr, STMPE811_REG_IO_AF, tmp);
+}
+
+/**
+ * @brief Configure the Edge for which a transition is detectable for the
+ * selected pin.
+ * @param DeviceAddr: Device address on communication Bus.
+ * @param IO_Pin: The IO pin to be configured. This parameter could be any
+ * combination of the following values:
+ * @arg STMPE811_PIN_x: Where x can be from 0 to 7.
+ * @param Edge: The edge which will be detected. This parameter can be one or
+ * a combination of following values: STMPE811_EDGE_FALLING and STMPE811_EDGE_RISING .
+ * @retval None
+ */
+void stmpe811_IO_SetEdgeMode(uint16_t DeviceAddr, uint32_t IO_Pin, uint8_t Edge)
+{
+ uint8_t tmp1 = 0, tmp2 = 0;
+
+ /* Get the current registers values */
+ tmp1 = IOE_Read(DeviceAddr, STMPE811_REG_IO_FE);
+ tmp2 = IOE_Read(DeviceAddr, STMPE811_REG_IO_RE);
+
+ /* Disable the Falling Edge */
+ tmp1 &= ~(uint8_t)IO_Pin;
+
+ /* Disable the Falling Edge */
+ tmp2 &= ~(uint8_t)IO_Pin;
+
+ /* Enable the Falling edge if selected */
+ if (Edge & STMPE811_EDGE_FALLING)
+ {
+ tmp1 |= (uint8_t)IO_Pin;
+ }
+
+ /* Enable the Rising edge if selected */
+ if (Edge & STMPE811_EDGE_RISING)
+ {
+ tmp2 |= (uint8_t)IO_Pin;
+ }
+
+ /* Write back the new registers values */
+ IOE_Write(DeviceAddr, STMPE811_REG_IO_FE, tmp1);
+ IOE_Write(DeviceAddr, STMPE811_REG_IO_RE, tmp2);
+}
+
+/**
+ * @brief Write a new IO pin state.
+ * @param DeviceAddr: Device address on communication Bus.
+ * @param IO_Pin: The output pin to be set or reset. This parameter can be one
+ * of the following values:
+ * @arg STMPE811_PIN_x: where x can be from 0 to 7.
+ * @param PinState: The new IO pin state.
+ * @retval None
+ */
+void stmpe811_IO_WritePin(uint16_t DeviceAddr, uint32_t IO_Pin, uint8_t PinState)
+{
+ /* Apply the bit value to the selected pin */
+ if (PinState != 0)
+ {
+ /* Set the register */
+ IOE_Write(DeviceAddr, STMPE811_REG_IO_SET_PIN, (uint8_t)IO_Pin);
+ }
+ else
+ {
+ /* Set the register */
+ IOE_Write(DeviceAddr, STMPE811_REG_IO_CLR_PIN, (uint8_t)IO_Pin);
+ }
+}
+
+/**
+ * @brief Return the state of the selected IO pin(s).
+ * @param DeviceAddr: Device address on communication Bus.
+ * @param IO_Pin: The output pin to be set or reset. This parameter can be one
+ * of the following values:
+ * @arg STMPE811_PIN_x: where x can be from 0 to 7.
+ * @retval IO pin(s) state.
+ */
+uint32_t stmpe811_IO_ReadPin(uint16_t DeviceAddr, uint32_t IO_Pin)
+{
+ return((uint32_t)(IOE_Read(DeviceAddr, STMPE811_REG_IO_MP_STA) & (uint8_t)IO_Pin));
+}
+
+/**
+ * @brief Enable the global IO interrupt source.
+ * @param DeviceAddr: Device address on communication Bus.
+ * @retval None
+ */
+void stmpe811_IO_EnableIT(uint16_t DeviceAddr)
+{
+ IOE_ITConfig();
+
+ /* Enable global IO IT source */
+ stmpe811_EnableITSource(DeviceAddr, STMPE811_GIT_IO);
+
+ /* Enable global interrupt */
+ stmpe811_EnableGlobalIT(DeviceAddr);
+}
+
+/**
+ * @brief Disable the global IO interrupt source.
+ * @param DeviceAddr: Device address on communication Bus.
+ * @retval None
+ */
+void stmpe811_IO_DisableIT(uint16_t DeviceAddr)
+{
+ /* Disable the global interrupt */
+ stmpe811_DisableGlobalIT(DeviceAddr);
+
+ /* Disable global IO IT source */
+ stmpe811_DisableITSource(DeviceAddr, STMPE811_GIT_IO);
+}
+
+/**
+ * @brief Enable interrupt mode for the selected IO pin(s).
+ * @param DeviceAddr: Device address on communication Bus.
+ * @param IO_Pin: The IO interrupt to be enabled. This parameter could be any
+ * combination of the following values:
+ * @arg STMPE811_PIN_x: where x can be from 0 to 7.
+ * @retval None
+ */
+void stmpe811_IO_EnablePinIT(uint16_t DeviceAddr, uint32_t IO_Pin)
+{
+ uint8_t tmp = 0;
+
+ /* Get the IO interrupt state */
+ tmp = IOE_Read(DeviceAddr, STMPE811_REG_IO_INT_EN);
+
+ /* Set the interrupts to be enabled */
+ tmp |= (uint8_t)IO_Pin;
+
+ /* Write the register new value */
+ IOE_Write(DeviceAddr, STMPE811_REG_IO_INT_EN, tmp);
+}
+
+/**
+ * @brief Disable interrupt mode for the selected IO pin(s).
+ * @param DeviceAddr: Device address on communication Bus.
+ * @param IO_Pin: The IO interrupt to be disabled. This parameter could be any
+ * combination of the following values:
+ * @arg STMPE811_PIN_x: where x can be from 0 to 7.
+ * @retval None
+ */
+void stmpe811_IO_DisablePinIT(uint16_t DeviceAddr, uint32_t IO_Pin)
+{
+ uint8_t tmp = 0;
+
+ /* Get the IO interrupt state */
+ tmp = IOE_Read(DeviceAddr, STMPE811_REG_IO_INT_EN);
+
+ /* Set the interrupts to be Disabled */
+ tmp &= ~(uint8_t)IO_Pin;
+
+ /* Write the register new value */
+ IOE_Write(DeviceAddr, STMPE811_REG_IO_INT_EN, tmp);
+}
+
+/**
+ * @brief Check the status of the selected IO interrupt pending bit
+ * @param DeviceAddr: Device address on communication Bus.
+ * @param IO_Pin: The IO interrupt to be checked could be:
+ * @arg STMPE811_PIN_x Where x can be from 0 to 7.
+ * @retval Status of the checked IO pin(s).
+ */
+uint32_t stmpe811_IO_ITStatus(uint16_t DeviceAddr, uint32_t IO_Pin)
+{
+ /* Get the Interrupt status */
+ return(IOE_Read(DeviceAddr, STMPE811_REG_IO_INT_STA) & (uint8_t)IO_Pin);
+}
+
+/**
+ * @brief Clear the selected IO interrupt pending bit(s).
+ * @param DeviceAddr: Device address on communication Bus.
+ * @param IO_Pin: the IO interrupt to be cleared, could be:
+ * @arg STMPE811_PIN_x: Where x can be from 0 to 7.
+ * @retval None
+ */
+void stmpe811_IO_ClearIT(uint16_t DeviceAddr, uint32_t IO_Pin)
+{
+ /* Clear the global IO IT pending bit */
+ stmpe811_ClearGlobalIT(DeviceAddr, STMPE811_GIT_IO);
+
+ /* Clear the IO IT pending bit(s) */
+ IOE_Write(DeviceAddr, STMPE811_REG_IO_INT_STA, (uint8_t)IO_Pin);
+
+ /* Clear the Edge detection pending bit*/
+ IOE_Write(DeviceAddr, STMPE811_REG_IO_ED, (uint8_t)IO_Pin);
+
+ /* Clear the Rising edge pending bit */
+ IOE_Write(DeviceAddr, STMPE811_REG_IO_RE, (uint8_t)IO_Pin);
+
+ /* Clear the Falling edge pending bit */
+ IOE_Write(DeviceAddr, STMPE811_REG_IO_FE, (uint8_t)IO_Pin);
+}
+
+/**
+ * @brief Configures the touch Screen Controller (Single point detection)
+ * @param DeviceAddr: Device address on communication Bus.
+ * @retval None.
+ */
+void stmpe811_TS_Start(uint16_t DeviceAddr)
+{
+ uint8_t mode;
+
+ /* Get the current register value */
+ mode = IOE_Read(DeviceAddr, STMPE811_REG_SYS_CTRL2);
+
+ /* Set the Functionalities to be Enabled */
+ mode &= ~(STMPE811_IO_FCT);
+
+ /* Write the new register value */
+ IOE_Write(DeviceAddr, STMPE811_REG_SYS_CTRL2, mode);
+
+ /* Select TSC pins in TSC alternate mode */
+ stmpe811_IO_EnableAF(DeviceAddr, STMPE811_TOUCH_IO_ALL);
+
+ /* Set the Functionalities to be Enabled */
+ mode &= ~(STMPE811_TS_FCT | STMPE811_ADC_FCT);
+
+ /* Set the new register value */
+ IOE_Write(DeviceAddr, STMPE811_REG_SYS_CTRL2, mode);
+
+ /* Select Sample Time, bit number and ADC Reference */
+ IOE_Write(DeviceAddr, STMPE811_REG_ADC_CTRL1, 0x49);
+
+ /* Wait for 2 ms */
+ IOE_Delay(2);
+
+ /* Select the ADC clock speed: 3.25 MHz */
+ IOE_Write(DeviceAddr, STMPE811_REG_ADC_CTRL2, 0x01);
+
+ /* Select 2 nF filter capacitor */
+ /* Configuration:
+ - Touch average control : 4 samples
+ - Touch delay time : 500 uS
+ - Panel driver setting time: 500 uS
+ */
+ IOE_Write(DeviceAddr, STMPE811_REG_TSC_CFG, 0x9A);
+
+ /* Configure the Touch FIFO threshold: single point reading */
+ IOE_Write(DeviceAddr, STMPE811_REG_FIFO_TH, 0x01);
+
+ /* Clear the FIFO memory content. */
+ IOE_Write(DeviceAddr, STMPE811_REG_FIFO_STA, 0x01);
+
+ /* Put the FIFO back into operation mode */
+ IOE_Write(DeviceAddr, STMPE811_REG_FIFO_STA, 0x00);
+
+ /* Set the range and accuracy pf the pressure measurement (Z) :
+ - Fractional part :7
+ - Whole part :1
+ */
+ IOE_Write(DeviceAddr, STMPE811_REG_TSC_FRACT_XYZ, 0x01);
+
+ /* Set the driving capability (limit) of the device for TSC pins: 50mA */
+ IOE_Write(DeviceAddr, STMPE811_REG_TSC_I_DRIVE, 0x01);
+
+ /* Touch screen control configuration (enable TSC):
+ - No window tracking index
+ - XYZ acquisition mode
+ */
+ IOE_Write(DeviceAddr, STMPE811_REG_TSC_CTRL, 0x01);
+
+ /* Clear all the status pending bits if any */
+ IOE_Write(DeviceAddr, STMPE811_REG_INT_STA, 0xFF);
+
+ /* Wait for 2 ms delay */
+ IOE_Delay(2);
+}
+
+/**
+ * @brief Return if there is touch detected or not.
+ * @param DeviceAddr: Device address on communication Bus.
+ * @retval Touch detected state.
+ */
+uint8_t stmpe811_TS_DetectTouch(uint16_t DeviceAddr)
+{
+ uint8_t state;
+ uint8_t ret = 0;
+
+ state = ((IOE_Read(DeviceAddr, STMPE811_REG_TSC_CTRL) & (uint8_t)STMPE811_TS_CTRL_STATUS) == (uint8_t)0x80);
+
+ if(state > 0)
+ {
+ if(IOE_Read(DeviceAddr, STMPE811_REG_FIFO_SIZE) > 0)
+ {
+ ret = 1;
+ }
+ }
+ else
+ {
+ /* Reset FIFO */
+ IOE_Write(DeviceAddr, STMPE811_REG_FIFO_STA, 0x01);
+ /* Enable the FIFO again */
+ IOE_Write(DeviceAddr, STMPE811_REG_FIFO_STA, 0x00);
+ }
+
+ return ret;
+}
+
+/**
+ * @brief Get the touch screen X and Y positions values
+ * @param DeviceAddr: Device address on communication Bus.
+ * @param X: Pointer to X position value
+ * @param Y: Pointer to Y position value
+ * @retval None.
+ */
+void stmpe811_TS_GetXY(uint16_t DeviceAddr, uint16_t *X, uint16_t *Y)
+{
+ uint8_t dataXYZ[4];
+ uint32_t uldataXYZ;
+
+ IOE_ReadMultiple(DeviceAddr, STMPE811_REG_TSC_DATA_NON_INC, dataXYZ, sizeof(dataXYZ)) ;
+
+ /* Calculate positions values */
+ uldataXYZ = (dataXYZ[0] << 24)|(dataXYZ[1] << 16)|(dataXYZ[2] << 8)|(dataXYZ[3] << 0);
+ *X = (uldataXYZ >> 20) & 0x00000FFF;
+ *Y = (uldataXYZ >> 8) & 0x00000FFF;
+
+ /* Reset FIFO */
+ IOE_Write(DeviceAddr, STMPE811_REG_FIFO_STA, 0x01);
+ /* Enable the FIFO again */
+ IOE_Write(DeviceAddr, STMPE811_REG_FIFO_STA, 0x00);
+}
+
+/**
+ * @brief Configure the selected source to generate a global interrupt or not
+ * @param DeviceAddr: Device address on communication Bus.
+ * @retval None
+ */
+void stmpe811_TS_EnableIT(uint16_t DeviceAddr)
+{
+ IOE_ITConfig();
+
+ /* Enable global TS IT source */
+ stmpe811_EnableITSource(DeviceAddr, STMPE811_TS_IT);
+
+ /* Enable global interrupt */
+ stmpe811_EnableGlobalIT(DeviceAddr);
+}
+
+/**
+ * @brief Configure the selected source to generate a global interrupt or not
+ * @param DeviceAddr: Device address on communication Bus.
+ * @retval None
+ */
+void stmpe811_TS_DisableIT(uint16_t DeviceAddr)
+{
+ /* Disable global interrupt */
+ stmpe811_DisableGlobalIT(DeviceAddr);
+
+ /* Disable global TS IT source */
+ stmpe811_DisableITSource(DeviceAddr, STMPE811_TS_IT);
+}
+
+/**
+ * @brief Configure the selected source to generate a global interrupt or not
+ * @param DeviceAddr: Device address on communication Bus.
+ * @retval TS interrupts status
+ */
+uint8_t stmpe811_TS_ITStatus(uint16_t DeviceAddr)
+{
+ /* Return TS interrupts status */
+ return(stmpe811_ReadGITStatus(DeviceAddr, STMPE811_TS_IT));
+}
+
+/**
+ * @brief Configure the selected source to generate a global interrupt or not
+ * @param DeviceAddr: Device address on communication Bus.
+ * @retval None
+ */
+void stmpe811_TS_ClearIT(uint16_t DeviceAddr)
+{
+ /* Clear the global TS IT source */
+ stmpe811_ClearGlobalIT(DeviceAddr, STMPE811_TS_IT);
+}
+
+/**
+ * @brief Check if the device instance of the selected address is already registered
+ * and return its index
+ * @param DeviceAddr: Device address on communication Bus.
+ * @retval Index of the device instance if registered, 0xFF if not.
+ */
+static uint8_t stmpe811_GetInstance(uint16_t DeviceAddr)
+{
+ uint8_t idx = 0;
+
+ /* Check all the registered instances */
+ for(idx = 0; idx < STMPE811_MAX_INSTANCE ; idx ++)
+ {
+ if(stmpe811[idx] == DeviceAddr)
+ {
+ return idx;
+ }
+ }
+
+ return 0xFF;
+}
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/P3_SETR2/Components/stmpe811/stmpe811.h b/P3_SETR2/Components/stmpe811/stmpe811.h
new file mode 100644
index 0000000..488143a
--- /dev/null
+++ b/P3_SETR2/Components/stmpe811/stmpe811.h
@@ -0,0 +1,273 @@
+/**
+ ******************************************************************************
+ * @file stmpe811.h
+ * @author MCD Application Team
+ * @brief This file contains all the functions prototypes for the
+ * stmpe811.c IO expander driver.
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2014 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STMPE811_H
+#define __STMPE811_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "../Common/ts.h"
+#include "../Common/io.h"
+
+/** @addtogroup BSP
+ * @{
+ */
+
+/** @addtogroup Components
+ * @{
+ */
+
+/** @defgroup STMPE811
+ * @{
+ */
+
+/** @defgroup STMPE811_Exported_Types
+ * @{
+ */
+/**
+ * @}
+ */
+
+/** @defgroup STMPE811_Exported_Constants
+ * @{
+ */
+
+/* Chip IDs */
+#define STMPE811_ID 0x0811
+
+/* Identification registers & System Control */
+#define STMPE811_REG_CHP_ID_LSB 0x00
+#define STMPE811_REG_CHP_ID_MSB 0x01
+#define STMPE811_REG_ID_VER 0x02
+
+/* Global interrupt Enable bit */
+#define STMPE811_GIT_EN 0x01
+
+/* IO expander functionalities */
+#define STMPE811_ADC_FCT 0x01
+#define STMPE811_TS_FCT 0x02
+#define STMPE811_IO_FCT 0x04
+#define STMPE811_TEMPSENS_FCT 0x08
+
+/* Global Interrupts definitions */
+#define STMPE811_GIT_IO 0x80 /* IO interrupt */
+#define STMPE811_GIT_ADC 0x40 /* ADC interrupt */
+#define STMPE811_GIT_TEMP 0x20 /* Not implemented */
+#define STMPE811_GIT_FE 0x10 /* FIFO empty interrupt */
+#define STMPE811_GIT_FF 0x08 /* FIFO full interrupt */
+#define STMPE811_GIT_FOV 0x04 /* FIFO overflowed interrupt */
+#define STMPE811_GIT_FTH 0x02 /* FIFO above threshold interrupt */
+#define STMPE811_GIT_TOUCH 0x01 /* Touch is detected interrupt */
+#define STMPE811_ALL_GIT 0x1F /* All global interrupts */
+#define STMPE811_TS_IT (STMPE811_GIT_TOUCH | STMPE811_GIT_FTH | STMPE811_GIT_FOV | STMPE811_GIT_FF | STMPE811_GIT_FE) /* Touch screen interrupts */
+
+/* General Control Registers */
+#define STMPE811_REG_SYS_CTRL1 0x03
+#define STMPE811_REG_SYS_CTRL2 0x04
+#define STMPE811_REG_SPI_CFG 0x08
+
+/* Interrupt system Registers */
+#define STMPE811_REG_INT_CTRL 0x09
+#define STMPE811_REG_INT_EN 0x0A
+#define STMPE811_REG_INT_STA 0x0B
+#define STMPE811_REG_IO_INT_EN 0x0C
+#define STMPE811_REG_IO_INT_STA 0x0D
+
+/* IO Registers */
+#define STMPE811_REG_IO_SET_PIN 0x10
+#define STMPE811_REG_IO_CLR_PIN 0x11
+#define STMPE811_REG_IO_MP_STA 0x12
+#define STMPE811_REG_IO_DIR 0x13
+#define STMPE811_REG_IO_ED 0x14
+#define STMPE811_REG_IO_RE 0x15
+#define STMPE811_REG_IO_FE 0x16
+#define STMPE811_REG_IO_AF 0x17
+
+/* ADC Registers */
+#define STMPE811_REG_ADC_INT_EN 0x0E
+#define STMPE811_REG_ADC_INT_STA 0x0F
+#define STMPE811_REG_ADC_CTRL1 0x20
+#define STMPE811_REG_ADC_CTRL2 0x21
+#define STMPE811_REG_ADC_CAPT 0x22
+#define STMPE811_REG_ADC_DATA_CH0 0x30
+#define STMPE811_REG_ADC_DATA_CH1 0x32
+#define STMPE811_REG_ADC_DATA_CH2 0x34
+#define STMPE811_REG_ADC_DATA_CH3 0x36
+#define STMPE811_REG_ADC_DATA_CH4 0x38
+#define STMPE811_REG_ADC_DATA_CH5 0x3A
+#define STMPE811_REG_ADC_DATA_CH6 0x3B
+#define STMPE811_REG_ADC_DATA_CH7 0x3C
+
+/* Touch Screen Registers */
+#define STMPE811_REG_TSC_CTRL 0x40
+#define STMPE811_REG_TSC_CFG 0x41
+#define STMPE811_REG_WDM_TR_X 0x42
+#define STMPE811_REG_WDM_TR_Y 0x44
+#define STMPE811_REG_WDM_BL_X 0x46
+#define STMPE811_REG_WDM_BL_Y 0x48
+#define STMPE811_REG_FIFO_TH 0x4A
+#define STMPE811_REG_FIFO_STA 0x4B
+#define STMPE811_REG_FIFO_SIZE 0x4C
+#define STMPE811_REG_TSC_DATA_X 0x4D
+#define STMPE811_REG_TSC_DATA_Y 0x4F
+#define STMPE811_REG_TSC_DATA_Z 0x51
+#define STMPE811_REG_TSC_DATA_XYZ 0x52
+#define STMPE811_REG_TSC_FRACT_XYZ 0x56
+#define STMPE811_REG_TSC_DATA_INC 0x57
+#define STMPE811_REG_TSC_DATA_NON_INC 0xD7
+#define STMPE811_REG_TSC_I_DRIVE 0x58
+#define STMPE811_REG_TSC_SHIELD 0x59
+
+/* Touch Screen Pins definition */
+#define STMPE811_TOUCH_YD STMPE811_PIN_7
+#define STMPE811_TOUCH_XD STMPE811_PIN_6
+#define STMPE811_TOUCH_YU STMPE811_PIN_5
+#define STMPE811_TOUCH_XU STMPE811_PIN_4
+#define STMPE811_TOUCH_IO_ALL (uint32_t)(STMPE811_TOUCH_YD | STMPE811_TOUCH_XD | STMPE811_TOUCH_YU | STMPE811_TOUCH_XU)
+
+/* IO Pins definition */
+#define STMPE811_PIN_0 0x01
+#define STMPE811_PIN_1 0x02
+#define STMPE811_PIN_2 0x04
+#define STMPE811_PIN_3 0x08
+#define STMPE811_PIN_4 0x10
+#define STMPE811_PIN_5 0x20
+#define STMPE811_PIN_6 0x40
+#define STMPE811_PIN_7 0x80
+#define STMPE811_PIN_ALL 0xFF
+
+/* IO Pins directions */
+#define STMPE811_DIRECTION_IN 0x00
+#define STMPE811_DIRECTION_OUT 0x01
+
+/* IO IT types */
+#define STMPE811_TYPE_LEVEL 0x00
+#define STMPE811_TYPE_EDGE 0x02
+
+/* IO IT polarity */
+#define STMPE811_POLARITY_LOW 0x00
+#define STMPE811_POLARITY_HIGH 0x04
+
+/* IO Pin IT edge modes */
+#define STMPE811_EDGE_FALLING 0x01
+#define STMPE811_EDGE_RISING 0x02
+
+/* TS registers masks */
+#define STMPE811_TS_CTRL_ENABLE 0x01
+#define STMPE811_TS_CTRL_STATUS 0x80
+/**
+ * @}
+ */
+
+/** @defgroup STMPE811_Exported_Macros
+ * @{
+ */
+/**
+ * @}
+ */
+
+/** @defgroup STMPE811_Exported_Functions
+ * @{
+ */
+
+/**
+ * @brief STMPE811 Control functions
+ */
+void stmpe811_Init(uint16_t DeviceAddr);
+void stmpe811_Reset(uint16_t DeviceAddr);
+uint16_t stmpe811_ReadID(uint16_t DeviceAddr);
+void stmpe811_EnableGlobalIT(uint16_t DeviceAddr);
+void stmpe811_DisableGlobalIT(uint16_t DeviceAddr);
+void stmpe811_EnableITSource(uint16_t DeviceAddr, uint8_t Source);
+void stmpe811_DisableITSource(uint16_t DeviceAddr, uint8_t Source);
+void stmpe811_SetITPolarity(uint16_t DeviceAddr, uint8_t Polarity);
+void stmpe811_SetITType(uint16_t DeviceAddr, uint8_t Type);
+uint8_t stmpe811_GlobalITStatus(uint16_t DeviceAddr, uint8_t Source);
+uint8_t stmpe811_ReadGITStatus(uint16_t DeviceAddr, uint8_t Source);
+void stmpe811_ClearGlobalIT(uint16_t DeviceAddr, uint8_t Source);
+
+/**
+ * @brief STMPE811 IO functionalities functions
+ */
+void stmpe811_IO_Start(uint16_t DeviceAddr, uint32_t IO_Pin);
+uint8_t stmpe811_IO_Config(uint16_t DeviceAddr, uint32_t IO_Pin, IO_ModeTypedef IO_Mode);
+void stmpe811_IO_InitPin(uint16_t DeviceAddr, uint32_t IO_Pin, uint8_t Direction);
+void stmpe811_IO_EnableAF(uint16_t DeviceAddr, uint32_t IO_Pin);
+void stmpe811_IO_DisableAF(uint16_t DeviceAddr, uint32_t IO_Pin);
+void stmpe811_IO_SetEdgeMode(uint16_t DeviceAddr, uint32_t IO_Pin, uint8_t Edge);
+void stmpe811_IO_WritePin(uint16_t DeviceAddr, uint32_t IO_Pin, uint8_t PinState);
+uint32_t stmpe811_IO_ReadPin(uint16_t DeviceAddr, uint32_t IO_Pin);
+void stmpe811_IO_EnableIT(uint16_t DeviceAddr);
+void stmpe811_IO_DisableIT(uint16_t DeviceAddr);
+void stmpe811_IO_EnablePinIT(uint16_t DeviceAddr, uint32_t IO_Pin);
+void stmpe811_IO_DisablePinIT(uint16_t DeviceAddr, uint32_t IO_Pin);
+uint32_t stmpe811_IO_ITStatus(uint16_t DeviceAddr, uint32_t IO_Pin);
+void stmpe811_IO_ClearIT(uint16_t DeviceAddr, uint32_t IO_Pin);
+
+/**
+ * @brief STMPE811 Touch screen functionalities functions
+ */
+void stmpe811_TS_Start(uint16_t DeviceAddr);
+uint8_t stmpe811_TS_DetectTouch(uint16_t DeviceAddr);
+void stmpe811_TS_GetXY(uint16_t DeviceAddr, uint16_t *X, uint16_t *Y);
+void stmpe811_TS_EnableIT(uint16_t DeviceAddr);
+void stmpe811_TS_DisableIT(uint16_t DeviceAddr);
+uint8_t stmpe811_TS_ITStatus (uint16_t DeviceAddr);
+void stmpe811_TS_ClearIT (uint16_t DeviceAddr);
+
+void IOE_Init(void);
+void IOE_ITConfig (void);
+void IOE_Delay(uint32_t delay);
+void IOE_Write(uint8_t addr, uint8_t reg, uint8_t value);
+uint8_t IOE_Read(uint8_t addr, uint8_t reg);
+uint16_t IOE_ReadMultiple(uint8_t addr, uint8_t reg, uint8_t *buffer, uint16_t length);
+
+/* Touch screen driver structure */
+extern TS_DrvTypeDef stmpe811_ts_drv;
+
+/* IO driver structure */
+extern IO_DrvTypeDef stmpe811_io_drv;
+
+#ifdef __cplusplus
+}
+#endif
+#endif /* __STMPE811_H */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/P3_SETR2/Components/wm8994/Release_Notes.html b/P3_SETR2/Components/wm8994/Release_Notes.html
new file mode 100644
index 0000000..600429b
--- /dev/null
+++ b/P3_SETR2/Components/wm8994/Release_Notes.html
@@ -0,0 +1,145 @@
+
+
+
+
+
+
+ Release Notes for WM8994 Component Drivers
+
+
+
+
+
+
+
+
+
+
+Release Notes for WM8994 Component Drivers
+Copyright © 2016 STMicroelectronics
+
+
+
+
+
+
License
+
Licensed by ST under BSD 3-Clause license (the "License"). You may not use this package except in compliance with the License. You may obtain a copy of the License at:
+
https://opensource.org/licenses/BSD-3-Clause
+
Purpose
+
This directory contains the WM8994 component drivers.
+
+
+
Update History
+
+
V2.3.1 / 03-April-2019
+
+
Main Changes
+
+Update release notes format
+Reformat the BSD 3-Clause license declaration in the files header (replace license terms by a web reference to OSI website where those terms lie)
+
+
+
+
+
V2.3.0 / 24-January-2018
+
+
Main Changes
+
+wm8994.c: fix no audio output issue
+
+
+
+
+
V2.2.0 / 05-June-2017
+
+
Main Changes
+
+Add support of ColdStartup sequence for headphone
+
+Unmute is performed in a gradual way to minimize pop noise.
+Update wm8994_SetFrequency to support AUDIO_FREQUENCY_32K
+Update comments to be used for PDSC generation
+
+
+
+
+
+
V2.1.0 / 22-February-2016
+
+
Main Changes
+
+wm8994.c
+
+Update wm8994_Init() by adding the support of analog microphone connected to INPUT LINE 1, INPUT_DEVICE_DIGITAL_MICROPHONE_1 and INPUT_DEVICE_DIGITAL_MIC1_MIC2
+Add AUDIO_FREQUENCY_32K as possible AudioFreq value
+
+wm8994.h
+
+Add INPUT_DEVICE_DIGITAL_MIC1_MIC2 define
+
+
+
+
+
+
V2.0.0 / 24-June-2015
+
+
Main Changes
+
+wm8994.h
+
+Add codec de-initialization function: wm8994_DeInit()
+Add Audio IO de-initialization function prototype: AUDIO_IO_DeInit()
+Add INPUT_DEVICE_INPUT_LINE_1 and INPUT_DEVICE_INPUT_LINE_1 support for AUDIO IN
+Add Input audio volume control support
+
+wm8994.c
+
+Update wm8994_Init() function to support the Audio IN
+Update wm8994_Stop() function to only stop the codec if it was configured
+Enable VMID_BUF_ENA bit in R57 ANTIPOP register (address 0x39) for all configurations
+
+
+
NOTE This release must be used with BSP Common driver V4.0.0 or later.
+
+
+
+
V1.0.2 / 12-February-2015
+
+
Main Changes
+
+wm8994.c: Update the wm8994_Init() function to set the volume after enabling the dynamic charge pump power control mode
+
+
+
+
+
V1.0.1 / 28-November-2014
+
+
Main Changes
+
+wm8994.h: change “\” by “/” in the include path to fix compilation issue with Linux
+
+
+
+
+
V1.0.0 / 18-February-2014
+
+
Main Changes
+
+First official release
+
+
+
+
+
+
+
+
diff --git a/P3_SETR2/Components/wm8994/wm8994.c b/P3_SETR2/Components/wm8994/wm8994.c
new file mode 100644
index 0000000..8e27bbb
--- /dev/null
+++ b/P3_SETR2/Components/wm8994/wm8994.c
@@ -0,0 +1,1059 @@
+/**
+ ******************************************************************************
+ * @file wm8994.c
+ * @author MCD Application Team
+ * @brief This file provides the WM8994 Audio Codec driver.
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2016 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/* Includes ------------------------------------------------------------------*/
+#include "wm8994.h"
+
+/** @addtogroup BSP
+ * @{
+ */
+
+/** @addtogroup Components
+ * @{
+ */
+
+/** @addtogroup wm8994
+ * @brief This file provides a set of functions needed to drive the
+ * WM8994 audio codec.
+ * @{
+ */
+
+/** @defgroup WM8994_Private_Types
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @defgroup WM8994_Private_Defines
+ * @{
+ */
+/* Uncomment this line to enable verifying data sent to codec after each write
+ operation (for debug purpose) */
+#if !defined (VERIFY_WRITTENDATA)
+/*#define VERIFY_WRITTENDATA*/
+#endif /* VERIFY_WRITTENDATA */
+/**
+ * @}
+ */
+
+/** @defgroup WM8994_Private_Macros
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @defgroup WM8994_Private_Variables
+ * @{
+ */
+
+/* Audio codec driver structure initialization */
+AUDIO_DrvTypeDef wm8994_drv =
+{
+ wm8994_Init,
+ wm8994_DeInit,
+ wm8994_ReadID,
+
+ wm8994_Play,
+ wm8994_Pause,
+ wm8994_Resume,
+ wm8994_Stop,
+
+ wm8994_SetFrequency,
+ wm8994_SetVolume,
+ wm8994_SetMute,
+ wm8994_SetOutputMode,
+
+ wm8994_Reset
+};
+
+static uint32_t outputEnabled = 0;
+static uint32_t inputEnabled = 0;
+static uint8_t ColdStartup = 1;
+
+/**
+ * @}
+ */
+
+/** @defgroup WM8994_Function_Prototypes
+ * @{
+ */
+static uint8_t CODEC_IO_Write(uint8_t Addr, uint16_t Reg, uint16_t Value);
+/**
+ * @}
+ */
+
+
+/** @defgroup WM8994_Private_Functions
+ * @{
+ */
+
+/**
+ * @brief Initializes the audio codec and the control interface.
+ * @param DeviceAddr: Device address on communication Bus.
+ * @param OutputInputDevice: can be OUTPUT_DEVICE_SPEAKER, OUTPUT_DEVICE_HEADPHONE,
+ * OUTPUT_DEVICE_BOTH, OUTPUT_DEVICE_AUTO, INPUT_DEVICE_DIGITAL_MICROPHONE_1,
+ * INPUT_DEVICE_DIGITAL_MICROPHONE_2, INPUT_DEVICE_DIGITAL_MIC1_MIC2,
+ * INPUT_DEVICE_INPUT_LINE_1 or INPUT_DEVICE_INPUT_LINE_2.
+ * @param Volume: Initial volume level (from 0 (Mute) to 100 (Max))
+ * @param AudioFreq: Audio Frequency
+ * @retval 0 if correct communication, else wrong communication
+ */
+uint32_t wm8994_Init(uint16_t DeviceAddr, uint16_t OutputInputDevice, uint8_t Volume, uint32_t AudioFreq)
+{
+ uint32_t counter = 0;
+ uint16_t output_device = OutputInputDevice & 0xFF;
+ uint16_t input_device = OutputInputDevice & 0xFF00;
+ uint16_t power_mgnt_reg_1 = 0;
+
+ /* Initialize the Control interface of the Audio Codec */
+ AUDIO_IO_Init();
+ /* wm8994 Errata Work-Arounds */
+ counter += CODEC_IO_Write(DeviceAddr, 0x102, 0x0003);
+ counter += CODEC_IO_Write(DeviceAddr, 0x817, 0x0000);
+ counter += CODEC_IO_Write(DeviceAddr, 0x102, 0x0000);
+
+ /* Enable VMID soft start (fast), Start-up Bias Current Enabled */
+ counter += CODEC_IO_Write(DeviceAddr, 0x39, 0x006C);
+
+ /* Enable bias generator, Enable VMID */
+ if (input_device > 0)
+ {
+ counter += CODEC_IO_Write(DeviceAddr, 0x01, 0x0013);
+ }
+ else
+ {
+ counter += CODEC_IO_Write(DeviceAddr, 0x01, 0x0003);
+ }
+
+ /* Add Delay */
+ AUDIO_IO_Delay(50);
+
+ /* Path Configurations for output */
+ if (output_device > 0)
+ {
+ outputEnabled = 1;
+
+ switch (output_device)
+ {
+ case OUTPUT_DEVICE_SPEAKER:
+ /* Enable DAC1 (Left), Enable DAC1 (Right),
+ Disable DAC2 (Left), Disable DAC2 (Right)*/
+ counter += CODEC_IO_Write(DeviceAddr, 0x05, 0x0C0C);
+
+ /* Enable the AIF1 Timeslot 0 (Left) to DAC 1 (Left) mixer path */
+ counter += CODEC_IO_Write(DeviceAddr, 0x601, 0x0000);
+
+ /* Enable the AIF1 Timeslot 0 (Right) to DAC 1 (Right) mixer path */
+ counter += CODEC_IO_Write(DeviceAddr, 0x602, 0x0000);
+
+ /* Disable the AIF1 Timeslot 1 (Left) to DAC 2 (Left) mixer path */
+ counter += CODEC_IO_Write(DeviceAddr, 0x604, 0x0002);
+
+ /* Disable the AIF1 Timeslot 1 (Right) to DAC 2 (Right) mixer path */
+ counter += CODEC_IO_Write(DeviceAddr, 0x605, 0x0002);
+ break;
+
+ case OUTPUT_DEVICE_HEADPHONE:
+ /* Disable DAC1 (Left), Disable DAC1 (Right),
+ Enable DAC2 (Left), Enable DAC2 (Right)*/
+ counter += CODEC_IO_Write(DeviceAddr, 0x05, 0x0303);
+
+ /* Enable the AIF1 Timeslot 0 (Left) to DAC 1 (Left) mixer path */
+ counter += CODEC_IO_Write(DeviceAddr, 0x601, 0x0001);
+
+ /* Enable the AIF1 Timeslot 0 (Right) to DAC 1 (Right) mixer path */
+ counter += CODEC_IO_Write(DeviceAddr, 0x602, 0x0001);
+
+ /* Disable the AIF1 Timeslot 1 (Left) to DAC 2 (Left) mixer path */
+ counter += CODEC_IO_Write(DeviceAddr, 0x604, 0x0000);
+
+ /* Disable the AIF1 Timeslot 1 (Right) to DAC 2 (Right) mixer path */
+ counter += CODEC_IO_Write(DeviceAddr, 0x605, 0x0000);
+ break;
+
+ case OUTPUT_DEVICE_BOTH:
+ if (input_device == INPUT_DEVICE_DIGITAL_MIC1_MIC2)
+ {
+ /* Enable DAC1 (Left), Enable DAC1 (Right),
+ also Enable DAC2 (Left), Enable DAC2 (Right)*/
+ counter += CODEC_IO_Write(DeviceAddr, 0x05, 0x0303 | 0x0C0C);
+
+ /* Enable the AIF1 Timeslot 0 (Left) to DAC 1 (Left) mixer path
+ Enable the AIF1 Timeslot 1 (Left) to DAC 1 (Left) mixer path */
+ counter += CODEC_IO_Write(DeviceAddr, 0x601, 0x0003);
+
+ /* Enable the AIF1 Timeslot 0 (Right) to DAC 1 (Right) mixer path
+ Enable the AIF1 Timeslot 1 (Right) to DAC 1 (Right) mixer path */
+ counter += CODEC_IO_Write(DeviceAddr, 0x602, 0x0003);
+
+ /* Enable the AIF1 Timeslot 0 (Left) to DAC 2 (Left) mixer path
+ Enable the AIF1 Timeslot 1 (Left) to DAC 2 (Left) mixer path */
+ counter += CODEC_IO_Write(DeviceAddr, 0x604, 0x0003);
+
+ /* Enable the AIF1 Timeslot 0 (Right) to DAC 2 (Right) mixer path
+ Enable the AIF1 Timeslot 1 (Right) to DAC 2 (Right) mixer path */
+ counter += CODEC_IO_Write(DeviceAddr, 0x605, 0x0003);
+ }
+ else
+ {
+ /* Enable DAC1 (Left), Enable DAC1 (Right),
+ also Enable DAC2 (Left), Enable DAC2 (Right)*/
+ counter += CODEC_IO_Write(DeviceAddr, 0x05, 0x0303 | 0x0C0C);
+
+ /* Enable the AIF1 Timeslot 0 (Left) to DAC 1 (Left) mixer path */
+ counter += CODEC_IO_Write(DeviceAddr, 0x601, 0x0001);
+
+ /* Enable the AIF1 Timeslot 0 (Right) to DAC 1 (Right) mixer path */
+ counter += CODEC_IO_Write(DeviceAddr, 0x602, 0x0001);
+
+ /* Enable the AIF1 Timeslot 1 (Left) to DAC 2 (Left) mixer path */
+ counter += CODEC_IO_Write(DeviceAddr, 0x604, 0x0002);
+
+ /* Enable the AIF1 Timeslot 1 (Right) to DAC 2 (Right) mixer path */
+ counter += CODEC_IO_Write(DeviceAddr, 0x605, 0x0002);
+ }
+ break;
+
+ case OUTPUT_DEVICE_AUTO :
+ default:
+ /* Disable DAC1 (Left), Disable DAC1 (Right),
+ Enable DAC2 (Left), Enable DAC2 (Right)*/
+ counter += CODEC_IO_Write(DeviceAddr, 0x05, 0x0303);
+
+ /* Enable the AIF1 Timeslot 0 (Left) to DAC 1 (Left) mixer path */
+ counter += CODEC_IO_Write(DeviceAddr, 0x601, 0x0001);
+
+ /* Enable the AIF1 Timeslot 0 (Right) to DAC 1 (Right) mixer path */
+ counter += CODEC_IO_Write(DeviceAddr, 0x602, 0x0001);
+
+ /* Disable the AIF1 Timeslot 1 (Left) to DAC 2 (Left) mixer path */
+ counter += CODEC_IO_Write(DeviceAddr, 0x604, 0x0000);
+
+ /* Disable the AIF1 Timeslot 1 (Right) to DAC 2 (Right) mixer path */
+ counter += CODEC_IO_Write(DeviceAddr, 0x605, 0x0000);
+ break;
+ }
+ }
+ else
+ {
+ outputEnabled = 0;
+ }
+
+ /* Path Configurations for input */
+ if (input_device > 0)
+ {
+ inputEnabled = 1;
+ switch (input_device)
+ {
+ case INPUT_DEVICE_DIGITAL_MICROPHONE_2 :
+ /* Enable AIF1ADC2 (Left), Enable AIF1ADC2 (Right)
+ * Enable DMICDAT2 (Left), Enable DMICDAT2 (Right)
+ * Enable Left ADC, Enable Right ADC */
+ counter += CODEC_IO_Write(DeviceAddr, 0x04, 0x0C30);
+
+ /* Enable AIF1 DRC2 Signal Detect & DRC in AIF1ADC2 Left/Right Timeslot 1 */
+ counter += CODEC_IO_Write(DeviceAddr, 0x450, 0x00DB);
+
+ /* Disable IN1L, IN1R, IN2L, IN2R, Enable Thermal sensor & shutdown */
+ counter += CODEC_IO_Write(DeviceAddr, 0x02, 0x6000);
+
+ /* Enable the DMIC2(Left) to AIF1 Timeslot 1 (Left) mixer path */
+ counter += CODEC_IO_Write(DeviceAddr, 0x608, 0x0002);
+
+ /* Enable the DMIC2(Right) to AIF1 Timeslot 1 (Right) mixer path */
+ counter += CODEC_IO_Write(DeviceAddr, 0x609, 0x0002);
+
+ /* GPIO1 pin configuration GP1_DIR = output, GP1_FN = AIF1 DRC2 signal detect */
+ counter += CODEC_IO_Write(DeviceAddr, 0x700, 0x000E);
+ break;
+
+ case INPUT_DEVICE_INPUT_LINE_1 :
+ /* IN1LN_TO_IN1L, IN1LP_TO_VMID, IN1RN_TO_IN1R, IN1RP_TO_VMID */
+ counter += CODEC_IO_Write(DeviceAddr, 0x28, 0x0011);
+
+ /* Disable mute on IN1L_TO_MIXINL and +30dB on IN1L PGA output */
+ counter += CODEC_IO_Write(DeviceAddr, 0x29, 0x0035);
+
+ /* Disable mute on IN1R_TO_MIXINL, Gain = +30dB */
+ counter += CODEC_IO_Write(DeviceAddr, 0x2A, 0x0035);
+
+ /* Enable AIF1ADC1 (Left), Enable AIF1ADC1 (Right)
+ * Enable Left ADC, Enable Right ADC */
+ counter += CODEC_IO_Write(DeviceAddr, 0x04, 0x0303);
+
+ /* Enable AIF1 DRC1 Signal Detect & DRC in AIF1ADC1 Left/Right Timeslot 0 */
+ counter += CODEC_IO_Write(DeviceAddr, 0x440, 0x00DB);
+
+ /* Enable IN1L and IN1R, Disable IN2L and IN2R, Enable Thermal sensor & shutdown */
+ counter += CODEC_IO_Write(DeviceAddr, 0x02, 0x6350);
+
+ /* Enable the ADCL(Left) to AIF1 Timeslot 0 (Left) mixer path */
+ counter += CODEC_IO_Write(DeviceAddr, 0x606, 0x0002);
+
+ /* Enable the ADCR(Right) to AIF1 Timeslot 0 (Right) mixer path */
+ counter += CODEC_IO_Write(DeviceAddr, 0x607, 0x0002);
+
+ /* GPIO1 pin configuration GP1_DIR = output, GP1_FN = AIF1 DRC1 signal detect */
+ counter += CODEC_IO_Write(DeviceAddr, 0x700, 0x000D);
+ break;
+
+ case INPUT_DEVICE_DIGITAL_MICROPHONE_1 :
+ /* Enable AIF1ADC1 (Left), Enable AIF1ADC1 (Right)
+ * Enable DMICDAT1 (Left), Enable DMICDAT1 (Right)
+ * Enable Left ADC, Enable Right ADC */
+ counter += CODEC_IO_Write(DeviceAddr, 0x04, 0x030C);
+
+ /* Enable AIF1 DRC2 Signal Detect & DRC in AIF1ADC1 Left/Right Timeslot 0 */
+ counter += CODEC_IO_Write(DeviceAddr, 0x440, 0x00DB);
+
+ /* Disable IN1L, IN1R, IN2L, IN2R, Enable Thermal sensor & shutdown */
+ counter += CODEC_IO_Write(DeviceAddr, 0x02, 0x6350);
+
+ /* Enable the DMIC2(Left) to AIF1 Timeslot 0 (Left) mixer path */
+ counter += CODEC_IO_Write(DeviceAddr, 0x606, 0x0002);
+
+ /* Enable the DMIC2(Right) to AIF1 Timeslot 0 (Right) mixer path */
+ counter += CODEC_IO_Write(DeviceAddr, 0x607, 0x0002);
+
+ /* GPIO1 pin configuration GP1_DIR = output, GP1_FN = AIF1 DRC1 signal detect */
+ counter += CODEC_IO_Write(DeviceAddr, 0x700, 0x000D);
+ break;
+ case INPUT_DEVICE_DIGITAL_MIC1_MIC2 :
+ /* Enable AIF1ADC1 (Left), Enable AIF1ADC1 (Right)
+ * Enable DMICDAT1 (Left), Enable DMICDAT1 (Right)
+ * Enable Left ADC, Enable Right ADC */
+ counter += CODEC_IO_Write(DeviceAddr, 0x04, 0x0F3C);
+
+ /* Enable AIF1 DRC2 Signal Detect & DRC in AIF1ADC2 Left/Right Timeslot 1 */
+ counter += CODEC_IO_Write(DeviceAddr, 0x450, 0x00DB);
+
+ /* Enable AIF1 DRC2 Signal Detect & DRC in AIF1ADC1 Left/Right Timeslot 0 */
+ counter += CODEC_IO_Write(DeviceAddr, 0x440, 0x00DB);
+
+ /* Disable IN1L, IN1R, Enable IN2L, IN2R, Thermal sensor & shutdown */
+ counter += CODEC_IO_Write(DeviceAddr, 0x02, 0x63A0);
+
+ /* Enable the DMIC2(Left) to AIF1 Timeslot 0 (Left) mixer path */
+ counter += CODEC_IO_Write(DeviceAddr, 0x606, 0x0002);
+
+ /* Enable the DMIC2(Right) to AIF1 Timeslot 0 (Right) mixer path */
+ counter += CODEC_IO_Write(DeviceAddr, 0x607, 0x0002);
+
+ /* Enable the DMIC2(Left) to AIF1 Timeslot 1 (Left) mixer path */
+ counter += CODEC_IO_Write(DeviceAddr, 0x608, 0x0002);
+
+ /* Enable the DMIC2(Right) to AIF1 Timeslot 1 (Right) mixer path */
+ counter += CODEC_IO_Write(DeviceAddr, 0x609, 0x0002);
+
+ /* GPIO1 pin configuration GP1_DIR = output, GP1_FN = AIF1 DRC1 signal detect */
+ counter += CODEC_IO_Write(DeviceAddr, 0x700, 0x000D);
+ break;
+ case INPUT_DEVICE_INPUT_LINE_2 :
+ default:
+ /* Actually, no other input devices supported */
+ counter++;
+ break;
+ }
+ }
+ else
+ {
+ inputEnabled = 0;
+ }
+
+ /* Clock Configurations */
+ switch (AudioFreq)
+ {
+ case AUDIO_FREQUENCY_8K:
+ /* AIF1 Sample Rate = 8 (KHz), ratio=256 */
+ counter += CODEC_IO_Write(DeviceAddr, 0x210, 0x0003);
+ break;
+
+ case AUDIO_FREQUENCY_16K:
+ /* AIF1 Sample Rate = 16 (KHz), ratio=256 */
+ counter += CODEC_IO_Write(DeviceAddr, 0x210, 0x0033);
+ break;
+
+ case AUDIO_FREQUENCY_32K:
+ /* AIF1 Sample Rate = 32 (KHz), ratio=256 */
+ counter += CODEC_IO_Write(DeviceAddr, 0x210, 0x0063);
+ break;
+
+ case AUDIO_FREQUENCY_48K:
+ /* AIF1 Sample Rate = 48 (KHz), ratio=256 */
+ counter += CODEC_IO_Write(DeviceAddr, 0x210, 0x0083);
+ break;
+
+ case AUDIO_FREQUENCY_96K:
+ /* AIF1 Sample Rate = 96 (KHz), ratio=256 */
+ counter += CODEC_IO_Write(DeviceAddr, 0x210, 0x00A3);
+ break;
+
+ case AUDIO_FREQUENCY_11K:
+ /* AIF1 Sample Rate = 11.025 (KHz), ratio=256 */
+ counter += CODEC_IO_Write(DeviceAddr, 0x210, 0x0013);
+ break;
+
+ case AUDIO_FREQUENCY_22K:
+ /* AIF1 Sample Rate = 22.050 (KHz), ratio=256 */
+ counter += CODEC_IO_Write(DeviceAddr, 0x210, 0x0043);
+ break;
+
+ case AUDIO_FREQUENCY_44K:
+ /* AIF1 Sample Rate = 44.1 (KHz), ratio=256 */
+ counter += CODEC_IO_Write(DeviceAddr, 0x210, 0x0073);
+ break;
+
+ default:
+ /* AIF1 Sample Rate = 48 (KHz), ratio=256 */
+ counter += CODEC_IO_Write(DeviceAddr, 0x210, 0x0083);
+ break;
+ }
+
+ if(input_device == INPUT_DEVICE_DIGITAL_MIC1_MIC2)
+ {
+ /* AIF1 Word Length = 16-bits, AIF1 Format = DSP mode */
+ counter += CODEC_IO_Write(DeviceAddr, 0x300, 0x4018);
+ }
+ else
+ {
+ /* AIF1 Word Length = 16-bits, AIF1 Format = I2S (Default Register Value) */
+ counter += CODEC_IO_Write(DeviceAddr, 0x300, 0x4010);
+ }
+
+ /* slave mode */
+ counter += CODEC_IO_Write(DeviceAddr, 0x302, 0x0000);
+
+ /* Enable the DSP processing clock for AIF1, Enable the core clock */
+ counter += CODEC_IO_Write(DeviceAddr, 0x208, 0x000A);
+
+ /* Enable AIF1 Clock, AIF1 Clock Source = MCLK1 pin */
+ counter += CODEC_IO_Write(DeviceAddr, 0x200, 0x0001);
+
+ if (output_device > 0) /* Audio output selected */
+ {
+ if (output_device == OUTPUT_DEVICE_HEADPHONE)
+ {
+ /* Select DAC1 (Left) to Left Headphone Output PGA (HPOUT1LVOL) path */
+ counter += CODEC_IO_Write(DeviceAddr, 0x2D, 0x0100);
+
+ /* Select DAC1 (Right) to Right Headphone Output PGA (HPOUT1RVOL) path */
+ counter += CODEC_IO_Write(DeviceAddr, 0x2E, 0x0100);
+
+ /* Startup sequence for Headphone */
+ if(ColdStartup)
+ {
+ counter += CODEC_IO_Write(DeviceAddr,0x110,0x8100);
+
+ ColdStartup=0;
+ /* Add Delay */
+ AUDIO_IO_Delay(300);
+ }
+ else /* Headphone Warm Start-Up */
+ {
+ counter += CODEC_IO_Write(DeviceAddr,0x110,0x8108);
+ /* Add Delay */
+ AUDIO_IO_Delay(50);
+ }
+
+ /* Soft un-Mute the AIF1 Timeslot 0 DAC1 path L&R */
+ counter += CODEC_IO_Write(DeviceAddr, 0x420, 0x0000);
+ }
+ /* Analog Output Configuration */
+
+ /* Enable SPKRVOL PGA, Enable SPKMIXR, Enable SPKLVOL PGA, Enable SPKMIXL */
+ counter += CODEC_IO_Write(DeviceAddr, 0x03, 0x0300);
+
+ /* Left Speaker Mixer Volume = 0dB */
+ counter += CODEC_IO_Write(DeviceAddr, 0x22, 0x0000);
+
+ /* Speaker output mode = Class D, Right Speaker Mixer Volume = 0dB ((0x23, 0x0100) = class AB)*/
+ counter += CODEC_IO_Write(DeviceAddr, 0x23, 0x0000);
+
+ /* Unmute DAC2 (Left) to Left Speaker Mixer (SPKMIXL) path,
+ Unmute DAC2 (Right) to Right Speaker Mixer (SPKMIXR) path */
+ counter += CODEC_IO_Write(DeviceAddr, 0x36, 0x0300);
+
+ /* Enable bias generator, Enable VMID, Enable SPKOUTL, Enable SPKOUTR */
+ counter += CODEC_IO_Write(DeviceAddr, 0x01, 0x3003);
+
+ /* Headphone/Speaker Enable */
+
+ if (input_device == INPUT_DEVICE_DIGITAL_MIC1_MIC2)
+ {
+ /* Enable Class W, Class W Envelope Tracking = AIF1 Timeslots 0 and 1 */
+ counter += CODEC_IO_Write(DeviceAddr, 0x51, 0x0205);
+ }
+ else
+ {
+ /* Enable Class W, Class W Envelope Tracking = AIF1 Timeslot 0 */
+ counter += CODEC_IO_Write(DeviceAddr, 0x51, 0x0005);
+ }
+
+ /* Enable bias generator, Enable VMID, Enable HPOUT1 (Left) and Enable HPOUT1 (Right) input stages */
+ /* idem for Speaker */
+ power_mgnt_reg_1 |= 0x0303 | 0x3003;
+ counter += CODEC_IO_Write(DeviceAddr, 0x01, power_mgnt_reg_1);
+
+ /* Enable HPOUT1 (Left) and HPOUT1 (Right) intermediate stages */
+ counter += CODEC_IO_Write(DeviceAddr, 0x60, 0x0022);
+
+ /* Enable Charge Pump */
+ counter += CODEC_IO_Write(DeviceAddr, 0x4C, 0x9F25);
+
+ /* Add Delay */
+ AUDIO_IO_Delay(15);
+
+ /* Select DAC1 (Left) to Left Headphone Output PGA (HPOUT1LVOL) path */
+ counter += CODEC_IO_Write(DeviceAddr, 0x2D, 0x0001);
+
+ /* Select DAC1 (Right) to Right Headphone Output PGA (HPOUT1RVOL) path */
+ counter += CODEC_IO_Write(DeviceAddr, 0x2E, 0x0001);
+
+ /* Enable Left Output Mixer (MIXOUTL), Enable Right Output Mixer (MIXOUTR) */
+ /* idem for SPKOUTL and SPKOUTR */
+ counter += CODEC_IO_Write(DeviceAddr, 0x03, 0x0030 | 0x0300);
+
+ /* Enable DC Servo and trigger start-up mode on left and right channels */
+ counter += CODEC_IO_Write(DeviceAddr, 0x54, 0x0033);
+
+ /* Add Delay */
+ AUDIO_IO_Delay(257);
+
+ /* Enable HPOUT1 (Left) and HPOUT1 (Right) intermediate and output stages. Remove clamps */
+ counter += CODEC_IO_Write(DeviceAddr, 0x60, 0x00EE);
+
+ /* Unmutes */
+
+ /* Unmute DAC 1 (Left) */
+ counter += CODEC_IO_Write(DeviceAddr, 0x610, 0x00C0);
+
+ /* Unmute DAC 1 (Right) */
+ counter += CODEC_IO_Write(DeviceAddr, 0x611, 0x00C0);
+
+ /* Unmute the AIF1 Timeslot 0 DAC path */
+ counter += CODEC_IO_Write(DeviceAddr, 0x420, 0x0010);
+
+ /* Unmute DAC 2 (Left) */
+ counter += CODEC_IO_Write(DeviceAddr, 0x612, 0x00C0);
+
+ /* Unmute DAC 2 (Right) */
+ counter += CODEC_IO_Write(DeviceAddr, 0x613, 0x00C0);
+
+ /* Unmute the AIF1 Timeslot 1 DAC2 path */
+ counter += CODEC_IO_Write(DeviceAddr, 0x422, 0x0010);
+
+ /* Volume Control */
+ wm8994_SetVolume(DeviceAddr, Volume);
+ }
+
+ if (input_device > 0) /* Audio input selected */
+ {
+ if ((input_device == INPUT_DEVICE_DIGITAL_MICROPHONE_1) || (input_device == INPUT_DEVICE_DIGITAL_MICROPHONE_2))
+ {
+ /* Enable Microphone bias 1 generator, Enable VMID */
+ power_mgnt_reg_1 |= 0x0013;
+ counter += CODEC_IO_Write(DeviceAddr, 0x01, power_mgnt_reg_1);
+
+ /* ADC oversample enable */
+ counter += CODEC_IO_Write(DeviceAddr, 0x620, 0x0002);
+
+ /* AIF ADC2 HPF enable, HPF cut = voice mode 1 fc=127Hz at fs=8kHz */
+ counter += CODEC_IO_Write(DeviceAddr, 0x411, 0x3800);
+ }
+ else if(input_device == INPUT_DEVICE_DIGITAL_MIC1_MIC2)
+ {
+ /* Enable Microphone bias 1 generator, Enable VMID */
+ power_mgnt_reg_1 |= 0x0013;
+ counter += CODEC_IO_Write(DeviceAddr, 0x01, power_mgnt_reg_1);
+
+ /* ADC oversample enable */
+ counter += CODEC_IO_Write(DeviceAddr, 0x620, 0x0002);
+
+ /* AIF ADC1 HPF enable, HPF cut = voice mode 1 fc=127Hz at fs=8kHz */
+ counter += CODEC_IO_Write(DeviceAddr, 0x410, 0x1800);
+
+ /* AIF ADC2 HPF enable, HPF cut = voice mode 1 fc=127Hz at fs=8kHz */
+ counter += CODEC_IO_Write(DeviceAddr, 0x411, 0x1800);
+ }
+ else if ((input_device == INPUT_DEVICE_INPUT_LINE_1) || (input_device == INPUT_DEVICE_INPUT_LINE_2))
+ {
+
+ /* Disable mute on IN1L, IN1L Volume = +0dB */
+ counter += CODEC_IO_Write(DeviceAddr, 0x18, 0x000B);
+
+ /* Disable mute on IN1R, IN1R Volume = +0dB */
+ counter += CODEC_IO_Write(DeviceAddr, 0x1A, 0x000B);
+
+ /* AIF ADC1 HPF enable, HPF cut = hifi mode fc=4Hz at fs=48kHz */
+ counter += CODEC_IO_Write(DeviceAddr, 0x410, 0x1800);
+ }
+ /* Volume Control */
+ wm8994_SetVolume(DeviceAddr, Volume);
+ }
+ /* Return communication control value */
+ return counter;
+}
+
+/**
+ * @brief Deinitializes the audio codec.
+ * @param None
+ * @retval None
+ */
+void wm8994_DeInit(void)
+{
+ /* Deinitialize Audio Codec interface */
+ AUDIO_IO_DeInit();
+}
+
+/**
+ * @brief Get the WM8994 ID.
+ * @param DeviceAddr: Device address on communication Bus.
+ * @retval The WM8994 ID
+ */
+uint32_t wm8994_ReadID(uint16_t DeviceAddr)
+{
+ /* Initialize the Control interface of the Audio Codec */
+ AUDIO_IO_Init();
+
+ return ((uint32_t)AUDIO_IO_Read(DeviceAddr, WM8994_CHIPID_ADDR));
+}
+
+/**
+ * @brief Start the audio Codec play feature.
+ * @note For this codec no Play options are required.
+ * @param DeviceAddr: Device address on communication Bus.
+ * @retval 0 if correct communication, else wrong communication
+ */
+uint32_t wm8994_Play(uint16_t DeviceAddr, uint16_t* pBuffer, uint16_t Size)
+{
+ uint32_t counter = 0;
+
+ /* Resumes the audio file playing */
+ /* Unmute the output first */
+ counter += wm8994_SetMute(DeviceAddr, AUDIO_MUTE_OFF);
+
+ return counter;
+}
+
+/**
+ * @brief Pauses playing on the audio codec.
+ * @param DeviceAddr: Device address on communication Bus.
+ * @retval 0 if correct communication, else wrong communication
+ */
+uint32_t wm8994_Pause(uint16_t DeviceAddr)
+{
+ uint32_t counter = 0;
+
+ /* Pause the audio file playing */
+ /* Mute the output first */
+ counter += wm8994_SetMute(DeviceAddr, AUDIO_MUTE_ON);
+
+ /* Put the Codec in Power save mode */
+ counter += CODEC_IO_Write(DeviceAddr, 0x02, 0x01);
+
+ return counter;
+}
+
+/**
+ * @brief Resumes playing on the audio codec.
+ * @param DeviceAddr: Device address on communication Bus.
+ * @retval 0 if correct communication, else wrong communication
+ */
+uint32_t wm8994_Resume(uint16_t DeviceAddr)
+{
+ uint32_t counter = 0;
+
+ /* Resumes the audio file playing */
+ /* Unmute the output first */
+ counter += wm8994_SetMute(DeviceAddr, AUDIO_MUTE_OFF);
+
+ return counter;
+}
+
+/**
+ * @brief Stops audio Codec playing. It powers down the codec.
+ * @param DeviceAddr: Device address on communication Bus.
+ * @param CodecPdwnMode: selects the power down mode.
+ * - CODEC_PDWN_SW: only mutes the audio codec. When resuming from this
+ * mode the codec keeps the previous initialization
+ * (no need to re-Initialize the codec registers).
+ * - CODEC_PDWN_HW: Physically power down the codec. When resuming from this
+ * mode, the codec is set to default configuration
+ * (user should re-Initialize the codec in order to
+ * play again the audio stream).
+ * @retval 0 if correct communication, else wrong communication
+ */
+uint32_t wm8994_Stop(uint16_t DeviceAddr, uint32_t CodecPdwnMode)
+{
+ uint32_t counter = 0;
+
+ if (outputEnabled != 0)
+ {
+ /* Mute the output first */
+ counter += wm8994_SetMute(DeviceAddr, AUDIO_MUTE_ON);
+
+ if (CodecPdwnMode == CODEC_PDWN_SW)
+ {
+ /* Only output mute required*/
+ }
+ else /* CODEC_PDWN_HW */
+ {
+ /* Mute the AIF1 Timeslot 0 DAC1 path */
+ counter += CODEC_IO_Write(DeviceAddr, 0x420, 0x0200);
+
+ /* Mute the AIF1 Timeslot 1 DAC2 path */
+ counter += CODEC_IO_Write(DeviceAddr, 0x422, 0x0200);
+
+ /* Disable DAC1L_TO_HPOUT1L */
+ counter += CODEC_IO_Write(DeviceAddr, 0x2D, 0x0000);
+
+ /* Disable DAC1R_TO_HPOUT1R */
+ counter += CODEC_IO_Write(DeviceAddr, 0x2E, 0x0000);
+
+ /* Disable DAC1 and DAC2 */
+ counter += CODEC_IO_Write(DeviceAddr, 0x05, 0x0000);
+
+ /* Reset Codec by writing in 0x0000 address register */
+ counter += CODEC_IO_Write(DeviceAddr, 0x0000, 0x0000);
+
+ outputEnabled = 0;
+ }
+ }
+ return counter;
+}
+
+/**
+ * @brief Sets higher or lower the codec volume level.
+ * @param DeviceAddr: Device address on communication Bus.
+ * @param Volume: a byte value from 0 to 255 (refer to codec registers
+ * description for more details).
+ * @retval 0 if correct communication, else wrong communication
+ */
+uint32_t wm8994_SetVolume(uint16_t DeviceAddr, uint8_t Volume)
+{
+ uint32_t counter = 0;
+ uint8_t convertedvol = VOLUME_CONVERT(Volume);
+
+ /* Output volume */
+ if (outputEnabled != 0)
+ {
+ if(convertedvol > 0x3E)
+ {
+ /* Unmute audio codec */
+ counter += wm8994_SetMute(DeviceAddr, AUDIO_MUTE_OFF);
+
+ /* Left Headphone Volume */
+ counter += CODEC_IO_Write(DeviceAddr, 0x1C, 0x3F | 0x140);
+
+ /* Right Headphone Volume */
+ counter += CODEC_IO_Write(DeviceAddr, 0x1D, 0x3F | 0x140);
+
+ /* Left Speaker Volume */
+ counter += CODEC_IO_Write(DeviceAddr, 0x26, 0x3F | 0x140);
+
+ /* Right Speaker Volume */
+ counter += CODEC_IO_Write(DeviceAddr, 0x27, 0x3F | 0x140);
+ }
+ else if (Volume == 0)
+ {
+ /* Mute audio codec */
+ counter += wm8994_SetMute(DeviceAddr, AUDIO_MUTE_ON);
+ }
+ else
+ {
+ /* Unmute audio codec */
+ counter += wm8994_SetMute(DeviceAddr, AUDIO_MUTE_OFF);
+
+ /* Left Headphone Volume */
+ counter += CODEC_IO_Write(DeviceAddr, 0x1C, convertedvol | 0x140);
+
+ /* Right Headphone Volume */
+ counter += CODEC_IO_Write(DeviceAddr, 0x1D, convertedvol | 0x140);
+
+ /* Left Speaker Volume */
+ counter += CODEC_IO_Write(DeviceAddr, 0x26, convertedvol | 0x140);
+
+ /* Right Speaker Volume */
+ counter += CODEC_IO_Write(DeviceAddr, 0x27, convertedvol | 0x140);
+ }
+ }
+
+ /* Input volume */
+ if (inputEnabled != 0)
+ {
+ convertedvol = VOLUME_IN_CONVERT(Volume);
+
+ /* Left AIF1 ADC1 volume */
+ counter += CODEC_IO_Write(DeviceAddr, 0x400, convertedvol | 0x100);
+
+ /* Right AIF1 ADC1 volume */
+ counter += CODEC_IO_Write(DeviceAddr, 0x401, convertedvol | 0x100);
+
+ /* Left AIF1 ADC2 volume */
+ counter += CODEC_IO_Write(DeviceAddr, 0x404, convertedvol | 0x100);
+
+ /* Right AIF1 ADC2 volume */
+ counter += CODEC_IO_Write(DeviceAddr, 0x405, convertedvol | 0x100);
+ }
+ return counter;
+}
+
+/**
+ * @brief Enables or disables the mute feature on the audio codec.
+ * @param DeviceAddr: Device address on communication Bus.
+ * @param Cmd: AUDIO_MUTE_ON to enable the mute or AUDIO_MUTE_OFF to disable the
+ * mute mode.
+ * @retval 0 if correct communication, else wrong communication
+ */
+uint32_t wm8994_SetMute(uint16_t DeviceAddr, uint32_t Cmd)
+{
+ uint32_t counter = 0;
+
+ if (outputEnabled != 0)
+ {
+ /* Set the Mute mode */
+ if(Cmd == AUDIO_MUTE_ON)
+ {
+ /* Soft Mute the AIF1 Timeslot 0 DAC1 path L&R */
+ counter += CODEC_IO_Write(DeviceAddr, 0x420, 0x0200);
+
+ /* Soft Mute the AIF1 Timeslot 1 DAC2 path L&R */
+ counter += CODEC_IO_Write(DeviceAddr, 0x422, 0x0200);
+ }
+ else /* AUDIO_MUTE_OFF Disable the Mute */
+ {
+ /* Unmute the AIF1 Timeslot 0 DAC1 path L&R */
+ counter += CODEC_IO_Write(DeviceAddr, 0x420, 0x0010);
+
+ /* Unmute the AIF1 Timeslot 1 DAC2 path L&R */
+ counter += CODEC_IO_Write(DeviceAddr, 0x422, 0x0010);
+ }
+ }
+ return counter;
+}
+
+/**
+ * @brief Switch dynamically (while audio file is played) the output target
+ * (speaker or headphone).
+ * @param DeviceAddr: Device address on communication Bus.
+ * @param Output: specifies the audio output target: OUTPUT_DEVICE_SPEAKER,
+ * OUTPUT_DEVICE_HEADPHONE, OUTPUT_DEVICE_BOTH or OUTPUT_DEVICE_AUTO
+ * @retval 0 if correct communication, else wrong communication
+ */
+uint32_t wm8994_SetOutputMode(uint16_t DeviceAddr, uint8_t Output)
+{
+ uint32_t counter = 0;
+
+ switch (Output)
+ {
+ case OUTPUT_DEVICE_SPEAKER:
+ /* Enable DAC1 (Left), Enable DAC1 (Right),
+ Disable DAC2 (Left), Disable DAC2 (Right)*/
+ counter += CODEC_IO_Write(DeviceAddr, 0x05, 0x0C0C);
+
+ /* Enable the AIF1 Timeslot 0 (Left) to DAC 1 (Left) mixer path */
+ counter += CODEC_IO_Write(DeviceAddr, 0x601, 0x0000);
+
+ /* Enable the AIF1 Timeslot 0 (Right) to DAC 1 (Right) mixer path */
+ counter += CODEC_IO_Write(DeviceAddr, 0x602, 0x0000);
+
+ /* Disable the AIF1 Timeslot 1 (Left) to DAC 2 (Left) mixer path */
+ counter += CODEC_IO_Write(DeviceAddr, 0x604, 0x0002);
+
+ /* Disable the AIF1 Timeslot 1 (Right) to DAC 2 (Right) mixer path */
+ counter += CODEC_IO_Write(DeviceAddr, 0x605, 0x0002);
+ break;
+
+ case OUTPUT_DEVICE_HEADPHONE:
+ /* Disable DAC1 (Left), Disable DAC1 (Right),
+ Enable DAC2 (Left), Enable DAC2 (Right)*/
+ counter += CODEC_IO_Write(DeviceAddr, 0x05, 0x0303);
+
+ /* Enable the AIF1 Timeslot 0 (Left) to DAC 1 (Left) mixer path */
+ counter += CODEC_IO_Write(DeviceAddr, 0x601, 0x0001);
+
+ /* Enable the AIF1 Timeslot 0 (Right) to DAC 1 (Right) mixer path */
+ counter += CODEC_IO_Write(DeviceAddr, 0x602, 0x0001);
+
+ /* Disable the AIF1 Timeslot 1 (Left) to DAC 2 (Left) mixer path */
+ counter += CODEC_IO_Write(DeviceAddr, 0x604, 0x0000);
+
+ /* Disable the AIF1 Timeslot 1 (Right) to DAC 2 (Right) mixer path */
+ counter += CODEC_IO_Write(DeviceAddr, 0x605, 0x0000);
+ break;
+
+ case OUTPUT_DEVICE_BOTH:
+ /* Enable DAC1 (Left), Enable DAC1 (Right),
+ also Enable DAC2 (Left), Enable DAC2 (Right)*/
+ counter += CODEC_IO_Write(DeviceAddr, 0x05, 0x0303 | 0x0C0C);
+
+ /* Enable the AIF1 Timeslot 0 (Left) to DAC 1 (Left) mixer path */
+ counter += CODEC_IO_Write(DeviceAddr, 0x601, 0x0001);
+
+ /* Enable the AIF1 Timeslot 0 (Right) to DAC 1 (Right) mixer path */
+ counter += CODEC_IO_Write(DeviceAddr, 0x602, 0x0001);
+
+ /* Enable the AIF1 Timeslot 1 (Left) to DAC 2 (Left) mixer path */
+ counter += CODEC_IO_Write(DeviceAddr, 0x604, 0x0002);
+
+ /* Enable the AIF1 Timeslot 1 (Right) to DAC 2 (Right) mixer path */
+ counter += CODEC_IO_Write(DeviceAddr, 0x605, 0x0002);
+ break;
+
+ default:
+ /* Disable DAC1 (Left), Disable DAC1 (Right),
+ Enable DAC2 (Left), Enable DAC2 (Right)*/
+ counter += CODEC_IO_Write(DeviceAddr, 0x05, 0x0303);
+
+ /* Enable the AIF1 Timeslot 0 (Left) to DAC 1 (Left) mixer path */
+ counter += CODEC_IO_Write(DeviceAddr, 0x601, 0x0001);
+
+ /* Enable the AIF1 Timeslot 0 (Right) to DAC 1 (Right) mixer path */
+ counter += CODEC_IO_Write(DeviceAddr, 0x602, 0x0001);
+
+ /* Disable the AIF1 Timeslot 1 (Left) to DAC 2 (Left) mixer path */
+ counter += CODEC_IO_Write(DeviceAddr, 0x604, 0x0000);
+
+ /* Disable the AIF1 Timeslot 1 (Right) to DAC 2 (Right) mixer path */
+ counter += CODEC_IO_Write(DeviceAddr, 0x605, 0x0000);
+ break;
+ }
+ return counter;
+}
+
+/**
+ * @brief Sets new frequency.
+ * @param DeviceAddr: Device address on communication Bus.
+ * @param AudioFreq: Audio frequency used to play the audio stream.
+ * @retval 0 if correct communication, else wrong communication
+ */
+uint32_t wm8994_SetFrequency(uint16_t DeviceAddr, uint32_t AudioFreq)
+{
+ uint32_t counter = 0;
+
+ /* Clock Configurations */
+ switch (AudioFreq)
+ {
+ case AUDIO_FREQUENCY_8K:
+ /* AIF1 Sample Rate = 8 (KHz), ratio=256 */
+ counter += CODEC_IO_Write(DeviceAddr, 0x210, 0x0003);
+ break;
+
+ case AUDIO_FREQUENCY_16K:
+ /* AIF1 Sample Rate = 16 (KHz), ratio=256 */
+ counter += CODEC_IO_Write(DeviceAddr, 0x210, 0x0033);
+ break;
+
+ case AUDIO_FREQUENCY_32K:
+ /* AIF1 Sample Rate = 32 (KHz), ratio=256 */
+ counter += CODEC_IO_Write(DeviceAddr, 0x210, 0x0063);
+ break;
+
+ case AUDIO_FREQUENCY_48K:
+ /* AIF1 Sample Rate = 48 (KHz), ratio=256 */
+ counter += CODEC_IO_Write(DeviceAddr, 0x210, 0x0083);
+ break;
+
+ case AUDIO_FREQUENCY_96K:
+ /* AIF1 Sample Rate = 96 (KHz), ratio=256 */
+ counter += CODEC_IO_Write(DeviceAddr, 0x210, 0x00A3);
+ break;
+
+ case AUDIO_FREQUENCY_11K:
+ /* AIF1 Sample Rate = 11.025 (KHz), ratio=256 */
+ counter += CODEC_IO_Write(DeviceAddr, 0x210, 0x0013);
+ break;
+
+ case AUDIO_FREQUENCY_22K:
+ /* AIF1 Sample Rate = 22.050 (KHz), ratio=256 */
+ counter += CODEC_IO_Write(DeviceAddr, 0x210, 0x0043);
+ break;
+
+ case AUDIO_FREQUENCY_44K:
+ /* AIF1 Sample Rate = 44.1 (KHz), ratio=256 */
+ counter += CODEC_IO_Write(DeviceAddr, 0x210, 0x0073);
+ break;
+
+ default:
+ /* AIF1 Sample Rate = 48 (KHz), ratio=256 */
+ counter += CODEC_IO_Write(DeviceAddr, 0x210, 0x0083);
+ break;
+ }
+ return counter;
+}
+
+/**
+ * @brief Resets wm8994 registers.
+ * @param DeviceAddr: Device address on communication Bus.
+ * @retval 0 if correct communication, else wrong communication
+ */
+uint32_t wm8994_Reset(uint16_t DeviceAddr)
+{
+ uint32_t counter = 0;
+
+ /* Reset Codec by writing in 0x0000 address register */
+ counter = CODEC_IO_Write(DeviceAddr, 0x0000, 0x0000);
+ outputEnabled = 0;
+ inputEnabled=0;
+
+ return counter;
+}
+
+/**
+ * @brief Writes/Read a single data.
+ * @param Addr: I2C address
+ * @param Reg: Reg address
+ * @param Value: Data to be written
+ * @retval None
+ */
+static uint8_t CODEC_IO_Write(uint8_t Addr, uint16_t Reg, uint16_t Value)
+{
+ uint32_t result = 0;
+
+ AUDIO_IO_Write(Addr, Reg, Value);
+
+#ifdef VERIFY_WRITTENDATA
+ /* Verify that the data has been correctly written */
+ result = (AUDIO_IO_Read(Addr, Reg) == Value)? 0:1;
+#endif /* VERIFY_WRITTENDATA */
+
+ return result;
+}
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/P3_SETR2/Components/wm8994/wm8994.h b/P3_SETR2/Components/wm8994/wm8994.h
new file mode 100644
index 0000000..c1978ea
--- /dev/null
+++ b/P3_SETR2/Components/wm8994/wm8994.h
@@ -0,0 +1,170 @@
+/**
+ ******************************************************************************
+ * @file wm8994.h
+ * @author MCD Application Team
+ * @brief This file contains all the functions prototypes for the
+ * wm8994.c driver.
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2016 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __WM8994_H
+#define __WM8994_H
+
+/* Includes ------------------------------------------------------------------*/
+#include "../Common/audio.h"
+
+/** @addtogroup BSP
+ * @{
+ */
+
+/** @addtogroup Component
+ * @{
+ */
+
+/** @addtogroup WM8994
+ * @{
+ */
+
+/** @defgroup WM8994_Exported_Types
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @defgroup WM8994_Exported_Constants
+ * @{
+ */
+
+/******************************************************************************/
+/*************************** Codec User defines ******************************/
+/******************************************************************************/
+/* Codec output DEVICE */
+#define OUTPUT_DEVICE_SPEAKER ((uint16_t)0x0001)
+#define OUTPUT_DEVICE_HEADPHONE ((uint16_t)0x0002)
+#define OUTPUT_DEVICE_BOTH ((uint16_t)0x0003)
+#define OUTPUT_DEVICE_AUTO ((uint16_t)0x0004)
+#define INPUT_DEVICE_DIGITAL_MICROPHONE_1 ((uint16_t)0x0100)
+#define INPUT_DEVICE_DIGITAL_MICROPHONE_2 ((uint16_t)0x0200)
+#define INPUT_DEVICE_INPUT_LINE_1 ((uint16_t)0x0300)
+#define INPUT_DEVICE_INPUT_LINE_2 ((uint16_t)0x0400)
+#define INPUT_DEVICE_DIGITAL_MIC1_MIC2 ((uint16_t)0x0800)
+
+/* Volume Levels values */
+#define DEFAULT_VOLMIN 0x00
+#define DEFAULT_VOLMAX 0xFF
+#define DEFAULT_VOLSTEP 0x04
+
+#define AUDIO_PAUSE 0
+#define AUDIO_RESUME 1
+
+/* Codec POWER DOWN modes */
+#define CODEC_PDWN_HW 1
+#define CODEC_PDWN_SW 2
+
+/* MUTE commands */
+#define AUDIO_MUTE_ON 1
+#define AUDIO_MUTE_OFF 0
+
+/* AUDIO FREQUENCY */
+#define AUDIO_FREQUENCY_192K ((uint32_t)192000)
+#define AUDIO_FREQUENCY_96K ((uint32_t)96000)
+#define AUDIO_FREQUENCY_48K ((uint32_t)48000)
+#define AUDIO_FREQUENCY_44K ((uint32_t)44100)
+#define AUDIO_FREQUENCY_32K ((uint32_t)32000)
+#define AUDIO_FREQUENCY_22K ((uint32_t)22050)
+#define AUDIO_FREQUENCY_16K ((uint32_t)16000)
+#define AUDIO_FREQUENCY_11K ((uint32_t)11025)
+#define AUDIO_FREQUENCY_8K ((uint32_t)8000)
+
+#define VOLUME_CONVERT(Volume) (((Volume) > 100)? 100:((uint8_t)(((Volume) * 63) / 100)))
+#define VOLUME_IN_CONVERT(Volume) (((Volume) >= 100)? 239:((uint8_t)(((Volume) * 240) / 100)))
+
+/******************************************************************************/
+/****************************** REGISTER MAPPING ******************************/
+/******************************************************************************/
+/**
+ * @brief WM8994 ID
+ */
+#define WM8994_ID 0x8994
+
+/**
+ * @brief Device ID Register: Reading from this register will indicate device
+ * family ID 8994h
+ */
+#define WM8994_CHIPID_ADDR 0x00
+
+/**
+ * @}
+ */
+
+/** @defgroup WM8994_Exported_Macros
+ * @{
+ */
+/**
+ * @}
+ */
+
+/** @defgroup WM8994_Exported_Functions
+ * @{
+ */
+
+/*------------------------------------------------------------------------------
+ Audio Codec functions
+------------------------------------------------------------------------------*/
+/* High Layer codec functions */
+uint32_t wm8994_Init(uint16_t DeviceAddr, uint16_t OutputInputDevice, uint8_t Volume, uint32_t AudioFreq);
+void wm8994_DeInit(void);
+uint32_t wm8994_ReadID(uint16_t DeviceAddr);
+uint32_t wm8994_Play(uint16_t DeviceAddr, uint16_t* pBuffer, uint16_t Size);
+uint32_t wm8994_Pause(uint16_t DeviceAddr);
+uint32_t wm8994_Resume(uint16_t DeviceAddr);
+uint32_t wm8994_Stop(uint16_t DeviceAddr, uint32_t Cmd);
+uint32_t wm8994_SetVolume(uint16_t DeviceAddr, uint8_t Volume);
+uint32_t wm8994_SetMute(uint16_t DeviceAddr, uint32_t Cmd);
+uint32_t wm8994_SetOutputMode(uint16_t DeviceAddr, uint8_t Output);
+uint32_t wm8994_SetFrequency(uint16_t DeviceAddr, uint32_t AudioFreq);
+uint32_t wm8994_Reset(uint16_t DeviceAddr);
+
+/* AUDIO IO functions */
+void AUDIO_IO_Init(void);
+void AUDIO_IO_DeInit(void);
+void AUDIO_IO_Write(uint8_t Addr, uint16_t Reg, uint16_t Value);
+uint8_t AUDIO_IO_Read(uint8_t Addr, uint16_t Reg);
+void AUDIO_IO_Delay(uint32_t Delay);
+
+/* Audio driver structure */
+extern AUDIO_DrvTypeDef wm8994_drv;
+
+#endif /* __WM8994_H */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/P3_SETR2/Core/Inc/accelerometer.h b/P3_SETR2/Core/Inc/accelerometer.h
new file mode 100644
index 0000000..8a09026
--- /dev/null
+++ b/P3_SETR2/Core/Inc/accelerometer.h
@@ -0,0 +1,15 @@
+/*
+ * accelerometer.h
+ *
+ * Created on: Oct 27, 2025
+ * Author: jomaa
+ */
+
+#ifndef INC_ACCELEROMETER_H_
+#define INC_ACCELEROMETER_H_
+
+#include "globals.h"
+
+void Accelero_Test(void);
+
+#endif /* INC_ACCELEROMETER_H_ */
diff --git a/P3_SETR2/Core/Inc/globals.h b/P3_SETR2/Core/Inc/globals.h
new file mode 100644
index 0000000..57751f9
--- /dev/null
+++ b/P3_SETR2/Core/Inc/globals.h
@@ -0,0 +1,21 @@
+/*
+ * globals.h
+ *
+ * Created on: Oct 27, 2025
+ * Author: jomaa
+ */
+
+#ifndef INC_GLOBALS_H_
+#define INC_GLOBALS_H_
+
+#include "../../BSP/stm32l475e_iot01.h"
+#include "../../BSP/stm32l475e_iot01_accelero.h"
+#include "../../BSP/stm32l475e_iot01_gyro.h"
+#include "../../BSP/stm32l475e_iot01_hsensor.h"
+#include "../../BSP/stm32l475e_iot01_magneto.h"
+#include "../../BSP/stm32l475e_iot01_psensor.h"
+#include "../../BSP/stm32l475e_iot01_qspi.h"
+#include "../../BSP/stm32l475e_iot01_tsensor.h"
+#include
+
+#endif /* INC_GLOBALS_H_ */
diff --git a/P3_SETR2/Core/Inc/gyroscope.h b/P3_SETR2/Core/Inc/gyroscope.h
new file mode 100644
index 0000000..00ea701
--- /dev/null
+++ b/P3_SETR2/Core/Inc/gyroscope.h
@@ -0,0 +1,15 @@
+/*
+ * gyroscope.h
+ *
+ * Created on: Oct 27, 2025
+ * Author: jomaa
+ */
+
+#ifndef INC_GYROSCOPE_H_
+#define INC_GYROSCOPE_H_
+
+#include "globals.h"
+
+void Gyro_Test(void);
+
+#endif /* INC_GYROSCOPE_H_ */
diff --git a/P3_SETR2/Core/Inc/humidity.h b/P3_SETR2/Core/Inc/humidity.h
new file mode 100644
index 0000000..ff29355
--- /dev/null
+++ b/P3_SETR2/Core/Inc/humidity.h
@@ -0,0 +1,15 @@
+/*
+ * humidity.h
+ *
+ * Created on: Oct 27, 2025
+ * Author: jomaa
+ */
+
+#ifndef INC_HUMIDITY_H_
+#define INC_HUMIDITY_H_
+
+#include "globals.h"
+
+void Humidity_Test(void);
+
+#endif /* INC_HUMIDITY_H_ */
diff --git a/P3_SETR2/Core/Inc/magnetic.h b/P3_SETR2/Core/Inc/magnetic.h
new file mode 100644
index 0000000..6277eac
--- /dev/null
+++ b/P3_SETR2/Core/Inc/magnetic.h
@@ -0,0 +1,15 @@
+/*
+ * magnetic.h
+ *
+ * Created on: Oct 27, 2025
+ * Author: jomaa
+ */
+
+#ifndef INC_MAGNETIC_H_
+#define INC_MAGNETIC_H_
+
+#include "globals.h"
+
+void Magneto_Test(void);
+
+#endif /* INC_MAGNETIC_H_ */
diff --git a/P3_SETR2/Core/Inc/main.h b/P3_SETR2/Core/Inc/main.h
new file mode 100644
index 0000000..5886f97
--- /dev/null
+++ b/P3_SETR2/Core/Inc/main.h
@@ -0,0 +1,234 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file : main.h
+ * @brief : Header for main.c file.
+ * This file contains the common defines of the application.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2025 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __MAIN_H
+#define __MAIN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+#include "stm32l4xx_hal.h"
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void Error_Handler(void);
+
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+/* Private defines -----------------------------------------------------------*/
+#define M24SR64_Y_RF_DISABLE_Pin GPIO_PIN_2
+#define M24SR64_Y_RF_DISABLE_GPIO_Port GPIOE
+#define USB_OTG_FS_OVRCR_EXTI3_Pin GPIO_PIN_3
+#define USB_OTG_FS_OVRCR_EXTI3_GPIO_Port GPIOE
+#define M24SR64_Y_GPO_Pin GPIO_PIN_4
+#define M24SR64_Y_GPO_GPIO_Port GPIOE
+#define SPSGRF_915_GPIO3_EXTI5_Pin GPIO_PIN_5
+#define SPSGRF_915_GPIO3_EXTI5_GPIO_Port GPIOE
+#define SPSGRF_915_GPIO3_EXTI5_EXTI_IRQn EXTI9_5_IRQn
+#define SPBTLE_RF_IRQ_EXTI6_Pin GPIO_PIN_6
+#define SPBTLE_RF_IRQ_EXTI6_GPIO_Port GPIOE
+#define SPBTLE_RF_IRQ_EXTI6_EXTI_IRQn EXTI9_5_IRQn
+#define BUTTON_EXTI13_Pin GPIO_PIN_13
+#define BUTTON_EXTI13_GPIO_Port GPIOC
+#define BUTTON_EXTI13_EXTI_IRQn EXTI15_10_IRQn
+#define ARD_A5_Pin GPIO_PIN_0
+#define ARD_A5_GPIO_Port GPIOC
+#define ARD_A4_Pin GPIO_PIN_1
+#define ARD_A4_GPIO_Port GPIOC
+#define ARD_A3_Pin GPIO_PIN_2
+#define ARD_A3_GPIO_Port GPIOC
+#define ARD_A2_Pin GPIO_PIN_3
+#define ARD_A2_GPIO_Port GPIOC
+#define ARD_D1_Pin GPIO_PIN_0
+#define ARD_D1_GPIO_Port GPIOA
+#define ARD_D0_Pin GPIO_PIN_1
+#define ARD_D0_GPIO_Port GPIOA
+#define ARD_D10_Pin GPIO_PIN_2
+#define ARD_D10_GPIO_Port GPIOA
+#define ARD_D4_Pin GPIO_PIN_3
+#define ARD_D4_GPIO_Port GPIOA
+#define ARD_D7_Pin GPIO_PIN_4
+#define ARD_D7_GPIO_Port GPIOA
+#define ARD_D13_Pin GPIO_PIN_5
+#define ARD_D13_GPIO_Port GPIOA
+#define ARD_D12_Pin GPIO_PIN_6
+#define ARD_D12_GPIO_Port GPIOA
+#define ARD_D11_Pin GPIO_PIN_7
+#define ARD_D11_GPIO_Port GPIOA
+#define ARD_A1_Pin GPIO_PIN_4
+#define ARD_A1_GPIO_Port GPIOC
+#define ARD_A0_Pin GPIO_PIN_5
+#define ARD_A0_GPIO_Port GPIOC
+#define ARD_D3_Pin GPIO_PIN_0
+#define ARD_D3_GPIO_Port GPIOB
+#define ARD_D6_Pin GPIO_PIN_1
+#define ARD_D6_GPIO_Port GPIOB
+#define ARD_D8_Pin GPIO_PIN_2
+#define ARD_D8_GPIO_Port GPIOB
+#define DFSDM1_DATIN2_Pin GPIO_PIN_7
+#define DFSDM1_DATIN2_GPIO_Port GPIOE
+#define ISM43362_RST_Pin GPIO_PIN_8
+#define ISM43362_RST_GPIO_Port GPIOE
+#define DFSDM1_CKOUT_Pin GPIO_PIN_9
+#define DFSDM1_CKOUT_GPIO_Port GPIOE
+#define QUADSPI_CLK_Pin GPIO_PIN_10
+#define QUADSPI_CLK_GPIO_Port GPIOE
+#define QUADSPI_NCS_Pin GPIO_PIN_11
+#define QUADSPI_NCS_GPIO_Port GPIOE
+#define OQUADSPI_BK1_IO0_Pin GPIO_PIN_12
+#define OQUADSPI_BK1_IO0_GPIO_Port GPIOE
+#define QUADSPI_BK1_IO1_Pin GPIO_PIN_13
+#define QUADSPI_BK1_IO1_GPIO_Port GPIOE
+#define QUAD_SPI_BK1_IO2_Pin GPIO_PIN_14
+#define QUAD_SPI_BK1_IO2_GPIO_Port GPIOE
+#define QUAD_SPI_BK1_IO3_Pin GPIO_PIN_15
+#define QUAD_SPI_BK1_IO3_GPIO_Port GPIOE
+#define INTERNAL_I2C2_SCL_Pin GPIO_PIN_10
+#define INTERNAL_I2C2_SCL_GPIO_Port GPIOB
+#define INTERNAL_I2C2_SDA_Pin GPIO_PIN_11
+#define INTERNAL_I2C2_SDA_GPIO_Port GPIOB
+#define ISM43362_BOOT0_Pin GPIO_PIN_12
+#define ISM43362_BOOT0_GPIO_Port GPIOB
+#define ISM43362_WAKEUP_Pin GPIO_PIN_13
+#define ISM43362_WAKEUP_GPIO_Port GPIOB
+#define LED2_Pin GPIO_PIN_14
+#define LED2_GPIO_Port GPIOB
+#define SPSGRF_915_SDN_Pin GPIO_PIN_15
+#define SPSGRF_915_SDN_GPIO_Port GPIOB
+#define INTERNAL_UART3_TX_Pin GPIO_PIN_8
+#define INTERNAL_UART3_TX_GPIO_Port GPIOD
+#define INTERNAL_UART3_RX_Pin GPIO_PIN_9
+#define INTERNAL_UART3_RX_GPIO_Port GPIOD
+#define LPS22HB_INT_DRDY_EXTI0_Pin GPIO_PIN_10
+#define LPS22HB_INT_DRDY_EXTI0_GPIO_Port GPIOD
+#define LPS22HB_INT_DRDY_EXTI0_EXTI_IRQn EXTI15_10_IRQn
+#define LSM6DSL_INT1_EXTI11_Pin GPIO_PIN_11
+#define LSM6DSL_INT1_EXTI11_GPIO_Port GPIOD
+#define LSM6DSL_INT1_EXTI11_EXTI_IRQn EXTI15_10_IRQn
+#define USB_OTG_FS_PWR_EN_Pin GPIO_PIN_12
+#define USB_OTG_FS_PWR_EN_GPIO_Port GPIOD
+#define SPBTLE_RF_SPI3_CSN_Pin GPIO_PIN_13
+#define SPBTLE_RF_SPI3_CSN_GPIO_Port GPIOD
+#define ARD_D2_Pin GPIO_PIN_14
+#define ARD_D2_GPIO_Port GPIOD
+#define ARD_D2_EXTI_IRQn EXTI15_10_IRQn
+#define HTS221_DRDY_EXTI15_Pin GPIO_PIN_15
+#define HTS221_DRDY_EXTI15_GPIO_Port GPIOD
+#define HTS221_DRDY_EXTI15_EXTI_IRQn EXTI15_10_IRQn
+#define VL53L0X_XSHUT_Pin GPIO_PIN_6
+#define VL53L0X_XSHUT_GPIO_Port GPIOC
+#define VL53L0X_GPIO1_EXTI7_Pin GPIO_PIN_7
+#define VL53L0X_GPIO1_EXTI7_GPIO_Port GPIOC
+#define VL53L0X_GPIO1_EXTI7_EXTI_IRQn EXTI9_5_IRQn
+#define LSM3MDL_DRDY_EXTI8_Pin GPIO_PIN_8
+#define LSM3MDL_DRDY_EXTI8_GPIO_Port GPIOC
+#define LSM3MDL_DRDY_EXTI8_EXTI_IRQn EXTI9_5_IRQn
+#define LED3_WIFI__LED4_BLE_Pin GPIO_PIN_9
+#define LED3_WIFI__LED4_BLE_GPIO_Port GPIOC
+#define SPBTLE_RF_RST_Pin GPIO_PIN_8
+#define SPBTLE_RF_RST_GPIO_Port GPIOA
+#define USB_OTG_FS_VBUS_Pin GPIO_PIN_9
+#define USB_OTG_FS_VBUS_GPIO_Port GPIOA
+#define USB_OTG_FS_ID_Pin GPIO_PIN_10
+#define USB_OTG_FS_ID_GPIO_Port GPIOA
+#define USB_OTG_FS_DM_Pin GPIO_PIN_11
+#define USB_OTG_FS_DM_GPIO_Port GPIOA
+#define USB_OTG_FS_DP_Pin GPIO_PIN_12
+#define USB_OTG_FS_DP_GPIO_Port GPIOA
+#define SYS_JTMS_SWDIO_Pin GPIO_PIN_13
+#define SYS_JTMS_SWDIO_GPIO_Port GPIOA
+#define SYS_JTCK_SWCLK_Pin GPIO_PIN_14
+#define SYS_JTCK_SWCLK_GPIO_Port GPIOA
+#define ARD_D9_Pin GPIO_PIN_15
+#define ARD_D9_GPIO_Port GPIOA
+#define INTERNAL_SPI3_SCK_Pin GPIO_PIN_10
+#define INTERNAL_SPI3_SCK_GPIO_Port GPIOC
+#define INTERNAL_SPI3_MISO_Pin GPIO_PIN_11
+#define INTERNAL_SPI3_MISO_GPIO_Port GPIOC
+#define INTERNAL_SPI3_MOSI_Pin GPIO_PIN_12
+#define INTERNAL_SPI3_MOSI_GPIO_Port GPIOC
+#define PMOD_RESET_Pin GPIO_PIN_0
+#define PMOD_RESET_GPIO_Port GPIOD
+#define PMOD_SPI2_SCK_Pin GPIO_PIN_1
+#define PMOD_SPI2_SCK_GPIO_Port GPIOD
+#define PMOD_IRQ_EXTI12_Pin GPIO_PIN_2
+#define PMOD_IRQ_EXTI12_GPIO_Port GPIOD
+#define PMOD_UART2_CTS_Pin GPIO_PIN_3
+#define PMOD_UART2_CTS_GPIO_Port GPIOD
+#define PMOD_UART2_RTS_Pin GPIO_PIN_4
+#define PMOD_UART2_RTS_GPIO_Port GPIOD
+#define PMOD_UART2_TX_Pin GPIO_PIN_5
+#define PMOD_UART2_TX_GPIO_Port GPIOD
+#define PMOD_UART2_RX_Pin GPIO_PIN_6
+#define PMOD_UART2_RX_GPIO_Port GPIOD
+#define STSAFE_A100_RESET_Pin GPIO_PIN_7
+#define STSAFE_A100_RESET_GPIO_Port GPIOD
+#define SYS_JTD0_SWO_Pin GPIO_PIN_3
+#define SYS_JTD0_SWO_GPIO_Port GPIOB
+#define ARD_D5_Pin GPIO_PIN_4
+#define ARD_D5_GPIO_Port GPIOB
+#define SPSGRF_915_SPI3_CSN_Pin GPIO_PIN_5
+#define SPSGRF_915_SPI3_CSN_GPIO_Port GPIOB
+#define ST_LINK_UART1_TX_Pin GPIO_PIN_6
+#define ST_LINK_UART1_TX_GPIO_Port GPIOB
+#define ST_LINK_UART1_RX_Pin GPIO_PIN_7
+#define ST_LINK_UART1_RX_GPIO_Port GPIOB
+#define ARD_D15_Pin GPIO_PIN_8
+#define ARD_D15_GPIO_Port GPIOB
+#define ARD_D14_Pin GPIO_PIN_9
+#define ARD_D14_GPIO_Port GPIOB
+#define ISM43362_SPI3_CSN_Pin GPIO_PIN_0
+#define ISM43362_SPI3_CSN_GPIO_Port GPIOE
+#define ISM43362_DRDY_EXTI1_Pin GPIO_PIN_1
+#define ISM43362_DRDY_EXTI1_GPIO_Port GPIOE
+
+/* USER CODE BEGIN Private defines */
+
+/* USER CODE END Private defines */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAIN_H */
diff --git a/P3_SETR2/Core/Inc/pressure.h b/P3_SETR2/Core/Inc/pressure.h
new file mode 100644
index 0000000..a686abc
--- /dev/null
+++ b/P3_SETR2/Core/Inc/pressure.h
@@ -0,0 +1,15 @@
+/*
+ * pressure.h
+ *
+ * Created on: Oct 27, 2025
+ * Author: jomaa
+ */
+
+#ifndef INC_PRESSURE_H_
+#define INC_PRESSURE_H_
+
+#include "pressure.h"
+
+void Pressure_Test(void);
+
+#endif /* INC_PRESSURE_H_ */
diff --git a/P3_SETR2/Core/Inc/stm32l4xx_hal_conf.h b/P3_SETR2/Core/Inc/stm32l4xx_hal_conf.h
new file mode 100644
index 0000000..70d89e9
--- /dev/null
+++ b/P3_SETR2/Core/Inc/stm32l4xx_hal_conf.h
@@ -0,0 +1,482 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file stm32l4xx_hal_conf.h
+ * @author MCD Application Team
+ * @brief HAL configuration template file.
+ * This file should be copied to the application folder and renamed
+ * to stm32l4xx_hal_conf.h.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2017 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32L4xx_HAL_CONF_H
+#define STM32L4xx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+ * @brief This is the list of modules to be used in the HAL driver
+ */
+#define HAL_MODULE_ENABLED
+/*#define HAL_ADC_MODULE_ENABLED */
+/*#define HAL_CRYP_MODULE_ENABLED */
+/*#define HAL_CAN_MODULE_ENABLED */
+/*#define HAL_COMP_MODULE_ENABLED */
+#define HAL_I2C_MODULE_ENABLED
+/*#define HAL_CRC_MODULE_ENABLED */
+/*#define HAL_CRYP_MODULE_ENABLED */
+/*#define HAL_DAC_MODULE_ENABLED */
+/*#define HAL_DCMI_MODULE_ENABLED */
+/*#define HAL_DMA2D_MODULE_ENABLED */
+#define HAL_DFSDM_MODULE_ENABLED
+/*#define HAL_DSI_MODULE_ENABLED */
+/*#define HAL_FIREWALL_MODULE_ENABLED */
+/*#define HAL_GFXMMU_MODULE_ENABLED */
+/*#define HAL_HCD_MODULE_ENABLED */
+/*#define HAL_HASH_MODULE_ENABLED */
+/*#define HAL_I2S_MODULE_ENABLED */
+/*#define HAL_IRDA_MODULE_ENABLED */
+/*#define HAL_IWDG_MODULE_ENABLED */
+/*#define HAL_LTDC_MODULE_ENABLED */
+/*#define HAL_LCD_MODULE_ENABLED */
+/*#define HAL_LPTIM_MODULE_ENABLED */
+/*#define HAL_MMC_MODULE_ENABLED */
+/*#define HAL_NAND_MODULE_ENABLED */
+/*#define HAL_NOR_MODULE_ENABLED */
+/*#define HAL_OPAMP_MODULE_ENABLED */
+/*#define HAL_OSPI_MODULE_ENABLED */
+/*#define HAL_OSPI_MODULE_ENABLED */
+#define HAL_PCD_MODULE_ENABLED
+/*#define HAL_PKA_MODULE_ENABLED */
+/*#define HAL_QSPI_MODULE_ENABLED */
+#define HAL_QSPI_MODULE_ENABLED
+/*#define HAL_RNG_MODULE_ENABLED */
+/*#define HAL_RTC_MODULE_ENABLED */
+/*#define HAL_SAI_MODULE_ENABLED */
+/*#define HAL_SD_MODULE_ENABLED */
+/*#define HAL_SMBUS_MODULE_ENABLED */
+/*#define HAL_SMARTCARD_MODULE_ENABLED */
+#define HAL_SPI_MODULE_ENABLED
+/*#define HAL_SRAM_MODULE_ENABLED */
+/*#define HAL_SWPMI_MODULE_ENABLED */
+/*#define HAL_TIM_MODULE_ENABLED */
+/*#define HAL_TSC_MODULE_ENABLED */
+#define HAL_UART_MODULE_ENABLED
+/*#define HAL_USART_MODULE_ENABLED */
+/*#define HAL_WWDG_MODULE_ENABLED */
+/*#define HAL_EXTI_MODULE_ENABLED */
+/*#define HAL_PSSI_MODULE_ENABLED */
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+
+/* ########################## Oscillator Values adaptation ####################*/
+/**
+ * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+ * This value is used by the RCC HAL module to compute the system frequency
+ * (when HSE is used as system clock source, directly or through the PLL).
+ */
+#if !defined (HSE_VALUE)
+ #define HSE_VALUE ((uint32_t)8000000U) /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined (HSE_STARTUP_TIMEOUT)
+ #define HSE_STARTUP_TIMEOUT ((uint32_t)100U) /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+ * @brief Internal Multiple Speed oscillator (MSI) default value.
+ * This value is the default MSI range value after Reset.
+ */
+#if !defined (MSI_VALUE)
+ #define MSI_VALUE ((uint32_t)4000000U) /*!< Value of the Internal oscillator in Hz*/
+#endif /* MSI_VALUE */
+/**
+ * @brief Internal High Speed oscillator (HSI) value.
+ * This value is used by the RCC HAL module to compute the system frequency
+ * (when HSI is used as system clock source, directly or through the PLL).
+ */
+#if !defined (HSI_VALUE)
+ #define HSI_VALUE ((uint32_t)16000000U) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+ * @brief Internal High Speed oscillator (HSI48) value for USB FS, SDMMC and RNG.
+ * This internal oscillator is mainly dedicated to provide a high precision clock to
+ * the USB peripheral by means of a special Clock Recovery System (CRS) circuitry.
+ * When the CRS is not used, the HSI48 RC oscillator runs on it default frequency
+ * which is subject to manufacturing process variations.
+ */
+#if !defined (HSI48_VALUE)
+ #define HSI48_VALUE ((uint32_t)48000000U) /*!< Value of the Internal High Speed oscillator for USB FS/SDMMC/RNG in Hz.
+ The real value my vary depending on manufacturing process variations.*/
+#endif /* HSI48_VALUE */
+
+/**
+ * @brief Internal Low Speed oscillator (LSI) value.
+ */
+#if !defined (LSI_VALUE)
+ #define LSI_VALUE 32000U /*!< LSI Typical Value in Hz*/
+#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz
+ The real value may vary depending on the variations
+ in voltage and temperature.*/
+
+/**
+ * @brief External Low Speed oscillator (LSE) value.
+ * This value is used by the UART, RTC HAL module to compute the system frequency
+ */
+#if !defined (LSE_VALUE)
+ #define LSE_VALUE 32768U /*!< Value of the External oscillator in Hz*/
+#endif /* LSE_VALUE */
+
+#if !defined (LSE_STARTUP_TIMEOUT)
+ #define LSE_STARTUP_TIMEOUT 5000U /*!< Time out for LSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+ * @brief External clock source for SAI1 peripheral
+ * This value is used by the RCC HAL module to compute the SAI1 & SAI2 clock source
+ * frequency.
+ */
+#if !defined (EXTERNAL_SAI1_CLOCK_VALUE)
+ #define EXTERNAL_SAI1_CLOCK_VALUE 2097000U /*!< Value of the SAI1 External clock source in Hz*/
+#endif /* EXTERNAL_SAI1_CLOCK_VALUE */
+
+/**
+ * @brief External clock source for SAI2 peripheral
+ * This value is used by the RCC HAL module to compute the SAI1 & SAI2 clock source
+ * frequency.
+ */
+#if !defined (EXTERNAL_SAI2_CLOCK_VALUE)
+ #define EXTERNAL_SAI2_CLOCK_VALUE 2097000U /*!< Value of the SAI2 External clock source in Hz*/
+#endif /* EXTERNAL_SAI2_CLOCK_VALUE */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+ === you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+ * @brief This is the HAL system configuration section
+ */
+
+#define VDD_VALUE 3300U /*!< Value of VDD in mv */
+#define TICK_INT_PRIORITY 0U /*!< tick interrupt priority */
+#define USE_RTOS 0U
+#define PREFETCH_ENABLE 0U
+#define INSTRUCTION_CACHE_ENABLE 1U
+#define DATA_CACHE_ENABLE 1U
+
+/* ########################## Assert Selection ############################## */
+/**
+ * @brief Uncomment the line below to expanse the "assert_param" macro in the
+ * HAL drivers code
+ */
+/* #define USE_FULL_ASSERT 1U */
+
+/* ################## Register callback feature configuration ############### */
+/**
+ * @brief Set below the peripheral configuration to "1U" to add the support
+ * of HAL callback registration/deregistration feature for the HAL
+ * driver(s). This allows user application to provide specific callback
+ * functions thanks to HAL_PPP_RegisterCallback() rather than overwriting
+ * the default weak callback functions (see each stm32l4xx_hal_ppp.h file
+ * for possible callback identifiers defined in HAL_PPP_CallbackIDTypeDef
+ * for each PPP peripheral).
+ */
+#define USE_HAL_ADC_REGISTER_CALLBACKS 0U
+#define USE_HAL_CAN_REGISTER_CALLBACKS 0U
+#define USE_HAL_COMP_REGISTER_CALLBACKS 0U
+#define USE_HAL_CRYP_REGISTER_CALLBACKS 0U
+#define USE_HAL_DAC_REGISTER_CALLBACKS 0U
+#define USE_HAL_DCMI_REGISTER_CALLBACKS 0U
+#define USE_HAL_DFSDM_REGISTER_CALLBACKS 0U
+#define USE_HAL_DMA2D_REGISTER_CALLBACKS 0U
+#define USE_HAL_DSI_REGISTER_CALLBACKS 0U
+#define USE_HAL_GFXMMU_REGISTER_CALLBACKS 0U
+#define USE_HAL_HASH_REGISTER_CALLBACKS 0U
+#define USE_HAL_HCD_REGISTER_CALLBACKS 0U
+#define USE_HAL_I2C_REGISTER_CALLBACKS 0U
+#define USE_HAL_IRDA_REGISTER_CALLBACKS 0U
+#define USE_HAL_LPTIM_REGISTER_CALLBACKS 0U
+#define USE_HAL_LTDC_REGISTER_CALLBACKS 0U
+#define USE_HAL_MMC_REGISTER_CALLBACKS 0U
+#define USE_HAL_OPAMP_REGISTER_CALLBACKS 0U
+#define USE_HAL_OSPI_REGISTER_CALLBACKS 0U
+#define USE_HAL_PCD_REGISTER_CALLBACKS 0U
+#define USE_HAL_QSPI_REGISTER_CALLBACKS 0U
+#define USE_HAL_RNG_REGISTER_CALLBACKS 0U
+#define USE_HAL_RTC_REGISTER_CALLBACKS 0U
+#define USE_HAL_SAI_REGISTER_CALLBACKS 0U
+#define USE_HAL_SD_REGISTER_CALLBACKS 0U
+#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS 0U
+#define USE_HAL_SMBUS_REGISTER_CALLBACKS 0U
+#define USE_HAL_SPI_REGISTER_CALLBACKS 0U
+#define USE_HAL_SWPMI_REGISTER_CALLBACKS 0U
+#define USE_HAL_TIM_REGISTER_CALLBACKS 0U
+#define USE_HAL_TSC_REGISTER_CALLBACKS 0U
+#define USE_HAL_UART_REGISTER_CALLBACKS 0U
+#define USE_HAL_USART_REGISTER_CALLBACKS 0U
+#define USE_HAL_WWDG_REGISTER_CALLBACKS 0U
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+ * Activated: CRC code is present inside driver
+ * Deactivated: CRC code cleaned from driver
+ */
+
+#define USE_SPI_CRC 0U
+
+/* Includes ------------------------------------------------------------------*/
+/**
+ * @brief Include module's header file
+ */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+ #include "stm32l4xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+ #include "stm32l4xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+ #include "stm32l4xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_DFSDM_MODULE_ENABLED
+ #include "stm32l4xx_hal_dfsdm.h"
+#endif /* HAL_DFSDM_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+ #include "stm32l4xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+ #include "stm32l4xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_CAN_MODULE_ENABLED
+ #include "stm32l4xx_hal_can.h"
+#endif /* HAL_CAN_MODULE_ENABLED */
+
+#ifdef HAL_CAN_LEGACY_MODULE_ENABLED
+ #include "Legacy/stm32l4xx_hal_can_legacy.h"
+#endif /* HAL_CAN_LEGACY_MODULE_ENABLED */
+
+#ifdef HAL_COMP_MODULE_ENABLED
+ #include "stm32l4xx_hal_comp.h"
+#endif /* HAL_COMP_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+ #include "stm32l4xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+ #include "stm32l4xx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+ #include "stm32l4xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_DCMI_MODULE_ENABLED
+ #include "stm32l4xx_hal_dcmi.h"
+#endif /* HAL_DCMI_MODULE_ENABLED */
+
+#ifdef HAL_DMA2D_MODULE_ENABLED
+ #include "stm32l4xx_hal_dma2d.h"
+#endif /* HAL_DMA2D_MODULE_ENABLED */
+
+#ifdef HAL_DSI_MODULE_ENABLED
+ #include "stm32l4xx_hal_dsi.h"
+#endif /* HAL_DSI_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+ #include "stm32l4xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_GFXMMU_MODULE_ENABLED
+ #include "stm32l4xx_hal_gfxmmu.h"
+#endif /* HAL_GFXMMU_MODULE_ENABLED */
+
+#ifdef HAL_FIREWALL_MODULE_ENABLED
+ #include "stm32l4xx_hal_firewall.h"
+#endif /* HAL_FIREWALL_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+ #include "stm32l4xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_HASH_MODULE_ENABLED
+ #include "stm32l4xx_hal_hash.h"
+#endif /* HAL_HASH_MODULE_ENABLED */
+
+#ifdef HAL_HCD_MODULE_ENABLED
+ #include "stm32l4xx_hal_hcd.h"
+#endif /* HAL_HCD_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+ #include "stm32l4xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+ #include "stm32l4xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+ #include "stm32l4xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_LCD_MODULE_ENABLED
+ #include "stm32l4xx_hal_lcd.h"
+#endif /* HAL_LCD_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+ #include "stm32l4xx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_LTDC_MODULE_ENABLED
+ #include "stm32l4xx_hal_ltdc.h"
+#endif /* HAL_LTDC_MODULE_ENABLED */
+
+#ifdef HAL_MMC_MODULE_ENABLED
+ #include "stm32l4xx_hal_mmc.h"
+#endif /* HAL_MMC_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+ #include "stm32l4xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+ #include "stm32l4xx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_OPAMP_MODULE_ENABLED
+ #include "stm32l4xx_hal_opamp.h"
+#endif /* HAL_OPAMP_MODULE_ENABLED */
+
+#ifdef HAL_OSPI_MODULE_ENABLED
+ #include "stm32l4xx_hal_ospi.h"
+#endif /* HAL_OSPI_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+ #include "stm32l4xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_PKA_MODULE_ENABLED
+ #include "stm32l4xx_hal_pka.h"
+#endif /* HAL_PKA_MODULE_ENABLED */
+
+#ifdef HAL_PSSI_MODULE_ENABLED
+ #include "stm32l4xx_hal_pssi.h"
+#endif /* HAL_PSSI_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+ #include "stm32l4xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+ #include "stm32l4xx_hal_qspi.h"
+#endif /* HAL_QSPI_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+ #include "stm32l4xx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+ #include "stm32l4xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+ #include "stm32l4xx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SD_MODULE_ENABLED
+ #include "stm32l4xx_hal_sd.h"
+#endif /* HAL_SD_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+ #include "stm32l4xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_SMBUS_MODULE_ENABLED
+ #include "stm32l4xx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+ #include "stm32l4xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_SRAM_MODULE_ENABLED
+ #include "stm32l4xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_SWPMI_MODULE_ENABLED
+ #include "stm32l4xx_hal_swpmi.h"
+#endif /* HAL_SWPMI_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+ #include "stm32l4xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_TSC_MODULE_ENABLED
+ #include "stm32l4xx_hal_tsc.h"
+#endif /* HAL_TSC_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+ #include "stm32l4xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+ #include "stm32l4xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+ #include "stm32l4xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef USE_FULL_ASSERT
+/**
+ * @brief The assert_param macro is used for function's parameters check.
+ * @param expr If expr is false, it calls assert_failed function
+ * which reports the name of the source file and the source
+ * line number of the call that failed.
+ * If expr is true, it returns no value.
+ * @retval None
+ */
+ #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+ void assert_failed(uint8_t *file, uint32_t line);
+#else
+ #define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32L4xx_HAL_CONF_H */
diff --git a/P3_SETR2/Core/Inc/stm32l4xx_it.h b/P3_SETR2/Core/Inc/stm32l4xx_it.h
new file mode 100644
index 0000000..1849518
--- /dev/null
+++ b/P3_SETR2/Core/Inc/stm32l4xx_it.h
@@ -0,0 +1,68 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file stm32l4xx_it.h
+ * @brief This file contains the headers of the interrupt handlers.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2025 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32L4xx_IT_H
+#define __STM32L4xx_IT_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void NMI_Handler(void);
+void HardFault_Handler(void);
+void MemManage_Handler(void);
+void BusFault_Handler(void);
+void UsageFault_Handler(void);
+void SVC_Handler(void);
+void DebugMon_Handler(void);
+void PendSV_Handler(void);
+void SysTick_Handler(void);
+void EXTI9_5_IRQHandler(void);
+void EXTI15_10_IRQHandler(void);
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32L4xx_IT_H */
diff --git a/P3_SETR2/Core/Inc/temperature.h b/P3_SETR2/Core/Inc/temperature.h
new file mode 100644
index 0000000..1db573e
--- /dev/null
+++ b/P3_SETR2/Core/Inc/temperature.h
@@ -0,0 +1,15 @@
+/*
+ * temperature.h
+ *
+ * Created on: Oct 27, 2025
+ * Author: jomaa
+ */
+
+#ifndef INC_TEMPERATURE_H_
+#define INC_TEMPERATURE_H_
+
+#include "globals.h"
+
+void Temperature_Test(void);
+
+#endif /* INC_TEMPERATURE_H_ */
diff --git a/P3_SETR2/Core/Src/accelerometer.c b/P3_SETR2/Core/Src/accelerometer.c
new file mode 100644
index 0000000..66bf37e
--- /dev/null
+++ b/P3_SETR2/Core/Src/accelerometer.c
@@ -0,0 +1,21 @@
+/*
+ * accelerometer.c
+ *
+ * Created on: Oct 27, 2025
+ * Author: jomaa
+ */
+
+#include "accelerometer.h"
+
+void Accelero_Test(void)
+{
+ int16_t pDataXYZ[3] = {0};
+ BSP_ACCELERO_Init();
+ BSP_ACCELERO_AccGetXYZ(pDataXYZ);
+ printf("X= %d, Y = %d, Z = %d \n\r", pDataXYZ[0],
+ pDataXYZ[1], pDataXYZ[2]);
+
+ BSP_ACCELERO_DeInit();
+ printf("\n*** End of Accelerometer Test ***\n\n");
+ return;
+}
diff --git a/P3_SETR2/Core/Src/gyroscope.c b/P3_SETR2/Core/Src/gyroscope.c
new file mode 100644
index 0000000..28b2684
--- /dev/null
+++ b/P3_SETR2/Core/Src/gyroscope.c
@@ -0,0 +1,24 @@
+/*
+ * gyroscope.c
+ *
+ * Created on: Oct 27, 2025
+ * Author: jomaa
+ */
+
+#include "gyroscope.h"
+
+void Gyro_Test(void)
+{
+ float pGyroDataXYZ[3] = {0};
+ BSP_GYRO_Init();
+
+ BSP_GYRO_GetXYZ(pGyroDataXYZ);
+ printf("GYRO_X = %.2f \n", pGyroDataXYZ[0]);
+ printf("GYRO_Y = %.2f \n", pGyroDataXYZ[1]);
+ printf("GYRO_Z = %.2f \n", pGyroDataXYZ[2]);
+
+ BSP_GYRO_DeInit();
+ printf("\n*** End of Gyro Test ***\n\n");
+ return;
+}
+
diff --git a/P3_SETR2/Core/Src/humidity.c b/P3_SETR2/Core/Src/humidity.c
new file mode 100644
index 0000000..c097b03
--- /dev/null
+++ b/P3_SETR2/Core/Src/humidity.c
@@ -0,0 +1,16 @@
+/*
+ * humidity.c
+ *
+ * Created on: Oct 27, 2025
+ * Author: jomaa
+ */
+
+#include "humidity.h"
+
+void Humidity_Test(void)
+{
+ float humidity_value;
+ BSP_HSENSOR_Init();
+ humidity_value = BSP_HSENSOR_ReadHumidity();
+ printf("HUMIDITY is = %.2f %%\n", humidity_value);
+}
diff --git a/P3_SETR2/Core/Src/magnetic.c b/P3_SETR2/Core/Src/magnetic.c
new file mode 100644
index 0000000..55b981a
--- /dev/null
+++ b/P3_SETR2/Core/Src/magnetic.c
@@ -0,0 +1,23 @@
+/*
+ * magnetic.c
+ *
+ * Created on: Oct 27, 2025
+ * Author: jomaa
+ */
+
+#include "magnetic.h"
+
+void Magneto_Test(void)
+{
+ int16_t pDataXYZ[3] = {0};
+ BSP_MAGNETO_Init();
+
+ BSP_MAGNETO_GetXYZ(pDataXYZ);
+ printf("MAGNETO_X = %d \n", pDataXYZ[0]);
+ printf("MAGNETO_Y = %d \n", pDataXYZ[1]);
+ printf("MAGNETO_Z = %d \n", pDataXYZ[2]);
+
+ BSP_MAGNETO_DeInit();
+ printf("\n*** End of Magneto Test ***\n\n");
+ return;
+}
diff --git a/P3_SETR2/Core/Src/main.c b/P3_SETR2/Core/Src/main.c
new file mode 100644
index 0000000..b449e66
--- /dev/null
+++ b/P3_SETR2/Core/Src/main.c
@@ -0,0 +1,690 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file : main.c
+ * @brief : Main program body
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2025 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+DFSDM_Channel_HandleTypeDef hdfsdm1_channel1;
+
+I2C_HandleTypeDef hi2c2;
+
+QSPI_HandleTypeDef hqspi;
+
+SPI_HandleTypeDef hspi3;
+
+UART_HandleTypeDef huart1;
+UART_HandleTypeDef huart3;
+
+PCD_HandleTypeDef hpcd_USB_OTG_FS;
+
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+void SystemClock_Config(void);
+static void MX_GPIO_Init(void);
+static void MX_DFSDM1_Init(void);
+static void MX_I2C2_Init(void);
+static void MX_QUADSPI_Init(void);
+static void MX_SPI3_Init(void);
+static void MX_USART1_UART_Init(void);
+static void MX_USART3_UART_Init(void);
+static void MX_USB_OTG_FS_PCD_Init(void);
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+int __io_putchar(int ch)
+{
+ while(HAL_OK != HAL_UART_Transmit(&huart1, (uint8_t*)&ch, 1, 3000));
+ return ch;
+}
+/* USER CODE END 0 */
+
+/**
+ * @brief The application entry point.
+ * @retval int
+ */
+int main(void)
+{
+
+ /* USER CODE BEGIN 1 */
+
+ /* USER CODE END 1 */
+
+ /* MCU Configuration--------------------------------------------------------*/
+
+ /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+ HAL_Init();
+
+ /* USER CODE BEGIN Init */
+
+ /* USER CODE END Init */
+
+ /* Configure the system clock */
+ SystemClock_Config();
+
+ /* USER CODE BEGIN SysInit */
+
+ /* USER CODE END SysInit */
+
+ /* Initialize all configured peripherals */
+ MX_GPIO_Init();
+ MX_DFSDM1_Init();
+ MX_I2C2_Init();
+ MX_QUADSPI_Init();
+ MX_SPI3_Init();
+ MX_USART1_UART_Init();
+ MX_USART3_UART_Init();
+ MX_USB_OTG_FS_PCD_Init();
+ /* USER CODE BEGIN 2 */
+
+ /* USER CODE END 2 */
+
+ /* Infinite loop */
+ /* USER CODE BEGIN WHILE */
+ while (1)
+ {
+ /* USER CODE END WHILE */
+ Temperature_Test();
+ Humidity_Test();
+ Pressure_Test();
+ Magneto_Test();
+ Gyro_Test();
+ Accelero_Test();
+ HAL_Delay(5000);
+ /* USER CODE BEGIN 3 */
+ }
+ /* USER CODE END 3 */
+}
+
+/**
+ * @brief System Clock Configuration
+ * @retval None
+ */
+void SystemClock_Config(void)
+{
+ RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+ RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+
+ /** Configure the main internal regulator output voltage
+ */
+ if (HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1) != HAL_OK)
+ {
+ Error_Handler();
+ }
+
+ /** Configure LSE Drive Capability
+ */
+ HAL_PWR_EnableBkUpAccess();
+ __HAL_RCC_LSEDRIVE_CONFIG(RCC_LSEDRIVE_LOW);
+
+ /** Initializes the RCC Oscillators according to the specified parameters
+ * in the RCC_OscInitTypeDef structure.
+ */
+ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSE|RCC_OSCILLATORTYPE_MSI;
+ RCC_OscInitStruct.LSEState = RCC_LSE_ON;
+ RCC_OscInitStruct.MSIState = RCC_MSI_ON;
+ RCC_OscInitStruct.MSICalibrationValue = 0;
+ RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_6;
+ RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+ RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_MSI;
+ RCC_OscInitStruct.PLL.PLLM = 1;
+ RCC_OscInitStruct.PLL.PLLN = 40;
+ RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV7;
+ RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
+ RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
+ if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+ {
+ Error_Handler();
+ }
+
+ /** Initializes the CPU, AHB and APB buses clocks
+ */
+ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+ |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+ RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+ RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+ RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+ RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+ if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
+ {
+ Error_Handler();
+ }
+
+ /** Enable MSI Auto calibration
+ */
+ HAL_RCCEx_EnableMSIPLLMode();
+}
+
+/**
+ * @brief DFSDM1 Initialization Function
+ * @param None
+ * @retval None
+ */
+static void MX_DFSDM1_Init(void)
+{
+
+ /* USER CODE BEGIN DFSDM1_Init 0 */
+
+ /* USER CODE END DFSDM1_Init 0 */
+
+ /* USER CODE BEGIN DFSDM1_Init 1 */
+
+ /* USER CODE END DFSDM1_Init 1 */
+ hdfsdm1_channel1.Instance = DFSDM1_Channel1;
+ hdfsdm1_channel1.Init.OutputClock.Activation = ENABLE;
+ hdfsdm1_channel1.Init.OutputClock.Selection = DFSDM_CHANNEL_OUTPUT_CLOCK_SYSTEM;
+ hdfsdm1_channel1.Init.OutputClock.Divider = 2;
+ hdfsdm1_channel1.Init.Input.Multiplexer = DFSDM_CHANNEL_EXTERNAL_INPUTS;
+ hdfsdm1_channel1.Init.Input.DataPacking = DFSDM_CHANNEL_STANDARD_MODE;
+ hdfsdm1_channel1.Init.Input.Pins = DFSDM_CHANNEL_FOLLOWING_CHANNEL_PINS;
+ hdfsdm1_channel1.Init.SerialInterface.Type = DFSDM_CHANNEL_SPI_RISING;
+ hdfsdm1_channel1.Init.SerialInterface.SpiClock = DFSDM_CHANNEL_SPI_CLOCK_INTERNAL;
+ hdfsdm1_channel1.Init.Awd.FilterOrder = DFSDM_CHANNEL_FASTSINC_ORDER;
+ hdfsdm1_channel1.Init.Awd.Oversampling = 1;
+ hdfsdm1_channel1.Init.Offset = 0;
+ hdfsdm1_channel1.Init.RightBitShift = 0x00;
+ if (HAL_DFSDM_ChannelInit(&hdfsdm1_channel1) != HAL_OK)
+ {
+ Error_Handler();
+ }
+ /* USER CODE BEGIN DFSDM1_Init 2 */
+
+ /* USER CODE END DFSDM1_Init 2 */
+
+}
+
+/**
+ * @brief I2C2 Initialization Function
+ * @param None
+ * @retval None
+ */
+static void MX_I2C2_Init(void)
+{
+
+ /* USER CODE BEGIN I2C2_Init 0 */
+
+ /* USER CODE END I2C2_Init 0 */
+
+ /* USER CODE BEGIN I2C2_Init 1 */
+
+ /* USER CODE END I2C2_Init 1 */
+ hi2c2.Instance = I2C2;
+ hi2c2.Init.Timing = 0x00000E14;
+ hi2c2.Init.OwnAddress1 = 0;
+ hi2c2.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;
+ hi2c2.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE;
+ hi2c2.Init.OwnAddress2 = 0;
+ hi2c2.Init.OwnAddress2Masks = I2C_OA2_NOMASK;
+ hi2c2.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE;
+ hi2c2.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE;
+ if (HAL_I2C_Init(&hi2c2) != HAL_OK)
+ {
+ Error_Handler();
+ }
+
+ /** Configure Analogue filter
+ */
+ if (HAL_I2CEx_ConfigAnalogFilter(&hi2c2, I2C_ANALOGFILTER_ENABLE) != HAL_OK)
+ {
+ Error_Handler();
+ }
+
+ /** Configure Digital filter
+ */
+ if (HAL_I2CEx_ConfigDigitalFilter(&hi2c2, 0) != HAL_OK)
+ {
+ Error_Handler();
+ }
+ /* USER CODE BEGIN I2C2_Init 2 */
+
+ /* USER CODE END I2C2_Init 2 */
+
+}
+
+/**
+ * @brief QUADSPI Initialization Function
+ * @param None
+ * @retval None
+ */
+static void MX_QUADSPI_Init(void)
+{
+
+ /* USER CODE BEGIN QUADSPI_Init 0 */
+
+ /* USER CODE END QUADSPI_Init 0 */
+
+ /* USER CODE BEGIN QUADSPI_Init 1 */
+
+ /* USER CODE END QUADSPI_Init 1 */
+ /* QUADSPI parameter configuration*/
+ hqspi.Instance = QUADSPI;
+ hqspi.Init.ClockPrescaler = 2;
+ hqspi.Init.FifoThreshold = 4;
+ hqspi.Init.SampleShifting = QSPI_SAMPLE_SHIFTING_HALFCYCLE;
+ hqspi.Init.FlashSize = 23;
+ hqspi.Init.ChipSelectHighTime = QSPI_CS_HIGH_TIME_1_CYCLE;
+ hqspi.Init.ClockMode = QSPI_CLOCK_MODE_0;
+ if (HAL_QSPI_Init(&hqspi) != HAL_OK)
+ {
+ Error_Handler();
+ }
+ /* USER CODE BEGIN QUADSPI_Init 2 */
+
+ /* USER CODE END QUADSPI_Init 2 */
+
+}
+
+/**
+ * @brief SPI3 Initialization Function
+ * @param None
+ * @retval None
+ */
+static void MX_SPI3_Init(void)
+{
+
+ /* USER CODE BEGIN SPI3_Init 0 */
+
+ /* USER CODE END SPI3_Init 0 */
+
+ /* USER CODE BEGIN SPI3_Init 1 */
+
+ /* USER CODE END SPI3_Init 1 */
+ /* SPI3 parameter configuration*/
+ hspi3.Instance = SPI3;
+ hspi3.Init.Mode = SPI_MODE_MASTER;
+ hspi3.Init.Direction = SPI_DIRECTION_2LINES;
+ hspi3.Init.DataSize = SPI_DATASIZE_4BIT;
+ hspi3.Init.CLKPolarity = SPI_POLARITY_LOW;
+ hspi3.Init.CLKPhase = SPI_PHASE_1EDGE;
+ hspi3.Init.NSS = SPI_NSS_SOFT;
+ hspi3.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2;
+ hspi3.Init.FirstBit = SPI_FIRSTBIT_MSB;
+ hspi3.Init.TIMode = SPI_TIMODE_DISABLE;
+ hspi3.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
+ hspi3.Init.CRCPolynomial = 7;
+ hspi3.Init.CRCLength = SPI_CRC_LENGTH_DATASIZE;
+ hspi3.Init.NSSPMode = SPI_NSS_PULSE_ENABLE;
+ if (HAL_SPI_Init(&hspi3) != HAL_OK)
+ {
+ Error_Handler();
+ }
+ /* USER CODE BEGIN SPI3_Init 2 */
+
+ /* USER CODE END SPI3_Init 2 */
+
+}
+
+/**
+ * @brief USART1 Initialization Function
+ * @param None
+ * @retval None
+ */
+static void MX_USART1_UART_Init(void)
+{
+
+ /* USER CODE BEGIN USART1_Init 0 */
+
+ /* USER CODE END USART1_Init 0 */
+
+ /* USER CODE BEGIN USART1_Init 1 */
+
+ /* USER CODE END USART1_Init 1 */
+ huart1.Instance = USART1;
+ huart1.Init.BaudRate = 115200;
+ huart1.Init.WordLength = UART_WORDLENGTH_8B;
+ huart1.Init.StopBits = UART_STOPBITS_1;
+ huart1.Init.Parity = UART_PARITY_NONE;
+ huart1.Init.Mode = UART_MODE_TX_RX;
+ huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
+ huart1.Init.OverSampling = UART_OVERSAMPLING_16;
+ huart1.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
+ huart1.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
+ if (HAL_UART_Init(&huart1) != HAL_OK)
+ {
+ Error_Handler();
+ }
+ /* USER CODE BEGIN USART1_Init 2 */
+
+ /* USER CODE END USART1_Init 2 */
+
+}
+
+/**
+ * @brief USART3 Initialization Function
+ * @param None
+ * @retval None
+ */
+static void MX_USART3_UART_Init(void)
+{
+
+ /* USER CODE BEGIN USART3_Init 0 */
+
+ /* USER CODE END USART3_Init 0 */
+
+ /* USER CODE BEGIN USART3_Init 1 */
+
+ /* USER CODE END USART3_Init 1 */
+ huart3.Instance = USART3;
+ huart3.Init.BaudRate = 115200;
+ huart3.Init.WordLength = UART_WORDLENGTH_8B;
+ huart3.Init.StopBits = UART_STOPBITS_1;
+ huart3.Init.Parity = UART_PARITY_NONE;
+ huart3.Init.Mode = UART_MODE_TX_RX;
+ huart3.Init.HwFlowCtl = UART_HWCONTROL_NONE;
+ huart3.Init.OverSampling = UART_OVERSAMPLING_16;
+ huart3.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
+ huart3.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
+ if (HAL_UART_Init(&huart3) != HAL_OK)
+ {
+ Error_Handler();
+ }
+ /* USER CODE BEGIN USART3_Init 2 */
+
+ /* USER CODE END USART3_Init 2 */
+
+}
+
+/**
+ * @brief USB_OTG_FS Initialization Function
+ * @param None
+ * @retval None
+ */
+static void MX_USB_OTG_FS_PCD_Init(void)
+{
+
+ /* USER CODE BEGIN USB_OTG_FS_Init 0 */
+
+ /* USER CODE END USB_OTG_FS_Init 0 */
+
+ /* USER CODE BEGIN USB_OTG_FS_Init 1 */
+
+ /* USER CODE END USB_OTG_FS_Init 1 */
+ hpcd_USB_OTG_FS.Instance = USB_OTG_FS;
+ hpcd_USB_OTG_FS.Init.dev_endpoints = 6;
+ hpcd_USB_OTG_FS.Init.speed = PCD_SPEED_FULL;
+ hpcd_USB_OTG_FS.Init.phy_itface = PCD_PHY_EMBEDDED;
+ hpcd_USB_OTG_FS.Init.Sof_enable = DISABLE;
+ hpcd_USB_OTG_FS.Init.low_power_enable = DISABLE;
+ hpcd_USB_OTG_FS.Init.lpm_enable = DISABLE;
+ hpcd_USB_OTG_FS.Init.battery_charging_enable = DISABLE;
+ hpcd_USB_OTG_FS.Init.use_dedicated_ep1 = DISABLE;
+ hpcd_USB_OTG_FS.Init.vbus_sensing_enable = DISABLE;
+ if (HAL_PCD_Init(&hpcd_USB_OTG_FS) != HAL_OK)
+ {
+ Error_Handler();
+ }
+ /* USER CODE BEGIN USB_OTG_FS_Init 2 */
+
+ /* USER CODE END USB_OTG_FS_Init 2 */
+
+}
+
+/**
+ * @brief GPIO Initialization Function
+ * @param None
+ * @retval None
+ */
+static void MX_GPIO_Init(void)
+{
+ GPIO_InitTypeDef GPIO_InitStruct = {0};
+ /* USER CODE BEGIN MX_GPIO_Init_1 */
+
+ /* USER CODE END MX_GPIO_Init_1 */
+
+ /* GPIO Ports Clock Enable */
+ __HAL_RCC_GPIOE_CLK_ENABLE();
+ __HAL_RCC_GPIOC_CLK_ENABLE();
+ __HAL_RCC_GPIOA_CLK_ENABLE();
+ __HAL_RCC_GPIOB_CLK_ENABLE();
+ __HAL_RCC_GPIOD_CLK_ENABLE();
+
+ /*Configure GPIO pin Output Level */
+ HAL_GPIO_WritePin(GPIOE, M24SR64_Y_RF_DISABLE_Pin|M24SR64_Y_GPO_Pin|ISM43362_RST_Pin, GPIO_PIN_RESET);
+
+ /*Configure GPIO pin Output Level */
+ HAL_GPIO_WritePin(GPIOA, ARD_D10_Pin|SPBTLE_RF_RST_Pin|ARD_D9_Pin, GPIO_PIN_RESET);
+
+ /*Configure GPIO pin Output Level */
+ HAL_GPIO_WritePin(GPIOB, ARD_D8_Pin|ISM43362_BOOT0_Pin|ISM43362_WAKEUP_Pin|LED2_Pin
+ |SPSGRF_915_SDN_Pin|ARD_D5_Pin, GPIO_PIN_RESET);
+
+ /*Configure GPIO pin Output Level */
+ HAL_GPIO_WritePin(GPIOD, USB_OTG_FS_PWR_EN_Pin|PMOD_RESET_Pin|STSAFE_A100_RESET_Pin, GPIO_PIN_RESET);
+
+ /*Configure GPIO pin Output Level */
+ HAL_GPIO_WritePin(SPBTLE_RF_SPI3_CSN_GPIO_Port, SPBTLE_RF_SPI3_CSN_Pin, GPIO_PIN_SET);
+
+ /*Configure GPIO pin Output Level */
+ HAL_GPIO_WritePin(GPIOC, VL53L0X_XSHUT_Pin|LED3_WIFI__LED4_BLE_Pin, GPIO_PIN_RESET);
+
+ /*Configure GPIO pin Output Level */
+ HAL_GPIO_WritePin(SPSGRF_915_SPI3_CSN_GPIO_Port, SPSGRF_915_SPI3_CSN_Pin, GPIO_PIN_SET);
+
+ /*Configure GPIO pin Output Level */
+ HAL_GPIO_WritePin(ISM43362_SPI3_CSN_GPIO_Port, ISM43362_SPI3_CSN_Pin, GPIO_PIN_SET);
+
+ /*Configure GPIO pins : M24SR64_Y_RF_DISABLE_Pin M24SR64_Y_GPO_Pin ISM43362_RST_Pin ISM43362_SPI3_CSN_Pin */
+ GPIO_InitStruct.Pin = M24SR64_Y_RF_DISABLE_Pin|M24SR64_Y_GPO_Pin|ISM43362_RST_Pin|ISM43362_SPI3_CSN_Pin;
+ GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+ GPIO_InitStruct.Pull = GPIO_NOPULL;
+ GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+ HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
+
+ /*Configure GPIO pins : USB_OTG_FS_OVRCR_EXTI3_Pin SPSGRF_915_GPIO3_EXTI5_Pin SPBTLE_RF_IRQ_EXTI6_Pin ISM43362_DRDY_EXTI1_Pin */
+ GPIO_InitStruct.Pin = USB_OTG_FS_OVRCR_EXTI3_Pin|SPSGRF_915_GPIO3_EXTI5_Pin|SPBTLE_RF_IRQ_EXTI6_Pin|ISM43362_DRDY_EXTI1_Pin;
+ GPIO_InitStruct.Mode = GPIO_MODE_IT_RISING;
+ GPIO_InitStruct.Pull = GPIO_NOPULL;
+ HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
+
+ /*Configure GPIO pin : BUTTON_EXTI13_Pin */
+ GPIO_InitStruct.Pin = BUTTON_EXTI13_Pin;
+ GPIO_InitStruct.Mode = GPIO_MODE_IT_FALLING;
+ GPIO_InitStruct.Pull = GPIO_NOPULL;
+ HAL_GPIO_Init(BUTTON_EXTI13_GPIO_Port, &GPIO_InitStruct);
+
+ /*Configure GPIO pins : ARD_A5_Pin ARD_A4_Pin ARD_A3_Pin ARD_A2_Pin
+ ARD_A1_Pin ARD_A0_Pin */
+ GPIO_InitStruct.Pin = ARD_A5_Pin|ARD_A4_Pin|ARD_A3_Pin|ARD_A2_Pin
+ |ARD_A1_Pin|ARD_A0_Pin;
+ GPIO_InitStruct.Mode = GPIO_MODE_ANALOG_ADC_CONTROL;
+ GPIO_InitStruct.Pull = GPIO_NOPULL;
+ HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
+
+ /*Configure GPIO pins : ARD_D1_Pin ARD_D0_Pin */
+ GPIO_InitStruct.Pin = ARD_D1_Pin|ARD_D0_Pin;
+ GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ GPIO_InitStruct.Pull = GPIO_NOPULL;
+ GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+ GPIO_InitStruct.Alternate = GPIO_AF8_UART4;
+ HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+
+ /*Configure GPIO pins : ARD_D10_Pin SPBTLE_RF_RST_Pin ARD_D9_Pin */
+ GPIO_InitStruct.Pin = ARD_D10_Pin|SPBTLE_RF_RST_Pin|ARD_D9_Pin;
+ GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+ GPIO_InitStruct.Pull = GPIO_NOPULL;
+ GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+ HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+
+ /*Configure GPIO pin : ARD_D4_Pin */
+ GPIO_InitStruct.Pin = ARD_D4_Pin;
+ GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ GPIO_InitStruct.Pull = GPIO_NOPULL;
+ GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+ GPIO_InitStruct.Alternate = GPIO_AF1_TIM2;
+ HAL_GPIO_Init(ARD_D4_GPIO_Port, &GPIO_InitStruct);
+
+ /*Configure GPIO pin : ARD_D7_Pin */
+ GPIO_InitStruct.Pin = ARD_D7_Pin;
+ GPIO_InitStruct.Mode = GPIO_MODE_ANALOG_ADC_CONTROL;
+ GPIO_InitStruct.Pull = GPIO_NOPULL;
+ HAL_GPIO_Init(ARD_D7_GPIO_Port, &GPIO_InitStruct);
+
+ /*Configure GPIO pins : ARD_D13_Pin ARD_D12_Pin ARD_D11_Pin */
+ GPIO_InitStruct.Pin = ARD_D13_Pin|ARD_D12_Pin|ARD_D11_Pin;
+ GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ GPIO_InitStruct.Pull = GPIO_NOPULL;
+ GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+ GPIO_InitStruct.Alternate = GPIO_AF5_SPI1;
+ HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+
+ /*Configure GPIO pin : ARD_D3_Pin */
+ GPIO_InitStruct.Pin = ARD_D3_Pin;
+ GPIO_InitStruct.Mode = GPIO_MODE_IT_RISING;
+ GPIO_InitStruct.Pull = GPIO_NOPULL;
+ HAL_GPIO_Init(ARD_D3_GPIO_Port, &GPIO_InitStruct);
+
+ /*Configure GPIO pin : ARD_D6_Pin */
+ GPIO_InitStruct.Pin = ARD_D6_Pin;
+ GPIO_InitStruct.Mode = GPIO_MODE_ANALOG_ADC_CONTROL;
+ GPIO_InitStruct.Pull = GPIO_NOPULL;
+ HAL_GPIO_Init(ARD_D6_GPIO_Port, &GPIO_InitStruct);
+
+ /*Configure GPIO pins : ARD_D8_Pin ISM43362_BOOT0_Pin ISM43362_WAKEUP_Pin LED2_Pin
+ SPSGRF_915_SDN_Pin ARD_D5_Pin SPSGRF_915_SPI3_CSN_Pin */
+ GPIO_InitStruct.Pin = ARD_D8_Pin|ISM43362_BOOT0_Pin|ISM43362_WAKEUP_Pin|LED2_Pin
+ |SPSGRF_915_SDN_Pin|ARD_D5_Pin|SPSGRF_915_SPI3_CSN_Pin;
+ GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+ GPIO_InitStruct.Pull = GPIO_NOPULL;
+ GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+ HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+
+ /*Configure GPIO pins : LPS22HB_INT_DRDY_EXTI0_Pin LSM6DSL_INT1_EXTI11_Pin ARD_D2_Pin HTS221_DRDY_EXTI15_Pin
+ PMOD_IRQ_EXTI12_Pin */
+ GPIO_InitStruct.Pin = LPS22HB_INT_DRDY_EXTI0_Pin|LSM6DSL_INT1_EXTI11_Pin|ARD_D2_Pin|HTS221_DRDY_EXTI15_Pin
+ |PMOD_IRQ_EXTI12_Pin;
+ GPIO_InitStruct.Mode = GPIO_MODE_IT_RISING;
+ GPIO_InitStruct.Pull = GPIO_NOPULL;
+ HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
+
+ /*Configure GPIO pins : USB_OTG_FS_PWR_EN_Pin SPBTLE_RF_SPI3_CSN_Pin PMOD_RESET_Pin STSAFE_A100_RESET_Pin */
+ GPIO_InitStruct.Pin = USB_OTG_FS_PWR_EN_Pin|SPBTLE_RF_SPI3_CSN_Pin|PMOD_RESET_Pin|STSAFE_A100_RESET_Pin;
+ GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+ GPIO_InitStruct.Pull = GPIO_NOPULL;
+ GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+ HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
+
+ /*Configure GPIO pins : VL53L0X_XSHUT_Pin LED3_WIFI__LED4_BLE_Pin */
+ GPIO_InitStruct.Pin = VL53L0X_XSHUT_Pin|LED3_WIFI__LED4_BLE_Pin;
+ GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+ GPIO_InitStruct.Pull = GPIO_NOPULL;
+ GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+ HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
+
+ /*Configure GPIO pins : VL53L0X_GPIO1_EXTI7_Pin LSM3MDL_DRDY_EXTI8_Pin */
+ GPIO_InitStruct.Pin = VL53L0X_GPIO1_EXTI7_Pin|LSM3MDL_DRDY_EXTI8_Pin;
+ GPIO_InitStruct.Mode = GPIO_MODE_IT_RISING;
+ GPIO_InitStruct.Pull = GPIO_NOPULL;
+ HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
+
+ /*Configure GPIO pin : PMOD_SPI2_SCK_Pin */
+ GPIO_InitStruct.Pin = PMOD_SPI2_SCK_Pin;
+ GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ GPIO_InitStruct.Pull = GPIO_NOPULL;
+ GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+ GPIO_InitStruct.Alternate = GPIO_AF5_SPI2;
+ HAL_GPIO_Init(PMOD_SPI2_SCK_GPIO_Port, &GPIO_InitStruct);
+
+ /*Configure GPIO pins : PMOD_UART2_CTS_Pin PMOD_UART2_RTS_Pin PMOD_UART2_TX_Pin PMOD_UART2_RX_Pin */
+ GPIO_InitStruct.Pin = PMOD_UART2_CTS_Pin|PMOD_UART2_RTS_Pin|PMOD_UART2_TX_Pin|PMOD_UART2_RX_Pin;
+ GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ GPIO_InitStruct.Pull = GPIO_NOPULL;
+ GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+ GPIO_InitStruct.Alternate = GPIO_AF7_USART2;
+ HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
+
+ /*Configure GPIO pins : ARD_D15_Pin ARD_D14_Pin */
+ GPIO_InitStruct.Pin = ARD_D15_Pin|ARD_D14_Pin;
+ GPIO_InitStruct.Mode = GPIO_MODE_AF_OD;
+ GPIO_InitStruct.Pull = GPIO_NOPULL;
+ GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+ GPIO_InitStruct.Alternate = GPIO_AF4_I2C1;
+ HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+
+ /* EXTI interrupt init*/
+ HAL_NVIC_SetPriority(EXTI9_5_IRQn, 0, 0);
+ HAL_NVIC_EnableIRQ(EXTI9_5_IRQn);
+
+ HAL_NVIC_SetPriority(EXTI15_10_IRQn, 0, 0);
+ HAL_NVIC_EnableIRQ(EXTI15_10_IRQn);
+
+ /* USER CODE BEGIN MX_GPIO_Init_2 */
+
+ /* USER CODE END MX_GPIO_Init_2 */
+}
+
+/* USER CODE BEGIN 4 */
+
+/* USER CODE END 4 */
+
+/**
+ * @brief This function is executed in case of error occurrence.
+ * @retval None
+ */
+void Error_Handler(void)
+{
+ /* USER CODE BEGIN Error_Handler_Debug */
+ /* User can add his own implementation to report the HAL error return state */
+ __disable_irq();
+ while (1)
+ {
+ }
+ /* USER CODE END Error_Handler_Debug */
+}
+#ifdef USE_FULL_ASSERT
+/**
+ * @brief Reports the name of the source file and the source line number
+ * where the assert_param error has occurred.
+ * @param file: pointer to the source file name
+ * @param line: assert_param error line source number
+ * @retval None
+ */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+ /* USER CODE BEGIN 6 */
+ /* User can add his own implementation to report the file name and line number,
+ ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+ /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */
diff --git a/P3_SETR2/Core/Src/pressure.c b/P3_SETR2/Core/Src/pressure.c
new file mode 100644
index 0000000..c5482fa
--- /dev/null
+++ b/P3_SETR2/Core/Src/pressure.c
@@ -0,0 +1,16 @@
+/*
+ * pressure.c
+ *
+ * Created on: Oct 27, 2025
+ * Author: jomaa
+ */
+
+#include "pressure.h"
+
+void Pressure_Test(void)
+{
+ float press_value = 0;
+ BSP_PSENSOR_Init();
+ press_value = BSP_PSENSOR_ReadPressure();
+ printf("PRESSURE is = %.2f mBar \n", press_value);
+}
diff --git a/P3_SETR2/Core/Src/stm32l4xx_hal_msp.c b/P3_SETR2/Core/Src/stm32l4xx_hal_msp.c
new file mode 100644
index 0000000..fa1266b
--- /dev/null
+++ b/P3_SETR2/Core/Src/stm32l4xx_hal_msp.c
@@ -0,0 +1,627 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file stm32l4xx_hal_msp.c
+ * @brief This file provides code for the MSP Initialization
+ * and de-Initialization codes.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2025 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN Define */
+
+/* USER CODE END Define */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN Macro */
+
+/* USER CODE END Macro */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* External functions --------------------------------------------------------*/
+/* USER CODE BEGIN ExternalFunctions */
+
+/* USER CODE END ExternalFunctions */
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+/**
+ * Initializes the Global MSP.
+ */
+void HAL_MspInit(void)
+{
+
+ /* USER CODE BEGIN MspInit 0 */
+
+ /* USER CODE END MspInit 0 */
+
+ __HAL_RCC_SYSCFG_CLK_ENABLE();
+ __HAL_RCC_PWR_CLK_ENABLE();
+
+ /* System interrupt init*/
+
+ /* USER CODE BEGIN MspInit 1 */
+
+ /* USER CODE END MspInit 1 */
+}
+
+static uint32_t DFSDM1_Init = 0;
+/**
+ * @brief DFSDM_Channel MSP Initialization
+ * This function configures the hardware resources used in this example
+ * @param hdfsdm_channel: DFSDM_Channel handle pointer
+ * @retval None
+ */
+void HAL_DFSDM_ChannelMspInit(DFSDM_Channel_HandleTypeDef* hdfsdm_channel)
+{
+ GPIO_InitTypeDef GPIO_InitStruct = {0};
+ RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
+ if(DFSDM1_Init == 0)
+ {
+ /* USER CODE BEGIN DFSDM1_MspInit 0 */
+
+ /* USER CODE END DFSDM1_MspInit 0 */
+
+ /** Initializes the peripherals clock
+ */
+ PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_DFSDM1;
+ PeriphClkInit.Dfsdm1ClockSelection = RCC_DFSDM1CLKSOURCE_PCLK;
+ if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
+ {
+ Error_Handler();
+ }
+
+ /* Peripheral clock enable */
+ __HAL_RCC_DFSDM1_CLK_ENABLE();
+
+ __HAL_RCC_GPIOE_CLK_ENABLE();
+ /**DFSDM1 GPIO Configuration
+ PE7 ------> DFSDM1_DATIN2
+ PE9 ------> DFSDM1_CKOUT
+ */
+ GPIO_InitStruct.Pin = DFSDM1_DATIN2_Pin|DFSDM1_CKOUT_Pin;
+ GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ GPIO_InitStruct.Pull = GPIO_NOPULL;
+ GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+ GPIO_InitStruct.Alternate = GPIO_AF6_DFSDM1;
+ HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
+
+ /* USER CODE BEGIN DFSDM1_MspInit 1 */
+
+ /* USER CODE END DFSDM1_MspInit 1 */
+
+ DFSDM1_Init++;
+ }
+
+}
+
+/**
+ * @brief DFSDM_Channel MSP De-Initialization
+ * This function freeze the hardware resources used in this example
+ * @param hdfsdm_channel: DFSDM_Channel handle pointer
+ * @retval None
+ */
+void HAL_DFSDM_ChannelMspDeInit(DFSDM_Channel_HandleTypeDef* hdfsdm_channel)
+{
+ DFSDM1_Init-- ;
+ if(DFSDM1_Init == 0)
+ {
+ /* USER CODE BEGIN DFSDM1_MspDeInit 0 */
+
+ /* USER CODE END DFSDM1_MspDeInit 0 */
+ /* Peripheral clock disable */
+ __HAL_RCC_DFSDM1_CLK_DISABLE();
+
+ /**DFSDM1 GPIO Configuration
+ PE7 ------> DFSDM1_DATIN2
+ PE9 ------> DFSDM1_CKOUT
+ */
+ HAL_GPIO_DeInit(GPIOE, DFSDM1_DATIN2_Pin|DFSDM1_CKOUT_Pin);
+
+ /* USER CODE BEGIN DFSDM1_MspDeInit 1 */
+
+ /* USER CODE END DFSDM1_MspDeInit 1 */
+ }
+
+}
+
+/**
+ * @brief I2C MSP Initialization
+ * This function configures the hardware resources used in this example
+ * @param hi2c: I2C handle pointer
+ * @retval None
+ */
+void HAL_I2C_MspInit(I2C_HandleTypeDef* hi2c)
+{
+ GPIO_InitTypeDef GPIO_InitStruct = {0};
+ RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
+ if(hi2c->Instance==I2C2)
+ {
+ /* USER CODE BEGIN I2C2_MspInit 0 */
+
+ /* USER CODE END I2C2_MspInit 0 */
+
+ /** Initializes the peripherals clock
+ */
+ PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_I2C2;
+ PeriphClkInit.I2c2ClockSelection = RCC_I2C2CLKSOURCE_PCLK1;
+ if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
+ {
+ Error_Handler();
+ }
+
+ __HAL_RCC_GPIOB_CLK_ENABLE();
+ /**I2C2 GPIO Configuration
+ PB10 ------> I2C2_SCL
+ PB11 ------> I2C2_SDA
+ */
+ GPIO_InitStruct.Pin = INTERNAL_I2C2_SCL_Pin|INTERNAL_I2C2_SDA_Pin;
+ GPIO_InitStruct.Mode = GPIO_MODE_AF_OD;
+ GPIO_InitStruct.Pull = GPIO_PULLUP;
+ GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+ GPIO_InitStruct.Alternate = GPIO_AF4_I2C2;
+ HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+
+ /* Peripheral clock enable */
+ __HAL_RCC_I2C2_CLK_ENABLE();
+ /* USER CODE BEGIN I2C2_MspInit 1 */
+
+ /* USER CODE END I2C2_MspInit 1 */
+
+ }
+
+}
+
+/**
+ * @brief I2C MSP De-Initialization
+ * This function freeze the hardware resources used in this example
+ * @param hi2c: I2C handle pointer
+ * @retval None
+ */
+void HAL_I2C_MspDeInit(I2C_HandleTypeDef* hi2c)
+{
+ if(hi2c->Instance==I2C2)
+ {
+ /* USER CODE BEGIN I2C2_MspDeInit 0 */
+
+ /* USER CODE END I2C2_MspDeInit 0 */
+ /* Peripheral clock disable */
+ __HAL_RCC_I2C2_CLK_DISABLE();
+
+ /**I2C2 GPIO Configuration
+ PB10 ------> I2C2_SCL
+ PB11 ------> I2C2_SDA
+ */
+ HAL_GPIO_DeInit(INTERNAL_I2C2_SCL_GPIO_Port, INTERNAL_I2C2_SCL_Pin);
+
+ HAL_GPIO_DeInit(INTERNAL_I2C2_SDA_GPIO_Port, INTERNAL_I2C2_SDA_Pin);
+
+ /* USER CODE BEGIN I2C2_MspDeInit 1 */
+
+ /* USER CODE END I2C2_MspDeInit 1 */
+ }
+
+}
+
+/**
+ * @brief QSPI MSP Initialization
+ * This function configures the hardware resources used in this example
+ * @param hqspi: QSPI handle pointer
+ * @retval None
+ */
+void HAL_QSPI_MspInit(QSPI_HandleTypeDef* hqspi)
+{
+ GPIO_InitTypeDef GPIO_InitStruct = {0};
+ if(hqspi->Instance==QUADSPI)
+ {
+ /* USER CODE BEGIN QUADSPI_MspInit 0 */
+
+ /* USER CODE END QUADSPI_MspInit 0 */
+ /* Peripheral clock enable */
+ __HAL_RCC_QSPI_CLK_ENABLE();
+
+ __HAL_RCC_GPIOE_CLK_ENABLE();
+ /**QUADSPI GPIO Configuration
+ PE10 ------> QUADSPI_CLK
+ PE11 ------> QUADSPI_NCS
+ PE12 ------> QUADSPI_BK1_IO0
+ PE13 ------> QUADSPI_BK1_IO1
+ PE14 ------> QUADSPI_BK1_IO2
+ PE15 ------> QUADSPI_BK1_IO3
+ */
+ GPIO_InitStruct.Pin = QUADSPI_CLK_Pin|QUADSPI_NCS_Pin|OQUADSPI_BK1_IO0_Pin|QUADSPI_BK1_IO1_Pin
+ |QUAD_SPI_BK1_IO2_Pin|QUAD_SPI_BK1_IO3_Pin;
+ GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ GPIO_InitStruct.Pull = GPIO_NOPULL;
+ GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+ GPIO_InitStruct.Alternate = GPIO_AF10_QUADSPI;
+ HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
+
+ /* USER CODE BEGIN QUADSPI_MspInit 1 */
+
+ /* USER CODE END QUADSPI_MspInit 1 */
+
+ }
+
+}
+
+/**
+ * @brief QSPI MSP De-Initialization
+ * This function freeze the hardware resources used in this example
+ * @param hqspi: QSPI handle pointer
+ * @retval None
+ */
+void HAL_QSPI_MspDeInit(QSPI_HandleTypeDef* hqspi)
+{
+ if(hqspi->Instance==QUADSPI)
+ {
+ /* USER CODE BEGIN QUADSPI_MspDeInit 0 */
+
+ /* USER CODE END QUADSPI_MspDeInit 0 */
+ /* Peripheral clock disable */
+ __HAL_RCC_QSPI_CLK_DISABLE();
+
+ /**QUADSPI GPIO Configuration
+ PE10 ------> QUADSPI_CLK
+ PE11 ------> QUADSPI_NCS
+ PE12 ------> QUADSPI_BK1_IO0
+ PE13 ------> QUADSPI_BK1_IO1
+ PE14 ------> QUADSPI_BK1_IO2
+ PE15 ------> QUADSPI_BK1_IO3
+ */
+ HAL_GPIO_DeInit(GPIOE, QUADSPI_CLK_Pin|QUADSPI_NCS_Pin|OQUADSPI_BK1_IO0_Pin|QUADSPI_BK1_IO1_Pin
+ |QUAD_SPI_BK1_IO2_Pin|QUAD_SPI_BK1_IO3_Pin);
+
+ /* USER CODE BEGIN QUADSPI_MspDeInit 1 */
+
+ /* USER CODE END QUADSPI_MspDeInit 1 */
+ }
+
+}
+
+/**
+ * @brief SPI MSP Initialization
+ * This function configures the hardware resources used in this example
+ * @param hspi: SPI handle pointer
+ * @retval None
+ */
+void HAL_SPI_MspInit(SPI_HandleTypeDef* hspi)
+{
+ GPIO_InitTypeDef GPIO_InitStruct = {0};
+ if(hspi->Instance==SPI3)
+ {
+ /* USER CODE BEGIN SPI3_MspInit 0 */
+
+ /* USER CODE END SPI3_MspInit 0 */
+ /* Peripheral clock enable */
+ __HAL_RCC_SPI3_CLK_ENABLE();
+
+ __HAL_RCC_GPIOC_CLK_ENABLE();
+ /**SPI3 GPIO Configuration
+ PC10 ------> SPI3_SCK
+ PC11 ------> SPI3_MISO
+ PC12 ------> SPI3_MOSI
+ */
+ GPIO_InitStruct.Pin = INTERNAL_SPI3_SCK_Pin|INTERNAL_SPI3_MISO_Pin|INTERNAL_SPI3_MOSI_Pin;
+ GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ GPIO_InitStruct.Pull = GPIO_NOPULL;
+ GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+ GPIO_InitStruct.Alternate = GPIO_AF6_SPI3;
+ HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
+
+ /* USER CODE BEGIN SPI3_MspInit 1 */
+
+ /* USER CODE END SPI3_MspInit 1 */
+
+ }
+
+}
+
+/**
+ * @brief SPI MSP De-Initialization
+ * This function freeze the hardware resources used in this example
+ * @param hspi: SPI handle pointer
+ * @retval None
+ */
+void HAL_SPI_MspDeInit(SPI_HandleTypeDef* hspi)
+{
+ if(hspi->Instance==SPI3)
+ {
+ /* USER CODE BEGIN SPI3_MspDeInit 0 */
+
+ /* USER CODE END SPI3_MspDeInit 0 */
+ /* Peripheral clock disable */
+ __HAL_RCC_SPI3_CLK_DISABLE();
+
+ /**SPI3 GPIO Configuration
+ PC10 ------> SPI3_SCK
+ PC11 ------> SPI3_MISO
+ PC12 ------> SPI3_MOSI
+ */
+ HAL_GPIO_DeInit(GPIOC, INTERNAL_SPI3_SCK_Pin|INTERNAL_SPI3_MISO_Pin|INTERNAL_SPI3_MOSI_Pin);
+
+ /* USER CODE BEGIN SPI3_MspDeInit 1 */
+
+ /* USER CODE END SPI3_MspDeInit 1 */
+ }
+
+}
+
+/**
+ * @brief UART MSP Initialization
+ * This function configures the hardware resources used in this example
+ * @param huart: UART handle pointer
+ * @retval None
+ */
+void HAL_UART_MspInit(UART_HandleTypeDef* huart)
+{
+ GPIO_InitTypeDef GPIO_InitStruct = {0};
+ RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
+ if(huart->Instance==USART1)
+ {
+ /* USER CODE BEGIN USART1_MspInit 0 */
+
+ /* USER CODE END USART1_MspInit 0 */
+
+ /** Initializes the peripherals clock
+ */
+ PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART1;
+ PeriphClkInit.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2;
+ if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
+ {
+ Error_Handler();
+ }
+
+ /* Peripheral clock enable */
+ __HAL_RCC_USART1_CLK_ENABLE();
+
+ __HAL_RCC_GPIOB_CLK_ENABLE();
+ /**USART1 GPIO Configuration
+ PB6 ------> USART1_TX
+ PB7 ------> USART1_RX
+ */
+ GPIO_InitStruct.Pin = ST_LINK_UART1_TX_Pin|ST_LINK_UART1_RX_Pin;
+ GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ GPIO_InitStruct.Pull = GPIO_NOPULL;
+ GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+ GPIO_InitStruct.Alternate = GPIO_AF7_USART1;
+ HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+
+ /* USER CODE BEGIN USART1_MspInit 1 */
+
+ /* USER CODE END USART1_MspInit 1 */
+ }
+ else if(huart->Instance==USART3)
+ {
+ /* USER CODE BEGIN USART3_MspInit 0 */
+
+ /* USER CODE END USART3_MspInit 0 */
+
+ /** Initializes the peripherals clock
+ */
+ PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART3;
+ PeriphClkInit.Usart3ClockSelection = RCC_USART3CLKSOURCE_PCLK1;
+ if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
+ {
+ Error_Handler();
+ }
+
+ /* Peripheral clock enable */
+ __HAL_RCC_USART3_CLK_ENABLE();
+
+ __HAL_RCC_GPIOD_CLK_ENABLE();
+ /**USART3 GPIO Configuration
+ PD8 ------> USART3_TX
+ PD9 ------> USART3_RX
+ */
+ GPIO_InitStruct.Pin = INTERNAL_UART3_TX_Pin|INTERNAL_UART3_RX_Pin;
+ GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ GPIO_InitStruct.Pull = GPIO_NOPULL;
+ GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+ GPIO_InitStruct.Alternate = GPIO_AF7_USART3;
+ HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
+
+ /* USER CODE BEGIN USART3_MspInit 1 */
+
+ /* USER CODE END USART3_MspInit 1 */
+ }
+
+}
+
+/**
+ * @brief UART MSP De-Initialization
+ * This function freeze the hardware resources used in this example
+ * @param huart: UART handle pointer
+ * @retval None
+ */
+void HAL_UART_MspDeInit(UART_HandleTypeDef* huart)
+{
+ if(huart->Instance==USART1)
+ {
+ /* USER CODE BEGIN USART1_MspDeInit 0 */
+
+ /* USER CODE END USART1_MspDeInit 0 */
+ /* Peripheral clock disable */
+ __HAL_RCC_USART1_CLK_DISABLE();
+
+ /**USART1 GPIO Configuration
+ PB6 ------> USART1_TX
+ PB7 ------> USART1_RX
+ */
+ HAL_GPIO_DeInit(GPIOB, ST_LINK_UART1_TX_Pin|ST_LINK_UART1_RX_Pin);
+
+ /* USER CODE BEGIN USART1_MspDeInit 1 */
+
+ /* USER CODE END USART1_MspDeInit 1 */
+ }
+ else if(huart->Instance==USART3)
+ {
+ /* USER CODE BEGIN USART3_MspDeInit 0 */
+
+ /* USER CODE END USART3_MspDeInit 0 */
+ /* Peripheral clock disable */
+ __HAL_RCC_USART3_CLK_DISABLE();
+
+ /**USART3 GPIO Configuration
+ PD8 ------> USART3_TX
+ PD9 ------> USART3_RX
+ */
+ HAL_GPIO_DeInit(GPIOD, INTERNAL_UART3_TX_Pin|INTERNAL_UART3_RX_Pin);
+
+ /* USER CODE BEGIN USART3_MspDeInit 1 */
+
+ /* USER CODE END USART3_MspDeInit 1 */
+ }
+
+}
+
+/**
+ * @brief PCD MSP Initialization
+ * This function configures the hardware resources used in this example
+ * @param hpcd: PCD handle pointer
+ * @retval None
+ */
+void HAL_PCD_MspInit(PCD_HandleTypeDef* hpcd)
+{
+ GPIO_InitTypeDef GPIO_InitStruct = {0};
+ RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
+ if(hpcd->Instance==USB_OTG_FS)
+ {
+ /* USER CODE BEGIN USB_OTG_FS_MspInit 0 */
+
+ /* USER CODE END USB_OTG_FS_MspInit 0 */
+
+ /** Initializes the peripherals clock
+ */
+ PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USB;
+ PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLLSAI1;
+ PeriphClkInit.PLLSAI1.PLLSAI1Source = RCC_PLLSOURCE_MSI;
+ PeriphClkInit.PLLSAI1.PLLSAI1M = 1;
+ PeriphClkInit.PLLSAI1.PLLSAI1N = 24;
+ PeriphClkInit.PLLSAI1.PLLSAI1P = RCC_PLLP_DIV7;
+ PeriphClkInit.PLLSAI1.PLLSAI1Q = RCC_PLLQ_DIV2;
+ PeriphClkInit.PLLSAI1.PLLSAI1R = RCC_PLLR_DIV2;
+ PeriphClkInit.PLLSAI1.PLLSAI1ClockOut = RCC_PLLSAI1_48M2CLK;
+ if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
+ {
+ Error_Handler();
+ }
+
+ __HAL_RCC_GPIOA_CLK_ENABLE();
+ /**USB_OTG_FS GPIO Configuration
+ PA9 ------> USB_OTG_FS_VBUS
+ PA10 ------> USB_OTG_FS_ID
+ PA11 ------> USB_OTG_FS_DM
+ PA12 ------> USB_OTG_FS_DP
+ */
+ GPIO_InitStruct.Pin = USB_OTG_FS_VBUS_Pin;
+ GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
+ GPIO_InitStruct.Pull = GPIO_NOPULL;
+ HAL_GPIO_Init(USB_OTG_FS_VBUS_GPIO_Port, &GPIO_InitStruct);
+
+ GPIO_InitStruct.Pin = USB_OTG_FS_ID_Pin|USB_OTG_FS_DM_Pin|USB_OTG_FS_DP_Pin;
+ GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ GPIO_InitStruct.Pull = GPIO_NOPULL;
+ GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+ GPIO_InitStruct.Alternate = GPIO_AF10_OTG_FS;
+ HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+
+ /* Peripheral clock enable */
+ __HAL_RCC_USB_OTG_FS_CLK_ENABLE();
+
+ /* Enable VDDUSB */
+ if(__HAL_RCC_PWR_IS_CLK_DISABLED())
+ {
+ __HAL_RCC_PWR_CLK_ENABLE();
+ HAL_PWREx_EnableVddUSB();
+ __HAL_RCC_PWR_CLK_DISABLE();
+ }
+ else
+ {
+ HAL_PWREx_EnableVddUSB();
+ }
+ /* USER CODE BEGIN USB_OTG_FS_MspInit 1 */
+
+ /* USER CODE END USB_OTG_FS_MspInit 1 */
+
+ }
+
+}
+
+/**
+ * @brief PCD MSP De-Initialization
+ * This function freeze the hardware resources used in this example
+ * @param hpcd: PCD handle pointer
+ * @retval None
+ */
+void HAL_PCD_MspDeInit(PCD_HandleTypeDef* hpcd)
+{
+ if(hpcd->Instance==USB_OTG_FS)
+ {
+ /* USER CODE BEGIN USB_OTG_FS_MspDeInit 0 */
+
+ /* USER CODE END USB_OTG_FS_MspDeInit 0 */
+ /* Peripheral clock disable */
+ __HAL_RCC_USB_OTG_FS_CLK_DISABLE();
+
+ /**USB_OTG_FS GPIO Configuration
+ PA9 ------> USB_OTG_FS_VBUS
+ PA10 ------> USB_OTG_FS_ID
+ PA11 ------> USB_OTG_FS_DM
+ PA12 ------> USB_OTG_FS_DP
+ */
+ HAL_GPIO_DeInit(GPIOA, USB_OTG_FS_VBUS_Pin|USB_OTG_FS_ID_Pin|USB_OTG_FS_DM_Pin|USB_OTG_FS_DP_Pin);
+
+ /* Disable VDDUSB */
+ if(__HAL_RCC_PWR_IS_CLK_DISABLED())
+ {
+ __HAL_RCC_PWR_CLK_ENABLE();
+ HAL_PWREx_DisableVddUSB();
+ __HAL_RCC_PWR_CLK_DISABLE();
+ }
+ else
+ {
+ HAL_PWREx_DisableVddUSB();
+ }
+ /* USER CODE BEGIN USB_OTG_FS_MspDeInit 1 */
+
+ /* USER CODE END USB_OTG_FS_MspDeInit 1 */
+ }
+
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/P3_SETR2/Core/Src/stm32l4xx_it.c b/P3_SETR2/Core/Src/stm32l4xx_it.c
new file mode 100644
index 0000000..8856471
--- /dev/null
+++ b/P3_SETR2/Core/Src/stm32l4xx_it.c
@@ -0,0 +1,238 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file stm32l4xx_it.c
+ * @brief Interrupt Service Routines.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2025 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "stm32l4xx_it.h"
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/* External variables --------------------------------------------------------*/
+
+/* USER CODE BEGIN EV */
+
+/* USER CODE END EV */
+
+/******************************************************************************/
+/* Cortex-M4 Processor Interruption and Exception Handlers */
+/******************************************************************************/
+/**
+ * @brief This function handles Non maskable interrupt.
+ */
+void NMI_Handler(void)
+{
+ /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
+
+ /* USER CODE END NonMaskableInt_IRQn 0 */
+ /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
+ while (1)
+ {
+ }
+ /* USER CODE END NonMaskableInt_IRQn 1 */
+}
+
+/**
+ * @brief This function handles Hard fault interrupt.
+ */
+void HardFault_Handler(void)
+{
+ /* USER CODE BEGIN HardFault_IRQn 0 */
+
+ /* USER CODE END HardFault_IRQn 0 */
+ while (1)
+ {
+ /* USER CODE BEGIN W1_HardFault_IRQn 0 */
+ /* USER CODE END W1_HardFault_IRQn 0 */
+ }
+}
+
+/**
+ * @brief This function handles Memory management fault.
+ */
+void MemManage_Handler(void)
+{
+ /* USER CODE BEGIN MemoryManagement_IRQn 0 */
+
+ /* USER CODE END MemoryManagement_IRQn 0 */
+ while (1)
+ {
+ /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
+ /* USER CODE END W1_MemoryManagement_IRQn 0 */
+ }
+}
+
+/**
+ * @brief This function handles Prefetch fault, memory access fault.
+ */
+void BusFault_Handler(void)
+{
+ /* USER CODE BEGIN BusFault_IRQn 0 */
+
+ /* USER CODE END BusFault_IRQn 0 */
+ while (1)
+ {
+ /* USER CODE BEGIN W1_BusFault_IRQn 0 */
+ /* USER CODE END W1_BusFault_IRQn 0 */
+ }
+}
+
+/**
+ * @brief This function handles Undefined instruction or illegal state.
+ */
+void UsageFault_Handler(void)
+{
+ /* USER CODE BEGIN UsageFault_IRQn 0 */
+
+ /* USER CODE END UsageFault_IRQn 0 */
+ while (1)
+ {
+ /* USER CODE BEGIN W1_UsageFault_IRQn 0 */
+ /* USER CODE END W1_UsageFault_IRQn 0 */
+ }
+}
+
+/**
+ * @brief This function handles System service call via SWI instruction.
+ */
+void SVC_Handler(void)
+{
+ /* USER CODE BEGIN SVCall_IRQn 0 */
+
+ /* USER CODE END SVCall_IRQn 0 */
+ /* USER CODE BEGIN SVCall_IRQn 1 */
+
+ /* USER CODE END SVCall_IRQn 1 */
+}
+
+/**
+ * @brief This function handles Debug monitor.
+ */
+void DebugMon_Handler(void)
+{
+ /* USER CODE BEGIN DebugMonitor_IRQn 0 */
+
+ /* USER CODE END DebugMonitor_IRQn 0 */
+ /* USER CODE BEGIN DebugMonitor_IRQn 1 */
+
+ /* USER CODE END DebugMonitor_IRQn 1 */
+}
+
+/**
+ * @brief This function handles Pendable request for system service.
+ */
+void PendSV_Handler(void)
+{
+ /* USER CODE BEGIN PendSV_IRQn 0 */
+
+ /* USER CODE END PendSV_IRQn 0 */
+ /* USER CODE BEGIN PendSV_IRQn 1 */
+
+ /* USER CODE END PendSV_IRQn 1 */
+}
+
+/**
+ * @brief This function handles System tick timer.
+ */
+void SysTick_Handler(void)
+{
+ /* USER CODE BEGIN SysTick_IRQn 0 */
+
+ /* USER CODE END SysTick_IRQn 0 */
+ HAL_IncTick();
+ /* USER CODE BEGIN SysTick_IRQn 1 */
+
+ /* USER CODE END SysTick_IRQn 1 */
+}
+
+/******************************************************************************/
+/* STM32L4xx Peripheral Interrupt Handlers */
+/* Add here the Interrupt Handlers for the used peripherals. */
+/* For the available peripheral interrupt handler names, */
+/* please refer to the startup file (startup_stm32l4xx.s). */
+/******************************************************************************/
+
+/**
+ * @brief This function handles EXTI line[9:5] interrupts.
+ */
+void EXTI9_5_IRQHandler(void)
+{
+ /* USER CODE BEGIN EXTI9_5_IRQn 0 */
+
+ /* USER CODE END EXTI9_5_IRQn 0 */
+ HAL_GPIO_EXTI_IRQHandler(SPSGRF_915_GPIO3_EXTI5_Pin);
+ HAL_GPIO_EXTI_IRQHandler(SPBTLE_RF_IRQ_EXTI6_Pin);
+ HAL_GPIO_EXTI_IRQHandler(VL53L0X_GPIO1_EXTI7_Pin);
+ HAL_GPIO_EXTI_IRQHandler(LSM3MDL_DRDY_EXTI8_Pin);
+ /* USER CODE BEGIN EXTI9_5_IRQn 1 */
+
+ /* USER CODE END EXTI9_5_IRQn 1 */
+}
+
+/**
+ * @brief This function handles EXTI line[15:10] interrupts.
+ */
+void EXTI15_10_IRQHandler(void)
+{
+ /* USER CODE BEGIN EXTI15_10_IRQn 0 */
+
+ /* USER CODE END EXTI15_10_IRQn 0 */
+ HAL_GPIO_EXTI_IRQHandler(LPS22HB_INT_DRDY_EXTI0_Pin);
+ HAL_GPIO_EXTI_IRQHandler(LSM6DSL_INT1_EXTI11_Pin);
+ HAL_GPIO_EXTI_IRQHandler(BUTTON_EXTI13_Pin);
+ HAL_GPIO_EXTI_IRQHandler(ARD_D2_Pin);
+ HAL_GPIO_EXTI_IRQHandler(HTS221_DRDY_EXTI15_Pin);
+ /* USER CODE BEGIN EXTI15_10_IRQn 1 */
+
+ /* USER CODE END EXTI15_10_IRQn 1 */
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
diff --git a/P3_SETR2/Core/Src/syscalls.c b/P3_SETR2/Core/Src/syscalls.c
new file mode 100644
index 0000000..8884b5a
--- /dev/null
+++ b/P3_SETR2/Core/Src/syscalls.c
@@ -0,0 +1,176 @@
+/**
+ ******************************************************************************
+ * @file syscalls.c
+ * @author Auto-generated by STM32CubeIDE
+ * @brief STM32CubeIDE Minimal System calls file
+ *
+ * For more information about which c-functions
+ * need which of these lowlevel functions
+ * please consult the Newlib libc-manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2020-2025 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+
+/* Variables */
+extern int __io_putchar(int ch) __attribute__((weak));
+extern int __io_getchar(void) __attribute__((weak));
+
+
+char *__env[1] = { 0 };
+char **environ = __env;
+
+
+/* Functions */
+void initialise_monitor_handles()
+{
+}
+
+int _getpid(void)
+{
+ return 1;
+}
+
+int _kill(int pid, int sig)
+{
+ (void)pid;
+ (void)sig;
+ errno = EINVAL;
+ return -1;
+}
+
+void _exit (int status)
+{
+ _kill(status, -1);
+ while (1) {} /* Make sure we hang here */
+}
+
+__attribute__((weak)) int _read(int file, char *ptr, int len)
+{
+ (void)file;
+ int DataIdx;
+
+ for (DataIdx = 0; DataIdx < len; DataIdx++)
+ {
+ *ptr++ = __io_getchar();
+ }
+
+ return len;
+}
+
+__attribute__((weak)) int _write(int file, char *ptr, int len)
+{
+ (void)file;
+ int DataIdx;
+
+ for (DataIdx = 0; DataIdx < len; DataIdx++)
+ {
+ __io_putchar(*ptr++);
+ }
+ return len;
+}
+
+int _close(int file)
+{
+ (void)file;
+ return -1;
+}
+
+
+int _fstat(int file, struct stat *st)
+{
+ (void)file;
+ st->st_mode = S_IFCHR;
+ return 0;
+}
+
+int _isatty(int file)
+{
+ (void)file;
+ return 1;
+}
+
+int _lseek(int file, int ptr, int dir)
+{
+ (void)file;
+ (void)ptr;
+ (void)dir;
+ return 0;
+}
+
+int _open(char *path, int flags, ...)
+{
+ (void)path;
+ (void)flags;
+ /* Pretend like we always fail */
+ return -1;
+}
+
+int _wait(int *status)
+{
+ (void)status;
+ errno = ECHILD;
+ return -1;
+}
+
+int _unlink(char *name)
+{
+ (void)name;
+ errno = ENOENT;
+ return -1;
+}
+
+int _times(struct tms *buf)
+{
+ (void)buf;
+ return -1;
+}
+
+int _stat(char *file, struct stat *st)
+{
+ (void)file;
+ st->st_mode = S_IFCHR;
+ return 0;
+}
+
+int _link(char *old, char *new)
+{
+ (void)old;
+ (void)new;
+ errno = EMLINK;
+ return -1;
+}
+
+int _fork(void)
+{
+ errno = EAGAIN;
+ return -1;
+}
+
+int _execve(char *name, char **argv, char **env)
+{
+ (void)name;
+ (void)argv;
+ (void)env;
+ errno = ENOMEM;
+ return -1;
+}
diff --git a/P3_SETR2/Core/Src/sysmem.c b/P3_SETR2/Core/Src/sysmem.c
new file mode 100644
index 0000000..5d9f7e6
--- /dev/null
+++ b/P3_SETR2/Core/Src/sysmem.c
@@ -0,0 +1,79 @@
+/**
+ ******************************************************************************
+ * @file sysmem.c
+ * @author Generated by STM32CubeIDE
+ * @brief STM32CubeIDE System Memory calls file
+ *
+ * For more information about which C functions
+ * need which of these lowlevel functions
+ * please consult the newlib libc manual
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2025 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Includes */
+#include
+#include
+
+/**
+ * Pointer to the current high watermark of the heap usage
+ */
+static uint8_t *__sbrk_heap_end = NULL;
+
+/**
+ * @brief _sbrk() allocates memory to the newlib heap and is used by malloc
+ * and others from the C library
+ *
+ * @verbatim
+ * ############################################################################
+ * # .data # .bss # newlib heap # MSP stack #
+ * # # # # Reserved by _Min_Stack_Size #
+ * ############################################################################
+ * ^-- RAM start ^-- _end _estack, RAM end --^
+ * @endverbatim
+ *
+ * This implementation starts allocating at the '_end' linker symbol
+ * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
+ * The implementation considers '_estack' linker symbol to be RAM end
+ * NOTE: If the MSP stack, at any point during execution, grows larger than the
+ * reserved size, please increase the '_Min_Stack_Size'.
+ *
+ * @param incr Memory size
+ * @return Pointer to allocated memory
+ */
+void *_sbrk(ptrdiff_t incr)
+{
+ extern uint8_t _end; /* Symbol defined in the linker script */
+ extern uint8_t _estack; /* Symbol defined in the linker script */
+ extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
+ const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
+ const uint8_t *max_heap = (uint8_t *)stack_limit;
+ uint8_t *prev_heap_end;
+
+ /* Initialize heap end at first call */
+ if (NULL == __sbrk_heap_end)
+ {
+ __sbrk_heap_end = &_end;
+ }
+
+ /* Protect heap from growing into the reserved MSP stack */
+ if (__sbrk_heap_end + incr > max_heap)
+ {
+ errno = ENOMEM;
+ return (void *)-1;
+ }
+
+ prev_heap_end = __sbrk_heap_end;
+ __sbrk_heap_end += incr;
+
+ return (void *)prev_heap_end;
+}
diff --git a/P3_SETR2/Core/Src/system_stm32l4xx.c b/P3_SETR2/Core/Src/system_stm32l4xx.c
new file mode 100644
index 0000000..be9cfee
--- /dev/null
+++ b/P3_SETR2/Core/Src/system_stm32l4xx.c
@@ -0,0 +1,332 @@
+/**
+ ******************************************************************************
+ * @file system_stm32l4xx.c
+ * @author MCD Application Team
+ * @brief CMSIS Cortex-M4 Device Peripheral Access Layer System Source File
+ *
+ * This file provides two functions and one global variable to be called from
+ * user application:
+ * - SystemInit(): This function is called at startup just after reset and
+ * before branch to main program. This call is made inside
+ * the "startup_stm32l4xx.s" file.
+ *
+ * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+ * by the user application to setup the SysTick
+ * timer or configure other parameters.
+ *
+ * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+ * be called whenever the core clock is changed
+ * during program execution.
+ *
+ * After each device reset the MSI (4 MHz) is used as system clock source.
+ * Then SystemInit() function is called, in "startup_stm32l4xx.s" file, to
+ * configure the system clock before to branch to main program.
+ *
+ * This file configures the system clock as follows:
+ *=============================================================================
+ *-----------------------------------------------------------------------------
+ * System Clock source | MSI
+ *-----------------------------------------------------------------------------
+ * SYSCLK(Hz) | 4000000
+ *-----------------------------------------------------------------------------
+ * HCLK(Hz) | 4000000
+ *-----------------------------------------------------------------------------
+ * AHB Prescaler | 1
+ *-----------------------------------------------------------------------------
+ * APB1 Prescaler | 1
+ *-----------------------------------------------------------------------------
+ * APB2 Prescaler | 1
+ *-----------------------------------------------------------------------------
+ * PLL_M | 1
+ *-----------------------------------------------------------------------------
+ * PLL_N | 8
+ *-----------------------------------------------------------------------------
+ * PLL_P | 7
+ *-----------------------------------------------------------------------------
+ * PLL_Q | 2
+ *-----------------------------------------------------------------------------
+ * PLL_R | 2
+ *-----------------------------------------------------------------------------
+ * PLLSAI1_P | NA
+ *-----------------------------------------------------------------------------
+ * PLLSAI1_Q | NA
+ *-----------------------------------------------------------------------------
+ * PLLSAI1_R | NA
+ *-----------------------------------------------------------------------------
+ * PLLSAI2_P | NA
+ *-----------------------------------------------------------------------------
+ * PLLSAI2_Q | NA
+ *-----------------------------------------------------------------------------
+ * PLLSAI2_R | NA
+ *-----------------------------------------------------------------------------
+ * Require 48MHz for USB OTG FS, | Disabled
+ * SDIO and RNG clock |
+ *-----------------------------------------------------------------------------
+ *=============================================================================
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2017 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/** @addtogroup CMSIS
+ * @{
+ */
+
+/** @addtogroup stm32l4xx_system
+ * @{
+ */
+
+/** @addtogroup STM32L4xx_System_Private_Includes
+ * @{
+ */
+
+#include "stm32l4xx.h"
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32L4xx_System_Private_TypesDefinitions
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32L4xx_System_Private_Defines
+ * @{
+ */
+
+#if !defined (HSE_VALUE)
+ #define HSE_VALUE 8000000U /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined (MSI_VALUE)
+ #define MSI_VALUE 4000000U /*!< Value of the Internal oscillator in Hz*/
+#endif /* MSI_VALUE */
+
+#if !defined (HSI_VALUE)
+ #define HSI_VALUE 16000000U /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/* Note: Following vector table addresses must be defined in line with linker
+ configuration. */
+/*!< Uncomment the following line if you need to relocate the vector table
+ anywhere in Flash or Sram, else the vector table is kept at the automatic
+ remap of boot address selected */
+/* #define USER_VECT_TAB_ADDRESS */
+
+#if defined(USER_VECT_TAB_ADDRESS)
+/*!< Uncomment the following line if you need to relocate your vector Table
+ in Sram else user remap will be done in Flash. */
+/* #define VECT_TAB_SRAM */
+
+#if defined(VECT_TAB_SRAM)
+#define VECT_TAB_BASE_ADDRESS SRAM1_BASE /*!< Vector Table base address field.
+ This value must be a multiple of 0x200. */
+#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field.
+ This value must be a multiple of 0x200. */
+#else
+#define VECT_TAB_BASE_ADDRESS FLASH_BASE /*!< Vector Table base address field.
+ This value must be a multiple of 0x200. */
+#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field.
+ This value must be a multiple of 0x200. */
+#endif /* VECT_TAB_SRAM */
+#endif /* USER_VECT_TAB_ADDRESS */
+
+/******************************************************************************/
+/**
+ * @}
+ */
+
+/** @addtogroup STM32L4xx_System_Private_Macros
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32L4xx_System_Private_Variables
+ * @{
+ */
+ /* The SystemCoreClock variable is updated in three ways:
+ 1) by calling CMSIS function SystemCoreClockUpdate()
+ 2) by calling HAL API function HAL_RCC_GetHCLKFreq()
+ 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
+ Note: If you use this function to configure the system clock; then there
+ is no need to call the 2 first functions listed above, since SystemCoreClock
+ variable is updated automatically.
+ */
+ uint32_t SystemCoreClock = 4000000U;
+
+ const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U};
+ const uint8_t APBPrescTable[8] = {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};
+ const uint32_t MSIRangeTable[12] = {100000U, 200000U, 400000U, 800000U, 1000000U, 2000000U, \
+ 4000000U, 8000000U, 16000000U, 24000000U, 32000000U, 48000000U};
+/**
+ * @}
+ */
+
+/** @addtogroup STM32L4xx_System_Private_FunctionPrototypes
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @addtogroup STM32L4xx_System_Private_Functions
+ * @{
+ */
+
+/**
+ * @brief Setup the microcontroller system.
+ * @retval None
+ */
+
+void SystemInit(void)
+{
+#if defined(USER_VECT_TAB_ADDRESS)
+ /* Configure the Vector Table location -------------------------------------*/
+ SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET;
+#endif
+
+ /* FPU settings ------------------------------------------------------------*/
+#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+ SCB->CPACR |= ((3UL << 20U)|(3UL << 22U)); /* set CP10 and CP11 Full Access */
+#endif
+}
+
+/**
+ * @brief Update SystemCoreClock variable according to Clock Register Values.
+ * The SystemCoreClock variable contains the core clock (HCLK), it can
+ * be used by the user application to setup the SysTick timer or configure
+ * other parameters.
+ *
+ * @note Each time the core clock (HCLK) changes, this function must be called
+ * to update SystemCoreClock variable value. Otherwise, any configuration
+ * based on this variable will be incorrect.
+ *
+ * @note - The system frequency computed by this function is not the real
+ * frequency in the chip. It is calculated based on the predefined
+ * constant and the selected clock source:
+ *
+ * - If SYSCLK source is MSI, SystemCoreClock will contain the MSI_VALUE(*)
+ *
+ * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**)
+ *
+ * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
+ *
+ * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***)
+ * or HSI_VALUE(*) or MSI_VALUE(*) multiplied/divided by the PLL factors.
+ *
+ * (*) MSI_VALUE is a constant defined in stm32l4xx_hal.h file (default value
+ * 4 MHz) but the real value may vary depending on the variations
+ * in voltage and temperature.
+ *
+ * (**) HSI_VALUE is a constant defined in stm32l4xx_hal.h file (default value
+ * 16 MHz) but the real value may vary depending on the variations
+ * in voltage and temperature.
+ *
+ * (***) HSE_VALUE is a constant defined in stm32l4xx_hal.h file (default value
+ * 8 MHz), user has to ensure that HSE_VALUE is same as the real
+ * frequency of the crystal used. Otherwise, this function may
+ * have wrong result.
+ *
+ * - The result of this function could be not correct when using fractional
+ * value for HSE crystal.
+ *
+ * @retval None
+ */
+void SystemCoreClockUpdate(void)
+{
+ uint32_t tmp, msirange, pllvco, pllsource, pllm, pllr;
+
+ /* Get MSI Range frequency--------------------------------------------------*/
+ if ((RCC->CR & RCC_CR_MSIRGSEL) == 0U)
+ { /* MSISRANGE from RCC_CSR applies */
+ msirange = (RCC->CSR & RCC_CSR_MSISRANGE) >> 8U;
+ }
+ else
+ { /* MSIRANGE from RCC_CR applies */
+ msirange = (RCC->CR & RCC_CR_MSIRANGE) >> 4U;
+ }
+ /*MSI frequency range in HZ*/
+ msirange = MSIRangeTable[msirange];
+
+ /* Get SYSCLK source -------------------------------------------------------*/
+ switch (RCC->CFGR & RCC_CFGR_SWS)
+ {
+ case 0x00: /* MSI used as system clock source */
+ SystemCoreClock = msirange;
+ break;
+
+ case 0x04: /* HSI used as system clock source */
+ SystemCoreClock = HSI_VALUE;
+ break;
+
+ case 0x08: /* HSE used as system clock source */
+ SystemCoreClock = HSE_VALUE;
+ break;
+
+ case 0x0C: /* PLL used as system clock source */
+ /* PLL_VCO = (HSE_VALUE or HSI_VALUE or MSI_VALUE/ PLLM) * PLLN
+ SYSCLK = PLL_VCO / PLLR
+ */
+ pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
+ pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4U) + 1U ;
+
+ switch (pllsource)
+ {
+ case 0x02: /* HSI used as PLL clock source */
+ pllvco = (HSI_VALUE / pllm);
+ break;
+
+ case 0x03: /* HSE used as PLL clock source */
+ pllvco = (HSE_VALUE / pllm);
+ break;
+
+ default: /* MSI used as PLL clock source */
+ pllvco = (msirange / pllm);
+ break;
+ }
+ pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8U);
+ pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25U) + 1U) * 2U;
+ SystemCoreClock = pllvco/pllr;
+ break;
+
+ default:
+ SystemCoreClock = msirange;
+ break;
+ }
+ /* Compute HCLK clock frequency --------------------------------------------*/
+ /* Get HCLK prescaler */
+ tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4U)];
+ /* HCLK clock frequency */
+ SystemCoreClock >>= tmp;
+}
+
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/P3_SETR2/Core/Src/temperature.c b/P3_SETR2/Core/Src/temperature.c
new file mode 100644
index 0000000..e7c2104
--- /dev/null
+++ b/P3_SETR2/Core/Src/temperature.c
@@ -0,0 +1,16 @@
+/*
+ * temperature.c
+ *
+ * Created on: Oct 27, 2025
+ * Author: jomaa
+ */
+
+#include "temperature.h"
+
+void Temperature_Test(void)
+{
+ float temp_value = 0;
+ BSP_TSENSOR_Init();
+ temp_value = BSP_TSENSOR_ReadTemp();
+ printf("TEMPERATURE is = %.2f ºC\n", temp_value);
+}
diff --git a/P3_SETR2/Core/Startup/startup_stm32l475vgtx.s b/P3_SETR2/Core/Startup/startup_stm32l475vgtx.s
new file mode 100644
index 0000000..f00efcf
--- /dev/null
+++ b/P3_SETR2/Core/Startup/startup_stm32l475vgtx.s
@@ -0,0 +1,508 @@
+/**
+ ******************************************************************************
+ * @file startup_stm32l475xx.s
+ * @author MCD Application Team
+ * @brief STM32L475xx devices vector table for GCC toolchain.
+ * This module performs:
+ * - Set the initial SP
+ * - Set the initial PC == Reset_Handler,
+ * - Set the vector table entries with the exceptions ISR address,
+ * - Configure the clock system
+ * - Branches to main in the C library (which eventually
+ * calls main()).
+ * After Reset the Cortex-M4 processor is in Thread mode,
+ * priority is Privileged, and the Stack is set to Main.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2017 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+ .syntax unified
+ .cpu cortex-m4
+ .fpu softvfp
+ .thumb
+
+.global g_pfnVectors
+.global Default_Handler
+
+/* start address for the initialization values of the .data section.
+defined in linker script */
+.word _sidata
+/* start address for the .data section. defined in linker script */
+.word _sdata
+/* end address for the .data section. defined in linker script */
+.word _edata
+/* start address for the .bss section. defined in linker script */
+.word _sbss
+/* end address for the .bss section. defined in linker script */
+.word _ebss
+
+.equ BootRAM, 0xF1E0F85F
+/**
+ * @brief This is the code that gets called when the processor first
+ * starts execution following a reset event. Only the absolutely
+ * necessary set is performed, after which the application
+ * supplied main() routine is called.
+ * @param None
+ * @retval : None
+*/
+
+ .section .text.Reset_Handler
+ .weak Reset_Handler
+ .type Reset_Handler, %function
+Reset_Handler:
+ ldr sp, =_estack /* Set stack pointer */
+
+/* Call the clock system initialization function.*/
+ bl SystemInit
+
+/* Copy the data segment initializers from flash to SRAM */
+ ldr r0, =_sdata
+ ldr r1, =_edata
+ ldr r2, =_sidata
+ movs r3, #0
+ b LoopCopyDataInit
+
+CopyDataInit:
+ ldr r4, [r2, r3]
+ str r4, [r0, r3]
+ adds r3, r3, #4
+
+LoopCopyDataInit:
+ adds r4, r0, r3
+ cmp r4, r1
+ bcc CopyDataInit
+
+/* Zero fill the bss segment. */
+ ldr r2, =_sbss
+ ldr r4, =_ebss
+ movs r3, #0
+ b LoopFillZerobss
+
+FillZerobss:
+ str r3, [r2]
+ adds r2, r2, #4
+
+LoopFillZerobss:
+ cmp r2, r4
+ bcc FillZerobss
+
+/* Call static constructors */
+ bl __libc_init_array
+/* Call the application's entry point.*/
+ bl main
+
+LoopForever:
+ b LoopForever
+
+.size Reset_Handler, .-Reset_Handler
+
+/**
+ * @brief This is the code that gets called when the processor receives an
+ * unexpected interrupt. This simply enters an infinite loop, preserving
+ * the system state for examination by a debugger.
+ *
+ * @param None
+ * @retval : None
+*/
+ .section .text.Default_Handler,"ax",%progbits
+Default_Handler:
+Infinite_Loop:
+ b Infinite_Loop
+ .size Default_Handler, .-Default_Handler
+/******************************************************************************
+*
+* The minimal vector table for a Cortex-M4. Note that the proper constructs
+* must be placed on this to ensure that it ends up at physical address
+* 0x0000.0000.
+*
+******************************************************************************/
+ .section .isr_vector,"a",%progbits
+ .type g_pfnVectors, %object
+ .size g_pfnVectors, .-g_pfnVectors
+
+
+g_pfnVectors:
+ .word _estack
+ .word Reset_Handler
+ .word NMI_Handler
+ .word HardFault_Handler
+ .word MemManage_Handler
+ .word BusFault_Handler
+ .word UsageFault_Handler
+ .word 0
+ .word 0
+ .word 0
+ .word 0
+ .word SVC_Handler
+ .word DebugMon_Handler
+ .word 0
+ .word PendSV_Handler
+ .word SysTick_Handler
+ .word WWDG_IRQHandler
+ .word PVD_PVM_IRQHandler
+ .word TAMP_STAMP_IRQHandler
+ .word RTC_WKUP_IRQHandler
+ .word FLASH_IRQHandler
+ .word RCC_IRQHandler
+ .word EXTI0_IRQHandler
+ .word EXTI1_IRQHandler
+ .word EXTI2_IRQHandler
+ .word EXTI3_IRQHandler
+ .word EXTI4_IRQHandler
+ .word DMA1_Channel1_IRQHandler
+ .word DMA1_Channel2_IRQHandler
+ .word DMA1_Channel3_IRQHandler
+ .word DMA1_Channel4_IRQHandler
+ .word DMA1_Channel5_IRQHandler
+ .word DMA1_Channel6_IRQHandler
+ .word DMA1_Channel7_IRQHandler
+ .word ADC1_2_IRQHandler
+ .word CAN1_TX_IRQHandler
+ .word CAN1_RX0_IRQHandler
+ .word CAN1_RX1_IRQHandler
+ .word CAN1_SCE_IRQHandler
+ .word EXTI9_5_IRQHandler
+ .word TIM1_BRK_TIM15_IRQHandler
+ .word TIM1_UP_TIM16_IRQHandler
+ .word TIM1_TRG_COM_TIM17_IRQHandler
+ .word TIM1_CC_IRQHandler
+ .word TIM2_IRQHandler
+ .word TIM3_IRQHandler
+ .word TIM4_IRQHandler
+ .word I2C1_EV_IRQHandler
+ .word I2C1_ER_IRQHandler
+ .word I2C2_EV_IRQHandler
+ .word I2C2_ER_IRQHandler
+ .word SPI1_IRQHandler
+ .word SPI2_IRQHandler
+ .word USART1_IRQHandler
+ .word USART2_IRQHandler
+ .word USART3_IRQHandler
+ .word EXTI15_10_IRQHandler
+ .word RTC_Alarm_IRQHandler
+ .word DFSDM1_FLT3_IRQHandler
+ .word TIM8_BRK_IRQHandler
+ .word TIM8_UP_IRQHandler
+ .word TIM8_TRG_COM_IRQHandler
+ .word TIM8_CC_IRQHandler
+ .word ADC3_IRQHandler
+ .word FMC_IRQHandler
+ .word SDMMC1_IRQHandler
+ .word TIM5_IRQHandler
+ .word SPI3_IRQHandler
+ .word UART4_IRQHandler
+ .word UART5_IRQHandler
+ .word TIM6_DAC_IRQHandler
+ .word TIM7_IRQHandler
+ .word DMA2_Channel1_IRQHandler
+ .word DMA2_Channel2_IRQHandler
+ .word DMA2_Channel3_IRQHandler
+ .word DMA2_Channel4_IRQHandler
+ .word DMA2_Channel5_IRQHandler
+ .word DFSDM1_FLT0_IRQHandler
+ .word DFSDM1_FLT1_IRQHandler
+ .word DFSDM1_FLT2_IRQHandler
+ .word COMP_IRQHandler
+ .word LPTIM1_IRQHandler
+ .word LPTIM2_IRQHandler
+ .word OTG_FS_IRQHandler
+ .word DMA2_Channel6_IRQHandler
+ .word DMA2_Channel7_IRQHandler
+ .word LPUART1_IRQHandler
+ .word QUADSPI_IRQHandler
+ .word I2C3_EV_IRQHandler
+ .word I2C3_ER_IRQHandler
+ .word SAI1_IRQHandler
+ .word SAI2_IRQHandler
+ .word SWPMI1_IRQHandler
+ .word TSC_IRQHandler
+ .word 0
+ .word 0
+ .word RNG_IRQHandler
+ .word FPU_IRQHandler
+
+
+/*******************************************************************************
+*
+* Provide weak aliases for each Exception handler to the Default_Handler.
+* As they are weak aliases, any function with the same name will override
+* this definition.
+*
+*******************************************************************************/
+
+ .weak NMI_Handler
+ .thumb_set NMI_Handler,Default_Handler
+
+ .weak HardFault_Handler
+ .thumb_set HardFault_Handler,Default_Handler
+
+ .weak MemManage_Handler
+ .thumb_set MemManage_Handler,Default_Handler
+
+ .weak BusFault_Handler
+ .thumb_set BusFault_Handler,Default_Handler
+
+ .weak UsageFault_Handler
+ .thumb_set UsageFault_Handler,Default_Handler
+
+ .weak SVC_Handler
+ .thumb_set SVC_Handler,Default_Handler
+
+ .weak DebugMon_Handler
+ .thumb_set DebugMon_Handler,Default_Handler
+
+ .weak PendSV_Handler
+ .thumb_set PendSV_Handler,Default_Handler
+
+ .weak SysTick_Handler
+ .thumb_set SysTick_Handler,Default_Handler
+
+ .weak WWDG_IRQHandler
+ .thumb_set WWDG_IRQHandler,Default_Handler
+
+ .weak PVD_PVM_IRQHandler
+ .thumb_set PVD_PVM_IRQHandler,Default_Handler
+
+ .weak TAMP_STAMP_IRQHandler
+ .thumb_set TAMP_STAMP_IRQHandler,Default_Handler
+
+ .weak RTC_WKUP_IRQHandler
+ .thumb_set RTC_WKUP_IRQHandler,Default_Handler
+
+ .weak FLASH_IRQHandler
+ .thumb_set FLASH_IRQHandler,Default_Handler
+
+ .weak RCC_IRQHandler
+ .thumb_set RCC_IRQHandler,Default_Handler
+
+ .weak EXTI0_IRQHandler
+ .thumb_set EXTI0_IRQHandler,Default_Handler
+
+ .weak EXTI1_IRQHandler
+ .thumb_set EXTI1_IRQHandler,Default_Handler
+
+ .weak EXTI2_IRQHandler
+ .thumb_set EXTI2_IRQHandler,Default_Handler
+
+ .weak EXTI3_IRQHandler
+ .thumb_set EXTI3_IRQHandler,Default_Handler
+
+ .weak EXTI4_IRQHandler
+ .thumb_set EXTI4_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel1_IRQHandler
+ .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel2_IRQHandler
+ .thumb_set DMA1_Channel2_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel3_IRQHandler
+ .thumb_set DMA1_Channel3_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel4_IRQHandler
+ .thumb_set DMA1_Channel4_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel5_IRQHandler
+ .thumb_set DMA1_Channel5_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel6_IRQHandler
+ .thumb_set DMA1_Channel6_IRQHandler,Default_Handler
+
+ .weak DMA1_Channel7_IRQHandler
+ .thumb_set DMA1_Channel7_IRQHandler,Default_Handler
+
+ .weak ADC1_2_IRQHandler
+ .thumb_set ADC1_2_IRQHandler,Default_Handler
+
+ .weak CAN1_TX_IRQHandler
+ .thumb_set CAN1_TX_IRQHandler,Default_Handler
+
+ .weak CAN1_RX0_IRQHandler
+ .thumb_set CAN1_RX0_IRQHandler,Default_Handler
+
+ .weak CAN1_RX1_IRQHandler
+ .thumb_set CAN1_RX1_IRQHandler,Default_Handler
+
+ .weak CAN1_SCE_IRQHandler
+ .thumb_set CAN1_SCE_IRQHandler,Default_Handler
+
+ .weak EXTI9_5_IRQHandler
+ .thumb_set EXTI9_5_IRQHandler,Default_Handler
+
+ .weak TIM1_BRK_TIM15_IRQHandler
+ .thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
+
+ .weak TIM1_UP_TIM16_IRQHandler
+ .thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
+
+ .weak TIM1_TRG_COM_TIM17_IRQHandler
+ .thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler
+
+ .weak TIM1_CC_IRQHandler
+ .thumb_set TIM1_CC_IRQHandler,Default_Handler
+
+ .weak TIM2_IRQHandler
+ .thumb_set TIM2_IRQHandler,Default_Handler
+
+ .weak TIM3_IRQHandler
+ .thumb_set TIM3_IRQHandler,Default_Handler
+
+ .weak TIM4_IRQHandler
+ .thumb_set TIM4_IRQHandler,Default_Handler
+
+ .weak I2C1_EV_IRQHandler
+ .thumb_set I2C1_EV_IRQHandler,Default_Handler
+
+ .weak I2C1_ER_IRQHandler
+ .thumb_set I2C1_ER_IRQHandler,Default_Handler
+
+ .weak I2C2_EV_IRQHandler
+ .thumb_set I2C2_EV_IRQHandler,Default_Handler
+
+ .weak I2C2_ER_IRQHandler
+ .thumb_set I2C2_ER_IRQHandler,Default_Handler
+
+ .weak SPI1_IRQHandler
+ .thumb_set SPI1_IRQHandler,Default_Handler
+
+ .weak SPI2_IRQHandler
+ .thumb_set SPI2_IRQHandler,Default_Handler
+
+ .weak USART1_IRQHandler
+ .thumb_set USART1_IRQHandler,Default_Handler
+
+ .weak USART2_IRQHandler
+ .thumb_set USART2_IRQHandler,Default_Handler
+
+ .weak USART3_IRQHandler
+ .thumb_set USART3_IRQHandler,Default_Handler
+
+ .weak EXTI15_10_IRQHandler
+ .thumb_set EXTI15_10_IRQHandler,Default_Handler
+
+ .weak RTC_Alarm_IRQHandler
+ .thumb_set RTC_Alarm_IRQHandler,Default_Handler
+
+ .weak DFSDM1_FLT3_IRQHandler
+ .thumb_set DFSDM1_FLT3_IRQHandler,Default_Handler
+
+ .weak TIM8_BRK_IRQHandler
+ .thumb_set TIM8_BRK_IRQHandler,Default_Handler
+
+ .weak TIM8_UP_IRQHandler
+ .thumb_set TIM8_UP_IRQHandler,Default_Handler
+
+ .weak TIM8_TRG_COM_IRQHandler
+ .thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler
+
+ .weak TIM8_CC_IRQHandler
+ .thumb_set TIM8_CC_IRQHandler,Default_Handler
+
+ .weak ADC3_IRQHandler
+ .thumb_set ADC3_IRQHandler,Default_Handler
+
+ .weak FMC_IRQHandler
+ .thumb_set FMC_IRQHandler,Default_Handler
+
+ .weak SDMMC1_IRQHandler
+ .thumb_set SDMMC1_IRQHandler,Default_Handler
+
+ .weak TIM5_IRQHandler
+ .thumb_set TIM5_IRQHandler,Default_Handler
+
+ .weak SPI3_IRQHandler
+ .thumb_set SPI3_IRQHandler,Default_Handler
+
+ .weak UART4_IRQHandler
+ .thumb_set UART4_IRQHandler,Default_Handler
+
+ .weak UART5_IRQHandler
+ .thumb_set UART5_IRQHandler,Default_Handler
+
+ .weak TIM6_DAC_IRQHandler
+ .thumb_set TIM6_DAC_IRQHandler,Default_Handler
+
+ .weak TIM7_IRQHandler
+ .thumb_set TIM7_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel1_IRQHandler
+ .thumb_set DMA2_Channel1_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel2_IRQHandler
+ .thumb_set DMA2_Channel2_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel3_IRQHandler
+ .thumb_set DMA2_Channel3_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel4_IRQHandler
+ .thumb_set DMA2_Channel4_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel5_IRQHandler
+ .thumb_set DMA2_Channel5_IRQHandler,Default_Handler
+
+ .weak DFSDM1_FLT0_IRQHandler
+ .thumb_set DFSDM1_FLT0_IRQHandler,Default_Handler
+
+ .weak DFSDM1_FLT1_IRQHandler
+ .thumb_set DFSDM1_FLT1_IRQHandler,Default_Handler
+
+ .weak DFSDM1_FLT2_IRQHandler
+ .thumb_set DFSDM1_FLT2_IRQHandler,Default_Handler
+
+ .weak COMP_IRQHandler
+ .thumb_set COMP_IRQHandler,Default_Handler
+
+ .weak LPTIM1_IRQHandler
+ .thumb_set LPTIM1_IRQHandler,Default_Handler
+
+ .weak LPTIM2_IRQHandler
+ .thumb_set LPTIM2_IRQHandler,Default_Handler
+
+ .weak OTG_FS_IRQHandler
+ .thumb_set OTG_FS_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel6_IRQHandler
+ .thumb_set DMA2_Channel6_IRQHandler,Default_Handler
+
+ .weak DMA2_Channel7_IRQHandler
+ .thumb_set DMA2_Channel7_IRQHandler,Default_Handler
+
+ .weak LPUART1_IRQHandler
+ .thumb_set LPUART1_IRQHandler,Default_Handler
+
+ .weak QUADSPI_IRQHandler
+ .thumb_set QUADSPI_IRQHandler,Default_Handler
+
+ .weak I2C3_EV_IRQHandler
+ .thumb_set I2C3_EV_IRQHandler,Default_Handler
+
+ .weak I2C3_ER_IRQHandler
+ .thumb_set I2C3_ER_IRQHandler,Default_Handler
+
+ .weak SAI1_IRQHandler
+ .thumb_set SAI1_IRQHandler,Default_Handler
+
+ .weak SAI2_IRQHandler
+ .thumb_set SAI2_IRQHandler,Default_Handler
+
+ .weak SWPMI1_IRQHandler
+ .thumb_set SWPMI1_IRQHandler,Default_Handler
+
+ .weak TSC_IRQHandler
+ .thumb_set TSC_IRQHandler,Default_Handler
+
+ .weak RNG_IRQHandler
+ .thumb_set RNG_IRQHandler,Default_Handler
+
+ .weak FPU_IRQHandler
+ .thumb_set FPU_IRQHandler,Default_Handler
+
diff --git a/P3_SETR2/Debug/BSP/stm32l475e_iot01.cyclo b/P3_SETR2/Debug/BSP/stm32l475e_iot01.cyclo
new file mode 100644
index 0000000..dcef828
--- /dev/null
+++ b/P3_SETR2/Debug/BSP/stm32l475e_iot01.cyclo
@@ -0,0 +1,35 @@
+../BSP/stm32l475e_iot01.c:132:10:BSP_GetVersion 1
+../BSP/stm32l475e_iot01.c:143:6:BSP_LED_Init 2
+../BSP/stm32l475e_iot01.c:163:6:BSP_LED_DeInit 1
+../BSP/stm32l475e_iot01.c:181:6:BSP_LED_On 1
+../BSP/stm32l475e_iot01.c:192:6:BSP_LED_Off 1
+../BSP/stm32l475e_iot01.c:203:6:BSP_LED_Toggle 1
+../BSP/stm32l475e_iot01.c:219:6:BSP_PB_Init 3
+../BSP/stm32l475e_iot01.c:260:6:BSP_PB_DeInit 1
+../BSP/stm32l475e_iot01.c:277:10:BSP_PB_GetState 1
+../BSP/stm32l475e_iot01.c:290:6:BSP_COM_Init 4
+../BSP/stm32l475e_iot01.c:328:6:BSP_COM_DeInit 2
+../BSP/stm32l475e_iot01.c:355:13:I2Cx_MspInit 1
+../BSP/stm32l475e_iot01.c:397:13:I2Cx_MspDeInit 1
+../BSP/stm32l475e_iot01.c:416:13:I2Cx_Init 1
+../BSP/stm32l475e_iot01.c:441:13:I2Cx_DeInit 1
+../BSP/stm32l475e_iot01.c:457:26:I2Cx_ReadMultiple 2
+../BSP/stm32l475e_iot01.c:483:26:I2Cx_WriteMultiple 2
+../BSP/stm32l475e_iot01.c:506:26:I2Cx_IsDeviceReady 1
+../BSP/stm32l475e_iot01.c:517:13:I2Cx_Error 1
+../BSP/stm32l475e_iot01.c:539:6:SENSOR_IO_Init 1
+../BSP/stm32l475e_iot01.c:548:6:SENSOR_IO_DeInit 1
+../BSP/stm32l475e_iot01.c:560:6:SENSOR_IO_Write 1
+../BSP/stm32l475e_iot01.c:571:9:SENSOR_IO_Read 1
+../BSP/stm32l475e_iot01.c:589:10:SENSOR_IO_ReadMultiple 1
+../BSP/stm32l475e_iot01.c:603:6:SENSOR_IO_WriteMultiple 1
+../BSP/stm32l475e_iot01.c:615:19:SENSOR_IO_IsDeviceReady 1
+../BSP/stm32l475e_iot01.c:625:6:SENSOR_IO_Delay 1
+../BSP/stm32l475e_iot01.c:637:6:NFC_IO_Init 2
+../BSP/stm32l475e_iot01.c:679:6:NFC_IO_DeInit 1
+../BSP/stm32l475e_iot01.c:691:10:NFC_IO_ReadMultiple 3
+../BSP/stm32l475e_iot01.c:717:11:NFC_IO_WriteMultiple 3
+../BSP/stm32l475e_iot01.c:742:12:NFC_IO_IsDeviceReady 4
+../BSP/stm32l475e_iot01.c:770:6:NFC_IO_ReadState 1
+../BSP/stm32l475e_iot01.c:779:6:NFC_IO_RfDisable 1
+../BSP/stm32l475e_iot01.c:789:6:NFC_IO_Delay 1
diff --git a/P3_SETR2/Debug/BSP/stm32l475e_iot01.d b/P3_SETR2/Debug/BSP/stm32l475e_iot01.d
new file mode 100644
index 0000000..6c8282e
--- /dev/null
+++ b/P3_SETR2/Debug/BSP/stm32l475e_iot01.d
@@ -0,0 +1,73 @@
+BSP/stm32l475e_iot01.o: ../BSP/stm32l475e_iot01.c \
+ ../BSP/stm32l475e_iot01.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h \
+ ../Core/Inc/stm32l4xx_hal_conf.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l475xx.h \
+ ../Drivers/CMSIS/Include/core_cm4.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dfsdm.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_usb.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_qspi.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h
+../BSP/stm32l475e_iot01.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:
+../Core/Inc/stm32l4xx_hal_conf.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l475xx.h:
+../Drivers/CMSIS/Include/core_cm4.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dfsdm.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_usb.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_qspi.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h:
diff --git a/P3_SETR2/Debug/BSP/stm32l475e_iot01.o b/P3_SETR2/Debug/BSP/stm32l475e_iot01.o
new file mode 100644
index 0000000..65aaf68
Binary files /dev/null and b/P3_SETR2/Debug/BSP/stm32l475e_iot01.o differ
diff --git a/P3_SETR2/Debug/BSP/stm32l475e_iot01.su b/P3_SETR2/Debug/BSP/stm32l475e_iot01.su
new file mode 100644
index 0000000..3ca9bd2
--- /dev/null
+++ b/P3_SETR2/Debug/BSP/stm32l475e_iot01.su
@@ -0,0 +1,35 @@
+../BSP/stm32l475e_iot01.c:132:10:BSP_GetVersion 4 static
+../BSP/stm32l475e_iot01.c:143:6:BSP_LED_Init 40 static
+../BSP/stm32l475e_iot01.c:163:6:BSP_LED_DeInit 40 static
+../BSP/stm32l475e_iot01.c:181:6:BSP_LED_On 16 static
+../BSP/stm32l475e_iot01.c:192:6:BSP_LED_Off 16 static
+../BSP/stm32l475e_iot01.c:203:6:BSP_LED_Toggle 16 static
+../BSP/stm32l475e_iot01.c:219:6:BSP_PB_Init 40 static
+../BSP/stm32l475e_iot01.c:260:6:BSP_PB_DeInit 40 static
+../BSP/stm32l475e_iot01.c:277:10:BSP_PB_GetState 16 static
+../BSP/stm32l475e_iot01.c:290:6:BSP_COM_Init 48 static
+../BSP/stm32l475e_iot01.c:328:6:BSP_COM_DeInit 16 static
+../BSP/stm32l475e_iot01.c:355:13:I2Cx_MspInit 48 static
+../BSP/stm32l475e_iot01.c:397:13:I2Cx_MspDeInit 40 static
+../BSP/stm32l475e_iot01.c:416:13:I2Cx_Init 16 static
+../BSP/stm32l475e_iot01.c:441:13:I2Cx_DeInit 16 static
+../BSP/stm32l475e_iot01.c:457:26:I2Cx_ReadMultiple 48 static
+../BSP/stm32l475e_iot01.c:483:26:I2Cx_WriteMultiple 48 static
+../BSP/stm32l475e_iot01.c:506:26:I2Cx_IsDeviceReady 24 static
+../BSP/stm32l475e_iot01.c:517:13:I2Cx_Error 16 static
+../BSP/stm32l475e_iot01.c:539:6:SENSOR_IO_Init 8 static
+../BSP/stm32l475e_iot01.c:548:6:SENSOR_IO_DeInit 8 static
+../BSP/stm32l475e_iot01.c:560:6:SENSOR_IO_Write 24 static
+../BSP/stm32l475e_iot01.c:571:9:SENSOR_IO_Read 32 static
+../BSP/stm32l475e_iot01.c:589:10:SENSOR_IO_ReadMultiple 24 static
+../BSP/stm32l475e_iot01.c:603:6:SENSOR_IO_WriteMultiple 24 static
+../BSP/stm32l475e_iot01.c:615:19:SENSOR_IO_IsDeviceReady 16 static
+../BSP/stm32l475e_iot01.c:625:6:SENSOR_IO_Delay 16 static
+../BSP/stm32l475e_iot01.c:637:6:NFC_IO_Init 40 static
+../BSP/stm32l475e_iot01.c:679:6:NFC_IO_DeInit 8 static
+../BSP/stm32l475e_iot01.c:691:10:NFC_IO_ReadMultiple 32 static
+../BSP/stm32l475e_iot01.c:717:11:NFC_IO_WriteMultiple 32 static
+../BSP/stm32l475e_iot01.c:742:12:NFC_IO_IsDeviceReady 32 static
+../BSP/stm32l475e_iot01.c:770:6:NFC_IO_ReadState 16 static
+../BSP/stm32l475e_iot01.c:779:6:NFC_IO_RfDisable 16 static
+../BSP/stm32l475e_iot01.c:789:6:NFC_IO_Delay 16 static
diff --git a/P3_SETR2/Debug/BSP/stm32l475e_iot01_accelero.cyclo b/P3_SETR2/Debug/BSP/stm32l475e_iot01_accelero.cyclo
new file mode 100644
index 0000000..1a458bc
--- /dev/null
+++ b/P3_SETR2/Debug/BSP/stm32l475e_iot01_accelero.cyclo
@@ -0,0 +1,4 @@
+../BSP/stm32l475e_iot01_accelero.c:49:24:BSP_ACCELERO_Init 2
+../BSP/stm32l475e_iot01_accelero.c:90:6:BSP_ACCELERO_DeInit 3
+../BSP/stm32l475e_iot01_accelero.c:107:6:BSP_ACCELERO_LowPower 3
+../BSP/stm32l475e_iot01_accelero.c:125:6:BSP_ACCELERO_AccGetXYZ 3
diff --git a/P3_SETR2/Debug/BSP/stm32l475e_iot01_accelero.d b/P3_SETR2/Debug/BSP/stm32l475e_iot01_accelero.d
new file mode 100644
index 0000000..3d5e15c
--- /dev/null
+++ b/P3_SETR2/Debug/BSP/stm32l475e_iot01_accelero.d
@@ -0,0 +1,80 @@
+BSP/stm32l475e_iot01_accelero.o: ../BSP/stm32l475e_iot01_accelero.c \
+ ../BSP/stm32l475e_iot01_accelero.h ../BSP/stm32l475e_iot01.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h \
+ ../Core/Inc/stm32l4xx_hal_conf.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l475xx.h \
+ ../Drivers/CMSIS/Include/core_cm4.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dfsdm.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_usb.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_qspi.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h \
+ ../BSP/../Components/lsm6dsl/lsm6dsl.h \
+ ../BSP/../Components/lsm6dsl/../Common/accelero.h \
+ ../BSP/../Components/lsm6dsl/../Common/gyro.h
+../BSP/stm32l475e_iot01_accelero.h:
+../BSP/stm32l475e_iot01.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:
+../Core/Inc/stm32l4xx_hal_conf.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l475xx.h:
+../Drivers/CMSIS/Include/core_cm4.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dfsdm.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_usb.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_qspi.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h:
+../BSP/../Components/lsm6dsl/lsm6dsl.h:
+../BSP/../Components/lsm6dsl/../Common/accelero.h:
+../BSP/../Components/lsm6dsl/../Common/gyro.h:
diff --git a/P3_SETR2/Debug/BSP/stm32l475e_iot01_accelero.o b/P3_SETR2/Debug/BSP/stm32l475e_iot01_accelero.o
new file mode 100644
index 0000000..4964e41
Binary files /dev/null and b/P3_SETR2/Debug/BSP/stm32l475e_iot01_accelero.o differ
diff --git a/P3_SETR2/Debug/BSP/stm32l475e_iot01_accelero.su b/P3_SETR2/Debug/BSP/stm32l475e_iot01_accelero.su
new file mode 100644
index 0000000..37a1d03
--- /dev/null
+++ b/P3_SETR2/Debug/BSP/stm32l475e_iot01_accelero.su
@@ -0,0 +1,4 @@
+../BSP/stm32l475e_iot01_accelero.c:49:24:BSP_ACCELERO_Init 24 static
+../BSP/stm32l475e_iot01_accelero.c:90:6:BSP_ACCELERO_DeInit 8 static
+../BSP/stm32l475e_iot01_accelero.c:107:6:BSP_ACCELERO_LowPower 16 static
+../BSP/stm32l475e_iot01_accelero.c:125:6:BSP_ACCELERO_AccGetXYZ 16 static
diff --git a/P3_SETR2/Debug/BSP/stm32l475e_iot01_gyro.cyclo b/P3_SETR2/Debug/BSP/stm32l475e_iot01_gyro.cyclo
new file mode 100644
index 0000000..f396687
--- /dev/null
+++ b/P3_SETR2/Debug/BSP/stm32l475e_iot01_gyro.cyclo
@@ -0,0 +1,4 @@
+../BSP/stm32l475e_iot01_gyro.c:52:9:BSP_GYRO_Init 2
+../BSP/stm32l475e_iot01_gyro.c:95:6:BSP_GYRO_DeInit 3
+../BSP/stm32l475e_iot01_gyro.c:112:6:BSP_GYRO_LowPower 3
+../BSP/stm32l475e_iot01_gyro.c:128:6:BSP_GYRO_GetXYZ 3
diff --git a/P3_SETR2/Debug/BSP/stm32l475e_iot01_gyro.d b/P3_SETR2/Debug/BSP/stm32l475e_iot01_gyro.d
new file mode 100644
index 0000000..246ab6c
--- /dev/null
+++ b/P3_SETR2/Debug/BSP/stm32l475e_iot01_gyro.d
@@ -0,0 +1,80 @@
+BSP/stm32l475e_iot01_gyro.o: ../BSP/stm32l475e_iot01_gyro.c \
+ ../BSP/stm32l475e_iot01_gyro.h ../BSP/stm32l475e_iot01.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h \
+ ../Core/Inc/stm32l4xx_hal_conf.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l475xx.h \
+ ../Drivers/CMSIS/Include/core_cm4.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dfsdm.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_usb.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_qspi.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h \
+ ../BSP/../Components/lsm6dsl/lsm6dsl.h \
+ ../BSP/../Components/lsm6dsl/../Common/accelero.h \
+ ../BSP/../Components/lsm6dsl/../Common/gyro.h
+../BSP/stm32l475e_iot01_gyro.h:
+../BSP/stm32l475e_iot01.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:
+../Core/Inc/stm32l4xx_hal_conf.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l475xx.h:
+../Drivers/CMSIS/Include/core_cm4.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dfsdm.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_usb.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_qspi.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h:
+../BSP/../Components/lsm6dsl/lsm6dsl.h:
+../BSP/../Components/lsm6dsl/../Common/accelero.h:
+../BSP/../Components/lsm6dsl/../Common/gyro.h:
diff --git a/P3_SETR2/Debug/BSP/stm32l475e_iot01_gyro.o b/P3_SETR2/Debug/BSP/stm32l475e_iot01_gyro.o
new file mode 100644
index 0000000..4f70459
Binary files /dev/null and b/P3_SETR2/Debug/BSP/stm32l475e_iot01_gyro.o differ
diff --git a/P3_SETR2/Debug/BSP/stm32l475e_iot01_gyro.su b/P3_SETR2/Debug/BSP/stm32l475e_iot01_gyro.su
new file mode 100644
index 0000000..760d5f8
--- /dev/null
+++ b/P3_SETR2/Debug/BSP/stm32l475e_iot01_gyro.su
@@ -0,0 +1,4 @@
+../BSP/stm32l475e_iot01_gyro.c:52:9:BSP_GYRO_Init 24 static
+../BSP/stm32l475e_iot01_gyro.c:95:6:BSP_GYRO_DeInit 8 static
+../BSP/stm32l475e_iot01_gyro.c:112:6:BSP_GYRO_LowPower 16 static
+../BSP/stm32l475e_iot01_gyro.c:128:6:BSP_GYRO_GetXYZ 16 static
diff --git a/P3_SETR2/Debug/BSP/stm32l475e_iot01_hsensor.cyclo b/P3_SETR2/Debug/BSP/stm32l475e_iot01_hsensor.cyclo
new file mode 100644
index 0000000..8702972
--- /dev/null
+++ b/P3_SETR2/Debug/BSP/stm32l475e_iot01_hsensor.cyclo
@@ -0,0 +1,3 @@
+../BSP/stm32l475e_iot01_hsensor.c:51:10:BSP_HSENSOR_Init 2
+../BSP/stm32l475e_iot01_hsensor.c:74:9:BSP_HSENSOR_ReadID 1
+../BSP/stm32l475e_iot01_hsensor.c:83:7:BSP_HSENSOR_ReadHumidity 1
diff --git a/P3_SETR2/Debug/BSP/stm32l475e_iot01_hsensor.d b/P3_SETR2/Debug/BSP/stm32l475e_iot01_hsensor.d
new file mode 100644
index 0000000..275146c
--- /dev/null
+++ b/P3_SETR2/Debug/BSP/stm32l475e_iot01_hsensor.d
@@ -0,0 +1,80 @@
+BSP/stm32l475e_iot01_hsensor.o: ../BSP/stm32l475e_iot01_hsensor.c \
+ ../BSP/stm32l475e_iot01_hsensor.h ../BSP/stm32l475e_iot01.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h \
+ ../Core/Inc/stm32l4xx_hal_conf.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l475xx.h \
+ ../Drivers/CMSIS/Include/core_cm4.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dfsdm.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_usb.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_qspi.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h \
+ ../BSP/../Components/hts221/hts221.h \
+ ../BSP/../Components/hts221/../Common/hsensor.h \
+ ../BSP/../Components/hts221/../Common/tsensor.h
+../BSP/stm32l475e_iot01_hsensor.h:
+../BSP/stm32l475e_iot01.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:
+../Core/Inc/stm32l4xx_hal_conf.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l475xx.h:
+../Drivers/CMSIS/Include/core_cm4.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dfsdm.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_usb.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_qspi.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h:
+../BSP/../Components/hts221/hts221.h:
+../BSP/../Components/hts221/../Common/hsensor.h:
+../BSP/../Components/hts221/../Common/tsensor.h:
diff --git a/P3_SETR2/Debug/BSP/stm32l475e_iot01_hsensor.o b/P3_SETR2/Debug/BSP/stm32l475e_iot01_hsensor.o
new file mode 100644
index 0000000..a714680
Binary files /dev/null and b/P3_SETR2/Debug/BSP/stm32l475e_iot01_hsensor.o differ
diff --git a/P3_SETR2/Debug/BSP/stm32l475e_iot01_hsensor.su b/P3_SETR2/Debug/BSP/stm32l475e_iot01_hsensor.su
new file mode 100644
index 0000000..58721e2
--- /dev/null
+++ b/P3_SETR2/Debug/BSP/stm32l475e_iot01_hsensor.su
@@ -0,0 +1,3 @@
+../BSP/stm32l475e_iot01_hsensor.c:51:10:BSP_HSENSOR_Init 16 static
+../BSP/stm32l475e_iot01_hsensor.c:74:9:BSP_HSENSOR_ReadID 8 static
+../BSP/stm32l475e_iot01_hsensor.c:83:7:BSP_HSENSOR_ReadHumidity 8 static
diff --git a/P3_SETR2/Debug/BSP/stm32l475e_iot01_magneto.cyclo b/P3_SETR2/Debug/BSP/stm32l475e_iot01_magneto.cyclo
new file mode 100644
index 0000000..43d3c75
--- /dev/null
+++ b/P3_SETR2/Debug/BSP/stm32l475e_iot01_magneto.cyclo
@@ -0,0 +1,4 @@
+../BSP/stm32l475e_iot01_magneto.c:52:23:BSP_MAGNETO_Init 2
+../BSP/stm32l475e_iot01_magneto.c:83:6:BSP_MAGNETO_DeInit 3
+../BSP/stm32l475e_iot01_magneto.c:98:6:BSP_MAGNETO_LowPower 3
+../BSP/stm32l475e_iot01_magneto.c:115:6:BSP_MAGNETO_GetXYZ 3
diff --git a/P3_SETR2/Debug/BSP/stm32l475e_iot01_magneto.d b/P3_SETR2/Debug/BSP/stm32l475e_iot01_magneto.d
new file mode 100644
index 0000000..8862b55
--- /dev/null
+++ b/P3_SETR2/Debug/BSP/stm32l475e_iot01_magneto.d
@@ -0,0 +1,78 @@
+BSP/stm32l475e_iot01_magneto.o: ../BSP/stm32l475e_iot01_magneto.c \
+ ../BSP/stm32l475e_iot01_magneto.h ../BSP/stm32l475e_iot01.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h \
+ ../Core/Inc/stm32l4xx_hal_conf.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l475xx.h \
+ ../Drivers/CMSIS/Include/core_cm4.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dfsdm.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_usb.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_qspi.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h \
+ ../BSP/../Components/lis3mdl/lis3mdl.h \
+ ../BSP/../Components/lis3mdl/../Common/magneto.h
+../BSP/stm32l475e_iot01_magneto.h:
+../BSP/stm32l475e_iot01.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:
+../Core/Inc/stm32l4xx_hal_conf.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l475xx.h:
+../Drivers/CMSIS/Include/core_cm4.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dfsdm.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_usb.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_qspi.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h:
+../BSP/../Components/lis3mdl/lis3mdl.h:
+../BSP/../Components/lis3mdl/../Common/magneto.h:
diff --git a/P3_SETR2/Debug/BSP/stm32l475e_iot01_magneto.o b/P3_SETR2/Debug/BSP/stm32l475e_iot01_magneto.o
new file mode 100644
index 0000000..072e218
Binary files /dev/null and b/P3_SETR2/Debug/BSP/stm32l475e_iot01_magneto.o differ
diff --git a/P3_SETR2/Debug/BSP/stm32l475e_iot01_magneto.su b/P3_SETR2/Debug/BSP/stm32l475e_iot01_magneto.su
new file mode 100644
index 0000000..7084f50
--- /dev/null
+++ b/P3_SETR2/Debug/BSP/stm32l475e_iot01_magneto.su
@@ -0,0 +1,4 @@
+../BSP/stm32l475e_iot01_magneto.c:52:23:BSP_MAGNETO_Init 16 static
+../BSP/stm32l475e_iot01_magneto.c:83:6:BSP_MAGNETO_DeInit 8 static
+../BSP/stm32l475e_iot01_magneto.c:98:6:BSP_MAGNETO_LowPower 16 static
+../BSP/stm32l475e_iot01_magneto.c:115:6:BSP_MAGNETO_GetXYZ 16 static
diff --git a/P3_SETR2/Debug/BSP/stm32l475e_iot01_psensor.cyclo b/P3_SETR2/Debug/BSP/stm32l475e_iot01_psensor.cyclo
new file mode 100644
index 0000000..258e6b5
--- /dev/null
+++ b/P3_SETR2/Debug/BSP/stm32l475e_iot01_psensor.cyclo
@@ -0,0 +1,3 @@
+../BSP/stm32l475e_iot01_psensor.c:51:10:BSP_PSENSOR_Init 2
+../BSP/stm32l475e_iot01_psensor.c:75:9:BSP_PSENSOR_ReadID 1
+../BSP/stm32l475e_iot01_psensor.c:84:7:BSP_PSENSOR_ReadPressure 1
diff --git a/P3_SETR2/Debug/BSP/stm32l475e_iot01_psensor.d b/P3_SETR2/Debug/BSP/stm32l475e_iot01_psensor.d
new file mode 100644
index 0000000..5654570
--- /dev/null
+++ b/P3_SETR2/Debug/BSP/stm32l475e_iot01_psensor.d
@@ -0,0 +1,80 @@
+BSP/stm32l475e_iot01_psensor.o: ../BSP/stm32l475e_iot01_psensor.c \
+ ../BSP/stm32l475e_iot01_psensor.h ../BSP/stm32l475e_iot01.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h \
+ ../Core/Inc/stm32l4xx_hal_conf.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l475xx.h \
+ ../Drivers/CMSIS/Include/core_cm4.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dfsdm.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_usb.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_qspi.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h \
+ ../BSP/../Components/lps22hb/lps22hb.h \
+ ../BSP/../Components/lps22hb/../Common/psensor.h \
+ ../BSP/../Components/lps22hb/../Common/tsensor.h
+../BSP/stm32l475e_iot01_psensor.h:
+../BSP/stm32l475e_iot01.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:
+../Core/Inc/stm32l4xx_hal_conf.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l475xx.h:
+../Drivers/CMSIS/Include/core_cm4.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dfsdm.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_usb.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_qspi.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h:
+../BSP/../Components/lps22hb/lps22hb.h:
+../BSP/../Components/lps22hb/../Common/psensor.h:
+../BSP/../Components/lps22hb/../Common/tsensor.h:
diff --git a/P3_SETR2/Debug/BSP/stm32l475e_iot01_psensor.o b/P3_SETR2/Debug/BSP/stm32l475e_iot01_psensor.o
new file mode 100644
index 0000000..dbc096b
Binary files /dev/null and b/P3_SETR2/Debug/BSP/stm32l475e_iot01_psensor.o differ
diff --git a/P3_SETR2/Debug/BSP/stm32l475e_iot01_psensor.su b/P3_SETR2/Debug/BSP/stm32l475e_iot01_psensor.su
new file mode 100644
index 0000000..5a528f4
--- /dev/null
+++ b/P3_SETR2/Debug/BSP/stm32l475e_iot01_psensor.su
@@ -0,0 +1,3 @@
+../BSP/stm32l475e_iot01_psensor.c:51:10:BSP_PSENSOR_Init 16 static
+../BSP/stm32l475e_iot01_psensor.c:75:9:BSP_PSENSOR_ReadID 8 static
+../BSP/stm32l475e_iot01_psensor.c:84:7:BSP_PSENSOR_ReadPressure 8 static
diff --git a/P3_SETR2/Debug/BSP/stm32l475e_iot01_qspi.cyclo b/P3_SETR2/Debug/BSP/stm32l475e_iot01_qspi.cyclo
new file mode 100644
index 0000000..b717cce
--- /dev/null
+++ b/P3_SETR2/Debug/BSP/stm32l475e_iot01_qspi.cyclo
@@ -0,0 +1,21 @@
+../BSP/stm32l475e_iot01_qspi.c:123:9:BSP_QSPI_Init 8
+../BSP/stm32l475e_iot01_qspi.c:182:9:BSP_QSPI_DeInit 2
+../BSP/stm32l475e_iot01_qspi.c:205:9:BSP_QSPI_Read 3
+../BSP/stm32l475e_iot01_qspi.c:247:9:BSP_QSPI_Write 8
+../BSP/stm32l475e_iot01_qspi.c:321:9:BSP_QSPI_Erase_Block 4
+../BSP/stm32l475e_iot01_qspi.c:369:9:BSP_QSPI_Erase_Sector 4
+../BSP/stm32l475e_iot01_qspi.c:410:9:BSP_QSPI_Erase_Chip 4
+../BSP/stm32l475e_iot01_qspi.c:450:9:BSP_QSPI_GetStatus 8
+../BSP/stm32l475e_iot01_qspi.c:520:9:BSP_QSPI_GetInfo 1
+../BSP/stm32l475e_iot01_qspi.c:536:9:BSP_QSPI_EnableMemoryMappedMode 2
+../BSP/stm32l475e_iot01_qspi.c:570:9:BSP_QSPI_SuspendErase 4
+../BSP/stm32l475e_iot01_qspi.c:611:9:BSP_QSPI_ResumeErase 4
+../BSP/stm32l475e_iot01_qspi.c:656:9:BSP_QSPI_EnterDeepPowerDown 2
+../BSP/stm32l475e_iot01_qspi.c:687:9:BSP_QSPI_LeaveDeepPowerDown 2
+../BSP/stm32l475e_iot01_qspi.c:718:13:BSP_QSPI_MspInit 1
+../BSP/stm32l475e_iot01_qspi.c:746:13:BSP_QSPI_MspDeInit 1
+../BSP/stm32l475e_iot01_qspi.c:778:16:QSPI_ResetMemory 4
+../BSP/stm32l475e_iot01_qspi.c:820:16:QSPI_WriteEnable 3
+../BSP/stm32l475e_iot01_qspi.c:866:16:QSPI_AutoPollingMemReady 2
+../BSP/stm32l475e_iot01_qspi.c:903:16:QSPI_QuadMode 14
+../BSP/stm32l475e_iot01_qspi.c:992:16:QSPI_HighPerfMode 16
diff --git a/P3_SETR2/Debug/BSP/stm32l475e_iot01_qspi.d b/P3_SETR2/Debug/BSP/stm32l475e_iot01_qspi.d
new file mode 100644
index 0000000..2d599c4
--- /dev/null
+++ b/P3_SETR2/Debug/BSP/stm32l475e_iot01_qspi.d
@@ -0,0 +1,75 @@
+BSP/stm32l475e_iot01_qspi.o: ../BSP/stm32l475e_iot01_qspi.c \
+ ../BSP/stm32l475e_iot01_qspi.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h \
+ ../Core/Inc/stm32l4xx_hal_conf.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l475xx.h \
+ ../Drivers/CMSIS/Include/core_cm4.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dfsdm.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_usb.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_qspi.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h \
+ ../BSP/../Components/mx25r6435f/mx25r6435f.h
+../BSP/stm32l475e_iot01_qspi.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:
+../Core/Inc/stm32l4xx_hal_conf.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l475xx.h:
+../Drivers/CMSIS/Include/core_cm4.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dfsdm.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_usb.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_qspi.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h:
+../BSP/../Components/mx25r6435f/mx25r6435f.h:
diff --git a/P3_SETR2/Debug/BSP/stm32l475e_iot01_qspi.o b/P3_SETR2/Debug/BSP/stm32l475e_iot01_qspi.o
new file mode 100644
index 0000000..1aceee6
Binary files /dev/null and b/P3_SETR2/Debug/BSP/stm32l475e_iot01_qspi.o differ
diff --git a/P3_SETR2/Debug/BSP/stm32l475e_iot01_qspi.su b/P3_SETR2/Debug/BSP/stm32l475e_iot01_qspi.su
new file mode 100644
index 0000000..f412f2e
--- /dev/null
+++ b/P3_SETR2/Debug/BSP/stm32l475e_iot01_qspi.su
@@ -0,0 +1,21 @@
+../BSP/stm32l475e_iot01_qspi.c:123:9:BSP_QSPI_Init 24 static,ignoring_inline_asm
+../BSP/stm32l475e_iot01_qspi.c:182:9:BSP_QSPI_DeInit 8 static
+../BSP/stm32l475e_iot01_qspi.c:205:9:BSP_QSPI_Read 80 static
+../BSP/stm32l475e_iot01_qspi.c:247:9:BSP_QSPI_Write 96 static
+../BSP/stm32l475e_iot01_qspi.c:321:9:BSP_QSPI_Erase_Block 72 static
+../BSP/stm32l475e_iot01_qspi.c:369:9:BSP_QSPI_Erase_Sector 72 static
+../BSP/stm32l475e_iot01_qspi.c:410:9:BSP_QSPI_Erase_Chip 64 static
+../BSP/stm32l475e_iot01_qspi.c:450:9:BSP_QSPI_GetStatus 72 static
+../BSP/stm32l475e_iot01_qspi.c:520:9:BSP_QSPI_GetInfo 16 static
+../BSP/stm32l475e_iot01_qspi.c:536:9:BSP_QSPI_EnableMemoryMappedMode 72 static
+../BSP/stm32l475e_iot01_qspi.c:570:9:BSP_QSPI_SuspendErase 64 static
+../BSP/stm32l475e_iot01_qspi.c:611:9:BSP_QSPI_ResumeErase 64 static
+../BSP/stm32l475e_iot01_qspi.c:656:9:BSP_QSPI_EnterDeepPowerDown 64 static
+../BSP/stm32l475e_iot01_qspi.c:687:9:BSP_QSPI_LeaveDeepPowerDown 64 static
+../BSP/stm32l475e_iot01_qspi.c:718:13:BSP_QSPI_MspInit 40 static
+../BSP/stm32l475e_iot01_qspi.c:746:13:BSP_QSPI_MspDeInit 32 static
+../BSP/stm32l475e_iot01_qspi.c:778:16:QSPI_ResetMemory 72 static
+../BSP/stm32l475e_iot01_qspi.c:820:16:QSPI_WriteEnable 96 static
+../BSP/stm32l475e_iot01_qspi.c:866:16:QSPI_AutoPollingMemReady 96 static
+../BSP/stm32l475e_iot01_qspi.c:903:16:QSPI_QuadMode 80 static
+../BSP/stm32l475e_iot01_qspi.c:992:16:QSPI_HighPerfMode 80 static
diff --git a/P3_SETR2/Debug/BSP/stm32l475e_iot01_tsensor.cyclo b/P3_SETR2/Debug/BSP/stm32l475e_iot01_tsensor.cyclo
new file mode 100644
index 0000000..5d441aa
--- /dev/null
+++ b/P3_SETR2/Debug/BSP/stm32l475e_iot01_tsensor.cyclo
@@ -0,0 +1,2 @@
+../BSP/stm32l475e_iot01_tsensor.c:51:10:BSP_TSENSOR_Init 1
+../BSP/stm32l475e_iot01_tsensor.c:76:7:BSP_TSENSOR_ReadTemp 1
diff --git a/P3_SETR2/Debug/BSP/stm32l475e_iot01_tsensor.d b/P3_SETR2/Debug/BSP/stm32l475e_iot01_tsensor.d
new file mode 100644
index 0000000..6d19673
--- /dev/null
+++ b/P3_SETR2/Debug/BSP/stm32l475e_iot01_tsensor.d
@@ -0,0 +1,80 @@
+BSP/stm32l475e_iot01_tsensor.o: ../BSP/stm32l475e_iot01_tsensor.c \
+ ../BSP/stm32l475e_iot01_tsensor.h ../BSP/stm32l475e_iot01.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h \
+ ../Core/Inc/stm32l4xx_hal_conf.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l475xx.h \
+ ../Drivers/CMSIS/Include/core_cm4.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dfsdm.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_usb.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_qspi.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h \
+ ../BSP/../Components/hts221/hts221.h \
+ ../BSP/../Components/hts221/../Common/hsensor.h \
+ ../BSP/../Components/hts221/../Common/tsensor.h
+../BSP/stm32l475e_iot01_tsensor.h:
+../BSP/stm32l475e_iot01.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:
+../Core/Inc/stm32l4xx_hal_conf.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l475xx.h:
+../Drivers/CMSIS/Include/core_cm4.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dfsdm.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_usb.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_qspi.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h:
+../BSP/../Components/hts221/hts221.h:
+../BSP/../Components/hts221/../Common/hsensor.h:
+../BSP/../Components/hts221/../Common/tsensor.h:
diff --git a/P3_SETR2/Debug/BSP/stm32l475e_iot01_tsensor.o b/P3_SETR2/Debug/BSP/stm32l475e_iot01_tsensor.o
new file mode 100644
index 0000000..d5413da
Binary files /dev/null and b/P3_SETR2/Debug/BSP/stm32l475e_iot01_tsensor.o differ
diff --git a/P3_SETR2/Debug/BSP/stm32l475e_iot01_tsensor.su b/P3_SETR2/Debug/BSP/stm32l475e_iot01_tsensor.su
new file mode 100644
index 0000000..bd7c0de
--- /dev/null
+++ b/P3_SETR2/Debug/BSP/stm32l475e_iot01_tsensor.su
@@ -0,0 +1,2 @@
+../BSP/stm32l475e_iot01_tsensor.c:51:10:BSP_TSENSOR_Init 16 static
+../BSP/stm32l475e_iot01_tsensor.c:76:7:BSP_TSENSOR_ReadTemp 8 static
diff --git a/P3_SETR2/Debug/BSP/subdir.mk b/P3_SETR2/Debug/BSP/subdir.mk
new file mode 100644
index 0000000..d9d974c
--- /dev/null
+++ b/P3_SETR2/Debug/BSP/subdir.mk
@@ -0,0 +1,48 @@
+################################################################################
+# Automatically-generated file. Do not edit!
+# Toolchain: GNU Tools for STM32 (13.3.rel1)
+################################################################################
+
+# Add inputs and outputs from these tool invocations to the build variables
+C_SRCS += \
+../BSP/stm32l475e_iot01.c \
+../BSP/stm32l475e_iot01_accelero.c \
+../BSP/stm32l475e_iot01_gyro.c \
+../BSP/stm32l475e_iot01_hsensor.c \
+../BSP/stm32l475e_iot01_magneto.c \
+../BSP/stm32l475e_iot01_psensor.c \
+../BSP/stm32l475e_iot01_qspi.c \
+../BSP/stm32l475e_iot01_tsensor.c
+
+OBJS += \
+./BSP/stm32l475e_iot01.o \
+./BSP/stm32l475e_iot01_accelero.o \
+./BSP/stm32l475e_iot01_gyro.o \
+./BSP/stm32l475e_iot01_hsensor.o \
+./BSP/stm32l475e_iot01_magneto.o \
+./BSP/stm32l475e_iot01_psensor.o \
+./BSP/stm32l475e_iot01_qspi.o \
+./BSP/stm32l475e_iot01_tsensor.o
+
+C_DEPS += \
+./BSP/stm32l475e_iot01.d \
+./BSP/stm32l475e_iot01_accelero.d \
+./BSP/stm32l475e_iot01_gyro.d \
+./BSP/stm32l475e_iot01_hsensor.d \
+./BSP/stm32l475e_iot01_magneto.d \
+./BSP/stm32l475e_iot01_psensor.d \
+./BSP/stm32l475e_iot01_qspi.d \
+./BSP/stm32l475e_iot01_tsensor.d
+
+
+# Each subdirectory must supply rules for building sources it contributes
+BSP/%.o BSP/%.su BSP/%.cyclo: ../BSP/%.c BSP/subdir.mk
+ arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g -DDEBUG -DUSE_HAL_DRIVER -DSTM32L475xx -c -I../Core/Inc -I../Components -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../BSP -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+
+clean: clean-BSP
+
+clean-BSP:
+ -$(RM) ./BSP/stm32l475e_iot01.cyclo ./BSP/stm32l475e_iot01.d ./BSP/stm32l475e_iot01.o ./BSP/stm32l475e_iot01.su ./BSP/stm32l475e_iot01_accelero.cyclo ./BSP/stm32l475e_iot01_accelero.d ./BSP/stm32l475e_iot01_accelero.o ./BSP/stm32l475e_iot01_accelero.su ./BSP/stm32l475e_iot01_gyro.cyclo ./BSP/stm32l475e_iot01_gyro.d ./BSP/stm32l475e_iot01_gyro.o ./BSP/stm32l475e_iot01_gyro.su ./BSP/stm32l475e_iot01_hsensor.cyclo ./BSP/stm32l475e_iot01_hsensor.d ./BSP/stm32l475e_iot01_hsensor.o ./BSP/stm32l475e_iot01_hsensor.su ./BSP/stm32l475e_iot01_magneto.cyclo ./BSP/stm32l475e_iot01_magneto.d ./BSP/stm32l475e_iot01_magneto.o ./BSP/stm32l475e_iot01_magneto.su ./BSP/stm32l475e_iot01_psensor.cyclo ./BSP/stm32l475e_iot01_psensor.d ./BSP/stm32l475e_iot01_psensor.o ./BSP/stm32l475e_iot01_psensor.su ./BSP/stm32l475e_iot01_qspi.cyclo ./BSP/stm32l475e_iot01_qspi.d ./BSP/stm32l475e_iot01_qspi.o ./BSP/stm32l475e_iot01_qspi.su ./BSP/stm32l475e_iot01_tsensor.cyclo ./BSP/stm32l475e_iot01_tsensor.d ./BSP/stm32l475e_iot01_tsensor.o ./BSP/stm32l475e_iot01_tsensor.su
+
+.PHONY: clean-BSP
+
diff --git a/P3_SETR2/Debug/Components/cs42l51/cs42l51.cyclo b/P3_SETR2/Debug/Components/cs42l51/cs42l51.cyclo
new file mode 100644
index 0000000..c53fb20
--- /dev/null
+++ b/P3_SETR2/Debug/Components/cs42l51/cs42l51.cyclo
@@ -0,0 +1,13 @@
+../Components/cs42l51/cs42l51.c:126:10:cs42l51_Init 4
+../Components/cs42l51/cs42l51.c:225:6:cs42l51_DeInit 1
+../Components/cs42l51/cs42l51.c:238:10:cs42l51_ReadID 2
+../Components/cs42l51/cs42l51.c:268:10:cs42l51_Play 4
+../Components/cs42l51/cs42l51.c:315:10:cs42l51_Pause 1
+../Components/cs42l51/cs42l51.c:331:10:cs42l51_Resume 1
+../Components/cs42l51/cs42l51.c:347:10:cs42l51_Stop 1
+../Components/cs42l51/cs42l51.c:375:10:cs42l51_SetVolume 2
+../Components/cs42l51/cs42l51.c:394:10:cs42l51_SetFrequency 1
+../Components/cs42l51/cs42l51.c:406:10:cs42l51_SetMute 2
+../Components/cs42l51/cs42l51.c:436:10:cs42l51_SetOutputMode 1
+../Components/cs42l51/cs42l51.c:446:10:cs42l51_Reset 2
+../Components/cs42l51/cs42l51.c:474:16:CODEC_IO_Write 1
diff --git a/P3_SETR2/Debug/Components/cs42l51/cs42l51.d b/P3_SETR2/Debug/Components/cs42l51/cs42l51.d
new file mode 100644
index 0000000..b0a6beb
--- /dev/null
+++ b/P3_SETR2/Debug/Components/cs42l51/cs42l51.d
@@ -0,0 +1,4 @@
+Components/cs42l51/cs42l51.o: ../Components/cs42l51/cs42l51.c \
+ ../Components/cs42l51/cs42l51.h ../Components/cs42l51/../Common/audio.h
+../Components/cs42l51/cs42l51.h:
+../Components/cs42l51/../Common/audio.h:
diff --git a/P3_SETR2/Debug/Components/cs42l51/cs42l51.o b/P3_SETR2/Debug/Components/cs42l51/cs42l51.o
new file mode 100644
index 0000000..d667f56
Binary files /dev/null and b/P3_SETR2/Debug/Components/cs42l51/cs42l51.o differ
diff --git a/P3_SETR2/Debug/Components/cs42l51/cs42l51.su b/P3_SETR2/Debug/Components/cs42l51/cs42l51.su
new file mode 100644
index 0000000..625c5e4
--- /dev/null
+++ b/P3_SETR2/Debug/Components/cs42l51/cs42l51.su
@@ -0,0 +1,13 @@
+../Components/cs42l51/cs42l51.c:126:10:cs42l51_Init 32 static
+../Components/cs42l51/cs42l51.c:225:6:cs42l51_DeInit 8 static
+../Components/cs42l51/cs42l51.c:238:10:cs42l51_ReadID 24 static
+../Components/cs42l51/cs42l51.c:268:10:cs42l51_Play 24 static
+../Components/cs42l51/cs42l51.c:315:10:cs42l51_Pause 24 static
+../Components/cs42l51/cs42l51.c:331:10:cs42l51_Resume 24 static
+../Components/cs42l51/cs42l51.c:347:10:cs42l51_Stop 24 static
+../Components/cs42l51/cs42l51.c:375:10:cs42l51_SetVolume 24 static
+../Components/cs42l51/cs42l51.c:394:10:cs42l51_SetFrequency 16 static
+../Components/cs42l51/cs42l51.c:406:10:cs42l51_SetMute 24 static
+../Components/cs42l51/cs42l51.c:436:10:cs42l51_SetOutputMode 16 static
+../Components/cs42l51/cs42l51.c:446:10:cs42l51_Reset 16 static
+../Components/cs42l51/cs42l51.c:474:16:CODEC_IO_Write 24 static
diff --git a/P3_SETR2/Debug/Components/cs42l51/subdir.mk b/P3_SETR2/Debug/Components/cs42l51/subdir.mk
new file mode 100644
index 0000000..3d6e85c
--- /dev/null
+++ b/P3_SETR2/Debug/Components/cs42l51/subdir.mk
@@ -0,0 +1,27 @@
+################################################################################
+# Automatically-generated file. Do not edit!
+# Toolchain: GNU Tools for STM32 (13.3.rel1)
+################################################################################
+
+# Add inputs and outputs from these tool invocations to the build variables
+C_SRCS += \
+../Components/cs42l51/cs42l51.c
+
+OBJS += \
+./Components/cs42l51/cs42l51.o
+
+C_DEPS += \
+./Components/cs42l51/cs42l51.d
+
+
+# Each subdirectory must supply rules for building sources it contributes
+Components/cs42l51/%.o Components/cs42l51/%.su Components/cs42l51/%.cyclo: ../Components/cs42l51/%.c Components/cs42l51/subdir.mk
+ arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g -DDEBUG -DUSE_HAL_DRIVER -DSTM32L475xx -c -I../Core/Inc -I../Components -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../BSP -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+
+clean: clean-Components-2f-cs42l51
+
+clean-Components-2f-cs42l51:
+ -$(RM) ./Components/cs42l51/cs42l51.cyclo ./Components/cs42l51/cs42l51.d ./Components/cs42l51/cs42l51.o ./Components/cs42l51/cs42l51.su
+
+.PHONY: clean-Components-2f-cs42l51
+
diff --git a/P3_SETR2/Debug/Components/cs43l22/cs43l22.cyclo b/P3_SETR2/Debug/Components/cs43l22/cs43l22.cyclo
new file mode 100644
index 0000000..15f29ee
--- /dev/null
+++ b/P3_SETR2/Debug/Components/cs43l22/cs43l22.cyclo
@@ -0,0 +1,13 @@
+../Components/cs43l22/cs43l22.c:117:10:cs43l22_Init 6
+../Components/cs43l22/cs43l22.c:201:6:cs43l22_DeInit 1
+../Components/cs43l22/cs43l22.c:212:10:cs43l22_ReadID 1
+../Components/cs43l22/cs43l22.c:230:10:cs43l22_Play 2
+../Components/cs43l22/cs43l22.c:256:10:cs43l22_Pause 1
+../Components/cs43l22/cs43l22.c:275:10:cs43l22_Resume 2
+../Components/cs43l22/cs43l22.c:303:10:cs43l22_Stop 1
+../Components/cs43l22/cs43l22.c:328:10:cs43l22_SetVolume 3
+../Components/cs43l22/cs43l22.c:355:10:cs43l22_SetFrequency 1
+../Components/cs43l22/cs43l22.c:367:10:cs43l22_SetMute 2
+../Components/cs43l22/cs43l22.c:396:10:cs43l22_SetOutputMode 5
+../Components/cs43l22/cs43l22.c:435:10:cs43l22_Reset 1
+../Components/cs43l22/cs43l22.c:447:16:CODEC_IO_Write 1
diff --git a/P3_SETR2/Debug/Components/cs43l22/cs43l22.d b/P3_SETR2/Debug/Components/cs43l22/cs43l22.d
new file mode 100644
index 0000000..cbb3989
--- /dev/null
+++ b/P3_SETR2/Debug/Components/cs43l22/cs43l22.d
@@ -0,0 +1,4 @@
+Components/cs43l22/cs43l22.o: ../Components/cs43l22/cs43l22.c \
+ ../Components/cs43l22/cs43l22.h ../Components/cs43l22/../Common/audio.h
+../Components/cs43l22/cs43l22.h:
+../Components/cs43l22/../Common/audio.h:
diff --git a/P3_SETR2/Debug/Components/cs43l22/cs43l22.o b/P3_SETR2/Debug/Components/cs43l22/cs43l22.o
new file mode 100644
index 0000000..511e71c
Binary files /dev/null and b/P3_SETR2/Debug/Components/cs43l22/cs43l22.o differ
diff --git a/P3_SETR2/Debug/Components/cs43l22/cs43l22.su b/P3_SETR2/Debug/Components/cs43l22/cs43l22.su
new file mode 100644
index 0000000..fb5a82d
--- /dev/null
+++ b/P3_SETR2/Debug/Components/cs43l22/cs43l22.su
@@ -0,0 +1,13 @@
+../Components/cs43l22/cs43l22.c:117:10:cs43l22_Init 32 static
+../Components/cs43l22/cs43l22.c:201:6:cs43l22_DeInit 8 static
+../Components/cs43l22/cs43l22.c:212:10:cs43l22_ReadID 24 static
+../Components/cs43l22/cs43l22.c:230:10:cs43l22_Play 24 static
+../Components/cs43l22/cs43l22.c:256:10:cs43l22_Pause 24 static
+../Components/cs43l22/cs43l22.c:275:10:cs43l22_Resume 24 static
+../Components/cs43l22/cs43l22.c:303:10:cs43l22_Stop 24 static
+../Components/cs43l22/cs43l22.c:328:10:cs43l22_SetVolume 24 static
+../Components/cs43l22/cs43l22.c:355:10:cs43l22_SetFrequency 16 static
+../Components/cs43l22/cs43l22.c:367:10:cs43l22_SetMute 24 static
+../Components/cs43l22/cs43l22.c:396:10:cs43l22_SetOutputMode 24 static
+../Components/cs43l22/cs43l22.c:435:10:cs43l22_Reset 16 static
+../Components/cs43l22/cs43l22.c:447:16:CODEC_IO_Write 24 static
diff --git a/P3_SETR2/Debug/Components/cs43l22/subdir.mk b/P3_SETR2/Debug/Components/cs43l22/subdir.mk
new file mode 100644
index 0000000..50db61d
--- /dev/null
+++ b/P3_SETR2/Debug/Components/cs43l22/subdir.mk
@@ -0,0 +1,27 @@
+################################################################################
+# Automatically-generated file. Do not edit!
+# Toolchain: GNU Tools for STM32 (13.3.rel1)
+################################################################################
+
+# Add inputs and outputs from these tool invocations to the build variables
+C_SRCS += \
+../Components/cs43l22/cs43l22.c
+
+OBJS += \
+./Components/cs43l22/cs43l22.o
+
+C_DEPS += \
+./Components/cs43l22/cs43l22.d
+
+
+# Each subdirectory must supply rules for building sources it contributes
+Components/cs43l22/%.o Components/cs43l22/%.su Components/cs43l22/%.cyclo: ../Components/cs43l22/%.c Components/cs43l22/subdir.mk
+ arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g -DDEBUG -DUSE_HAL_DRIVER -DSTM32L475xx -c -I../Core/Inc -I../Components -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../BSP -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+
+clean: clean-Components-2f-cs43l22
+
+clean-Components-2f-cs43l22:
+ -$(RM) ./Components/cs43l22/cs43l22.cyclo ./Components/cs43l22/cs43l22.d ./Components/cs43l22/cs43l22.o ./Components/cs43l22/cs43l22.su
+
+.PHONY: clean-Components-2f-cs43l22
+
diff --git a/P3_SETR2/Debug/Components/cy8c4014lqi/cy8c4014lqi.cyclo b/P3_SETR2/Debug/Components/cy8c4014lqi/cy8c4014lqi.cyclo
new file mode 100644
index 0000000..13a1549
--- /dev/null
+++ b/P3_SETR2/Debug/Components/cy8c4014lqi/cy8c4014lqi.cyclo
@@ -0,0 +1,15 @@
+../Components/cy8c4014lqi/cy8c4014lqi.c:132:6:cy8c4014lqi_Init 1
+../Components/cy8c4014lqi/cy8c4014lqi.c:144:6:cy8c4014lqi_Reset 1
+../Components/cy8c4014lqi/cy8c4014lqi.c:156:10:cy8c4014lqi_ReadID 1
+../Components/cy8c4014lqi/cy8c4014lqi.c:170:6:cy8c4014lqi_TS_Start 1
+../Components/cy8c4014lqi/cy8c4014lqi.c:183:9:cy8c4014lqi_TS_DetectTouch 1
+../Components/cy8c4014lqi/cy8c4014lqi.c:197:6:cy8c4014lqi_TS_GetXY 1
+../Components/cy8c4014lqi/cy8c4014lqi.c:210:6:cy8c4014lqi_TS_EnableIT 1
+../Components/cy8c4014lqi/cy8c4014lqi.c:222:6:cy8c4014lqi_TS_DisableIT 1
+../Components/cy8c4014lqi/cy8c4014lqi.c:236:9:cy8c4014lqi_TS_ITStatus 1
+../Components/cy8c4014lqi/cy8c4014lqi.c:249:6:cy8c4014lqi_TS_ClearIT 1
+../Components/cy8c4014lqi/cy8c4014lqi.c:262:6:cy8c4014lqi_TS_GestureConfig 1
+../Components/cy8c4014lqi/cy8c4014lqi.c:274:6:cy8c4014lqi_TS_GetGestureID 1
+../Components/cy8c4014lqi/cy8c4014lqi.c:295:6:cy8c4014lqi_TS_GetTouchInfo 1
+../Components/cy8c4014lqi/cy8c4014lqi.c:320:16:cy8c4014lqi_Get_I2C_InitializedStatus 1
+../Components/cy8c4014lqi/cy8c4014lqi.c:330:13:cy8c4014lqi_I2C_InitializeIfRequired 2
diff --git a/P3_SETR2/Debug/Components/cy8c4014lqi/cy8c4014lqi.d b/P3_SETR2/Debug/Components/cy8c4014lqi/cy8c4014lqi.d
new file mode 100644
index 0000000..0a9bf2e
--- /dev/null
+++ b/P3_SETR2/Debug/Components/cy8c4014lqi/cy8c4014lqi.d
@@ -0,0 +1,6 @@
+Components/cy8c4014lqi/cy8c4014lqi.o: \
+ ../Components/cy8c4014lqi/cy8c4014lqi.c \
+ ../Components/cy8c4014lqi/cy8c4014lqi.h \
+ ../Components/cy8c4014lqi/../Common/ts.h
+../Components/cy8c4014lqi/cy8c4014lqi.h:
+../Components/cy8c4014lqi/../Common/ts.h:
diff --git a/P3_SETR2/Debug/Components/cy8c4014lqi/cy8c4014lqi.o b/P3_SETR2/Debug/Components/cy8c4014lqi/cy8c4014lqi.o
new file mode 100644
index 0000000..41d981a
Binary files /dev/null and b/P3_SETR2/Debug/Components/cy8c4014lqi/cy8c4014lqi.o differ
diff --git a/P3_SETR2/Debug/Components/cy8c4014lqi/cy8c4014lqi.su b/P3_SETR2/Debug/Components/cy8c4014lqi/cy8c4014lqi.su
new file mode 100644
index 0000000..b9e97f6
--- /dev/null
+++ b/P3_SETR2/Debug/Components/cy8c4014lqi/cy8c4014lqi.su
@@ -0,0 +1,15 @@
+../Components/cy8c4014lqi/cy8c4014lqi.c:132:6:cy8c4014lqi_Init 16 static
+../Components/cy8c4014lqi/cy8c4014lqi.c:144:6:cy8c4014lqi_Reset 16 static
+../Components/cy8c4014lqi/cy8c4014lqi.c:156:10:cy8c4014lqi_ReadID 16 static
+../Components/cy8c4014lqi/cy8c4014lqi.c:170:6:cy8c4014lqi_TS_Start 16 static
+../Components/cy8c4014lqi/cy8c4014lqi.c:183:9:cy8c4014lqi_TS_DetectTouch 16 static
+../Components/cy8c4014lqi/cy8c4014lqi.c:197:6:cy8c4014lqi_TS_GetXY 24 static
+../Components/cy8c4014lqi/cy8c4014lqi.c:210:6:cy8c4014lqi_TS_EnableIT 16 static
+../Components/cy8c4014lqi/cy8c4014lqi.c:222:6:cy8c4014lqi_TS_DisableIT 16 static
+../Components/cy8c4014lqi/cy8c4014lqi.c:236:9:cy8c4014lqi_TS_ITStatus 16 static
+../Components/cy8c4014lqi/cy8c4014lqi.c:249:6:cy8c4014lqi_TS_ClearIT 16 static
+../Components/cy8c4014lqi/cy8c4014lqi.c:262:6:cy8c4014lqi_TS_GestureConfig 16 static
+../Components/cy8c4014lqi/cy8c4014lqi.c:274:6:cy8c4014lqi_TS_GetGestureID 16 static
+../Components/cy8c4014lqi/cy8c4014lqi.c:295:6:cy8c4014lqi_TS_GetTouchInfo 24 static
+../Components/cy8c4014lqi/cy8c4014lqi.c:320:16:cy8c4014lqi_Get_I2C_InitializedStatus 4 static
+../Components/cy8c4014lqi/cy8c4014lqi.c:330:13:cy8c4014lqi_I2C_InitializeIfRequired 8 static
diff --git a/P3_SETR2/Debug/Components/cy8c4014lqi/subdir.mk b/P3_SETR2/Debug/Components/cy8c4014lqi/subdir.mk
new file mode 100644
index 0000000..5b62ff9
--- /dev/null
+++ b/P3_SETR2/Debug/Components/cy8c4014lqi/subdir.mk
@@ -0,0 +1,27 @@
+################################################################################
+# Automatically-generated file. Do not edit!
+# Toolchain: GNU Tools for STM32 (13.3.rel1)
+################################################################################
+
+# Add inputs and outputs from these tool invocations to the build variables
+C_SRCS += \
+../Components/cy8c4014lqi/cy8c4014lqi.c
+
+OBJS += \
+./Components/cy8c4014lqi/cy8c4014lqi.o
+
+C_DEPS += \
+./Components/cy8c4014lqi/cy8c4014lqi.d
+
+
+# Each subdirectory must supply rules for building sources it contributes
+Components/cy8c4014lqi/%.o Components/cy8c4014lqi/%.su Components/cy8c4014lqi/%.cyclo: ../Components/cy8c4014lqi/%.c Components/cy8c4014lqi/subdir.mk
+ arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g -DDEBUG -DUSE_HAL_DRIVER -DSTM32L475xx -c -I../Core/Inc -I../Components -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../BSP -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+
+clean: clean-Components-2f-cy8c4014lqi
+
+clean-Components-2f-cy8c4014lqi:
+ -$(RM) ./Components/cy8c4014lqi/cy8c4014lqi.cyclo ./Components/cy8c4014lqi/cy8c4014lqi.d ./Components/cy8c4014lqi/cy8c4014lqi.o ./Components/cy8c4014lqi/cy8c4014lqi.su
+
+.PHONY: clean-Components-2f-cy8c4014lqi
+
diff --git a/P3_SETR2/Debug/Components/ft3x67/ft3x67.cyclo b/P3_SETR2/Debug/Components/ft3x67/ft3x67.cyclo
new file mode 100644
index 0000000..521cb68
--- /dev/null
+++ b/P3_SETR2/Debug/Components/ft3x67/ft3x67.cyclo
@@ -0,0 +1,16 @@
+../Components/ft3x67/ft3x67.c:115:6:ft3x67_Init 1
+../Components/ft3x67/ft3x67.c:127:6:ft3x67_Reset 1
+../Components/ft3x67/ft3x67.c:139:10:ft3x67_ReadID 1
+../Components/ft3x67/ft3x67.c:153:6:ft3x67_TS_Start 1
+../Components/ft3x67/ft3x67.c:170:9:ft3x67_TS_DetectTouch 2
+../Components/ft3x67/ft3x67.c:202:6:ft3x67_TS_GetXY 4
+../Components/ft3x67/ft3x67.c:243:6:ft3x67_TS_EnableIT 1
+../Components/ft3x67/ft3x67.c:255:6:ft3x67_TS_DisableIT 1
+../Components/ft3x67/ft3x67.c:269:9:ft3x67_TS_ITStatus 1
+../Components/ft3x67/ft3x67.c:282:6:ft3x67_TS_ClearIT 1
+../Components/ft3x67/ft3x67.c:294:6:ft3x67_TS_GestureConfig 2
+../Components/ft3x67/ft3x67.c:316:6:ft3x67_TS_GetGestureID 1
+../Components/ft3x67/ft3x67.c:340:6:ft3x67_TS_GetTouchInfo 4
+../Components/ft3x67/ft3x67.c:389:16:ft3x67_Get_I2C_InitializedStatus 1
+../Components/ft3x67/ft3x67.c:399:13:ft3x67_I2C_InitializeIfRequired 2
+../Components/ft3x67/ft3x67.c:416:17:ft3x67_TS_Configure 1
diff --git a/P3_SETR2/Debug/Components/ft3x67/ft3x67.d b/P3_SETR2/Debug/Components/ft3x67/ft3x67.d
new file mode 100644
index 0000000..82ccd2f
--- /dev/null
+++ b/P3_SETR2/Debug/Components/ft3x67/ft3x67.d
@@ -0,0 +1,4 @@
+Components/ft3x67/ft3x67.o: ../Components/ft3x67/ft3x67.c \
+ ../Components/ft3x67/ft3x67.h ../Components/ft3x67/../Common/ts.h
+../Components/ft3x67/ft3x67.h:
+../Components/ft3x67/../Common/ts.h:
diff --git a/P3_SETR2/Debug/Components/ft3x67/ft3x67.o b/P3_SETR2/Debug/Components/ft3x67/ft3x67.o
new file mode 100644
index 0000000..9d208c1
Binary files /dev/null and b/P3_SETR2/Debug/Components/ft3x67/ft3x67.o differ
diff --git a/P3_SETR2/Debug/Components/ft3x67/ft3x67.su b/P3_SETR2/Debug/Components/ft3x67/ft3x67.su
new file mode 100644
index 0000000..44d17b7
--- /dev/null
+++ b/P3_SETR2/Debug/Components/ft3x67/ft3x67.su
@@ -0,0 +1,16 @@
+../Components/ft3x67/ft3x67.c:115:6:ft3x67_Init 16 static
+../Components/ft3x67/ft3x67.c:127:6:ft3x67_Reset 16 static
+../Components/ft3x67/ft3x67.c:139:10:ft3x67_ReadID 16 static
+../Components/ft3x67/ft3x67.c:153:6:ft3x67_TS_Start 16 static
+../Components/ft3x67/ft3x67.c:170:9:ft3x67_TS_DetectTouch 24 static
+../Components/ft3x67/ft3x67.c:202:6:ft3x67_TS_GetXY 32 static
+../Components/ft3x67/ft3x67.c:243:6:ft3x67_TS_EnableIT 16 static
+../Components/ft3x67/ft3x67.c:255:6:ft3x67_TS_DisableIT 16 static
+../Components/ft3x67/ft3x67.c:269:9:ft3x67_TS_ITStatus 16 static
+../Components/ft3x67/ft3x67.c:282:6:ft3x67_TS_ClearIT 16 static
+../Components/ft3x67/ft3x67.c:294:6:ft3x67_TS_GestureConfig 16 static
+../Components/ft3x67/ft3x67.c:316:6:ft3x67_TS_GetGestureID 24 static
+../Components/ft3x67/ft3x67.c:340:6:ft3x67_TS_GetTouchInfo 32 static
+../Components/ft3x67/ft3x67.c:389:16:ft3x67_Get_I2C_InitializedStatus 4 static
+../Components/ft3x67/ft3x67.c:399:13:ft3x67_I2C_InitializeIfRequired 8 static
+../Components/ft3x67/ft3x67.c:416:17:ft3x67_TS_Configure 24 static
diff --git a/P3_SETR2/Debug/Components/ft3x67/subdir.mk b/P3_SETR2/Debug/Components/ft3x67/subdir.mk
new file mode 100644
index 0000000..cb56309
--- /dev/null
+++ b/P3_SETR2/Debug/Components/ft3x67/subdir.mk
@@ -0,0 +1,27 @@
+################################################################################
+# Automatically-generated file. Do not edit!
+# Toolchain: GNU Tools for STM32 (13.3.rel1)
+################################################################################
+
+# Add inputs and outputs from these tool invocations to the build variables
+C_SRCS += \
+../Components/ft3x67/ft3x67.c
+
+OBJS += \
+./Components/ft3x67/ft3x67.o
+
+C_DEPS += \
+./Components/ft3x67/ft3x67.d
+
+
+# Each subdirectory must supply rules for building sources it contributes
+Components/ft3x67/%.o Components/ft3x67/%.su Components/ft3x67/%.cyclo: ../Components/ft3x67/%.c Components/ft3x67/subdir.mk
+ arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g -DDEBUG -DUSE_HAL_DRIVER -DSTM32L475xx -c -I../Core/Inc -I../Components -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../BSP -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+
+clean: clean-Components-2f-ft3x67
+
+clean-Components-2f-ft3x67:
+ -$(RM) ./Components/ft3x67/ft3x67.cyclo ./Components/ft3x67/ft3x67.d ./Components/ft3x67/ft3x67.o ./Components/ft3x67/ft3x67.su
+
+.PHONY: clean-Components-2f-ft3x67
+
diff --git a/P3_SETR2/Debug/Components/ft5336/ft5336.cyclo b/P3_SETR2/Debug/Components/ft5336/ft5336.cyclo
new file mode 100644
index 0000000..9b4136e
--- /dev/null
+++ b/P3_SETR2/Debug/Components/ft5336/ft5336.cyclo
@@ -0,0 +1,15 @@
+../Components/ft5336/ft5336.c:129:6:ft5336_Init 1
+../Components/ft5336/ft5336.c:145:6:ft5336_Reset 1
+../Components/ft5336/ft5336.c:157:10:ft5336_ReadID 4
+../Components/ft5336/ft5336.c:189:6:ft5336_TS_Start 1
+../Components/ft5336/ft5336.c:206:9:ft5336_TS_DetectTouch 2
+../Components/ft5336/ft5336.c:238:6:ft5336_TS_GetXY 12
+../Components/ft5336/ft5336.c:359:6:ft5336_TS_EnableIT 1
+../Components/ft5336/ft5336.c:374:6:ft5336_TS_DisableIT 1
+../Components/ft5336/ft5336.c:391:9:ft5336_TS_ITStatus 1
+../Components/ft5336/ft5336.c:404:6:ft5336_TS_ClearIT 1
+../Components/ft5336/ft5336.c:419:6:ft5336_TS_GetGestureID 1
+../Components/ft5336/ft5336.c:443:6:ft5336_TS_GetTouchInfo 12
+../Components/ft5336/ft5336.c:552:16:ft5336_Get_I2C_InitializedStatus 1
+../Components/ft5336/ft5336.c:562:13:ft5336_I2C_InitializeIfRequired 2
+../Components/ft5336/ft5336.c:579:17:ft5336_TS_Configure 1
diff --git a/P3_SETR2/Debug/Components/ft5336/ft5336.d b/P3_SETR2/Debug/Components/ft5336/ft5336.d
new file mode 100644
index 0000000..b4a126b
--- /dev/null
+++ b/P3_SETR2/Debug/Components/ft5336/ft5336.d
@@ -0,0 +1,4 @@
+Components/ft5336/ft5336.o: ../Components/ft5336/ft5336.c \
+ ../Components/ft5336/ft5336.h ../Components/ft5336/../Common/ts.h
+../Components/ft5336/ft5336.h:
+../Components/ft5336/../Common/ts.h:
diff --git a/P3_SETR2/Debug/Components/ft5336/ft5336.o b/P3_SETR2/Debug/Components/ft5336/ft5336.o
new file mode 100644
index 0000000..fe55599
Binary files /dev/null and b/P3_SETR2/Debug/Components/ft5336/ft5336.o differ
diff --git a/P3_SETR2/Debug/Components/ft5336/ft5336.su b/P3_SETR2/Debug/Components/ft5336/ft5336.su
new file mode 100644
index 0000000..ff5144d
--- /dev/null
+++ b/P3_SETR2/Debug/Components/ft5336/ft5336.su
@@ -0,0 +1,15 @@
+../Components/ft5336/ft5336.c:129:6:ft5336_Init 16 static
+../Components/ft5336/ft5336.c:145:6:ft5336_Reset 16 static
+../Components/ft5336/ft5336.c:157:10:ft5336_ReadID 24 static
+../Components/ft5336/ft5336.c:189:6:ft5336_TS_Start 16 static
+../Components/ft5336/ft5336.c:206:9:ft5336_TS_DetectTouch 24 static
+../Components/ft5336/ft5336.c:238:6:ft5336_TS_GetXY 32 static
+../Components/ft5336/ft5336.c:359:6:ft5336_TS_EnableIT 24 static
+../Components/ft5336/ft5336.c:374:6:ft5336_TS_DisableIT 24 static
+../Components/ft5336/ft5336.c:391:9:ft5336_TS_ITStatus 16 static
+../Components/ft5336/ft5336.c:404:6:ft5336_TS_ClearIT 16 static
+../Components/ft5336/ft5336.c:419:6:ft5336_TS_GetGestureID 24 static
+../Components/ft5336/ft5336.c:443:6:ft5336_TS_GetTouchInfo 32 static
+../Components/ft5336/ft5336.c:552:16:ft5336_Get_I2C_InitializedStatus 4 static
+../Components/ft5336/ft5336.c:562:13:ft5336_I2C_InitializeIfRequired 8 static
+../Components/ft5336/ft5336.c:579:17:ft5336_TS_Configure 24 static
diff --git a/P3_SETR2/Debug/Components/ft5336/subdir.mk b/P3_SETR2/Debug/Components/ft5336/subdir.mk
new file mode 100644
index 0000000..931c3d2
--- /dev/null
+++ b/P3_SETR2/Debug/Components/ft5336/subdir.mk
@@ -0,0 +1,27 @@
+################################################################################
+# Automatically-generated file. Do not edit!
+# Toolchain: GNU Tools for STM32 (13.3.rel1)
+################################################################################
+
+# Add inputs and outputs from these tool invocations to the build variables
+C_SRCS += \
+../Components/ft5336/ft5336.c
+
+OBJS += \
+./Components/ft5336/ft5336.o
+
+C_DEPS += \
+./Components/ft5336/ft5336.d
+
+
+# Each subdirectory must supply rules for building sources it contributes
+Components/ft5336/%.o Components/ft5336/%.su Components/ft5336/%.cyclo: ../Components/ft5336/%.c Components/ft5336/subdir.mk
+ arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g -DDEBUG -DUSE_HAL_DRIVER -DSTM32L475xx -c -I../Core/Inc -I../Components -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../BSP -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+
+clean: clean-Components-2f-ft5336
+
+clean-Components-2f-ft5336:
+ -$(RM) ./Components/ft5336/ft5336.cyclo ./Components/ft5336/ft5336.d ./Components/ft5336/ft5336.o ./Components/ft5336/ft5336.su
+
+.PHONY: clean-Components-2f-ft5336
+
diff --git a/P3_SETR2/Debug/Components/ft6x06/ft6x06.cyclo b/P3_SETR2/Debug/Components/ft6x06/ft6x06.cyclo
new file mode 100644
index 0000000..cec1b3b
--- /dev/null
+++ b/P3_SETR2/Debug/Components/ft6x06/ft6x06.cyclo
@@ -0,0 +1,12 @@
+../Components/ft6x06/ft6x06.c:114:6:ft6x06_Init 3
+../Components/ft6x06/ft6x06.c:145:6:ft6x06_Reset 1
+../Components/ft6x06/ft6x06.c:157:10:ft6x06_ReadID 1
+../Components/ft6x06/ft6x06.c:173:6:ft6x06_TS_Start 1
+../Components/ft6x06/ft6x06.c:195:9:ft6x06_TS_DetectTouch 2
+../Components/ft6x06/ft6x06.c:227:6:ft6x06_TS_GetXY 4
+../Components/ft6x06/ft6x06.c:266:6:ft6x06_TS_EnableIT 1
+../Components/ft6x06/ft6x06.c:281:6:ft6x06_TS_DisableIT 1
+../Components/ft6x06/ft6x06.c:298:9:ft6x06_TS_ITStatus 1
+../Components/ft6x06/ft6x06.c:311:6:ft6x06_TS_ClearIT 1
+../Components/ft6x06/ft6x06.c:449:17:ft6x06_TS_Configure 1
+../Components/ft6x06/ft6x06.c:464:16:ft6x06_GetInstance 3
diff --git a/P3_SETR2/Debug/Components/ft6x06/ft6x06.d b/P3_SETR2/Debug/Components/ft6x06/ft6x06.d
new file mode 100644
index 0000000..8e64b21
--- /dev/null
+++ b/P3_SETR2/Debug/Components/ft6x06/ft6x06.d
@@ -0,0 +1,4 @@
+Components/ft6x06/ft6x06.o: ../Components/ft6x06/ft6x06.c \
+ ../Components/ft6x06/ft6x06.h ../Components/ft6x06/../Common/ts.h
+../Components/ft6x06/ft6x06.h:
+../Components/ft6x06/../Common/ts.h:
diff --git a/P3_SETR2/Debug/Components/ft6x06/ft6x06.o b/P3_SETR2/Debug/Components/ft6x06/ft6x06.o
new file mode 100644
index 0000000..2e702cd
Binary files /dev/null and b/P3_SETR2/Debug/Components/ft6x06/ft6x06.o differ
diff --git a/P3_SETR2/Debug/Components/ft6x06/ft6x06.su b/P3_SETR2/Debug/Components/ft6x06/ft6x06.su
new file mode 100644
index 0000000..5dd25e1
--- /dev/null
+++ b/P3_SETR2/Debug/Components/ft6x06/ft6x06.su
@@ -0,0 +1,12 @@
+../Components/ft6x06/ft6x06.c:114:6:ft6x06_Init 24 static
+../Components/ft6x06/ft6x06.c:145:6:ft6x06_Reset 16 static
+../Components/ft6x06/ft6x06.c:157:10:ft6x06_ReadID 16 static
+../Components/ft6x06/ft6x06.c:173:6:ft6x06_TS_Start 16 static
+../Components/ft6x06/ft6x06.c:195:9:ft6x06_TS_DetectTouch 24 static
+../Components/ft6x06/ft6x06.c:227:6:ft6x06_TS_GetXY 32 static
+../Components/ft6x06/ft6x06.c:266:6:ft6x06_TS_EnableIT 24 static
+../Components/ft6x06/ft6x06.c:281:6:ft6x06_TS_DisableIT 24 static
+../Components/ft6x06/ft6x06.c:298:9:ft6x06_TS_ITStatus 16 static
+../Components/ft6x06/ft6x06.c:311:6:ft6x06_TS_ClearIT 16 static
+../Components/ft6x06/ft6x06.c:449:17:ft6x06_TS_Configure 24 static
+../Components/ft6x06/ft6x06.c:464:16:ft6x06_GetInstance 24 static
diff --git a/P3_SETR2/Debug/Components/ft6x06/subdir.mk b/P3_SETR2/Debug/Components/ft6x06/subdir.mk
new file mode 100644
index 0000000..e6e70b8
--- /dev/null
+++ b/P3_SETR2/Debug/Components/ft6x06/subdir.mk
@@ -0,0 +1,27 @@
+################################################################################
+# Automatically-generated file. Do not edit!
+# Toolchain: GNU Tools for STM32 (13.3.rel1)
+################################################################################
+
+# Add inputs and outputs from these tool invocations to the build variables
+C_SRCS += \
+../Components/ft6x06/ft6x06.c
+
+OBJS += \
+./Components/ft6x06/ft6x06.o
+
+C_DEPS += \
+./Components/ft6x06/ft6x06.d
+
+
+# Each subdirectory must supply rules for building sources it contributes
+Components/ft6x06/%.o Components/ft6x06/%.su Components/ft6x06/%.cyclo: ../Components/ft6x06/%.c Components/ft6x06/subdir.mk
+ arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g -DDEBUG -DUSE_HAL_DRIVER -DSTM32L475xx -c -I../Core/Inc -I../Components -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../BSP -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+
+clean: clean-Components-2f-ft6x06
+
+clean-Components-2f-ft6x06:
+ -$(RM) ./Components/ft6x06/ft6x06.cyclo ./Components/ft6x06/ft6x06.d ./Components/ft6x06/ft6x06.o ./Components/ft6x06/ft6x06.su
+
+.PHONY: clean-Components-2f-ft6x06
+
diff --git a/P3_SETR2/Debug/Components/hts221/hts221.cyclo b/P3_SETR2/Debug/Components/hts221/hts221.cyclo
new file mode 100644
index 0000000..26a952a
--- /dev/null
+++ b/P3_SETR2/Debug/Components/hts221/hts221.cyclo
@@ -0,0 +1,5 @@
+../Components/hts221/hts221.c:65:6:HTS221_H_Init 1
+../Components/hts221/hts221.c:91:9:HTS221_H_ReadID 1
+../Components/hts221/hts221.c:108:7:HTS221_H_ReadHumidity 3
+../Components/hts221/hts221.c:157:6:HTS221_T_Init 1
+../Components/hts221/hts221.c:184:7:HTS221_T_ReadTemp 1
diff --git a/P3_SETR2/Debug/Components/hts221/hts221.d b/P3_SETR2/Debug/Components/hts221/hts221.d
new file mode 100644
index 0000000..5c1cb14
--- /dev/null
+++ b/P3_SETR2/Debug/Components/hts221/hts221.d
@@ -0,0 +1,6 @@
+Components/hts221/hts221.o: ../Components/hts221/hts221.c \
+ ../Components/hts221/hts221.h ../Components/hts221/../Common/hsensor.h \
+ ../Components/hts221/../Common/tsensor.h
+../Components/hts221/hts221.h:
+../Components/hts221/../Common/hsensor.h:
+../Components/hts221/../Common/tsensor.h:
diff --git a/P3_SETR2/Debug/Components/hts221/hts221.o b/P3_SETR2/Debug/Components/hts221/hts221.o
new file mode 100644
index 0000000..300909c
Binary files /dev/null and b/P3_SETR2/Debug/Components/hts221/hts221.o differ
diff --git a/P3_SETR2/Debug/Components/hts221/hts221.su b/P3_SETR2/Debug/Components/hts221/hts221.su
new file mode 100644
index 0000000..cf401fd
--- /dev/null
+++ b/P3_SETR2/Debug/Components/hts221/hts221.su
@@ -0,0 +1,5 @@
+../Components/hts221/hts221.c:65:6:HTS221_H_Init 24 static
+../Components/hts221/hts221.c:91:9:HTS221_H_ReadID 24 static
+../Components/hts221/hts221.c:108:7:HTS221_H_ReadHumidity 40 static
+../Components/hts221/hts221.c:157:6:HTS221_T_Init 24 static
+../Components/hts221/hts221.c:184:7:HTS221_T_ReadTemp 40 static
diff --git a/P3_SETR2/Debug/Components/hts221/subdir.mk b/P3_SETR2/Debug/Components/hts221/subdir.mk
new file mode 100644
index 0000000..e463a1c
--- /dev/null
+++ b/P3_SETR2/Debug/Components/hts221/subdir.mk
@@ -0,0 +1,27 @@
+################################################################################
+# Automatically-generated file. Do not edit!
+# Toolchain: GNU Tools for STM32 (13.3.rel1)
+################################################################################
+
+# Add inputs and outputs from these tool invocations to the build variables
+C_SRCS += \
+../Components/hts221/hts221.c
+
+OBJS += \
+./Components/hts221/hts221.o
+
+C_DEPS += \
+./Components/hts221/hts221.d
+
+
+# Each subdirectory must supply rules for building sources it contributes
+Components/hts221/%.o Components/hts221/%.su Components/hts221/%.cyclo: ../Components/hts221/%.c Components/hts221/subdir.mk
+ arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g -DDEBUG -DUSE_HAL_DRIVER -DSTM32L475xx -c -I../Core/Inc -I../Components -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../BSP -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+
+clean: clean-Components-2f-hts221
+
+clean-Components-2f-hts221:
+ -$(RM) ./Components/hts221/hts221.cyclo ./Components/hts221/hts221.d ./Components/hts221/hts221.o ./Components/hts221/hts221.su
+
+.PHONY: clean-Components-2f-hts221
+
diff --git a/P3_SETR2/Debug/Components/hx8347g/hx8347g.cyclo b/P3_SETR2/Debug/Components/hx8347g/hx8347g.cyclo
new file mode 100644
index 0000000..a4eafc7
--- /dev/null
+++ b/P3_SETR2/Debug/Components/hx8347g/hx8347g.cyclo
@@ -0,0 +1,15 @@
+../Components/hx8347g/hx8347g.c:105:6:hx8347g_Init 2
+../Components/hx8347g/hx8347g.c:185:6:hx8347g_DisplayOn 1
+../Components/hx8347g/hx8347g.c:209:6:hx8347g_DisplayOff 1
+../Components/hx8347g/hx8347g.c:230:10:hx8347g_GetLcdPixelWidth 1
+../Components/hx8347g/hx8347g.c:240:10:hx8347g_GetLcdPixelHeight 1
+../Components/hx8347g/hx8347g.c:250:10:hx8347g_ReadID 2
+../Components/hx8347g/hx8347g.c:268:6:hx8347g_SetCursor 1
+../Components/hx8347g/hx8347g.c:283:6:hx8347g_WritePixel 1
+../Components/hx8347g/hx8347g.c:300:10:hx8347g_ReadPixel 1
+../Components/hx8347g/hx8347g.c:318:6:hx8347g_WriteReg 1
+../Components/hx8347g/hx8347g.c:331:10:hx8347g_ReadReg 1
+../Components/hx8347g/hx8347g.c:348:6:hx8347g_SetDisplayWindow 1
+../Components/hx8347g/hx8347g.c:375:6:hx8347g_DrawHLine 2
+../Components/hx8347g/hx8347g.c:402:6:hx8347g_DrawVLine 2
+../Components/hx8347g/hx8347g.c:427:6:hx8347g_DrawBitmap 1
diff --git a/P3_SETR2/Debug/Components/hx8347g/hx8347g.d b/P3_SETR2/Debug/Components/hx8347g/hx8347g.d
new file mode 100644
index 0000000..f5320be
--- /dev/null
+++ b/P3_SETR2/Debug/Components/hx8347g/hx8347g.d
@@ -0,0 +1,4 @@
+Components/hx8347g/hx8347g.o: ../Components/hx8347g/hx8347g.c \
+ ../Components/hx8347g/hx8347g.h ../Components/hx8347g/../Common/lcd.h
+../Components/hx8347g/hx8347g.h:
+../Components/hx8347g/../Common/lcd.h:
diff --git a/P3_SETR2/Debug/Components/hx8347g/hx8347g.o b/P3_SETR2/Debug/Components/hx8347g/hx8347g.o
new file mode 100644
index 0000000..34b22f0
Binary files /dev/null and b/P3_SETR2/Debug/Components/hx8347g/hx8347g.o differ
diff --git a/P3_SETR2/Debug/Components/hx8347g/hx8347g.su b/P3_SETR2/Debug/Components/hx8347g/hx8347g.su
new file mode 100644
index 0000000..2dfadba
--- /dev/null
+++ b/P3_SETR2/Debug/Components/hx8347g/hx8347g.su
@@ -0,0 +1,15 @@
+../Components/hx8347g/hx8347g.c:105:6:hx8347g_Init 16 static
+../Components/hx8347g/hx8347g.c:185:6:hx8347g_DisplayOn 8 static
+../Components/hx8347g/hx8347g.c:209:6:hx8347g_DisplayOff 8 static
+../Components/hx8347g/hx8347g.c:230:10:hx8347g_GetLcdPixelWidth 4 static
+../Components/hx8347g/hx8347g.c:240:10:hx8347g_GetLcdPixelHeight 4 static
+../Components/hx8347g/hx8347g.c:250:10:hx8347g_ReadID 8 static
+../Components/hx8347g/hx8347g.c:268:6:hx8347g_SetCursor 16 static
+../Components/hx8347g/hx8347g.c:283:6:hx8347g_WritePixel 16 static
+../Components/hx8347g/hx8347g.c:300:10:hx8347g_ReadPixel 16 static
+../Components/hx8347g/hx8347g.c:318:6:hx8347g_WriteReg 16 static
+../Components/hx8347g/hx8347g.c:331:10:hx8347g_ReadReg 16 static
+../Components/hx8347g/hx8347g.c:348:6:hx8347g_SetDisplayWindow 24 static
+../Components/hx8347g/hx8347g.c:375:6:hx8347g_DrawHLine 32 static
+../Components/hx8347g/hx8347g.c:402:6:hx8347g_DrawVLine 32 static
+../Components/hx8347g/hx8347g.c:427:6:hx8347g_DrawBitmap 24 static
diff --git a/P3_SETR2/Debug/Components/hx8347g/subdir.mk b/P3_SETR2/Debug/Components/hx8347g/subdir.mk
new file mode 100644
index 0000000..c37baf0
--- /dev/null
+++ b/P3_SETR2/Debug/Components/hx8347g/subdir.mk
@@ -0,0 +1,27 @@
+################################################################################
+# Automatically-generated file. Do not edit!
+# Toolchain: GNU Tools for STM32 (13.3.rel1)
+################################################################################
+
+# Add inputs and outputs from these tool invocations to the build variables
+C_SRCS += \
+../Components/hx8347g/hx8347g.c
+
+OBJS += \
+./Components/hx8347g/hx8347g.o
+
+C_DEPS += \
+./Components/hx8347g/hx8347g.d
+
+
+# Each subdirectory must supply rules for building sources it contributes
+Components/hx8347g/%.o Components/hx8347g/%.su Components/hx8347g/%.cyclo: ../Components/hx8347g/%.c Components/hx8347g/subdir.mk
+ arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g -DDEBUG -DUSE_HAL_DRIVER -DSTM32L475xx -c -I../Core/Inc -I../Components -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../BSP -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+
+clean: clean-Components-2f-hx8347g
+
+clean-Components-2f-hx8347g:
+ -$(RM) ./Components/hx8347g/hx8347g.cyclo ./Components/hx8347g/hx8347g.d ./Components/hx8347g/hx8347g.o ./Components/hx8347g/hx8347g.su
+
+.PHONY: clean-Components-2f-hx8347g
+
diff --git a/P3_SETR2/Debug/Components/hx8347i/hx8347i.cyclo b/P3_SETR2/Debug/Components/hx8347i/hx8347i.cyclo
new file mode 100644
index 0000000..610ee13
--- /dev/null
+++ b/P3_SETR2/Debug/Components/hx8347i/hx8347i.cyclo
@@ -0,0 +1,15 @@
+../Components/hx8347i/hx8347i.c:105:6:hx8347i_Init 2
+../Components/hx8347i/hx8347i.c:185:6:hx8347i_DisplayOn 1
+../Components/hx8347i/hx8347i.c:215:6:hx8347i_DisplayOff 1
+../Components/hx8347i/hx8347i.c:236:10:hx8347i_GetLcdPixelWidth 1
+../Components/hx8347i/hx8347i.c:246:10:hx8347i_GetLcdPixelHeight 1
+../Components/hx8347i/hx8347i.c:256:10:hx8347i_ReadID 2
+../Components/hx8347i/hx8347i.c:274:6:hx8347i_SetCursor 1
+../Components/hx8347i/hx8347i.c:289:6:hx8347i_WritePixel 1
+../Components/hx8347i/hx8347i.c:306:10:hx8347i_ReadPixel 1
+../Components/hx8347i/hx8347i.c:324:6:hx8347i_WriteReg 1
+../Components/hx8347i/hx8347i.c:337:10:hx8347i_ReadReg 1
+../Components/hx8347i/hx8347i.c:354:6:hx8347i_SetDisplayWindow 1
+../Components/hx8347i/hx8347i.c:381:6:hx8347i_DrawHLine 2
+../Components/hx8347i/hx8347i.c:408:6:hx8347i_DrawVLine 2
+../Components/hx8347i/hx8347i.c:433:6:hx8347i_DrawBitmap 1
diff --git a/P3_SETR2/Debug/Components/hx8347i/hx8347i.d b/P3_SETR2/Debug/Components/hx8347i/hx8347i.d
new file mode 100644
index 0000000..685a87b
--- /dev/null
+++ b/P3_SETR2/Debug/Components/hx8347i/hx8347i.d
@@ -0,0 +1,4 @@
+Components/hx8347i/hx8347i.o: ../Components/hx8347i/hx8347i.c \
+ ../Components/hx8347i/hx8347i.h ../Components/hx8347i/../Common/lcd.h
+../Components/hx8347i/hx8347i.h:
+../Components/hx8347i/../Common/lcd.h:
diff --git a/P3_SETR2/Debug/Components/hx8347i/hx8347i.o b/P3_SETR2/Debug/Components/hx8347i/hx8347i.o
new file mode 100644
index 0000000..87f53b3
Binary files /dev/null and b/P3_SETR2/Debug/Components/hx8347i/hx8347i.o differ
diff --git a/P3_SETR2/Debug/Components/hx8347i/hx8347i.su b/P3_SETR2/Debug/Components/hx8347i/hx8347i.su
new file mode 100644
index 0000000..036761a
--- /dev/null
+++ b/P3_SETR2/Debug/Components/hx8347i/hx8347i.su
@@ -0,0 +1,15 @@
+../Components/hx8347i/hx8347i.c:105:6:hx8347i_Init 16 static
+../Components/hx8347i/hx8347i.c:185:6:hx8347i_DisplayOn 8 static
+../Components/hx8347i/hx8347i.c:215:6:hx8347i_DisplayOff 8 static
+../Components/hx8347i/hx8347i.c:236:10:hx8347i_GetLcdPixelWidth 4 static
+../Components/hx8347i/hx8347i.c:246:10:hx8347i_GetLcdPixelHeight 4 static
+../Components/hx8347i/hx8347i.c:256:10:hx8347i_ReadID 8 static
+../Components/hx8347i/hx8347i.c:274:6:hx8347i_SetCursor 16 static
+../Components/hx8347i/hx8347i.c:289:6:hx8347i_WritePixel 16 static
+../Components/hx8347i/hx8347i.c:306:10:hx8347i_ReadPixel 16 static
+../Components/hx8347i/hx8347i.c:324:6:hx8347i_WriteReg 16 static
+../Components/hx8347i/hx8347i.c:337:10:hx8347i_ReadReg 16 static
+../Components/hx8347i/hx8347i.c:354:6:hx8347i_SetDisplayWindow 24 static
+../Components/hx8347i/hx8347i.c:381:6:hx8347i_DrawHLine 32 static
+../Components/hx8347i/hx8347i.c:408:6:hx8347i_DrawVLine 32 static
+../Components/hx8347i/hx8347i.c:433:6:hx8347i_DrawBitmap 24 static
diff --git a/P3_SETR2/Debug/Components/hx8347i/subdir.mk b/P3_SETR2/Debug/Components/hx8347i/subdir.mk
new file mode 100644
index 0000000..ab530af
--- /dev/null
+++ b/P3_SETR2/Debug/Components/hx8347i/subdir.mk
@@ -0,0 +1,27 @@
+################################################################################
+# Automatically-generated file. Do not edit!
+# Toolchain: GNU Tools for STM32 (13.3.rel1)
+################################################################################
+
+# Add inputs and outputs from these tool invocations to the build variables
+C_SRCS += \
+../Components/hx8347i/hx8347i.c
+
+OBJS += \
+./Components/hx8347i/hx8347i.o
+
+C_DEPS += \
+./Components/hx8347i/hx8347i.d
+
+
+# Each subdirectory must supply rules for building sources it contributes
+Components/hx8347i/%.o Components/hx8347i/%.su Components/hx8347i/%.cyclo: ../Components/hx8347i/%.c Components/hx8347i/subdir.mk
+ arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g -DDEBUG -DUSE_HAL_DRIVER -DSTM32L475xx -c -I../Core/Inc -I../Components -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../BSP -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+
+clean: clean-Components-2f-hx8347i
+
+clean-Components-2f-hx8347i:
+ -$(RM) ./Components/hx8347i/hx8347i.cyclo ./Components/hx8347i/hx8347i.d ./Components/hx8347i/hx8347i.o ./Components/hx8347i/hx8347i.su
+
+.PHONY: clean-Components-2f-hx8347i
+
diff --git a/P3_SETR2/Debug/Components/l3gd20/l3gd20.cyclo b/P3_SETR2/Debug/Components/l3gd20/l3gd20.cyclo
new file mode 100644
index 0000000..6a5ed4f
--- /dev/null
+++ b/P3_SETR2/Debug/Components/l3gd20/l3gd20.cyclo
@@ -0,0 +1,12 @@
+../Components/l3gd20/l3gd20.c:101:6:L3GD20_Init 1
+../Components/l3gd20/l3gd20.c:124:6:L3GD20_DeInit 1
+../Components/l3gd20/l3gd20.c:133:9:L3GD20_ReadID 1
+../Components/l3gd20/l3gd20.c:152:6:L3GD20_RebootCmd 1
+../Components/l3gd20/l3gd20.c:171:6:L3GD20_LowPower 1
+../Components/l3gd20/l3gd20.c:185:6:L3GD20_INT1InterruptConfig 1
+../Components/l3gd20/l3gd20.c:216:6:L3GD20_EnableIT 3
+../Components/l3gd20/l3gd20.c:246:6:L3GD20_DisableIT 3
+../Components/l3gd20/l3gd20.c:273:6:L3GD20_FilterConfig 1
+../Components/l3gd20/l3gd20.c:297:6:L3GD20_FilterCmd 1
+../Components/l3gd20/l3gd20.c:317:9:L3GD20_GetDataStatus 1
+../Components/l3gd20/l3gd20.c:332:6:L3GD20_ReadXYZAngRate 9
diff --git a/P3_SETR2/Debug/Components/l3gd20/l3gd20.d b/P3_SETR2/Debug/Components/l3gd20/l3gd20.d
new file mode 100644
index 0000000..47b86d9
--- /dev/null
+++ b/P3_SETR2/Debug/Components/l3gd20/l3gd20.d
@@ -0,0 +1,4 @@
+Components/l3gd20/l3gd20.o: ../Components/l3gd20/l3gd20.c \
+ ../Components/l3gd20/l3gd20.h ../Components/l3gd20/../Common/gyro.h
+../Components/l3gd20/l3gd20.h:
+../Components/l3gd20/../Common/gyro.h:
diff --git a/P3_SETR2/Debug/Components/l3gd20/l3gd20.o b/P3_SETR2/Debug/Components/l3gd20/l3gd20.o
new file mode 100644
index 0000000..51a2f36
Binary files /dev/null and b/P3_SETR2/Debug/Components/l3gd20/l3gd20.o differ
diff --git a/P3_SETR2/Debug/Components/l3gd20/l3gd20.su b/P3_SETR2/Debug/Components/l3gd20/l3gd20.su
new file mode 100644
index 0000000..7e607b1
--- /dev/null
+++ b/P3_SETR2/Debug/Components/l3gd20/l3gd20.su
@@ -0,0 +1,12 @@
+../Components/l3gd20/l3gd20.c:101:6:L3GD20_Init 24 static
+../Components/l3gd20/l3gd20.c:124:6:L3GD20_DeInit 4 static
+../Components/l3gd20/l3gd20.c:133:9:L3GD20_ReadID 16 static
+../Components/l3gd20/l3gd20.c:152:6:L3GD20_RebootCmd 16 static
+../Components/l3gd20/l3gd20.c:171:6:L3GD20_LowPower 24 static
+../Components/l3gd20/l3gd20.c:185:6:L3GD20_INT1InterruptConfig 24 static
+../Components/l3gd20/l3gd20.c:216:6:L3GD20_EnableIT 24 static
+../Components/l3gd20/l3gd20.c:246:6:L3GD20_DisableIT 24 static
+../Components/l3gd20/l3gd20.c:273:6:L3GD20_FilterConfig 24 static
+../Components/l3gd20/l3gd20.c:297:6:L3GD20_FilterCmd 24 static
+../Components/l3gd20/l3gd20.c:317:9:L3GD20_GetDataStatus 16 static
+../Components/l3gd20/l3gd20.c:332:6:L3GD20_ReadXYZAngRate 48 static
diff --git a/P3_SETR2/Debug/Components/l3gd20/subdir.mk b/P3_SETR2/Debug/Components/l3gd20/subdir.mk
new file mode 100644
index 0000000..0f449ef
--- /dev/null
+++ b/P3_SETR2/Debug/Components/l3gd20/subdir.mk
@@ -0,0 +1,27 @@
+################################################################################
+# Automatically-generated file. Do not edit!
+# Toolchain: GNU Tools for STM32 (13.3.rel1)
+################################################################################
+
+# Add inputs and outputs from these tool invocations to the build variables
+C_SRCS += \
+../Components/l3gd20/l3gd20.c
+
+OBJS += \
+./Components/l3gd20/l3gd20.o
+
+C_DEPS += \
+./Components/l3gd20/l3gd20.d
+
+
+# Each subdirectory must supply rules for building sources it contributes
+Components/l3gd20/%.o Components/l3gd20/%.su Components/l3gd20/%.cyclo: ../Components/l3gd20/%.c Components/l3gd20/subdir.mk
+ arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g -DDEBUG -DUSE_HAL_DRIVER -DSTM32L475xx -c -I../Core/Inc -I../Components -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../BSP -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+
+clean: clean-Components-2f-l3gd20
+
+clean-Components-2f-l3gd20:
+ -$(RM) ./Components/l3gd20/l3gd20.cyclo ./Components/l3gd20/l3gd20.d ./Components/l3gd20/l3gd20.o ./Components/l3gd20/l3gd20.su
+
+.PHONY: clean-Components-2f-l3gd20
+
diff --git a/P3_SETR2/Debug/Components/lis3mdl/lis3mdl.cyclo b/P3_SETR2/Debug/Components/lis3mdl/lis3mdl.cyclo
new file mode 100644
index 0000000..f6796ad
--- /dev/null
+++ b/P3_SETR2/Debug/Components/lis3mdl/lis3mdl.cyclo
@@ -0,0 +1,5 @@
+../Components/lis3mdl/lis3mdl.c:68:6:LIS3MDL_MagInit 1
+../Components/lis3mdl/lis3mdl.c:80:6:LIS3MDL_MagDeInit 1
+../Components/lis3mdl/lis3mdl.c:101:9:LIS3MDL_MagReadID 1
+../Components/lis3mdl/lis3mdl.c:113:6:LIS3MDL_MagLowPower 2
+../Components/lis3mdl/lis3mdl.c:140:6:LIS3MDL_MagReadXYZ 9
diff --git a/P3_SETR2/Debug/Components/lis3mdl/lis3mdl.d b/P3_SETR2/Debug/Components/lis3mdl/lis3mdl.d
new file mode 100644
index 0000000..1adcf5e
--- /dev/null
+++ b/P3_SETR2/Debug/Components/lis3mdl/lis3mdl.d
@@ -0,0 +1,5 @@
+Components/lis3mdl/lis3mdl.o: ../Components/lis3mdl/lis3mdl.c \
+ ../Components/lis3mdl/lis3mdl.h \
+ ../Components/lis3mdl/../Common/magneto.h
+../Components/lis3mdl/lis3mdl.h:
+../Components/lis3mdl/../Common/magneto.h:
diff --git a/P3_SETR2/Debug/Components/lis3mdl/lis3mdl.o b/P3_SETR2/Debug/Components/lis3mdl/lis3mdl.o
new file mode 100644
index 0000000..e6fa05e
Binary files /dev/null and b/P3_SETR2/Debug/Components/lis3mdl/lis3mdl.o differ
diff --git a/P3_SETR2/Debug/Components/lis3mdl/lis3mdl.su b/P3_SETR2/Debug/Components/lis3mdl/lis3mdl.su
new file mode 100644
index 0000000..92c8163
--- /dev/null
+++ b/P3_SETR2/Debug/Components/lis3mdl/lis3mdl.su
@@ -0,0 +1,5 @@
+../Components/lis3mdl/lis3mdl.c:68:6:LIS3MDL_MagInit 16 static
+../Components/lis3mdl/lis3mdl.c:80:6:LIS3MDL_MagDeInit 16 static
+../Components/lis3mdl/lis3mdl.c:101:9:LIS3MDL_MagReadID 8 static
+../Components/lis3mdl/lis3mdl.c:113:6:LIS3MDL_MagLowPower 24 static
+../Components/lis3mdl/lis3mdl.c:140:6:LIS3MDL_MagReadXYZ 40 static
diff --git a/P3_SETR2/Debug/Components/lis3mdl/subdir.mk b/P3_SETR2/Debug/Components/lis3mdl/subdir.mk
new file mode 100644
index 0000000..12daaf5
--- /dev/null
+++ b/P3_SETR2/Debug/Components/lis3mdl/subdir.mk
@@ -0,0 +1,27 @@
+################################################################################
+# Automatically-generated file. Do not edit!
+# Toolchain: GNU Tools for STM32 (13.3.rel1)
+################################################################################
+
+# Add inputs and outputs from these tool invocations to the build variables
+C_SRCS += \
+../Components/lis3mdl/lis3mdl.c
+
+OBJS += \
+./Components/lis3mdl/lis3mdl.o
+
+C_DEPS += \
+./Components/lis3mdl/lis3mdl.d
+
+
+# Each subdirectory must supply rules for building sources it contributes
+Components/lis3mdl/%.o Components/lis3mdl/%.su Components/lis3mdl/%.cyclo: ../Components/lis3mdl/%.c Components/lis3mdl/subdir.mk
+ arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g -DDEBUG -DUSE_HAL_DRIVER -DSTM32L475xx -c -I../Core/Inc -I../Components -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../BSP -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+
+clean: clean-Components-2f-lis3mdl
+
+clean-Components-2f-lis3mdl:
+ -$(RM) ./Components/lis3mdl/lis3mdl.cyclo ./Components/lis3mdl/lis3mdl.d ./Components/lis3mdl/lis3mdl.o ./Components/lis3mdl/lis3mdl.su
+
+.PHONY: clean-Components-2f-lis3mdl
+
diff --git a/P3_SETR2/Debug/Components/lps22hb/lps22hb.cyclo b/P3_SETR2/Debug/Components/lps22hb/lps22hb.cyclo
new file mode 100644
index 0000000..7dcb106
--- /dev/null
+++ b/P3_SETR2/Debug/Components/lps22hb/lps22hb.cyclo
@@ -0,0 +1,6 @@
+../Components/lps22hb/lps22hb.c:73:6:LPS22HB_P_Init 1
+../Components/lps22hb/lps22hb.c:82:9:LPS22HB_P_ReadID 1
+../Components/lps22hb/lps22hb.c:99:7:LPS22HB_P_ReadPressure 5
+../Components/lps22hb/lps22hb.c:142:6:LPS22HB_T_Init 1
+../Components/lps22hb/lps22hb.c:152:7:LPS22HB_T_ReadTemp 2
+../Components/lps22hb/lps22hb.c:185:13:LPS22HB_Init 1
diff --git a/P3_SETR2/Debug/Components/lps22hb/lps22hb.d b/P3_SETR2/Debug/Components/lps22hb/lps22hb.d
new file mode 100644
index 0000000..6dd26ac
--- /dev/null
+++ b/P3_SETR2/Debug/Components/lps22hb/lps22hb.d
@@ -0,0 +1,7 @@
+Components/lps22hb/lps22hb.o: ../Components/lps22hb/lps22hb.c \
+ ../Components/lps22hb/lps22hb.h \
+ ../Components/lps22hb/../Common/psensor.h \
+ ../Components/lps22hb/../Common/tsensor.h
+../Components/lps22hb/lps22hb.h:
+../Components/lps22hb/../Common/psensor.h:
+../Components/lps22hb/../Common/tsensor.h:
diff --git a/P3_SETR2/Debug/Components/lps22hb/lps22hb.o b/P3_SETR2/Debug/Components/lps22hb/lps22hb.o
new file mode 100644
index 0000000..1319581
Binary files /dev/null and b/P3_SETR2/Debug/Components/lps22hb/lps22hb.o differ
diff --git a/P3_SETR2/Debug/Components/lps22hb/lps22hb.su b/P3_SETR2/Debug/Components/lps22hb/lps22hb.su
new file mode 100644
index 0000000..1391f17
--- /dev/null
+++ b/P3_SETR2/Debug/Components/lps22hb/lps22hb.su
@@ -0,0 +1,6 @@
+../Components/lps22hb/lps22hb.c:73:6:LPS22HB_P_Init 16 static
+../Components/lps22hb/lps22hb.c:82:9:LPS22HB_P_ReadID 24 static
+../Components/lps22hb/lps22hb.c:99:7:LPS22HB_P_ReadPressure 40 static
+../Components/lps22hb/lps22hb.c:142:6:LPS22HB_T_Init 16 static
+../Components/lps22hb/lps22hb.c:152:7:LPS22HB_T_ReadTemp 32 static
+../Components/lps22hb/lps22hb.c:185:13:LPS22HB_Init 24 static
diff --git a/P3_SETR2/Debug/Components/lps22hb/subdir.mk b/P3_SETR2/Debug/Components/lps22hb/subdir.mk
new file mode 100644
index 0000000..bdfc9aa
--- /dev/null
+++ b/P3_SETR2/Debug/Components/lps22hb/subdir.mk
@@ -0,0 +1,27 @@
+################################################################################
+# Automatically-generated file. Do not edit!
+# Toolchain: GNU Tools for STM32 (13.3.rel1)
+################################################################################
+
+# Add inputs and outputs from these tool invocations to the build variables
+C_SRCS += \
+../Components/lps22hb/lps22hb.c
+
+OBJS += \
+./Components/lps22hb/lps22hb.o
+
+C_DEPS += \
+./Components/lps22hb/lps22hb.d
+
+
+# Each subdirectory must supply rules for building sources it contributes
+Components/lps22hb/%.o Components/lps22hb/%.su Components/lps22hb/%.cyclo: ../Components/lps22hb/%.c Components/lps22hb/subdir.mk
+ arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g -DDEBUG -DUSE_HAL_DRIVER -DSTM32L475xx -c -I../Core/Inc -I../Components -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../BSP -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+
+clean: clean-Components-2f-lps22hb
+
+clean-Components-2f-lps22hb:
+ -$(RM) ./Components/lps22hb/lps22hb.cyclo ./Components/lps22hb/lps22hb.d ./Components/lps22hb/lps22hb.o ./Components/lps22hb/lps22hb.su
+
+.PHONY: clean-Components-2f-lps22hb
+
diff --git a/P3_SETR2/Debug/Components/ls016b8uy/ls016b8uy.cyclo b/P3_SETR2/Debug/Components/ls016b8uy/ls016b8uy.cyclo
new file mode 100644
index 0000000..a1becb5
--- /dev/null
+++ b/P3_SETR2/Debug/Components/ls016b8uy/ls016b8uy.cyclo
@@ -0,0 +1,18 @@
+../Components/ls016b8uy/ls016b8uy.c:114:6:ls016b8uy_Init 1
+../Components/ls016b8uy/ls016b8uy.c:190:6:ls016b8uy_DisplayOn 1
+../Components/ls016b8uy/ls016b8uy.c:201:6:ls016b8uy_DisplayOff 1
+../Components/ls016b8uy/ls016b8uy.c:214:10:ls016b8uy_GetLcdPixelWidth 1
+../Components/ls016b8uy/ls016b8uy.c:224:10:ls016b8uy_GetLcdPixelHeight 1
+../Components/ls016b8uy/ls016b8uy.c:234:10:ls016b8uy_ReadID 1
+../Components/ls016b8uy/ls016b8uy.c:247:6:ls016b8uy_SetCursor 1
+../Components/ls016b8uy/ls016b8uy.c:270:6:ls016b8uy_WritePixel 1
+../Components/ls016b8uy/ls016b8uy.c:300:10:ls016b8uy_ReadPixel 1
+../Components/ls016b8uy/ls016b8uy.c:329:6:ls016b8uy_WriteReg 2
+../Components/ls016b8uy/ls016b8uy.c:348:9:ls016b8uy_ReadReg 1
+../Components/ls016b8uy/ls016b8uy.c:368:6:ls016b8uy_SetDisplayWindow 5
+../Components/ls016b8uy/ls016b8uy.c:415:6:ls016b8uy_DrawHLine 3
+../Components/ls016b8uy/ls016b8uy.c:456:6:ls016b8uy_DrawVLine 2
+../Components/ls016b8uy/ls016b8uy.c:480:6:ls016b8uy_DrawBitmap 2
+../Components/ls016b8uy/ls016b8uy.c:517:6:ls016b8uy_DrawRGBImage 2
+../Components/ls016b8uy/ls016b8uy.c:543:25:ls016b8uy_ReadPixel_rgb888 1
+../Components/ls016b8uy/ls016b8uy.c:585:13:ls016b8uy_DrawRGBHLine 7
diff --git a/P3_SETR2/Debug/Components/ls016b8uy/ls016b8uy.d b/P3_SETR2/Debug/Components/ls016b8uy/ls016b8uy.d
new file mode 100644
index 0000000..f9c61eb
--- /dev/null
+++ b/P3_SETR2/Debug/Components/ls016b8uy/ls016b8uy.d
@@ -0,0 +1,5 @@
+Components/ls016b8uy/ls016b8uy.o: ../Components/ls016b8uy/ls016b8uy.c \
+ ../Components/ls016b8uy/ls016b8uy.h \
+ ../Components/ls016b8uy/../Common/lcd.h
+../Components/ls016b8uy/ls016b8uy.h:
+../Components/ls016b8uy/../Common/lcd.h:
diff --git a/P3_SETR2/Debug/Components/ls016b8uy/ls016b8uy.o b/P3_SETR2/Debug/Components/ls016b8uy/ls016b8uy.o
new file mode 100644
index 0000000..6dedae4
Binary files /dev/null and b/P3_SETR2/Debug/Components/ls016b8uy/ls016b8uy.o differ
diff --git a/P3_SETR2/Debug/Components/ls016b8uy/ls016b8uy.su b/P3_SETR2/Debug/Components/ls016b8uy/ls016b8uy.su
new file mode 100644
index 0000000..cbde062
--- /dev/null
+++ b/P3_SETR2/Debug/Components/ls016b8uy/ls016b8uy.su
@@ -0,0 +1,18 @@
+../Components/ls016b8uy/ls016b8uy.c:114:6:ls016b8uy_Init 16 static
+../Components/ls016b8uy/ls016b8uy.c:190:6:ls016b8uy_DisplayOn 8 static
+../Components/ls016b8uy/ls016b8uy.c:201:6:ls016b8uy_DisplayOff 8 static
+../Components/ls016b8uy/ls016b8uy.c:214:10:ls016b8uy_GetLcdPixelWidth 4 static
+../Components/ls016b8uy/ls016b8uy.c:224:10:ls016b8uy_GetLcdPixelHeight 4 static
+../Components/ls016b8uy/ls016b8uy.c:234:10:ls016b8uy_ReadID 8 static
+../Components/ls016b8uy/ls016b8uy.c:247:6:ls016b8uy_SetCursor 24 static
+../Components/ls016b8uy/ls016b8uy.c:270:6:ls016b8uy_WritePixel 32 static
+../Components/ls016b8uy/ls016b8uy.c:300:10:ls016b8uy_ReadPixel 32 static
+../Components/ls016b8uy/ls016b8uy.c:329:6:ls016b8uy_WriteReg 24 static
+../Components/ls016b8uy/ls016b8uy.c:348:9:ls016b8uy_ReadReg 16 static
+../Components/ls016b8uy/ls016b8uy.c:368:6:ls016b8uy_SetDisplayWindow 16 static
+../Components/ls016b8uy/ls016b8uy.c:415:6:ls016b8uy_DrawHLine 40 static
+../Components/ls016b8uy/ls016b8uy.c:456:6:ls016b8uy_DrawVLine 32 static
+../Components/ls016b8uy/ls016b8uy.c:480:6:ls016b8uy_DrawBitmap 40 static
+../Components/ls016b8uy/ls016b8uy.c:517:6:ls016b8uy_DrawRGBImage 32 static
+../Components/ls016b8uy/ls016b8uy.c:543:25:ls016b8uy_ReadPixel_rgb888 32 static
+../Components/ls016b8uy/ls016b8uy.c:585:13:ls016b8uy_DrawRGBHLine 48 static
diff --git a/P3_SETR2/Debug/Components/ls016b8uy/subdir.mk b/P3_SETR2/Debug/Components/ls016b8uy/subdir.mk
new file mode 100644
index 0000000..ac3c4ea
--- /dev/null
+++ b/P3_SETR2/Debug/Components/ls016b8uy/subdir.mk
@@ -0,0 +1,27 @@
+################################################################################
+# Automatically-generated file. Do not edit!
+# Toolchain: GNU Tools for STM32 (13.3.rel1)
+################################################################################
+
+# Add inputs and outputs from these tool invocations to the build variables
+C_SRCS += \
+../Components/ls016b8uy/ls016b8uy.c
+
+OBJS += \
+./Components/ls016b8uy/ls016b8uy.o
+
+C_DEPS += \
+./Components/ls016b8uy/ls016b8uy.d
+
+
+# Each subdirectory must supply rules for building sources it contributes
+Components/ls016b8uy/%.o Components/ls016b8uy/%.su Components/ls016b8uy/%.cyclo: ../Components/ls016b8uy/%.c Components/ls016b8uy/subdir.mk
+ arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g -DDEBUG -DUSE_HAL_DRIVER -DSTM32L475xx -c -I../Core/Inc -I../Components -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../BSP -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+
+clean: clean-Components-2f-ls016b8uy
+
+clean-Components-2f-ls016b8uy:
+ -$(RM) ./Components/ls016b8uy/ls016b8uy.cyclo ./Components/ls016b8uy/ls016b8uy.d ./Components/ls016b8uy/ls016b8uy.o ./Components/ls016b8uy/ls016b8uy.su
+
+.PHONY: clean-Components-2f-ls016b8uy
+
diff --git a/P3_SETR2/Debug/Components/lsm303c/lsm303c.cyclo b/P3_SETR2/Debug/Components/lsm303c/lsm303c.cyclo
new file mode 100644
index 0000000..34a1944
--- /dev/null
+++ b/P3_SETR2/Debug/Components/lsm303c/lsm303c.cyclo
@@ -0,0 +1,12 @@
+../Components/lsm303c/lsm303c.c:116:6:LSM303C_AccInit 1
+../Components/lsm303c/lsm303c.c:137:6:LSM303C_AccDeInit 1
+../Components/lsm303c/lsm303c.c:146:9:LSM303C_AccReadID 1
+../Components/lsm303c/lsm303c.c:168:6:LSM303C_AccLowPower 1
+../Components/lsm303c/lsm303c.c:190:6:LSM303C_AccFilterConfig 1
+../Components/lsm303c/lsm303c.c:209:6:LSM303C_AccReadXYZ 7
+../Components/lsm303c/lsm303c.c:266:6:LSM303C_MagInit 1
+../Components/lsm303c/lsm303c.c:280:6:LSM303C_MagDeInit 1
+../Components/lsm303c/lsm303c.c:289:9:LSM303C_MagReadID 1
+../Components/lsm303c/lsm303c.c:307:6:LSM303C_MagLowPower 1
+../Components/lsm303c/lsm303c.c:329:9:LSM303C_MagGetDataStatus 1
+../Components/lsm303c/lsm303c.c:340:6:LSM303C_MagReadXYZ 4
diff --git a/P3_SETR2/Debug/Components/lsm303c/lsm303c.d b/P3_SETR2/Debug/Components/lsm303c/lsm303c.d
new file mode 100644
index 0000000..d6b483b
--- /dev/null
+++ b/P3_SETR2/Debug/Components/lsm303c/lsm303c.d
@@ -0,0 +1,7 @@
+Components/lsm303c/lsm303c.o: ../Components/lsm303c/lsm303c.c \
+ ../Components/lsm303c/lsm303c.h \
+ ../Components/lsm303c/../Common/accelero.h \
+ ../Components/lsm303c/../Common/magneto.h
+../Components/lsm303c/lsm303c.h:
+../Components/lsm303c/../Common/accelero.h:
+../Components/lsm303c/../Common/magneto.h:
diff --git a/P3_SETR2/Debug/Components/lsm303c/lsm303c.o b/P3_SETR2/Debug/Components/lsm303c/lsm303c.o
new file mode 100644
index 0000000..43d5cf4
Binary files /dev/null and b/P3_SETR2/Debug/Components/lsm303c/lsm303c.o differ
diff --git a/P3_SETR2/Debug/Components/lsm303c/lsm303c.su b/P3_SETR2/Debug/Components/lsm303c/lsm303c.su
new file mode 100644
index 0000000..d42a1b2
--- /dev/null
+++ b/P3_SETR2/Debug/Components/lsm303c/lsm303c.su
@@ -0,0 +1,12 @@
+../Components/lsm303c/lsm303c.c:116:6:LSM303C_AccInit 24 static
+../Components/lsm303c/lsm303c.c:137:6:LSM303C_AccDeInit 4 static
+../Components/lsm303c/lsm303c.c:146:9:LSM303C_AccReadID 16 static
+../Components/lsm303c/lsm303c.c:168:6:LSM303C_AccLowPower 24 static
+../Components/lsm303c/lsm303c.c:190:6:LSM303C_AccFilterConfig 24 static
+../Components/lsm303c/lsm303c.c:209:6:LSM303C_AccReadXYZ 40 static
+../Components/lsm303c/lsm303c.c:266:6:LSM303C_MagInit 16 static
+../Components/lsm303c/lsm303c.c:280:6:LSM303C_MagDeInit 4 static
+../Components/lsm303c/lsm303c.c:289:9:LSM303C_MagReadID 8 static
+../Components/lsm303c/lsm303c.c:307:6:LSM303C_MagLowPower 24 static
+../Components/lsm303c/lsm303c.c:329:9:LSM303C_MagGetDataStatus 8 static
+../Components/lsm303c/lsm303c.c:340:6:LSM303C_MagReadXYZ 24 static
diff --git a/P3_SETR2/Debug/Components/lsm303c/subdir.mk b/P3_SETR2/Debug/Components/lsm303c/subdir.mk
new file mode 100644
index 0000000..9ab3ab3
--- /dev/null
+++ b/P3_SETR2/Debug/Components/lsm303c/subdir.mk
@@ -0,0 +1,27 @@
+################################################################################
+# Automatically-generated file. Do not edit!
+# Toolchain: GNU Tools for STM32 (13.3.rel1)
+################################################################################
+
+# Add inputs and outputs from these tool invocations to the build variables
+C_SRCS += \
+../Components/lsm303c/lsm303c.c
+
+OBJS += \
+./Components/lsm303c/lsm303c.o
+
+C_DEPS += \
+./Components/lsm303c/lsm303c.d
+
+
+# Each subdirectory must supply rules for building sources it contributes
+Components/lsm303c/%.o Components/lsm303c/%.su Components/lsm303c/%.cyclo: ../Components/lsm303c/%.c Components/lsm303c/subdir.mk
+ arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g -DDEBUG -DUSE_HAL_DRIVER -DSTM32L475xx -c -I../Core/Inc -I../Components -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../BSP -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+
+clean: clean-Components-2f-lsm303c
+
+clean-Components-2f-lsm303c:
+ -$(RM) ./Components/lsm303c/lsm303c.cyclo ./Components/lsm303c/lsm303c.d ./Components/lsm303c/lsm303c.o ./Components/lsm303c/lsm303c.su
+
+.PHONY: clean-Components-2f-lsm303c
+
diff --git a/P3_SETR2/Debug/Components/lsm303dlhc/lsm303dlhc.cyclo b/P3_SETR2/Debug/Components/lsm303dlhc/lsm303dlhc.cyclo
new file mode 100644
index 0000000..036bd95
--- /dev/null
+++ b/P3_SETR2/Debug/Components/lsm303dlhc/lsm303dlhc.cyclo
@@ -0,0 +1,19 @@
+../Components/lsm303dlhc/lsm303dlhc.c:92:6:LSM303DLHC_AccInit 1
+../Components/lsm303dlhc/lsm303dlhc.c:113:6:LSM303DLHC_AccDeInit 1
+../Components/lsm303dlhc/lsm303dlhc.c:122:9:LSM303DLHC_AccReadID 1
+../Components/lsm303dlhc/lsm303dlhc.c:140:6:LSM303DLHC_AccRebootCmd 1
+../Components/lsm303dlhc/lsm303dlhc.c:159:6:LSM303DLHC_AccFilterConfig 1
+../Components/lsm303dlhc/lsm303dlhc.c:181:6:LSM303DLHC_AccFilterCmd 1
+../Components/lsm303dlhc/lsm303dlhc.c:201:6:LSM303DLHC_AccReadXYZ 11
+../Components/lsm303dlhc/lsm303dlhc.c:270:6:LSM303DLHC_AccFilterClickCmd 1
+../Components/lsm303dlhc/lsm303dlhc.c:298:6:LSM303DLHC_AccIT1Enable 1
+../Components/lsm303dlhc/lsm303dlhc.c:325:6:LSM303DLHC_AccIT1Disable 1
+../Components/lsm303dlhc/lsm303dlhc.c:351:6:LSM303DLHC_AccIT2Enable 1
+../Components/lsm303dlhc/lsm303dlhc.c:377:6:LSM303DLHC_AccIT2Disable 1
+../Components/lsm303dlhc/lsm303dlhc.c:397:6:LSM303DLHC_AccINT1InterruptEnable 1
+../Components/lsm303dlhc/lsm303dlhc.c:417:6:LSM303DLHC_AccINT1InterruptDisable 1
+../Components/lsm303dlhc/lsm303dlhc.c:437:6:LSM303DLHC_AccINT2InterruptEnable 1
+../Components/lsm303dlhc/lsm303dlhc.c:457:6:LSM303DLHC_AccINT2InterruptDisable 1
+../Components/lsm303dlhc/lsm303dlhc.c:476:6:LSM303DLHC_AccClickITEnable 1
+../Components/lsm303dlhc/lsm303dlhc.c:510:6:LSM303DLHC_AccClickITDisable 1
+../Components/lsm303dlhc/lsm303dlhc.c:529:6:LSM303DLHC_AccZClickITConfig 1
diff --git a/P3_SETR2/Debug/Components/lsm303dlhc/lsm303dlhc.d b/P3_SETR2/Debug/Components/lsm303dlhc/lsm303dlhc.d
new file mode 100644
index 0000000..52254e1
--- /dev/null
+++ b/P3_SETR2/Debug/Components/lsm303dlhc/lsm303dlhc.d
@@ -0,0 +1,5 @@
+Components/lsm303dlhc/lsm303dlhc.o: ../Components/lsm303dlhc/lsm303dlhc.c \
+ ../Components/lsm303dlhc/lsm303dlhc.h \
+ ../Components/lsm303dlhc/../Common/accelero.h
+../Components/lsm303dlhc/lsm303dlhc.h:
+../Components/lsm303dlhc/../Common/accelero.h:
diff --git a/P3_SETR2/Debug/Components/lsm303dlhc/lsm303dlhc.o b/P3_SETR2/Debug/Components/lsm303dlhc/lsm303dlhc.o
new file mode 100644
index 0000000..351a93d
Binary files /dev/null and b/P3_SETR2/Debug/Components/lsm303dlhc/lsm303dlhc.o differ
diff --git a/P3_SETR2/Debug/Components/lsm303dlhc/lsm303dlhc.su b/P3_SETR2/Debug/Components/lsm303dlhc/lsm303dlhc.su
new file mode 100644
index 0000000..618f899
--- /dev/null
+++ b/P3_SETR2/Debug/Components/lsm303dlhc/lsm303dlhc.su
@@ -0,0 +1,19 @@
+../Components/lsm303dlhc/lsm303dlhc.c:92:6:LSM303DLHC_AccInit 24 static
+../Components/lsm303dlhc/lsm303dlhc.c:113:6:LSM303DLHC_AccDeInit 4 static
+../Components/lsm303dlhc/lsm303dlhc.c:122:9:LSM303DLHC_AccReadID 16 static
+../Components/lsm303dlhc/lsm303dlhc.c:140:6:LSM303DLHC_AccRebootCmd 16 static
+../Components/lsm303dlhc/lsm303dlhc.c:159:6:LSM303DLHC_AccFilterConfig 24 static
+../Components/lsm303dlhc/lsm303dlhc.c:181:6:LSM303DLHC_AccFilterCmd 24 static
+../Components/lsm303dlhc/lsm303dlhc.c:201:6:LSM303DLHC_AccReadXYZ 40 static
+../Components/lsm303dlhc/lsm303dlhc.c:270:6:LSM303DLHC_AccFilterClickCmd 24 static
+../Components/lsm303dlhc/lsm303dlhc.c:298:6:LSM303DLHC_AccIT1Enable 24 static
+../Components/lsm303dlhc/lsm303dlhc.c:325:6:LSM303DLHC_AccIT1Disable 24 static
+../Components/lsm303dlhc/lsm303dlhc.c:351:6:LSM303DLHC_AccIT2Enable 24 static
+../Components/lsm303dlhc/lsm303dlhc.c:377:6:LSM303DLHC_AccIT2Disable 24 static
+../Components/lsm303dlhc/lsm303dlhc.c:397:6:LSM303DLHC_AccINT1InterruptEnable 24 static
+../Components/lsm303dlhc/lsm303dlhc.c:417:6:LSM303DLHC_AccINT1InterruptDisable 24 static
+../Components/lsm303dlhc/lsm303dlhc.c:437:6:LSM303DLHC_AccINT2InterruptEnable 24 static
+../Components/lsm303dlhc/lsm303dlhc.c:457:6:LSM303DLHC_AccINT2InterruptDisable 24 static
+../Components/lsm303dlhc/lsm303dlhc.c:476:6:LSM303DLHC_AccClickITEnable 24 static
+../Components/lsm303dlhc/lsm303dlhc.c:510:6:LSM303DLHC_AccClickITDisable 24 static
+../Components/lsm303dlhc/lsm303dlhc.c:529:6:LSM303DLHC_AccZClickITConfig 8 static
diff --git a/P3_SETR2/Debug/Components/lsm303dlhc/subdir.mk b/P3_SETR2/Debug/Components/lsm303dlhc/subdir.mk
new file mode 100644
index 0000000..8b3e715
--- /dev/null
+++ b/P3_SETR2/Debug/Components/lsm303dlhc/subdir.mk
@@ -0,0 +1,27 @@
+################################################################################
+# Automatically-generated file. Do not edit!
+# Toolchain: GNU Tools for STM32 (13.3.rel1)
+################################################################################
+
+# Add inputs and outputs from these tool invocations to the build variables
+C_SRCS += \
+../Components/lsm303dlhc/lsm303dlhc.c
+
+OBJS += \
+./Components/lsm303dlhc/lsm303dlhc.o
+
+C_DEPS += \
+./Components/lsm303dlhc/lsm303dlhc.d
+
+
+# Each subdirectory must supply rules for building sources it contributes
+Components/lsm303dlhc/%.o Components/lsm303dlhc/%.su Components/lsm303dlhc/%.cyclo: ../Components/lsm303dlhc/%.c Components/lsm303dlhc/subdir.mk
+ arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g -DDEBUG -DUSE_HAL_DRIVER -DSTM32L475xx -c -I../Core/Inc -I../Components -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../BSP -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+
+clean: clean-Components-2f-lsm303dlhc
+
+clean-Components-2f-lsm303dlhc:
+ -$(RM) ./Components/lsm303dlhc/lsm303dlhc.cyclo ./Components/lsm303dlhc/lsm303dlhc.d ./Components/lsm303dlhc/lsm303dlhc.o ./Components/lsm303dlhc/lsm303dlhc.su
+
+.PHONY: clean-Components-2f-lsm303dlhc
+
diff --git a/P3_SETR2/Debug/Components/lsm6dsl/lsm6dsl.cyclo b/P3_SETR2/Debug/Components/lsm6dsl/lsm6dsl.cyclo
new file mode 100644
index 0000000..eb2b47a
--- /dev/null
+++ b/P3_SETR2/Debug/Components/lsm6dsl/lsm6dsl.cyclo
@@ -0,0 +1,10 @@
+../Components/lsm6dsl/lsm6dsl.c:83:6:LSM6DSL_AccInit 1
+../Components/lsm6dsl/lsm6dsl.c:110:6:LSM6DSL_AccDeInit 1
+../Components/lsm6dsl/lsm6dsl.c:131:9:LSM6DSL_AccReadID 1
+../Components/lsm6dsl/lsm6dsl.c:143:6:LSM6DSL_AccLowPower 2
+../Components/lsm6dsl/lsm6dsl.c:170:6:LSM6DSL_AccReadXYZ 7
+../Components/lsm6dsl/lsm6dsl.c:227:6:LSM6DSL_GyroInit 1
+../Components/lsm6dsl/lsm6dsl.c:255:6:LSM6DSL_GyroDeInit 1
+../Components/lsm6dsl/lsm6dsl.c:276:9:LSM6DSL_GyroReadID 1
+../Components/lsm6dsl/lsm6dsl.c:288:6:LSM6DSL_GyroLowPower 2
+../Components/lsm6dsl/lsm6dsl.c:315:6:LSM6DSL_GyroReadXYZAngRate 7
diff --git a/P3_SETR2/Debug/Components/lsm6dsl/lsm6dsl.d b/P3_SETR2/Debug/Components/lsm6dsl/lsm6dsl.d
new file mode 100644
index 0000000..acd673a
--- /dev/null
+++ b/P3_SETR2/Debug/Components/lsm6dsl/lsm6dsl.d
@@ -0,0 +1,7 @@
+Components/lsm6dsl/lsm6dsl.o: ../Components/lsm6dsl/lsm6dsl.c \
+ ../Components/lsm6dsl/lsm6dsl.h \
+ ../Components/lsm6dsl/../Common/accelero.h \
+ ../Components/lsm6dsl/../Common/gyro.h
+../Components/lsm6dsl/lsm6dsl.h:
+../Components/lsm6dsl/../Common/accelero.h:
+../Components/lsm6dsl/../Common/gyro.h:
diff --git a/P3_SETR2/Debug/Components/lsm6dsl/lsm6dsl.o b/P3_SETR2/Debug/Components/lsm6dsl/lsm6dsl.o
new file mode 100644
index 0000000..7da9508
Binary files /dev/null and b/P3_SETR2/Debug/Components/lsm6dsl/lsm6dsl.o differ
diff --git a/P3_SETR2/Debug/Components/lsm6dsl/lsm6dsl.su b/P3_SETR2/Debug/Components/lsm6dsl/lsm6dsl.su
new file mode 100644
index 0000000..8dd8abb
--- /dev/null
+++ b/P3_SETR2/Debug/Components/lsm6dsl/lsm6dsl.su
@@ -0,0 +1,10 @@
+../Components/lsm6dsl/lsm6dsl.c:83:6:LSM6DSL_AccInit 24 static
+../Components/lsm6dsl/lsm6dsl.c:110:6:LSM6DSL_AccDeInit 16 static
+../Components/lsm6dsl/lsm6dsl.c:131:9:LSM6DSL_AccReadID 8 static
+../Components/lsm6dsl/lsm6dsl.c:143:6:LSM6DSL_AccLowPower 24 static
+../Components/lsm6dsl/lsm6dsl.c:170:6:LSM6DSL_AccReadXYZ 40 static
+../Components/lsm6dsl/lsm6dsl.c:227:6:LSM6DSL_GyroInit 24 static
+../Components/lsm6dsl/lsm6dsl.c:255:6:LSM6DSL_GyroDeInit 16 static
+../Components/lsm6dsl/lsm6dsl.c:276:9:LSM6DSL_GyroReadID 8 static
+../Components/lsm6dsl/lsm6dsl.c:288:6:LSM6DSL_GyroLowPower 24 static
+../Components/lsm6dsl/lsm6dsl.c:315:6:LSM6DSL_GyroReadXYZAngRate 40 static
diff --git a/P3_SETR2/Debug/Components/lsm6dsl/subdir.mk b/P3_SETR2/Debug/Components/lsm6dsl/subdir.mk
new file mode 100644
index 0000000..4bafe71
--- /dev/null
+++ b/P3_SETR2/Debug/Components/lsm6dsl/subdir.mk
@@ -0,0 +1,27 @@
+################################################################################
+# Automatically-generated file. Do not edit!
+# Toolchain: GNU Tools for STM32 (13.3.rel1)
+################################################################################
+
+# Add inputs and outputs from these tool invocations to the build variables
+C_SRCS += \
+../Components/lsm6dsl/lsm6dsl.c
+
+OBJS += \
+./Components/lsm6dsl/lsm6dsl.o
+
+C_DEPS += \
+./Components/lsm6dsl/lsm6dsl.d
+
+
+# Each subdirectory must supply rules for building sources it contributes
+Components/lsm6dsl/%.o Components/lsm6dsl/%.su Components/lsm6dsl/%.cyclo: ../Components/lsm6dsl/%.c Components/lsm6dsl/subdir.mk
+ arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g -DDEBUG -DUSE_HAL_DRIVER -DSTM32L475xx -c -I../Core/Inc -I../Components -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../BSP -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+
+clean: clean-Components-2f-lsm6dsl
+
+clean-Components-2f-lsm6dsl:
+ -$(RM) ./Components/lsm6dsl/lsm6dsl.cyclo ./Components/lsm6dsl/lsm6dsl.d ./Components/lsm6dsl/lsm6dsl.o ./Components/lsm6dsl/lsm6dsl.su
+
+.PHONY: clean-Components-2f-lsm6dsl
+
diff --git a/P3_SETR2/Debug/Components/m24sr/m24sr.cyclo b/P3_SETR2/Debug/Components/m24sr/m24sr.cyclo
new file mode 100644
index 0000000..85dcfca
--- /dev/null
+++ b/P3_SETR2/Debug/Components/m24sr/m24sr.cyclo
@@ -0,0 +1,31 @@
+../Components/m24sr/m24sr.c:287:17:M24SR_UpdateCrc 1
+../Components/m24sr/m24sr.c:302:17:M24SR_ComputeCrc 2
+../Components/m24sr/m24sr.c:325:17:M24SR_IsCorrectCRC16Residue 4
+../Components/m24sr/m24sr.c:363:13:M24SR_BuildIBlockCommand 11
+../Components/m24sr/m24sr.c:439:17:IsSBlock 2
+../Components/m24sr/m24sr.c:460:17:M24SR_FWTExtension 4
+../Components/m24sr/m24sr.c:512:6:M24SR_Init 5
+../Components/m24sr/m24sr.c:551:6:M24SR_GPO_Callback 2
+../Components/m24sr/m24sr.c:565:10:M24SR_GetSession 3
+../Components/m24sr/m24sr.c:591:10:M24SR_KillSession 3
+../Components/m24sr/m24sr.c:616:10:M24SR_Deselect 4
+../Components/m24sr/m24sr.c:647:10:M24SR_SelectApplication 4
+../Components/m24sr/m24sr.c:700:10:M24SR_SelectCCfile 4
+../Components/m24sr/m24sr.c:751:10:M24SR_SelectSystemfile 4
+../Components/m24sr/m24sr.c:803:10:M24SR_SelectNDEFfile 4
+../Components/m24sr/m24sr.c:856:10:M24SR_ReadBinary 4
+../Components/m24sr/m24sr.c:905:10:M24SR_STReadBinary 4
+../Components/m24sr/m24sr.c:954:10:M24SR_UpdateBinary 6
+../Components/m24sr/m24sr.c:1016:10:M24SR_Verify 8
+../Components/m24sr/m24sr.c:1086:10:M24SR_ChangeReferenceData 5
+../Components/m24sr/m24sr.c:1142:10:M24SR_EnableVerificationRequirement 6
+../Components/m24sr/m24sr.c:1194:10:M24SR_DisableVerificationRequirement 6
+../Components/m24sr/m24sr.c:1246:10:M24SR_EnablePermanentState 6
+../Components/m24sr/m24sr.c:1297:10:M24SR_DisablePermanentState 6
+../Components/m24sr/m24sr.c:1346:10:M24SR_SendInterrupt 4
+../Components/m24sr/m24sr.c:1394:10:M24SR_StateControl 6
+../Components/m24sr/m24sr.c:1450:10:M24SR_ManageI2CGPO 5
+../Components/m24sr/m24sr.c:1497:10:M24SR_ManageRFGPO 2
+../Components/m24sr/m24sr.c:1528:17:M24SR_IsAnswerReady 12
+../Components/m24sr/m24sr.c:1588:6:M24SR_RFConfig 2
+../Components/m24sr/m24sr.c:1606:13:M24SR_SetI2CSynchroMode 5
diff --git a/P3_SETR2/Debug/Components/m24sr/m24sr.d b/P3_SETR2/Debug/Components/m24sr/m24sr.d
new file mode 100644
index 0000000..531e019
--- /dev/null
+++ b/P3_SETR2/Debug/Components/m24sr/m24sr.d
@@ -0,0 +1,3 @@
+Components/m24sr/m24sr.o: ../Components/m24sr/m24sr.c \
+ ../Components/m24sr/m24sr.h
+../Components/m24sr/m24sr.h:
diff --git a/P3_SETR2/Debug/Components/m24sr/m24sr.o b/P3_SETR2/Debug/Components/m24sr/m24sr.o
new file mode 100644
index 0000000..2fb1ba2
Binary files /dev/null and b/P3_SETR2/Debug/Components/m24sr/m24sr.o differ
diff --git a/P3_SETR2/Debug/Components/m24sr/m24sr.su b/P3_SETR2/Debug/Components/m24sr/m24sr.su
new file mode 100644
index 0000000..a0545c1
--- /dev/null
+++ b/P3_SETR2/Debug/Components/m24sr/m24sr.su
@@ -0,0 +1,31 @@
+../Components/m24sr/m24sr.c:287:17:M24SR_UpdateCrc 16 static
+../Components/m24sr/m24sr.c:302:17:M24SR_ComputeCrc 24 static
+../Components/m24sr/m24sr.c:325:17:M24SR_IsCorrectCRC16Residue 24 static
+../Components/m24sr/m24sr.c:363:13:M24SR_BuildIBlockCommand 32 static
+../Components/m24sr/m24sr.c:439:17:IsSBlock 16 static
+../Components/m24sr/m24sr.c:460:17:M24SR_FWTExtension 32 static
+../Components/m24sr/m24sr.c:512:6:M24SR_Init 16 static
+../Components/m24sr/m24sr.c:551:6:M24SR_GPO_Callback 4 static
+../Components/m24sr/m24sr.c:565:10:M24SR_GetSession 24 static
+../Components/m24sr/m24sr.c:591:10:M24SR_KillSession 24 static
+../Components/m24sr/m24sr.c:616:10:M24SR_Deselect 24 static
+../Components/m24sr/m24sr.c:647:10:M24SR_SelectApplication 56 static
+../Components/m24sr/m24sr.c:700:10:M24SR_SelectCCfile 48 static
+../Components/m24sr/m24sr.c:751:10:M24SR_SelectSystemfile 48 static
+../Components/m24sr/m24sr.c:803:10:M24SR_SelectNDEFfile 48 static
+../Components/m24sr/m24sr.c:856:10:M24SR_ReadBinary 48 static
+../Components/m24sr/m24sr.c:905:10:M24SR_STReadBinary 48 static
+../Components/m24sr/m24sr.c:954:10:M24SR_UpdateBinary 56 static
+../Components/m24sr/m24sr.c:1016:10:M24SR_Verify 48 static
+../Components/m24sr/m24sr.c:1086:10:M24SR_ChangeReferenceData 40 static
+../Components/m24sr/m24sr.c:1142:10:M24SR_EnableVerificationRequirement 40 static
+../Components/m24sr/m24sr.c:1194:10:M24SR_DisableVerificationRequirement 40 static
+../Components/m24sr/m24sr.c:1246:10:M24SR_EnablePermanentState 40 static
+../Components/m24sr/m24sr.c:1297:10:M24SR_DisablePermanentState 40 static
+../Components/m24sr/m24sr.c:1346:10:M24SR_SendInterrupt 48 static
+../Components/m24sr/m24sr.c:1394:10:M24SR_StateControl 48 static
+../Components/m24sr/m24sr.c:1450:10:M24SR_ManageI2CGPO 40 static
+../Components/m24sr/m24sr.c:1497:10:M24SR_ManageRFGPO 40 static
+../Components/m24sr/m24sr.c:1528:17:M24SR_IsAnswerReady 24 static
+../Components/m24sr/m24sr.c:1588:6:M24SR_RFConfig 16 static
+../Components/m24sr/m24sr.c:1606:13:M24SR_SetI2CSynchroMode 16 static
diff --git a/P3_SETR2/Debug/Components/m24sr/subdir.mk b/P3_SETR2/Debug/Components/m24sr/subdir.mk
new file mode 100644
index 0000000..3fef79d
--- /dev/null
+++ b/P3_SETR2/Debug/Components/m24sr/subdir.mk
@@ -0,0 +1,27 @@
+################################################################################
+# Automatically-generated file. Do not edit!
+# Toolchain: GNU Tools for STM32 (13.3.rel1)
+################################################################################
+
+# Add inputs and outputs from these tool invocations to the build variables
+C_SRCS += \
+../Components/m24sr/m24sr.c
+
+OBJS += \
+./Components/m24sr/m24sr.o
+
+C_DEPS += \
+./Components/m24sr/m24sr.d
+
+
+# Each subdirectory must supply rules for building sources it contributes
+Components/m24sr/%.o Components/m24sr/%.su Components/m24sr/%.cyclo: ../Components/m24sr/%.c Components/m24sr/subdir.mk
+ arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g -DDEBUG -DUSE_HAL_DRIVER -DSTM32L475xx -c -I../Core/Inc -I../Components -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../BSP -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+
+clean: clean-Components-2f-m24sr
+
+clean-Components-2f-m24sr:
+ -$(RM) ./Components/m24sr/m24sr.cyclo ./Components/m24sr/m24sr.d ./Components/m24sr/m24sr.o ./Components/m24sr/m24sr.su
+
+.PHONY: clean-Components-2f-m24sr
+
diff --git a/P3_SETR2/Debug/Components/mfxstm32l152/mfxstm32l152.cyclo b/P3_SETR2/Debug/Components/mfxstm32l152/mfxstm32l152.cyclo
new file mode 100644
index 0000000..09ee945
--- /dev/null
+++ b/P3_SETR2/Debug/Components/mfxstm32l152/mfxstm32l152.cyclo
@@ -0,0 +1,55 @@
+../Components/mfxstm32l152/mfxstm32l152.c:150:6:mfxstm32l152_Init 3
+../Components/mfxstm32l152/mfxstm32l152.c:183:6:mfxstm32l152_DeInit 2
+../Components/mfxstm32l152/mfxstm32l152.c:203:6:mfxstm32l152_Reset 1
+../Components/mfxstm32l152/mfxstm32l152.c:217:7:mfxstm32l152_LowPower 1
+../Components/mfxstm32l152/mfxstm32l152.c:231:7:mfxstm32l152_WakeUp 2
+../Components/mfxstm32l152/mfxstm32l152.c:254:10:mfxstm32l152_ReadID 1
+../Components/mfxstm32l152/mfxstm32l152.c:275:10:mfxstm32l152_ReadFwVersion 1
+../Components/mfxstm32l152/mfxstm32l152.c:299:6:mfxstm32l152_EnableITSource 1
+../Components/mfxstm32l152/mfxstm32l152.c:327:6:mfxstm32l152_DisableITSource 1
+../Components/mfxstm32l152/mfxstm32l152.c:356:9:mfxstm32l152_GlobalITStatus 1
+../Components/mfxstm32l152/mfxstm32l152.c:378:6:mfxstm32l152_ClearGlobalIT 1
+../Components/mfxstm32l152/mfxstm32l152.c:392:6:mfxstm32l152_SetIrqOutPinPolarity 1
+../Components/mfxstm32l152/mfxstm32l152.c:421:6:mfxstm32l152_SetIrqOutPinType 1
+../Components/mfxstm32l152/mfxstm32l152.c:454:6:mfxstm32l152_IO_Start 2
+../Components/mfxstm32l152/mfxstm32l152.c:517:9:mfxstm32l152_IO_Config 21
+../Components/mfxstm32l152/mfxstm32l152.c:719:6:mfxstm32l152_IO_InitPin 1
+../Components/mfxstm32l152/mfxstm32l152.c:735:6:mfxstm32l152_IO_SetIrqEvtMode 1
+../Components/mfxstm32l152/mfxstm32l152.c:753:6:mfxstm32l152_IO_SetIrqTypeMode 1
+../Components/mfxstm32l152/mfxstm32l152.c:768:6:mfxstm32l152_IO_WritePin 2
+../Components/mfxstm32l152/mfxstm32l152.c:791:10:mfxstm32l152_IO_ReadPin 4
+../Components/mfxstm32l152/mfxstm32l152.c:820:6:mfxstm32l152_IO_EnableIT 1
+../Components/mfxstm32l152/mfxstm32l152.c:833:6:mfxstm32l152_IO_DisableIT 1
+../Components/mfxstm32l152/mfxstm32l152.c:847:6:mfxstm32l152_IO_EnablePinIT 1
+../Components/mfxstm32l152/mfxstm32l152.c:860:6:mfxstm32l152_IO_DisablePinIT 1
+../Components/mfxstm32l152/mfxstm32l152.c:873:10:mfxstm32l152_IO_ITStatus 4
+../Components/mfxstm32l152/mfxstm32l152.c:905:6:mfxstm32l152_IO_ClearIT 4
+../Components/mfxstm32l152/mfxstm32l152.c:937:6:mfxstm32l152_IO_EnableAF 1
+../Components/mfxstm32l152/mfxstm32l152.c:963:7:mfxstm32l152_IO_DisableAF 1
+../Components/mfxstm32l152/mfxstm32l152.c:995:6:mfxstm32l152_TS_Start 1
+../Components/mfxstm32l152/mfxstm32l152.c:1045:9:mfxstm32l152_TS_DetectTouch 3
+../Components/mfxstm32l152/mfxstm32l152.c:1071:6:mfxstm32l152_TS_GetXY 1
+../Components/mfxstm32l152/mfxstm32l152.c:1090:6:mfxstm32l152_TS_EnableIT 1
+../Components/mfxstm32l152/mfxstm32l152.c:1103:6:mfxstm32l152_TS_DisableIT 1
+../Components/mfxstm32l152/mfxstm32l152.c:1114:9:mfxstm32l152_TS_ITStatus 1
+../Components/mfxstm32l152/mfxstm32l152.c:1125:6:mfxstm32l152_TS_ClearIT 1
+../Components/mfxstm32l152/mfxstm32l152.c:1140:6:mfxstm32l152_IDD_Start 1
+../Components/mfxstm32l152/mfxstm32l152.c:1160:6:mfxstm32l152_IDD_Config 2
+../Components/mfxstm32l152/mfxstm32l152.c:1269:6:mfxstm32l152_IDD_ConfigShuntNbLimit 1
+../Components/mfxstm32l152/mfxstm32l152.c:1292:6:mfxstm32l152_IDD_GetValue 1
+../Components/mfxstm32l152/mfxstm32l152.c:1308:10:mfxstm32l152_IDD_GetShuntUsed 1
+../Components/mfxstm32l152/mfxstm32l152.c:1318:6:mfxstm32l152_IDD_EnableIT 1
+../Components/mfxstm32l152/mfxstm32l152.c:1331:6:mfxstm32l152_IDD_ClearIT 1
+../Components/mfxstm32l152/mfxstm32l152.c:1342:9:mfxstm32l152_IDD_GetITStatus 1
+../Components/mfxstm32l152/mfxstm32l152.c:1353:6:mfxstm32l152_IDD_DisableIT 1
+../Components/mfxstm32l152/mfxstm32l152.c:1369:9:mfxstm32l152_Error_ReadSrc 1
+../Components/mfxstm32l152/mfxstm32l152.c:1380:9:mfxstm32l152_Error_ReadMsg 1
+../Components/mfxstm32l152/mfxstm32l152.c:1392:6:mfxstm32l152_Error_EnableIT 1
+../Components/mfxstm32l152/mfxstm32l152.c:1405:6:mfxstm32l152_Error_ClearIT 1
+../Components/mfxstm32l152/mfxstm32l152.c:1416:9:mfxstm32l152_Error_GetITStatus 1
+../Components/mfxstm32l152/mfxstm32l152.c:1427:6:mfxstm32l152_Error_DisableIT 1
+../Components/mfxstm32l152/mfxstm32l152.c:1436:9:mfxstm32l152_ReadReg 1
+../Components/mfxstm32l152/mfxstm32l152.c:1442:6:mfxstm32l152_WriteReg 1
+../Components/mfxstm32l152/mfxstm32l152.c:1457:16:mfxstm32l152_GetInstance 3
+../Components/mfxstm32l152/mfxstm32l152.c:1478:16:mfxstm32l152_ReleaseInstance 3
+../Components/mfxstm32l152/mfxstm32l152.c:1502:6:mfxstm32l152_reg24_setPinValue 7
diff --git a/P3_SETR2/Debug/Components/mfxstm32l152/mfxstm32l152.d b/P3_SETR2/Debug/Components/mfxstm32l152/mfxstm32l152.d
new file mode 100644
index 0000000..09969f8
--- /dev/null
+++ b/P3_SETR2/Debug/Components/mfxstm32l152/mfxstm32l152.d
@@ -0,0 +1,10 @@
+Components/mfxstm32l152/mfxstm32l152.o: \
+ ../Components/mfxstm32l152/mfxstm32l152.c \
+ ../Components/mfxstm32l152/mfxstm32l152.h \
+ ../Components/mfxstm32l152/../Common/ts.h \
+ ../Components/mfxstm32l152/../Common/io.h \
+ ../Components/mfxstm32l152/../Common/idd.h
+../Components/mfxstm32l152/mfxstm32l152.h:
+../Components/mfxstm32l152/../Common/ts.h:
+../Components/mfxstm32l152/../Common/io.h:
+../Components/mfxstm32l152/../Common/idd.h:
diff --git a/P3_SETR2/Debug/Components/mfxstm32l152/mfxstm32l152.o b/P3_SETR2/Debug/Components/mfxstm32l152/mfxstm32l152.o
new file mode 100644
index 0000000..37945b6
Binary files /dev/null and b/P3_SETR2/Debug/Components/mfxstm32l152/mfxstm32l152.o differ
diff --git a/P3_SETR2/Debug/Components/mfxstm32l152/mfxstm32l152.su b/P3_SETR2/Debug/Components/mfxstm32l152/mfxstm32l152.su
new file mode 100644
index 0000000..228e312
--- /dev/null
+++ b/P3_SETR2/Debug/Components/mfxstm32l152/mfxstm32l152.su
@@ -0,0 +1,55 @@
+../Components/mfxstm32l152/mfxstm32l152.c:150:6:mfxstm32l152_Init 24 static
+../Components/mfxstm32l152/mfxstm32l152.c:183:6:mfxstm32l152_DeInit 24 static
+../Components/mfxstm32l152/mfxstm32l152.c:203:6:mfxstm32l152_Reset 16 static
+../Components/mfxstm32l152/mfxstm32l152.c:217:7:mfxstm32l152_LowPower 16 static
+../Components/mfxstm32l152/mfxstm32l152.c:231:7:mfxstm32l152_WakeUp 24 static
+../Components/mfxstm32l152/mfxstm32l152.c:254:10:mfxstm32l152_ReadID 24 static
+../Components/mfxstm32l152/mfxstm32l152.c:275:10:mfxstm32l152_ReadFwVersion 24 static
+../Components/mfxstm32l152/mfxstm32l152.c:299:6:mfxstm32l152_EnableITSource 24 static
+../Components/mfxstm32l152/mfxstm32l152.c:327:6:mfxstm32l152_DisableITSource 24 static
+../Components/mfxstm32l152/mfxstm32l152.c:356:9:mfxstm32l152_GlobalITStatus 16 static
+../Components/mfxstm32l152/mfxstm32l152.c:378:6:mfxstm32l152_ClearGlobalIT 16 static
+../Components/mfxstm32l152/mfxstm32l152.c:392:6:mfxstm32l152_SetIrqOutPinPolarity 24 static
+../Components/mfxstm32l152/mfxstm32l152.c:421:6:mfxstm32l152_SetIrqOutPinType 24 static
+../Components/mfxstm32l152/mfxstm32l152.c:454:6:mfxstm32l152_IO_Start 24 static
+../Components/mfxstm32l152/mfxstm32l152.c:517:9:mfxstm32l152_IO_Config 24 static
+../Components/mfxstm32l152/mfxstm32l152.c:719:6:mfxstm32l152_IO_InitPin 16 static
+../Components/mfxstm32l152/mfxstm32l152.c:735:6:mfxstm32l152_IO_SetIrqEvtMode 16 static
+../Components/mfxstm32l152/mfxstm32l152.c:753:6:mfxstm32l152_IO_SetIrqTypeMode 16 static
+../Components/mfxstm32l152/mfxstm32l152.c:768:6:mfxstm32l152_IO_WritePin 16 static
+../Components/mfxstm32l152/mfxstm32l152.c:791:10:mfxstm32l152_IO_ReadPin 32 static
+../Components/mfxstm32l152/mfxstm32l152.c:820:6:mfxstm32l152_IO_EnableIT 16 static
+../Components/mfxstm32l152/mfxstm32l152.c:833:6:mfxstm32l152_IO_DisableIT 16 static
+../Components/mfxstm32l152/mfxstm32l152.c:847:6:mfxstm32l152_IO_EnablePinIT 16 static
+../Components/mfxstm32l152/mfxstm32l152.c:860:6:mfxstm32l152_IO_DisablePinIT 16 static
+../Components/mfxstm32l152/mfxstm32l152.c:873:10:mfxstm32l152_IO_ITStatus 24 static
+../Components/mfxstm32l152/mfxstm32l152.c:905:6:mfxstm32l152_IO_ClearIT 24 static
+../Components/mfxstm32l152/mfxstm32l152.c:937:6:mfxstm32l152_IO_EnableAF 24 static
+../Components/mfxstm32l152/mfxstm32l152.c:963:7:mfxstm32l152_IO_DisableAF 24 static
+../Components/mfxstm32l152/mfxstm32l152.c:995:6:mfxstm32l152_TS_Start 24 static
+../Components/mfxstm32l152/mfxstm32l152.c:1045:9:mfxstm32l152_TS_DetectTouch 24 static
+../Components/mfxstm32l152/mfxstm32l152.c:1071:6:mfxstm32l152_TS_GetXY 32 static
+../Components/mfxstm32l152/mfxstm32l152.c:1090:6:mfxstm32l152_TS_EnableIT 16 static
+../Components/mfxstm32l152/mfxstm32l152.c:1103:6:mfxstm32l152_TS_DisableIT 16 static
+../Components/mfxstm32l152/mfxstm32l152.c:1114:9:mfxstm32l152_TS_ITStatus 16 static
+../Components/mfxstm32l152/mfxstm32l152.c:1125:6:mfxstm32l152_TS_ClearIT 16 static
+../Components/mfxstm32l152/mfxstm32l152.c:1140:6:mfxstm32l152_IDD_Start 24 static
+../Components/mfxstm32l152/mfxstm32l152.c:1160:6:mfxstm32l152_IDD_Config 32 static
+../Components/mfxstm32l152/mfxstm32l152.c:1269:6:mfxstm32l152_IDD_ConfigShuntNbLimit 24 static
+../Components/mfxstm32l152/mfxstm32l152.c:1292:6:mfxstm32l152_IDD_GetValue 24 static
+../Components/mfxstm32l152/mfxstm32l152.c:1308:10:mfxstm32l152_IDD_GetShuntUsed 16 static
+../Components/mfxstm32l152/mfxstm32l152.c:1318:6:mfxstm32l152_IDD_EnableIT 16 static
+../Components/mfxstm32l152/mfxstm32l152.c:1331:6:mfxstm32l152_IDD_ClearIT 16 static
+../Components/mfxstm32l152/mfxstm32l152.c:1342:9:mfxstm32l152_IDD_GetITStatus 16 static
+../Components/mfxstm32l152/mfxstm32l152.c:1353:6:mfxstm32l152_IDD_DisableIT 16 static
+../Components/mfxstm32l152/mfxstm32l152.c:1369:9:mfxstm32l152_Error_ReadSrc 16 static
+../Components/mfxstm32l152/mfxstm32l152.c:1380:9:mfxstm32l152_Error_ReadMsg 16 static
+../Components/mfxstm32l152/mfxstm32l152.c:1392:6:mfxstm32l152_Error_EnableIT 16 static
+../Components/mfxstm32l152/mfxstm32l152.c:1405:6:mfxstm32l152_Error_ClearIT 16 static
+../Components/mfxstm32l152/mfxstm32l152.c:1416:9:mfxstm32l152_Error_GetITStatus 16 static
+../Components/mfxstm32l152/mfxstm32l152.c:1427:6:mfxstm32l152_Error_DisableIT 16 static
+../Components/mfxstm32l152/mfxstm32l152.c:1436:9:mfxstm32l152_ReadReg 16 static
+../Components/mfxstm32l152/mfxstm32l152.c:1442:6:mfxstm32l152_WriteReg 16 static
+../Components/mfxstm32l152/mfxstm32l152.c:1457:16:mfxstm32l152_GetInstance 24 static
+../Components/mfxstm32l152/mfxstm32l152.c:1478:16:mfxstm32l152_ReleaseInstance 24 static
+../Components/mfxstm32l152/mfxstm32l152.c:1502:6:mfxstm32l152_reg24_setPinValue 24 static
diff --git a/P3_SETR2/Debug/Components/mfxstm32l152/subdir.mk b/P3_SETR2/Debug/Components/mfxstm32l152/subdir.mk
new file mode 100644
index 0000000..59187a9
--- /dev/null
+++ b/P3_SETR2/Debug/Components/mfxstm32l152/subdir.mk
@@ -0,0 +1,27 @@
+################################################################################
+# Automatically-generated file. Do not edit!
+# Toolchain: GNU Tools for STM32 (13.3.rel1)
+################################################################################
+
+# Add inputs and outputs from these tool invocations to the build variables
+C_SRCS += \
+../Components/mfxstm32l152/mfxstm32l152.c
+
+OBJS += \
+./Components/mfxstm32l152/mfxstm32l152.o
+
+C_DEPS += \
+./Components/mfxstm32l152/mfxstm32l152.d
+
+
+# Each subdirectory must supply rules for building sources it contributes
+Components/mfxstm32l152/%.o Components/mfxstm32l152/%.su Components/mfxstm32l152/%.cyclo: ../Components/mfxstm32l152/%.c Components/mfxstm32l152/subdir.mk
+ arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g -DDEBUG -DUSE_HAL_DRIVER -DSTM32L475xx -c -I../Core/Inc -I../Components -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../BSP -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+
+clean: clean-Components-2f-mfxstm32l152
+
+clean-Components-2f-mfxstm32l152:
+ -$(RM) ./Components/mfxstm32l152/mfxstm32l152.cyclo ./Components/mfxstm32l152/mfxstm32l152.d ./Components/mfxstm32l152/mfxstm32l152.o ./Components/mfxstm32l152/mfxstm32l152.su
+
+.PHONY: clean-Components-2f-mfxstm32l152
+
diff --git a/P3_SETR2/Debug/Components/ov9655/ov9655.cyclo b/P3_SETR2/Debug/Components/ov9655/ov9655.cyclo
new file mode 100644
index 0000000..718ef31
--- /dev/null
+++ b/P3_SETR2/Debug/Components/ov9655/ov9655.cyclo
@@ -0,0 +1,4 @@
+../Components/ov9655/ov9655.c:556:6:ov9655_Init 7
+../Components/ov9655/ov9655.c:617:6:ov9655_Config 5
+../Components/ov9655/ov9655.c:666:10:ov9655_ReadID 1
+../Components/ov9655/ov9655.c:684:17:ov9655_ConvertValue 23
diff --git a/P3_SETR2/Debug/Components/ov9655/ov9655.d b/P3_SETR2/Debug/Components/ov9655/ov9655.d
new file mode 100644
index 0000000..2e46797
--- /dev/null
+++ b/P3_SETR2/Debug/Components/ov9655/ov9655.d
@@ -0,0 +1,4 @@
+Components/ov9655/ov9655.o: ../Components/ov9655/ov9655.c \
+ ../Components/ov9655/ov9655.h ../Components/ov9655/../Common/camera.h
+../Components/ov9655/ov9655.h:
+../Components/ov9655/../Common/camera.h:
diff --git a/P3_SETR2/Debug/Components/ov9655/ov9655.o b/P3_SETR2/Debug/Components/ov9655/ov9655.o
new file mode 100644
index 0000000..fe2de42
Binary files /dev/null and b/P3_SETR2/Debug/Components/ov9655/ov9655.o differ
diff --git a/P3_SETR2/Debug/Components/ov9655/ov9655.su b/P3_SETR2/Debug/Components/ov9655/ov9655.su
new file mode 100644
index 0000000..8e8e40f
--- /dev/null
+++ b/P3_SETR2/Debug/Components/ov9655/ov9655.su
@@ -0,0 +1,4 @@
+../Components/ov9655/ov9655.c:556:6:ov9655_Init 24 static
+../Components/ov9655/ov9655.c:617:6:ov9655_Config 48 static
+../Components/ov9655/ov9655.c:666:10:ov9655_ReadID 16 static
+../Components/ov9655/ov9655.c:684:17:ov9655_ConvertValue 24 static
diff --git a/P3_SETR2/Debug/Components/ov9655/subdir.mk b/P3_SETR2/Debug/Components/ov9655/subdir.mk
new file mode 100644
index 0000000..584658f
--- /dev/null
+++ b/P3_SETR2/Debug/Components/ov9655/subdir.mk
@@ -0,0 +1,27 @@
+################################################################################
+# Automatically-generated file. Do not edit!
+# Toolchain: GNU Tools for STM32 (13.3.rel1)
+################################################################################
+
+# Add inputs and outputs from these tool invocations to the build variables
+C_SRCS += \
+../Components/ov9655/ov9655.c
+
+OBJS += \
+./Components/ov9655/ov9655.o
+
+C_DEPS += \
+./Components/ov9655/ov9655.d
+
+
+# Each subdirectory must supply rules for building sources it contributes
+Components/ov9655/%.o Components/ov9655/%.su Components/ov9655/%.cyclo: ../Components/ov9655/%.c Components/ov9655/subdir.mk
+ arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g -DDEBUG -DUSE_HAL_DRIVER -DSTM32L475xx -c -I../Core/Inc -I../Components -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../BSP -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+
+clean: clean-Components-2f-ov9655
+
+clean-Components-2f-ov9655:
+ -$(RM) ./Components/ov9655/ov9655.cyclo ./Components/ov9655/ov9655.d ./Components/ov9655/ov9655.o ./Components/ov9655/ov9655.su
+
+.PHONY: clean-Components-2f-ov9655
+
diff --git a/P3_SETR2/Debug/Components/st25dv/st25dv.cyclo b/P3_SETR2/Debug/Components/st25dv/st25dv.cyclo
new file mode 100644
index 0000000..17c8e71
--- /dev/null
+++ b/P3_SETR2/Debug/Components/st25dv/st25dv.cyclo
@@ -0,0 +1,79 @@
+../Components/st25dv/st25dv.c:78:9:ST25DV_RegisterBusIO 4
+../Components/st25dv/st25dv.c:120:16:ST25DV_Init 4
+../Components/st25dv/st25dv.c:145:16:ST25DV_ReadID 1
+../Components/st25dv/st25dv.c:159:16:ST25DV_IsDeviceReady 1
+../Components/st25dv/st25dv.c:180:16:ST25DV_GetGPOStatus 2
+../Components/st25dv/st25dv.c:211:16:ST25DV_ConfigureGPO 1
+../Components/st25dv/st25dv.c:225:16:ST25DV_ReadData 1
+../Components/st25dv/st25dv.c:239:16:ST25DV_WriteData 8
+../Components/st25dv/st25dv.c:297:9:ST25DV_ReadICRev 1
+../Components/st25dv/st25dv.c:310:9:ST25DV_ReadITPulse 2
+../Components/st25dv/st25dv.c:332:9:ST25DV_WriteITPulse 1
+../Components/st25dv/st25dv.c:352:9:ST25DV_ReadRegister 1
+../Components/st25dv/st25dv.c:367:9:ST25DV_WriteRegister 8
+../Components/st25dv/st25dv.c:424:9:ST25DV_ReadUID 4
+../Components/st25dv/st25dv.c:458:9:ST25DV_ReadDSFID 1
+../Components/st25dv/st25dv.c:470:9:ST25DV_ReadDsfidRFProtection 3
+../Components/st25dv/st25dv.c:499:9:ST25DV_ReadAFI 1
+../Components/st25dv/st25dv.c:511:9:ST25DV_ReadAfiRFProtection 3
+../Components/st25dv/st25dv.c:540:9:ST25DV_ReadI2CProtectZone 2
+../Components/st25dv/st25dv.c:567:9:ST25DV_WriteI2CProtectZonex 5
+../Components/st25dv/st25dv.c:607:9:ST25DV_ReadLockCCFile 4
+../Components/st25dv/st25dv.c:647:9:ST25DV_WriteLockCCFile 4
+../Components/st25dv/st25dv.c:685:9:ST25DV_ReadLockCFG 3
+../Components/st25dv/st25dv.c:715:9:ST25DV_WriteLockCFG 1
+../Components/st25dv/st25dv.c:732:9:ST25DV_PresentI2CPassword 2
+../Components/st25dv/st25dv.c:758:9:ST25DV_WriteI2CPassword 2
+../Components/st25dv/st25dv.c:785:9:ST25DV_ReadRFZxSS 6
+../Components/st25dv/st25dv.c:826:9:ST25DV_WriteRFZxSS 5
+../Components/st25dv/st25dv.c:865:9:ST25DV_ReadEndZonex 5
+../Components/st25dv/st25dv.c:899:9:ST25DV_WriteEndZonex 5
+../Components/st25dv/st25dv.c:931:9:ST25DV_InitEndZone 5
+../Components/st25dv/st25dv.c:971:9:ST25DV_CreateUserZone 19
+../Components/st25dv/st25dv.c:1045:9:ST25DV_ReadMemSize 4
+../Components/st25dv/st25dv.c:1076:9:ST25DV_ReadEHMode 3
+../Components/st25dv/st25dv.c:1106:9:ST25DV_WriteEHMode 1
+../Components/st25dv/st25dv.c:1123:9:ST25DV_ReadRFMngt 4
+../Components/st25dv/st25dv.c:1164:9:ST25DV_WriteRFMngt 1
+../Components/st25dv/st25dv.c:1175:9:ST25DV_GetRFDisable 3
+../Components/st25dv/st25dv.c:1205:9:ST25DV_SetRFDisable 1
+../Components/st25dv/st25dv.c:1219:9:ST25DV_ResetRFDisable 1
+../Components/st25dv/st25dv.c:1233:9:ST25DV_GetRFSleep 3
+../Components/st25dv/st25dv.c:1264:9:ST25DV_SetRFSleep 1
+../Components/st25dv/st25dv.c:1278:9:ST25DV_ResetRFSleep 1
+../Components/st25dv/st25dv.c:1292:9:ST25DV_ReadMBMode 3
+../Components/st25dv/st25dv.c:1321:9:ST25DV_WriteMBMode 1
+../Components/st25dv/st25dv.c:1340:9:ST25DV_ReadMBWDG 1
+../Components/st25dv/st25dv.c:1353:9:ST25DV_WriteMBWDG 1
+../Components/st25dv/st25dv.c:1367:9:ST25DV_ReadMailboxData 2
+../Components/st25dv/st25dv.c:1385:9:ST25DV_WriteMailboxData 2
+../Components/st25dv/st25dv.c:1407:9:ST25DV_ReadMailboxRegister 3
+../Components/st25dv/st25dv.c:1426:9:ST25DV_WriteMailboxRegister 3
+../Components/st25dv/st25dv.c:1444:9:ST25DV_ReadI2CSecuritySession_Dyn 3
+../Components/st25dv/st25dv.c:1482:9:ST25DV_ReadITSTStatus_Dyn 1
+../Components/st25dv/st25dv.c:1494:9:ST25DV_ReadGPO_Dyn 1
+../Components/st25dv/st25dv.c:1506:9:ST25DV_GetGPO_en_Dyn 3
+../Components/st25dv/st25dv.c:1534:9:ST25DV_SetGPO_en_Dyn 1
+../Components/st25dv/st25dv.c:1548:9:ST25DV_ResetGPO_en_Dyn 1
+../Components/st25dv/st25dv.c:1562:9:ST25DV_ReadEHCtrl_Dyn 6
+../Components/st25dv/st25dv.c:1622:9:ST25DV_GetEHENMode_Dyn 3
+../Components/st25dv/st25dv.c:1650:9:ST25DV_SetEHENMode_Dyn 1
+../Components/st25dv/st25dv.c:1663:9:ST25DV_ResetEHENMode_Dyn 1
+../Components/st25dv/st25dv.c:1677:9:ST25DV_GetEHON_Dyn 3
+../Components/st25dv/st25dv.c:1707:9:ST25DV_GetRFField_Dyn 3
+../Components/st25dv/st25dv.c:1737:9:ST25DV_GetVCC_Dyn 3
+../Components/st25dv/st25dv.c:1767:9:ST25DV_ReadRFMngt_Dyn 4
+../Components/st25dv/st25dv.c:1807:9:ST25DV_WriteRFMngt_Dyn 1
+../Components/st25dv/st25dv.c:1819:9:ST25DV_GetRFDisable_Dyn 3
+../Components/st25dv/st25dv.c:1848:9:ST25DV_SetRFDisable_Dyn 1
+../Components/st25dv/st25dv.c:1860:9:ST25DV_ResetRFDisable_Dyn 1
+../Components/st25dv/st25dv.c:1873:9:ST25DV_GetRFSleep_Dyn 3
+../Components/st25dv/st25dv.c:1902:9:ST25DV_SetRFSleep_Dyn 1
+../Components/st25dv/st25dv.c:1914:9:ST25DV_ResetRFSleep_Dyn 1
+../Components/st25dv/st25dv.c:1927:9:ST25DV_ReadMBCtrl_Dyn 2
+../Components/st25dv/st25dv.c:1952:9:ST25DV_GetMBEN_Dyn 3
+../Components/st25dv/st25dv.c:1978:9:ST25DV_SetMBEN_Dyn 1
+../Components/st25dv/st25dv.c:1991:9:ST25DV_ResetMBEN_Dyn 1
+../Components/st25dv/st25dv.c:2005:9:ST25DV_ReadMBLength_Dyn 1
+../Components/st25dv/st25dv.c:2011:16:ReadRegWrap 2
+../Components/st25dv/st25dv.c:2024:16:WriteRegWrap 6
diff --git a/P3_SETR2/Debug/Components/st25dv/st25dv.d b/P3_SETR2/Debug/Components/st25dv/st25dv.d
new file mode 100644
index 0000000..859c77c
--- /dev/null
+++ b/P3_SETR2/Debug/Components/st25dv/st25dv.d
@@ -0,0 +1,8 @@
+Components/st25dv/st25dv.o: ../Components/st25dv/st25dv.c \
+ ../Components/st25dv/st25dv.h ../Components/st25dv/st25dv_reg.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h
+../Components/st25dv/st25dv.h:
+../Components/st25dv/st25dv_reg.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
diff --git a/P3_SETR2/Debug/Components/st25dv/st25dv.o b/P3_SETR2/Debug/Components/st25dv/st25dv.o
new file mode 100644
index 0000000..b38d282
Binary files /dev/null and b/P3_SETR2/Debug/Components/st25dv/st25dv.o differ
diff --git a/P3_SETR2/Debug/Components/st25dv/st25dv.su b/P3_SETR2/Debug/Components/st25dv/st25dv.su
new file mode 100644
index 0000000..e364125
--- /dev/null
+++ b/P3_SETR2/Debug/Components/st25dv/st25dv.su
@@ -0,0 +1,79 @@
+../Components/st25dv/st25dv.c:78:9:ST25DV_RegisterBusIO 24 static
+../Components/st25dv/st25dv.c:120:16:ST25DV_Init 24 static
+../Components/st25dv/st25dv.c:145:16:ST25DV_ReadID 16 static
+../Components/st25dv/st25dv.c:159:16:ST25DV_IsDeviceReady 16 static
+../Components/st25dv/st25dv.c:180:16:ST25DV_GetGPOStatus 24 static
+../Components/st25dv/st25dv.c:211:16:ST25DV_ConfigureGPO 16 static
+../Components/st25dv/st25dv.c:225:16:ST25DV_ReadData 32 static
+../Components/st25dv/st25dv.c:239:16:ST25DV_WriteData 56 static
+../Components/st25dv/st25dv.c:297:9:ST25DV_ReadICRev 16 static
+../Components/st25dv/st25dv.c:310:9:ST25DV_ReadITPulse 24 static
+../Components/st25dv/st25dv.c:332:9:ST25DV_WriteITPulse 24 static
+../Components/st25dv/st25dv.c:352:9:ST25DV_ReadRegister 32 static
+../Components/st25dv/st25dv.c:367:9:ST25DV_WriteRegister 56 static
+../Components/st25dv/st25dv.c:424:9:ST25DV_ReadUID 32 static
+../Components/st25dv/st25dv.c:458:9:ST25DV_ReadDSFID 16 static
+../Components/st25dv/st25dv.c:470:9:ST25DV_ReadDsfidRFProtection 24 static
+../Components/st25dv/st25dv.c:499:9:ST25DV_ReadAFI 16 static
+../Components/st25dv/st25dv.c:511:9:ST25DV_ReadAfiRFProtection 24 static
+../Components/st25dv/st25dv.c:540:9:ST25DV_ReadI2CProtectZone 24 static
+../Components/st25dv/st25dv.c:567:9:ST25DV_WriteI2CProtectZonex 24 static
+../Components/st25dv/st25dv.c:607:9:ST25DV_ReadLockCCFile 24 static
+../Components/st25dv/st25dv.c:647:9:ST25DV_WriteLockCCFile 24 static
+../Components/st25dv/st25dv.c:685:9:ST25DV_ReadLockCFG 24 static
+../Components/st25dv/st25dv.c:715:9:ST25DV_WriteLockCFG 24 static
+../Components/st25dv/st25dv.c:732:9:ST25DV_PresentI2CPassword 48 static
+../Components/st25dv/st25dv.c:758:9:ST25DV_WriteI2CPassword 48 static
+../Components/st25dv/st25dv.c:785:9:ST25DV_ReadRFZxSS 32 static
+../Components/st25dv/st25dv.c:826:9:ST25DV_WriteRFZxSS 32 static
+../Components/st25dv/st25dv.c:865:9:ST25DV_ReadEndZonex 32 static
+../Components/st25dv/st25dv.c:899:9:ST25DV_WriteEndZonex 24 static
+../Components/st25dv/st25dv.c:931:9:ST25DV_InitEndZone 32 static
+../Components/st25dv/st25dv.c:971:9:ST25DV_CreateUserZone 40 static
+../Components/st25dv/st25dv.c:1045:9:ST25DV_ReadMemSize 24 static
+../Components/st25dv/st25dv.c:1076:9:ST25DV_ReadEHMode 24 static
+../Components/st25dv/st25dv.c:1106:9:ST25DV_WriteEHMode 24 static
+../Components/st25dv/st25dv.c:1123:9:ST25DV_ReadRFMngt 24 static
+../Components/st25dv/st25dv.c:1164:9:ST25DV_WriteRFMngt 16 static
+../Components/st25dv/st25dv.c:1175:9:ST25DV_GetRFDisable 24 static
+../Components/st25dv/st25dv.c:1205:9:ST25DV_SetRFDisable 24 static
+../Components/st25dv/st25dv.c:1219:9:ST25DV_ResetRFDisable 24 static
+../Components/st25dv/st25dv.c:1233:9:ST25DV_GetRFSleep 24 static
+../Components/st25dv/st25dv.c:1264:9:ST25DV_SetRFSleep 24 static
+../Components/st25dv/st25dv.c:1278:9:ST25DV_ResetRFSleep 24 static
+../Components/st25dv/st25dv.c:1292:9:ST25DV_ReadMBMode 24 static
+../Components/st25dv/st25dv.c:1321:9:ST25DV_WriteMBMode 24 static
+../Components/st25dv/st25dv.c:1340:9:ST25DV_ReadMBWDG 16 static
+../Components/st25dv/st25dv.c:1353:9:ST25DV_WriteMBWDG 16 static
+../Components/st25dv/st25dv.c:1367:9:ST25DV_ReadMailboxData 40 static
+../Components/st25dv/st25dv.c:1385:9:ST25DV_WriteMailboxData 40 static
+../Components/st25dv/st25dv.c:1407:9:ST25DV_ReadMailboxRegister 40 static
+../Components/st25dv/st25dv.c:1426:9:ST25DV_WriteMailboxRegister 40 static
+../Components/st25dv/st25dv.c:1444:9:ST25DV_ReadI2CSecuritySession_Dyn 24 static
+../Components/st25dv/st25dv.c:1482:9:ST25DV_ReadITSTStatus_Dyn 16 static
+../Components/st25dv/st25dv.c:1494:9:ST25DV_ReadGPO_Dyn 16 static
+../Components/st25dv/st25dv.c:1506:9:ST25DV_GetGPO_en_Dyn 24 static
+../Components/st25dv/st25dv.c:1534:9:ST25DV_SetGPO_en_Dyn 24 static
+../Components/st25dv/st25dv.c:1548:9:ST25DV_ResetGPO_en_Dyn 24 static
+../Components/st25dv/st25dv.c:1562:9:ST25DV_ReadEHCtrl_Dyn 24 static
+../Components/st25dv/st25dv.c:1622:9:ST25DV_GetEHENMode_Dyn 24 static
+../Components/st25dv/st25dv.c:1650:9:ST25DV_SetEHENMode_Dyn 24 static
+../Components/st25dv/st25dv.c:1663:9:ST25DV_ResetEHENMode_Dyn 24 static
+../Components/st25dv/st25dv.c:1677:9:ST25DV_GetEHON_Dyn 24 static
+../Components/st25dv/st25dv.c:1707:9:ST25DV_GetRFField_Dyn 24 static
+../Components/st25dv/st25dv.c:1737:9:ST25DV_GetVCC_Dyn 24 static
+../Components/st25dv/st25dv.c:1767:9:ST25DV_ReadRFMngt_Dyn 24 static
+../Components/st25dv/st25dv.c:1807:9:ST25DV_WriteRFMngt_Dyn 16 static
+../Components/st25dv/st25dv.c:1819:9:ST25DV_GetRFDisable_Dyn 24 static
+../Components/st25dv/st25dv.c:1848:9:ST25DV_SetRFDisable_Dyn 24 static
+../Components/st25dv/st25dv.c:1860:9:ST25DV_ResetRFDisable_Dyn 24 static
+../Components/st25dv/st25dv.c:1873:9:ST25DV_GetRFSleep_Dyn 24 static
+../Components/st25dv/st25dv.c:1902:9:ST25DV_SetRFSleep_Dyn 24 static
+../Components/st25dv/st25dv.c:1914:9:ST25DV_ResetRFSleep_Dyn 24 static
+../Components/st25dv/st25dv.c:1927:9:ST25DV_ReadMBCtrl_Dyn 24 static
+../Components/st25dv/st25dv.c:1952:9:ST25DV_GetMBEN_Dyn 24 static
+../Components/st25dv/st25dv.c:1978:9:ST25DV_SetMBEN_Dyn 24 static
+../Components/st25dv/st25dv.c:1991:9:ST25DV_ResetMBEN_Dyn 24 static
+../Components/st25dv/st25dv.c:2005:9:ST25DV_ReadMBLength_Dyn 16 static
+../Components/st25dv/st25dv.c:2011:16:ReadRegWrap 40 static
+../Components/st25dv/st25dv.c:2024:16:WriteRegWrap 48 static
diff --git a/P3_SETR2/Debug/Components/st25dv/st25dv_reg.cyclo b/P3_SETR2/Debug/Components/st25dv/st25dv_reg.cyclo
new file mode 100644
index 0000000..29689ce
--- /dev/null
+++ b/P3_SETR2/Debug/Components/st25dv/st25dv_reg.cyclo
@@ -0,0 +1,144 @@
+../Components/st25dv/st25dv_reg.c:21:9:st25dv_readreg 1
+../Components/st25dv/st25dv_reg.c:26:9:st25dv_WriteReg 1
+../Components/st25dv/st25dv_reg.c:33:9:st25dv_get_icref 2
+../Components/st25dv/st25dv_reg.c:40:9:st25dv_get_enda1 2
+../Components/st25dv/st25dv_reg.c:47:9:st25dv_set_enda1 1
+../Components/st25dv/st25dv_reg.c:52:9:st25dv_get_enda2 2
+../Components/st25dv/st25dv_reg.c:59:9:st25dv_set_enda2 1
+../Components/st25dv/st25dv_reg.c:64:9:st25dv_get_enda3 2
+../Components/st25dv/st25dv_reg.c:71:9:st25dv_set_enda3 1
+../Components/st25dv/st25dv_reg.c:76:9:st25dv_get_dsfid 2
+../Components/st25dv/st25dv_reg.c:83:9:st25dv_get_afi 2
+../Components/st25dv/st25dv_reg.c:90:9:st25dv_get_mem_size_msb 2
+../Components/st25dv/st25dv_reg.c:97:9:st25dv_get_blk_size 2
+../Components/st25dv/st25dv_reg.c:104:9:st25dv_get_mem_size_lsb 2
+../Components/st25dv/st25dv_reg.c:111:9:st25dv_get_icrev 2
+../Components/st25dv/st25dv_reg.c:118:9:st25dv_get_uid 2
+../Components/st25dv/st25dv_reg.c:125:9:st25dv_get_i2cpasswd 2
+../Components/st25dv/st25dv_reg.c:132:9:st25dv_set_i2cpasswd 2
+../Components/st25dv/st25dv_reg.c:139:9:st25dv_get_lockdsfid 2
+../Components/st25dv/st25dv_reg.c:146:9:st25dv_get_lockafi 2
+../Components/st25dv/st25dv_reg.c:153:9:st25dv_get_mb_mode_rw 2
+../Components/st25dv/st25dv_reg.c:162:9:st25dv_set_mb_mode_rw 3
+../Components/st25dv/st25dv_reg.c:176:9:st25dv_get_mblen_dyn_mblen 2
+../Components/st25dv/st25dv_reg.c:183:9:st25dv_get_mb_ctrl_dyn_mben 2
+../Components/st25dv/st25dv_reg.c:192:9:st25dv_set_mb_ctrl_dyn_mben 3
+../Components/st25dv/st25dv_reg.c:206:9:st25dv_get_mb_ctrl_dyn_hostputmsg 2
+../Components/st25dv/st25dv_reg.c:215:9:st25dv_get_mb_ctrl_dyn_rfputmsg 2
+../Components/st25dv/st25dv_reg.c:224:9:st25dv_get_mb_ctrl_dyn_streserved 2
+../Components/st25dv/st25dv_reg.c:233:9:st25dv_get_mb_ctrl_dyn_hostmissmsg 2
+../Components/st25dv/st25dv_reg.c:242:9:st25dv_get_mb_ctrl_dyn_rfmissmsg 2
+../Components/st25dv/st25dv_reg.c:251:9:st25dv_get_mb_ctrl_dyn_currentmsg 2
+../Components/st25dv/st25dv_reg.c:260:9:st25dv_get_mb_ctrl_dyn_all 2
+../Components/st25dv/st25dv_reg.c:267:9:st25dv_get_mb_wdg_delay 2
+../Components/st25dv/st25dv_reg.c:276:9:st25dv_set_mb_wdg_delay 3
+../Components/st25dv/st25dv_reg.c:290:9:st25dv_get_gpo_rfuserstate 2
+../Components/st25dv/st25dv_reg.c:299:9:st25dv_set_gpo_rfuserstate 3
+../Components/st25dv/st25dv_reg.c:313:9:st25dv_get_gpo_rfactivity 2
+../Components/st25dv/st25dv_reg.c:322:9:st25dv_set_gpo_rfactivity 3
+../Components/st25dv/st25dv_reg.c:336:9:st25dv_get_gpo_rfinterrupt 2
+../Components/st25dv/st25dv_reg.c:345:9:st25dv_set_gpo_rfinterrupt 3
+../Components/st25dv/st25dv_reg.c:359:9:st25dv_get_gpo_fieldchange 2
+../Components/st25dv/st25dv_reg.c:368:9:st25dv_set_gpo_fieldchange 3
+../Components/st25dv/st25dv_reg.c:382:9:st25dv_get_gpo_rfputmsg 2
+../Components/st25dv/st25dv_reg.c:391:9:st25dv_set_gpo_rfputmsg 3
+../Components/st25dv/st25dv_reg.c:405:9:st25dv_get_gpo_rfgetmsg 2
+../Components/st25dv/st25dv_reg.c:414:9:st25dv_set_gpo_rfgetmsg 3
+../Components/st25dv/st25dv_reg.c:428:9:st25dv_get_gpo_rfwrite 2
+../Components/st25dv/st25dv_reg.c:437:9:st25dv_set_gpo_rfwrite 3
+../Components/st25dv/st25dv_reg.c:451:9:st25dv_get_gpo_enable 2
+../Components/st25dv/st25dv_reg.c:460:9:st25dv_set_gpo_enable 3
+../Components/st25dv/st25dv_reg.c:474:9:st25dv_get_gpo_all 2
+../Components/st25dv/st25dv_reg.c:481:9:st25dv_set_gpo_all 2
+../Components/st25dv/st25dv_reg.c:488:9:st25dv_get_gpo_dyn_rfuserstate 2
+../Components/st25dv/st25dv_reg.c:497:9:st25dv_set_gpo_dyn_rfuserstate 3
+../Components/st25dv/st25dv_reg.c:511:9:st25dv_get_gpo_dyn_rfactivity 2
+../Components/st25dv/st25dv_reg.c:520:9:st25dv_set_gpo_dyn_rfactivity 3
+../Components/st25dv/st25dv_reg.c:534:9:st25dv_get_gpo_dyn_rfinterrupt 2
+../Components/st25dv/st25dv_reg.c:543:9:st25dv_set_gpo_dyn_rfinterrupt 3
+../Components/st25dv/st25dv_reg.c:557:9:st25dv_get_gpo_dyn_fieldchange 2
+../Components/st25dv/st25dv_reg.c:566:9:st25dv_set_gpo_dyn_fieldchange 3
+../Components/st25dv/st25dv_reg.c:580:9:st25dv_get_gpo_dyn_rfputmsg 2
+../Components/st25dv/st25dv_reg.c:589:9:st25dv_set_gpo_dyn_rfputmsg 3
+../Components/st25dv/st25dv_reg.c:603:9:st25dv_get_gpo_dyn_rfgetmsg 2
+../Components/st25dv/st25dv_reg.c:612:9:st25dv_set_gpo_dyn_rfgetmsg 3
+../Components/st25dv/st25dv_reg.c:626:9:st25dv_get_gpo_dyn_rfwrite 2
+../Components/st25dv/st25dv_reg.c:635:9:st25dv_set_gpo_dyn_rfwrite 3
+../Components/st25dv/st25dv_reg.c:649:9:st25dv_get_gpo_dyn_enable 2
+../Components/st25dv/st25dv_reg.c:658:9:st25dv_set_gpo_dyn_enable 3
+../Components/st25dv/st25dv_reg.c:672:9:st25dv_get_gpo_dyn_all 2
+../Components/st25dv/st25dv_reg.c:679:9:st25dv_set_gpo_dyn_all 2
+../Components/st25dv/st25dv_reg.c:686:9:st25dv_get_ittime_delay 2
+../Components/st25dv/st25dv_reg.c:695:9:st25dv_set_ittime_delay 3
+../Components/st25dv/st25dv_reg.c:709:9:st25dv_get_itsts_dyn_rfuserstate 2
+../Components/st25dv/st25dv_reg.c:718:9:st25dv_get_itsts_dyn_rfactivity 2
+../Components/st25dv/st25dv_reg.c:727:9:st25dv_get_itsts_dyn_rfinterrupt 2
+../Components/st25dv/st25dv_reg.c:736:9:st25dv_get_itsts_dyn_fieldfalling 2
+../Components/st25dv/st25dv_reg.c:745:9:st25dv_get_itsts_dyn_fieldrising 2
+../Components/st25dv/st25dv_reg.c:754:9:st25dv_get_itsts_dyn_rfputmsg 2
+../Components/st25dv/st25dv_reg.c:763:9:st25dv_get_itsts_dyn_rfgetmsg 2
+../Components/st25dv/st25dv_reg.c:772:9:st25dv_get_itsts_dyn_rfwrite 2
+../Components/st25dv/st25dv_reg.c:781:9:st25dv_get_itsts_dyn_all 2
+../Components/st25dv/st25dv_reg.c:788:9:st25dv_get_eh_mode 2
+../Components/st25dv/st25dv_reg.c:797:9:st25dv_set_eh_mode 3
+../Components/st25dv/st25dv_reg.c:811:9:st25dv_get_eh_ctrl_dyn_eh_en 2
+../Components/st25dv/st25dv_reg.c:820:9:st25dv_set_eh_ctrl_dyn_eh_en 3
+../Components/st25dv/st25dv_reg.c:834:9:st25dv_get_eh_ctrl_dyn_eh_on 2
+../Components/st25dv/st25dv_reg.c:843:9:st25dv_get_eh_ctrl_dyn_field_on 2
+../Components/st25dv/st25dv_reg.c:852:9:st25dv_get_eh_ctrl_dyn_vcc_on 2
+../Components/st25dv/st25dv_reg.c:861:9:st25dv_get_eh_ctrl_dyn_all 2
+../Components/st25dv/st25dv_reg.c:870:9:st25dv_get_rf_mngt_rfdis 2
+../Components/st25dv/st25dv_reg.c:879:9:st25dv_set_rf_mngt_rfdis 3
+../Components/st25dv/st25dv_reg.c:893:9:st25dv_get_rf_mngt_rfsleep 2
+../Components/st25dv/st25dv_reg.c:902:9:st25dv_set_rf_mngt_rfsleep 3
+../Components/st25dv/st25dv_reg.c:916:9:st25dv_get_rf_mngt_all 2
+../Components/st25dv/st25dv_reg.c:925:9:st25dv_set_rf_mngt_all 3
+../Components/st25dv/st25dv_reg.c:939:9:st25dv_get_rf_mngt_dyn_rfdis 2
+../Components/st25dv/st25dv_reg.c:948:9:st25dv_set_rf_mngt_dyn_rfdis 3
+../Components/st25dv/st25dv_reg.c:962:9:st25dv_get_rf_mngt_dyn_rfsleep 2
+../Components/st25dv/st25dv_reg.c:971:9:st25dv_set_rf_mngt_dyn_rfsleep 3
+../Components/st25dv/st25dv_reg.c:985:9:st25dv_get_rf_mngt_dyn_all 2
+../Components/st25dv/st25dv_reg.c:994:9:st25dv_set_rf_mngt_dyn_all 3
+../Components/st25dv/st25dv_reg.c:1008:9:st25dv_get_rfa1ss_pwdctrl 2
+../Components/st25dv/st25dv_reg.c:1017:9:st25dv_set_rfa1ss_pwdctrl 3
+../Components/st25dv/st25dv_reg.c:1031:9:st25dv_get_rfa1ss_rwprot 2
+../Components/st25dv/st25dv_reg.c:1040:9:st25dv_set_rfa1ss_rwprot 3
+../Components/st25dv/st25dv_reg.c:1054:9:st25dv_get_rfa1ss_all 2
+../Components/st25dv/st25dv_reg.c:1063:9:st25dv_set_rfa1ss_all 3
+../Components/st25dv/st25dv_reg.c:1077:9:st25dv_get_rfa2ss_pwdctrl 2
+../Components/st25dv/st25dv_reg.c:1086:9:st25dv_set_rfa2ss_pwdctrl 3
+../Components/st25dv/st25dv_reg.c:1100:9:st25dv_get_rfa2ss_rwprot 2
+../Components/st25dv/st25dv_reg.c:1109:9:st25dv_set_rfa2ss_rwprot 3
+../Components/st25dv/st25dv_reg.c:1123:9:st25dv_get_rfa2ss_all 2
+../Components/st25dv/st25dv_reg.c:1132:9:st25dv_set_rfa2ss_all 3
+../Components/st25dv/st25dv_reg.c:1146:9:st25dv_get_rfa3ss_pwdctrl 2
+../Components/st25dv/st25dv_reg.c:1155:9:st25dv_set_rfa3ss_pwdctrl 3
+../Components/st25dv/st25dv_reg.c:1169:9:st25dv_get_rfa3ss_rwprot 2
+../Components/st25dv/st25dv_reg.c:1178:9:st25dv_set_rfa3ss_rwprot 3
+../Components/st25dv/st25dv_reg.c:1192:9:st25dv_get_rfa3ss_all 2
+../Components/st25dv/st25dv_reg.c:1201:9:st25dv_set_rfa3ss_all 3
+../Components/st25dv/st25dv_reg.c:1215:9:st25dv_get_rfa4ss_pwdctrl 2
+../Components/st25dv/st25dv_reg.c:1224:9:st25dv_set_rfa4ss_pwdctrl 3
+../Components/st25dv/st25dv_reg.c:1238:9:st25dv_get_rfa4ss_rwprot 2
+../Components/st25dv/st25dv_reg.c:1247:9:st25dv_set_rfa4ss_rwprot 3
+../Components/st25dv/st25dv_reg.c:1261:9:st25dv_get_rfa4ss_all 2
+../Components/st25dv/st25dv_reg.c:1270:9:st25dv_set_rfa4ss_all 3
+../Components/st25dv/st25dv_reg.c:1284:9:st25dv_get_i2css_pz1 2
+../Components/st25dv/st25dv_reg.c:1293:9:st25dv_set_i2css_pz1 3
+../Components/st25dv/st25dv_reg.c:1307:9:st25dv_get_i2css_pz2 2
+../Components/st25dv/st25dv_reg.c:1316:9:st25dv_set_i2css_pz2 3
+../Components/st25dv/st25dv_reg.c:1330:9:st25dv_get_i2css_pz3 2
+../Components/st25dv/st25dv_reg.c:1339:9:st25dv_set_i2css_pz3 3
+../Components/st25dv/st25dv_reg.c:1353:9:st25dv_get_i2css_pz4 2
+../Components/st25dv/st25dv_reg.c:1362:9:st25dv_set_i2css_pz4 3
+../Components/st25dv/st25dv_reg.c:1376:9:st25dv_get_i2css_all 2
+../Components/st25dv/st25dv_reg.c:1383:9:st25dv_set_i2css_all 2
+../Components/st25dv/st25dv_reg.c:1390:9:st25dv_get_lockccfile_blck0 2
+../Components/st25dv/st25dv_reg.c:1399:9:st25dv_set_lockccfile_blck0 3
+../Components/st25dv/st25dv_reg.c:1413:9:st25dv_get_lockccfile_blck1 2
+../Components/st25dv/st25dv_reg.c:1422:9:st25dv_set_lockccfile_blck1 3
+../Components/st25dv/st25dv_reg.c:1436:9:st25dv_get_lockccfile_all 2
+../Components/st25dv/st25dv_reg.c:1445:9:st25dv_set_lockccfile_all 3
+../Components/st25dv/st25dv_reg.c:1459:9:st25dv_get_lockcfg_b0 2
+../Components/st25dv/st25dv_reg.c:1468:9:st25dv_set_lockcfg_b0 3
+../Components/st25dv/st25dv_reg.c:1482:9:st25dv_get_i2c_sso_dyn_i2csso 2
diff --git a/P3_SETR2/Debug/Components/st25dv/st25dv_reg.d b/P3_SETR2/Debug/Components/st25dv/st25dv_reg.d
new file mode 100644
index 0000000..68bab3a
--- /dev/null
+++ b/P3_SETR2/Debug/Components/st25dv/st25dv_reg.d
@@ -0,0 +1,7 @@
+Components/st25dv/st25dv_reg.o: ../Components/st25dv/st25dv_reg.c \
+ ../Components/st25dv/st25dv_reg.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h
+../Components/st25dv/st25dv_reg.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
diff --git a/P3_SETR2/Debug/Components/st25dv/st25dv_reg.o b/P3_SETR2/Debug/Components/st25dv/st25dv_reg.o
new file mode 100644
index 0000000..c3b0a56
Binary files /dev/null and b/P3_SETR2/Debug/Components/st25dv/st25dv_reg.o differ
diff --git a/P3_SETR2/Debug/Components/st25dv/st25dv_reg.su b/P3_SETR2/Debug/Components/st25dv/st25dv_reg.su
new file mode 100644
index 0000000..3566d1d
--- /dev/null
+++ b/P3_SETR2/Debug/Components/st25dv/st25dv_reg.su
@@ -0,0 +1,144 @@
+../Components/st25dv/st25dv_reg.c:21:9:st25dv_readreg 32 static
+../Components/st25dv/st25dv_reg.c:26:9:st25dv_WriteReg 32 static
+../Components/st25dv/st25dv_reg.c:33:9:st25dv_get_icref 16 static
+../Components/st25dv/st25dv_reg.c:40:9:st25dv_get_enda1 16 static
+../Components/st25dv/st25dv_reg.c:47:9:st25dv_set_enda1 16 static
+../Components/st25dv/st25dv_reg.c:52:9:st25dv_get_enda2 16 static
+../Components/st25dv/st25dv_reg.c:59:9:st25dv_set_enda2 16 static
+../Components/st25dv/st25dv_reg.c:64:9:st25dv_get_enda3 16 static
+../Components/st25dv/st25dv_reg.c:71:9:st25dv_set_enda3 16 static
+../Components/st25dv/st25dv_reg.c:76:9:st25dv_get_dsfid 16 static
+../Components/st25dv/st25dv_reg.c:83:9:st25dv_get_afi 16 static
+../Components/st25dv/st25dv_reg.c:90:9:st25dv_get_mem_size_msb 16 static
+../Components/st25dv/st25dv_reg.c:97:9:st25dv_get_blk_size 16 static
+../Components/st25dv/st25dv_reg.c:104:9:st25dv_get_mem_size_lsb 16 static
+../Components/st25dv/st25dv_reg.c:111:9:st25dv_get_icrev 16 static
+../Components/st25dv/st25dv_reg.c:118:9:st25dv_get_uid 16 static
+../Components/st25dv/st25dv_reg.c:125:9:st25dv_get_i2cpasswd 16 static
+../Components/st25dv/st25dv_reg.c:132:9:st25dv_set_i2cpasswd 16 static
+../Components/st25dv/st25dv_reg.c:139:9:st25dv_get_lockdsfid 16 static
+../Components/st25dv/st25dv_reg.c:146:9:st25dv_get_lockafi 16 static
+../Components/st25dv/st25dv_reg.c:153:9:st25dv_get_mb_mode_rw 16 static
+../Components/st25dv/st25dv_reg.c:162:9:st25dv_set_mb_mode_rw 24 static
+../Components/st25dv/st25dv_reg.c:176:9:st25dv_get_mblen_dyn_mblen 16 static
+../Components/st25dv/st25dv_reg.c:183:9:st25dv_get_mb_ctrl_dyn_mben 16 static
+../Components/st25dv/st25dv_reg.c:192:9:st25dv_set_mb_ctrl_dyn_mben 24 static
+../Components/st25dv/st25dv_reg.c:206:9:st25dv_get_mb_ctrl_dyn_hostputmsg 16 static
+../Components/st25dv/st25dv_reg.c:215:9:st25dv_get_mb_ctrl_dyn_rfputmsg 16 static
+../Components/st25dv/st25dv_reg.c:224:9:st25dv_get_mb_ctrl_dyn_streserved 16 static
+../Components/st25dv/st25dv_reg.c:233:9:st25dv_get_mb_ctrl_dyn_hostmissmsg 16 static
+../Components/st25dv/st25dv_reg.c:242:9:st25dv_get_mb_ctrl_dyn_rfmissmsg 16 static
+../Components/st25dv/st25dv_reg.c:251:9:st25dv_get_mb_ctrl_dyn_currentmsg 16 static
+../Components/st25dv/st25dv_reg.c:260:9:st25dv_get_mb_ctrl_dyn_all 16 static
+../Components/st25dv/st25dv_reg.c:267:9:st25dv_get_mb_wdg_delay 16 static
+../Components/st25dv/st25dv_reg.c:276:9:st25dv_set_mb_wdg_delay 24 static
+../Components/st25dv/st25dv_reg.c:290:9:st25dv_get_gpo_rfuserstate 16 static
+../Components/st25dv/st25dv_reg.c:299:9:st25dv_set_gpo_rfuserstate 24 static
+../Components/st25dv/st25dv_reg.c:313:9:st25dv_get_gpo_rfactivity 16 static
+../Components/st25dv/st25dv_reg.c:322:9:st25dv_set_gpo_rfactivity 24 static
+../Components/st25dv/st25dv_reg.c:336:9:st25dv_get_gpo_rfinterrupt 16 static
+../Components/st25dv/st25dv_reg.c:345:9:st25dv_set_gpo_rfinterrupt 24 static
+../Components/st25dv/st25dv_reg.c:359:9:st25dv_get_gpo_fieldchange 16 static
+../Components/st25dv/st25dv_reg.c:368:9:st25dv_set_gpo_fieldchange 24 static
+../Components/st25dv/st25dv_reg.c:382:9:st25dv_get_gpo_rfputmsg 16 static
+../Components/st25dv/st25dv_reg.c:391:9:st25dv_set_gpo_rfputmsg 24 static
+../Components/st25dv/st25dv_reg.c:405:9:st25dv_get_gpo_rfgetmsg 16 static
+../Components/st25dv/st25dv_reg.c:414:9:st25dv_set_gpo_rfgetmsg 24 static
+../Components/st25dv/st25dv_reg.c:428:9:st25dv_get_gpo_rfwrite 16 static
+../Components/st25dv/st25dv_reg.c:437:9:st25dv_set_gpo_rfwrite 24 static
+../Components/st25dv/st25dv_reg.c:451:9:st25dv_get_gpo_enable 16 static
+../Components/st25dv/st25dv_reg.c:460:9:st25dv_set_gpo_enable 24 static
+../Components/st25dv/st25dv_reg.c:474:9:st25dv_get_gpo_all 16 static
+../Components/st25dv/st25dv_reg.c:481:9:st25dv_set_gpo_all 16 static
+../Components/st25dv/st25dv_reg.c:488:9:st25dv_get_gpo_dyn_rfuserstate 16 static
+../Components/st25dv/st25dv_reg.c:497:9:st25dv_set_gpo_dyn_rfuserstate 24 static
+../Components/st25dv/st25dv_reg.c:511:9:st25dv_get_gpo_dyn_rfactivity 16 static
+../Components/st25dv/st25dv_reg.c:520:9:st25dv_set_gpo_dyn_rfactivity 24 static
+../Components/st25dv/st25dv_reg.c:534:9:st25dv_get_gpo_dyn_rfinterrupt 16 static
+../Components/st25dv/st25dv_reg.c:543:9:st25dv_set_gpo_dyn_rfinterrupt 24 static
+../Components/st25dv/st25dv_reg.c:557:9:st25dv_get_gpo_dyn_fieldchange 16 static
+../Components/st25dv/st25dv_reg.c:566:9:st25dv_set_gpo_dyn_fieldchange 24 static
+../Components/st25dv/st25dv_reg.c:580:9:st25dv_get_gpo_dyn_rfputmsg 16 static
+../Components/st25dv/st25dv_reg.c:589:9:st25dv_set_gpo_dyn_rfputmsg 24 static
+../Components/st25dv/st25dv_reg.c:603:9:st25dv_get_gpo_dyn_rfgetmsg 16 static
+../Components/st25dv/st25dv_reg.c:612:9:st25dv_set_gpo_dyn_rfgetmsg 24 static
+../Components/st25dv/st25dv_reg.c:626:9:st25dv_get_gpo_dyn_rfwrite 16 static
+../Components/st25dv/st25dv_reg.c:635:9:st25dv_set_gpo_dyn_rfwrite 24 static
+../Components/st25dv/st25dv_reg.c:649:9:st25dv_get_gpo_dyn_enable 16 static
+../Components/st25dv/st25dv_reg.c:658:9:st25dv_set_gpo_dyn_enable 24 static
+../Components/st25dv/st25dv_reg.c:672:9:st25dv_get_gpo_dyn_all 16 static
+../Components/st25dv/st25dv_reg.c:679:9:st25dv_set_gpo_dyn_all 16 static
+../Components/st25dv/st25dv_reg.c:686:9:st25dv_get_ittime_delay 16 static
+../Components/st25dv/st25dv_reg.c:695:9:st25dv_set_ittime_delay 24 static
+../Components/st25dv/st25dv_reg.c:709:9:st25dv_get_itsts_dyn_rfuserstate 16 static
+../Components/st25dv/st25dv_reg.c:718:9:st25dv_get_itsts_dyn_rfactivity 16 static
+../Components/st25dv/st25dv_reg.c:727:9:st25dv_get_itsts_dyn_rfinterrupt 16 static
+../Components/st25dv/st25dv_reg.c:736:9:st25dv_get_itsts_dyn_fieldfalling 16 static
+../Components/st25dv/st25dv_reg.c:745:9:st25dv_get_itsts_dyn_fieldrising 16 static
+../Components/st25dv/st25dv_reg.c:754:9:st25dv_get_itsts_dyn_rfputmsg 16 static
+../Components/st25dv/st25dv_reg.c:763:9:st25dv_get_itsts_dyn_rfgetmsg 16 static
+../Components/st25dv/st25dv_reg.c:772:9:st25dv_get_itsts_dyn_rfwrite 16 static
+../Components/st25dv/st25dv_reg.c:781:9:st25dv_get_itsts_dyn_all 16 static
+../Components/st25dv/st25dv_reg.c:788:9:st25dv_get_eh_mode 16 static
+../Components/st25dv/st25dv_reg.c:797:9:st25dv_set_eh_mode 24 static
+../Components/st25dv/st25dv_reg.c:811:9:st25dv_get_eh_ctrl_dyn_eh_en 16 static
+../Components/st25dv/st25dv_reg.c:820:9:st25dv_set_eh_ctrl_dyn_eh_en 24 static
+../Components/st25dv/st25dv_reg.c:834:9:st25dv_get_eh_ctrl_dyn_eh_on 16 static
+../Components/st25dv/st25dv_reg.c:843:9:st25dv_get_eh_ctrl_dyn_field_on 16 static
+../Components/st25dv/st25dv_reg.c:852:9:st25dv_get_eh_ctrl_dyn_vcc_on 16 static
+../Components/st25dv/st25dv_reg.c:861:9:st25dv_get_eh_ctrl_dyn_all 16 static
+../Components/st25dv/st25dv_reg.c:870:9:st25dv_get_rf_mngt_rfdis 16 static
+../Components/st25dv/st25dv_reg.c:879:9:st25dv_set_rf_mngt_rfdis 24 static
+../Components/st25dv/st25dv_reg.c:893:9:st25dv_get_rf_mngt_rfsleep 16 static
+../Components/st25dv/st25dv_reg.c:902:9:st25dv_set_rf_mngt_rfsleep 24 static
+../Components/st25dv/st25dv_reg.c:916:9:st25dv_get_rf_mngt_all 16 static
+../Components/st25dv/st25dv_reg.c:925:9:st25dv_set_rf_mngt_all 24 static
+../Components/st25dv/st25dv_reg.c:939:9:st25dv_get_rf_mngt_dyn_rfdis 16 static
+../Components/st25dv/st25dv_reg.c:948:9:st25dv_set_rf_mngt_dyn_rfdis 24 static
+../Components/st25dv/st25dv_reg.c:962:9:st25dv_get_rf_mngt_dyn_rfsleep 16 static
+../Components/st25dv/st25dv_reg.c:971:9:st25dv_set_rf_mngt_dyn_rfsleep 24 static
+../Components/st25dv/st25dv_reg.c:985:9:st25dv_get_rf_mngt_dyn_all 16 static
+../Components/st25dv/st25dv_reg.c:994:9:st25dv_set_rf_mngt_dyn_all 24 static
+../Components/st25dv/st25dv_reg.c:1008:9:st25dv_get_rfa1ss_pwdctrl 16 static
+../Components/st25dv/st25dv_reg.c:1017:9:st25dv_set_rfa1ss_pwdctrl 24 static
+../Components/st25dv/st25dv_reg.c:1031:9:st25dv_get_rfa1ss_rwprot 16 static
+../Components/st25dv/st25dv_reg.c:1040:9:st25dv_set_rfa1ss_rwprot 24 static
+../Components/st25dv/st25dv_reg.c:1054:9:st25dv_get_rfa1ss_all 16 static
+../Components/st25dv/st25dv_reg.c:1063:9:st25dv_set_rfa1ss_all 24 static
+../Components/st25dv/st25dv_reg.c:1077:9:st25dv_get_rfa2ss_pwdctrl 16 static
+../Components/st25dv/st25dv_reg.c:1086:9:st25dv_set_rfa2ss_pwdctrl 24 static
+../Components/st25dv/st25dv_reg.c:1100:9:st25dv_get_rfa2ss_rwprot 16 static
+../Components/st25dv/st25dv_reg.c:1109:9:st25dv_set_rfa2ss_rwprot 24 static
+../Components/st25dv/st25dv_reg.c:1123:9:st25dv_get_rfa2ss_all 16 static
+../Components/st25dv/st25dv_reg.c:1132:9:st25dv_set_rfa2ss_all 24 static
+../Components/st25dv/st25dv_reg.c:1146:9:st25dv_get_rfa3ss_pwdctrl 16 static
+../Components/st25dv/st25dv_reg.c:1155:9:st25dv_set_rfa3ss_pwdctrl 24 static
+../Components/st25dv/st25dv_reg.c:1169:9:st25dv_get_rfa3ss_rwprot 16 static
+../Components/st25dv/st25dv_reg.c:1178:9:st25dv_set_rfa3ss_rwprot 24 static
+../Components/st25dv/st25dv_reg.c:1192:9:st25dv_get_rfa3ss_all 16 static
+../Components/st25dv/st25dv_reg.c:1201:9:st25dv_set_rfa3ss_all 24 static
+../Components/st25dv/st25dv_reg.c:1215:9:st25dv_get_rfa4ss_pwdctrl 16 static
+../Components/st25dv/st25dv_reg.c:1224:9:st25dv_set_rfa4ss_pwdctrl 24 static
+../Components/st25dv/st25dv_reg.c:1238:9:st25dv_get_rfa4ss_rwprot 16 static
+../Components/st25dv/st25dv_reg.c:1247:9:st25dv_set_rfa4ss_rwprot 24 static
+../Components/st25dv/st25dv_reg.c:1261:9:st25dv_get_rfa4ss_all 16 static
+../Components/st25dv/st25dv_reg.c:1270:9:st25dv_set_rfa4ss_all 24 static
+../Components/st25dv/st25dv_reg.c:1284:9:st25dv_get_i2css_pz1 16 static
+../Components/st25dv/st25dv_reg.c:1293:9:st25dv_set_i2css_pz1 24 static
+../Components/st25dv/st25dv_reg.c:1307:9:st25dv_get_i2css_pz2 16 static
+../Components/st25dv/st25dv_reg.c:1316:9:st25dv_set_i2css_pz2 24 static
+../Components/st25dv/st25dv_reg.c:1330:9:st25dv_get_i2css_pz3 16 static
+../Components/st25dv/st25dv_reg.c:1339:9:st25dv_set_i2css_pz3 24 static
+../Components/st25dv/st25dv_reg.c:1353:9:st25dv_get_i2css_pz4 16 static
+../Components/st25dv/st25dv_reg.c:1362:9:st25dv_set_i2css_pz4 24 static
+../Components/st25dv/st25dv_reg.c:1376:9:st25dv_get_i2css_all 16 static
+../Components/st25dv/st25dv_reg.c:1383:9:st25dv_set_i2css_all 16 static
+../Components/st25dv/st25dv_reg.c:1390:9:st25dv_get_lockccfile_blck0 16 static
+../Components/st25dv/st25dv_reg.c:1399:9:st25dv_set_lockccfile_blck0 24 static
+../Components/st25dv/st25dv_reg.c:1413:9:st25dv_get_lockccfile_blck1 16 static
+../Components/st25dv/st25dv_reg.c:1422:9:st25dv_set_lockccfile_blck1 24 static
+../Components/st25dv/st25dv_reg.c:1436:9:st25dv_get_lockccfile_all 16 static
+../Components/st25dv/st25dv_reg.c:1445:9:st25dv_set_lockccfile_all 24 static
+../Components/st25dv/st25dv_reg.c:1459:9:st25dv_get_lockcfg_b0 16 static
+../Components/st25dv/st25dv_reg.c:1468:9:st25dv_set_lockcfg_b0 24 static
+../Components/st25dv/st25dv_reg.c:1482:9:st25dv_get_i2c_sso_dyn_i2csso 16 static
diff --git a/P3_SETR2/Debug/Components/st25dv/subdir.mk b/P3_SETR2/Debug/Components/st25dv/subdir.mk
new file mode 100644
index 0000000..09d615e
--- /dev/null
+++ b/P3_SETR2/Debug/Components/st25dv/subdir.mk
@@ -0,0 +1,30 @@
+################################################################################
+# Automatically-generated file. Do not edit!
+# Toolchain: GNU Tools for STM32 (13.3.rel1)
+################################################################################
+
+# Add inputs and outputs from these tool invocations to the build variables
+C_SRCS += \
+../Components/st25dv/st25dv.c \
+../Components/st25dv/st25dv_reg.c
+
+OBJS += \
+./Components/st25dv/st25dv.o \
+./Components/st25dv/st25dv_reg.o
+
+C_DEPS += \
+./Components/st25dv/st25dv.d \
+./Components/st25dv/st25dv_reg.d
+
+
+# Each subdirectory must supply rules for building sources it contributes
+Components/st25dv/%.o Components/st25dv/%.su Components/st25dv/%.cyclo: ../Components/st25dv/%.c Components/st25dv/subdir.mk
+ arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g -DDEBUG -DUSE_HAL_DRIVER -DSTM32L475xx -c -I../Core/Inc -I../Components -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../BSP -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+
+clean: clean-Components-2f-st25dv
+
+clean-Components-2f-st25dv:
+ -$(RM) ./Components/st25dv/st25dv.cyclo ./Components/st25dv/st25dv.d ./Components/st25dv/st25dv.o ./Components/st25dv/st25dv.su ./Components/st25dv/st25dv_reg.cyclo ./Components/st25dv/st25dv_reg.d ./Components/st25dv/st25dv_reg.o ./Components/st25dv/st25dv_reg.su
+
+.PHONY: clean-Components-2f-st25dv
+
diff --git a/P3_SETR2/Debug/Components/st7735/st7735.cyclo b/P3_SETR2/Debug/Components/st7735/st7735.cyclo
new file mode 100644
index 0000000..621b42b
--- /dev/null
+++ b/P3_SETR2/Debug/Components/st7735/st7735.cyclo
@@ -0,0 +1,12 @@
+../Components/st7735/st7735.c:107:6:st7735_Init 1
+../Components/st7735/st7735.c:220:6:st7735_DisplayOn 1
+../Components/st7735/st7735.c:237:6:st7735_DisplayOff 1
+../Components/st7735/st7735.c:255:6:st7735_SetCursor 1
+../Components/st7735/st7735.c:278:6:st7735_WritePixel 3
+../Components/st7735/st7735.c:302:6:st7735_WriteReg 1
+../Components/st7735/st7735.c:316:6:st7735_SetDisplayWindow 1
+../Components/st7735/st7735.c:349:6:st7735_DrawHLine 3
+../Components/st7735/st7735.c:373:6:st7735_DrawVLine 3
+../Components/st7735/st7735.c:389:10:st7735_GetLcdPixelWidth 1
+../Components/st7735/st7735.c:399:10:st7735_GetLcdPixelHeight 1
+../Components/st7735/st7735.c:409:6:st7735_DrawBitmap 1
diff --git a/P3_SETR2/Debug/Components/st7735/st7735.d b/P3_SETR2/Debug/Components/st7735/st7735.d
new file mode 100644
index 0000000..2be6554
--- /dev/null
+++ b/P3_SETR2/Debug/Components/st7735/st7735.d
@@ -0,0 +1,4 @@
+Components/st7735/st7735.o: ../Components/st7735/st7735.c \
+ ../Components/st7735/st7735.h ../Components/st7735/../Common/lcd.h
+../Components/st7735/st7735.h:
+../Components/st7735/../Common/lcd.h:
diff --git a/P3_SETR2/Debug/Components/st7735/st7735.o b/P3_SETR2/Debug/Components/st7735/st7735.o
new file mode 100644
index 0000000..f2a6acd
Binary files /dev/null and b/P3_SETR2/Debug/Components/st7735/st7735.o differ
diff --git a/P3_SETR2/Debug/Components/st7735/st7735.su b/P3_SETR2/Debug/Components/st7735/st7735.su
new file mode 100644
index 0000000..3e82dd0
--- /dev/null
+++ b/P3_SETR2/Debug/Components/st7735/st7735.su
@@ -0,0 +1,12 @@
+../Components/st7735/st7735.c:107:6:st7735_Init 16 static
+../Components/st7735/st7735.c:220:6:st7735_DisplayOn 16 static
+../Components/st7735/st7735.c:237:6:st7735_DisplayOff 16 static
+../Components/st7735/st7735.c:255:6:st7735_SetCursor 24 static
+../Components/st7735/st7735.c:278:6:st7735_WritePixel 24 static
+../Components/st7735/st7735.c:302:6:st7735_WriteReg 16 static
+../Components/st7735/st7735.c:316:6:st7735_SetDisplayWindow 32 static
+../Components/st7735/st7735.c:349:6:st7735_DrawHLine 32 static
+../Components/st7735/st7735.c:373:6:st7735_DrawVLine 32 static
+../Components/st7735/st7735.c:389:10:st7735_GetLcdPixelWidth 4 static
+../Components/st7735/st7735.c:399:10:st7735_GetLcdPixelHeight 4 static
+../Components/st7735/st7735.c:409:6:st7735_DrawBitmap 24 static
diff --git a/P3_SETR2/Debug/Components/st7735/subdir.mk b/P3_SETR2/Debug/Components/st7735/subdir.mk
new file mode 100644
index 0000000..eaf5c81
--- /dev/null
+++ b/P3_SETR2/Debug/Components/st7735/subdir.mk
@@ -0,0 +1,27 @@
+################################################################################
+# Automatically-generated file. Do not edit!
+# Toolchain: GNU Tools for STM32 (13.3.rel1)
+################################################################################
+
+# Add inputs and outputs from these tool invocations to the build variables
+C_SRCS += \
+../Components/st7735/st7735.c
+
+OBJS += \
+./Components/st7735/st7735.o
+
+C_DEPS += \
+./Components/st7735/st7735.d
+
+
+# Each subdirectory must supply rules for building sources it contributes
+Components/st7735/%.o Components/st7735/%.su Components/st7735/%.cyclo: ../Components/st7735/%.c Components/st7735/subdir.mk
+ arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g -DDEBUG -DUSE_HAL_DRIVER -DSTM32L475xx -c -I../Core/Inc -I../Components -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../BSP -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+
+clean: clean-Components-2f-st7735
+
+clean-Components-2f-st7735:
+ -$(RM) ./Components/st7735/st7735.cyclo ./Components/st7735/st7735.d ./Components/st7735/st7735.o ./Components/st7735/st7735.su
+
+.PHONY: clean-Components-2f-st7735
+
diff --git a/P3_SETR2/Debug/Components/st7789h2/st7789h2.cyclo b/P3_SETR2/Debug/Components/st7789h2/st7789h2.cyclo
new file mode 100644
index 0000000..3686a5f
--- /dev/null
+++ b/P3_SETR2/Debug/Components/st7789h2/st7789h2.cyclo
@@ -0,0 +1,19 @@
+../Components/st7789h2/st7789h2.c:114:6:ST7789H2_Init 1
+../Components/st7789h2/st7789h2.c:249:6:ST7789H2_SetOrientation 3
+../Components/st7789h2/st7789h2.c:291:6:ST7789H2_DisplayOn 1
+../Components/st7789h2/st7789h2.c:305:6:ST7789H2_DisplayOff 1
+../Components/st7789h2/st7789h2.c:322:10:ST7789H2_GetLcdPixelWidth 1
+../Components/st7789h2/st7789h2.c:332:10:ST7789H2_GetLcdPixelHeight 1
+../Components/st7789h2/st7789h2.c:342:10:ST7789H2_ReadID 1
+../Components/st7789h2/st7789h2.c:355:6:ST7789H2_SetCursor 1
+../Components/st7789h2/st7789h2.c:379:6:ST7789H2_WritePixel 1
+../Components/st7789h2/st7789h2.c:397:10:ST7789H2_ReadPixel 1
+../Components/st7789h2/st7789h2.c:426:6:ST7789H2_WriteReg 2
+../Components/st7789h2/st7789h2.c:445:9:ST7789H2_ReadReg 1
+../Components/st7789h2/st7789h2.c:465:6:ST7789H2_SetDisplayWindow 5
+../Components/st7789h2/st7789h2.c:512:6:ST7789H2_DrawHLine 2
+../Components/st7789h2/st7789h2.c:537:6:ST7789H2_DrawVLine 2
+../Components/st7789h2/st7789h2.c:561:6:ST7789H2_DrawBitmap 2
+../Components/st7789h2/st7789h2.c:598:6:ST7789H2_DrawRGBImage 2
+../Components/st7789h2/st7789h2.c:625:24:ST7789H2_ReadPixel_rgb888 1
+../Components/st7789h2/st7789h2.c:668:13:ST7789H2_DrawRGBHLine 7
diff --git a/P3_SETR2/Debug/Components/st7789h2/st7789h2.d b/P3_SETR2/Debug/Components/st7789h2/st7789h2.d
new file mode 100644
index 0000000..56ac999
--- /dev/null
+++ b/P3_SETR2/Debug/Components/st7789h2/st7789h2.d
@@ -0,0 +1,4 @@
+Components/st7789h2/st7789h2.o: ../Components/st7789h2/st7789h2.c \
+ ../Components/st7789h2/st7789h2.h ../Components/st7789h2/../Common/lcd.h
+../Components/st7789h2/st7789h2.h:
+../Components/st7789h2/../Common/lcd.h:
diff --git a/P3_SETR2/Debug/Components/st7789h2/st7789h2.o b/P3_SETR2/Debug/Components/st7789h2/st7789h2.o
new file mode 100644
index 0000000..8bea69d
Binary files /dev/null and b/P3_SETR2/Debug/Components/st7789h2/st7789h2.o differ
diff --git a/P3_SETR2/Debug/Components/st7789h2/st7789h2.su b/P3_SETR2/Debug/Components/st7789h2/st7789h2.su
new file mode 100644
index 0000000..1e8ff85
--- /dev/null
+++ b/P3_SETR2/Debug/Components/st7789h2/st7789h2.su
@@ -0,0 +1,19 @@
+../Components/st7789h2/st7789h2.c:114:6:ST7789H2_Init 24 static
+../Components/st7789h2/st7789h2.c:249:6:ST7789H2_SetOrientation 24 static
+../Components/st7789h2/st7789h2.c:291:6:ST7789H2_DisplayOn 8 static
+../Components/st7789h2/st7789h2.c:305:6:ST7789H2_DisplayOff 16 static
+../Components/st7789h2/st7789h2.c:322:10:ST7789H2_GetLcdPixelWidth 4 static
+../Components/st7789h2/st7789h2.c:332:10:ST7789H2_GetLcdPixelHeight 4 static
+../Components/st7789h2/st7789h2.c:342:10:ST7789H2_ReadID 8 static
+../Components/st7789h2/st7789h2.c:355:6:ST7789H2_SetCursor 24 static
+../Components/st7789h2/st7789h2.c:379:6:ST7789H2_WritePixel 16 static
+../Components/st7789h2/st7789h2.c:397:10:ST7789H2_ReadPixel 32 static
+../Components/st7789h2/st7789h2.c:426:6:ST7789H2_WriteReg 24 static
+../Components/st7789h2/st7789h2.c:445:9:ST7789H2_ReadReg 16 static
+../Components/st7789h2/st7789h2.c:465:6:ST7789H2_SetDisplayWindow 16 static
+../Components/st7789h2/st7789h2.c:512:6:ST7789H2_DrawHLine 32 static
+../Components/st7789h2/st7789h2.c:537:6:ST7789H2_DrawVLine 32 static
+../Components/st7789h2/st7789h2.c:561:6:ST7789H2_DrawBitmap 40 static
+../Components/st7789h2/st7789h2.c:598:6:ST7789H2_DrawRGBImage 32 static
+../Components/st7789h2/st7789h2.c:625:24:ST7789H2_ReadPixel_rgb888 32 static
+../Components/st7789h2/st7789h2.c:668:13:ST7789H2_DrawRGBHLine 40 static
diff --git a/P3_SETR2/Debug/Components/st7789h2/subdir.mk b/P3_SETR2/Debug/Components/st7789h2/subdir.mk
new file mode 100644
index 0000000..9fa376f
--- /dev/null
+++ b/P3_SETR2/Debug/Components/st7789h2/subdir.mk
@@ -0,0 +1,27 @@
+################################################################################
+# Automatically-generated file. Do not edit!
+# Toolchain: GNU Tools for STM32 (13.3.rel1)
+################################################################################
+
+# Add inputs and outputs from these tool invocations to the build variables
+C_SRCS += \
+../Components/st7789h2/st7789h2.c
+
+OBJS += \
+./Components/st7789h2/st7789h2.o
+
+C_DEPS += \
+./Components/st7789h2/st7789h2.d
+
+
+# Each subdirectory must supply rules for building sources it contributes
+Components/st7789h2/%.o Components/st7789h2/%.su Components/st7789h2/%.cyclo: ../Components/st7789h2/%.c Components/st7789h2/subdir.mk
+ arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g -DDEBUG -DUSE_HAL_DRIVER -DSTM32L475xx -c -I../Core/Inc -I../Components -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../BSP -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+
+clean: clean-Components-2f-st7789h2
+
+clean-Components-2f-st7789h2:
+ -$(RM) ./Components/st7789h2/st7789h2.cyclo ./Components/st7789h2/st7789h2.d ./Components/st7789h2/st7789h2.o ./Components/st7789h2/st7789h2.su
+
+.PHONY: clean-Components-2f-st7789h2
+
diff --git a/P3_SETR2/Debug/Components/stmpe1600/stmpe1600.cyclo b/P3_SETR2/Debug/Components/stmpe1600/stmpe1600.cyclo
new file mode 100644
index 0000000..03959e3
--- /dev/null
+++ b/P3_SETR2/Debug/Components/stmpe1600/stmpe1600.cyclo
@@ -0,0 +1,19 @@
+../Components/stmpe1600/stmpe1600.c:100:6:stmpe1600_Init 3
+../Components/stmpe1600/stmpe1600.c:132:6:stmpe1600_Start 1
+../Components/stmpe1600/stmpe1600.c:142:6:stmpe1600_Reset 1
+../Components/stmpe1600/stmpe1600.c:162:10:stmpe1600_ReadID 1
+../Components/stmpe1600/stmpe1600.c:184:6:stmpe1600_SetITPolarity 1
+../Components/stmpe1600/stmpe1600.c:206:6:stmpe1600_EnableGlobalIT 1
+../Components/stmpe1600/stmpe1600.c:230:6:stmpe1600_DisableGlobalIT 1
+../Components/stmpe1600/stmpe1600.c:255:6:stmpe1600_IO_InitPin 2
+../Components/stmpe1600/stmpe1600.c:291:9:stmpe1600_IO_Config 5
+../Components/stmpe1600/stmpe1600.c:347:6:stmpe1600_IO_PolarityInv_Enable 1
+../Components/stmpe1600/stmpe1600.c:371:6:stmpe1600_IO_PolarityInv_Disable 1
+../Components/stmpe1600/stmpe1600.c:396:6:stmpe1600_IO_WritePin 2
+../Components/stmpe1600/stmpe1600.c:427:10:stmpe1600_IO_ReadPin 1
+../Components/stmpe1600/stmpe1600.c:448:6:stmpe1600_IO_EnablePinIT 1
+../Components/stmpe1600/stmpe1600.c:475:6:stmpe1600_IO_DisablePinIT 1
+../Components/stmpe1600/stmpe1600.c:500:10:stmpe1600_IO_ITStatus 1
+../Components/stmpe1600/stmpe1600.c:522:9:stmpe1600_IO_ReadIT 1
+../Components/stmpe1600/stmpe1600.c:540:6:stmpe1600_IO_ClearIT 1
+../Components/stmpe1600/stmpe1600.c:554:16:stmpe1600_GetInstance 3
diff --git a/P3_SETR2/Debug/Components/stmpe1600/stmpe1600.d b/P3_SETR2/Debug/Components/stmpe1600/stmpe1600.d
new file mode 100644
index 0000000..e53bc81
--- /dev/null
+++ b/P3_SETR2/Debug/Components/stmpe1600/stmpe1600.d
@@ -0,0 +1,5 @@
+Components/stmpe1600/stmpe1600.o: ../Components/stmpe1600/stmpe1600.c \
+ ../Components/stmpe1600/stmpe1600.h \
+ ../Components/stmpe1600/../Common/io.h
+../Components/stmpe1600/stmpe1600.h:
+../Components/stmpe1600/../Common/io.h:
diff --git a/P3_SETR2/Debug/Components/stmpe1600/stmpe1600.o b/P3_SETR2/Debug/Components/stmpe1600/stmpe1600.o
new file mode 100644
index 0000000..2669309
Binary files /dev/null and b/P3_SETR2/Debug/Components/stmpe1600/stmpe1600.o differ
diff --git a/P3_SETR2/Debug/Components/stmpe1600/stmpe1600.su b/P3_SETR2/Debug/Components/stmpe1600/stmpe1600.su
new file mode 100644
index 0000000..0c714de
--- /dev/null
+++ b/P3_SETR2/Debug/Components/stmpe1600/stmpe1600.su
@@ -0,0 +1,19 @@
+../Components/stmpe1600/stmpe1600.c:100:6:stmpe1600_Init 24 static
+../Components/stmpe1600/stmpe1600.c:132:6:stmpe1600_Start 16 static
+../Components/stmpe1600/stmpe1600.c:142:6:stmpe1600_Reset 16 static
+../Components/stmpe1600/stmpe1600.c:162:10:stmpe1600_ReadID 24 static
+../Components/stmpe1600/stmpe1600.c:184:6:stmpe1600_SetITPolarity 24 static
+../Components/stmpe1600/stmpe1600.c:206:6:stmpe1600_EnableGlobalIT 24 static
+../Components/stmpe1600/stmpe1600.c:230:6:stmpe1600_DisableGlobalIT 24 static
+../Components/stmpe1600/stmpe1600.c:255:6:stmpe1600_IO_InitPin 24 static
+../Components/stmpe1600/stmpe1600.c:291:9:stmpe1600_IO_Config 24 static
+../Components/stmpe1600/stmpe1600.c:347:6:stmpe1600_IO_PolarityInv_Enable 24 static
+../Components/stmpe1600/stmpe1600.c:371:6:stmpe1600_IO_PolarityInv_Disable 24 static
+../Components/stmpe1600/stmpe1600.c:396:6:stmpe1600_IO_WritePin 24 static
+../Components/stmpe1600/stmpe1600.c:427:10:stmpe1600_IO_ReadPin 24 static
+../Components/stmpe1600/stmpe1600.c:448:6:stmpe1600_IO_EnablePinIT 24 static
+../Components/stmpe1600/stmpe1600.c:475:6:stmpe1600_IO_DisablePinIT 24 static
+../Components/stmpe1600/stmpe1600.c:500:10:stmpe1600_IO_ITStatus 24 static
+../Components/stmpe1600/stmpe1600.c:522:9:stmpe1600_IO_ReadIT 24 static
+../Components/stmpe1600/stmpe1600.c:540:6:stmpe1600_IO_ClearIT 24 static
+../Components/stmpe1600/stmpe1600.c:554:16:stmpe1600_GetInstance 24 static
diff --git a/P3_SETR2/Debug/Components/stmpe1600/subdir.mk b/P3_SETR2/Debug/Components/stmpe1600/subdir.mk
new file mode 100644
index 0000000..d0d16f5
--- /dev/null
+++ b/P3_SETR2/Debug/Components/stmpe1600/subdir.mk
@@ -0,0 +1,27 @@
+################################################################################
+# Automatically-generated file. Do not edit!
+# Toolchain: GNU Tools for STM32 (13.3.rel1)
+################################################################################
+
+# Add inputs and outputs from these tool invocations to the build variables
+C_SRCS += \
+../Components/stmpe1600/stmpe1600.c
+
+OBJS += \
+./Components/stmpe1600/stmpe1600.o
+
+C_DEPS += \
+./Components/stmpe1600/stmpe1600.d
+
+
+# Each subdirectory must supply rules for building sources it contributes
+Components/stmpe1600/%.o Components/stmpe1600/%.su Components/stmpe1600/%.cyclo: ../Components/stmpe1600/%.c Components/stmpe1600/subdir.mk
+ arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g -DDEBUG -DUSE_HAL_DRIVER -DSTM32L475xx -c -I../Core/Inc -I../Components -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../BSP -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+
+clean: clean-Components-2f-stmpe1600
+
+clean-Components-2f-stmpe1600:
+ -$(RM) ./Components/stmpe1600/stmpe1600.cyclo ./Components/stmpe1600/stmpe1600.d ./Components/stmpe1600/stmpe1600.o ./Components/stmpe1600/stmpe1600.su
+
+.PHONY: clean-Components-2f-stmpe1600
+
diff --git a/P3_SETR2/Debug/Components/stmpe811/stmpe811.cyclo b/P3_SETR2/Debug/Components/stmpe811/stmpe811.cyclo
new file mode 100644
index 0000000..25531af
--- /dev/null
+++ b/P3_SETR2/Debug/Components/stmpe811/stmpe811.cyclo
@@ -0,0 +1,34 @@
+../Components/stmpe811/stmpe811.c:113:6:stmpe811_Init 3
+../Components/stmpe811/stmpe811.c:146:6:stmpe811_Reset 1
+../Components/stmpe811/stmpe811.c:166:10:stmpe811_ReadID 1
+../Components/stmpe811/stmpe811.c:181:6:stmpe811_EnableGlobalIT 1
+../Components/stmpe811/stmpe811.c:200:6:stmpe811_DisableGlobalIT 1
+../Components/stmpe811/stmpe811.c:228:6:stmpe811_EnableITSource 1
+../Components/stmpe811/stmpe811.c:255:6:stmpe811_DisableITSource 1
+../Components/stmpe811/stmpe811.c:277:6:stmpe811_SetITPolarity 1
+../Components/stmpe811/stmpe811.c:303:6:stmpe811_SetITType 1
+../Components/stmpe811/stmpe811.c:334:9:stmpe811_GlobalITStatus 1
+../Components/stmpe811/stmpe811.c:353:9:stmpe811_ReadGITStatus 1
+../Components/stmpe811/stmpe811.c:373:6:stmpe811_ClearGlobalIT 1
+../Components/stmpe811/stmpe811.c:387:6:stmpe811_IO_Start 1
+../Components/stmpe811/stmpe811.c:419:9:stmpe811_IO_Config 7
+../Components/stmpe811/stmpe811.c:482:6:stmpe811_IO_InitPin 2
+../Components/stmpe811/stmpe811.c:511:6:stmpe811_IO_DisableAF 1
+../Components/stmpe811/stmpe811.c:534:6:stmpe811_IO_EnableAF 1
+../Components/stmpe811/stmpe811.c:559:6:stmpe811_IO_SetEdgeMode 3
+../Components/stmpe811/stmpe811.c:599:6:stmpe811_IO_WritePin 2
+../Components/stmpe811/stmpe811.c:622:10:stmpe811_IO_ReadPin 1
+../Components/stmpe811/stmpe811.c:632:6:stmpe811_IO_EnableIT 1
+../Components/stmpe811/stmpe811.c:648:6:stmpe811_IO_DisableIT 1
+../Components/stmpe811/stmpe811.c:665:6:stmpe811_IO_EnablePinIT 1
+../Components/stmpe811/stmpe811.c:687:6:stmpe811_IO_DisablePinIT 1
+../Components/stmpe811/stmpe811.c:708:10:stmpe811_IO_ITStatus 1
+../Components/stmpe811/stmpe811.c:721:6:stmpe811_IO_ClearIT 1
+../Components/stmpe811/stmpe811.c:744:6:stmpe811_TS_Start 1
+../Components/stmpe811/stmpe811.c:819:9:stmpe811_TS_DetectTouch 3
+../Components/stmpe811/stmpe811.c:851:6:stmpe811_TS_GetXY 1
+../Components/stmpe811/stmpe811.c:874:6:stmpe811_TS_EnableIT 1
+../Components/stmpe811/stmpe811.c:890:6:stmpe811_TS_DisableIT 1
+../Components/stmpe811/stmpe811.c:904:9:stmpe811_TS_ITStatus 1
+../Components/stmpe811/stmpe811.c:915:6:stmpe811_TS_ClearIT 1
+../Components/stmpe811/stmpe811.c:927:16:stmpe811_GetInstance 3
diff --git a/P3_SETR2/Debug/Components/stmpe811/stmpe811.d b/P3_SETR2/Debug/Components/stmpe811/stmpe811.d
new file mode 100644
index 0000000..405cc9d
--- /dev/null
+++ b/P3_SETR2/Debug/Components/stmpe811/stmpe811.d
@@ -0,0 +1,6 @@
+Components/stmpe811/stmpe811.o: ../Components/stmpe811/stmpe811.c \
+ ../Components/stmpe811/stmpe811.h ../Components/stmpe811/../Common/ts.h \
+ ../Components/stmpe811/../Common/io.h
+../Components/stmpe811/stmpe811.h:
+../Components/stmpe811/../Common/ts.h:
+../Components/stmpe811/../Common/io.h:
diff --git a/P3_SETR2/Debug/Components/stmpe811/stmpe811.o b/P3_SETR2/Debug/Components/stmpe811/stmpe811.o
new file mode 100644
index 0000000..60f862b
Binary files /dev/null and b/P3_SETR2/Debug/Components/stmpe811/stmpe811.o differ
diff --git a/P3_SETR2/Debug/Components/stmpe811/stmpe811.su b/P3_SETR2/Debug/Components/stmpe811/stmpe811.su
new file mode 100644
index 0000000..bbabb1d
--- /dev/null
+++ b/P3_SETR2/Debug/Components/stmpe811/stmpe811.su
@@ -0,0 +1,34 @@
+../Components/stmpe811/stmpe811.c:113:6:stmpe811_Init 24 static
+../Components/stmpe811/stmpe811.c:146:6:stmpe811_Reset 16 static
+../Components/stmpe811/stmpe811.c:166:10:stmpe811_ReadID 24 static
+../Components/stmpe811/stmpe811.c:181:6:stmpe811_EnableGlobalIT 24 static
+../Components/stmpe811/stmpe811.c:200:6:stmpe811_DisableGlobalIT 24 static
+../Components/stmpe811/stmpe811.c:228:6:stmpe811_EnableITSource 24 static
+../Components/stmpe811/stmpe811.c:255:6:stmpe811_DisableITSource 24 static
+../Components/stmpe811/stmpe811.c:277:6:stmpe811_SetITPolarity 24 static
+../Components/stmpe811/stmpe811.c:303:6:stmpe811_SetITType 24 static
+../Components/stmpe811/stmpe811.c:334:9:stmpe811_GlobalITStatus 16 static
+../Components/stmpe811/stmpe811.c:353:9:stmpe811_ReadGITStatus 16 static
+../Components/stmpe811/stmpe811.c:373:6:stmpe811_ClearGlobalIT 16 static
+../Components/stmpe811/stmpe811.c:387:6:stmpe811_IO_Start 24 static
+../Components/stmpe811/stmpe811.c:419:9:stmpe811_IO_Config 24 static
+../Components/stmpe811/stmpe811.c:482:6:stmpe811_IO_InitPin 24 static
+../Components/stmpe811/stmpe811.c:511:6:stmpe811_IO_DisableAF 24 static
+../Components/stmpe811/stmpe811.c:534:6:stmpe811_IO_EnableAF 24 static
+../Components/stmpe811/stmpe811.c:559:6:stmpe811_IO_SetEdgeMode 24 static
+../Components/stmpe811/stmpe811.c:599:6:stmpe811_IO_WritePin 16 static
+../Components/stmpe811/stmpe811.c:622:10:stmpe811_IO_ReadPin 16 static
+../Components/stmpe811/stmpe811.c:632:6:stmpe811_IO_EnableIT 16 static
+../Components/stmpe811/stmpe811.c:648:6:stmpe811_IO_DisableIT 16 static
+../Components/stmpe811/stmpe811.c:665:6:stmpe811_IO_EnablePinIT 24 static
+../Components/stmpe811/stmpe811.c:687:6:stmpe811_IO_DisablePinIT 24 static
+../Components/stmpe811/stmpe811.c:708:10:stmpe811_IO_ITStatus 16 static
+../Components/stmpe811/stmpe811.c:721:6:stmpe811_IO_ClearIT 16 static
+../Components/stmpe811/stmpe811.c:744:6:stmpe811_TS_Start 24 static
+../Components/stmpe811/stmpe811.c:819:9:stmpe811_TS_DetectTouch 24 static
+../Components/stmpe811/stmpe811.c:851:6:stmpe811_TS_GetXY 32 static
+../Components/stmpe811/stmpe811.c:874:6:stmpe811_TS_EnableIT 16 static
+../Components/stmpe811/stmpe811.c:890:6:stmpe811_TS_DisableIT 16 static
+../Components/stmpe811/stmpe811.c:904:9:stmpe811_TS_ITStatus 16 static
+../Components/stmpe811/stmpe811.c:915:6:stmpe811_TS_ClearIT 16 static
+../Components/stmpe811/stmpe811.c:927:16:stmpe811_GetInstance 24 static
diff --git a/P3_SETR2/Debug/Components/stmpe811/subdir.mk b/P3_SETR2/Debug/Components/stmpe811/subdir.mk
new file mode 100644
index 0000000..d8fa696
--- /dev/null
+++ b/P3_SETR2/Debug/Components/stmpe811/subdir.mk
@@ -0,0 +1,27 @@
+################################################################################
+# Automatically-generated file. Do not edit!
+# Toolchain: GNU Tools for STM32 (13.3.rel1)
+################################################################################
+
+# Add inputs and outputs from these tool invocations to the build variables
+C_SRCS += \
+../Components/stmpe811/stmpe811.c
+
+OBJS += \
+./Components/stmpe811/stmpe811.o
+
+C_DEPS += \
+./Components/stmpe811/stmpe811.d
+
+
+# Each subdirectory must supply rules for building sources it contributes
+Components/stmpe811/%.o Components/stmpe811/%.su Components/stmpe811/%.cyclo: ../Components/stmpe811/%.c Components/stmpe811/subdir.mk
+ arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g -DDEBUG -DUSE_HAL_DRIVER -DSTM32L475xx -c -I../Core/Inc -I../Components -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../BSP -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+
+clean: clean-Components-2f-stmpe811
+
+clean-Components-2f-stmpe811:
+ -$(RM) ./Components/stmpe811/stmpe811.cyclo ./Components/stmpe811/stmpe811.d ./Components/stmpe811/stmpe811.o ./Components/stmpe811/stmpe811.su
+
+.PHONY: clean-Components-2f-stmpe811
+
diff --git a/P3_SETR2/Debug/Components/wm8994/subdir.mk b/P3_SETR2/Debug/Components/wm8994/subdir.mk
new file mode 100644
index 0000000..5a5139f
--- /dev/null
+++ b/P3_SETR2/Debug/Components/wm8994/subdir.mk
@@ -0,0 +1,27 @@
+################################################################################
+# Automatically-generated file. Do not edit!
+# Toolchain: GNU Tools for STM32 (13.3.rel1)
+################################################################################
+
+# Add inputs and outputs from these tool invocations to the build variables
+C_SRCS += \
+../Components/wm8994/wm8994.c
+
+OBJS += \
+./Components/wm8994/wm8994.o
+
+C_DEPS += \
+./Components/wm8994/wm8994.d
+
+
+# Each subdirectory must supply rules for building sources it contributes
+Components/wm8994/%.o Components/wm8994/%.su Components/wm8994/%.cyclo: ../Components/wm8994/%.c Components/wm8994/subdir.mk
+ arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g -DDEBUG -DUSE_HAL_DRIVER -DSTM32L475xx -c -I../Core/Inc -I../Components -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../BSP -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+
+clean: clean-Components-2f-wm8994
+
+clean-Components-2f-wm8994:
+ -$(RM) ./Components/wm8994/wm8994.cyclo ./Components/wm8994/wm8994.d ./Components/wm8994/wm8994.o ./Components/wm8994/wm8994.su
+
+.PHONY: clean-Components-2f-wm8994
+
diff --git a/P3_SETR2/Debug/Components/wm8994/wm8994.cyclo b/P3_SETR2/Debug/Components/wm8994/wm8994.cyclo
new file mode 100644
index 0000000..5006ce6
--- /dev/null
+++ b/P3_SETR2/Debug/Components/wm8994/wm8994.cyclo
@@ -0,0 +1,13 @@
+../Components/wm8994/wm8994.c:121:10:wm8994_Init 40
+../Components/wm8994/wm8994.c:622:6:wm8994_DeInit 1
+../Components/wm8994/wm8994.c:633:10:wm8994_ReadID 1
+../Components/wm8994/wm8994.c:647:10:wm8994_Play 1
+../Components/wm8994/wm8994.c:663:10:wm8994_Pause 1
+../Components/wm8994/wm8994.c:682:10:wm8994_Resume 1
+../Components/wm8994/wm8994.c:706:10:wm8994_Stop 3
+../Components/wm8994/wm8994.c:752:10:wm8994_SetVolume 7
+../Components/wm8994/wm8994.c:828:10:wm8994_SetMute 3
+../Components/wm8994/wm8994.c:863:10:wm8994_SetOutputMode 5
+../Components/wm8994/wm8994.c:950:10:wm8994_SetFrequency 15
+../Components/wm8994/wm8994.c:1010:10:wm8994_Reset 1
+../Components/wm8994/wm8994.c:1029:16:CODEC_IO_Write 1
diff --git a/P3_SETR2/Debug/Components/wm8994/wm8994.d b/P3_SETR2/Debug/Components/wm8994/wm8994.d
new file mode 100644
index 0000000..929f853
--- /dev/null
+++ b/P3_SETR2/Debug/Components/wm8994/wm8994.d
@@ -0,0 +1,4 @@
+Components/wm8994/wm8994.o: ../Components/wm8994/wm8994.c \
+ ../Components/wm8994/wm8994.h ../Components/wm8994/../Common/audio.h
+../Components/wm8994/wm8994.h:
+../Components/wm8994/../Common/audio.h:
diff --git a/P3_SETR2/Debug/Components/wm8994/wm8994.o b/P3_SETR2/Debug/Components/wm8994/wm8994.o
new file mode 100644
index 0000000..954c109
Binary files /dev/null and b/P3_SETR2/Debug/Components/wm8994/wm8994.o differ
diff --git a/P3_SETR2/Debug/Components/wm8994/wm8994.su b/P3_SETR2/Debug/Components/wm8994/wm8994.su
new file mode 100644
index 0000000..15d0213
--- /dev/null
+++ b/P3_SETR2/Debug/Components/wm8994/wm8994.su
@@ -0,0 +1,13 @@
+../Components/wm8994/wm8994.c:121:10:wm8994_Init 40 static
+../Components/wm8994/wm8994.c:622:6:wm8994_DeInit 8 static
+../Components/wm8994/wm8994.c:633:10:wm8994_ReadID 16 static
+../Components/wm8994/wm8994.c:647:10:wm8994_Play 24 static
+../Components/wm8994/wm8994.c:663:10:wm8994_Pause 24 static
+../Components/wm8994/wm8994.c:682:10:wm8994_Resume 24 static
+../Components/wm8994/wm8994.c:706:10:wm8994_Stop 24 static
+../Components/wm8994/wm8994.c:752:10:wm8994_SetVolume 24 static
+../Components/wm8994/wm8994.c:828:10:wm8994_SetMute 24 static
+../Components/wm8994/wm8994.c:863:10:wm8994_SetOutputMode 24 static
+../Components/wm8994/wm8994.c:950:10:wm8994_SetFrequency 24 static
+../Components/wm8994/wm8994.c:1010:10:wm8994_Reset 24 static
+../Components/wm8994/wm8994.c:1029:16:CODEC_IO_Write 24 static
diff --git a/P3_SETR2/Debug/Core/Src/accelerometer.cyclo b/P3_SETR2/Debug/Core/Src/accelerometer.cyclo
new file mode 100644
index 0000000..d792ee4
--- /dev/null
+++ b/P3_SETR2/Debug/Core/Src/accelerometer.cyclo
@@ -0,0 +1 @@
+../Core/Src/accelerometer.c:10:6:Accelero_Test 1
diff --git a/P3_SETR2/Debug/Core/Src/accelerometer.d b/P3_SETR2/Debug/Core/Src/accelerometer.d
new file mode 100644
index 0000000..23f57e0
--- /dev/null
+++ b/P3_SETR2/Debug/Core/Src/accelerometer.d
@@ -0,0 +1,116 @@
+Core/Src/accelerometer.o: ../Core/Src/accelerometer.c \
+ ../Core/Inc/accelerometer.h ../Core/Inc/globals.h \
+ ../Core/Inc/../../BSP/stm32l475e_iot01.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h \
+ ../Core/Inc/stm32l4xx_hal_conf.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l475xx.h \
+ ../Drivers/CMSIS/Include/core_cm4.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dfsdm.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_usb.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_qspi.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h \
+ ../Core/Inc/../../BSP/stm32l475e_iot01_accelero.h \
+ ../Core/Inc/../../BSP/stm32l475e_iot01.h \
+ ../Core/Inc/../../BSP/../Components/lsm6dsl/lsm6dsl.h \
+ ../Core/Inc/../../BSP/../Components/lsm6dsl/../Common/accelero.h \
+ ../Core/Inc/../../BSP/../Components/lsm6dsl/../Common/gyro.h \
+ ../Core/Inc/../../BSP/stm32l475e_iot01_gyro.h \
+ ../Core/Inc/../../BSP/stm32l475e_iot01_hsensor.h \
+ ../Core/Inc/../../BSP/../Components/hts221/hts221.h \
+ ../Core/Inc/../../BSP/../Components/hts221/../Common/hsensor.h \
+ ../Core/Inc/../../BSP/../Components/hts221/../Common/tsensor.h \
+ ../Core/Inc/../../BSP/stm32l475e_iot01_magneto.h \
+ ../Core/Inc/../../BSP/../Components/lis3mdl/lis3mdl.h \
+ ../Core/Inc/../../BSP/../Components/lis3mdl/../Common/magneto.h \
+ ../Core/Inc/../../BSP/stm32l475e_iot01_psensor.h \
+ ../Core/Inc/../../BSP/../Components/lps22hb/lps22hb.h \
+ ../Core/Inc/../../BSP/../Components/lps22hb/../Common/psensor.h \
+ ../Core/Inc/../../BSP/../Components/lps22hb/../Common/tsensor.h \
+ ../Core/Inc/../../BSP/stm32l475e_iot01_qspi.h \
+ ../Core/Inc/../../BSP/../Components/mx25r6435f/mx25r6435f.h \
+ ../Core/Inc/../../BSP/stm32l475e_iot01_tsensor.h
+../Core/Inc/accelerometer.h:
+../Core/Inc/globals.h:
+../Core/Inc/../../BSP/stm32l475e_iot01.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:
+../Core/Inc/stm32l4xx_hal_conf.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l475xx.h:
+../Drivers/CMSIS/Include/core_cm4.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dfsdm.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_usb.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_qspi.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h:
+../Core/Inc/../../BSP/stm32l475e_iot01_accelero.h:
+../Core/Inc/../../BSP/stm32l475e_iot01.h:
+../Core/Inc/../../BSP/../Components/lsm6dsl/lsm6dsl.h:
+../Core/Inc/../../BSP/../Components/lsm6dsl/../Common/accelero.h:
+../Core/Inc/../../BSP/../Components/lsm6dsl/../Common/gyro.h:
+../Core/Inc/../../BSP/stm32l475e_iot01_gyro.h:
+../Core/Inc/../../BSP/stm32l475e_iot01_hsensor.h:
+../Core/Inc/../../BSP/../Components/hts221/hts221.h:
+../Core/Inc/../../BSP/../Components/hts221/../Common/hsensor.h:
+../Core/Inc/../../BSP/../Components/hts221/../Common/tsensor.h:
+../Core/Inc/../../BSP/stm32l475e_iot01_magneto.h:
+../Core/Inc/../../BSP/../Components/lis3mdl/lis3mdl.h:
+../Core/Inc/../../BSP/../Components/lis3mdl/../Common/magneto.h:
+../Core/Inc/../../BSP/stm32l475e_iot01_psensor.h:
+../Core/Inc/../../BSP/../Components/lps22hb/lps22hb.h:
+../Core/Inc/../../BSP/../Components/lps22hb/../Common/psensor.h:
+../Core/Inc/../../BSP/../Components/lps22hb/../Common/tsensor.h:
+../Core/Inc/../../BSP/stm32l475e_iot01_qspi.h:
+../Core/Inc/../../BSP/../Components/mx25r6435f/mx25r6435f.h:
+../Core/Inc/../../BSP/stm32l475e_iot01_tsensor.h:
diff --git a/P3_SETR2/Debug/Core/Src/accelerometer.o b/P3_SETR2/Debug/Core/Src/accelerometer.o
new file mode 100644
index 0000000..bd0bfff
Binary files /dev/null and b/P3_SETR2/Debug/Core/Src/accelerometer.o differ
diff --git a/P3_SETR2/Debug/Core/Src/accelerometer.su b/P3_SETR2/Debug/Core/Src/accelerometer.su
new file mode 100644
index 0000000..4e4be71
--- /dev/null
+++ b/P3_SETR2/Debug/Core/Src/accelerometer.su
@@ -0,0 +1 @@
+../Core/Src/accelerometer.c:10:6:Accelero_Test 16 static
diff --git a/P3_SETR2/Debug/Core/Src/gyroscope.cyclo b/P3_SETR2/Debug/Core/Src/gyroscope.cyclo
new file mode 100644
index 0000000..06222e0
--- /dev/null
+++ b/P3_SETR2/Debug/Core/Src/gyroscope.cyclo
@@ -0,0 +1 @@
+../Core/Src/gyroscope.c:10:6:Gyro_Test 1
diff --git a/P3_SETR2/Debug/Core/Src/gyroscope.d b/P3_SETR2/Debug/Core/Src/gyroscope.d
new file mode 100644
index 0000000..555da61
--- /dev/null
+++ b/P3_SETR2/Debug/Core/Src/gyroscope.d
@@ -0,0 +1,115 @@
+Core/Src/gyroscope.o: ../Core/Src/gyroscope.c ../Core/Inc/gyroscope.h \
+ ../Core/Inc/globals.h ../Core/Inc/../../BSP/stm32l475e_iot01.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h \
+ ../Core/Inc/stm32l4xx_hal_conf.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l475xx.h \
+ ../Drivers/CMSIS/Include/core_cm4.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dfsdm.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_usb.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_qspi.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h \
+ ../Core/Inc/../../BSP/stm32l475e_iot01_accelero.h \
+ ../Core/Inc/../../BSP/stm32l475e_iot01.h \
+ ../Core/Inc/../../BSP/../Components/lsm6dsl/lsm6dsl.h \
+ ../Core/Inc/../../BSP/../Components/lsm6dsl/../Common/accelero.h \
+ ../Core/Inc/../../BSP/../Components/lsm6dsl/../Common/gyro.h \
+ ../Core/Inc/../../BSP/stm32l475e_iot01_gyro.h \
+ ../Core/Inc/../../BSP/stm32l475e_iot01_hsensor.h \
+ ../Core/Inc/../../BSP/../Components/hts221/hts221.h \
+ ../Core/Inc/../../BSP/../Components/hts221/../Common/hsensor.h \
+ ../Core/Inc/../../BSP/../Components/hts221/../Common/tsensor.h \
+ ../Core/Inc/../../BSP/stm32l475e_iot01_magneto.h \
+ ../Core/Inc/../../BSP/../Components/lis3mdl/lis3mdl.h \
+ ../Core/Inc/../../BSP/../Components/lis3mdl/../Common/magneto.h \
+ ../Core/Inc/../../BSP/stm32l475e_iot01_psensor.h \
+ ../Core/Inc/../../BSP/../Components/lps22hb/lps22hb.h \
+ ../Core/Inc/../../BSP/../Components/lps22hb/../Common/psensor.h \
+ ../Core/Inc/../../BSP/../Components/lps22hb/../Common/tsensor.h \
+ ../Core/Inc/../../BSP/stm32l475e_iot01_qspi.h \
+ ../Core/Inc/../../BSP/../Components/mx25r6435f/mx25r6435f.h \
+ ../Core/Inc/../../BSP/stm32l475e_iot01_tsensor.h
+../Core/Inc/gyroscope.h:
+../Core/Inc/globals.h:
+../Core/Inc/../../BSP/stm32l475e_iot01.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:
+../Core/Inc/stm32l4xx_hal_conf.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l475xx.h:
+../Drivers/CMSIS/Include/core_cm4.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dfsdm.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_usb.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_qspi.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h:
+../Core/Inc/../../BSP/stm32l475e_iot01_accelero.h:
+../Core/Inc/../../BSP/stm32l475e_iot01.h:
+../Core/Inc/../../BSP/../Components/lsm6dsl/lsm6dsl.h:
+../Core/Inc/../../BSP/../Components/lsm6dsl/../Common/accelero.h:
+../Core/Inc/../../BSP/../Components/lsm6dsl/../Common/gyro.h:
+../Core/Inc/../../BSP/stm32l475e_iot01_gyro.h:
+../Core/Inc/../../BSP/stm32l475e_iot01_hsensor.h:
+../Core/Inc/../../BSP/../Components/hts221/hts221.h:
+../Core/Inc/../../BSP/../Components/hts221/../Common/hsensor.h:
+../Core/Inc/../../BSP/../Components/hts221/../Common/tsensor.h:
+../Core/Inc/../../BSP/stm32l475e_iot01_magneto.h:
+../Core/Inc/../../BSP/../Components/lis3mdl/lis3mdl.h:
+../Core/Inc/../../BSP/../Components/lis3mdl/../Common/magneto.h:
+../Core/Inc/../../BSP/stm32l475e_iot01_psensor.h:
+../Core/Inc/../../BSP/../Components/lps22hb/lps22hb.h:
+../Core/Inc/../../BSP/../Components/lps22hb/../Common/psensor.h:
+../Core/Inc/../../BSP/../Components/lps22hb/../Common/tsensor.h:
+../Core/Inc/../../BSP/stm32l475e_iot01_qspi.h:
+../Core/Inc/../../BSP/../Components/mx25r6435f/mx25r6435f.h:
+../Core/Inc/../../BSP/stm32l475e_iot01_tsensor.h:
diff --git a/P3_SETR2/Debug/Core/Src/gyroscope.o b/P3_SETR2/Debug/Core/Src/gyroscope.o
new file mode 100644
index 0000000..f104af8
Binary files /dev/null and b/P3_SETR2/Debug/Core/Src/gyroscope.o differ
diff --git a/P3_SETR2/Debug/Core/Src/gyroscope.su b/P3_SETR2/Debug/Core/Src/gyroscope.su
new file mode 100644
index 0000000..7a8e5c4
--- /dev/null
+++ b/P3_SETR2/Debug/Core/Src/gyroscope.su
@@ -0,0 +1 @@
+../Core/Src/gyroscope.c:10:6:Gyro_Test 24 static
diff --git a/P3_SETR2/Debug/Core/Src/humidity.cyclo b/P3_SETR2/Debug/Core/Src/humidity.cyclo
new file mode 100644
index 0000000..98f0668
--- /dev/null
+++ b/P3_SETR2/Debug/Core/Src/humidity.cyclo
@@ -0,0 +1 @@
+../Core/Src/humidity.c:10:6:Humidity_Test 1
diff --git a/P3_SETR2/Debug/Core/Src/humidity.d b/P3_SETR2/Debug/Core/Src/humidity.d
new file mode 100644
index 0000000..ab04b20
--- /dev/null
+++ b/P3_SETR2/Debug/Core/Src/humidity.d
@@ -0,0 +1,115 @@
+Core/Src/humidity.o: ../Core/Src/humidity.c ../Core/Inc/humidity.h \
+ ../Core/Inc/globals.h ../Core/Inc/../../BSP/stm32l475e_iot01.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h \
+ ../Core/Inc/stm32l4xx_hal_conf.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l475xx.h \
+ ../Drivers/CMSIS/Include/core_cm4.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dfsdm.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_usb.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_qspi.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h \
+ ../Core/Inc/../../BSP/stm32l475e_iot01_accelero.h \
+ ../Core/Inc/../../BSP/stm32l475e_iot01.h \
+ ../Core/Inc/../../BSP/../Components/lsm6dsl/lsm6dsl.h \
+ ../Core/Inc/../../BSP/../Components/lsm6dsl/../Common/accelero.h \
+ ../Core/Inc/../../BSP/../Components/lsm6dsl/../Common/gyro.h \
+ ../Core/Inc/../../BSP/stm32l475e_iot01_gyro.h \
+ ../Core/Inc/../../BSP/stm32l475e_iot01_hsensor.h \
+ ../Core/Inc/../../BSP/../Components/hts221/hts221.h \
+ ../Core/Inc/../../BSP/../Components/hts221/../Common/hsensor.h \
+ ../Core/Inc/../../BSP/../Components/hts221/../Common/tsensor.h \
+ ../Core/Inc/../../BSP/stm32l475e_iot01_magneto.h \
+ ../Core/Inc/../../BSP/../Components/lis3mdl/lis3mdl.h \
+ ../Core/Inc/../../BSP/../Components/lis3mdl/../Common/magneto.h \
+ ../Core/Inc/../../BSP/stm32l475e_iot01_psensor.h \
+ ../Core/Inc/../../BSP/../Components/lps22hb/lps22hb.h \
+ ../Core/Inc/../../BSP/../Components/lps22hb/../Common/psensor.h \
+ ../Core/Inc/../../BSP/../Components/lps22hb/../Common/tsensor.h \
+ ../Core/Inc/../../BSP/stm32l475e_iot01_qspi.h \
+ ../Core/Inc/../../BSP/../Components/mx25r6435f/mx25r6435f.h \
+ ../Core/Inc/../../BSP/stm32l475e_iot01_tsensor.h
+../Core/Inc/humidity.h:
+../Core/Inc/globals.h:
+../Core/Inc/../../BSP/stm32l475e_iot01.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:
+../Core/Inc/stm32l4xx_hal_conf.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l475xx.h:
+../Drivers/CMSIS/Include/core_cm4.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dfsdm.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_usb.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_qspi.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h:
+../Core/Inc/../../BSP/stm32l475e_iot01_accelero.h:
+../Core/Inc/../../BSP/stm32l475e_iot01.h:
+../Core/Inc/../../BSP/../Components/lsm6dsl/lsm6dsl.h:
+../Core/Inc/../../BSP/../Components/lsm6dsl/../Common/accelero.h:
+../Core/Inc/../../BSP/../Components/lsm6dsl/../Common/gyro.h:
+../Core/Inc/../../BSP/stm32l475e_iot01_gyro.h:
+../Core/Inc/../../BSP/stm32l475e_iot01_hsensor.h:
+../Core/Inc/../../BSP/../Components/hts221/hts221.h:
+../Core/Inc/../../BSP/../Components/hts221/../Common/hsensor.h:
+../Core/Inc/../../BSP/../Components/hts221/../Common/tsensor.h:
+../Core/Inc/../../BSP/stm32l475e_iot01_magneto.h:
+../Core/Inc/../../BSP/../Components/lis3mdl/lis3mdl.h:
+../Core/Inc/../../BSP/../Components/lis3mdl/../Common/magneto.h:
+../Core/Inc/../../BSP/stm32l475e_iot01_psensor.h:
+../Core/Inc/../../BSP/../Components/lps22hb/lps22hb.h:
+../Core/Inc/../../BSP/../Components/lps22hb/../Common/psensor.h:
+../Core/Inc/../../BSP/../Components/lps22hb/../Common/tsensor.h:
+../Core/Inc/../../BSP/stm32l475e_iot01_qspi.h:
+../Core/Inc/../../BSP/../Components/mx25r6435f/mx25r6435f.h:
+../Core/Inc/../../BSP/stm32l475e_iot01_tsensor.h:
diff --git a/P3_SETR2/Debug/Core/Src/humidity.o b/P3_SETR2/Debug/Core/Src/humidity.o
new file mode 100644
index 0000000..3a197e7
Binary files /dev/null and b/P3_SETR2/Debug/Core/Src/humidity.o differ
diff --git a/P3_SETR2/Debug/Core/Src/humidity.su b/P3_SETR2/Debug/Core/Src/humidity.su
new file mode 100644
index 0000000..bd2b8b8
--- /dev/null
+++ b/P3_SETR2/Debug/Core/Src/humidity.su
@@ -0,0 +1 @@
+../Core/Src/humidity.c:10:6:Humidity_Test 16 static
diff --git a/P3_SETR2/Debug/Core/Src/magnetic.cyclo b/P3_SETR2/Debug/Core/Src/magnetic.cyclo
new file mode 100644
index 0000000..26ea363
--- /dev/null
+++ b/P3_SETR2/Debug/Core/Src/magnetic.cyclo
@@ -0,0 +1 @@
+../Core/Src/magnetic.c:10:6:Magneto_Test 1
diff --git a/P3_SETR2/Debug/Core/Src/magnetic.d b/P3_SETR2/Debug/Core/Src/magnetic.d
new file mode 100644
index 0000000..e5298ea
--- /dev/null
+++ b/P3_SETR2/Debug/Core/Src/magnetic.d
@@ -0,0 +1,115 @@
+Core/Src/magnetic.o: ../Core/Src/magnetic.c ../Core/Inc/magnetic.h \
+ ../Core/Inc/globals.h ../Core/Inc/../../BSP/stm32l475e_iot01.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h \
+ ../Core/Inc/stm32l4xx_hal_conf.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l475xx.h \
+ ../Drivers/CMSIS/Include/core_cm4.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dfsdm.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_usb.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_qspi.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h \
+ ../Core/Inc/../../BSP/stm32l475e_iot01_accelero.h \
+ ../Core/Inc/../../BSP/stm32l475e_iot01.h \
+ ../Core/Inc/../../BSP/../Components/lsm6dsl/lsm6dsl.h \
+ ../Core/Inc/../../BSP/../Components/lsm6dsl/../Common/accelero.h \
+ ../Core/Inc/../../BSP/../Components/lsm6dsl/../Common/gyro.h \
+ ../Core/Inc/../../BSP/stm32l475e_iot01_gyro.h \
+ ../Core/Inc/../../BSP/stm32l475e_iot01_hsensor.h \
+ ../Core/Inc/../../BSP/../Components/hts221/hts221.h \
+ ../Core/Inc/../../BSP/../Components/hts221/../Common/hsensor.h \
+ ../Core/Inc/../../BSP/../Components/hts221/../Common/tsensor.h \
+ ../Core/Inc/../../BSP/stm32l475e_iot01_magneto.h \
+ ../Core/Inc/../../BSP/../Components/lis3mdl/lis3mdl.h \
+ ../Core/Inc/../../BSP/../Components/lis3mdl/../Common/magneto.h \
+ ../Core/Inc/../../BSP/stm32l475e_iot01_psensor.h \
+ ../Core/Inc/../../BSP/../Components/lps22hb/lps22hb.h \
+ ../Core/Inc/../../BSP/../Components/lps22hb/../Common/psensor.h \
+ ../Core/Inc/../../BSP/../Components/lps22hb/../Common/tsensor.h \
+ ../Core/Inc/../../BSP/stm32l475e_iot01_qspi.h \
+ ../Core/Inc/../../BSP/../Components/mx25r6435f/mx25r6435f.h \
+ ../Core/Inc/../../BSP/stm32l475e_iot01_tsensor.h
+../Core/Inc/magnetic.h:
+../Core/Inc/globals.h:
+../Core/Inc/../../BSP/stm32l475e_iot01.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:
+../Core/Inc/stm32l4xx_hal_conf.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l475xx.h:
+../Drivers/CMSIS/Include/core_cm4.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dfsdm.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_usb.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_qspi.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h:
+../Core/Inc/../../BSP/stm32l475e_iot01_accelero.h:
+../Core/Inc/../../BSP/stm32l475e_iot01.h:
+../Core/Inc/../../BSP/../Components/lsm6dsl/lsm6dsl.h:
+../Core/Inc/../../BSP/../Components/lsm6dsl/../Common/accelero.h:
+../Core/Inc/../../BSP/../Components/lsm6dsl/../Common/gyro.h:
+../Core/Inc/../../BSP/stm32l475e_iot01_gyro.h:
+../Core/Inc/../../BSP/stm32l475e_iot01_hsensor.h:
+../Core/Inc/../../BSP/../Components/hts221/hts221.h:
+../Core/Inc/../../BSP/../Components/hts221/../Common/hsensor.h:
+../Core/Inc/../../BSP/../Components/hts221/../Common/tsensor.h:
+../Core/Inc/../../BSP/stm32l475e_iot01_magneto.h:
+../Core/Inc/../../BSP/../Components/lis3mdl/lis3mdl.h:
+../Core/Inc/../../BSP/../Components/lis3mdl/../Common/magneto.h:
+../Core/Inc/../../BSP/stm32l475e_iot01_psensor.h:
+../Core/Inc/../../BSP/../Components/lps22hb/lps22hb.h:
+../Core/Inc/../../BSP/../Components/lps22hb/../Common/psensor.h:
+../Core/Inc/../../BSP/../Components/lps22hb/../Common/tsensor.h:
+../Core/Inc/../../BSP/stm32l475e_iot01_qspi.h:
+../Core/Inc/../../BSP/../Components/mx25r6435f/mx25r6435f.h:
+../Core/Inc/../../BSP/stm32l475e_iot01_tsensor.h:
diff --git a/P3_SETR2/Debug/Core/Src/magnetic.o b/P3_SETR2/Debug/Core/Src/magnetic.o
new file mode 100644
index 0000000..0a68230
Binary files /dev/null and b/P3_SETR2/Debug/Core/Src/magnetic.o differ
diff --git a/P3_SETR2/Debug/Core/Src/magnetic.su b/P3_SETR2/Debug/Core/Src/magnetic.su
new file mode 100644
index 0000000..ee290e9
--- /dev/null
+++ b/P3_SETR2/Debug/Core/Src/magnetic.su
@@ -0,0 +1 @@
+../Core/Src/magnetic.c:10:6:Magneto_Test 16 static
diff --git a/P3_SETR2/Debug/Core/Src/main.cyclo b/P3_SETR2/Debug/Core/Src/main.cyclo
new file mode 100644
index 0000000..0a213f6
--- /dev/null
+++ b/P3_SETR2/Debug/Core/Src/main.cyclo
@@ -0,0 +1,12 @@
+../Core/Src/main.c:76:5:__io_putchar 2
+../Core/Src/main.c:87:5:main 1
+../Core/Src/main.c:144:6:SystemClock_Config 4
+../Core/Src/main.c:205:13:MX_DFSDM1_Init 2
+../Core/Src/main.c:243:13:MX_I2C2_Init 4
+../Core/Src/main.c:291:13:MX_QUADSPI_Init 2
+../Core/Src/main.c:324:13:MX_SPI3_Init 2
+../Core/Src/main.c:364:13:MX_USART1_UART_Init 2
+../Core/Src/main.c:399:13:MX_USART3_UART_Init 2
+../Core/Src/main.c:434:13:MX_USB_OTG_FS_PCD_Init 2
+../Core/Src/main.c:469:13:MX_GPIO_Init 1
+../Core/Src/main.c:665:6:Error_Handler 1
diff --git a/P3_SETR2/Debug/Core/Src/main.d b/P3_SETR2/Debug/Core/Src/main.d
new file mode 100644
index 0000000..4d6860d
--- /dev/null
+++ b/P3_SETR2/Debug/Core/Src/main.d
@@ -0,0 +1,72 @@
+Core/Src/main.o: ../Core/Src/main.c ../Core/Inc/main.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h \
+ ../Core/Inc/stm32l4xx_hal_conf.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l475xx.h \
+ ../Drivers/CMSIS/Include/core_cm4.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dfsdm.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_usb.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_qspi.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h
+../Core/Inc/main.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:
+../Core/Inc/stm32l4xx_hal_conf.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l475xx.h:
+../Drivers/CMSIS/Include/core_cm4.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dfsdm.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_usb.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_qspi.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h:
diff --git a/P3_SETR2/Debug/Core/Src/main.o b/P3_SETR2/Debug/Core/Src/main.o
new file mode 100644
index 0000000..de1d30e
Binary files /dev/null and b/P3_SETR2/Debug/Core/Src/main.o differ
diff --git a/P3_SETR2/Debug/Core/Src/main.su b/P3_SETR2/Debug/Core/Src/main.su
new file mode 100644
index 0000000..9a197ad
--- /dev/null
+++ b/P3_SETR2/Debug/Core/Src/main.su
@@ -0,0 +1,12 @@
+../Core/Src/main.c:76:5:__io_putchar 16 static
+../Core/Src/main.c:87:5:main 8 static
+../Core/Src/main.c:144:6:SystemClock_Config 96 static
+../Core/Src/main.c:205:13:MX_DFSDM1_Init 8 static
+../Core/Src/main.c:243:13:MX_I2C2_Init 8 static
+../Core/Src/main.c:291:13:MX_QUADSPI_Init 8 static
+../Core/Src/main.c:324:13:MX_SPI3_Init 8 static
+../Core/Src/main.c:364:13:MX_USART1_UART_Init 8 static
+../Core/Src/main.c:399:13:MX_USART3_UART_Init 8 static
+../Core/Src/main.c:434:13:MX_USB_OTG_FS_PCD_Init 8 static
+../Core/Src/main.c:469:13:MX_GPIO_Init 48 static
+../Core/Src/main.c:665:6:Error_Handler 4 static,ignoring_inline_asm
diff --git a/P3_SETR2/Debug/Core/Src/pressure.cyclo b/P3_SETR2/Debug/Core/Src/pressure.cyclo
new file mode 100644
index 0000000..1ff3df8
--- /dev/null
+++ b/P3_SETR2/Debug/Core/Src/pressure.cyclo
@@ -0,0 +1 @@
+../Core/Src/pressure.c:10:6:Pressure_Test 1
diff --git a/P3_SETR2/Debug/Core/Src/pressure.d b/P3_SETR2/Debug/Core/Src/pressure.d
new file mode 100644
index 0000000..d18c117
--- /dev/null
+++ b/P3_SETR2/Debug/Core/Src/pressure.d
@@ -0,0 +1,4 @@
+Core/Src/pressure.o: ../Core/Src/pressure.c ../Core/Inc/pressure.h \
+ ../Core/Inc/pressure.h
+../Core/Inc/pressure.h:
+../Core/Inc/pressure.h:
diff --git a/P3_SETR2/Debug/Core/Src/pressure.o b/P3_SETR2/Debug/Core/Src/pressure.o
new file mode 100644
index 0000000..f15cf57
Binary files /dev/null and b/P3_SETR2/Debug/Core/Src/pressure.o differ
diff --git a/P3_SETR2/Debug/Core/Src/pressure.su b/P3_SETR2/Debug/Core/Src/pressure.su
new file mode 100644
index 0000000..28ae05c
--- /dev/null
+++ b/P3_SETR2/Debug/Core/Src/pressure.su
@@ -0,0 +1 @@
+../Core/Src/pressure.c:10:6:Pressure_Test 16 static
diff --git a/P3_SETR2/Debug/Core/Src/stm32l4xx_hal_msp.cyclo b/P3_SETR2/Debug/Core/Src/stm32l4xx_hal_msp.cyclo
new file mode 100644
index 0000000..f072cf3
--- /dev/null
+++ b/P3_SETR2/Debug/Core/Src/stm32l4xx_hal_msp.cyclo
@@ -0,0 +1,13 @@
+../Core/Src/stm32l4xx_hal_msp.c:63:6:HAL_MspInit 1
+../Core/Src/stm32l4xx_hal_msp.c:87:6:HAL_DFSDM_ChannelMspInit 3
+../Core/Src/stm32l4xx_hal_msp.c:136:6:HAL_DFSDM_ChannelMspDeInit 2
+../Core/Src/stm32l4xx_hal_msp.c:166:6:HAL_I2C_MspInit 3
+../Core/Src/stm32l4xx_hal_msp.c:213:6:HAL_I2C_MspDeInit 2
+../Core/Src/stm32l4xx_hal_msp.c:244:6:HAL_QSPI_MspInit 2
+../Core/Src/stm32l4xx_hal_msp.c:286:6:HAL_QSPI_MspDeInit 2
+../Core/Src/stm32l4xx_hal_msp.c:320:6:HAL_SPI_MspInit 2
+../Core/Src/stm32l4xx_hal_msp.c:358:6:HAL_SPI_MspDeInit 2
+../Core/Src/stm32l4xx_hal_msp.c:388:6:HAL_UART_MspInit 5
+../Core/Src/stm32l4xx_hal_msp.c:469:6:HAL_UART_MspDeInit 3
+../Core/Src/stm32l4xx_hal_msp.c:516:6:HAL_PCD_MspInit 4
+../Core/Src/stm32l4xx_hal_msp.c:589:6:HAL_PCD_MspDeInit 3
diff --git a/P3_SETR2/Debug/Core/Src/stm32l4xx_hal_msp.d b/P3_SETR2/Debug/Core/Src/stm32l4xx_hal_msp.d
new file mode 100644
index 0000000..4709638
--- /dev/null
+++ b/P3_SETR2/Debug/Core/Src/stm32l4xx_hal_msp.d
@@ -0,0 +1,72 @@
+Core/Src/stm32l4xx_hal_msp.o: ../Core/Src/stm32l4xx_hal_msp.c \
+ ../Core/Inc/main.h ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h \
+ ../Core/Inc/stm32l4xx_hal_conf.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l475xx.h \
+ ../Drivers/CMSIS/Include/core_cm4.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dfsdm.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_usb.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_qspi.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h
+../Core/Inc/main.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:
+../Core/Inc/stm32l4xx_hal_conf.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l475xx.h:
+../Drivers/CMSIS/Include/core_cm4.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dfsdm.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_usb.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_qspi.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h:
diff --git a/P3_SETR2/Debug/Core/Src/stm32l4xx_hal_msp.o b/P3_SETR2/Debug/Core/Src/stm32l4xx_hal_msp.o
new file mode 100644
index 0000000..c98ba74
Binary files /dev/null and b/P3_SETR2/Debug/Core/Src/stm32l4xx_hal_msp.o differ
diff --git a/P3_SETR2/Debug/Core/Src/stm32l4xx_hal_msp.su b/P3_SETR2/Debug/Core/Src/stm32l4xx_hal_msp.su
new file mode 100644
index 0000000..cd7e80b
--- /dev/null
+++ b/P3_SETR2/Debug/Core/Src/stm32l4xx_hal_msp.su
@@ -0,0 +1,13 @@
+../Core/Src/stm32l4xx_hal_msp.c:63:6:HAL_MspInit 16 static
+../Core/Src/stm32l4xx_hal_msp.c:87:6:HAL_DFSDM_ChannelMspInit 184 static
+../Core/Src/stm32l4xx_hal_msp.c:136:6:HAL_DFSDM_ChannelMspDeInit 16 static
+../Core/Src/stm32l4xx_hal_msp.c:166:6:HAL_I2C_MspInit 184 static
+../Core/Src/stm32l4xx_hal_msp.c:213:6:HAL_I2C_MspDeInit 16 static
+../Core/Src/stm32l4xx_hal_msp.c:244:6:HAL_QSPI_MspInit 48 static
+../Core/Src/stm32l4xx_hal_msp.c:286:6:HAL_QSPI_MspDeInit 16 static
+../Core/Src/stm32l4xx_hal_msp.c:320:6:HAL_SPI_MspInit 48 static
+../Core/Src/stm32l4xx_hal_msp.c:358:6:HAL_SPI_MspDeInit 16 static
+../Core/Src/stm32l4xx_hal_msp.c:388:6:HAL_UART_MspInit 192 static
+../Core/Src/stm32l4xx_hal_msp.c:469:6:HAL_UART_MspDeInit 16 static
+../Core/Src/stm32l4xx_hal_msp.c:516:6:HAL_PCD_MspInit 184 static
+../Core/Src/stm32l4xx_hal_msp.c:589:6:HAL_PCD_MspDeInit 24 static
diff --git a/P3_SETR2/Debug/Core/Src/stm32l4xx_it.cyclo b/P3_SETR2/Debug/Core/Src/stm32l4xx_it.cyclo
new file mode 100644
index 0000000..976c1bd
--- /dev/null
+++ b/P3_SETR2/Debug/Core/Src/stm32l4xx_it.cyclo
@@ -0,0 +1,11 @@
+../Core/Src/stm32l4xx_it.c:69:6:NMI_Handler 1
+../Core/Src/stm32l4xx_it.c:84:6:HardFault_Handler 1
+../Core/Src/stm32l4xx_it.c:99:6:MemManage_Handler 1
+../Core/Src/stm32l4xx_it.c:114:6:BusFault_Handler 1
+../Core/Src/stm32l4xx_it.c:129:6:UsageFault_Handler 1
+../Core/Src/stm32l4xx_it.c:144:6:SVC_Handler 1
+../Core/Src/stm32l4xx_it.c:157:6:DebugMon_Handler 1
+../Core/Src/stm32l4xx_it.c:170:6:PendSV_Handler 1
+../Core/Src/stm32l4xx_it.c:183:6:SysTick_Handler 1
+../Core/Src/stm32l4xx_it.c:204:6:EXTI9_5_IRQHandler 1
+../Core/Src/stm32l4xx_it.c:221:6:EXTI15_10_IRQHandler 1
diff --git a/P3_SETR2/Debug/Core/Src/stm32l4xx_it.d b/P3_SETR2/Debug/Core/Src/stm32l4xx_it.d
new file mode 100644
index 0000000..c4798ce
--- /dev/null
+++ b/P3_SETR2/Debug/Core/Src/stm32l4xx_it.d
@@ -0,0 +1,74 @@
+Core/Src/stm32l4xx_it.o: ../Core/Src/stm32l4xx_it.c ../Core/Inc/main.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h \
+ ../Core/Inc/stm32l4xx_hal_conf.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l475xx.h \
+ ../Drivers/CMSIS/Include/core_cm4.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dfsdm.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_usb.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_qspi.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h \
+ ../Core/Inc/stm32l4xx_it.h
+../Core/Inc/main.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:
+../Core/Inc/stm32l4xx_hal_conf.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l475xx.h:
+../Drivers/CMSIS/Include/core_cm4.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dfsdm.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_usb.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_qspi.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h:
+../Core/Inc/stm32l4xx_it.h:
diff --git a/P3_SETR2/Debug/Core/Src/stm32l4xx_it.o b/P3_SETR2/Debug/Core/Src/stm32l4xx_it.o
new file mode 100644
index 0000000..f0d8628
Binary files /dev/null and b/P3_SETR2/Debug/Core/Src/stm32l4xx_it.o differ
diff --git a/P3_SETR2/Debug/Core/Src/stm32l4xx_it.su b/P3_SETR2/Debug/Core/Src/stm32l4xx_it.su
new file mode 100644
index 0000000..6f66cd6
--- /dev/null
+++ b/P3_SETR2/Debug/Core/Src/stm32l4xx_it.su
@@ -0,0 +1,11 @@
+../Core/Src/stm32l4xx_it.c:69:6:NMI_Handler 4 static
+../Core/Src/stm32l4xx_it.c:84:6:HardFault_Handler 4 static
+../Core/Src/stm32l4xx_it.c:99:6:MemManage_Handler 4 static
+../Core/Src/stm32l4xx_it.c:114:6:BusFault_Handler 4 static
+../Core/Src/stm32l4xx_it.c:129:6:UsageFault_Handler 4 static
+../Core/Src/stm32l4xx_it.c:144:6:SVC_Handler 4 static
+../Core/Src/stm32l4xx_it.c:157:6:DebugMon_Handler 4 static
+../Core/Src/stm32l4xx_it.c:170:6:PendSV_Handler 4 static
+../Core/Src/stm32l4xx_it.c:183:6:SysTick_Handler 8 static
+../Core/Src/stm32l4xx_it.c:204:6:EXTI9_5_IRQHandler 8 static
+../Core/Src/stm32l4xx_it.c:221:6:EXTI15_10_IRQHandler 8 static
diff --git a/P3_SETR2/Debug/Core/Src/subdir.mk b/P3_SETR2/Debug/Core/Src/subdir.mk
new file mode 100644
index 0000000..762e2ed
--- /dev/null
+++ b/P3_SETR2/Debug/Core/Src/subdir.mk
@@ -0,0 +1,60 @@
+################################################################################
+# Automatically-generated file. Do not edit!
+# Toolchain: GNU Tools for STM32 (13.3.rel1)
+################################################################################
+
+# Add inputs and outputs from these tool invocations to the build variables
+C_SRCS += \
+../Core/Src/accelerometer.c \
+../Core/Src/gyroscope.c \
+../Core/Src/humidity.c \
+../Core/Src/magnetic.c \
+../Core/Src/main.c \
+../Core/Src/pressure.c \
+../Core/Src/stm32l4xx_hal_msp.c \
+../Core/Src/stm32l4xx_it.c \
+../Core/Src/syscalls.c \
+../Core/Src/sysmem.c \
+../Core/Src/system_stm32l4xx.c \
+../Core/Src/temperature.c
+
+OBJS += \
+./Core/Src/accelerometer.o \
+./Core/Src/gyroscope.o \
+./Core/Src/humidity.o \
+./Core/Src/magnetic.o \
+./Core/Src/main.o \
+./Core/Src/pressure.o \
+./Core/Src/stm32l4xx_hal_msp.o \
+./Core/Src/stm32l4xx_it.o \
+./Core/Src/syscalls.o \
+./Core/Src/sysmem.o \
+./Core/Src/system_stm32l4xx.o \
+./Core/Src/temperature.o
+
+C_DEPS += \
+./Core/Src/accelerometer.d \
+./Core/Src/gyroscope.d \
+./Core/Src/humidity.d \
+./Core/Src/magnetic.d \
+./Core/Src/main.d \
+./Core/Src/pressure.d \
+./Core/Src/stm32l4xx_hal_msp.d \
+./Core/Src/stm32l4xx_it.d \
+./Core/Src/syscalls.d \
+./Core/Src/sysmem.d \
+./Core/Src/system_stm32l4xx.d \
+./Core/Src/temperature.d
+
+
+# Each subdirectory must supply rules for building sources it contributes
+Core/Src/%.o Core/Src/%.su Core/Src/%.cyclo: ../Core/Src/%.c Core/Src/subdir.mk
+ arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g -DDEBUG -DUSE_HAL_DRIVER -DSTM32L475xx -c -I../Core/Inc -I../Components -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../BSP -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+
+clean: clean-Core-2f-Src
+
+clean-Core-2f-Src:
+ -$(RM) ./Core/Src/accelerometer.cyclo ./Core/Src/accelerometer.d ./Core/Src/accelerometer.o ./Core/Src/accelerometer.su ./Core/Src/gyroscope.cyclo ./Core/Src/gyroscope.d ./Core/Src/gyroscope.o ./Core/Src/gyroscope.su ./Core/Src/humidity.cyclo ./Core/Src/humidity.d ./Core/Src/humidity.o ./Core/Src/humidity.su ./Core/Src/magnetic.cyclo ./Core/Src/magnetic.d ./Core/Src/magnetic.o ./Core/Src/magnetic.su ./Core/Src/main.cyclo ./Core/Src/main.d ./Core/Src/main.o ./Core/Src/main.su ./Core/Src/pressure.cyclo ./Core/Src/pressure.d ./Core/Src/pressure.o ./Core/Src/pressure.su ./Core/Src/stm32l4xx_hal_msp.cyclo ./Core/Src/stm32l4xx_hal_msp.d ./Core/Src/stm32l4xx_hal_msp.o ./Core/Src/stm32l4xx_hal_msp.su ./Core/Src/stm32l4xx_it.cyclo ./Core/Src/stm32l4xx_it.d ./Core/Src/stm32l4xx_it.o ./Core/Src/stm32l4xx_it.su ./Core/Src/syscalls.cyclo ./Core/Src/syscalls.d ./Core/Src/syscalls.o ./Core/Src/syscalls.su ./Core/Src/sysmem.cyclo ./Core/Src/sysmem.d ./Core/Src/sysmem.o ./Core/Src/sysmem.su ./Core/Src/system_stm32l4xx.cyclo ./Core/Src/system_stm32l4xx.d ./Core/Src/system_stm32l4xx.o ./Core/Src/system_stm32l4xx.su ./Core/Src/temperature.cyclo ./Core/Src/temperature.d ./Core/Src/temperature.o ./Core/Src/temperature.su
+
+.PHONY: clean-Core-2f-Src
+
diff --git a/P3_SETR2/Debug/Core/Src/syscalls.cyclo b/P3_SETR2/Debug/Core/Src/syscalls.cyclo
new file mode 100644
index 0000000..6cbfdd0
--- /dev/null
+++ b/P3_SETR2/Debug/Core/Src/syscalls.cyclo
@@ -0,0 +1,18 @@
+../Core/Src/syscalls.c:44:6:initialise_monitor_handles 1
+../Core/Src/syscalls.c:48:5:_getpid 1
+../Core/Src/syscalls.c:53:5:_kill 1
+../Core/Src/syscalls.c:61:6:_exit 1
+../Core/Src/syscalls.c:67:27:_read 2
+../Core/Src/syscalls.c:80:27:_write 2
+../Core/Src/syscalls.c:92:5:_close 1
+../Core/Src/syscalls.c:99:5:_fstat 1
+../Core/Src/syscalls.c:106:5:_isatty 1
+../Core/Src/syscalls.c:112:5:_lseek 1
+../Core/Src/syscalls.c:120:5:_open 1
+../Core/Src/syscalls.c:128:5:_wait 1
+../Core/Src/syscalls.c:135:5:_unlink 1
+../Core/Src/syscalls.c:142:5:_times 1
+../Core/Src/syscalls.c:148:5:_stat 1
+../Core/Src/syscalls.c:155:5:_link 1
+../Core/Src/syscalls.c:163:5:_fork 1
+../Core/Src/syscalls.c:169:5:_execve 1
diff --git a/P3_SETR2/Debug/Core/Src/syscalls.d b/P3_SETR2/Debug/Core/Src/syscalls.d
new file mode 100644
index 0000000..8667c70
--- /dev/null
+++ b/P3_SETR2/Debug/Core/Src/syscalls.d
@@ -0,0 +1 @@
+Core/Src/syscalls.o: ../Core/Src/syscalls.c
diff --git a/P3_SETR2/Debug/Core/Src/syscalls.o b/P3_SETR2/Debug/Core/Src/syscalls.o
new file mode 100644
index 0000000..75b1644
Binary files /dev/null and b/P3_SETR2/Debug/Core/Src/syscalls.o differ
diff --git a/P3_SETR2/Debug/Core/Src/syscalls.su b/P3_SETR2/Debug/Core/Src/syscalls.su
new file mode 100644
index 0000000..50b547a
--- /dev/null
+++ b/P3_SETR2/Debug/Core/Src/syscalls.su
@@ -0,0 +1,18 @@
+../Core/Src/syscalls.c:44:6:initialise_monitor_handles 4 static
+../Core/Src/syscalls.c:48:5:_getpid 4 static
+../Core/Src/syscalls.c:53:5:_kill 16 static
+../Core/Src/syscalls.c:61:6:_exit 16 static
+../Core/Src/syscalls.c:67:27:_read 32 static
+../Core/Src/syscalls.c:80:27:_write 32 static
+../Core/Src/syscalls.c:92:5:_close 16 static
+../Core/Src/syscalls.c:99:5:_fstat 16 static
+../Core/Src/syscalls.c:106:5:_isatty 16 static
+../Core/Src/syscalls.c:112:5:_lseek 24 static
+../Core/Src/syscalls.c:120:5:_open 12 static
+../Core/Src/syscalls.c:128:5:_wait 16 static
+../Core/Src/syscalls.c:135:5:_unlink 16 static
+../Core/Src/syscalls.c:142:5:_times 16 static
+../Core/Src/syscalls.c:148:5:_stat 16 static
+../Core/Src/syscalls.c:155:5:_link 16 static
+../Core/Src/syscalls.c:163:5:_fork 8 static
+../Core/Src/syscalls.c:169:5:_execve 24 static
diff --git a/P3_SETR2/Debug/Core/Src/sysmem.cyclo b/P3_SETR2/Debug/Core/Src/sysmem.cyclo
new file mode 100644
index 0000000..0090c10
--- /dev/null
+++ b/P3_SETR2/Debug/Core/Src/sysmem.cyclo
@@ -0,0 +1 @@
+../Core/Src/sysmem.c:53:7:_sbrk 3
diff --git a/P3_SETR2/Debug/Core/Src/sysmem.d b/P3_SETR2/Debug/Core/Src/sysmem.d
new file mode 100644
index 0000000..74fecf9
--- /dev/null
+++ b/P3_SETR2/Debug/Core/Src/sysmem.d
@@ -0,0 +1 @@
+Core/Src/sysmem.o: ../Core/Src/sysmem.c
diff --git a/P3_SETR2/Debug/Core/Src/sysmem.o b/P3_SETR2/Debug/Core/Src/sysmem.o
new file mode 100644
index 0000000..eb3ab8a
Binary files /dev/null and b/P3_SETR2/Debug/Core/Src/sysmem.o differ
diff --git a/P3_SETR2/Debug/Core/Src/sysmem.su b/P3_SETR2/Debug/Core/Src/sysmem.su
new file mode 100644
index 0000000..12d5f17
--- /dev/null
+++ b/P3_SETR2/Debug/Core/Src/sysmem.su
@@ -0,0 +1 @@
+../Core/Src/sysmem.c:53:7:_sbrk 32 static
diff --git a/P3_SETR2/Debug/Core/Src/system_stm32l4xx.cyclo b/P3_SETR2/Debug/Core/Src/system_stm32l4xx.cyclo
new file mode 100644
index 0000000..7caaa04
--- /dev/null
+++ b/P3_SETR2/Debug/Core/Src/system_stm32l4xx.cyclo
@@ -0,0 +1,2 @@
+../Core/Src/system_stm32l4xx.c:197:6:SystemInit 1
+../Core/Src/system_stm32l4xx.c:251:6:SystemCoreClockUpdate 8
diff --git a/P3_SETR2/Debug/Core/Src/system_stm32l4xx.d b/P3_SETR2/Debug/Core/Src/system_stm32l4xx.d
new file mode 100644
index 0000000..7a21cdf
--- /dev/null
+++ b/P3_SETR2/Debug/Core/Src/system_stm32l4xx.d
@@ -0,0 +1,71 @@
+Core/Src/system_stm32l4xx.o: ../Core/Src/system_stm32l4xx.c \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l475xx.h \
+ ../Drivers/CMSIS/Include/core_cm4.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h \
+ ../Core/Inc/stm32l4xx_hal_conf.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dfsdm.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_usb.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_qspi.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l475xx.h:
+../Drivers/CMSIS/Include/core_cm4.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:
+../Core/Inc/stm32l4xx_hal_conf.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dfsdm.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_usb.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_qspi.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h:
diff --git a/P3_SETR2/Debug/Core/Src/system_stm32l4xx.o b/P3_SETR2/Debug/Core/Src/system_stm32l4xx.o
new file mode 100644
index 0000000..e41f694
Binary files /dev/null and b/P3_SETR2/Debug/Core/Src/system_stm32l4xx.o differ
diff --git a/P3_SETR2/Debug/Core/Src/system_stm32l4xx.su b/P3_SETR2/Debug/Core/Src/system_stm32l4xx.su
new file mode 100644
index 0000000..20388ef
--- /dev/null
+++ b/P3_SETR2/Debug/Core/Src/system_stm32l4xx.su
@@ -0,0 +1,2 @@
+../Core/Src/system_stm32l4xx.c:197:6:SystemInit 4 static
+../Core/Src/system_stm32l4xx.c:251:6:SystemCoreClockUpdate 32 static
diff --git a/P3_SETR2/Debug/Core/Src/temperature.cyclo b/P3_SETR2/Debug/Core/Src/temperature.cyclo
new file mode 100644
index 0000000..a13d379
--- /dev/null
+++ b/P3_SETR2/Debug/Core/Src/temperature.cyclo
@@ -0,0 +1 @@
+../Core/Src/temperature.c:10:6:Temperature_Test 1
diff --git a/P3_SETR2/Debug/Core/Src/temperature.d b/P3_SETR2/Debug/Core/Src/temperature.d
new file mode 100644
index 0000000..e46d505
--- /dev/null
+++ b/P3_SETR2/Debug/Core/Src/temperature.d
@@ -0,0 +1,116 @@
+Core/Src/temperature.o: ../Core/Src/temperature.c \
+ ../Core/Inc/temperature.h ../Core/Inc/globals.h \
+ ../Core/Inc/../../BSP/stm32l475e_iot01.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h \
+ ../Core/Inc/stm32l4xx_hal_conf.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l475xx.h \
+ ../Drivers/CMSIS/Include/core_cm4.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dfsdm.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_usb.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_qspi.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h \
+ ../Core/Inc/../../BSP/stm32l475e_iot01_accelero.h \
+ ../Core/Inc/../../BSP/stm32l475e_iot01.h \
+ ../Core/Inc/../../BSP/../Components/lsm6dsl/lsm6dsl.h \
+ ../Core/Inc/../../BSP/../Components/lsm6dsl/../Common/accelero.h \
+ ../Core/Inc/../../BSP/../Components/lsm6dsl/../Common/gyro.h \
+ ../Core/Inc/../../BSP/stm32l475e_iot01_gyro.h \
+ ../Core/Inc/../../BSP/stm32l475e_iot01_hsensor.h \
+ ../Core/Inc/../../BSP/../Components/hts221/hts221.h \
+ ../Core/Inc/../../BSP/../Components/hts221/../Common/hsensor.h \
+ ../Core/Inc/../../BSP/../Components/hts221/../Common/tsensor.h \
+ ../Core/Inc/../../BSP/stm32l475e_iot01_magneto.h \
+ ../Core/Inc/../../BSP/../Components/lis3mdl/lis3mdl.h \
+ ../Core/Inc/../../BSP/../Components/lis3mdl/../Common/magneto.h \
+ ../Core/Inc/../../BSP/stm32l475e_iot01_psensor.h \
+ ../Core/Inc/../../BSP/../Components/lps22hb/lps22hb.h \
+ ../Core/Inc/../../BSP/../Components/lps22hb/../Common/psensor.h \
+ ../Core/Inc/../../BSP/../Components/lps22hb/../Common/tsensor.h \
+ ../Core/Inc/../../BSP/stm32l475e_iot01_qspi.h \
+ ../Core/Inc/../../BSP/../Components/mx25r6435f/mx25r6435f.h \
+ ../Core/Inc/../../BSP/stm32l475e_iot01_tsensor.h
+../Core/Inc/temperature.h:
+../Core/Inc/globals.h:
+../Core/Inc/../../BSP/stm32l475e_iot01.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:
+../Core/Inc/stm32l4xx_hal_conf.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l475xx.h:
+../Drivers/CMSIS/Include/core_cm4.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dfsdm.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_usb.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_qspi.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h:
+../Core/Inc/../../BSP/stm32l475e_iot01_accelero.h:
+../Core/Inc/../../BSP/stm32l475e_iot01.h:
+../Core/Inc/../../BSP/../Components/lsm6dsl/lsm6dsl.h:
+../Core/Inc/../../BSP/../Components/lsm6dsl/../Common/accelero.h:
+../Core/Inc/../../BSP/../Components/lsm6dsl/../Common/gyro.h:
+../Core/Inc/../../BSP/stm32l475e_iot01_gyro.h:
+../Core/Inc/../../BSP/stm32l475e_iot01_hsensor.h:
+../Core/Inc/../../BSP/../Components/hts221/hts221.h:
+../Core/Inc/../../BSP/../Components/hts221/../Common/hsensor.h:
+../Core/Inc/../../BSP/../Components/hts221/../Common/tsensor.h:
+../Core/Inc/../../BSP/stm32l475e_iot01_magneto.h:
+../Core/Inc/../../BSP/../Components/lis3mdl/lis3mdl.h:
+../Core/Inc/../../BSP/../Components/lis3mdl/../Common/magneto.h:
+../Core/Inc/../../BSP/stm32l475e_iot01_psensor.h:
+../Core/Inc/../../BSP/../Components/lps22hb/lps22hb.h:
+../Core/Inc/../../BSP/../Components/lps22hb/../Common/psensor.h:
+../Core/Inc/../../BSP/../Components/lps22hb/../Common/tsensor.h:
+../Core/Inc/../../BSP/stm32l475e_iot01_qspi.h:
+../Core/Inc/../../BSP/../Components/mx25r6435f/mx25r6435f.h:
+../Core/Inc/../../BSP/stm32l475e_iot01_tsensor.h:
diff --git a/P3_SETR2/Debug/Core/Src/temperature.o b/P3_SETR2/Debug/Core/Src/temperature.o
new file mode 100644
index 0000000..767221b
Binary files /dev/null and b/P3_SETR2/Debug/Core/Src/temperature.o differ
diff --git a/P3_SETR2/Debug/Core/Src/temperature.su b/P3_SETR2/Debug/Core/Src/temperature.su
new file mode 100644
index 0000000..f3d8715
--- /dev/null
+++ b/P3_SETR2/Debug/Core/Src/temperature.su
@@ -0,0 +1 @@
+../Core/Src/temperature.c:10:6:Temperature_Test 16 static
diff --git a/P3_SETR2/Debug/Core/Startup/startup_stm32l475vgtx.d b/P3_SETR2/Debug/Core/Startup/startup_stm32l475vgtx.d
new file mode 100644
index 0000000..33e8570
--- /dev/null
+++ b/P3_SETR2/Debug/Core/Startup/startup_stm32l475vgtx.d
@@ -0,0 +1,2 @@
+Core/Startup/startup_stm32l475vgtx.o: \
+ ../Core/Startup/startup_stm32l475vgtx.s
diff --git a/P3_SETR2/Debug/Core/Startup/startup_stm32l475vgtx.o b/P3_SETR2/Debug/Core/Startup/startup_stm32l475vgtx.o
new file mode 100644
index 0000000..d864630
Binary files /dev/null and b/P3_SETR2/Debug/Core/Startup/startup_stm32l475vgtx.o differ
diff --git a/P3_SETR2/Debug/Core/Startup/subdir.mk b/P3_SETR2/Debug/Core/Startup/subdir.mk
new file mode 100644
index 0000000..48dd6ad
--- /dev/null
+++ b/P3_SETR2/Debug/Core/Startup/subdir.mk
@@ -0,0 +1,27 @@
+################################################################################
+# Automatically-generated file. Do not edit!
+# Toolchain: GNU Tools for STM32 (13.3.rel1)
+################################################################################
+
+# Add inputs and outputs from these tool invocations to the build variables
+S_SRCS += \
+../Core/Startup/startup_stm32l475vgtx.s
+
+OBJS += \
+./Core/Startup/startup_stm32l475vgtx.o
+
+S_DEPS += \
+./Core/Startup/startup_stm32l475vgtx.d
+
+
+# Each subdirectory must supply rules for building sources it contributes
+Core/Startup/%.o: ../Core/Startup/%.s Core/Startup/subdir.mk
+ arm-none-eabi-gcc -mcpu=cortex-m4 -g -DDEBUG -c -x assembler-with-cpp -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@" "$<"
+
+clean: clean-Core-2f-Startup
+
+clean-Core-2f-Startup:
+ -$(RM) ./Core/Startup/startup_stm32l475vgtx.d ./Core/Startup/startup_stm32l475vgtx.o
+
+.PHONY: clean-Core-2f-Startup
+
diff --git a/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.cyclo b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.cyclo
new file mode 100644
index 0000000..7e352dd
--- /dev/null
+++ b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.cyclo
@@ -0,0 +1,35 @@
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c:152:19:HAL_Init 2
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c:196:19:HAL_DeInit 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c:225:13:HAL_MspInit 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c:236:13:HAL_MspDeInit 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c:259:26:HAL_InitTick 4
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c:327:13:HAL_IncTick 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c:338:17:HAL_GetTick 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c:347:10:HAL_GetTickPrio 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c:357:19:HAL_SetTickFreq 3
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c:387:21:HAL_GetTickFreq 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c:403:13:HAL_Delay 3
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c:429:13:HAL_SuspendTick 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c:445:13:HAL_ResumeTick 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c:455:10:HAL_GetHalVersion 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c:464:10:HAL_GetREVID 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c:473:10:HAL_GetDEVID 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c:482:10:HAL_GetUIDw0 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c:491:10:HAL_GetUIDw1 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c:500:10:HAL_GetUIDw2 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c:529:6:HAL_DBGMCU_EnableDBGSleepMode 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c:538:6:HAL_DBGMCU_DisableDBGSleepMode 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c:547:6:HAL_DBGMCU_EnableDBGStopMode 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c:556:6:HAL_DBGMCU_DisableDBGStopMode 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c:565:6:HAL_DBGMCU_EnableDBGStandbyMode 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c:574:6:HAL_DBGMCU_DisableDBGStandbyMode 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c:607:6:HAL_SYSCFG_SRAM2Erase 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c:626:6:HAL_SYSCFG_EnableMemorySwappingBank 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c:641:6:HAL_SYSCFG_DisableMemorySwappingBank 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c:658:6:HAL_SYSCFG_VREFBUF_VoltageScalingConfig 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c:674:6:HAL_SYSCFG_VREFBUF_HighImpedanceConfig 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c:686:6:HAL_SYSCFG_VREFBUF_TrimmingConfig 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c:698:19:HAL_SYSCFG_EnableVREFBUF 3
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c:724:6:HAL_SYSCFG_DisableVREFBUF 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c:735:6:HAL_SYSCFG_EnableIOAnalogSwitchBooster 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c:745:6:HAL_SYSCFG_DisableIOAnalogSwitchBooster 1
diff --git a/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.d b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.d
new file mode 100644
index 0000000..b93568f
--- /dev/null
+++ b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.d
@@ -0,0 +1,72 @@
+Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.o: \
+ ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h \
+ ../Core/Inc/stm32l4xx_hal_conf.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l475xx.h \
+ ../Drivers/CMSIS/Include/core_cm4.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dfsdm.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_usb.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_qspi.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:
+../Core/Inc/stm32l4xx_hal_conf.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l475xx.h:
+../Drivers/CMSIS/Include/core_cm4.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dfsdm.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_usb.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_qspi.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h:
diff --git a/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.o b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.o
new file mode 100644
index 0000000..948d0a3
Binary files /dev/null and b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.o differ
diff --git a/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.su b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.su
new file mode 100644
index 0000000..72d13ea
--- /dev/null
+++ b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.su
@@ -0,0 +1,35 @@
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c:152:19:HAL_Init 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c:196:19:HAL_DeInit 8 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c:225:13:HAL_MspInit 4 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c:236:13:HAL_MspDeInit 4 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c:259:26:HAL_InitTick 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c:327:13:HAL_IncTick 4 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c:338:17:HAL_GetTick 4 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c:347:10:HAL_GetTickPrio 4 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c:357:19:HAL_SetTickFreq 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c:387:21:HAL_GetTickFreq 4 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c:403:13:HAL_Delay 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c:429:13:HAL_SuspendTick 4 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c:445:13:HAL_ResumeTick 4 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c:455:10:HAL_GetHalVersion 4 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c:464:10:HAL_GetREVID 4 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c:473:10:HAL_GetDEVID 4 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c:482:10:HAL_GetUIDw0 4 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c:491:10:HAL_GetUIDw1 4 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c:500:10:HAL_GetUIDw2 4 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c:529:6:HAL_DBGMCU_EnableDBGSleepMode 4 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c:538:6:HAL_DBGMCU_DisableDBGSleepMode 4 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c:547:6:HAL_DBGMCU_EnableDBGStopMode 4 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c:556:6:HAL_DBGMCU_DisableDBGStopMode 4 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c:565:6:HAL_DBGMCU_EnableDBGStandbyMode 4 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c:574:6:HAL_DBGMCU_DisableDBGStandbyMode 4 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c:607:6:HAL_SYSCFG_SRAM2Erase 4 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c:626:6:HAL_SYSCFG_EnableMemorySwappingBank 4 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c:641:6:HAL_SYSCFG_DisableMemorySwappingBank 4 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c:658:6:HAL_SYSCFG_VREFBUF_VoltageScalingConfig 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c:674:6:HAL_SYSCFG_VREFBUF_HighImpedanceConfig 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c:686:6:HAL_SYSCFG_VREFBUF_TrimmingConfig 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c:698:19:HAL_SYSCFG_EnableVREFBUF 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c:724:6:HAL_SYSCFG_DisableVREFBUF 4 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c:735:6:HAL_SYSCFG_EnableIOAnalogSwitchBooster 4 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c:745:6:HAL_SYSCFG_DisableIOAnalogSwitchBooster 4 static
diff --git a/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.cyclo b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.cyclo
new file mode 100644
index 0000000..01b1a44
--- /dev/null
+++ b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.cyclo
@@ -0,0 +1,34 @@
+../Drivers/CMSIS/Include/core_cm4.h:1648:22:__NVIC_SetPriorityGrouping 1
+../Drivers/CMSIS/Include/core_cm4.h:1667:26:__NVIC_GetPriorityGrouping 1
+../Drivers/CMSIS/Include/core_cm4.h:1679:22:__NVIC_EnableIRQ 2
+../Drivers/CMSIS/Include/core_cm4.h:1717:22:__NVIC_DisableIRQ 2
+../Drivers/CMSIS/Include/core_cm4.h:1736:26:__NVIC_GetPendingIRQ 2
+../Drivers/CMSIS/Include/core_cm4.h:1755:22:__NVIC_SetPendingIRQ 2
+../Drivers/CMSIS/Include/core_cm4.h:1770:22:__NVIC_ClearPendingIRQ 2
+../Drivers/CMSIS/Include/core_cm4.h:1787:26:__NVIC_GetActive 2
+../Drivers/CMSIS/Include/core_cm4.h:1809:22:__NVIC_SetPriority 2
+../Drivers/CMSIS/Include/core_cm4.h:1831:26:__NVIC_GetPriority 2
+../Drivers/CMSIS/Include/core_cm4.h:1856:26:NVIC_EncodePriority 2
+../Drivers/CMSIS/Include/core_cm4.h:1883:22:NVIC_DecodePriority 2
+../Drivers/CMSIS/Include/core_cm4.h:1933:34:__NVIC_SystemReset 1
+../Drivers/CMSIS/Include/core_cm4.h:2017:26:SysTick_Config 2
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c:163:6:HAL_NVIC_SetPriorityGrouping 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c:185:6:HAL_NVIC_SetPriority 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c:207:6:HAL_NVIC_EnableIRQ 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c:223:6:HAL_NVIC_DisableIRQ 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c:236:6:HAL_NVIC_SystemReset 0
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c:249:10:HAL_SYSTICK_Config 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c:277:10:HAL_NVIC_GetPriorityGrouping 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c:304:6:HAL_NVIC_GetPriority 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c:319:6:HAL_NVIC_SetPendingIRQ 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c:337:10:HAL_NVIC_GetPendingIRQ 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c:353:6:HAL_NVIC_ClearPendingIRQ 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c:370:10:HAL_NVIC_GetActive 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c:384:6:HAL_SYSTICK_CLKSourceConfig 2
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c:402:6:HAL_SYSTICK_IRQHandler 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c:411:13:HAL_SYSTICK_Callback 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c:430:6:HAL_MPU_Enable 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c:445:6:HAL_MPU_Disable 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c:458:6:HAL_MPU_EnableRegion 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c:474:6:HAL_MPU_DisableRegion 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c:492:6:HAL_MPU_ConfigRegion 1
diff --git a/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.d b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.d
new file mode 100644
index 0000000..049048d
--- /dev/null
+++ b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.d
@@ -0,0 +1,72 @@
+Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.o: \
+ ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h \
+ ../Core/Inc/stm32l4xx_hal_conf.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l475xx.h \
+ ../Drivers/CMSIS/Include/core_cm4.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dfsdm.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_usb.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_qspi.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:
+../Core/Inc/stm32l4xx_hal_conf.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l475xx.h:
+../Drivers/CMSIS/Include/core_cm4.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dfsdm.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_usb.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_qspi.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h:
diff --git a/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.o b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.o
new file mode 100644
index 0000000..8411d6f
Binary files /dev/null and b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.o differ
diff --git a/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.su b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.su
new file mode 100644
index 0000000..3030ad0
--- /dev/null
+++ b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.su
@@ -0,0 +1,34 @@
+../Drivers/CMSIS/Include/core_cm4.h:1648:22:__NVIC_SetPriorityGrouping 24 static
+../Drivers/CMSIS/Include/core_cm4.h:1667:26:__NVIC_GetPriorityGrouping 4 static
+../Drivers/CMSIS/Include/core_cm4.h:1679:22:__NVIC_EnableIRQ 16 static,ignoring_inline_asm
+../Drivers/CMSIS/Include/core_cm4.h:1717:22:__NVIC_DisableIRQ 16 static,ignoring_inline_asm
+../Drivers/CMSIS/Include/core_cm4.h:1736:26:__NVIC_GetPendingIRQ 16 static
+../Drivers/CMSIS/Include/core_cm4.h:1755:22:__NVIC_SetPendingIRQ 16 static
+../Drivers/CMSIS/Include/core_cm4.h:1770:22:__NVIC_ClearPendingIRQ 16 static
+../Drivers/CMSIS/Include/core_cm4.h:1787:26:__NVIC_GetActive 16 static
+../Drivers/CMSIS/Include/core_cm4.h:1809:22:__NVIC_SetPriority 16 static
+../Drivers/CMSIS/Include/core_cm4.h:1831:26:__NVIC_GetPriority 16 static
+../Drivers/CMSIS/Include/core_cm4.h:1856:26:NVIC_EncodePriority 40 static
+../Drivers/CMSIS/Include/core_cm4.h:1883:22:NVIC_DecodePriority 40 static
+../Drivers/CMSIS/Include/core_cm4.h:1933:34:__NVIC_SystemReset 4 static,ignoring_inline_asm
+../Drivers/CMSIS/Include/core_cm4.h:2017:26:SysTick_Config 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c:163:6:HAL_NVIC_SetPriorityGrouping 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c:185:6:HAL_NVIC_SetPriority 32 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c:207:6:HAL_NVIC_EnableIRQ 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c:223:6:HAL_NVIC_DisableIRQ 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c:236:6:HAL_NVIC_SystemReset 8 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c:249:10:HAL_SYSTICK_Config 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c:277:10:HAL_NVIC_GetPriorityGrouping 8 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c:304:6:HAL_NVIC_GetPriority 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c:319:6:HAL_NVIC_SetPendingIRQ 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c:337:10:HAL_NVIC_GetPendingIRQ 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c:353:6:HAL_NVIC_ClearPendingIRQ 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c:370:10:HAL_NVIC_GetActive 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c:384:6:HAL_SYSTICK_CLKSourceConfig 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c:402:6:HAL_SYSTICK_IRQHandler 8 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c:411:13:HAL_SYSTICK_Callback 4 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c:430:6:HAL_MPU_Enable 16 static,ignoring_inline_asm
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c:445:6:HAL_MPU_Disable 4 static,ignoring_inline_asm
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c:458:6:HAL_MPU_EnableRegion 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c:474:6:HAL_MPU_DisableRegion 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c:492:6:HAL_MPU_ConfigRegion 16 static
diff --git a/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.cyclo b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.cyclo
new file mode 100644
index 0000000..e821679
--- /dev/null
+++ b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.cyclo
@@ -0,0 +1,70 @@
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:360:19:HAL_DFSDM_ChannelInit 5
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:467:19:HAL_DFSDM_ChannelDeInit 4
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:521:13:HAL_DFSDM_ChannelMspInit 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:536:13:HAL_DFSDM_ChannelMspDeInit 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:713:19:HAL_DFSDM_ChannelCkabStart 5
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:766:19:HAL_DFSDM_ChannelPollForCkab 6
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:816:19:HAL_DFSDM_ChannelCkabStop 2
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:852:19:HAL_DFSDM_ChannelCkabStart_IT 5
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:907:13:HAL_DFSDM_ChannelCkabCallback 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:923:19:HAL_DFSDM_ChannelCkabStop_IT 2
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:963:19:HAL_DFSDM_ChannelScdStart 2
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:1000:19:HAL_DFSDM_ChannelPollForScd 6
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:1050:19:HAL_DFSDM_ChannelScdStop 2
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:1087:19:HAL_DFSDM_ChannelScdStart_IT 2
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:1126:13:HAL_DFSDM_ChannelScdCallback 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:1142:19:HAL_DFSDM_ChannelScdStop_IT 2
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:1177:9:HAL_DFSDM_ChannelGetAwdValue 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:1189:19:HAL_DFSDM_ChannelModifyOffset 2
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:1236:32:HAL_DFSDM_ChannelGetState 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:1266:19:HAL_DFSDM_FilterInit 10
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:1393:19:HAL_DFSDM_FilterDeInit 2
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:1429:13:HAL_DFSDM_FilterMspInit 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:1444:13:HAL_DFSDM_FilterMspDeInit 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:1718:19:HAL_DFSDM_FilterConfigRegChannel 4
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:1763:19:HAL_DFSDM_FilterConfigInjChannel 4
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:1833:19:HAL_DFSDM_FilterRegularStart 3
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:1862:19:HAL_DFSDM_FilterPollForRegConversion 11
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:1927:19:HAL_DFSDM_FilterRegularStop 3
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:1957:19:HAL_DFSDM_FilterRegularStart_IT 3
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:1988:19:HAL_DFSDM_FilterRegularStop_IT 3
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:2026:19:HAL_DFSDM_FilterRegularStart_DMA 15
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:2103:19:HAL_DFSDM_FilterRegularMsbStart_DMA 15
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:2174:19:HAL_DFSDM_FilterRegularStop_DMA 3
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:2208:9:HAL_DFSDM_FilterGetRegularValue 2
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:2239:19:HAL_DFSDM_FilterInjectedStart 3
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:2268:19:HAL_DFSDM_FilterPollForInjConversion 12
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:2343:19:HAL_DFSDM_FilterInjectedStop 3
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:2373:19:HAL_DFSDM_FilterInjectedStart_IT 3
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:2404:19:HAL_DFSDM_FilterInjectedStop_IT 3
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:2442:19:HAL_DFSDM_FilterInjectedStart_DMA 13
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:2517:19:HAL_DFSDM_FilterInjectedMsbStart_DMA 13
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:2586:19:HAL_DFSDM_FilterInjectedStop_DMA 3
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:2620:9:HAL_DFSDM_FilterGetInjectedValue 2
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:2650:19:HAL_DFSDM_FilterAwdStart_IT 3
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:2699:19:HAL_DFSDM_FilterAwdStop_IT 3
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:2739:19:HAL_DFSDM_FilterExdStart 3
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:2770:19:HAL_DFSDM_FilterExdStop 3
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:2808:9:HAL_DFSDM_FilterGetExdMaxValue 2
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:2839:9:HAL_DFSDM_FilterGetExdMinValue 2
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:2869:10:HAL_DFSDM_FilterGetConvTimeValue 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:2892:6:HAL_DFSDM_IRQHandler 35
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:3085:13:HAL_DFSDM_FilterRegConvCpltCallback 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:3100:13:HAL_DFSDM_FilterRegConvHalfCpltCallback 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:3117:13:HAL_DFSDM_FilterInjConvCpltCallback 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:3132:13:HAL_DFSDM_FilterInjConvHalfCpltCallback 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:3149:13:HAL_DFSDM_FilterAwdCallback 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:3167:13:HAL_DFSDM_FilterErrorCallback 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:3200:31:HAL_DFSDM_FilterGetState 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:3211:10:HAL_DFSDM_FilterGetError 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:3235:13:DFSDM_DMARegularHalfConvCplt 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:3253:13:DFSDM_DMARegularConvCplt 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:3271:13:DFSDM_DMAInjectedHalfConvCplt 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:3289:13:DFSDM_DMAInjectedConvCplt 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:3307:13:DFSDM_DMAError 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:3328:17:DFSDM_GetInjChannelsNbr 3
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:3351:17:DFSDM_GetChannelFromInstance 8
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:3401:13:DFSDM_RegConvStart 6
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:3442:13:DFSDM_RegConvStop 6
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:3478:13:DFSDM_InjConvStart 6
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:3522:13:DFSDM_InjConvStop 7
diff --git a/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.d b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.d
new file mode 100644
index 0000000..5d51ce8
--- /dev/null
+++ b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.d
@@ -0,0 +1,72 @@
+Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.o: \
+ ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h \
+ ../Core/Inc/stm32l4xx_hal_conf.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l475xx.h \
+ ../Drivers/CMSIS/Include/core_cm4.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dfsdm.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_usb.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_qspi.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:
+../Core/Inc/stm32l4xx_hal_conf.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l475xx.h:
+../Drivers/CMSIS/Include/core_cm4.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dfsdm.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_usb.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_qspi.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h:
diff --git a/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.o b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.o
new file mode 100644
index 0000000..71b7720
Binary files /dev/null and b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.o differ
diff --git a/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.su b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.su
new file mode 100644
index 0000000..a8dc3eb
--- /dev/null
+++ b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.su
@@ -0,0 +1,70 @@
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:360:19:HAL_DFSDM_ChannelInit 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:467:19:HAL_DFSDM_ChannelDeInit 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:521:13:HAL_DFSDM_ChannelMspInit 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:536:13:HAL_DFSDM_ChannelMspDeInit 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:713:19:HAL_DFSDM_ChannelCkabStart 32 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:766:19:HAL_DFSDM_ChannelPollForCkab 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:816:19:HAL_DFSDM_ChannelCkabStop 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:852:19:HAL_DFSDM_ChannelCkabStart_IT 32 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:907:13:HAL_DFSDM_ChannelCkabCallback 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:923:19:HAL_DFSDM_ChannelCkabStop_IT 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:963:19:HAL_DFSDM_ChannelScdStart 32 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:1000:19:HAL_DFSDM_ChannelPollForScd 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:1050:19:HAL_DFSDM_ChannelScdStop 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:1087:19:HAL_DFSDM_ChannelScdStart_IT 32 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:1126:13:HAL_DFSDM_ChannelScdCallback 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:1142:19:HAL_DFSDM_ChannelScdStop_IT 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:1177:9:HAL_DFSDM_ChannelGetAwdValue 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:1189:19:HAL_DFSDM_ChannelModifyOffset 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:1236:32:HAL_DFSDM_ChannelGetState 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:1266:19:HAL_DFSDM_FilterInit 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:1393:19:HAL_DFSDM_FilterDeInit 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:1429:13:HAL_DFSDM_FilterMspInit 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:1444:13:HAL_DFSDM_FilterMspDeInit 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:1718:19:HAL_DFSDM_FilterConfigRegChannel 32 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:1763:19:HAL_DFSDM_FilterConfigInjChannel 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:1833:19:HAL_DFSDM_FilterRegularStart 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:1862:19:HAL_DFSDM_FilterPollForRegConversion 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:1927:19:HAL_DFSDM_FilterRegularStop 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:1957:19:HAL_DFSDM_FilterRegularStart_IT 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:1988:19:HAL_DFSDM_FilterRegularStop_IT 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:2026:19:HAL_DFSDM_FilterRegularStart_DMA 32 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:2103:19:HAL_DFSDM_FilterRegularMsbStart_DMA 32 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:2174:19:HAL_DFSDM_FilterRegularStop_DMA 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:2208:9:HAL_DFSDM_FilterGetRegularValue 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:2239:19:HAL_DFSDM_FilterInjectedStart 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:2268:19:HAL_DFSDM_FilterPollForInjConversion 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:2343:19:HAL_DFSDM_FilterInjectedStop 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:2373:19:HAL_DFSDM_FilterInjectedStart_IT 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:2404:19:HAL_DFSDM_FilterInjectedStop_IT 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:2442:19:HAL_DFSDM_FilterInjectedStart_DMA 32 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:2517:19:HAL_DFSDM_FilterInjectedMsbStart_DMA 32 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:2586:19:HAL_DFSDM_FilterInjectedStop_DMA 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:2620:9:HAL_DFSDM_FilterGetInjectedValue 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:2650:19:HAL_DFSDM_FilterAwdStart_IT 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:2699:19:HAL_DFSDM_FilterAwdStop_IT 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:2739:19:HAL_DFSDM_FilterExdStart 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:2770:19:HAL_DFSDM_FilterExdStop 32 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:2808:9:HAL_DFSDM_FilterGetExdMaxValue 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:2839:9:HAL_DFSDM_FilterGetExdMinValue 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:2869:10:HAL_DFSDM_FilterGetConvTimeValue 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:2892:6:HAL_DFSDM_IRQHandler 56 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:3085:13:HAL_DFSDM_FilterRegConvCpltCallback 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:3100:13:HAL_DFSDM_FilterRegConvHalfCpltCallback 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:3117:13:HAL_DFSDM_FilterInjConvCpltCallback 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:3132:13:HAL_DFSDM_FilterInjConvHalfCpltCallback 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:3149:13:HAL_DFSDM_FilterAwdCallback 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:3167:13:HAL_DFSDM_FilterErrorCallback 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:3200:31:HAL_DFSDM_FilterGetState 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:3211:10:HAL_DFSDM_FilterGetError 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:3235:13:DFSDM_DMARegularHalfConvCplt 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:3253:13:DFSDM_DMARegularConvCplt 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:3271:13:DFSDM_DMAInjectedHalfConvCplt 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:3289:13:DFSDM_DMAInjectedConvCplt 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:3307:13:DFSDM_DMAError 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:3328:17:DFSDM_GetInjChannelsNbr 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:3351:17:DFSDM_GetChannelFromInstance 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:3401:13:DFSDM_RegConvStart 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:3442:13:DFSDM_RegConvStop 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:3478:13:DFSDM_InjConvStart 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c:3522:13:DFSDM_InjConvStop 16 static
diff --git a/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.cyclo b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.cyclo
new file mode 100644
index 0000000..331117c
--- /dev/null
+++ b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.cyclo
@@ -0,0 +1,13 @@
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c:154:19:HAL_DMA_Init 5
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c:295:19:HAL_DMA_DeInit 4
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c:431:19:HAL_DMA_Start 3
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c:474:19:HAL_DMA_Start_IT 4
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c:547:19:HAL_DMA_Abort 2
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c:609:19:HAL_DMA_Abort_IT 3
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c:676:19:HAL_DMA_PollForTransfer 10
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c:806:6:HAL_DMA_IRQHandler 12
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c:902:19:HAL_DMA_RegisterCallback 7
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c:953:19:HAL_DMA_UnRegisterCallback 8
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c:1031:22:HAL_DMA_GetState 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c:1043:10:HAL_DMA_GetError 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c:1069:13:DMA_SetConfig 2
diff --git a/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.d b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.d
new file mode 100644
index 0000000..7a3f5cc
--- /dev/null
+++ b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.d
@@ -0,0 +1,72 @@
+Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.o: \
+ ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h \
+ ../Core/Inc/stm32l4xx_hal_conf.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l475xx.h \
+ ../Drivers/CMSIS/Include/core_cm4.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dfsdm.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_usb.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_qspi.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:
+../Core/Inc/stm32l4xx_hal_conf.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l475xx.h:
+../Drivers/CMSIS/Include/core_cm4.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dfsdm.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_usb.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_qspi.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h:
diff --git a/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.o b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.o
new file mode 100644
index 0000000..ef4fe1c
Binary files /dev/null and b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.o differ
diff --git a/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.su b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.su
new file mode 100644
index 0000000..f8d3944
--- /dev/null
+++ b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.su
@@ -0,0 +1,13 @@
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c:154:19:HAL_DMA_Init 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c:295:19:HAL_DMA_DeInit 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c:431:19:HAL_DMA_Start 32 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c:474:19:HAL_DMA_Start_IT 32 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c:547:19:HAL_DMA_Abort 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c:609:19:HAL_DMA_Abort_IT 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c:676:19:HAL_DMA_PollForTransfer 32 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c:806:6:HAL_DMA_IRQHandler 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c:902:19:HAL_DMA_RegisterCallback 32 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c:953:19:HAL_DMA_UnRegisterCallback 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c:1031:22:HAL_DMA_GetState 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c:1043:10:HAL_DMA_GetError 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c:1069:13:DMA_SetConfig 24 static
diff --git a/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.cyclo b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.cyclo
new file mode 100644
index 0000000..e69de29
diff --git a/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.d b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.d
new file mode 100644
index 0000000..b6252f1
--- /dev/null
+++ b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.d
@@ -0,0 +1,72 @@
+Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.o: \
+ ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h \
+ ../Core/Inc/stm32l4xx_hal_conf.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l475xx.h \
+ ../Drivers/CMSIS/Include/core_cm4.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dfsdm.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_usb.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_qspi.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:
+../Core/Inc/stm32l4xx_hal_conf.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l475xx.h:
+../Drivers/CMSIS/Include/core_cm4.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dfsdm.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_usb.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_qspi.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h:
diff --git a/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.o b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.o
new file mode 100644
index 0000000..e34bd89
Binary files /dev/null and b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.o differ
diff --git a/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.su b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.su
new file mode 100644
index 0000000..e69de29
diff --git a/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.cyclo b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.cyclo
new file mode 100644
index 0000000..70742e5
--- /dev/null
+++ b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.cyclo
@@ -0,0 +1,9 @@
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c:143:19:HAL_EXTI_SetConfigLine 9
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c:268:19:HAL_EXTI_GetConfigLine 9
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c:362:19:HAL_EXTI_ClearConfigLine 4
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c:428:19:HAL_EXTI_RegisterCallback 2
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c:454:19:HAL_EXTI_GetHandle 2
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c:495:6:HAL_EXTI_IRQHandler 3
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c:533:10:HAL_EXTI_GetPending 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c:572:6:HAL_EXTI_ClearPending 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c:603:6:HAL_EXTI_GenerateSWI 1
diff --git a/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.d b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.d
new file mode 100644
index 0000000..18220e8
--- /dev/null
+++ b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.d
@@ -0,0 +1,72 @@
+Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.o: \
+ ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h \
+ ../Core/Inc/stm32l4xx_hal_conf.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l475xx.h \
+ ../Drivers/CMSIS/Include/core_cm4.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dfsdm.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_usb.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_qspi.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:
+../Core/Inc/stm32l4xx_hal_conf.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l475xx.h:
+../Drivers/CMSIS/Include/core_cm4.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dfsdm.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_usb.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_qspi.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h:
diff --git a/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.o b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.o
new file mode 100644
index 0000000..17dd393
Binary files /dev/null and b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.o differ
diff --git a/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.su b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.su
new file mode 100644
index 0000000..10c0f1e
--- /dev/null
+++ b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.su
@@ -0,0 +1,9 @@
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c:143:19:HAL_EXTI_SetConfigLine 40 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c:268:19:HAL_EXTI_GetConfigLine 40 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c:362:19:HAL_EXTI_ClearConfigLine 40 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c:428:19:HAL_EXTI_RegisterCallback 32 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c:454:19:HAL_EXTI_GetHandle 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c:495:6:HAL_EXTI_IRQHandler 32 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c:533:10:HAL_EXTI_GetPending 40 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c:572:6:HAL_EXTI_ClearPending 32 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c:603:6:HAL_EXTI_GenerateSWI 32 static
diff --git a/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.cyclo b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.cyclo
new file mode 100644
index 0000000..95a8746
--- /dev/null
+++ b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.cyclo
@@ -0,0 +1,14 @@
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c:169:19:HAL_FLASH_Program 9
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c:251:19:HAL_FLASH_Program_IT 7
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c:311:6:HAL_FLASH_IRQHandler 16
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c:454:13:HAL_FLASH_EndOfOperationCallback 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c:472:13:HAL_FLASH_OperationErrorCallback 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c:505:19:HAL_FLASH_Unlock 3
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c:529:19:HAL_FLASH_Lock 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c:541:19:HAL_FLASH_OB_Unlock 2
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c:561:19:HAL_FLASH_OB_Lock 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c:573:19:HAL_FLASH_OB_Launch 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c:622:10:HAL_FLASH_GetError 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c:646:19:FLASH_WaitForLastOperation 8
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c:696:13:FLASH_Program_DoubleWord 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c:721:13:FLASH_Program_Fast 2
diff --git a/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.d b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.d
new file mode 100644
index 0000000..8bab831
--- /dev/null
+++ b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.d
@@ -0,0 +1,72 @@
+Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.o: \
+ ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h \
+ ../Core/Inc/stm32l4xx_hal_conf.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l475xx.h \
+ ../Drivers/CMSIS/Include/core_cm4.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dfsdm.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_usb.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_qspi.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:
+../Core/Inc/stm32l4xx_hal_conf.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l475xx.h:
+../Drivers/CMSIS/Include/core_cm4.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dfsdm.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_usb.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_qspi.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h:
diff --git a/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.o b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.o
new file mode 100644
index 0000000..68d0c64
Binary files /dev/null and b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.o differ
diff --git a/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.su b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.su
new file mode 100644
index 0000000..f65fa52
--- /dev/null
+++ b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.su
@@ -0,0 +1,14 @@
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c:169:19:HAL_FLASH_Program 32 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c:251:19:HAL_FLASH_Program_IT 32 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c:311:6:HAL_FLASH_IRQHandler 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c:454:13:HAL_FLASH_EndOfOperationCallback 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c:472:13:HAL_FLASH_OperationErrorCallback 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c:505:19:HAL_FLASH_Unlock 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c:529:19:HAL_FLASH_Lock 4 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c:541:19:HAL_FLASH_OB_Unlock 4 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c:561:19:HAL_FLASH_OB_Lock 4 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c:573:19:HAL_FLASH_OB_Launch 8 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c:622:10:HAL_FLASH_GetError 4 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c:646:19:FLASH_WaitForLastOperation 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c:696:13:FLASH_Program_DoubleWord 24 static,ignoring_inline_asm
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c:721:13:FLASH_Program_Fast 40 static,ignoring_inline_asm
diff --git a/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.cyclo b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.cyclo
new file mode 100644
index 0000000..25af6a8
--- /dev/null
+++ b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.cyclo
@@ -0,0 +1,15 @@
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c:125:19:HAL_FLASHEx_Erase 9
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c:228:19:HAL_FLASHEx_Erase_IT 6
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c:297:19:HAL_FLASHEx_OBProgram 11
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c:368:6:HAL_FLASHEx_OBGetConfig 7
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c:504:13:FLASH_MassErase 3
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c:551:6:FLASH_PageErase 2
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c:594:6:FLASH_FlushCaches 5
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c:651:26:FLASH_OB_WRPConfig 6
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c:727:26:FLASH_OB_RDPConfig 2
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c:771:26:FLASH_OB_UserConfig 15
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c:991:26:FLASH_OB_PCROPConfig 7
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c:1122:13:FLASH_OB_GetWRP 5
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c:1164:17:FLASH_OB_GetRDP 3
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c:1190:17:FLASH_OB_GetUser 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c:1213:13:FLASH_OB_GetPCROP 6
diff --git a/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.d b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.d
new file mode 100644
index 0000000..3bec0e6
--- /dev/null
+++ b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.d
@@ -0,0 +1,72 @@
+Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.o: \
+ ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h \
+ ../Core/Inc/stm32l4xx_hal_conf.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l475xx.h \
+ ../Drivers/CMSIS/Include/core_cm4.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dfsdm.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_usb.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_qspi.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:
+../Core/Inc/stm32l4xx_hal_conf.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l475xx.h:
+../Drivers/CMSIS/Include/core_cm4.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dfsdm.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_usb.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_qspi.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h:
diff --git a/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.o b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.o
new file mode 100644
index 0000000..75e16fb
Binary files /dev/null and b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.o differ
diff --git a/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.su b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.su
new file mode 100644
index 0000000..c924e96
--- /dev/null
+++ b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.su
@@ -0,0 +1,15 @@
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c:125:19:HAL_FLASHEx_Erase 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c:228:19:HAL_FLASHEx_Erase_IT 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c:297:19:HAL_FLASHEx_OBProgram 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c:368:6:HAL_FLASHEx_OBGetConfig 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c:504:13:FLASH_MassErase 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c:551:6:FLASH_PageErase 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c:594:6:FLASH_FlushCaches 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c:651:26:FLASH_OB_WRPConfig 32 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c:727:26:FLASH_OB_RDPConfig 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c:771:26:FLASH_OB_UserConfig 32 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c:991:26:FLASH_OB_PCROPConfig 40 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c:1122:13:FLASH_OB_GetWRP 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c:1164:17:FLASH_OB_GetRDP 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c:1190:17:FLASH_OB_GetUser 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c:1213:13:FLASH_OB_GetPCROP 40 static
diff --git a/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.cyclo b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.cyclo
new file mode 100644
index 0000000..14a1364
--- /dev/null
+++ b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.cyclo
@@ -0,0 +1,2 @@
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c:91:30:HAL_FLASHEx_EnableRunPowerDown 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c:105:30:HAL_FLASHEx_DisableRunPowerDown 1
diff --git a/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.d b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.d
new file mode 100644
index 0000000..a45df2e
--- /dev/null
+++ b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.d
@@ -0,0 +1,72 @@
+Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.o: \
+ ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h \
+ ../Core/Inc/stm32l4xx_hal_conf.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l475xx.h \
+ ../Drivers/CMSIS/Include/core_cm4.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dfsdm.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_usb.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_qspi.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:
+../Core/Inc/stm32l4xx_hal_conf.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l475xx.h:
+../Drivers/CMSIS/Include/core_cm4.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dfsdm.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_usb.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_qspi.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h:
diff --git a/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.o b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.o
new file mode 100644
index 0000000..43d8ab0
Binary files /dev/null and b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.o differ
diff --git a/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.su b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.su
new file mode 100644
index 0000000..42f3ccc
--- /dev/null
+++ b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.su
@@ -0,0 +1,2 @@
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c:91:30:HAL_FLASHEx_EnableRunPowerDown 4 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c:105:30:HAL_FLASHEx_DisableRunPowerDown 4 static
diff --git a/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.cyclo b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.cyclo
new file mode 100644
index 0000000..7afeceb
--- /dev/null
+++ b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.cyclo
@@ -0,0 +1,8 @@
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c:163:6:HAL_GPIO_Init 20
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c:307:6:HAL_GPIO_DeInit 11
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c:393:15:HAL_GPIO_ReadPin 2
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c:427:6:HAL_GPIO_WritePin 2
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c:449:6:HAL_GPIO_TogglePin 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c:474:19:HAL_GPIO_LockPin 2
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c:509:6:HAL_GPIO_EXTI_IRQHandler 2
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c:524:13:HAL_GPIO_EXTI_Callback 1
diff --git a/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.d b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.d
new file mode 100644
index 0000000..ed7d22d
--- /dev/null
+++ b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.d
@@ -0,0 +1,72 @@
+Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.o: \
+ ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h \
+ ../Core/Inc/stm32l4xx_hal_conf.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l475xx.h \
+ ../Drivers/CMSIS/Include/core_cm4.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dfsdm.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_usb.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_qspi.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:
+../Core/Inc/stm32l4xx_hal_conf.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l475xx.h:
+../Drivers/CMSIS/Include/core_cm4.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dfsdm.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_usb.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_qspi.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h:
diff --git a/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.o b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.o
new file mode 100644
index 0000000..0225af4
Binary files /dev/null and b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.o differ
diff --git a/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.su b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.su
new file mode 100644
index 0000000..1115745
--- /dev/null
+++ b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.su
@@ -0,0 +1,8 @@
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c:163:6:HAL_GPIO_Init 32 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c:307:6:HAL_GPIO_DeInit 32 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c:393:15:HAL_GPIO_ReadPin 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c:427:6:HAL_GPIO_WritePin 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c:449:6:HAL_GPIO_TogglePin 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c:474:19:HAL_GPIO_LockPin 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c:509:6:HAL_GPIO_EXTI_IRQHandler 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c:524:13:HAL_GPIO_EXTI_Callback 16 static
diff --git a/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.cyclo b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.cyclo
new file mode 100644
index 0000000..b2936ae
--- /dev/null
+++ b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.cyclo
@@ -0,0 +1,81 @@
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:535:19:HAL_I2C_Init 5
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:650:19:HAL_I2C_DeInit 2
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:696:13:HAL_I2C_MspInit 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:712:13:HAL_I2C_MspDeInit 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:1119:19:HAL_I2C_Master_Transmit 13
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:1260:19:HAL_I2C_Master_Receive 12
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:1378:19:HAL_I2C_Slave_Transmit 17
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:1565:19:HAL_I2C_Slave_Receive 12
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:1695:19:HAL_I2C_Master_Transmit_IT 6
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:1785:19:HAL_I2C_Master_Receive_IT 5
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:1854:19:HAL_I2C_Slave_Transmit_IT 4
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:1918:19:HAL_I2C_Slave_Receive_IT 3
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:1970:19:HAL_I2C_Master_Transmit_DMA 9
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:2133:19:HAL_I2C_Master_Receive_DMA 8
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:2278:19:HAL_I2C_Slave_Transmit_DMA 9
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:2414:19:HAL_I2C_Slave_Receive_DMA 7
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:2523:19:HAL_I2C_Mem_Write 15
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:2660:19:HAL_I2C_Mem_Read 15
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:2797:19:HAL_I2C_Mem_Write_IT 7
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:2885:19:HAL_I2C_Mem_Read_IT 7
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:2972:19:HAL_I2C_Mem_Write_DMA 10
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:3118:19:HAL_I2C_Mem_Read_DMA 10
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:3263:19:HAL_I2C_IsDeviceReady 14
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:3389:19:HAL_I2C_Master_Seq_Transmit_IT 14
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:3503:19:HAL_I2C_Master_Seq_Transmit_DMA 19
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:3700:19:HAL_I2C_Master_Seq_Receive_IT 9
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:3787:19:HAL_I2C_Master_Seq_Receive_DMA 12
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:3953:19:HAL_I2C_Slave_Seq_Transmit_IT 11
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:4053:19:HAL_I2C_Slave_Seq_Transmit_DMA 17
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:4237:19:HAL_I2C_Slave_Seq_Receive_IT 11
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:4337:19:HAL_I2C_Slave_Seq_Receive_DMA 17
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:4517:19:HAL_I2C_EnableListen_IT 2
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:4541:19:HAL_I2C_DisableListen_IT 2
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:4574:19:HAL_I2C_Master_Abort_IT 6
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:4638:6:HAL_I2C_EV_IRQHandler 2
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:4657:6:HAL_I2C_ER_IRQHandler 8
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:4709:13:HAL_I2C_MasterTxCpltCallback 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:4725:13:HAL_I2C_MasterRxCpltCallback 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:4740:13:HAL_I2C_SlaveTxCpltCallback 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:4756:13:HAL_I2C_SlaveRxCpltCallback 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:4774:13:HAL_I2C_AddrCallback 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:4792:13:HAL_I2C_ListenCpltCallback 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:4808:13:HAL_I2C_MemTxCpltCallback 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:4824:13:HAL_I2C_MemRxCpltCallback 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:4840:13:HAL_I2C_ErrorCallback 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:4856:13:HAL_I2C_AbortCpltCallback 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:4891:22:HAL_I2C_GetState 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:4903:21:HAL_I2C_GetMode 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:4914:10:HAL_I2C_GetError 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:4939:26:I2C_Master_ISR_IT 25
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:5098:26:I2C_Mem_ISR_IT 22
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:5257:26:I2C_Slave_ISR_IT 25
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:5397:26:I2C_Master_ISR_DMA 19
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:5545:26:I2C_Mem_ISR_DMA 20
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:5709:26:I2C_Slave_ISR_DMA 27
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:5853:26:I2C_RequestMemoryWrite 5
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:5908:26:I2C_RequestMemoryRead 5
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:5957:13:I2C_ITAddrCplt 5
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:6052:13:I2C_ITMasterSeqCplt 2
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:6105:13:I2C_ITSlaveSeqCplt 5
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:6179:13:I2C_ITMasterCplt 12
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:6322:13:I2C_ITSlaveCplt 26
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:6538:13:I2C_ITListenCplt 3
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:6589:13:I2C_ITError 19
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:6720:13:I2C_TreatErrorCallback 2
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:6758:13:I2C_Flush_TXDR 3
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:6779:13:I2C_DMAMasterTransmitCplt 4
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:6830:13:I2C_DMASlaveTransmitCplt 3
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:6859:13:I2C_DMAMasterReceiveCplt 5
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:6918:13:I2C_DMASlaveReceiveCplt 3
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:6947:13:I2C_DMAError 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:6966:13:I2C_DMAAbort 3
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:6996:26:I2C_WaitOnFlagUntilTimeout 7
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:7036:26:I2C_WaitOnTXISFlagUntilTimeout 7
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:7077:26:I2C_WaitOnSTOPFlagUntilTimeout 6
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:7115:26:I2C_WaitOnRXNEFlagUntilTimeout 13
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:7192:26:I2C_IsErrorOccurred 17
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:7333:13:I2C_TransferConfig 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:7360:13:I2C_Enable_IRQ 15
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:7451:13:I2C_Disable_IRQ 9
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:7514:13:I2C_ConvertOtherXferOptions 3
diff --git a/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.d b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.d
new file mode 100644
index 0000000..78fc9c2
--- /dev/null
+++ b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.d
@@ -0,0 +1,72 @@
+Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.o: \
+ ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h \
+ ../Core/Inc/stm32l4xx_hal_conf.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l475xx.h \
+ ../Drivers/CMSIS/Include/core_cm4.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dfsdm.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_usb.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_qspi.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:
+../Core/Inc/stm32l4xx_hal_conf.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l475xx.h:
+../Drivers/CMSIS/Include/core_cm4.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dfsdm.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_usb.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_qspi.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h:
diff --git a/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.o b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.o
new file mode 100644
index 0000000..3c1a1e4
Binary files /dev/null and b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.o differ
diff --git a/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.su b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.su
new file mode 100644
index 0000000..044c966
--- /dev/null
+++ b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.su
@@ -0,0 +1,81 @@
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:535:19:HAL_I2C_Init 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:650:19:HAL_I2C_DeInit 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:696:13:HAL_I2C_MspInit 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:712:13:HAL_I2C_MspDeInit 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:1119:19:HAL_I2C_Master_Transmit 40 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:1260:19:HAL_I2C_Master_Receive 40 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:1378:19:HAL_I2C_Slave_Transmit 40 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:1565:19:HAL_I2C_Slave_Receive 40 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:1695:19:HAL_I2C_Master_Transmit_IT 40 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:1785:19:HAL_I2C_Master_Receive_IT 40 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:1854:19:HAL_I2C_Slave_Transmit_IT 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:1918:19:HAL_I2C_Slave_Receive_IT 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:1970:19:HAL_I2C_Master_Transmit_DMA 48 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:2133:19:HAL_I2C_Master_Receive_DMA 40 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:2278:19:HAL_I2C_Slave_Transmit_DMA 32 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:2414:19:HAL_I2C_Slave_Receive_DMA 32 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:2523:19:HAL_I2C_Mem_Write 40 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:2660:19:HAL_I2C_Mem_Read 40 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:2797:19:HAL_I2C_Mem_Write_IT 32 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:2885:19:HAL_I2C_Mem_Read_IT 32 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:2972:19:HAL_I2C_Mem_Write_DMA 40 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:3118:19:HAL_I2C_Mem_Read_DMA 40 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:3263:19:HAL_I2C_IsDeviceReady 48 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:3389:19:HAL_I2C_Master_Seq_Transmit_IT 48 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:3503:19:HAL_I2C_Master_Seq_Transmit_DMA 48 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:3700:19:HAL_I2C_Master_Seq_Receive_IT 40 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:3787:19:HAL_I2C_Master_Seq_Receive_DMA 48 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:3953:19:HAL_I2C_Slave_Seq_Transmit_IT 32 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:4053:19:HAL_I2C_Slave_Seq_Transmit_DMA 32 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:4237:19:HAL_I2C_Slave_Seq_Receive_IT 32 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:4337:19:HAL_I2C_Slave_Seq_Receive_DMA 32 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:4517:19:HAL_I2C_EnableListen_IT 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:4541:19:HAL_I2C_DisableListen_IT 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:4574:19:HAL_I2C_Master_Abort_IT 32 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:4638:6:HAL_I2C_EV_IRQHandler 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:4657:6:HAL_I2C_ER_IRQHandler 32 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:4709:13:HAL_I2C_MasterTxCpltCallback 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:4725:13:HAL_I2C_MasterRxCpltCallback 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:4740:13:HAL_I2C_SlaveTxCpltCallback 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:4756:13:HAL_I2C_SlaveRxCpltCallback 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:4774:13:HAL_I2C_AddrCallback 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:4792:13:HAL_I2C_ListenCpltCallback 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:4808:13:HAL_I2C_MemTxCpltCallback 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:4824:13:HAL_I2C_MemRxCpltCallback 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:4840:13:HAL_I2C_ErrorCallback 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:4856:13:HAL_I2C_AbortCpltCallback 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:4891:22:HAL_I2C_GetState 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:4903:21:HAL_I2C_GetMode 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:4914:10:HAL_I2C_GetError 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:4939:26:I2C_Master_ISR_IT 40 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:5098:26:I2C_Mem_ISR_IT 40 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:5257:26:I2C_Slave_ISR_IT 32 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:5397:26:I2C_Master_ISR_DMA 40 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:5545:26:I2C_Mem_ISR_DMA 40 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:5709:26:I2C_Slave_ISR_DMA 40 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:5853:26:I2C_RequestMemoryWrite 32 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:5908:26:I2C_RequestMemoryRead 32 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:5957:13:I2C_ITAddrCplt 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:6052:13:I2C_ITMasterSeqCplt 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:6105:13:I2C_ITSlaveSeqCplt 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:6179:13:I2C_ITMasterCplt 32 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:6322:13:I2C_ITSlaveCplt 32 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:6538:13:I2C_ITListenCplt 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:6589:13:I2C_ITError 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:6720:13:I2C_TreatErrorCallback 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:6758:13:I2C_Flush_TXDR 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:6779:13:I2C_DMAMasterTransmitCplt 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:6830:13:I2C_DMASlaveTransmitCplt 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:6859:13:I2C_DMAMasterReceiveCplt 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:6918:13:I2C_DMASlaveReceiveCplt 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:6947:13:I2C_DMAError 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:6966:13:I2C_DMAAbort 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:6996:26:I2C_WaitOnFlagUntilTimeout 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:7036:26:I2C_WaitOnTXISFlagUntilTimeout 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:7077:26:I2C_WaitOnSTOPFlagUntilTimeout 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:7115:26:I2C_WaitOnRXNEFlagUntilTimeout 32 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:7192:26:I2C_IsErrorOccurred 48 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:7333:13:I2C_TransferConfig 32 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:7360:13:I2C_Enable_IRQ 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:7451:13:I2C_Disable_IRQ 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c:7514:13:I2C_ConvertOtherXferOptions 16 static
diff --git a/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.cyclo b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.cyclo
new file mode 100644
index 0000000..e0aafc9
--- /dev/null
+++ b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.cyclo
@@ -0,0 +1,6 @@
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c:96:19:HAL_I2CEx_ConfigAnalogFilter 3
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c:140:19:HAL_I2CEx_ConfigDigitalFilter 3
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c:208:19:HAL_I2CEx_EnableWakeUp 3
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c:247:19:HAL_I2CEx_DisableWakeUp 3
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c:314:6:HAL_I2CEx_EnableFastModePlus 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c:343:6:HAL_I2CEx_DisableFastModePlus 1
diff --git a/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.d b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.d
new file mode 100644
index 0000000..fca2795
--- /dev/null
+++ b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.d
@@ -0,0 +1,72 @@
+Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.o: \
+ ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h \
+ ../Core/Inc/stm32l4xx_hal_conf.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l475xx.h \
+ ../Drivers/CMSIS/Include/core_cm4.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dfsdm.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_usb.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_qspi.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:
+../Core/Inc/stm32l4xx_hal_conf.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l475xx.h:
+../Drivers/CMSIS/Include/core_cm4.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dfsdm.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_usb.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_qspi.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h:
diff --git a/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.o b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.o
new file mode 100644
index 0000000..72e21d4
Binary files /dev/null and b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.o differ
diff --git a/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.su b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.su
new file mode 100644
index 0000000..415666f
--- /dev/null
+++ b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.su
@@ -0,0 +1,6 @@
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c:96:19:HAL_I2CEx_ConfigAnalogFilter 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c:140:19:HAL_I2CEx_ConfigDigitalFilter 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c:208:19:HAL_I2CEx_EnableWakeUp 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c:247:19:HAL_I2CEx_DisableWakeUp 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c:314:6:HAL_I2CEx_EnableFastModePlus 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c:343:6:HAL_I2CEx_DisableFastModePlus 24 static
diff --git a/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.cyclo b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.cyclo
new file mode 100644
index 0000000..5cfb1dd
--- /dev/null
+++ b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.cyclo
@@ -0,0 +1,36 @@
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.c:131:19:HAL_PCD_Init 9
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.c:252:19:HAL_PCD_DeInit 3
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.c:291:13:HAL_PCD_MspInit 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.c:306:13:HAL_PCD_MspDeInit 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.c:1009:19:HAL_PCD_Start 3
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.c:1035:19:HAL_PCD_Stop 3
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.c:1066:6:HAL_PCD_IRQHandler 56
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.c:1660:13:HAL_PCD_DataOutStageCallback 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.c:1677:13:HAL_PCD_DataInStageCallback 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.c:1692:13:HAL_PCD_SetupStageCallback 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.c:1707:13:HAL_PCD_SOFCallback 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.c:1722:13:HAL_PCD_ResetCallback 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.c:1737:13:HAL_PCD_SuspendCallback 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.c:1752:13:HAL_PCD_ResumeCallback 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.c:1768:13:HAL_PCD_ISOOUTIncompleteCallback 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.c:1785:13:HAL_PCD_ISOINIncompleteCallback 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.c:1801:13:HAL_PCD_ConnectCallback 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.c:1816:13:HAL_PCD_DisconnectCallback 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.c:1850:19:HAL_PCD_DevConnect 3
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.c:1877:19:HAL_PCD_DevDisconnect 3
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.c:1905:19:HAL_PCD_SetAddress 2
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.c:1922:19:HAL_PCD_EP_Open 5
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.c:1970:19:HAL_PCD_EP_Close 3
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.c:2001:19:HAL_PCD_EP_Receive 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.c:2025:10:HAL_PCD_EP_GetRxCount 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.c:2037:19:HAL_PCD_EP_Transmit 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.c:2065:19:HAL_PCD_EP_SetStall 5
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.c:2108:19:HAL_PCD_EP_ClrStall 4
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.c:2144:19:HAL_PCD_EP_Abort 2
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.c:2170:19:HAL_PCD_EP_Flush 3
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.c:2193:19:HAL_PCD_ActivateRemoteWakeup 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.c:2203:19:HAL_PCD_DeActivateRemoteWakeup 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.c:2232:18:HAL_PCD_GetState 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.c:2256:26:PCD_WriteEmptyTxFifo 8
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.c:2315:26:PCD_EP_OutXfrComplete_int 4
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.c:2362:26:PCD_EP_OutSetupPacket_int 3
diff --git a/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.d b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.d
new file mode 100644
index 0000000..c76322b
--- /dev/null
+++ b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.d
@@ -0,0 +1,72 @@
+Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.o: \
+ ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.c \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h \
+ ../Core/Inc/stm32l4xx_hal_conf.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l475xx.h \
+ ../Drivers/CMSIS/Include/core_cm4.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dfsdm.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_usb.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_qspi.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:
+../Core/Inc/stm32l4xx_hal_conf.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l475xx.h:
+../Drivers/CMSIS/Include/core_cm4.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dfsdm.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_usb.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_qspi.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h:
diff --git a/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.o b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.o
new file mode 100644
index 0000000..c25d8b6
Binary files /dev/null and b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.o differ
diff --git a/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.su b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.su
new file mode 100644
index 0000000..9f8c8b3
--- /dev/null
+++ b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.su
@@ -0,0 +1,36 @@
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.c:131:19:HAL_PCD_Init 32 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.c:252:19:HAL_PCD_DeInit 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.c:291:13:HAL_PCD_MspInit 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.c:306:13:HAL_PCD_MspDeInit 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.c:1009:19:HAL_PCD_Start 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.c:1035:19:HAL_PCD_Stop 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.c:1066:6:HAL_PCD_IRQHandler 64 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.c:1660:13:HAL_PCD_DataOutStageCallback 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.c:1677:13:HAL_PCD_DataInStageCallback 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.c:1692:13:HAL_PCD_SetupStageCallback 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.c:1707:13:HAL_PCD_SOFCallback 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.c:1722:13:HAL_PCD_ResetCallback 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.c:1737:13:HAL_PCD_SuspendCallback 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.c:1752:13:HAL_PCD_ResumeCallback 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.c:1768:13:HAL_PCD_ISOOUTIncompleteCallback 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.c:1785:13:HAL_PCD_ISOINIncompleteCallback 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.c:1801:13:HAL_PCD_ConnectCallback 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.c:1816:13:HAL_PCD_DisconnectCallback 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.c:1850:19:HAL_PCD_DevConnect 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.c:1877:19:HAL_PCD_DevDisconnect 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.c:1905:19:HAL_PCD_SetAddress 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.c:1922:19:HAL_PCD_EP_Open 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.c:1970:19:HAL_PCD_EP_Close 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.c:2001:19:HAL_PCD_EP_Receive 32 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.c:2025:10:HAL_PCD_EP_GetRxCount 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.c:2037:19:HAL_PCD_EP_Transmit 32 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.c:2065:19:HAL_PCD_EP_SetStall 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.c:2108:19:HAL_PCD_EP_ClrStall 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.c:2144:19:HAL_PCD_EP_Abort 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.c:2170:19:HAL_PCD_EP_Flush 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.c:2193:19:HAL_PCD_ActivateRemoteWakeup 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.c:2203:19:HAL_PCD_DeActivateRemoteWakeup 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.c:2232:18:HAL_PCD_GetState 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.c:2256:26:PCD_WriteEmptyTxFifo 40 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.c:2315:26:PCD_EP_OutXfrComplete_int 32 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.c:2362:26:PCD_EP_OutSetupPacket_int 32 static
diff --git a/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd_ex.cyclo b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd_ex.cyclo
new file mode 100644
index 0000000..50c0de4
--- /dev/null
+++ b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd_ex.cyclo
@@ -0,0 +1,9 @@
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd_ex.c:70:19:HAL_PCDEx_SetTxFiFo 3
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd_ex.c:112:19:HAL_PCDEx_SetRxFiFo 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd_ex.c:124:19:HAL_PCDEx_ActivateLPM 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd_ex.c:141:19:HAL_PCDEx_DeActivateLPM 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd_ex.c:158:6:HAL_PCDEx_BCD_VBUSDetect 5
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd_ex.c:251:19:HAL_PCDEx_ActivateBCD 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd_ex.c:274:19:HAL_PCDEx_DeActivateBCD 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd_ex.c:515:13:HAL_PCDEx_LPM_Callback 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd_ex.c:532:13:HAL_PCDEx_BCD_Callback 1
diff --git a/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd_ex.d b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd_ex.d
new file mode 100644
index 0000000..8517e35
--- /dev/null
+++ b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd_ex.d
@@ -0,0 +1,72 @@
+Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd_ex.o: \
+ ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd_ex.c \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h \
+ ../Core/Inc/stm32l4xx_hal_conf.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l475xx.h \
+ ../Drivers/CMSIS/Include/core_cm4.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dfsdm.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_usb.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_qspi.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:
+../Core/Inc/stm32l4xx_hal_conf.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l475xx.h:
+../Drivers/CMSIS/Include/core_cm4.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dfsdm.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_usb.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_qspi.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h:
diff --git a/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd_ex.o b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd_ex.o
new file mode 100644
index 0000000..7da7697
Binary files /dev/null and b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd_ex.o differ
diff --git a/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd_ex.su b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd_ex.su
new file mode 100644
index 0000000..346a39d
--- /dev/null
+++ b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd_ex.su
@@ -0,0 +1,9 @@
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd_ex.c:70:19:HAL_PCDEx_SetTxFiFo 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd_ex.c:112:19:HAL_PCDEx_SetRxFiFo 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd_ex.c:124:19:HAL_PCDEx_ActivateLPM 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd_ex.c:141:19:HAL_PCDEx_DeActivateLPM 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd_ex.c:158:6:HAL_PCDEx_BCD_VBUSDetect 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd_ex.c:251:19:HAL_PCDEx_ActivateBCD 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd_ex.c:274:19:HAL_PCDEx_DeActivateBCD 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd_ex.c:515:13:HAL_PCDEx_LPM_Callback 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd_ex.c:532:13:HAL_PCDEx_BCD_Callback 16 static
diff --git a/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.cyclo b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.cyclo
new file mode 100644
index 0000000..8ed9f24
--- /dev/null
+++ b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.cyclo
@@ -0,0 +1,16 @@
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c:86:6:HAL_PWR_DeInit 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c:104:6:HAL_PWR_EnableBkUpAccess 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c:114:6:HAL_PWR_DisableBkUpAccess 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c:311:19:HAL_PWR_ConfigPVD 5
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c:357:6:HAL_PWR_EnablePVD 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c:366:6:HAL_PWR_DisablePVD 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c:391:6:HAL_PWR_EnableWakeUpPin 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c:412:6:HAL_PWR_DisableWakeUpPin 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c:444:6:HAL_PWR_EnterSLEEPMode 6
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c:523:6:HAL_PWR_EnterSTOPMode 2
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c:556:6:HAL_PWR_EnterSTANDBYMode 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c:582:6:HAL_PWR_EnableSleepOnExit 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c:595:6:HAL_PWR_DisableSleepOnExit 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c:609:6:HAL_PWR_EnableSEVOnPend 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c:622:6:HAL_PWR_DisableSEVOnPend 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c:636:13:HAL_PWR_PVDCallback 1
diff --git a/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.d b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.d
new file mode 100644
index 0000000..dbbdee2
--- /dev/null
+++ b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.d
@@ -0,0 +1,72 @@
+Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.o: \
+ ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h \
+ ../Core/Inc/stm32l4xx_hal_conf.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l475xx.h \
+ ../Drivers/CMSIS/Include/core_cm4.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dfsdm.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_usb.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_qspi.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:
+../Core/Inc/stm32l4xx_hal_conf.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l475xx.h:
+../Drivers/CMSIS/Include/core_cm4.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dfsdm.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_usb.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_qspi.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h:
diff --git a/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.o b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.o
new file mode 100644
index 0000000..e552bad
Binary files /dev/null and b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.o differ
diff --git a/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.su b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.su
new file mode 100644
index 0000000..6fa1311
--- /dev/null
+++ b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.su
@@ -0,0 +1,16 @@
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c:86:6:HAL_PWR_DeInit 4 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c:104:6:HAL_PWR_EnableBkUpAccess 4 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c:114:6:HAL_PWR_DisableBkUpAccess 4 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c:311:19:HAL_PWR_ConfigPVD 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c:357:6:HAL_PWR_EnablePVD 4 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c:366:6:HAL_PWR_DisablePVD 4 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c:391:6:HAL_PWR_EnableWakeUpPin 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c:412:6:HAL_PWR_DisableWakeUpPin 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c:444:6:HAL_PWR_EnterSLEEPMode 16 static,ignoring_inline_asm
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c:523:6:HAL_PWR_EnterSTOPMode 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c:556:6:HAL_PWR_EnterSTANDBYMode 4 static,ignoring_inline_asm
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c:582:6:HAL_PWR_EnableSleepOnExit 4 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c:595:6:HAL_PWR_DisableSleepOnExit 4 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c:609:6:HAL_PWR_EnableSEVOnPend 4 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c:622:6:HAL_PWR_DisableSEVOnPend 4 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c:636:13:HAL_PWR_PVDCallback 4 static
diff --git a/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.cyclo b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.cyclo
new file mode 100644
index 0000000..6a0a7b8
--- /dev/null
+++ b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.cyclo
@@ -0,0 +1,39 @@
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c:114:10:HAL_PWREx_GetVoltageRange 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c:163:19:HAL_PWREx_ControlVoltageScaling 7
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c:282:6:HAL_PWREx_EnableBatteryCharging 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c:298:6:HAL_PWREx_DisableBatteryCharging 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c:310:6:HAL_PWREx_EnableVddUSB 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c:320:6:HAL_PWREx_DisableVddUSB 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c:332:6:HAL_PWREx_EnableVddIO2 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c:342:6:HAL_PWREx_DisableVddIO2 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c:353:6:HAL_PWREx_EnableInternalWakeUpLine 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c:363:6:HAL_PWREx_DisableInternalWakeUpLine 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c:391:19:HAL_PWREx_EnableGPIOPullUp 9
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c:474:19:HAL_PWREx_DisableGPIOPullUp 9
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c:551:19:HAL_PWREx_EnableGPIOPullDown 9
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c:634:19:HAL_PWREx_DisableGPIOPullDown 9
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c:704:6:HAL_PWREx_EnablePullUpPullDownConfig 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c:716:6:HAL_PWREx_DisablePullUpPullDownConfig 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c:727:6:HAL_PWREx_EnableSRAM2ContentRetention 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c:736:6:HAL_PWREx_DisableSRAM2ContentRetention 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c:751:19:HAL_PWREx_SetSRAM2ContentRetention 3
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c:878:6:HAL_PWREx_EnablePVM1 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c:887:6:HAL_PWREx_DisablePVM1 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c:899:6:HAL_PWREx_EnablePVM2 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c:908:6:HAL_PWREx_DisablePVM2 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c:919:6:HAL_PWREx_EnablePVM3 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c:928:6:HAL_PWREx_DisablePVM3 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c:938:6:HAL_PWREx_EnablePVM4 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c:947:6:HAL_PWREx_DisablePVM4 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c:967:19:HAL_PWREx_ConfigPVM 23
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c:1129:6:HAL_PWREx_EnableLowPowerRunMode 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c:1144:19:HAL_PWREx_DisableLowPowerRunMode 4
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c:1188:6:HAL_PWREx_EnterSTOP0Mode 2
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c:1239:6:HAL_PWREx_EnterSTOP1Mode 2
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c:1292:6:HAL_PWREx_EnterSTOP2Mode 2
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c:1334:6:HAL_PWREx_EnterSHUTDOWNMode 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c:1359:6:HAL_PWREx_PVD_PVM_IRQHandler 6
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c:1415:13:HAL_PWREx_PVM1Callback 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c:1428:13:HAL_PWREx_PVM2Callback 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c:1440:13:HAL_PWREx_PVM3Callback 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c:1451:13:HAL_PWREx_PVM4Callback 1
diff --git a/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.d b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.d
new file mode 100644
index 0000000..7fbb875
--- /dev/null
+++ b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.d
@@ -0,0 +1,72 @@
+Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.o: \
+ ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h \
+ ../Core/Inc/stm32l4xx_hal_conf.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l475xx.h \
+ ../Drivers/CMSIS/Include/core_cm4.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dfsdm.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_usb.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_qspi.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:
+../Core/Inc/stm32l4xx_hal_conf.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l475xx.h:
+../Drivers/CMSIS/Include/core_cm4.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dfsdm.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_usb.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_qspi.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h:
diff --git a/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.o b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.o
new file mode 100644
index 0000000..77db0f6
Binary files /dev/null and b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.o differ
diff --git a/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.su b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.su
new file mode 100644
index 0000000..d9b58d3
--- /dev/null
+++ b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.su
@@ -0,0 +1,39 @@
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c:114:10:HAL_PWREx_GetVoltageRange 4 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c:163:19:HAL_PWREx_ControlVoltageScaling 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c:282:6:HAL_PWREx_EnableBatteryCharging 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c:298:6:HAL_PWREx_DisableBatteryCharging 4 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c:310:6:HAL_PWREx_EnableVddUSB 4 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c:320:6:HAL_PWREx_DisableVddUSB 4 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c:332:6:HAL_PWREx_EnableVddIO2 4 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c:342:6:HAL_PWREx_DisableVddIO2 4 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c:353:6:HAL_PWREx_EnableInternalWakeUpLine 4 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c:363:6:HAL_PWREx_DisableInternalWakeUpLine 4 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c:391:19:HAL_PWREx_EnableGPIOPullUp 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c:474:19:HAL_PWREx_DisableGPIOPullUp 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c:551:19:HAL_PWREx_EnableGPIOPullDown 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c:634:19:HAL_PWREx_DisableGPIOPullDown 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c:704:6:HAL_PWREx_EnablePullUpPullDownConfig 4 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c:716:6:HAL_PWREx_DisablePullUpPullDownConfig 4 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c:727:6:HAL_PWREx_EnableSRAM2ContentRetention 8 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c:736:6:HAL_PWREx_DisableSRAM2ContentRetention 8 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c:751:19:HAL_PWREx_SetSRAM2ContentRetention 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c:878:6:HAL_PWREx_EnablePVM1 4 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c:887:6:HAL_PWREx_DisablePVM1 4 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c:899:6:HAL_PWREx_EnablePVM2 4 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c:908:6:HAL_PWREx_DisablePVM2 4 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c:919:6:HAL_PWREx_EnablePVM3 4 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c:928:6:HAL_PWREx_DisablePVM3 4 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c:938:6:HAL_PWREx_EnablePVM4 4 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c:947:6:HAL_PWREx_DisablePVM4 4 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c:967:19:HAL_PWREx_ConfigPVM 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c:1129:6:HAL_PWREx_EnableLowPowerRunMode 4 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c:1144:19:HAL_PWREx_DisableLowPowerRunMode 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c:1188:6:HAL_PWREx_EnterSTOP0Mode 16 static,ignoring_inline_asm
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c:1239:6:HAL_PWREx_EnterSTOP1Mode 16 static,ignoring_inline_asm
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c:1292:6:HAL_PWREx_EnterSTOP2Mode 16 static,ignoring_inline_asm
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c:1334:6:HAL_PWREx_EnterSHUTDOWNMode 4 static,ignoring_inline_asm
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c:1359:6:HAL_PWREx_PVD_PVM_IRQHandler 8 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c:1415:13:HAL_PWREx_PVM1Callback 4 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c:1428:13:HAL_PWREx_PVM2Callback 4 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c:1440:13:HAL_PWREx_PVM3Callback 4 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c:1451:13:HAL_PWREx_PVM4Callback 4 static
diff --git a/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.cyclo b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.cyclo
new file mode 100644
index 0000000..c99dde9
--- /dev/null
+++ b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.cyclo
@@ -0,0 +1,41 @@
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.c:291:19:HAL_QSPI_Init 4
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.c:400:19:HAL_QSPI_DeInit 2
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.c:441:13:HAL_QSPI_MspInit 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.c:456:13:HAL_QSPI_MspDeInit 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.c:495:6:HAL_QSPI_IRQHandler 29
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.c:792:19:HAL_QSPI_Command 6
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.c:881:19:HAL_QSPI_Command_IT 6
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.c:981:19:HAL_QSPI_Transmit 8
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.c:1068:19:HAL_QSPI_Receive 8
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.c:1157:19:HAL_QSPI_Transmit_IT 4
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.c:1217:19:HAL_QSPI_Receive_IT 4
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.c:1285:19:HAL_QSPI_Transmit_DMA 13
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.c:1429:19:HAL_QSPI_Receive_DMA 13
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.c:1575:19:HAL_QSPI_AutoPolling 5
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.c:1675:19:HAL_QSPI_AutoPolling_IT 4
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.c:1779:19:HAL_QSPI_MemoryMapped 5
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.c:1865:13:HAL_QSPI_ErrorCallback 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.c:1880:13:HAL_QSPI_AbortCpltCallback 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.c:1895:13:HAL_QSPI_CmdCpltCallback 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.c:1910:13:HAL_QSPI_RxCpltCallback 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.c:1925:13:HAL_QSPI_TxCpltCallback 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.c:1940:13:HAL_QSPI_RxHalfCpltCallback 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.c:1955:13:HAL_QSPI_TxHalfCpltCallback 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.c:1970:13:HAL_QSPI_FifoThresholdCallback 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.c:1985:13:HAL_QSPI_StatusMatchCallback 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.c:2000:13:HAL_QSPI_TimeOutCallback 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.c:2258:23:HAL_QSPI_GetState 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.c:2269:10:HAL_QSPI_GetError 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.c:2279:19:HAL_QSPI_Abort 7
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.c:2343:19:HAL_QSPI_Abort_IT 5
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.c:2407:6:HAL_QSPI_SetTimeout 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.c:2417:19:HAL_QSPI_SetFifoThreshold 3
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.c:2449:10:HAL_QSPI_GetFifoThreshold 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.c:2510:13:QSPI_DMARxCplt 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.c:2524:13:QSPI_DMATxCplt 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.c:2538:13:QSPI_DMARxHalfCplt 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.c:2554:13:QSPI_DMATxHalfCplt 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.c:2570:13:QSPI_DMAError 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.c:2591:13:QSPI_DMAAbortCplt 2
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.c:2634:26:QSPI_WaitFlagStateUntilTimeout 5
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.c:2667:13:QSPI_Config 15
diff --git a/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.d b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.d
new file mode 100644
index 0000000..01c0276
--- /dev/null
+++ b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.d
@@ -0,0 +1,72 @@
+Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.o: \
+ ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.c \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h \
+ ../Core/Inc/stm32l4xx_hal_conf.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l475xx.h \
+ ../Drivers/CMSIS/Include/core_cm4.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dfsdm.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_usb.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_qspi.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:
+../Core/Inc/stm32l4xx_hal_conf.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l475xx.h:
+../Drivers/CMSIS/Include/core_cm4.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dfsdm.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_usb.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_qspi.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h:
diff --git a/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.o b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.o
new file mode 100644
index 0000000..6b98c26
Binary files /dev/null and b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.o differ
diff --git a/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.su b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.su
new file mode 100644
index 0000000..e561ef0
--- /dev/null
+++ b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.su
@@ -0,0 +1,41 @@
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.c:291:19:HAL_QSPI_Init 32 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.c:400:19:HAL_QSPI_DeInit 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.c:441:13:HAL_QSPI_MspInit 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.c:456:13:HAL_QSPI_MspDeInit 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.c:495:6:HAL_QSPI_IRQHandler 32 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.c:792:19:HAL_QSPI_Command 40 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.c:881:19:HAL_QSPI_Command_IT 32 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.c:981:19:HAL_QSPI_Transmit 48 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.c:1068:19:HAL_QSPI_Receive 48 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.c:1157:19:HAL_QSPI_Transmit_IT 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.c:1217:19:HAL_QSPI_Receive_IT 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.c:1285:19:HAL_QSPI_Transmit_DMA 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.c:1429:19:HAL_QSPI_Receive_DMA 32 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.c:1575:19:HAL_QSPI_AutoPolling 40 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.c:1675:19:HAL_QSPI_AutoPolling_IT 40 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.c:1779:19:HAL_QSPI_MemoryMapped 40 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.c:1865:13:HAL_QSPI_ErrorCallback 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.c:1880:13:HAL_QSPI_AbortCpltCallback 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.c:1895:13:HAL_QSPI_CmdCpltCallback 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.c:1910:13:HAL_QSPI_RxCpltCallback 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.c:1925:13:HAL_QSPI_TxCpltCallback 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.c:1940:13:HAL_QSPI_RxHalfCpltCallback 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.c:1955:13:HAL_QSPI_TxHalfCpltCallback 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.c:1970:13:HAL_QSPI_FifoThresholdCallback 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.c:1985:13:HAL_QSPI_StatusMatchCallback 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.c:2000:13:HAL_QSPI_TimeOutCallback 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.c:2258:23:HAL_QSPI_GetState 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.c:2269:10:HAL_QSPI_GetError 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.c:2279:19:HAL_QSPI_Abort 32 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.c:2343:19:HAL_QSPI_Abort_IT 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.c:2407:6:HAL_QSPI_SetTimeout 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.c:2417:19:HAL_QSPI_SetFifoThreshold 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.c:2449:10:HAL_QSPI_GetFifoThreshold 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.c:2510:13:QSPI_DMARxCplt 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.c:2524:13:QSPI_DMATxCplt 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.c:2538:13:QSPI_DMARxHalfCplt 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.c:2554:13:QSPI_DMATxHalfCplt 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.c:2570:13:QSPI_DMAError 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.c:2591:13:QSPI_DMAAbortCplt 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.c:2634:26:QSPI_WaitFlagStateUntilTimeout 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.c:2667:13:QSPI_Config 24 static
diff --git a/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.cyclo b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.cyclo
new file mode 100644
index 0000000..7b1694d
--- /dev/null
+++ b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.cyclo
@@ -0,0 +1,15 @@
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c:265:19:HAL_RCC_DeInit 8
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c:405:19:HAL_RCC_OscConfig 83
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c:1097:19:HAL_RCC_ClockConfig 22
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c:1339:6:HAL_RCC_MCOConfig 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c:1398:10:HAL_RCC_GetSysClockFreq 11
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c:1486:10:HAL_RCC_GetHCLKFreq 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c:1497:10:HAL_RCC_GetPCLK1Freq 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c:1509:10:HAL_RCC_GetPCLK2Freq 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c:1522:6:HAL_RCC_GetOscConfig 10
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c:1681:6:HAL_RCC_GetClockConfig 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c:1716:6:HAL_RCC_EnableCSS 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c:1726:6:HAL_RCC_NMI_IRQHandler 2
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c:1743:13:HAL_RCC_CSSCallback 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c:1757:10:HAL_RCC_GetResetSource 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c:1787:26:RCC_SetFlashLatencyFromMSIRange 9
diff --git a/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.d b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.d
new file mode 100644
index 0000000..3db3b68
--- /dev/null
+++ b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.d
@@ -0,0 +1,72 @@
+Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.o: \
+ ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h \
+ ../Core/Inc/stm32l4xx_hal_conf.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l475xx.h \
+ ../Drivers/CMSIS/Include/core_cm4.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dfsdm.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_usb.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_qspi.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:
+../Core/Inc/stm32l4xx_hal_conf.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l475xx.h:
+../Drivers/CMSIS/Include/core_cm4.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dfsdm.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_usb.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_qspi.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h:
diff --git a/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.o b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.o
new file mode 100644
index 0000000..2cb9c6a
Binary files /dev/null and b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.o differ
diff --git a/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.su b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.su
new file mode 100644
index 0000000..64a7d7a
--- /dev/null
+++ b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.su
@@ -0,0 +1,15 @@
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c:265:19:HAL_RCC_DeInit 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c:405:19:HAL_RCC_OscConfig 40 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c:1097:19:HAL_RCC_ClockConfig 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c:1339:6:HAL_RCC_MCOConfig 48 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c:1398:10:HAL_RCC_GetSysClockFreq 40 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c:1486:10:HAL_RCC_GetHCLKFreq 4 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c:1497:10:HAL_RCC_GetPCLK1Freq 8 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c:1509:10:HAL_RCC_GetPCLK2Freq 8 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c:1522:6:HAL_RCC_GetOscConfig 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c:1681:6:HAL_RCC_GetClockConfig 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c:1716:6:HAL_RCC_EnableCSS 4 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c:1726:6:HAL_RCC_NMI_IRQHandler 8 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c:1743:13:HAL_RCC_CSSCallback 4 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c:1757:10:HAL_RCC_GetResetSource 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c:1787:26:RCC_SetFlashLatencyFromMSIRange 32 static
diff --git a/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.cyclo b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.cyclo
new file mode 100644
index 0000000..be59b0c
--- /dev/null
+++ b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.cyclo
@@ -0,0 +1,21 @@
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c:194:19:HAL_RCCEx_PeriphCLKConfig 60
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c:828:6:HAL_RCCEx_GetPeriphCLKConfig 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c:1154:10:HAL_RCCEx_GetPeriphCLKFreq 149
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c:2058:19:HAL_RCCEx_EnablePLLSAI1 6
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c:2126:19:HAL_RCCEx_DisablePLLSAI1 4
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c:2176:19:HAL_RCCEx_EnablePLLSAI2 6
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c:2254:19:HAL_RCCEx_DisablePLLSAI2 4
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c:2303:6:HAL_RCCEx_WakeUpStopCLKConfig 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c:2321:6:HAL_RCCEx_StandbyMSIRangeConfig 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c:2335:6:HAL_RCCEx_EnableLSECSS 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c:2345:6:HAL_RCCEx_DisableLSECSS 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c:2358:6:HAL_RCCEx_EnableLSECSS_IT 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c:2375:6:HAL_RCCEx_LSECSS_IRQHandler 2
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c:2392:13:HAL_RCCEx_LSECSS_Callback 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c:2407:6:HAL_RCCEx_EnableLSCO 5
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c:2454:6:HAL_RCCEx_DisableLSCO 5
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c:2492:6:HAL_RCCEx_EnableMSIPLLMode 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c:2502:6:HAL_RCCEx_DisableMSIPLLMode 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c:2907:26:RCCEx_PLLSAI1_Config 23
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c:3112:26:RCCEx_PLLSAI2_Config 22
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c:3309:17:RCCEx_GetSAIxPeriphCLKFreq 23
diff --git a/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.d b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.d
new file mode 100644
index 0000000..fdbbc83
--- /dev/null
+++ b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.d
@@ -0,0 +1,72 @@
+Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.o: \
+ ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h \
+ ../Core/Inc/stm32l4xx_hal_conf.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l475xx.h \
+ ../Drivers/CMSIS/Include/core_cm4.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dfsdm.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_usb.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_qspi.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:
+../Core/Inc/stm32l4xx_hal_conf.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l475xx.h:
+../Drivers/CMSIS/Include/core_cm4.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dfsdm.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_usb.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_qspi.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h:
diff --git a/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.o b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.o
new file mode 100644
index 0000000..3e4a43f
Binary files /dev/null and b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.o differ
diff --git a/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.su b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.su
new file mode 100644
index 0000000..d127836
--- /dev/null
+++ b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.su
@@ -0,0 +1,21 @@
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c:194:19:HAL_RCCEx_PeriphCLKConfig 32 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c:828:6:HAL_RCCEx_GetPeriphCLKConfig 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c:1154:10:HAL_RCCEx_GetPeriphCLKFreq 40 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c:2058:19:HAL_RCCEx_EnablePLLSAI1 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c:2126:19:HAL_RCCEx_DisablePLLSAI1 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c:2176:19:HAL_RCCEx_EnablePLLSAI2 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c:2254:19:HAL_RCCEx_DisablePLLSAI2 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c:2303:6:HAL_RCCEx_WakeUpStopCLKConfig 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c:2321:6:HAL_RCCEx_StandbyMSIRangeConfig 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c:2335:6:HAL_RCCEx_EnableLSECSS 4 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c:2345:6:HAL_RCCEx_DisableLSECSS 4 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c:2358:6:HAL_RCCEx_EnableLSECSS_IT 4 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c:2375:6:HAL_RCCEx_LSECSS_IRQHandler 8 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c:2392:13:HAL_RCCEx_LSECSS_Callback 4 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c:2407:6:HAL_RCCEx_EnableLSCO 48 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c:2454:6:HAL_RCCEx_DisableLSCO 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c:2492:6:HAL_RCCEx_EnableMSIPLLMode 4 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c:2502:6:HAL_RCCEx_DisableMSIPLLMode 4 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c:2907:26:RCCEx_PLLSAI1_Config 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c:3112:26:RCCEx_PLLSAI2_Config 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c:3309:17:RCCEx_GetSAIxPeriphCLKFreq 40 static
diff --git a/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.cyclo b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.cyclo
new file mode 100644
index 0000000..7dda7b0
--- /dev/null
+++ b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.cyclo
@@ -0,0 +1,56 @@
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:316:19:HAL_SPI_Init 8
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:491:19:HAL_SPI_DeInit 2
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:535:13:HAL_SPI_MspInit 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:551:13:HAL_SPI_MspDeInit 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:823:19:HAL_SPI_Transmit 27
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:1009:19:HAL_SPI_Receive 23
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:1252:19:HAL_SPI_TransmitReceive 43
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:1600:19:HAL_SPI_Transmit_IT 8
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:1682:19:HAL_SPI_Receive_IT 10
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:1786:19:HAL_SPI_TransmitReceive_IT 14
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:1894:19:HAL_SPI_Transmit_DMA 11
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:2015:19:HAL_SPI_Receive_DMA 13
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:2155:19:HAL_SPI_TransmitReceive_DMA 19
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:2344:19:HAL_SPI_Abort 18
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:2506:19:HAL_SPI_Abort_IT 19
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:2667:19:HAL_SPI_DMAPause 2
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:2687:19:HAL_SPI_DMAResume 2
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:2707:19:HAL_SPI_DMAStop 5
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:2749:6:HAL_SPI_IRQHandler 21
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:2856:13:HAL_SPI_TxCpltCallback 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:2872:13:HAL_SPI_RxCpltCallback 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:2888:13:HAL_SPI_TxRxCpltCallback 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:2904:13:HAL_SPI_TxHalfCpltCallback 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:2920:13:HAL_SPI_RxHalfCpltCallback 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:2936:13:HAL_SPI_TxRxHalfCpltCallback 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:2952:13:HAL_SPI_ErrorCallback 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:2970:13:HAL_SPI_AbortCpltCallback 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:3005:22:HAL_SPI_GetState 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:3017:10:HAL_SPI_GetError 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:3042:13:SPI_DMATransmitCplt 5
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:3099:13:SPI_DMAReceiveCplt 6
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:3216:13:SPI_DMATransmitReceiveCplt 4
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:3317:13:SPI_DMAHalfTransmitCplt 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:3335:13:SPI_DMAHalfReceiveCplt 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:3353:13:SPI_DMAHalfTransmitReceiveCplt 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:3371:13:SPI_DMAError 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:3394:13:SPI_DMAAbortOnError 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:3416:13:SPI_DMATxAbortCallback 6
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:3483:13:SPI_DMARxAbortCallback 6
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:3549:13:SPI_2linesRxISR_8BIT 5
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:3634:13:SPI_2linesTxISR_8BIT 4
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:3681:13:SPI_2linesRxISR_16BIT 3
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:3737:13:SPI_2linesTxISR_16BIT 3
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:3802:13:SPI_RxISR_8BIT 2
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:3858:13:SPI_RxISR_16BIT 2
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:3891:13:SPI_TxISR_8BIT 2
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:3916:13:SPI_TxISR_16BIT 2
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:3946:26:SPI_WaitFlagStateUntilTimeout 10
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:4015:26:SPI_WaitFifoStateUntilTimeout 12
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:4095:26:SPI_EndRxTransaction 9
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:4131:26:SPI_EndRxTxTransaction 4
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:4163:13:SPI_CloseRxTx_ISR 4
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:4240:13:SPI_CloseRx_ISR 3
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:4297:13:SPI_CloseTx_ISR 4
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:4346:13:SPI_AbortRx_ISR 5
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:4391:13:SPI_AbortTx_ISR 10
diff --git a/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.d b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.d
new file mode 100644
index 0000000..6edea91
--- /dev/null
+++ b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.d
@@ -0,0 +1,72 @@
+Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.o: \
+ ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h \
+ ../Core/Inc/stm32l4xx_hal_conf.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l475xx.h \
+ ../Drivers/CMSIS/Include/core_cm4.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dfsdm.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_usb.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_qspi.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:
+../Core/Inc/stm32l4xx_hal_conf.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l475xx.h:
+../Drivers/CMSIS/Include/core_cm4.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dfsdm.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_usb.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_qspi.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h:
diff --git a/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.o b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.o
new file mode 100644
index 0000000..1a88d95
Binary files /dev/null and b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.o differ
diff --git a/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.su b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.su
new file mode 100644
index 0000000..3ae793a
--- /dev/null
+++ b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.su
@@ -0,0 +1,56 @@
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:316:19:HAL_SPI_Init 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:491:19:HAL_SPI_DeInit 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:535:13:HAL_SPI_MspInit 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:551:13:HAL_SPI_MspDeInit 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:823:19:HAL_SPI_Transmit 40 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:1009:19:HAL_SPI_Receive 40 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:1252:19:HAL_SPI_TransmitReceive 48 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:1600:19:HAL_SPI_Transmit_IT 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:1682:19:HAL_SPI_Receive_IT 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:1786:19:HAL_SPI_TransmitReceive_IT 32 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:1894:19:HAL_SPI_Transmit_DMA 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:2015:19:HAL_SPI_Receive_DMA 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:2155:19:HAL_SPI_TransmitReceive_DMA 32 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:2344:19:HAL_SPI_Abort 48 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:2506:19:HAL_SPI_Abort_IT 40 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:2667:19:HAL_SPI_DMAPause 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:2687:19:HAL_SPI_DMAResume 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:2707:19:HAL_SPI_DMAStop 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:2749:6:HAL_SPI_IRQHandler 40 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:2856:13:HAL_SPI_TxCpltCallback 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:2872:13:HAL_SPI_RxCpltCallback 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:2888:13:HAL_SPI_TxRxCpltCallback 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:2904:13:HAL_SPI_TxHalfCpltCallback 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:2920:13:HAL_SPI_RxHalfCpltCallback 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:2936:13:HAL_SPI_TxRxHalfCpltCallback 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:2952:13:HAL_SPI_ErrorCallback 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:2970:13:HAL_SPI_AbortCpltCallback 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:3005:22:HAL_SPI_GetState 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:3017:10:HAL_SPI_GetError 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:3042:13:SPI_DMATransmitCplt 32 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:3099:13:SPI_DMAReceiveCplt 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:3216:13:SPI_DMATransmitReceiveCplt 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:3317:13:SPI_DMAHalfTransmitCplt 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:3335:13:SPI_DMAHalfReceiveCplt 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:3353:13:SPI_DMAHalfTransmitReceiveCplt 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:3371:13:SPI_DMAError 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:3394:13:SPI_DMAAbortOnError 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:3416:13:SPI_DMATxAbortCallback 40 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:3483:13:SPI_DMARxAbortCallback 40 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:3549:13:SPI_2linesRxISR_8BIT 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:3634:13:SPI_2linesTxISR_8BIT 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:3681:13:SPI_2linesRxISR_16BIT 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:3737:13:SPI_2linesTxISR_16BIT 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:3802:13:SPI_RxISR_8BIT 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:3858:13:SPI_RxISR_16BIT 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:3891:13:SPI_TxISR_8BIT 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:3916:13:SPI_TxISR_16BIT 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:3946:26:SPI_WaitFlagStateUntilTimeout 40 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:4015:26:SPI_WaitFifoStateUntilTimeout 48 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:4095:26:SPI_EndRxTransaction 32 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:4131:26:SPI_EndRxTxTransaction 32 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:4163:13:SPI_CloseRxTx_ISR 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:4240:13:SPI_CloseRx_ISR 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:4297:13:SPI_CloseTx_ISR 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:4346:13:SPI_AbortRx_ISR 32 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c:4391:13:SPI_AbortTx_ISR 32 static
diff --git a/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi_ex.cyclo b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi_ex.cyclo
new file mode 100644
index 0000000..6bfdf67
--- /dev/null
+++ b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi_ex.cyclo
@@ -0,0 +1 @@
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi_ex.c:79:19:HAL_SPIEx_FlushRxFifo 3
diff --git a/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi_ex.d b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi_ex.d
new file mode 100644
index 0000000..1234ff9
--- /dev/null
+++ b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi_ex.d
@@ -0,0 +1,72 @@
+Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi_ex.o: \
+ ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi_ex.c \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h \
+ ../Core/Inc/stm32l4xx_hal_conf.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l475xx.h \
+ ../Drivers/CMSIS/Include/core_cm4.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dfsdm.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_usb.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_qspi.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:
+../Core/Inc/stm32l4xx_hal_conf.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l475xx.h:
+../Drivers/CMSIS/Include/core_cm4.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dfsdm.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_usb.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_qspi.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h:
diff --git a/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi_ex.o b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi_ex.o
new file mode 100644
index 0000000..b1a63e1
Binary files /dev/null and b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi_ex.o differ
diff --git a/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi_ex.su b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi_ex.su
new file mode 100644
index 0000000..4069b89
--- /dev/null
+++ b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi_ex.su
@@ -0,0 +1 @@
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi_ex.c:79:19:HAL_SPIEx_FlushRxFifo 24 static
diff --git a/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.cyclo b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.cyclo
new file mode 100644
index 0000000..a169958
--- /dev/null
+++ b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.cyclo
@@ -0,0 +1,66 @@
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:327:19:HAL_UART_Init 5
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:402:19:HAL_HalfDuplex_Init 5
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:477:19:HAL_LIN_Init 7
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:576:19:HAL_MultiProcessor_Init 6
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:652:19:HAL_UART_DeInit 2
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:699:13:HAL_UART_MspInit 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:714:13:HAL_UART_MspDeInit 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:1145:19:HAL_UART_Transmit 10
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:1235:19:HAL_UART_Receive 15
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:1319:19:HAL_UART_Transmit_IT 7
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:1402:19:HAL_UART_Receive_IT 7
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:1443:19:HAL_UART_Transmit_DMA 7
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:1513:19:HAL_UART_Receive_DMA 7
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:1549:19:HAL_UART_DMAPause 9
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:1579:19:HAL_UART_DMAResume 8
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:1610:19:HAL_UART_DMAStop 13
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:1685:19:HAL_UART_Abort 15
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:1796:19:HAL_UART_AbortTransmit 7
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:1862:19:HAL_UART_AbortReceive 10
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:1936:19:HAL_UART_Abort_IT 18
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:2096:19:HAL_UART_AbortTransmit_IT 6
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:2193:19:HAL_UART_AbortReceive_IT 9
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:2291:6:HAL_UART_IRQHandler 54
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:2680:13:HAL_UART_TxCpltCallback 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:2695:13:HAL_UART_TxHalfCpltCallback 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:2710:13:HAL_UART_RxCpltCallback 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:2725:13:HAL_UART_RxHalfCpltCallback 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:2740:13:HAL_UART_ErrorCallback 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:2755:13:HAL_UART_AbortCpltCallback 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:2770:13:HAL_UART_AbortTransmitCpltCallback 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:2785:13:HAL_UART_AbortReceiveCpltCallback 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:2802:13:HAL_UARTEx_RxEventCallback 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:2850:6:HAL_UART_ReceiverTimeout_Config 2
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:2865:19:HAL_UART_EnableReceiverTimeout 4
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:2903:19:HAL_UART_DisableReceiverTimeout 4
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:2941:19:HAL_MultiProcessor_EnableMuteMode 3
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:2961:19:HAL_MultiProcessor_DisableMuteMode 3
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:2981:6:HAL_MultiProcessor_EnterMuteMode 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:2991:19:HAL_HalfDuplex_EnableTransmitter 4
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:3014:19:HAL_HalfDuplex_EnableReceiver 4
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:3038:19:HAL_LIN_SendBreak 2
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:3083:23:HAL_UART_GetState 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:3099:10:HAL_UART_GetError 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:3147:19:UART_SetConfig 67
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:3402:6:UART_AdvFeatureConfig 10
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:3476:19:UART_CheckIdleState 8
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:3553:19:UART_WaitOnFlagUntilTimeout 10
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:3621:19:UART_Start_Receive_IT 13
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:3715:19:UART_Start_Receive_DMA 7
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:3772:13:UART_EndTxTransfer 2
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:3793:13:UART_EndRxTransfer 5
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:3824:13:UART_DMATransmitCplt 4
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:3858:13:UART_DMATxHalfCplt 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:3876:13:UART_DMAReceiveCplt 8
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:3937:13:UART_DMARxHalfCplt 2
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:3975:13:UART_DMAError 5
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:4015:13:UART_DMAAbortOnError 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:4038:13:UART_DMATxAbortCallback 3
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:4095:13:UART_DMARxAbortCallback 3
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:4147:13:UART_DMATxOnlyAbortCallback 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:4182:13:UART_DMARxOnlyAbortCallback 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:4215:13:UART_TxISR_8BIT 5
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:4248:13:UART_TxISR_16BIT 5
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:4367:13:UART_EndTransmit_IT 2
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:4392:13:UART_RxISR_8BIT 11
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:4487:13:UART_RxISR_16BIT 11
diff --git a/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.d b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.d
new file mode 100644
index 0000000..7cc6fec
--- /dev/null
+++ b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.d
@@ -0,0 +1,72 @@
+Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.o: \
+ ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h \
+ ../Core/Inc/stm32l4xx_hal_conf.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l475xx.h \
+ ../Drivers/CMSIS/Include/core_cm4.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dfsdm.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_usb.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_qspi.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:
+../Core/Inc/stm32l4xx_hal_conf.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l475xx.h:
+../Drivers/CMSIS/Include/core_cm4.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dfsdm.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_usb.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_qspi.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h:
diff --git a/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.o b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.o
new file mode 100644
index 0000000..5be1210
Binary files /dev/null and b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.o differ
diff --git a/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.su b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.su
new file mode 100644
index 0000000..c999c11
--- /dev/null
+++ b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.su
@@ -0,0 +1,66 @@
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:327:19:HAL_UART_Init 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:402:19:HAL_HalfDuplex_Init 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:477:19:HAL_LIN_Init 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:576:19:HAL_MultiProcessor_Init 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:652:19:HAL_UART_DeInit 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:699:13:HAL_UART_MspInit 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:714:13:HAL_UART_MspDeInit 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:1145:19:HAL_UART_Transmit 48 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:1235:19:HAL_UART_Receive 48 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:1319:19:HAL_UART_Transmit_IT 48 static,ignoring_inline_asm
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:1402:19:HAL_UART_Receive_IT 48 static,ignoring_inline_asm
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:1443:19:HAL_UART_Transmit_DMA 48 static,ignoring_inline_asm
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:1513:19:HAL_UART_Receive_DMA 48 static,ignoring_inline_asm
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:1549:19:HAL_UART_DMAPause 120 static,ignoring_inline_asm
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:1579:19:HAL_UART_DMAResume 112 static,ignoring_inline_asm
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:1610:19:HAL_UART_DMAStop 72 static,ignoring_inline_asm
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:1685:19:HAL_UART_Abort 136 static,ignoring_inline_asm
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:1796:19:HAL_UART_AbortTransmit 64 static,ignoring_inline_asm
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:1862:19:HAL_UART_AbortReceive 112 static,ignoring_inline_asm
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:1936:19:HAL_UART_Abort_IT 144 static,ignoring_inline_asm
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:2096:19:HAL_UART_AbortTransmit_IT 64 static,ignoring_inline_asm
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:2193:19:HAL_UART_AbortReceive_IT 112 static,ignoring_inline_asm
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:2291:6:HAL_UART_IRQHandler 240 static,ignoring_inline_asm
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:2680:13:HAL_UART_TxCpltCallback 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:2695:13:HAL_UART_TxHalfCpltCallback 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:2710:13:HAL_UART_RxCpltCallback 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:2725:13:HAL_UART_RxHalfCpltCallback 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:2740:13:HAL_UART_ErrorCallback 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:2755:13:HAL_UART_AbortCpltCallback 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:2770:13:HAL_UART_AbortTransmitCpltCallback 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:2785:13:HAL_UART_AbortReceiveCpltCallback 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:2802:13:HAL_UARTEx_RxEventCallback 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:2850:6:HAL_UART_ReceiverTimeout_Config 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:2865:19:HAL_UART_EnableReceiverTimeout 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:2903:19:HAL_UART_DisableReceiverTimeout 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:2941:19:HAL_MultiProcessor_EnableMuteMode 40 static,ignoring_inline_asm
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:2961:19:HAL_MultiProcessor_DisableMuteMode 40 static,ignoring_inline_asm
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:2981:6:HAL_MultiProcessor_EnterMuteMode 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:2991:19:HAL_HalfDuplex_EnableTransmitter 64 static,ignoring_inline_asm
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:3014:19:HAL_HalfDuplex_EnableReceiver 64 static,ignoring_inline_asm
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:3038:19:HAL_LIN_SendBreak 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:3083:23:HAL_UART_GetState 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:3099:10:HAL_UART_GetError 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:3147:19:UART_SetConfig 72 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:3402:6:UART_AdvFeatureConfig 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:3476:19:UART_CheckIdleState 104 static,ignoring_inline_asm
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:3553:19:UART_WaitOnFlagUntilTimeout 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:3621:19:UART_Start_Receive_IT 96 static,ignoring_inline_asm
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:3715:19:UART_Start_Receive_DMA 96 static,ignoring_inline_asm
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:3772:13:UART_EndTxTransfer 40 static,ignoring_inline_asm
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:3793:13:UART_EndRxTransfer 88 static,ignoring_inline_asm
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:3824:13:UART_DMATransmitCplt 72 static,ignoring_inline_asm
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:3858:13:UART_DMATxHalfCplt 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:3876:13:UART_DMAReceiveCplt 120 static,ignoring_inline_asm
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:3937:13:UART_DMARxHalfCplt 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:3975:13:UART_DMAError 32 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:4015:13:UART_DMAAbortOnError 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:4038:13:UART_DMATxAbortCallback 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:4095:13:UART_DMARxAbortCallback 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:4147:13:UART_DMATxOnlyAbortCallback 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:4182:13:UART_DMARxOnlyAbortCallback 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:4215:13:UART_TxISR_8BIT 64 static,ignoring_inline_asm
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:4248:13:UART_TxISR_16BIT 72 static,ignoring_inline_asm
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:4367:13:UART_EndTransmit_IT 40 static,ignoring_inline_asm
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:4392:13:UART_RxISR_8BIT 120 static,ignoring_inline_asm
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c:4487:13:UART_RxISR_16BIT 120 static,ignoring_inline_asm
diff --git a/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart_ex.cyclo b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart_ex.cyclo
new file mode 100644
index 0000000..56d26d4
--- /dev/null
+++ b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart_ex.cyclo
@@ -0,0 +1,13 @@
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart_ex.c:170:19:HAL_RS485Ex_Init 5
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart_ex.c:278:13:HAL_UARTEx_WakeupCallback 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart_ex.c:394:19:HAL_UARTEx_EnableClockStopMode 3
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart_ex.c:413:19:HAL_UARTEx_DisableClockStopMode 3
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart_ex.c:441:19:HAL_MultiProcessorEx_AddressLength_Set 2
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart_ex.c:479:19:HAL_UARTEx_StopModeWakeUpSourceConfig 4
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart_ex.c:534:19:HAL_UARTEx_EnableStopMode 3
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart_ex.c:553:19:HAL_UARTEx_DisableStopMode 3
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart_ex.c:767:19:HAL_UARTEx_ReceiveToIdle 20
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart_ex.c:890:19:HAL_UARTEx_ReceiveToIdle_IT 6
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart_ex.c:947:19:HAL_UARTEx_ReceiveToIdle_DMA 7
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart_ex.c:1015:29:HAL_UARTEx_GetRxEventType 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart_ex.c:1039:13:UARTEx_Wakeup_AddressConfig 1
diff --git a/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart_ex.d b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart_ex.d
new file mode 100644
index 0000000..8483294
--- /dev/null
+++ b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart_ex.d
@@ -0,0 +1,72 @@
+Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart_ex.o: \
+ ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart_ex.c \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h \
+ ../Core/Inc/stm32l4xx_hal_conf.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l475xx.h \
+ ../Drivers/CMSIS/Include/core_cm4.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dfsdm.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_usb.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_qspi.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:
+../Core/Inc/stm32l4xx_hal_conf.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l475xx.h:
+../Drivers/CMSIS/Include/core_cm4.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dfsdm.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_usb.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_qspi.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h:
diff --git a/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart_ex.o b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart_ex.o
new file mode 100644
index 0000000..e1b5591
Binary files /dev/null and b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart_ex.o differ
diff --git a/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart_ex.su b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart_ex.su
new file mode 100644
index 0000000..d9b61fe
--- /dev/null
+++ b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart_ex.su
@@ -0,0 +1,13 @@
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart_ex.c:170:19:HAL_RS485Ex_Init 32 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart_ex.c:278:13:HAL_UARTEx_WakeupCallback 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart_ex.c:394:19:HAL_UARTEx_EnableClockStopMode 40 static,ignoring_inline_asm
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart_ex.c:413:19:HAL_UARTEx_DisableClockStopMode 40 static,ignoring_inline_asm
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart_ex.c:441:19:HAL_MultiProcessorEx_AddressLength_Set 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart_ex.c:479:19:HAL_UARTEx_StopModeWakeUpSourceConfig 40 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart_ex.c:534:19:HAL_UARTEx_EnableStopMode 40 static,ignoring_inline_asm
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart_ex.c:553:19:HAL_UARTEx_DisableStopMode 40 static,ignoring_inline_asm
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart_ex.c:767:19:HAL_UARTEx_ReceiveToIdle 40 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart_ex.c:890:19:HAL_UARTEx_ReceiveToIdle_IT 56 static,ignoring_inline_asm
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart_ex.c:947:19:HAL_UARTEx_ReceiveToIdle_DMA 56 static,ignoring_inline_asm
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart_ex.c:1015:29:HAL_UARTEx_GetRxEventType 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart_ex.c:1039:13:UARTEx_Wakeup_AddressConfig 24 static
diff --git a/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.cyclo b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.cyclo
new file mode 100644
index 0000000..ea12056
--- /dev/null
+++ b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.cyclo
@@ -0,0 +1,49 @@
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c:83:19:USB_CoreInit 2
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c:114:19:USB_SetTurnaroundTime 20
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c:193:19:USB_EnableGlobalInt 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c:205:19:USB_DisableGlobalInt 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c:220:19:USB_SetCurrentMode 8
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c:267:19:USB_DevInit 13
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c:400:19:USB_FlushTxFifo 5
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c:437:19:USB_FlushRxFifo 5
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c:478:19:USB_SetDevSpeed 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c:493:9:USB_GetDevSpeed 3
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c:518:19:USB_ActivateEndpoint 4
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c:556:19:USB_ActivateDedicatedEndpoint 4
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c:595:19:USB_DeactivateEndpoint 4
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c:642:19:USB_DeactivateDedicatedEndpoint 4
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c:680:19:USB_EPStartXfer 14
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c:818:19:USB_EPStopXfer 8
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c:878:19:USB_WritePacket 2
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c:906:7:USB_ReadPacket 4
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c:948:19:USB_EPSetStall 6
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c:979:19:USB_EPClearStall 6
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c:1008:19:USB_StopDevice 4
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c:1049:19:USB_SetDevAddress 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c:1064:19:USB_DevConnect 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c:1081:19:USB_DevDisconnect 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c:1098:10:USB_ReadInterrupts 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c:1114:10:USB_ReadChInterrupts 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c:1130:10:USB_ReadDevAllOutEpInterrupt 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c:1146:10:USB_ReadDevAllInEpInterrupt 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c:1164:10:USB_ReadDevOutEPInterrupt 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c:1182:10:USB_ReadDevInEPInterrupt 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c:1203:7:USB_ClearInterrupts 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c:1216:10:USB_GetMode 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c:1226:19:USB_ActivateSetup 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c:1244:19:USB_EP0_OutStart 3
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c:1271:26:USB_CoreReset 5
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c:1311:19:USB_HostInit 4
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c:1378:19:USB_InitFSLSPClkSel 3
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c:1408:19:USB_ResetPort 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c:1435:19:USB_DriveVbus 5
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c:1464:10:USB_GetHostSpeed 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c:1478:10:USB_GetCurrentFrame 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c:1508:19:USB_HC_Init 12
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c:1623:19:USB_HC_StartXfer 11
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c:1733:10:USB_HC_ReadInterrupt 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c:1747:19:USB_HC_Halt 15
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c:1831:19:USB_DoPing 1
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c:1855:19:USB_StopHost 7
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c:1920:19:USB_ActivateRemoteWakeup 2
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c:1938:19:USB_DeActivateRemoteWakeup 1
diff --git a/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.d b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.d
new file mode 100644
index 0000000..632d1a4
--- /dev/null
+++ b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.d
@@ -0,0 +1,72 @@
+Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.o: \
+ ../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h \
+ ../Core/Inc/stm32l4xx_hal_conf.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l475xx.h \
+ ../Drivers/CMSIS/Include/core_cm4.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dfsdm.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_usb.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_qspi.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi_ex.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h \
+ ../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h:
+../Core/Inc/stm32l4xx_hal_conf.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l4xx.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/stm32l475xx.h:
+../Drivers/CMSIS/Include/core_cm4.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_rcc_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_gpio_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dma.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_dfsdm.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_cortex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_exti.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_usb.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pcd_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_pwr_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_qspi.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_spi_ex.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart.h:
+../Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_uart_ex.h:
diff --git a/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.o b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.o
new file mode 100644
index 0000000..35db2e3
Binary files /dev/null and b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.o differ
diff --git a/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.su b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.su
new file mode 100644
index 0000000..706f5f8
--- /dev/null
+++ b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.su
@@ -0,0 +1,49 @@
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c:83:19:USB_CoreInit 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c:114:19:USB_SetTurnaroundTime 32 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c:193:19:USB_EnableGlobalInt 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c:205:19:USB_DisableGlobalInt 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c:220:19:USB_SetCurrentMode 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c:267:19:USB_DevInit 32 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c:400:19:USB_FlushTxFifo 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c:437:19:USB_FlushRxFifo 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c:478:19:USB_SetDevSpeed 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c:493:9:USB_GetDevSpeed 32 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c:518:19:USB_ActivateEndpoint 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c:556:19:USB_ActivateDedicatedEndpoint 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c:595:19:USB_DeactivateEndpoint 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c:642:19:USB_DeactivateDedicatedEndpoint 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c:680:19:USB_EPStartXfer 32 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c:818:19:USB_EPStopXfer 32 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c:878:19:USB_WritePacket 40 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c:906:7:USB_ReadPacket 48 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c:948:19:USB_EPSetStall 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c:979:19:USB_EPClearStall 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c:1008:19:USB_StopDevice 32 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c:1049:19:USB_SetDevAddress 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c:1064:19:USB_DevConnect 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c:1081:19:USB_DevDisconnect 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c:1098:10:USB_ReadInterrupts 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c:1114:10:USB_ReadChInterrupts 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c:1130:10:USB_ReadDevAllOutEpInterrupt 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c:1146:10:USB_ReadDevAllInEpInterrupt 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c:1164:10:USB_ReadDevOutEPInterrupt 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c:1182:10:USB_ReadDevInEPInterrupt 32 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c:1203:7:USB_ClearInterrupts 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c:1216:10:USB_GetMode 16 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c:1226:19:USB_ActivateSetup 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c:1244:19:USB_EP0_OutStart 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c:1271:26:USB_CoreReset 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c:1311:19:USB_HostInit 32 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c:1378:19:USB_InitFSLSPClkSel 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c:1408:19:USB_ResetPort 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c:1435:19:USB_DriveVbus 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c:1464:10:USB_GetHostSpeed 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c:1478:10:USB_GetCurrentFrame 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c:1508:19:USB_HC_Init 40 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c:1623:19:USB_HC_StartXfer 40 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c:1733:10:USB_HC_ReadInterrupt 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c:1747:19:USB_HC_Halt 40 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c:1831:19:USB_DoPing 32 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c:1855:19:USB_StopHost 40 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c:1920:19:USB_ActivateRemoteWakeup 24 static
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c:1938:19:USB_DeActivateRemoteWakeup 24 static
diff --git a/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/subdir.mk b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/subdir.mk
new file mode 100644
index 0000000..af335ae
--- /dev/null
+++ b/P3_SETR2/Debug/Drivers/STM32L4xx_HAL_Driver/Src/subdir.mk
@@ -0,0 +1,96 @@
+################################################################################
+# Automatically-generated file. Do not edit!
+# Toolchain: GNU Tools for STM32 (13.3.rel1)
+################################################################################
+
+# Add inputs and outputs from these tool invocations to the build variables
+C_SRCS += \
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c \
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c \
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.c \
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c \
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c \
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.c \
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c \
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c \
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c \
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c \
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c \
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c \
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.c \
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd_ex.c \
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c \
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c \
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.c \
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c \
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c \
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.c \
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi_ex.c \
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c \
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart_ex.c \
+../Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.c
+
+OBJS += \
+./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.o \
+./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.o \
+./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.o \
+./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.o \
+./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.o \
+./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.o \
+./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.o \
+./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.o \
+./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.o \
+./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.o \
+./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.o \
+./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.o \
+./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.o \
+./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd_ex.o \
+./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.o \
+./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.o \
+./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.o \
+./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.o \
+./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.o \
+./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.o \
+./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi_ex.o \
+./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.o \
+./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart_ex.o \
+./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.o
+
+C_DEPS += \
+./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.d \
+./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.d \
+./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.d \
+./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.d \
+./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.d \
+./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.d \
+./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.d \
+./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.d \
+./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.d \
+./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.d \
+./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.d \
+./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.d \
+./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.d \
+./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd_ex.d \
+./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.d \
+./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.d \
+./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.d \
+./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.d \
+./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.d \
+./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.d \
+./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi_ex.d \
+./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.d \
+./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart_ex.d \
+./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.d
+
+
+# Each subdirectory must supply rules for building sources it contributes
+Drivers/STM32L4xx_HAL_Driver/Src/%.o Drivers/STM32L4xx_HAL_Driver/Src/%.su Drivers/STM32L4xx_HAL_Driver/Src/%.cyclo: ../Drivers/STM32L4xx_HAL_Driver/Src/%.c Drivers/STM32L4xx_HAL_Driver/Src/subdir.mk
+ arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g -DDEBUG -DUSE_HAL_DRIVER -DSTM32L475xx -c -I../Core/Inc -I../Components -I../Drivers/STM32L4xx_HAL_Driver/Inc -I../BSP -I../Drivers/STM32L4xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32L4xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+
+clean: clean-Drivers-2f-STM32L4xx_HAL_Driver-2f-Src
+
+clean-Drivers-2f-STM32L4xx_HAL_Driver-2f-Src:
+ -$(RM) ./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.cyclo ./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.d ./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.o ./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.su ./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.cyclo ./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.d ./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.o ./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.su ./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.cyclo ./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.d ./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.o ./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dfsdm.su ./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.cyclo ./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.d ./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.o ./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.su ./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.cyclo ./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.d ./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.o ./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.su ./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.cyclo ./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.d ./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.o ./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_exti.su ./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.cyclo ./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.d ./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.o ./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.su ./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.cyclo ./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.d ./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.o ./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.su ./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.cyclo ./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.d ./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.o ./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.su ./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.cyclo ./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.d ./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.o ./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.su ./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.cyclo ./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.d ./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.o ./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.su ./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.cyclo ./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.d ./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.o ./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.su ./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.cyclo ./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.d ./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.o ./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd.su ./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd_ex.cyclo ./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd_ex.d ./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd_ex.o ./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pcd_ex.su ./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.cyclo ./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.d ./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.o ./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.su ./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.cyclo ./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.d ./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.o ./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.su ./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.cyclo ./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.d ./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.o ./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_qspi.su ./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.cyclo ./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.d ./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.o ./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.su ./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.cyclo ./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.d ./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.o ./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.su ./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.cyclo ./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.d ./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.o ./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi.su ./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi_ex.cyclo ./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi_ex.d ./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi_ex.o ./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_spi_ex.su ./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.cyclo ./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.d ./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.o ./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.su ./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart_ex.cyclo ./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart_ex.d ./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart_ex.o ./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart_ex.su ./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.cyclo ./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.d ./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.o ./Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_usb.su
+
+.PHONY: clean-Drivers-2f-STM32L4xx_HAL_Driver-2f-Src
+
diff --git a/P3_SETR2/Debug/P3_SETR2.elf b/P3_SETR2/Debug/P3_SETR2.elf
new file mode 100755
index 0000000..b940b07
Binary files /dev/null and b/P3_SETR2/Debug/P3_SETR2.elf differ
diff --git a/P3_SETR2/Debug/P3_SETR2.list b/P3_SETR2/Debug/P3_SETR2.list
new file mode 100644
index 0000000..2103b39
--- /dev/null
+++ b/P3_SETR2/Debug/P3_SETR2.list
@@ -0,0 +1,23898 @@
+
+P3_SETR2.elf: file format elf32-littlearm
+
+Sections:
+Idx Name Size VMA LMA File off Algn
+ 0 .isr_vector 00000188 08000000 08000000 00001000 2**0
+ CONTENTS, ALLOC, LOAD, READONLY, DATA
+ 1 .text 00009e10 08000190 08000190 00001190 2**4
+ CONTENTS, ALLOC, LOAD, READONLY, CODE
+ 2 .rodata 000004f4 08009fa0 08009fa0 0000afa0 2**3
+ CONTENTS, ALLOC, LOAD, READONLY, DATA
+ 3 .ARM.extab 00000000 0800a494 0800a494 0000c298 2**0
+ CONTENTS, READONLY
+ 4 .ARM 00000008 0800a494 0800a494 0000b494 2**2
+ CONTENTS, ALLOC, LOAD, READONLY, DATA
+ 5 .preinit_array 00000000 0800a49c 0800a49c 0000c298 2**0
+ CONTENTS, ALLOC, LOAD, DATA
+ 6 .init_array 00000004 0800a49c 0800a49c 0000b49c 2**2
+ CONTENTS, ALLOC, LOAD, READONLY, DATA
+ 7 .fini_array 00000004 0800a4a0 0800a4a0 0000b4a0 2**2
+ CONTENTS, ALLOC, LOAD, READONLY, DATA
+ 8 .data 00000298 20000000 0800a4a4 0000c000 2**2
+ CONTENTS, ALLOC, LOAD, DATA
+ 9 .bss 0000092c 20000298 0800a73c 0000c298 2**2
+ ALLOC
+ 10 ._user_heap_stack 00000604 20000bc4 0800a73c 0000cbc4 2**0
+ ALLOC
+ 11 .ARM.attributes 00000030 00000000 00000000 0000c298 2**0
+ CONTENTS, READONLY
+ 12 .debug_info 0001bd49 00000000 00000000 0000c2c8 2**0
+ CONTENTS, READONLY, DEBUGGING, OCTETS
+ 13 .debug_abbrev 0000459b 00000000 00000000 00028011 2**0
+ CONTENTS, READONLY, DEBUGGING, OCTETS
+ 14 .debug_aranges 00001a80 00000000 00000000 0002c5b0 2**3
+ CONTENTS, READONLY, DEBUGGING, OCTETS
+ 15 .debug_rnglists 00001421 00000000 00000000 0002e030 2**0
+ CONTENTS, READONLY, DEBUGGING, OCTETS
+ 16 .debug_line 00015bdc 00000000 00000000 0002f451 2**0
+ CONTENTS, READONLY, DEBUGGING, OCTETS
+ 17 .debug_str 00007ba7 00000000 00000000 0004502d 2**0
+ CONTENTS, READONLY, DEBUGGING, OCTETS
+ 18 .comment 00000043 00000000 00000000 0004cbd4 2**0
+ CONTENTS, READONLY
+ 19 .debug_frame 00007c44 00000000 00000000 0004cc18 2**2
+ CONTENTS, READONLY, DEBUGGING, OCTETS
+ 20 .debug_line_str 0000005f 00000000 00000000 0005485c 2**0
+ CONTENTS, READONLY, DEBUGGING, OCTETS
+
+Disassembly of section .text:
+
+08000190 <__do_global_dtors_aux>:
+ 8000190: b510 push {r4, lr}
+ 8000192: 4c05 ldr r4, [pc, #20] @ (80001a8 <__do_global_dtors_aux+0x18>)
+ 8000194: 7823 ldrb r3, [r4, #0]
+ 8000196: b933 cbnz r3, 80001a6 <__do_global_dtors_aux+0x16>
+ 8000198: 4b04 ldr r3, [pc, #16] @ (80001ac <__do_global_dtors_aux+0x1c>)
+ 800019a: b113 cbz r3, 80001a2 <__do_global_dtors_aux+0x12>
+ 800019c: 4804 ldr r0, [pc, #16] @ (80001b0 <__do_global_dtors_aux+0x20>)
+ 800019e: f3af 8000 nop.w
+ 80001a2: 2301 movs r3, #1
+ 80001a4: 7023 strb r3, [r4, #0]
+ 80001a6: bd10 pop {r4, pc}
+ 80001a8: 20000298 .word 0x20000298
+ 80001ac: 00000000 .word 0x00000000
+ 80001b0: 08009f88 .word 0x08009f88
+
+080001b4 :
+ 80001b4: b508 push {r3, lr}
+ 80001b6: 4b03 ldr r3, [pc, #12] @ (80001c4 )
+ 80001b8: b11b cbz r3, 80001c2
+ 80001ba: 4903 ldr r1, [pc, #12] @ (80001c8 )
+ 80001bc: 4803 ldr r0, [pc, #12] @ (80001cc )
+ 80001be: f3af 8000 nop.w
+ 80001c2: bd08 pop {r3, pc}
+ 80001c4: 00000000 .word 0x00000000
+ 80001c8: 2000029c .word 0x2000029c
+ 80001cc: 08009f88 .word 0x08009f88
+
+080001d0 :
+ 80001d0: f001 01ff and.w r1, r1, #255 @ 0xff
+ 80001d4: 2a10 cmp r2, #16
+ 80001d6: db2b blt.n 8000230
+ 80001d8: f010 0f07 tst.w r0, #7
+ 80001dc: d008 beq.n 80001f0
+ 80001de: f810 3b01 ldrb.w r3, [r0], #1
+ 80001e2: 3a01 subs r2, #1
+ 80001e4: 428b cmp r3, r1
+ 80001e6: d02d beq.n 8000244
+ 80001e8: f010 0f07 tst.w r0, #7
+ 80001ec: b342 cbz r2, 8000240
+ 80001ee: d1f6 bne.n 80001de
+ 80001f0: b4f0 push {r4, r5, r6, r7}
+ 80001f2: ea41 2101 orr.w r1, r1, r1, lsl #8
+ 80001f6: ea41 4101 orr.w r1, r1, r1, lsl #16
+ 80001fa: f022 0407 bic.w r4, r2, #7
+ 80001fe: f07f 0700 mvns.w r7, #0
+ 8000202: 2300 movs r3, #0
+ 8000204: e8f0 5602 ldrd r5, r6, [r0], #8
+ 8000208: 3c08 subs r4, #8
+ 800020a: ea85 0501 eor.w r5, r5, r1
+ 800020e: ea86 0601 eor.w r6, r6, r1
+ 8000212: fa85 f547 uadd8 r5, r5, r7
+ 8000216: faa3 f587 sel r5, r3, r7
+ 800021a: fa86 f647 uadd8 r6, r6, r7
+ 800021e: faa5 f687 sel r6, r5, r7
+ 8000222: b98e cbnz r6, 8000248
+ 8000224: d1ee bne.n 8000204
+ 8000226: bcf0 pop {r4, r5, r6, r7}
+ 8000228: f001 01ff and.w r1, r1, #255 @ 0xff
+ 800022c: f002 0207 and.w r2, r2, #7
+ 8000230: b132 cbz r2, 8000240
+ 8000232: f810 3b01 ldrb.w r3, [r0], #1
+ 8000236: 3a01 subs r2, #1
+ 8000238: ea83 0301 eor.w r3, r3, r1
+ 800023c: b113 cbz r3, 8000244
+ 800023e: d1f8 bne.n 8000232
+ 8000240: 2000 movs r0, #0
+ 8000242: 4770 bx lr
+ 8000244: 3801 subs r0, #1
+ 8000246: 4770 bx lr
+ 8000248: 2d00 cmp r5, #0
+ 800024a: bf06 itte eq
+ 800024c: 4635 moveq r5, r6
+ 800024e: 3803 subeq r0, #3
+ 8000250: 3807 subne r0, #7
+ 8000252: f015 0f01 tst.w r5, #1
+ 8000256: d107 bne.n 8000268
+ 8000258: 3001 adds r0, #1
+ 800025a: f415 7f80 tst.w r5, #256 @ 0x100
+ 800025e: bf02 ittt eq
+ 8000260: 3001 addeq r0, #1
+ 8000262: f415 3fc0 tsteq.w r5, #98304 @ 0x18000
+ 8000266: 3001 addeq r0, #1
+ 8000268: bcf0 pop {r4, r5, r6, r7}
+ 800026a: 3801 subs r0, #1
+ 800026c: 4770 bx lr
+ 800026e: bf00 nop
+
+08000270 :
+ 8000270: 4603 mov r3, r0
+ 8000272: f813 2b01 ldrb.w r2, [r3], #1
+ 8000276: 2a00 cmp r2, #0
+ 8000278: d1fb bne.n 8000272
+ 800027a: 1a18 subs r0, r3, r0
+ 800027c: 3801 subs r0, #1
+ 800027e: 4770 bx lr
+
+08000280 <__aeabi_drsub>:
+ 8000280: f081 4100 eor.w r1, r1, #2147483648 @ 0x80000000
+ 8000284: e002 b.n 800028c <__adddf3>
+ 8000286: bf00 nop
+
+08000288 <__aeabi_dsub>:
+ 8000288: f083 4300 eor.w r3, r3, #2147483648 @ 0x80000000
+
+0800028c <__adddf3>:
+ 800028c: b530 push {r4, r5, lr}
+ 800028e: ea4f 0441 mov.w r4, r1, lsl #1
+ 8000292: ea4f 0543 mov.w r5, r3, lsl #1
+ 8000296: ea94 0f05 teq r4, r5
+ 800029a: bf08 it eq
+ 800029c: ea90 0f02 teqeq r0, r2
+ 80002a0: bf1f itttt ne
+ 80002a2: ea54 0c00 orrsne.w ip, r4, r0
+ 80002a6: ea55 0c02 orrsne.w ip, r5, r2
+ 80002aa: ea7f 5c64 mvnsne.w ip, r4, asr #21
+ 80002ae: ea7f 5c65 mvnsne.w ip, r5, asr #21
+ 80002b2: f000 80e2 beq.w 800047a <__adddf3+0x1ee>
+ 80002b6: ea4f 5454 mov.w r4, r4, lsr #21
+ 80002ba: ebd4 5555 rsbs r5, r4, r5, lsr #21
+ 80002be: bfb8 it lt
+ 80002c0: 426d neglt r5, r5
+ 80002c2: dd0c ble.n 80002de <__adddf3+0x52>
+ 80002c4: 442c add r4, r5
+ 80002c6: ea80 0202 eor.w r2, r0, r2
+ 80002ca: ea81 0303 eor.w r3, r1, r3
+ 80002ce: ea82 0000 eor.w r0, r2, r0
+ 80002d2: ea83 0101 eor.w r1, r3, r1
+ 80002d6: ea80 0202 eor.w r2, r0, r2
+ 80002da: ea81 0303 eor.w r3, r1, r3
+ 80002de: 2d36 cmp r5, #54 @ 0x36
+ 80002e0: bf88 it hi
+ 80002e2: bd30 pophi {r4, r5, pc}
+ 80002e4: f011 4f00 tst.w r1, #2147483648 @ 0x80000000
+ 80002e8: ea4f 3101 mov.w r1, r1, lsl #12
+ 80002ec: f44f 1c80 mov.w ip, #1048576 @ 0x100000
+ 80002f0: ea4c 3111 orr.w r1, ip, r1, lsr #12
+ 80002f4: d002 beq.n 80002fc <__adddf3+0x70>
+ 80002f6: 4240 negs r0, r0
+ 80002f8: eb61 0141 sbc.w r1, r1, r1, lsl #1
+ 80002fc: f013 4f00 tst.w r3, #2147483648 @ 0x80000000
+ 8000300: ea4f 3303 mov.w r3, r3, lsl #12
+ 8000304: ea4c 3313 orr.w r3, ip, r3, lsr #12
+ 8000308: d002 beq.n 8000310 <__adddf3+0x84>
+ 800030a: 4252 negs r2, r2
+ 800030c: eb63 0343 sbc.w r3, r3, r3, lsl #1
+ 8000310: ea94 0f05 teq r4, r5
+ 8000314: f000 80a7 beq.w 8000466 <__adddf3+0x1da>
+ 8000318: f1a4 0401 sub.w r4, r4, #1
+ 800031c: f1d5 0e20 rsbs lr, r5, #32
+ 8000320: db0d blt.n 800033e <__adddf3+0xb2>
+ 8000322: fa02 fc0e lsl.w ip, r2, lr
+ 8000326: fa22 f205 lsr.w r2, r2, r5
+ 800032a: 1880 adds r0, r0, r2
+ 800032c: f141 0100 adc.w r1, r1, #0
+ 8000330: fa03 f20e lsl.w r2, r3, lr
+ 8000334: 1880 adds r0, r0, r2
+ 8000336: fa43 f305 asr.w r3, r3, r5
+ 800033a: 4159 adcs r1, r3
+ 800033c: e00e b.n 800035c <__adddf3+0xd0>
+ 800033e: f1a5 0520 sub.w r5, r5, #32
+ 8000342: f10e 0e20 add.w lr, lr, #32
+ 8000346: 2a01 cmp r2, #1
+ 8000348: fa03 fc0e lsl.w ip, r3, lr
+ 800034c: bf28 it cs
+ 800034e: f04c 0c02 orrcs.w ip, ip, #2
+ 8000352: fa43 f305 asr.w r3, r3, r5
+ 8000356: 18c0 adds r0, r0, r3
+ 8000358: eb51 71e3 adcs.w r1, r1, r3, asr #31
+ 800035c: f001 4500 and.w r5, r1, #2147483648 @ 0x80000000
+ 8000360: d507 bpl.n 8000372 <__adddf3+0xe6>
+ 8000362: f04f 0e00 mov.w lr, #0
+ 8000366: f1dc 0c00 rsbs ip, ip, #0
+ 800036a: eb7e 0000 sbcs.w r0, lr, r0
+ 800036e: eb6e 0101 sbc.w r1, lr, r1
+ 8000372: f5b1 1f80 cmp.w r1, #1048576 @ 0x100000
+ 8000376: d31b bcc.n 80003b0 <__adddf3+0x124>
+ 8000378: f5b1 1f00 cmp.w r1, #2097152 @ 0x200000
+ 800037c: d30c bcc.n 8000398 <__adddf3+0x10c>
+ 800037e: 0849 lsrs r1, r1, #1
+ 8000380: ea5f 0030 movs.w r0, r0, rrx
+ 8000384: ea4f 0c3c mov.w ip, ip, rrx
+ 8000388: f104 0401 add.w r4, r4, #1
+ 800038c: ea4f 5244 mov.w r2, r4, lsl #21
+ 8000390: f512 0f80 cmn.w r2, #4194304 @ 0x400000
+ 8000394: f080 809a bcs.w 80004cc <__adddf3+0x240>
+ 8000398: f1bc 4f00 cmp.w ip, #2147483648 @ 0x80000000
+ 800039c: bf08 it eq
+ 800039e: ea5f 0c50 movseq.w ip, r0, lsr #1
+ 80003a2: f150 0000 adcs.w r0, r0, #0
+ 80003a6: eb41 5104 adc.w r1, r1, r4, lsl #20
+ 80003aa: ea41 0105 orr.w r1, r1, r5
+ 80003ae: bd30 pop {r4, r5, pc}
+ 80003b0: ea5f 0c4c movs.w ip, ip, lsl #1
+ 80003b4: 4140 adcs r0, r0
+ 80003b6: eb41 0101 adc.w r1, r1, r1
+ 80003ba: 3c01 subs r4, #1
+ 80003bc: bf28 it cs
+ 80003be: f5b1 1f80 cmpcs.w r1, #1048576 @ 0x100000
+ 80003c2: d2e9 bcs.n 8000398 <__adddf3+0x10c>
+ 80003c4: f091 0f00 teq r1, #0
+ 80003c8: bf04 itt eq
+ 80003ca: 4601 moveq r1, r0
+ 80003cc: 2000 moveq r0, #0
+ 80003ce: fab1 f381 clz r3, r1
+ 80003d2: bf08 it eq
+ 80003d4: 3320 addeq r3, #32
+ 80003d6: f1a3 030b sub.w r3, r3, #11
+ 80003da: f1b3 0220 subs.w r2, r3, #32
+ 80003de: da0c bge.n 80003fa <__adddf3+0x16e>
+ 80003e0: 320c adds r2, #12
+ 80003e2: dd08 ble.n 80003f6 <__adddf3+0x16a>
+ 80003e4: f102 0c14 add.w ip, r2, #20
+ 80003e8: f1c2 020c rsb r2, r2, #12
+ 80003ec: fa01 f00c lsl.w r0, r1, ip
+ 80003f0: fa21 f102 lsr.w r1, r1, r2
+ 80003f4: e00c b.n 8000410 <__adddf3+0x184>
+ 80003f6: f102 0214 add.w r2, r2, #20
+ 80003fa: bfd8 it le
+ 80003fc: f1c2 0c20 rsble ip, r2, #32
+ 8000400: fa01 f102 lsl.w r1, r1, r2
+ 8000404: fa20 fc0c lsr.w ip, r0, ip
+ 8000408: bfdc itt le
+ 800040a: ea41 010c orrle.w r1, r1, ip
+ 800040e: 4090 lslle r0, r2
+ 8000410: 1ae4 subs r4, r4, r3
+ 8000412: bfa2 ittt ge
+ 8000414: eb01 5104 addge.w r1, r1, r4, lsl #20
+ 8000418: 4329 orrge r1, r5
+ 800041a: bd30 popge {r4, r5, pc}
+ 800041c: ea6f 0404 mvn.w r4, r4
+ 8000420: 3c1f subs r4, #31
+ 8000422: da1c bge.n 800045e <__adddf3+0x1d2>
+ 8000424: 340c adds r4, #12
+ 8000426: dc0e bgt.n 8000446 <__adddf3+0x1ba>
+ 8000428: f104 0414 add.w r4, r4, #20
+ 800042c: f1c4 0220 rsb r2, r4, #32
+ 8000430: fa20 f004 lsr.w r0, r0, r4
+ 8000434: fa01 f302 lsl.w r3, r1, r2
+ 8000438: ea40 0003 orr.w r0, r0, r3
+ 800043c: fa21 f304 lsr.w r3, r1, r4
+ 8000440: ea45 0103 orr.w r1, r5, r3
+ 8000444: bd30 pop {r4, r5, pc}
+ 8000446: f1c4 040c rsb r4, r4, #12
+ 800044a: f1c4 0220 rsb r2, r4, #32
+ 800044e: fa20 f002 lsr.w r0, r0, r2
+ 8000452: fa01 f304 lsl.w r3, r1, r4
+ 8000456: ea40 0003 orr.w r0, r0, r3
+ 800045a: 4629 mov r1, r5
+ 800045c: bd30 pop {r4, r5, pc}
+ 800045e: fa21 f004 lsr.w r0, r1, r4
+ 8000462: 4629 mov r1, r5
+ 8000464: bd30 pop {r4, r5, pc}
+ 8000466: f094 0f00 teq r4, #0
+ 800046a: f483 1380 eor.w r3, r3, #1048576 @ 0x100000
+ 800046e: bf06 itte eq
+ 8000470: f481 1180 eoreq.w r1, r1, #1048576 @ 0x100000
+ 8000474: 3401 addeq r4, #1
+ 8000476: 3d01 subne r5, #1
+ 8000478: e74e b.n 8000318 <__adddf3+0x8c>
+ 800047a: ea7f 5c64 mvns.w ip, r4, asr #21
+ 800047e: bf18 it ne
+ 8000480: ea7f 5c65 mvnsne.w ip, r5, asr #21
+ 8000484: d029 beq.n 80004da <__adddf3+0x24e>
+ 8000486: ea94 0f05 teq r4, r5
+ 800048a: bf08 it eq
+ 800048c: ea90 0f02 teqeq r0, r2
+ 8000490: d005 beq.n 800049e <__adddf3+0x212>
+ 8000492: ea54 0c00 orrs.w ip, r4, r0
+ 8000496: bf04 itt eq
+ 8000498: 4619 moveq r1, r3
+ 800049a: 4610 moveq r0, r2
+ 800049c: bd30 pop {r4, r5, pc}
+ 800049e: ea91 0f03 teq r1, r3
+ 80004a2: bf1e ittt ne
+ 80004a4: 2100 movne r1, #0
+ 80004a6: 2000 movne r0, #0
+ 80004a8: bd30 popne {r4, r5, pc}
+ 80004aa: ea5f 5c54 movs.w ip, r4, lsr #21
+ 80004ae: d105 bne.n 80004bc <__adddf3+0x230>
+ 80004b0: 0040 lsls r0, r0, #1
+ 80004b2: 4149 adcs r1, r1
+ 80004b4: bf28 it cs
+ 80004b6: f041 4100 orrcs.w r1, r1, #2147483648 @ 0x80000000
+ 80004ba: bd30 pop {r4, r5, pc}
+ 80004bc: f514 0480 adds.w r4, r4, #4194304 @ 0x400000
+ 80004c0: bf3c itt cc
+ 80004c2: f501 1180 addcc.w r1, r1, #1048576 @ 0x100000
+ 80004c6: bd30 popcc {r4, r5, pc}
+ 80004c8: f001 4500 and.w r5, r1, #2147483648 @ 0x80000000
+ 80004cc: f045 41fe orr.w r1, r5, #2130706432 @ 0x7f000000
+ 80004d0: f441 0170 orr.w r1, r1, #15728640 @ 0xf00000
+ 80004d4: f04f 0000 mov.w r0, #0
+ 80004d8: bd30 pop {r4, r5, pc}
+ 80004da: ea7f 5c64 mvns.w ip, r4, asr #21
+ 80004de: bf1a itte ne
+ 80004e0: 4619 movne r1, r3
+ 80004e2: 4610 movne r0, r2
+ 80004e4: ea7f 5c65 mvnseq.w ip, r5, asr #21
+ 80004e8: bf1c itt ne
+ 80004ea: 460b movne r3, r1
+ 80004ec: 4602 movne r2, r0
+ 80004ee: ea50 3401 orrs.w r4, r0, r1, lsl #12
+ 80004f2: bf06 itte eq
+ 80004f4: ea52 3503 orrseq.w r5, r2, r3, lsl #12
+ 80004f8: ea91 0f03 teqeq r1, r3
+ 80004fc: f441 2100 orrne.w r1, r1, #524288 @ 0x80000
+ 8000500: bd30 pop {r4, r5, pc}
+ 8000502: bf00 nop
+
+08000504 <__aeabi_ui2d>:
+ 8000504: f090 0f00 teq r0, #0
+ 8000508: bf04 itt eq
+ 800050a: 2100 moveq r1, #0
+ 800050c: 4770 bxeq lr
+ 800050e: b530 push {r4, r5, lr}
+ 8000510: f44f 6480 mov.w r4, #1024 @ 0x400
+ 8000514: f104 0432 add.w r4, r4, #50 @ 0x32
+ 8000518: f04f 0500 mov.w r5, #0
+ 800051c: f04f 0100 mov.w r1, #0
+ 8000520: e750 b.n 80003c4 <__adddf3+0x138>
+ 8000522: bf00 nop
+
+08000524 <__aeabi_i2d>:
+ 8000524: f090 0f00 teq r0, #0
+ 8000528: bf04 itt eq
+ 800052a: 2100 moveq r1, #0
+ 800052c: 4770 bxeq lr
+ 800052e: b530 push {r4, r5, lr}
+ 8000530: f44f 6480 mov.w r4, #1024 @ 0x400
+ 8000534: f104 0432 add.w r4, r4, #50 @ 0x32
+ 8000538: f010 4500 ands.w r5, r0, #2147483648 @ 0x80000000
+ 800053c: bf48 it mi
+ 800053e: 4240 negmi r0, r0
+ 8000540: f04f 0100 mov.w r1, #0
+ 8000544: e73e b.n 80003c4 <__adddf3+0x138>
+ 8000546: bf00 nop
+
+08000548 <__aeabi_f2d>:
+ 8000548: 0042 lsls r2, r0, #1
+ 800054a: ea4f 01e2 mov.w r1, r2, asr #3
+ 800054e: ea4f 0131 mov.w r1, r1, rrx
+ 8000552: ea4f 7002 mov.w r0, r2, lsl #28
+ 8000556: bf1f itttt ne
+ 8000558: f012 437f andsne.w r3, r2, #4278190080 @ 0xff000000
+ 800055c: f093 4f7f teqne r3, #4278190080 @ 0xff000000
+ 8000560: f081 5160 eorne.w r1, r1, #939524096 @ 0x38000000
+ 8000564: 4770 bxne lr
+ 8000566: f032 427f bics.w r2, r2, #4278190080 @ 0xff000000
+ 800056a: bf08 it eq
+ 800056c: 4770 bxeq lr
+ 800056e: f093 4f7f teq r3, #4278190080 @ 0xff000000
+ 8000572: bf04 itt eq
+ 8000574: f441 2100 orreq.w r1, r1, #524288 @ 0x80000
+ 8000578: 4770 bxeq lr
+ 800057a: b530 push {r4, r5, lr}
+ 800057c: f44f 7460 mov.w r4, #896 @ 0x380
+ 8000580: f001 4500 and.w r5, r1, #2147483648 @ 0x80000000
+ 8000584: f021 4100 bic.w r1, r1, #2147483648 @ 0x80000000
+ 8000588: e71c b.n 80003c4 <__adddf3+0x138>
+ 800058a: bf00 nop
+
+0800058c <__aeabi_ul2d>:
+ 800058c: ea50 0201 orrs.w r2, r0, r1
+ 8000590: bf08 it eq
+ 8000592: 4770 bxeq lr
+ 8000594: b530 push {r4, r5, lr}
+ 8000596: f04f 0500 mov.w r5, #0
+ 800059a: e00a b.n 80005b2 <__aeabi_l2d+0x16>
+
+0800059c <__aeabi_l2d>:
+ 800059c: ea50 0201 orrs.w r2, r0, r1
+ 80005a0: bf08 it eq
+ 80005a2: 4770 bxeq lr
+ 80005a4: b530 push {r4, r5, lr}
+ 80005a6: f011 4500 ands.w r5, r1, #2147483648 @ 0x80000000
+ 80005aa: d502 bpl.n 80005b2 <__aeabi_l2d+0x16>
+ 80005ac: 4240 negs r0, r0
+ 80005ae: eb61 0141 sbc.w r1, r1, r1, lsl #1
+ 80005b2: f44f 6480 mov.w r4, #1024 @ 0x400
+ 80005b6: f104 0432 add.w r4, r4, #50 @ 0x32
+ 80005ba: ea5f 5c91 movs.w ip, r1, lsr #22
+ 80005be: f43f aed8 beq.w 8000372 <__adddf3+0xe6>
+ 80005c2: f04f 0203 mov.w r2, #3
+ 80005c6: ea5f 0cdc movs.w ip, ip, lsr #3
+ 80005ca: bf18 it ne
+ 80005cc: 3203 addne r2, #3
+ 80005ce: ea5f 0cdc movs.w ip, ip, lsr #3
+ 80005d2: bf18 it ne
+ 80005d4: 3203 addne r2, #3
+ 80005d6: eb02 02dc add.w r2, r2, ip, lsr #3
+ 80005da: f1c2 0320 rsb r3, r2, #32
+ 80005de: fa00 fc03 lsl.w ip, r0, r3
+ 80005e2: fa20 f002 lsr.w r0, r0, r2
+ 80005e6: fa01 fe03 lsl.w lr, r1, r3
+ 80005ea: ea40 000e orr.w r0, r0, lr
+ 80005ee: fa21 f102 lsr.w r1, r1, r2
+ 80005f2: 4414 add r4, r2
+ 80005f4: e6bd b.n 8000372 <__adddf3+0xe6>
+ 80005f6: bf00 nop
+
+080005f8 <__aeabi_dmul>:
+ 80005f8: b570 push {r4, r5, r6, lr}
+ 80005fa: f04f 0cff mov.w ip, #255 @ 0xff
+ 80005fe: f44c 6ce0 orr.w ip, ip, #1792 @ 0x700
+ 8000602: ea1c 5411 ands.w r4, ip, r1, lsr #20
+ 8000606: bf1d ittte ne
+ 8000608: ea1c 5513 andsne.w r5, ip, r3, lsr #20
+ 800060c: ea94 0f0c teqne r4, ip
+ 8000610: ea95 0f0c teqne r5, ip
+ 8000614: f000 f8de bleq 80007d4 <__aeabi_dmul+0x1dc>
+ 8000618: 442c add r4, r5
+ 800061a: ea81 0603 eor.w r6, r1, r3
+ 800061e: ea21 514c bic.w r1, r1, ip, lsl #21
+ 8000622: ea23 534c bic.w r3, r3, ip, lsl #21
+ 8000626: ea50 3501 orrs.w r5, r0, r1, lsl #12
+ 800062a: bf18 it ne
+ 800062c: ea52 3503 orrsne.w r5, r2, r3, lsl #12
+ 8000630: f441 1180 orr.w r1, r1, #1048576 @ 0x100000
+ 8000634: f443 1380 orr.w r3, r3, #1048576 @ 0x100000
+ 8000638: d038 beq.n 80006ac <__aeabi_dmul+0xb4>
+ 800063a: fba0 ce02 umull ip, lr, r0, r2
+ 800063e: f04f 0500 mov.w r5, #0
+ 8000642: fbe1 e502 umlal lr, r5, r1, r2
+ 8000646: f006 4200 and.w r2, r6, #2147483648 @ 0x80000000
+ 800064a: fbe0 e503 umlal lr, r5, r0, r3
+ 800064e: f04f 0600 mov.w r6, #0
+ 8000652: fbe1 5603 umlal r5, r6, r1, r3
+ 8000656: f09c 0f00 teq ip, #0
+ 800065a: bf18 it ne
+ 800065c: f04e 0e01 orrne.w lr, lr, #1
+ 8000660: f1a4 04ff sub.w r4, r4, #255 @ 0xff
+ 8000664: f5b6 7f00 cmp.w r6, #512 @ 0x200
+ 8000668: f564 7440 sbc.w r4, r4, #768 @ 0x300
+ 800066c: d204 bcs.n 8000678 <__aeabi_dmul+0x80>
+ 800066e: ea5f 0e4e movs.w lr, lr, lsl #1
+ 8000672: 416d adcs r5, r5
+ 8000674: eb46 0606 adc.w r6, r6, r6
+ 8000678: ea42 21c6 orr.w r1, r2, r6, lsl #11
+ 800067c: ea41 5155 orr.w r1, r1, r5, lsr #21
+ 8000680: ea4f 20c5 mov.w r0, r5, lsl #11
+ 8000684: ea40 505e orr.w r0, r0, lr, lsr #21
+ 8000688: ea4f 2ece mov.w lr, lr, lsl #11
+ 800068c: f1b4 0cfd subs.w ip, r4, #253 @ 0xfd
+ 8000690: bf88 it hi
+ 8000692: f5bc 6fe0 cmphi.w ip, #1792 @ 0x700
+ 8000696: d81e bhi.n 80006d6 <__aeabi_dmul+0xde>
+ 8000698: f1be 4f00 cmp.w lr, #2147483648 @ 0x80000000
+ 800069c: bf08 it eq
+ 800069e: ea5f 0e50 movseq.w lr, r0, lsr #1
+ 80006a2: f150 0000 adcs.w r0, r0, #0
+ 80006a6: eb41 5104 adc.w r1, r1, r4, lsl #20
+ 80006aa: bd70 pop {r4, r5, r6, pc}
+ 80006ac: f006 4600 and.w r6, r6, #2147483648 @ 0x80000000
+ 80006b0: ea46 0101 orr.w r1, r6, r1
+ 80006b4: ea40 0002 orr.w r0, r0, r2
+ 80006b8: ea81 0103 eor.w r1, r1, r3
+ 80006bc: ebb4 045c subs.w r4, r4, ip, lsr #1
+ 80006c0: bfc2 ittt gt
+ 80006c2: ebd4 050c rsbsgt r5, r4, ip
+ 80006c6: ea41 5104 orrgt.w r1, r1, r4, lsl #20
+ 80006ca: bd70 popgt {r4, r5, r6, pc}
+ 80006cc: f441 1180 orr.w r1, r1, #1048576 @ 0x100000
+ 80006d0: f04f 0e00 mov.w lr, #0
+ 80006d4: 3c01 subs r4, #1
+ 80006d6: f300 80ab bgt.w 8000830 <__aeabi_dmul+0x238>
+ 80006da: f114 0f36 cmn.w r4, #54 @ 0x36
+ 80006de: bfde ittt le
+ 80006e0: 2000 movle r0, #0
+ 80006e2: f001 4100 andle.w r1, r1, #2147483648 @ 0x80000000
+ 80006e6: bd70 pople {r4, r5, r6, pc}
+ 80006e8: f1c4 0400 rsb r4, r4, #0
+ 80006ec: 3c20 subs r4, #32
+ 80006ee: da35 bge.n 800075c <__aeabi_dmul+0x164>
+ 80006f0: 340c adds r4, #12
+ 80006f2: dc1b bgt.n 800072c <__aeabi_dmul+0x134>
+ 80006f4: f104 0414 add.w r4, r4, #20
+ 80006f8: f1c4 0520 rsb r5, r4, #32
+ 80006fc: fa00 f305 lsl.w r3, r0, r5
+ 8000700: fa20 f004 lsr.w r0, r0, r4
+ 8000704: fa01 f205 lsl.w r2, r1, r5
+ 8000708: ea40 0002 orr.w r0, r0, r2
+ 800070c: f001 4200 and.w r2, r1, #2147483648 @ 0x80000000
+ 8000710: f021 4100 bic.w r1, r1, #2147483648 @ 0x80000000
+ 8000714: eb10 70d3 adds.w r0, r0, r3, lsr #31
+ 8000718: fa21 f604 lsr.w r6, r1, r4
+ 800071c: eb42 0106 adc.w r1, r2, r6
+ 8000720: ea5e 0e43 orrs.w lr, lr, r3, lsl #1
+ 8000724: bf08 it eq
+ 8000726: ea20 70d3 biceq.w r0, r0, r3, lsr #31
+ 800072a: bd70 pop {r4, r5, r6, pc}
+ 800072c: f1c4 040c rsb r4, r4, #12
+ 8000730: f1c4 0520 rsb r5, r4, #32
+ 8000734: fa00 f304 lsl.w r3, r0, r4
+ 8000738: fa20 f005 lsr.w r0, r0, r5
+ 800073c: fa01 f204 lsl.w r2, r1, r4
+ 8000740: ea40 0002 orr.w r0, r0, r2
+ 8000744: f001 4100 and.w r1, r1, #2147483648 @ 0x80000000
+ 8000748: eb10 70d3 adds.w r0, r0, r3, lsr #31
+ 800074c: f141 0100 adc.w r1, r1, #0
+ 8000750: ea5e 0e43 orrs.w lr, lr, r3, lsl #1
+ 8000754: bf08 it eq
+ 8000756: ea20 70d3 biceq.w r0, r0, r3, lsr #31
+ 800075a: bd70 pop {r4, r5, r6, pc}
+ 800075c: f1c4 0520 rsb r5, r4, #32
+ 8000760: fa00 f205 lsl.w r2, r0, r5
+ 8000764: ea4e 0e02 orr.w lr, lr, r2
+ 8000768: fa20 f304 lsr.w r3, r0, r4
+ 800076c: fa01 f205 lsl.w r2, r1, r5
+ 8000770: ea43 0302 orr.w r3, r3, r2
+ 8000774: fa21 f004 lsr.w r0, r1, r4
+ 8000778: f001 4100 and.w r1, r1, #2147483648 @ 0x80000000
+ 800077c: fa21 f204 lsr.w r2, r1, r4
+ 8000780: ea20 0002 bic.w r0, r0, r2
+ 8000784: eb00 70d3 add.w r0, r0, r3, lsr #31
+ 8000788: ea5e 0e43 orrs.w lr, lr, r3, lsl #1
+ 800078c: bf08 it eq
+ 800078e: ea20 70d3 biceq.w r0, r0, r3, lsr #31
+ 8000792: bd70 pop {r4, r5, r6, pc}
+ 8000794: f094 0f00 teq r4, #0
+ 8000798: d10f bne.n 80007ba <__aeabi_dmul+0x1c2>
+ 800079a: f001 4600 and.w r6, r1, #2147483648 @ 0x80000000
+ 800079e: 0040 lsls r0, r0, #1
+ 80007a0: eb41 0101 adc.w r1, r1, r1
+ 80007a4: f411 1f80 tst.w r1, #1048576 @ 0x100000
+ 80007a8: bf08 it eq
+ 80007aa: 3c01 subeq r4, #1
+ 80007ac: d0f7 beq.n 800079e <__aeabi_dmul+0x1a6>
+ 80007ae: ea41 0106 orr.w r1, r1, r6
+ 80007b2: f095 0f00 teq r5, #0
+ 80007b6: bf18 it ne
+ 80007b8: 4770 bxne lr
+ 80007ba: f003 4600 and.w r6, r3, #2147483648 @ 0x80000000
+ 80007be: 0052 lsls r2, r2, #1
+ 80007c0: eb43 0303 adc.w r3, r3, r3
+ 80007c4: f413 1f80 tst.w r3, #1048576 @ 0x100000
+ 80007c8: bf08 it eq
+ 80007ca: 3d01 subeq r5, #1
+ 80007cc: d0f7 beq.n 80007be <__aeabi_dmul+0x1c6>
+ 80007ce: ea43 0306 orr.w r3, r3, r6
+ 80007d2: 4770 bx lr
+ 80007d4: ea94 0f0c teq r4, ip
+ 80007d8: ea0c 5513 and.w r5, ip, r3, lsr #20
+ 80007dc: bf18 it ne
+ 80007de: ea95 0f0c teqne r5, ip
+ 80007e2: d00c beq.n 80007fe <__aeabi_dmul+0x206>
+ 80007e4: ea50 0641 orrs.w r6, r0, r1, lsl #1
+ 80007e8: bf18 it ne
+ 80007ea: ea52 0643 orrsne.w r6, r2, r3, lsl #1
+ 80007ee: d1d1 bne.n 8000794 <__aeabi_dmul+0x19c>
+ 80007f0: ea81 0103 eor.w r1, r1, r3
+ 80007f4: f001 4100 and.w r1, r1, #2147483648 @ 0x80000000
+ 80007f8: f04f 0000 mov.w r0, #0
+ 80007fc: bd70 pop {r4, r5, r6, pc}
+ 80007fe: ea50 0641 orrs.w r6, r0, r1, lsl #1
+ 8000802: bf06 itte eq
+ 8000804: 4610 moveq r0, r2
+ 8000806: 4619 moveq r1, r3
+ 8000808: ea52 0643 orrsne.w r6, r2, r3, lsl #1
+ 800080c: d019 beq.n 8000842 <__aeabi_dmul+0x24a>
+ 800080e: ea94 0f0c teq r4, ip
+ 8000812: d102 bne.n 800081a <__aeabi_dmul+0x222>
+ 8000814: ea50 3601 orrs.w r6, r0, r1, lsl #12
+ 8000818: d113 bne.n 8000842 <__aeabi_dmul+0x24a>
+ 800081a: ea95 0f0c teq r5, ip
+ 800081e: d105 bne.n 800082c <__aeabi_dmul+0x234>
+ 8000820: ea52 3603 orrs.w r6, r2, r3, lsl #12
+ 8000824: bf1c itt ne
+ 8000826: 4610 movne r0, r2
+ 8000828: 4619 movne r1, r3
+ 800082a: d10a bne.n 8000842 <__aeabi_dmul+0x24a>
+ 800082c: ea81 0103 eor.w r1, r1, r3
+ 8000830: f001 4100 and.w r1, r1, #2147483648 @ 0x80000000
+ 8000834: f041 41fe orr.w r1, r1, #2130706432 @ 0x7f000000
+ 8000838: f441 0170 orr.w r1, r1, #15728640 @ 0xf00000
+ 800083c: f04f 0000 mov.w r0, #0
+ 8000840: bd70 pop {r4, r5, r6, pc}
+ 8000842: f041 41fe orr.w r1, r1, #2130706432 @ 0x7f000000
+ 8000846: f441 0178 orr.w r1, r1, #16252928 @ 0xf80000
+ 800084a: bd70 pop {r4, r5, r6, pc}
+
+0800084c <__aeabi_ddiv>:
+ 800084c: b570 push {r4, r5, r6, lr}
+ 800084e: f04f 0cff mov.w ip, #255 @ 0xff
+ 8000852: f44c 6ce0 orr.w ip, ip, #1792 @ 0x700
+ 8000856: ea1c 5411 ands.w r4, ip, r1, lsr #20
+ 800085a: bf1d ittte ne
+ 800085c: ea1c 5513 andsne.w r5, ip, r3, lsr #20
+ 8000860: ea94 0f0c teqne r4, ip
+ 8000864: ea95 0f0c teqne r5, ip
+ 8000868: f000 f8a7 bleq 80009ba <__aeabi_ddiv+0x16e>
+ 800086c: eba4 0405 sub.w r4, r4, r5
+ 8000870: ea81 0e03 eor.w lr, r1, r3
+ 8000874: ea52 3503 orrs.w r5, r2, r3, lsl #12
+ 8000878: ea4f 3101 mov.w r1, r1, lsl #12
+ 800087c: f000 8088 beq.w 8000990 <__aeabi_ddiv+0x144>
+ 8000880: ea4f 3303 mov.w r3, r3, lsl #12
+ 8000884: f04f 5580 mov.w r5, #268435456 @ 0x10000000
+ 8000888: ea45 1313 orr.w r3, r5, r3, lsr #4
+ 800088c: ea43 6312 orr.w r3, r3, r2, lsr #24
+ 8000890: ea4f 2202 mov.w r2, r2, lsl #8
+ 8000894: ea45 1511 orr.w r5, r5, r1, lsr #4
+ 8000898: ea45 6510 orr.w r5, r5, r0, lsr #24
+ 800089c: ea4f 2600 mov.w r6, r0, lsl #8
+ 80008a0: f00e 4100 and.w r1, lr, #2147483648 @ 0x80000000
+ 80008a4: 429d cmp r5, r3
+ 80008a6: bf08 it eq
+ 80008a8: 4296 cmpeq r6, r2
+ 80008aa: f144 04fd adc.w r4, r4, #253 @ 0xfd
+ 80008ae: f504 7440 add.w r4, r4, #768 @ 0x300
+ 80008b2: d202 bcs.n 80008ba <__aeabi_ddiv+0x6e>
+ 80008b4: 085b lsrs r3, r3, #1
+ 80008b6: ea4f 0232 mov.w r2, r2, rrx
+ 80008ba: 1ab6 subs r6, r6, r2
+ 80008bc: eb65 0503 sbc.w r5, r5, r3
+ 80008c0: 085b lsrs r3, r3, #1
+ 80008c2: ea4f 0232 mov.w r2, r2, rrx
+ 80008c6: f44f 1080 mov.w r0, #1048576 @ 0x100000
+ 80008ca: f44f 2c00 mov.w ip, #524288 @ 0x80000
+ 80008ce: ebb6 0e02 subs.w lr, r6, r2
+ 80008d2: eb75 0e03 sbcs.w lr, r5, r3
+ 80008d6: bf22 ittt cs
+ 80008d8: 1ab6 subcs r6, r6, r2
+ 80008da: 4675 movcs r5, lr
+ 80008dc: ea40 000c orrcs.w r0, r0, ip
+ 80008e0: 085b lsrs r3, r3, #1
+ 80008e2: ea4f 0232 mov.w r2, r2, rrx
+ 80008e6: ebb6 0e02 subs.w lr, r6, r2
+ 80008ea: eb75 0e03 sbcs.w lr, r5, r3
+ 80008ee: bf22 ittt cs
+ 80008f0: 1ab6 subcs r6, r6, r2
+ 80008f2: 4675 movcs r5, lr
+ 80008f4: ea40 005c orrcs.w r0, r0, ip, lsr #1
+ 80008f8: 085b lsrs r3, r3, #1
+ 80008fa: ea4f 0232 mov.w r2, r2, rrx
+ 80008fe: ebb6 0e02 subs.w lr, r6, r2
+ 8000902: eb75 0e03 sbcs.w lr, r5, r3
+ 8000906: bf22 ittt cs
+ 8000908: 1ab6 subcs r6, r6, r2
+ 800090a: 4675 movcs r5, lr
+ 800090c: ea40 009c orrcs.w r0, r0, ip, lsr #2
+ 8000910: 085b lsrs r3, r3, #1
+ 8000912: ea4f 0232 mov.w r2, r2, rrx
+ 8000916: ebb6 0e02 subs.w lr, r6, r2
+ 800091a: eb75 0e03 sbcs.w lr, r5, r3
+ 800091e: bf22 ittt cs
+ 8000920: 1ab6 subcs r6, r6, r2
+ 8000922: 4675 movcs r5, lr
+ 8000924: ea40 00dc orrcs.w r0, r0, ip, lsr #3
+ 8000928: ea55 0e06 orrs.w lr, r5, r6
+ 800092c: d018 beq.n 8000960 <__aeabi_ddiv+0x114>
+ 800092e: ea4f 1505 mov.w r5, r5, lsl #4
+ 8000932: ea45 7516 orr.w r5, r5, r6, lsr #28
+ 8000936: ea4f 1606 mov.w r6, r6, lsl #4
+ 800093a: ea4f 03c3 mov.w r3, r3, lsl #3
+ 800093e: ea43 7352 orr.w r3, r3, r2, lsr #29
+ 8000942: ea4f 02c2 mov.w r2, r2, lsl #3
+ 8000946: ea5f 1c1c movs.w ip, ip, lsr #4
+ 800094a: d1c0 bne.n 80008ce <__aeabi_ddiv+0x82>
+ 800094c: f411 1f80 tst.w r1, #1048576 @ 0x100000
+ 8000950: d10b bne.n 800096a <__aeabi_ddiv+0x11e>
+ 8000952: ea41 0100 orr.w r1, r1, r0
+ 8000956: f04f 0000 mov.w r0, #0
+ 800095a: f04f 4c00 mov.w ip, #2147483648 @ 0x80000000
+ 800095e: e7b6 b.n 80008ce <__aeabi_ddiv+0x82>
+ 8000960: f411 1f80 tst.w r1, #1048576 @ 0x100000
+ 8000964: bf04 itt eq
+ 8000966: 4301 orreq r1, r0
+ 8000968: 2000 moveq r0, #0
+ 800096a: f1b4 0cfd subs.w ip, r4, #253 @ 0xfd
+ 800096e: bf88 it hi
+ 8000970: f5bc 6fe0 cmphi.w ip, #1792 @ 0x700
+ 8000974: f63f aeaf bhi.w 80006d6 <__aeabi_dmul+0xde>
+ 8000978: ebb5 0c03 subs.w ip, r5, r3
+ 800097c: bf04 itt eq
+ 800097e: ebb6 0c02 subseq.w ip, r6, r2
+ 8000982: ea5f 0c50 movseq.w ip, r0, lsr #1
+ 8000986: f150 0000 adcs.w r0, r0, #0
+ 800098a: eb41 5104 adc.w r1, r1, r4, lsl #20
+ 800098e: bd70 pop {r4, r5, r6, pc}
+ 8000990: f00e 4e00 and.w lr, lr, #2147483648 @ 0x80000000
+ 8000994: ea4e 3111 orr.w r1, lr, r1, lsr #12
+ 8000998: eb14 045c adds.w r4, r4, ip, lsr #1
+ 800099c: bfc2 ittt gt
+ 800099e: ebd4 050c rsbsgt r5, r4, ip
+ 80009a2: ea41 5104 orrgt.w r1, r1, r4, lsl #20
+ 80009a6: bd70 popgt {r4, r5, r6, pc}
+ 80009a8: f441 1180 orr.w r1, r1, #1048576 @ 0x100000
+ 80009ac: f04f 0e00 mov.w lr, #0
+ 80009b0: 3c01 subs r4, #1
+ 80009b2: e690 b.n 80006d6 <__aeabi_dmul+0xde>
+ 80009b4: ea45 0e06 orr.w lr, r5, r6
+ 80009b8: e68d b.n 80006d6 <__aeabi_dmul+0xde>
+ 80009ba: ea0c 5513 and.w r5, ip, r3, lsr #20
+ 80009be: ea94 0f0c teq r4, ip
+ 80009c2: bf08 it eq
+ 80009c4: ea95 0f0c teqeq r5, ip
+ 80009c8: f43f af3b beq.w 8000842 <__aeabi_dmul+0x24a>
+ 80009cc: ea94 0f0c teq r4, ip
+ 80009d0: d10a bne.n 80009e8 <__aeabi_ddiv+0x19c>
+ 80009d2: ea50 3401 orrs.w r4, r0, r1, lsl #12
+ 80009d6: f47f af34 bne.w 8000842 <__aeabi_dmul+0x24a>
+ 80009da: ea95 0f0c teq r5, ip
+ 80009de: f47f af25 bne.w 800082c <__aeabi_dmul+0x234>
+ 80009e2: 4610 mov r0, r2
+ 80009e4: 4619 mov r1, r3
+ 80009e6: e72c b.n 8000842 <__aeabi_dmul+0x24a>
+ 80009e8: ea95 0f0c teq r5, ip
+ 80009ec: d106 bne.n 80009fc <__aeabi_ddiv+0x1b0>
+ 80009ee: ea52 3503 orrs.w r5, r2, r3, lsl #12
+ 80009f2: f43f aefd beq.w 80007f0 <__aeabi_dmul+0x1f8>
+ 80009f6: 4610 mov r0, r2
+ 80009f8: 4619 mov r1, r3
+ 80009fa: e722 b.n 8000842 <__aeabi_dmul+0x24a>
+ 80009fc: ea50 0641 orrs.w r6, r0, r1, lsl #1
+ 8000a00: bf18 it ne
+ 8000a02: ea52 0643 orrsne.w r6, r2, r3, lsl #1
+ 8000a06: f47f aec5 bne.w 8000794 <__aeabi_dmul+0x19c>
+ 8000a0a: ea50 0441 orrs.w r4, r0, r1, lsl #1
+ 8000a0e: f47f af0d bne.w 800082c <__aeabi_dmul+0x234>
+ 8000a12: ea52 0543 orrs.w r5, r2, r3, lsl #1
+ 8000a16: f47f aeeb bne.w 80007f0 <__aeabi_dmul+0x1f8>
+ 8000a1a: e712 b.n 8000842 <__aeabi_dmul+0x24a>
+
+08000a1c <__gedf2>:
+ 8000a1c: f04f 3cff mov.w ip, #4294967295 @ 0xffffffff
+ 8000a20: e006 b.n 8000a30 <__cmpdf2+0x4>
+ 8000a22: bf00 nop
+
+08000a24 <__ledf2>:
+ 8000a24: f04f 0c01 mov.w ip, #1
+ 8000a28: e002 b.n 8000a30 <__cmpdf2+0x4>
+ 8000a2a: bf00 nop
+
+08000a2c <__cmpdf2>:
+ 8000a2c: f04f 0c01 mov.w ip, #1
+ 8000a30: f84d cd04 str.w ip, [sp, #-4]!
+ 8000a34: ea4f 0c41 mov.w ip, r1, lsl #1
+ 8000a38: ea7f 5c6c mvns.w ip, ip, asr #21
+ 8000a3c: ea4f 0c43 mov.w ip, r3, lsl #1
+ 8000a40: bf18 it ne
+ 8000a42: ea7f 5c6c mvnsne.w ip, ip, asr #21
+ 8000a46: d01b beq.n 8000a80 <__cmpdf2+0x54>
+ 8000a48: b001 add sp, #4
+ 8000a4a: ea50 0c41 orrs.w ip, r0, r1, lsl #1
+ 8000a4e: bf0c ite eq
+ 8000a50: ea52 0c43 orrseq.w ip, r2, r3, lsl #1
+ 8000a54: ea91 0f03 teqne r1, r3
+ 8000a58: bf02 ittt eq
+ 8000a5a: ea90 0f02 teqeq r0, r2
+ 8000a5e: 2000 moveq r0, #0
+ 8000a60: 4770 bxeq lr
+ 8000a62: f110 0f00 cmn.w r0, #0
+ 8000a66: ea91 0f03 teq r1, r3
+ 8000a6a: bf58 it pl
+ 8000a6c: 4299 cmppl r1, r3
+ 8000a6e: bf08 it eq
+ 8000a70: 4290 cmpeq r0, r2
+ 8000a72: bf2c ite cs
+ 8000a74: 17d8 asrcs r0, r3, #31
+ 8000a76: ea6f 70e3 mvncc.w r0, r3, asr #31
+ 8000a7a: f040 0001 orr.w r0, r0, #1
+ 8000a7e: 4770 bx lr
+ 8000a80: ea4f 0c41 mov.w ip, r1, lsl #1
+ 8000a84: ea7f 5c6c mvns.w ip, ip, asr #21
+ 8000a88: d102 bne.n 8000a90 <__cmpdf2+0x64>
+ 8000a8a: ea50 3c01 orrs.w ip, r0, r1, lsl #12
+ 8000a8e: d107 bne.n 8000aa0 <__cmpdf2+0x74>
+ 8000a90: ea4f 0c43 mov.w ip, r3, lsl #1
+ 8000a94: ea7f 5c6c mvns.w ip, ip, asr #21
+ 8000a98: d1d6 bne.n 8000a48 <__cmpdf2+0x1c>
+ 8000a9a: ea52 3c03 orrs.w ip, r2, r3, lsl #12
+ 8000a9e: d0d3 beq.n 8000a48 <__cmpdf2+0x1c>
+ 8000aa0: f85d 0b04 ldr.w r0, [sp], #4
+ 8000aa4: 4770 bx lr
+ 8000aa6: bf00 nop
+
+08000aa8 <__aeabi_cdrcmple>:
+ 8000aa8: 4684 mov ip, r0
+ 8000aaa: 4610 mov r0, r2
+ 8000aac: 4662 mov r2, ip
+ 8000aae: 468c mov ip, r1
+ 8000ab0: 4619 mov r1, r3
+ 8000ab2: 4663 mov r3, ip
+ 8000ab4: e000 b.n 8000ab8 <__aeabi_cdcmpeq>
+ 8000ab6: bf00 nop
+
+08000ab8 <__aeabi_cdcmpeq>:
+ 8000ab8: b501 push {r0, lr}
+ 8000aba: f7ff ffb7 bl 8000a2c <__cmpdf2>
+ 8000abe: 2800 cmp r0, #0
+ 8000ac0: bf48 it mi
+ 8000ac2: f110 0f00 cmnmi.w r0, #0
+ 8000ac6: bd01 pop {r0, pc}
+
+08000ac8 <__aeabi_dcmpeq>:
+ 8000ac8: f84d ed08 str.w lr, [sp, #-8]!
+ 8000acc: f7ff fff4 bl 8000ab8 <__aeabi_cdcmpeq>
+ 8000ad0: bf0c ite eq
+ 8000ad2: 2001 moveq r0, #1
+ 8000ad4: 2000 movne r0, #0
+ 8000ad6: f85d fb08 ldr.w pc, [sp], #8
+ 8000ada: bf00 nop
+
+08000adc <__aeabi_dcmplt>:
+ 8000adc: f84d ed08 str.w lr, [sp, #-8]!
+ 8000ae0: f7ff ffea bl 8000ab8 <__aeabi_cdcmpeq>
+ 8000ae4: bf34 ite cc
+ 8000ae6: 2001 movcc r0, #1
+ 8000ae8: 2000 movcs r0, #0
+ 8000aea: f85d fb08 ldr.w pc, [sp], #8
+ 8000aee: bf00 nop
+
+08000af0 <__aeabi_dcmple>:
+ 8000af0: f84d ed08 str.w lr, [sp, #-8]!
+ 8000af4: f7ff ffe0 bl 8000ab8 <__aeabi_cdcmpeq>
+ 8000af8: bf94 ite ls
+ 8000afa: 2001 movls r0, #1
+ 8000afc: 2000 movhi r0, #0
+ 8000afe: f85d fb08 ldr.w pc, [sp], #8
+ 8000b02: bf00 nop
+
+08000b04 <__aeabi_dcmpge>:
+ 8000b04: f84d ed08 str.w lr, [sp, #-8]!
+ 8000b08: f7ff ffce bl 8000aa8 <__aeabi_cdrcmple>
+ 8000b0c: bf94 ite ls
+ 8000b0e: 2001 movls r0, #1
+ 8000b10: 2000 movhi r0, #0
+ 8000b12: f85d fb08 ldr.w pc, [sp], #8
+ 8000b16: bf00 nop
+
+08000b18 <__aeabi_dcmpgt>:
+ 8000b18: f84d ed08 str.w lr, [sp, #-8]!
+ 8000b1c: f7ff ffc4 bl 8000aa8 <__aeabi_cdrcmple>
+ 8000b20: bf34 ite cc
+ 8000b22: 2001 movcc r0, #1
+ 8000b24: 2000 movcs r0, #0
+ 8000b26: f85d fb08 ldr.w pc, [sp], #8
+ 8000b2a: bf00 nop
+
+08000b2c <__aeabi_dcmpun>:
+ 8000b2c: ea4f 0c41 mov.w ip, r1, lsl #1
+ 8000b30: ea7f 5c6c mvns.w ip, ip, asr #21
+ 8000b34: d102 bne.n 8000b3c <__aeabi_dcmpun+0x10>
+ 8000b36: ea50 3c01 orrs.w ip, r0, r1, lsl #12
+ 8000b3a: d10a bne.n 8000b52 <__aeabi_dcmpun+0x26>
+ 8000b3c: ea4f 0c43 mov.w ip, r3, lsl #1
+ 8000b40: ea7f 5c6c mvns.w ip, ip, asr #21
+ 8000b44: d102 bne.n 8000b4c <__aeabi_dcmpun+0x20>
+ 8000b46: ea52 3c03 orrs.w ip, r2, r3, lsl #12
+ 8000b4a: d102 bne.n 8000b52 <__aeabi_dcmpun+0x26>
+ 8000b4c: f04f 0000 mov.w r0, #0
+ 8000b50: 4770 bx lr
+ 8000b52: f04f 0001 mov.w r0, #1
+ 8000b56: 4770 bx lr
+
+08000b58 <__aeabi_d2iz>:
+ 8000b58: ea4f 0241 mov.w r2, r1, lsl #1
+ 8000b5c: f512 1200 adds.w r2, r2, #2097152 @ 0x200000
+ 8000b60: d215 bcs.n 8000b8e <__aeabi_d2iz+0x36>
+ 8000b62: d511 bpl.n 8000b88 <__aeabi_d2iz+0x30>
+ 8000b64: f46f 7378 mvn.w r3, #992 @ 0x3e0
+ 8000b68: ebb3 5262 subs.w r2, r3, r2, asr #21
+ 8000b6c: d912 bls.n 8000b94 <__aeabi_d2iz+0x3c>
+ 8000b6e: ea4f 23c1 mov.w r3, r1, lsl #11
+ 8000b72: f043 4300 orr.w r3, r3, #2147483648 @ 0x80000000
+ 8000b76: ea43 5350 orr.w r3, r3, r0, lsr #21
+ 8000b7a: f011 4f00 tst.w r1, #2147483648 @ 0x80000000
+ 8000b7e: fa23 f002 lsr.w r0, r3, r2
+ 8000b82: bf18 it ne
+ 8000b84: 4240 negne r0, r0
+ 8000b86: 4770 bx lr
+ 8000b88: f04f 0000 mov.w r0, #0
+ 8000b8c: 4770 bx lr
+ 8000b8e: ea50 3001 orrs.w r0, r0, r1, lsl #12
+ 8000b92: d105 bne.n 8000ba0 <__aeabi_d2iz+0x48>
+ 8000b94: f011 4000 ands.w r0, r1, #2147483648 @ 0x80000000
+ 8000b98: bf08 it eq
+ 8000b9a: f06f 4000 mvneq.w r0, #2147483648 @ 0x80000000
+ 8000b9e: 4770 bx lr
+ 8000ba0: f04f 0000 mov.w r0, #0
+ 8000ba4: 4770 bx lr
+ 8000ba6: bf00 nop
+
+08000ba8 <__aeabi_uldivmod>:
+ 8000ba8: b953 cbnz r3, 8000bc0 <__aeabi_uldivmod+0x18>
+ 8000baa: b94a cbnz r2, 8000bc0 <__aeabi_uldivmod+0x18>
+ 8000bac: 2900 cmp r1, #0
+ 8000bae: bf08 it eq
+ 8000bb0: 2800 cmpeq r0, #0
+ 8000bb2: bf1c itt ne
+ 8000bb4: f04f 31ff movne.w r1, #4294967295 @ 0xffffffff
+ 8000bb8: f04f 30ff movne.w r0, #4294967295 @ 0xffffffff
+ 8000bbc: f000 b988 b.w 8000ed0 <__aeabi_idiv0>
+ 8000bc0: f1ad 0c08 sub.w ip, sp, #8
+ 8000bc4: e96d ce04 strd ip, lr, [sp, #-16]!
+ 8000bc8: f000 f806 bl 8000bd8 <__udivmoddi4>
+ 8000bcc: f8dd e004 ldr.w lr, [sp, #4]
+ 8000bd0: e9dd 2302 ldrd r2, r3, [sp, #8]
+ 8000bd4: b004 add sp, #16
+ 8000bd6: 4770 bx lr
+
+08000bd8 <__udivmoddi4>:
+ 8000bd8: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
+ 8000bdc: 9d08 ldr r5, [sp, #32]
+ 8000bde: 468e mov lr, r1
+ 8000be0: 4604 mov r4, r0
+ 8000be2: 4688 mov r8, r1
+ 8000be4: 2b00 cmp r3, #0
+ 8000be6: d14a bne.n 8000c7e <__udivmoddi4+0xa6>
+ 8000be8: 428a cmp r2, r1
+ 8000bea: 4617 mov r7, r2
+ 8000bec: d962 bls.n 8000cb4 <__udivmoddi4+0xdc>
+ 8000bee: fab2 f682 clz r6, r2
+ 8000bf2: b14e cbz r6, 8000c08 <__udivmoddi4+0x30>
+ 8000bf4: f1c6 0320 rsb r3, r6, #32
+ 8000bf8: fa01 f806 lsl.w r8, r1, r6
+ 8000bfc: fa20 f303 lsr.w r3, r0, r3
+ 8000c00: 40b7 lsls r7, r6
+ 8000c02: ea43 0808 orr.w r8, r3, r8
+ 8000c06: 40b4 lsls r4, r6
+ 8000c08: ea4f 4e17 mov.w lr, r7, lsr #16
+ 8000c0c: fa1f fc87 uxth.w ip, r7
+ 8000c10: fbb8 f1fe udiv r1, r8, lr
+ 8000c14: 0c23 lsrs r3, r4, #16
+ 8000c16: fb0e 8811 mls r8, lr, r1, r8
+ 8000c1a: ea43 4308 orr.w r3, r3, r8, lsl #16
+ 8000c1e: fb01 f20c mul.w r2, r1, ip
+ 8000c22: 429a cmp r2, r3
+ 8000c24: d909 bls.n 8000c3a <__udivmoddi4+0x62>
+ 8000c26: 18fb adds r3, r7, r3
+ 8000c28: f101 30ff add.w r0, r1, #4294967295 @ 0xffffffff
+ 8000c2c: f080 80ea bcs.w 8000e04 <__udivmoddi4+0x22c>
+ 8000c30: 429a cmp r2, r3
+ 8000c32: f240 80e7 bls.w 8000e04 <__udivmoddi4+0x22c>
+ 8000c36: 3902 subs r1, #2
+ 8000c38: 443b add r3, r7
+ 8000c3a: 1a9a subs r2, r3, r2
+ 8000c3c: b2a3 uxth r3, r4
+ 8000c3e: fbb2 f0fe udiv r0, r2, lr
+ 8000c42: fb0e 2210 mls r2, lr, r0, r2
+ 8000c46: ea43 4302 orr.w r3, r3, r2, lsl #16
+ 8000c4a: fb00 fc0c mul.w ip, r0, ip
+ 8000c4e: 459c cmp ip, r3
+ 8000c50: d909 bls.n 8000c66 <__udivmoddi4+0x8e>
+ 8000c52: 18fb adds r3, r7, r3
+ 8000c54: f100 32ff add.w r2, r0, #4294967295 @ 0xffffffff
+ 8000c58: f080 80d6 bcs.w 8000e08 <__udivmoddi4+0x230>
+ 8000c5c: 459c cmp ip, r3
+ 8000c5e: f240 80d3 bls.w 8000e08 <__udivmoddi4+0x230>
+ 8000c62: 443b add r3, r7
+ 8000c64: 3802 subs r0, #2
+ 8000c66: ea40 4001 orr.w r0, r0, r1, lsl #16
+ 8000c6a: eba3 030c sub.w r3, r3, ip
+ 8000c6e: 2100 movs r1, #0
+ 8000c70: b11d cbz r5, 8000c7a <__udivmoddi4+0xa2>
+ 8000c72: 40f3 lsrs r3, r6
+ 8000c74: 2200 movs r2, #0
+ 8000c76: e9c5 3200 strd r3, r2, [r5]
+ 8000c7a: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
+ 8000c7e: 428b cmp r3, r1
+ 8000c80: d905 bls.n 8000c8e <__udivmoddi4+0xb6>
+ 8000c82: b10d cbz r5, 8000c88 <__udivmoddi4+0xb0>
+ 8000c84: e9c5 0100 strd r0, r1, [r5]
+ 8000c88: 2100 movs r1, #0
+ 8000c8a: 4608 mov r0, r1
+ 8000c8c: e7f5 b.n 8000c7a <__udivmoddi4+0xa2>
+ 8000c8e: fab3 f183 clz r1, r3
+ 8000c92: 2900 cmp r1, #0
+ 8000c94: d146 bne.n 8000d24 <__udivmoddi4+0x14c>
+ 8000c96: 4573 cmp r3, lr
+ 8000c98: d302 bcc.n 8000ca0 <__udivmoddi4+0xc8>
+ 8000c9a: 4282 cmp r2, r0
+ 8000c9c: f200 8105 bhi.w 8000eaa <__udivmoddi4+0x2d2>
+ 8000ca0: 1a84 subs r4, r0, r2
+ 8000ca2: eb6e 0203 sbc.w r2, lr, r3
+ 8000ca6: 2001 movs r0, #1
+ 8000ca8: 4690 mov r8, r2
+ 8000caa: 2d00 cmp r5, #0
+ 8000cac: d0e5 beq.n 8000c7a <__udivmoddi4+0xa2>
+ 8000cae: e9c5 4800 strd r4, r8, [r5]
+ 8000cb2: e7e2 b.n 8000c7a <__udivmoddi4+0xa2>
+ 8000cb4: 2a00 cmp r2, #0
+ 8000cb6: f000 8090 beq.w 8000dda <__udivmoddi4+0x202>
+ 8000cba: fab2 f682 clz r6, r2
+ 8000cbe: 2e00 cmp r6, #0
+ 8000cc0: f040 80a4 bne.w 8000e0c <__udivmoddi4+0x234>
+ 8000cc4: 1a8a subs r2, r1, r2
+ 8000cc6: 0c03 lsrs r3, r0, #16
+ 8000cc8: ea4f 4e17 mov.w lr, r7, lsr #16
+ 8000ccc: b280 uxth r0, r0
+ 8000cce: b2bc uxth r4, r7
+ 8000cd0: 2101 movs r1, #1
+ 8000cd2: fbb2 fcfe udiv ip, r2, lr
+ 8000cd6: fb0e 221c mls r2, lr, ip, r2
+ 8000cda: ea43 4302 orr.w r3, r3, r2, lsl #16
+ 8000cde: fb04 f20c mul.w r2, r4, ip
+ 8000ce2: 429a cmp r2, r3
+ 8000ce4: d907 bls.n 8000cf6 <__udivmoddi4+0x11e>
+ 8000ce6: 18fb adds r3, r7, r3
+ 8000ce8: f10c 38ff add.w r8, ip, #4294967295 @ 0xffffffff
+ 8000cec: d202 bcs.n 8000cf4 <__udivmoddi4+0x11c>
+ 8000cee: 429a cmp r2, r3
+ 8000cf0: f200 80e0 bhi.w 8000eb4 <__udivmoddi4+0x2dc>
+ 8000cf4: 46c4 mov ip, r8
+ 8000cf6: 1a9b subs r3, r3, r2
+ 8000cf8: fbb3 f2fe udiv r2, r3, lr
+ 8000cfc: fb0e 3312 mls r3, lr, r2, r3
+ 8000d00: ea40 4303 orr.w r3, r0, r3, lsl #16
+ 8000d04: fb02 f404 mul.w r4, r2, r4
+ 8000d08: 429c cmp r4, r3
+ 8000d0a: d907 bls.n 8000d1c <__udivmoddi4+0x144>
+ 8000d0c: 18fb adds r3, r7, r3
+ 8000d0e: f102 30ff add.w r0, r2, #4294967295 @ 0xffffffff
+ 8000d12: d202 bcs.n 8000d1a <__udivmoddi4+0x142>
+ 8000d14: 429c cmp r4, r3
+ 8000d16: f200 80ca bhi.w 8000eae <__udivmoddi4+0x2d6>
+ 8000d1a: 4602 mov r2, r0
+ 8000d1c: 1b1b subs r3, r3, r4
+ 8000d1e: ea42 400c orr.w r0, r2, ip, lsl #16
+ 8000d22: e7a5 b.n 8000c70 <__udivmoddi4+0x98>
+ 8000d24: f1c1 0620 rsb r6, r1, #32
+ 8000d28: 408b lsls r3, r1
+ 8000d2a: fa22 f706 lsr.w r7, r2, r6
+ 8000d2e: 431f orrs r7, r3
+ 8000d30: fa0e f401 lsl.w r4, lr, r1
+ 8000d34: fa20 f306 lsr.w r3, r0, r6
+ 8000d38: fa2e fe06 lsr.w lr, lr, r6
+ 8000d3c: ea4f 4917 mov.w r9, r7, lsr #16
+ 8000d40: 4323 orrs r3, r4
+ 8000d42: fa00 f801 lsl.w r8, r0, r1
+ 8000d46: fa1f fc87 uxth.w ip, r7
+ 8000d4a: fbbe f0f9 udiv r0, lr, r9
+ 8000d4e: 0c1c lsrs r4, r3, #16
+ 8000d50: fb09 ee10 mls lr, r9, r0, lr
+ 8000d54: ea44 440e orr.w r4, r4, lr, lsl #16
+ 8000d58: fb00 fe0c mul.w lr, r0, ip
+ 8000d5c: 45a6 cmp lr, r4
+ 8000d5e: fa02 f201 lsl.w r2, r2, r1
+ 8000d62: d909 bls.n 8000d78 <__udivmoddi4+0x1a0>
+ 8000d64: 193c adds r4, r7, r4
+ 8000d66: f100 3aff add.w sl, r0, #4294967295 @ 0xffffffff
+ 8000d6a: f080 809c bcs.w 8000ea6 <__udivmoddi4+0x2ce>
+ 8000d6e: 45a6 cmp lr, r4
+ 8000d70: f240 8099 bls.w 8000ea6 <__udivmoddi4+0x2ce>
+ 8000d74: 3802 subs r0, #2
+ 8000d76: 443c add r4, r7
+ 8000d78: eba4 040e sub.w r4, r4, lr
+ 8000d7c: fa1f fe83 uxth.w lr, r3
+ 8000d80: fbb4 f3f9 udiv r3, r4, r9
+ 8000d84: fb09 4413 mls r4, r9, r3, r4
+ 8000d88: ea4e 4404 orr.w r4, lr, r4, lsl #16
+ 8000d8c: fb03 fc0c mul.w ip, r3, ip
+ 8000d90: 45a4 cmp ip, r4
+ 8000d92: d908 bls.n 8000da6 <__udivmoddi4+0x1ce>
+ 8000d94: 193c adds r4, r7, r4
+ 8000d96: f103 3eff add.w lr, r3, #4294967295 @ 0xffffffff
+ 8000d9a: f080 8082 bcs.w 8000ea2 <__udivmoddi4+0x2ca>
+ 8000d9e: 45a4 cmp ip, r4
+ 8000da0: d97f bls.n 8000ea2 <__udivmoddi4+0x2ca>
+ 8000da2: 3b02 subs r3, #2
+ 8000da4: 443c add r4, r7
+ 8000da6: ea43 4000 orr.w r0, r3, r0, lsl #16
+ 8000daa: eba4 040c sub.w r4, r4, ip
+ 8000dae: fba0 ec02 umull lr, ip, r0, r2
+ 8000db2: 4564 cmp r4, ip
+ 8000db4: 4673 mov r3, lr
+ 8000db6: 46e1 mov r9, ip
+ 8000db8: d362 bcc.n 8000e80 <__udivmoddi4+0x2a8>
+ 8000dba: d05f beq.n 8000e7c <__udivmoddi4+0x2a4>
+ 8000dbc: b15d cbz r5, 8000dd6 <__udivmoddi4+0x1fe>
+ 8000dbe: ebb8 0203 subs.w r2, r8, r3
+ 8000dc2: eb64 0409 sbc.w r4, r4, r9
+ 8000dc6: fa04 f606 lsl.w r6, r4, r6
+ 8000dca: fa22 f301 lsr.w r3, r2, r1
+ 8000dce: 431e orrs r6, r3
+ 8000dd0: 40cc lsrs r4, r1
+ 8000dd2: e9c5 6400 strd r6, r4, [r5]
+ 8000dd6: 2100 movs r1, #0
+ 8000dd8: e74f b.n 8000c7a <__udivmoddi4+0xa2>
+ 8000dda: fbb1 fcf2 udiv ip, r1, r2
+ 8000dde: 0c01 lsrs r1, r0, #16
+ 8000de0: ea41 410e orr.w r1, r1, lr, lsl #16
+ 8000de4: b280 uxth r0, r0
+ 8000de6: ea40 4201 orr.w r2, r0, r1, lsl #16
+ 8000dea: 463b mov r3, r7
+ 8000dec: 4638 mov r0, r7
+ 8000dee: 463c mov r4, r7
+ 8000df0: 46b8 mov r8, r7
+ 8000df2: 46be mov lr, r7
+ 8000df4: 2620 movs r6, #32
+ 8000df6: fbb1 f1f7 udiv r1, r1, r7
+ 8000dfa: eba2 0208 sub.w r2, r2, r8
+ 8000dfe: ea41 410c orr.w r1, r1, ip, lsl #16
+ 8000e02: e766 b.n 8000cd2 <__udivmoddi4+0xfa>
+ 8000e04: 4601 mov r1, r0
+ 8000e06: e718 b.n 8000c3a <__udivmoddi4+0x62>
+ 8000e08: 4610 mov r0, r2
+ 8000e0a: e72c b.n 8000c66 <__udivmoddi4+0x8e>
+ 8000e0c: f1c6 0220 rsb r2, r6, #32
+ 8000e10: fa2e f302 lsr.w r3, lr, r2
+ 8000e14: 40b7 lsls r7, r6
+ 8000e16: 40b1 lsls r1, r6
+ 8000e18: fa20 f202 lsr.w r2, r0, r2
+ 8000e1c: ea4f 4e17 mov.w lr, r7, lsr #16
+ 8000e20: 430a orrs r2, r1
+ 8000e22: fbb3 f8fe udiv r8, r3, lr
+ 8000e26: b2bc uxth r4, r7
+ 8000e28: fb0e 3318 mls r3, lr, r8, r3
+ 8000e2c: 0c11 lsrs r1, r2, #16
+ 8000e2e: ea41 4103 orr.w r1, r1, r3, lsl #16
+ 8000e32: fb08 f904 mul.w r9, r8, r4
+ 8000e36: 40b0 lsls r0, r6
+ 8000e38: 4589 cmp r9, r1
+ 8000e3a: ea4f 4310 mov.w r3, r0, lsr #16
+ 8000e3e: b280 uxth r0, r0
+ 8000e40: d93e bls.n 8000ec0 <__udivmoddi4+0x2e8>
+ 8000e42: 1879 adds r1, r7, r1
+ 8000e44: f108 3cff add.w ip, r8, #4294967295 @ 0xffffffff
+ 8000e48: d201 bcs.n 8000e4e <__udivmoddi4+0x276>
+ 8000e4a: 4589 cmp r9, r1
+ 8000e4c: d81f bhi.n 8000e8e <__udivmoddi4+0x2b6>
+ 8000e4e: eba1 0109 sub.w r1, r1, r9
+ 8000e52: fbb1 f9fe udiv r9, r1, lr
+ 8000e56: fb09 f804 mul.w r8, r9, r4
+ 8000e5a: fb0e 1119 mls r1, lr, r9, r1
+ 8000e5e: b292 uxth r2, r2
+ 8000e60: ea42 4201 orr.w r2, r2, r1, lsl #16
+ 8000e64: 4542 cmp r2, r8
+ 8000e66: d229 bcs.n 8000ebc <__udivmoddi4+0x2e4>
+ 8000e68: 18ba adds r2, r7, r2
+ 8000e6a: f109 31ff add.w r1, r9, #4294967295 @ 0xffffffff
+ 8000e6e: d2c4 bcs.n 8000dfa <__udivmoddi4+0x222>
+ 8000e70: 4542 cmp r2, r8
+ 8000e72: d2c2 bcs.n 8000dfa <__udivmoddi4+0x222>
+ 8000e74: f1a9 0102 sub.w r1, r9, #2
+ 8000e78: 443a add r2, r7
+ 8000e7a: e7be b.n 8000dfa <__udivmoddi4+0x222>
+ 8000e7c: 45f0 cmp r8, lr
+ 8000e7e: d29d bcs.n 8000dbc <__udivmoddi4+0x1e4>
+ 8000e80: ebbe 0302 subs.w r3, lr, r2
+ 8000e84: eb6c 0c07 sbc.w ip, ip, r7
+ 8000e88: 3801 subs r0, #1
+ 8000e8a: 46e1 mov r9, ip
+ 8000e8c: e796 b.n 8000dbc <__udivmoddi4+0x1e4>
+ 8000e8e: eba7 0909 sub.w r9, r7, r9
+ 8000e92: 4449 add r1, r9
+ 8000e94: f1a8 0c02 sub.w ip, r8, #2
+ 8000e98: fbb1 f9fe udiv r9, r1, lr
+ 8000e9c: fb09 f804 mul.w r8, r9, r4
+ 8000ea0: e7db b.n 8000e5a <__udivmoddi4+0x282>
+ 8000ea2: 4673 mov r3, lr
+ 8000ea4: e77f b.n 8000da6 <__udivmoddi4+0x1ce>
+ 8000ea6: 4650 mov r0, sl
+ 8000ea8: e766 b.n 8000d78 <__udivmoddi4+0x1a0>
+ 8000eaa: 4608 mov r0, r1
+ 8000eac: e6fd b.n 8000caa <__udivmoddi4+0xd2>
+ 8000eae: 443b add r3, r7
+ 8000eb0: 3a02 subs r2, #2
+ 8000eb2: e733 b.n 8000d1c <__udivmoddi4+0x144>
+ 8000eb4: f1ac 0c02 sub.w ip, ip, #2
+ 8000eb8: 443b add r3, r7
+ 8000eba: e71c b.n 8000cf6 <__udivmoddi4+0x11e>
+ 8000ebc: 4649 mov r1, r9
+ 8000ebe: e79c b.n 8000dfa <__udivmoddi4+0x222>
+ 8000ec0: eba1 0109 sub.w r1, r1, r9
+ 8000ec4: 46c4 mov ip, r8
+ 8000ec6: fbb1 f9fe udiv r9, r1, lr
+ 8000eca: fb09 f804 mul.w r8, r9, r4
+ 8000ece: e7c4 b.n 8000e5a <__udivmoddi4+0x282>
+
+08000ed0 <__aeabi_idiv0>:
+ 8000ed0: 4770 bx lr
+ 8000ed2: bf00 nop
+
+08000ed4 :
+ * @brief Initializes I2C MSP.
+ * @param i2c_handler I2C handler
+ * @retval None
+ */
+static void I2Cx_MspInit(I2C_HandleTypeDef *i2c_handler)
+{
+ 8000ed4: b580 push {r7, lr}
+ 8000ed6: b08a sub sp, #40 @ 0x28
+ 8000ed8: af00 add r7, sp, #0
+ 8000eda: 6078 str r0, [r7, #4]
+ GPIO_InitTypeDef gpio_init_structure;
+
+ /*** Configure the GPIOs ***/
+ /* Enable GPIO clock */
+ DISCOVERY_I2Cx_SCL_SDA_GPIO_CLK_ENABLE();
+ 8000edc: 4b27 ldr r3, [pc, #156] @ (8000f7c )
+ 8000ede: 6cdb ldr r3, [r3, #76] @ 0x4c
+ 8000ee0: 4a26 ldr r2, [pc, #152] @ (8000f7c )
+ 8000ee2: f043 0302 orr.w r3, r3, #2
+ 8000ee6: 64d3 str r3, [r2, #76] @ 0x4c
+ 8000ee8: 4b24 ldr r3, [pc, #144] @ (8000f7c )
+ 8000eea: 6cdb ldr r3, [r3, #76] @ 0x4c
+ 8000eec: f003 0302 and.w r3, r3, #2
+ 8000ef0: 613b str r3, [r7, #16]
+ 8000ef2: 693b ldr r3, [r7, #16]
+
+ /* Configure I2C Tx, Rx as alternate function */
+ gpio_init_structure.Pin = DISCOVERY_I2Cx_SCL_PIN | DISCOVERY_I2Cx_SDA_PIN;
+ 8000ef4: f44f 6340 mov.w r3, #3072 @ 0xc00
+ 8000ef8: 617b str r3, [r7, #20]
+ gpio_init_structure.Mode = GPIO_MODE_AF_OD;
+ 8000efa: 2312 movs r3, #18
+ 8000efc: 61bb str r3, [r7, #24]
+ gpio_init_structure.Pull = GPIO_PULLUP;
+ 8000efe: 2301 movs r3, #1
+ 8000f00: 61fb str r3, [r7, #28]
+ gpio_init_structure.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+ 8000f02: 2303 movs r3, #3
+ 8000f04: 623b str r3, [r7, #32]
+ gpio_init_structure.Alternate = DISCOVERY_I2Cx_SCL_SDA_AF;
+ 8000f06: 2304 movs r3, #4
+ 8000f08: 627b str r3, [r7, #36] @ 0x24
+ HAL_GPIO_Init(DISCOVERY_I2Cx_SCL_SDA_GPIO_PORT, &gpio_init_structure);
+ 8000f0a: f107 0314 add.w r3, r7, #20
+ 8000f0e: 4619 mov r1, r3
+ 8000f10: 481b ldr r0, [pc, #108] @ (8000f80 )
+ 8000f12: f002 fbe3 bl 80036dc
+
+ HAL_GPIO_Init(DISCOVERY_I2Cx_SCL_SDA_GPIO_PORT, &gpio_init_structure);
+ 8000f16: f107 0314 add.w r3, r7, #20
+ 8000f1a: 4619 mov r1, r3
+ 8000f1c: 4818 ldr r0, [pc, #96] @ (8000f80 )
+ 8000f1e: f002 fbdd bl 80036dc
+
+ /*** Configure the I2C peripheral ***/
+ /* Enable I2C clock */
+ DISCOVERY_I2Cx_CLK_ENABLE();
+ 8000f22: 4b16 ldr r3, [pc, #88] @ (8000f7c )
+ 8000f24: 6d9b ldr r3, [r3, #88] @ 0x58
+ 8000f26: 4a15 ldr r2, [pc, #84] @ (8000f7c )
+ 8000f28: f443 0380 orr.w r3, r3, #4194304 @ 0x400000
+ 8000f2c: 6593 str r3, [r2, #88] @ 0x58
+ 8000f2e: 4b13 ldr r3, [pc, #76] @ (8000f7c )
+ 8000f30: 6d9b ldr r3, [r3, #88] @ 0x58
+ 8000f32: f403 0380 and.w r3, r3, #4194304 @ 0x400000
+ 8000f36: 60fb str r3, [r7, #12]
+ 8000f38: 68fb ldr r3, [r7, #12]
+
+ /* Force the I2C peripheral clock reset */
+ DISCOVERY_I2Cx_FORCE_RESET();
+ 8000f3a: 4b10 ldr r3, [pc, #64] @ (8000f7c )
+ 8000f3c: 6b9b ldr r3, [r3, #56] @ 0x38
+ 8000f3e: 4a0f ldr r2, [pc, #60] @ (8000f7c )
+ 8000f40: f443 0380 orr.w r3, r3, #4194304 @ 0x400000
+ 8000f44: 6393 str r3, [r2, #56] @ 0x38
+
+ /* Release the I2C peripheral clock reset */
+ DISCOVERY_I2Cx_RELEASE_RESET();
+ 8000f46: 4b0d ldr r3, [pc, #52] @ (8000f7c )
+ 8000f48: 6b9b ldr r3, [r3, #56] @ 0x38
+ 8000f4a: 4a0c ldr r2, [pc, #48] @ (8000f7c )
+ 8000f4c: f423 0380 bic.w r3, r3, #4194304 @ 0x400000
+ 8000f50: 6393 str r3, [r2, #56] @ 0x38
+
+ /* Enable and set I2Cx Interrupt to a lower priority */
+ HAL_NVIC_SetPriority(DISCOVERY_I2Cx_EV_IRQn, 0x0F, 0);
+ 8000f52: 2200 movs r2, #0
+ 8000f54: 210f movs r1, #15
+ 8000f56: 2021 movs r0, #33 @ 0x21
+ 8000f58: f002 fa7d bl 8003456
+ HAL_NVIC_EnableIRQ(DISCOVERY_I2Cx_EV_IRQn);
+ 8000f5c: 2021 movs r0, #33 @ 0x21
+ 8000f5e: f002 fa96 bl 800348e
+
+ /* Enable and set I2Cx Interrupt to a lower priority */
+ HAL_NVIC_SetPriority(DISCOVERY_I2Cx_ER_IRQn, 0x0F, 0);
+ 8000f62: 2200 movs r2, #0
+ 8000f64: 210f movs r1, #15
+ 8000f66: 2022 movs r0, #34 @ 0x22
+ 8000f68: f002 fa75 bl 8003456
+ HAL_NVIC_EnableIRQ(DISCOVERY_I2Cx_ER_IRQn);
+ 8000f6c: 2022 movs r0, #34 @ 0x22
+ 8000f6e: f002 fa8e bl 800348e
+}
+ 8000f72: bf00 nop
+ 8000f74: 3728 adds r7, #40 @ 0x28
+ 8000f76: 46bd mov sp, r7
+ 8000f78: bd80 pop {r7, pc}
+ 8000f7a: bf00 nop
+ 8000f7c: 40021000 .word 0x40021000
+ 8000f80: 48000400 .word 0x48000400
+
+08000f84 :
+ * @brief Initializes I2C HAL.
+ * @param i2c_handler I2C handler
+ * @retval None
+ */
+static void I2Cx_Init(I2C_HandleTypeDef *i2c_handler)
+{
+ 8000f84: b580 push {r7, lr}
+ 8000f86: b082 sub sp, #8
+ 8000f88: af00 add r7, sp, #0
+ 8000f8a: 6078 str r0, [r7, #4]
+ /* I2C configuration */
+ i2c_handler->Instance = DISCOVERY_I2Cx;
+ 8000f8c: 687b ldr r3, [r7, #4]
+ 8000f8e: 4a12 ldr r2, [pc, #72] @ (8000fd8 )
+ 8000f90: 601a str r2, [r3, #0]
+ i2c_handler->Init.Timing = DISCOVERY_I2Cx_TIMING;
+ 8000f92: 687b ldr r3, [r7, #4]
+ 8000f94: 4a11 ldr r2, [pc, #68] @ (8000fdc )
+ 8000f96: 605a str r2, [r3, #4]
+ i2c_handler->Init.OwnAddress1 = 0;
+ 8000f98: 687b ldr r3, [r7, #4]
+ 8000f9a: 2200 movs r2, #0
+ 8000f9c: 609a str r2, [r3, #8]
+ i2c_handler->Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;
+ 8000f9e: 687b ldr r3, [r7, #4]
+ 8000fa0: 2201 movs r2, #1
+ 8000fa2: 60da str r2, [r3, #12]
+ i2c_handler->Init.DualAddressMode = I2C_DUALADDRESS_DISABLE;
+ 8000fa4: 687b ldr r3, [r7, #4]
+ 8000fa6: 2200 movs r2, #0
+ 8000fa8: 611a str r2, [r3, #16]
+ i2c_handler->Init.OwnAddress2 = 0;
+ 8000faa: 687b ldr r3, [r7, #4]
+ 8000fac: 2200 movs r2, #0
+ 8000fae: 615a str r2, [r3, #20]
+ i2c_handler->Init.GeneralCallMode = I2C_GENERALCALL_DISABLE;
+ 8000fb0: 687b ldr r3, [r7, #4]
+ 8000fb2: 2200 movs r2, #0
+ 8000fb4: 61da str r2, [r3, #28]
+ i2c_handler->Init.NoStretchMode = I2C_NOSTRETCH_DISABLE;
+ 8000fb6: 687b ldr r3, [r7, #4]
+ 8000fb8: 2200 movs r2, #0
+ 8000fba: 621a str r2, [r3, #32]
+
+ /* Init the I2C */
+ I2Cx_MspInit(i2c_handler);
+ 8000fbc: 6878 ldr r0, [r7, #4]
+ 8000fbe: f7ff ff89 bl 8000ed4
+ HAL_I2C_Init(i2c_handler);
+ 8000fc2: 6878 ldr r0, [r7, #4]
+ 8000fc4: f002 fe63 bl 8003c8e
+
+ /**Configure Analogue filter */
+ HAL_I2CEx_ConfigAnalogFilter(i2c_handler, I2C_ANALOGFILTER_ENABLE);
+ 8000fc8: 2100 movs r1, #0
+ 8000fca: 6878 ldr r0, [r7, #4]
+ 8000fcc: f003 fc1a bl 8004804
+}
+ 8000fd0: bf00 nop
+ 8000fd2: 3708 adds r7, #8
+ 8000fd4: 46bd mov sp, r7
+ 8000fd6: bd80 pop {r7, pc}
+ 8000fd8: 40005800 .word 0x40005800
+ 8000fdc: 00702681 .word 0x00702681
+
+08000fe0 :
+ * @param Buffer Pointer to data buffer
+ * @param Length Length of the data
+ * @retval HAL status
+ */
+static HAL_StatusTypeDef I2Cx_ReadMultiple(I2C_HandleTypeDef *i2c_handler, uint8_t Addr, uint16_t Reg, uint16_t MemAddress, uint8_t *Buffer, uint16_t Length)
+{
+ 8000fe0: b580 push {r7, lr}
+ 8000fe2: b08a sub sp, #40 @ 0x28
+ 8000fe4: af04 add r7, sp, #16
+ 8000fe6: 60f8 str r0, [r7, #12]
+ 8000fe8: 4608 mov r0, r1
+ 8000fea: 4611 mov r1, r2
+ 8000fec: 461a mov r2, r3
+ 8000fee: 4603 mov r3, r0
+ 8000ff0: 72fb strb r3, [r7, #11]
+ 8000ff2: 460b mov r3, r1
+ 8000ff4: 813b strh r3, [r7, #8]
+ 8000ff6: 4613 mov r3, r2
+ 8000ff8: 80fb strh r3, [r7, #6]
+ HAL_StatusTypeDef status = HAL_OK;
+ 8000ffa: 2300 movs r3, #0
+ 8000ffc: 75fb strb r3, [r7, #23]
+
+ status = HAL_I2C_Mem_Read(i2c_handler, Addr, (uint16_t)Reg, MemAddress, Buffer, Length, 1000);
+ 8000ffe: 7afb ldrb r3, [r7, #11]
+ 8001000: b299 uxth r1, r3
+ 8001002: 88f8 ldrh r0, [r7, #6]
+ 8001004: 893a ldrh r2, [r7, #8]
+ 8001006: f44f 737a mov.w r3, #1000 @ 0x3e8
+ 800100a: 9302 str r3, [sp, #8]
+ 800100c: 8cbb ldrh r3, [r7, #36] @ 0x24
+ 800100e: 9301 str r3, [sp, #4]
+ 8001010: 6a3b ldr r3, [r7, #32]
+ 8001012: 9300 str r3, [sp, #0]
+ 8001014: 4603 mov r3, r0
+ 8001016: 68f8 ldr r0, [r7, #12]
+ 8001018: f003 f818 bl 800404c
+ 800101c: 4603 mov r3, r0
+ 800101e: 75fb strb r3, [r7, #23]
+
+ /* Check the communication status */
+ if(status != HAL_OK)
+ 8001020: 7dfb ldrb r3, [r7, #23]
+ 8001022: 2b00 cmp r3, #0
+ 8001024: d004 beq.n 8001030
+ {
+ /* I2C error occured */
+ I2Cx_Error(i2c_handler, Addr);
+ 8001026: 7afb ldrb r3, [r7, #11]
+ 8001028: 4619 mov r1, r3
+ 800102a: 68f8 ldr r0, [r7, #12]
+ 800102c: f000 f832 bl 8001094
+ }
+ return status;
+ 8001030: 7dfb ldrb r3, [r7, #23]
+}
+ 8001032: 4618 mov r0, r3
+ 8001034: 3718 adds r7, #24
+ 8001036: 46bd mov sp, r7
+ 8001038: bd80 pop {r7, pc}
+
+0800103a :
+ * @param Buffer The target register value to be written
+ * @param Length buffer size to be written
+ * @retval HAL status
+ */
+static HAL_StatusTypeDef I2Cx_WriteMultiple(I2C_HandleTypeDef *i2c_handler, uint8_t Addr, uint16_t Reg, uint16_t MemAddress, uint8_t *Buffer, uint16_t Length)
+{
+ 800103a: b580 push {r7, lr}
+ 800103c: b08a sub sp, #40 @ 0x28
+ 800103e: af04 add r7, sp, #16
+ 8001040: 60f8 str r0, [r7, #12]
+ 8001042: 4608 mov r0, r1
+ 8001044: 4611 mov r1, r2
+ 8001046: 461a mov r2, r3
+ 8001048: 4603 mov r3, r0
+ 800104a: 72fb strb r3, [r7, #11]
+ 800104c: 460b mov r3, r1
+ 800104e: 813b strh r3, [r7, #8]
+ 8001050: 4613 mov r3, r2
+ 8001052: 80fb strh r3, [r7, #6]
+ HAL_StatusTypeDef status = HAL_OK;
+ 8001054: 2300 movs r3, #0
+ 8001056: 75fb strb r3, [r7, #23]
+
+ status = HAL_I2C_Mem_Write(i2c_handler, Addr, (uint16_t)Reg, MemAddress, Buffer, Length, 1000);
+ 8001058: 7afb ldrb r3, [r7, #11]
+ 800105a: b299 uxth r1, r3
+ 800105c: 88f8 ldrh r0, [r7, #6]
+ 800105e: 893a ldrh r2, [r7, #8]
+ 8001060: f44f 737a mov.w r3, #1000 @ 0x3e8
+ 8001064: 9302 str r3, [sp, #8]
+ 8001066: 8cbb ldrh r3, [r7, #36] @ 0x24
+ 8001068: 9301 str r3, [sp, #4]
+ 800106a: 6a3b ldr r3, [r7, #32]
+ 800106c: 9300 str r3, [sp, #0]
+ 800106e: 4603 mov r3, r0
+ 8001070: 68f8 ldr r0, [r7, #12]
+ 8001072: f002 fed7 bl 8003e24
+ 8001076: 4603 mov r3, r0
+ 8001078: 75fb strb r3, [r7, #23]
+
+ /* Check the communication status */
+ if(status != HAL_OK)
+ 800107a: 7dfb ldrb r3, [r7, #23]
+ 800107c: 2b00 cmp r3, #0
+ 800107e: d004 beq.n 800108a
+ {
+ /* Re-Initiaize the I2C Bus */
+ I2Cx_Error(i2c_handler, Addr);
+ 8001080: 7afb ldrb r3, [r7, #11]
+ 8001082: 4619 mov r1, r3
+ 8001084: 68f8 ldr r0, [r7, #12]
+ 8001086: f000 f805 bl 8001094
+ }
+ return status;
+ 800108a: 7dfb ldrb r3, [r7, #23]
+}
+ 800108c: 4618 mov r0, r3
+ 800108e: 3718 adds r7, #24
+ 8001090: 46bd mov sp, r7
+ 8001092: bd80 pop {r7, pc}
+
+08001094 :
+ * @param i2c_handler I2C handler
+ * @param Addr I2C Address
+ * @retval None
+ */
+static void I2Cx_Error(I2C_HandleTypeDef *i2c_handler, uint8_t Addr)
+{
+ 8001094: b580 push {r7, lr}
+ 8001096: b082 sub sp, #8
+ 8001098: af00 add r7, sp, #0
+ 800109a: 6078 str r0, [r7, #4]
+ 800109c: 460b mov r3, r1
+ 800109e: 70fb strb r3, [r7, #3]
+ /* De-initialize the I2C communication bus */
+ HAL_I2C_DeInit(i2c_handler);
+ 80010a0: 6878 ldr r0, [r7, #4]
+ 80010a2: f002 fe8f bl 8003dc4
+
+ /* Re-Initialize the I2C communication bus */
+ I2Cx_Init(i2c_handler);
+ 80010a6: 6878 ldr r0, [r7, #4]
+ 80010a8: f7ff ff6c bl 8000f84
+}
+ 80010ac: bf00 nop
+ 80010ae: 3708 adds r7, #8
+ 80010b0: 46bd mov sp, r7
+ 80010b2: bd80 pop {r7, pc}
+
+080010b4 :
+/**
+ * @brief Initializes Sensors low level.
+ * @retval None
+ */
+void SENSOR_IO_Init(void)
+{
+ 80010b4: b580 push {r7, lr}
+ 80010b6: af00 add r7, sp, #0
+ I2Cx_Init(&hI2cHandler);
+ 80010b8: 4802 ldr r0, [pc, #8] @ (80010c4 )
+ 80010ba: f7ff ff63 bl 8000f84
+}
+ 80010be: bf00 nop
+ 80010c0: bd80 pop {r7, pc}
+ 80010c2: bf00 nop
+ 80010c4: 200002b4 .word 0x200002b4
+
+080010c8 :
+ * @param Reg Reg address
+ * @param Value Data to be written
+ * @retval None
+ */
+void SENSOR_IO_Write(uint8_t Addr, uint8_t Reg, uint8_t Value)
+{
+ 80010c8: b580 push {r7, lr}
+ 80010ca: b084 sub sp, #16
+ 80010cc: af02 add r7, sp, #8
+ 80010ce: 4603 mov r3, r0
+ 80010d0: 71fb strb r3, [r7, #7]
+ 80010d2: 460b mov r3, r1
+ 80010d4: 71bb strb r3, [r7, #6]
+ 80010d6: 4613 mov r3, r2
+ 80010d8: 717b strb r3, [r7, #5]
+ I2Cx_WriteMultiple(&hI2cHandler, Addr, (uint16_t)Reg, I2C_MEMADD_SIZE_8BIT,(uint8_t*)&Value, 1);
+ 80010da: 79bb ldrb r3, [r7, #6]
+ 80010dc: b29a uxth r2, r3
+ 80010de: 79f9 ldrb r1, [r7, #7]
+ 80010e0: 2301 movs r3, #1
+ 80010e2: 9301 str r3, [sp, #4]
+ 80010e4: 1d7b adds r3, r7, #5
+ 80010e6: 9300 str r3, [sp, #0]
+ 80010e8: 2301 movs r3, #1
+ 80010ea: 4803 ldr r0, [pc, #12] @ (80010f8 )
+ 80010ec: f7ff ffa5 bl 800103a
+}
+ 80010f0: bf00 nop
+ 80010f2: 3708 adds r7, #8
+ 80010f4: 46bd mov sp, r7
+ 80010f6: bd80 pop {r7, pc}
+ 80010f8: 200002b4 .word 0x200002b4
+
+080010fc :
+ * @param Addr I2C address
+ * @param Reg Reg address
+ * @retval Data to be read
+ */
+uint8_t SENSOR_IO_Read(uint8_t Addr, uint8_t Reg)
+{
+ 80010fc: b580 push {r7, lr}
+ 80010fe: b086 sub sp, #24
+ 8001100: af02 add r7, sp, #8
+ 8001102: 4603 mov r3, r0
+ 8001104: 460a mov r2, r1
+ 8001106: 71fb strb r3, [r7, #7]
+ 8001108: 4613 mov r3, r2
+ 800110a: 71bb strb r3, [r7, #6]
+ uint8_t read_value = 0;
+ 800110c: 2300 movs r3, #0
+ 800110e: 73fb strb r3, [r7, #15]
+
+ I2Cx_ReadMultiple(&hI2cHandler, Addr, Reg, I2C_MEMADD_SIZE_8BIT, (uint8_t*)&read_value, 1);
+ 8001110: 79bb ldrb r3, [r7, #6]
+ 8001112: b29a uxth r2, r3
+ 8001114: 79f9 ldrb r1, [r7, #7]
+ 8001116: 2301 movs r3, #1
+ 8001118: 9301 str r3, [sp, #4]
+ 800111a: f107 030f add.w r3, r7, #15
+ 800111e: 9300 str r3, [sp, #0]
+ 8001120: 2301 movs r3, #1
+ 8001122: 4804 ldr r0, [pc, #16] @ (8001134 )
+ 8001124: f7ff ff5c bl 8000fe0
+
+ return read_value;
+ 8001128: 7bfb ldrb r3, [r7, #15]
+}
+ 800112a: 4618 mov r0, r3
+ 800112c: 3710 adds r7, #16
+ 800112e: 46bd mov sp, r7
+ 8001130: bd80 pop {r7, pc}
+ 8001132: bf00 nop
+ 8001134: 200002b4 .word 0x200002b4
+
+08001138 :
+ * @param Buffer Pointer to data buffer
+ * @param Length Length of the data
+ * @retval HAL status
+ */
+uint16_t SENSOR_IO_ReadMultiple(uint8_t Addr, uint8_t Reg, uint8_t *Buffer, uint16_t Length)
+{
+ 8001138: b580 push {r7, lr}
+ 800113a: b084 sub sp, #16
+ 800113c: af02 add r7, sp, #8
+ 800113e: 603a str r2, [r7, #0]
+ 8001140: 461a mov r2, r3
+ 8001142: 4603 mov r3, r0
+ 8001144: 71fb strb r3, [r7, #7]
+ 8001146: 460b mov r3, r1
+ 8001148: 71bb strb r3, [r7, #6]
+ 800114a: 4613 mov r3, r2
+ 800114c: 80bb strh r3, [r7, #4]
+ return I2Cx_ReadMultiple(&hI2cHandler, Addr, (uint16_t)Reg, I2C_MEMADD_SIZE_8BIT, Buffer, Length);
+ 800114e: 79bb ldrb r3, [r7, #6]
+ 8001150: b29a uxth r2, r3
+ 8001152: 79f9 ldrb r1, [r7, #7]
+ 8001154: 88bb ldrh r3, [r7, #4]
+ 8001156: 9301 str r3, [sp, #4]
+ 8001158: 683b ldr r3, [r7, #0]
+ 800115a: 9300 str r3, [sp, #0]
+ 800115c: 2301 movs r3, #1
+ 800115e: 4804 ldr r0, [pc, #16] @ (8001170 )
+ 8001160: f7ff ff3e bl 8000fe0
+ 8001164: 4603 mov r3, r0
+}
+ 8001166: 4618 mov r0, r3
+ 8001168: 3708 adds r7, #8
+ 800116a: 46bd mov sp, r7
+ 800116c: bd80 pop {r7, pc}
+ 800116e: bf00 nop
+ 8001170: 200002b4 .word 0x200002b4
+
+08001174 :
+/**
+ * @brief Initialize the ACCELERO.
+ * @retval ACCELERO_OK or ACCELERO_ERROR
+ */
+ACCELERO_StatusTypeDef BSP_ACCELERO_Init(void)
+{
+ 8001174: b580 push {r7, lr}
+ 8001176: b084 sub sp, #16
+ 8001178: af00 add r7, sp, #0
+ ACCELERO_StatusTypeDef ret = ACCELERO_OK;
+ 800117a: 2300 movs r3, #0
+ 800117c: 73fb strb r3, [r7, #15]
+ uint16_t ctrl = 0x0000;
+ 800117e: 2300 movs r3, #0
+ 8001180: 81bb strh r3, [r7, #12]
+ ACCELERO_InitTypeDef LSM6DSL_InitStructure;
+
+ if(Lsm6dslAccDrv.ReadID() != LSM6DSL_ACC_GYRO_WHO_AM_I)
+ 8001182: 4b1a ldr r3, [pc, #104] @ (80011ec )
+ 8001184: 689b ldr r3, [r3, #8]
+ 8001186: 4798 blx r3
+ 8001188: 4603 mov r3, r0
+ 800118a: 2b6a cmp r3, #106 @ 0x6a
+ 800118c: d002 beq.n 8001194
+ {
+ ret = ACCELERO_ERROR;
+ 800118e: 2301 movs r3, #1
+ 8001190: 73fb strb r3, [r7, #15]
+ 8001192: e025 b.n 80011e0
+ }
+ else
+ {
+ /* Initialize the ACCELERO accelerometer driver structure */
+ AccelerometerDrv = &Lsm6dslAccDrv;
+ 8001194: 4b16 ldr r3, [pc, #88] @ (80011f0 )
+ 8001196: 4a15 ldr r2, [pc, #84] @ (80011ec )
+ 8001198: 601a str r2, [r3, #0]
+
+ /* MEMS configuration ------------------------------------------------------*/
+ /* Fill the ACCELERO accelerometer structure */
+ LSM6DSL_InitStructure.AccOutput_DataRate = LSM6DSL_ODR_52Hz;
+ 800119a: 2330 movs r3, #48 @ 0x30
+ 800119c: 717b strb r3, [r7, #5]
+ LSM6DSL_InitStructure.Axes_Enable = 0;
+ 800119e: 2300 movs r3, #0
+ 80011a0: 71bb strb r3, [r7, #6]
+ LSM6DSL_InitStructure.AccFull_Scale = LSM6DSL_ACC_FULLSCALE_2G;
+ 80011a2: 2300 movs r3, #0
+ 80011a4: 72bb strb r3, [r7, #10]
+ LSM6DSL_InitStructure.BlockData_Update = LSM6DSL_BDU_BLOCK_UPDATE;
+ 80011a6: 2340 movs r3, #64 @ 0x40
+ 80011a8: 723b strb r3, [r7, #8]
+ LSM6DSL_InitStructure.High_Resolution = 0;
+ 80011aa: 2300 movs r3, #0
+ 80011ac: 71fb strb r3, [r7, #7]
+ LSM6DSL_InitStructure.Communication_Mode = 0;
+ 80011ae: 2300 movs r3, #0
+ 80011b0: 72fb strb r3, [r7, #11]
+
+ /* Configure MEMS: data rate, full scale */
+ ctrl = (LSM6DSL_InitStructure.AccOutput_DataRate | LSM6DSL_InitStructure.AccFull_Scale);
+ 80011b2: 797a ldrb r2, [r7, #5]
+ 80011b4: 7abb ldrb r3, [r7, #10]
+ 80011b6: 4313 orrs r3, r2
+ 80011b8: b2db uxtb r3, r3
+ 80011ba: 81bb strh r3, [r7, #12]
+
+ /* Configure MEMS: BDU and Auto-increment for multi read/write */
+ ctrl |= ((LSM6DSL_InitStructure.BlockData_Update | LSM6DSL_ACC_GYRO_IF_INC_ENABLED) << 8);
+ 80011bc: 7a3b ldrb r3, [r7, #8]
+ 80011be: f043 0304 orr.w r3, r3, #4
+ 80011c2: b2db uxtb r3, r3
+ 80011c4: b21b sxth r3, r3
+ 80011c6: 021b lsls r3, r3, #8
+ 80011c8: b21a sxth r2, r3
+ 80011ca: f9b7 300c ldrsh.w r3, [r7, #12]
+ 80011ce: 4313 orrs r3, r2
+ 80011d0: b21b sxth r3, r3
+ 80011d2: 81bb strh r3, [r7, #12]
+
+ /* Configure the ACCELERO accelerometer main parameters */
+ AccelerometerDrv->Init(ctrl);
+ 80011d4: 4b06 ldr r3, [pc, #24] @ (80011f0 )
+ 80011d6: 681b ldr r3, [r3, #0]
+ 80011d8: 681b ldr r3, [r3, #0]
+ 80011da: 89ba ldrh r2, [r7, #12]
+ 80011dc: 4610 mov r0, r2
+ 80011de: 4798 blx r3
+ }
+
+ return ret;
+ 80011e0: 7bfb ldrb r3, [r7, #15]
+}
+ 80011e2: 4618 mov r0, r3
+ 80011e4: 3710 adds r7, #16
+ 80011e6: 46bd mov sp, r7
+ 80011e8: bd80 pop {r7, pc}
+ 80011ea: bf00 nop
+ 80011ec: 2000005c .word 0x2000005c
+ 80011f0: 20000308 .word 0x20000308
+
+080011f4 :
+/**
+ * @brief DeInitialize the ACCELERO.
+ * @retval None.
+ */
+void BSP_ACCELERO_DeInit(void)
+{
+ 80011f4: b580 push {r7, lr}
+ 80011f6: af00 add r7, sp, #0
+ /* DeInitialize the accelerometer IO interfaces */
+ if(AccelerometerDrv != NULL)
+ 80011f8: 4b07 ldr r3, [pc, #28] @ (8001218 )
+ 80011fa: 681b ldr r3, [r3, #0]
+ 80011fc: 2b00 cmp r3, #0
+ 80011fe: d008 beq.n 8001212
+ {
+ if(AccelerometerDrv->DeInit != NULL)
+ 8001200: 4b05 ldr r3, [pc, #20] @ (8001218 )
+ 8001202: 681b ldr r3, [r3, #0]
+ 8001204: 685b ldr r3, [r3, #4]
+ 8001206: 2b00 cmp r3, #0
+ 8001208: d003 beq.n 8001212
+ {
+ AccelerometerDrv->DeInit();
+ 800120a: 4b03 ldr r3, [pc, #12] @ (8001218 )
+ 800120c: 681b ldr r3, [r3, #0]
+ 800120e: 685b ldr r3, [r3, #4]
+ 8001210: 4798 blx r3
+ }
+ }
+}
+ 8001212: bf00 nop
+ 8001214: bd80 pop {r7, pc}
+ 8001216: bf00 nop
+ 8001218: 20000308 .word 0x20000308
+
+0800121c :
+ * @param pDataXYZ Pointer on 3 angular accelerations table with
+ * pDataXYZ[0] = X axis, pDataXYZ[1] = Y axis, pDataXYZ[2] = Z axis
+ * @retval None
+ */
+void BSP_ACCELERO_AccGetXYZ(int16_t *pDataXYZ)
+{
+ 800121c: b580 push {r7, lr}
+ 800121e: b082 sub sp, #8
+ 8001220: af00 add r7, sp, #0
+ 8001222: 6078 str r0, [r7, #4]
+ if(AccelerometerDrv != NULL)
+ 8001224: 4b08 ldr r3, [pc, #32] @ (8001248 )
+ 8001226: 681b ldr r3, [r3, #0]
+ 8001228: 2b00 cmp r3, #0
+ 800122a: d009 beq.n 8001240
+ {
+ if(AccelerometerDrv->GetXYZ != NULL)
+ 800122c: 4b06 ldr r3, [pc, #24] @ (8001248 )
+ 800122e: 681b ldr r3, [r3, #0]
+ 8001230: 6b1b ldr r3, [r3, #48] @ 0x30
+ 8001232: 2b00 cmp r3, #0
+ 8001234: d004 beq.n 8001240
+ {
+ AccelerometerDrv->GetXYZ(pDataXYZ);
+ 8001236: 4b04 ldr r3, [pc, #16] @ (8001248 )
+ 8001238: 681b ldr r3, [r3, #0]
+ 800123a: 6b1b ldr r3, [r3, #48] @ 0x30
+ 800123c: 6878 ldr r0, [r7, #4]
+ 800123e: 4798 blx r3
+ }
+ }
+}
+ 8001240: bf00 nop
+ 8001242: 3708 adds r7, #8
+ 8001244: 46bd mov sp, r7
+ 8001246: bd80 pop {r7, pc}
+ 8001248: 20000308 .word 0x20000308
+
+0800124c :
+/**
+ * @brief Initialize Gyroscope.
+ * @retval GYRO_OK or GYRO_ERROR
+ */
+uint8_t BSP_GYRO_Init(void)
+{
+ 800124c: b580 push {r7, lr}
+ 800124e: b084 sub sp, #16
+ 8001250: af00 add r7, sp, #0
+ uint8_t ret = GYRO_ERROR;
+ 8001252: 2301 movs r3, #1
+ 8001254: 73fb strb r3, [r7, #15]
+ uint16_t ctrl = 0x0000;
+ 8001256: 2300 movs r3, #0
+ 8001258: 81bb strh r3, [r7, #12]
+ GYRO_InitTypeDef LSM6DSL_InitStructure;
+
+ if(Lsm6dslGyroDrv.ReadID() != LSM6DSL_ACC_GYRO_WHO_AM_I)
+ 800125a: 4b1c ldr r3, [pc, #112] @ (80012cc )
+ 800125c: 689b ldr r3, [r3, #8]
+ 800125e: 4798 blx r3
+ 8001260: 4603 mov r3, r0
+ 8001262: 2b6a cmp r3, #106 @ 0x6a
+ 8001264: d002 beq.n 800126c
+ {
+ ret = GYRO_ERROR;
+ 8001266: 2301 movs r3, #1
+ 8001268: 73fb strb r3, [r7, #15]
+ 800126a: e029 b.n 80012c0
+ }
+ else
+ {
+ /* Initialize the gyroscope driver structure */
+ GyroscopeDrv = &Lsm6dslGyroDrv;
+ 800126c: 4b18 ldr r3, [pc, #96] @ (80012d0 )
+ 800126e: 4a17 ldr r2, [pc, #92] @ (80012cc )
+ 8001270: 601a str r2, [r3, #0]
+
+ /* Configure Mems : data rate, power mode, full scale and axes */
+ LSM6DSL_InitStructure.Power_Mode = 0;
+ 8001272: 2300 movs r3, #0
+ 8001274: 713b strb r3, [r7, #4]
+ LSM6DSL_InitStructure.Output_DataRate = LSM6DSL_ODR_52Hz;
+ 8001276: 2330 movs r3, #48 @ 0x30
+ 8001278: 717b strb r3, [r7, #5]
+ LSM6DSL_InitStructure.Axes_Enable = 0;
+ 800127a: 2300 movs r3, #0
+ 800127c: 71bb strb r3, [r7, #6]
+ LSM6DSL_InitStructure.Band_Width = 0;
+ 800127e: 2300 movs r3, #0
+ 8001280: 71fb strb r3, [r7, #7]
+ LSM6DSL_InitStructure.BlockData_Update = LSM6DSL_BDU_BLOCK_UPDATE;
+ 8001282: 2340 movs r3, #64 @ 0x40
+ 8001284: 723b strb r3, [r7, #8]
+ LSM6DSL_InitStructure.Endianness = 0;
+ 8001286: 2300 movs r3, #0
+ 8001288: 727b strb r3, [r7, #9]
+ LSM6DSL_InitStructure.Full_Scale = LSM6DSL_GYRO_FS_2000;
+ 800128a: 230c movs r3, #12
+ 800128c: 72bb strb r3, [r7, #10]
+
+ /* Configure MEMS: data rate, full scale */
+ ctrl = (LSM6DSL_InitStructure.Full_Scale | LSM6DSL_InitStructure.Output_DataRate);
+ 800128e: 7aba ldrb r2, [r7, #10]
+ 8001290: 797b ldrb r3, [r7, #5]
+ 8001292: 4313 orrs r3, r2
+ 8001294: b2db uxtb r3, r3
+ 8001296: 81bb strh r3, [r7, #12]
+
+ /* Configure MEMS: BDU and Auto-increment for multi read/write */
+ ctrl |= ((LSM6DSL_InitStructure.BlockData_Update | LSM6DSL_ACC_GYRO_IF_INC_ENABLED) << 8);
+ 8001298: 7a3b ldrb r3, [r7, #8]
+ 800129a: f043 0304 orr.w r3, r3, #4
+ 800129e: b2db uxtb r3, r3
+ 80012a0: b21b sxth r3, r3
+ 80012a2: 021b lsls r3, r3, #8
+ 80012a4: b21a sxth r2, r3
+ 80012a6: f9b7 300c ldrsh.w r3, [r7, #12]
+ 80012aa: 4313 orrs r3, r2
+ 80012ac: b21b sxth r3, r3
+ 80012ae: 81bb strh r3, [r7, #12]
+
+ /* Initialize component */
+ GyroscopeDrv->Init(ctrl);
+ 80012b0: 4b07 ldr r3, [pc, #28] @ (80012d0 )
+ 80012b2: 681b ldr r3, [r3, #0]
+ 80012b4: 681b ldr r3, [r3, #0]
+ 80012b6: 89ba ldrh r2, [r7, #12]
+ 80012b8: 4610 mov r0, r2
+ 80012ba: 4798 blx r3
+
+ ret = GYRO_OK;
+ 80012bc: 2300 movs r3, #0
+ 80012be: 73fb strb r3, [r7, #15]
+ }
+
+ return ret;
+ 80012c0: 7bfb ldrb r3, [r7, #15]
+}
+ 80012c2: 4618 mov r0, r3
+ 80012c4: 3710 adds r7, #16
+ 80012c6: 46bd mov sp, r7
+ 80012c8: bd80 pop {r7, pc}
+ 80012ca: bf00 nop
+ 80012cc: 20000090 .word 0x20000090
+ 80012d0: 2000030c .word 0x2000030c
+
+080012d4 :
+
+/**
+ * @brief DeInitialize Gyroscope.
+ */
+void BSP_GYRO_DeInit(void)
+{
+ 80012d4: b580 push {r7, lr}
+ 80012d6: af00 add r7, sp, #0
+ /* DeInitialize the Gyroscope IO interfaces */
+ if(GyroscopeDrv != NULL)
+ 80012d8: 4b07 ldr r3, [pc, #28] @ (80012f8 )
+ 80012da: 681b ldr r3, [r3, #0]
+ 80012dc: 2b00 cmp r3, #0
+ 80012de: d008 beq.n 80012f2
+ {
+ if(GyroscopeDrv->DeInit!= NULL)
+ 80012e0: 4b05 ldr r3, [pc, #20] @ (80012f8 )
+ 80012e2: 681b ldr r3, [r3, #0]
+ 80012e4: 685b ldr r3, [r3, #4]
+ 80012e6: 2b00 cmp r3, #0
+ 80012e8: d003 beq.n 80012f2
+ {
+ GyroscopeDrv->DeInit();
+ 80012ea: 4b03 ldr r3, [pc, #12] @ (80012f8 )
+ 80012ec: 681b ldr r3, [r3, #0]
+ 80012ee: 685b ldr r3, [r3, #4]
+ 80012f0: 4798 blx r3
+ }
+ }
+}
+ 80012f2: bf00 nop
+ 80012f4: bd80 pop {r7, pc}
+ 80012f6: bf00 nop
+ 80012f8: 2000030c .word 0x2000030c
+
+080012fc :
+/**
+ * @brief Get XYZ angular acceleration from the Gyroscope.
+ * @param pfData: pointer on floating array
+ */
+void BSP_GYRO_GetXYZ(float* pfData)
+{
+ 80012fc: b580 push {r7, lr}
+ 80012fe: b082 sub sp, #8
+ 8001300: af00 add r7, sp, #0
+ 8001302: 6078 str r0, [r7, #4]
+ if(GyroscopeDrv != NULL)
+ 8001304: 4b08 ldr r3, [pc, #32] @ (8001328 )
+ 8001306: 681b ldr r3, [r3, #0]
+ 8001308: 2b00 cmp r3, #0
+ 800130a: d009 beq.n 8001320
+ {
+ if(GyroscopeDrv->GetXYZ!= NULL)
+ 800130c: 4b06 ldr r3, [pc, #24] @ (8001328 )
+ 800130e: 681b ldr r3, [r3, #0]
+ 8001310: 6b1b ldr r3, [r3, #48] @ 0x30
+ 8001312: 2b00 cmp r3, #0
+ 8001314: d004 beq.n 8001320
+ {
+ GyroscopeDrv->GetXYZ(pfData);
+ 8001316: 4b04 ldr r3, [pc, #16] @ (8001328 )
+ 8001318: 681b ldr r3, [r3, #0]
+ 800131a: 6b1b ldr r3, [r3, #48] @ 0x30
+ 800131c: 6878 ldr r0, [r7, #4]
+ 800131e: 4798 blx r3
+ }
+ }
+}
+ 8001320: bf00 nop
+ 8001322: 3708 adds r7, #8
+ 8001324: 46bd mov sp, r7
+ 8001326: bd80 pop {r7, pc}
+ 8001328: 2000030c .word 0x2000030c
+
+0800132c :
+/**
+ * @brief Initializes peripherals used by the I2C Humidity Sensor driver.
+ * @retval HSENSOR status
+ */
+uint32_t BSP_HSENSOR_Init(void)
+{
+ 800132c: b580 push {r7, lr}
+ 800132e: b082 sub sp, #8
+ 8001330: af00 add r7, sp, #0
+ uint32_t ret;
+
+ if(HTS221_H_Drv.ReadID(HTS221_I2C_ADDRESS) != HTS221_WHO_AM_I_VAL)
+ 8001332: 4b0c ldr r3, [pc, #48] @ (8001364 )
+ 8001334: 685b ldr r3, [r3, #4]
+ 8001336: 20be movs r0, #190 @ 0xbe
+ 8001338: 4798 blx r3
+ 800133a: 4603 mov r3, r0
+ 800133c: 2bbc cmp r3, #188 @ 0xbc
+ 800133e: d002 beq.n 8001346
+ {
+ ret = HSENSOR_ERROR;
+ 8001340: 2301 movs r3, #1
+ 8001342: 607b str r3, [r7, #4]
+ 8001344: e009 b.n 800135a
+ }
+ else
+ {
+ Hsensor_drv = &HTS221_H_Drv;
+ 8001346: 4b08 ldr r3, [pc, #32] @ (8001368 )
+ 8001348: 4a06 ldr r2, [pc, #24] @ (8001364 )
+ 800134a: 601a str r2, [r3, #0]
+ /* HSENSOR Init */
+ Hsensor_drv->Init(HTS221_I2C_ADDRESS);
+ 800134c: 4b06 ldr r3, [pc, #24] @ (8001368 )
+ 800134e: 681b ldr r3, [r3, #0]
+ 8001350: 681b ldr r3, [r3, #0]
+ 8001352: 20be movs r0, #190 @ 0xbe
+ 8001354: 4798 blx r3
+ ret = HSENSOR_OK;
+ 8001356: 2300 movs r3, #0
+ 8001358: 607b str r3, [r7, #4]
+ }
+
+ return ret;
+ 800135a: 687b ldr r3, [r7, #4]
+}
+ 800135c: 4618 mov r0, r3
+ 800135e: 3708 adds r7, #8
+ 8001360: 46bd mov sp, r7
+ 8001362: bd80 pop {r7, pc}
+ 8001364: 20000000 .word 0x20000000
+ 8001368: 20000310 .word 0x20000310
+
+0800136c :
+/**
+ * @brief Read Humidity register of HTS221.
+ * @retval HTS221 measured humidity value.
+ */
+float BSP_HSENSOR_ReadHumidity(void)
+{
+ 800136c: b580 push {r7, lr}
+ 800136e: af00 add r7, sp, #0
+ return Hsensor_drv->ReadHumidity(HTS221_I2C_ADDRESS);
+ 8001370: 4b04 ldr r3, [pc, #16] @ (8001384 )
+ 8001372: 681b ldr r3, [r3, #0]
+ 8001374: 689b ldr r3, [r3, #8]
+ 8001376: 20be movs r0, #190 @ 0xbe
+ 8001378: 4798 blx r3
+ 800137a: eef0 7a40 vmov.f32 s15, s0
+}
+ 800137e: eeb0 0a67 vmov.f32 s0, s15
+ 8001382: bd80 pop {r7, pc}
+ 8001384: 20000310 .word 0x20000310
+
+08001388 :
+/**
+ * @brief Initialize a magnetometer sensor
+ * @retval COMPONENT_ERROR in case of failure
+ */
+MAGNETO_StatusTypeDef BSP_MAGNETO_Init(void)
+{
+ 8001388: b580 push {r7, lr}
+ 800138a: b082 sub sp, #8
+ 800138c: af00 add r7, sp, #0
+ MAGNETO_StatusTypeDef ret = MAGNETO_OK;
+ 800138e: 2300 movs r3, #0
+ 8001390: 71fb strb r3, [r7, #7]
+ MAGNETO_InitTypeDef LIS3MDL_InitStructureMag;
+
+ if(Lis3mdlMagDrv.ReadID() != I_AM_LIS3MDL)
+ 8001392: 4b11 ldr r3, [pc, #68] @ (80013d8 )
+ 8001394: 689b ldr r3, [r3, #8]
+ 8001396: 4798 blx r3
+ 8001398: 4603 mov r3, r0
+ 800139a: 2b3d cmp r3, #61 @ 0x3d
+ 800139c: d002 beq.n 80013a4
+ {
+ ret = MAGNETO_ERROR;
+ 800139e: 2301 movs r3, #1
+ 80013a0: 71fb strb r3, [r7, #7]
+ 80013a2: e013 b.n 80013cc
+ }
+ else
+ {
+ /* Initialize the MAGNETO magnetometer driver structure */
+ MagnetoDrv = &Lis3mdlMagDrv;
+ 80013a4: 4b0d ldr r3, [pc, #52] @ (80013dc )
+ 80013a6: 4a0c ldr r2, [pc, #48] @ (80013d8 )
+ 80013a8: 601a str r2, [r3, #0]
+
+ /* MEMS configuration ------------------------------------------------------*/
+ /* Fill the MAGNETO magnetometer structure */
+ LIS3MDL_InitStructureMag.Register1 = LIS3MDL_MAG_TEMPSENSOR_DISABLE | LIS3MDL_MAG_OM_XY_HIGH | LIS3MDL_MAG_ODR_40_HZ;
+ 80013aa: 2358 movs r3, #88 @ 0x58
+ 80013ac: 703b strb r3, [r7, #0]
+ LIS3MDL_InitStructureMag.Register2 = LIS3MDL_MAG_FS_4_GA | LIS3MDL_MAG_REBOOT_DEFAULT | LIS3MDL_MAG_SOFT_RESET_DEFAULT;
+ 80013ae: 2300 movs r3, #0
+ 80013b0: 707b strb r3, [r7, #1]
+ LIS3MDL_InitStructureMag.Register3 = LIS3MDL_MAG_CONFIG_NORMAL_MODE | LIS3MDL_MAG_CONTINUOUS_MODE;
+ 80013b2: 2300 movs r3, #0
+ 80013b4: 70bb strb r3, [r7, #2]
+ LIS3MDL_InitStructureMag.Register4 = LIS3MDL_MAG_OM_Z_HIGH | LIS3MDL_MAG_BLE_LSB;
+ 80013b6: 2308 movs r3, #8
+ 80013b8: 70fb strb r3, [r7, #3]
+ LIS3MDL_InitStructureMag.Register5 = LIS3MDL_MAG_BDU_MSBLSB;
+ 80013ba: 2340 movs r3, #64 @ 0x40
+ 80013bc: 713b strb r3, [r7, #4]
+ /* Configure the MAGNETO magnetometer main parameters */
+ MagnetoDrv->Init(LIS3MDL_InitStructureMag);
+ 80013be: 4b07 ldr r3, [pc, #28] @ (80013dc )
+ 80013c0: 681b ldr r3, [r3, #0]
+ 80013c2: 681b ldr r3, [r3, #0]
+ 80013c4: 463a mov r2, r7
+ 80013c6: e892 0003 ldmia.w r2, {r0, r1}
+ 80013ca: 4798 blx r3
+ }
+
+ return ret;
+ 80013cc: 79fb ldrb r3, [r7, #7]
+}
+ 80013ce: 4618 mov r0, r3
+ 80013d0: 3708 adds r7, #8
+ 80013d2: 46bd mov sp, r7
+ 80013d4: bd80 pop {r7, pc}
+ 80013d6: bf00 nop
+ 80013d8: 2000001c .word 0x2000001c
+ 80013dc: 20000314 .word 0x20000314
+
+080013e0 :
+
+/**
+ * @brief DeInitialize the MAGNETO.
+ */
+void BSP_MAGNETO_DeInit(void)
+{
+ 80013e0: b580 push {r7, lr}
+ 80013e2: af00 add r7, sp, #0
+ /* DeInitialize the magnetometer IO interfaces */
+ if(MagnetoDrv != NULL)
+ 80013e4: 4b07 ldr r3, [pc, #28] @ (8001404 )
+ 80013e6: 681b ldr r3, [r3, #0]
+ 80013e8: 2b00 cmp r3, #0
+ 80013ea: d008 beq.n 80013fe
+ {
+ if(MagnetoDrv->DeInit != NULL)
+ 80013ec: 4b05 ldr r3, [pc, #20] @ (8001404 )
+ 80013ee: 681b ldr r3, [r3, #0]
+ 80013f0: 685b ldr r3, [r3, #4]
+ 80013f2: 2b00 cmp r3, #0
+ 80013f4: d003 beq.n 80013fe
+ {
+ MagnetoDrv->DeInit();
+ 80013f6: 4b03 ldr r3, [pc, #12] @ (8001404 )
+ 80013f8: 681b ldr r3, [r3, #0]
+ 80013fa: 685b ldr r3, [r3, #4]
+ 80013fc: 4798 blx r3
+ }
+ }
+}
+ 80013fe: bf00 nop
+ 8001400: bd80 pop {r7, pc}
+ 8001402: bf00 nop
+ 8001404: 20000314 .word 0x20000314
+
+08001408 :
+ * @brief Get XYZ magnetometer values.
+ * @param pDataXYZ Pointer on 3 magnetometer values table with
+ * pDataXYZ[0] = X axis, pDataXYZ[1] = Y axis, pDataXYZ[2] = Z axis
+ */
+void BSP_MAGNETO_GetXYZ(int16_t *pDataXYZ)
+{
+ 8001408: b580 push {r7, lr}
+ 800140a: b082 sub sp, #8
+ 800140c: af00 add r7, sp, #0
+ 800140e: 6078 str r0, [r7, #4]
+ if(MagnetoDrv != NULL)
+ 8001410: 4b08 ldr r3, [pc, #32] @ (8001434 )
+ 8001412: 681b ldr r3, [r3, #0]
+ 8001414: 2b00 cmp r3, #0
+ 8001416: d009 beq.n 800142c
+ {
+ if(MagnetoDrv->GetXYZ != NULL)
+ 8001418: 4b06 ldr r3, [pc, #24] @ (8001434 )
+ 800141a: 681b ldr r3, [r3, #0]
+ 800141c: 6b1b ldr r3, [r3, #48] @ 0x30
+ 800141e: 2b00 cmp r3, #0
+ 8001420: d004 beq.n 800142c
+ {
+ MagnetoDrv->GetXYZ(pDataXYZ);
+ 8001422: 4b04 ldr r3, [pc, #16] @ (8001434 )
+ 8001424: 681b ldr r3, [r3, #0]
+ 8001426: 6b1b ldr r3, [r3, #48] @ 0x30
+ 8001428: 6878 ldr r0, [r7, #4]
+ 800142a: 4798 blx r3
+ }
+ }
+}
+ 800142c: bf00 nop
+ 800142e: 3708 adds r7, #8
+ 8001430: 46bd mov sp, r7
+ 8001432: bd80 pop {r7, pc}
+ 8001434: 20000314 .word 0x20000314
+
+08001438 :
+/**
+ * @brief Initializes peripherals used by the I2C Pressure Sensor driver.
+ * @retval PSENSOR status
+ */
+uint32_t BSP_PSENSOR_Init(void)
+{
+ 8001438: b580 push {r7, lr}
+ 800143a: b082 sub sp, #8
+ 800143c: af00 add r7, sp, #0
+ uint32_t ret;
+
+ if(LPS22HB_P_Drv.ReadID(LPS22HB_I2C_ADDRESS) != LPS22HB_WHO_AM_I_VAL)
+ 800143e: 4b0c ldr r3, [pc, #48] @ (8001470 )
+ 8001440: 685b ldr r3, [r3, #4]
+ 8001442: 20ba movs r0, #186 @ 0xba
+ 8001444: 4798 blx r3
+ 8001446: 4603 mov r3, r0
+ 8001448: 2bb1 cmp r3, #177 @ 0xb1
+ 800144a: d002 beq.n 8001452
+ {
+ ret = PSENSOR_ERROR;
+ 800144c: 2301 movs r3, #1
+ 800144e: 607b str r3, [r7, #4]
+ 8001450: e009 b.n 8001466
+ }
+ else
+ {
+ Psensor_drv = &LPS22HB_P_Drv;
+ 8001452: 4b08 ldr r3, [pc, #32] @ (8001474 )
+ 8001454: 4a06 ldr r2, [pc, #24] @ (8001470 )
+ 8001456: 601a str r2, [r3, #0]
+
+ /* PSENSOR Init */
+ Psensor_drv->Init(LPS22HB_I2C_ADDRESS);
+ 8001458: 4b06 ldr r3, [pc, #24] @ (8001474 )
+ 800145a: 681b ldr r3, [r3, #0]
+ 800145c: 681b ldr r3, [r3, #0]
+ 800145e: 20ba movs r0, #186 @ 0xba
+ 8001460: 4798 blx r3
+ ret = PSENSOR_OK;
+ 8001462: 2300 movs r3, #0
+ 8001464: 607b str r3, [r7, #4]
+ }
+
+ return ret;
+ 8001466: 687b ldr r3, [r7, #4]
+}
+ 8001468: 4618 mov r0, r3
+ 800146a: 3708 adds r7, #8
+ 800146c: 46bd mov sp, r7
+ 800146e: bd80 pop {r7, pc}
+ 8001470: 20000050 .word 0x20000050
+ 8001474: 20000318 .word 0x20000318
+
+08001478 :
+/**
+ * @brief Read Pressure register of LPS22HB.
+ * @retval LPS22HB measured pressure value.
+ */
+float BSP_PSENSOR_ReadPressure(void)
+{
+ 8001478: b580 push {r7, lr}
+ 800147a: af00 add r7, sp, #0
+ return Psensor_drv->ReadPressure(LPS22HB_I2C_ADDRESS);
+ 800147c: 4b04 ldr r3, [pc, #16] @ (8001490 )
+ 800147e: 681b ldr r3, [r3, #0]
+ 8001480: 689b ldr r3, [r3, #8]
+ 8001482: 20ba movs r0, #186 @ 0xba
+ 8001484: 4798 blx r3
+ 8001486: eef0 7a40 vmov.f32 s15, s0
+}
+ 800148a: eeb0 0a67 vmov.f32 s0, s15
+ 800148e: bd80 pop {r7, pc}
+ 8001490: 20000318 .word 0x20000318
+
+08001494 :
+/**
+ * @brief Initializes peripherals used by the I2C Temperature Sensor driver.
+ * @retval TSENSOR status
+ */
+uint32_t BSP_TSENSOR_Init(void)
+{
+ 8001494: b580 push {r7, lr}
+ 8001496: b082 sub sp, #8
+ 8001498: af00 add r7, sp, #0
+ uint8_t ret = TSENSOR_ERROR;
+ 800149a: 2301 movs r3, #1
+ 800149c: 71fb strb r3, [r7, #7]
+
+#ifdef USE_LPS22HB_TEMP
+ tsensor_drv = &LPS22HB_T_Drv;
+#else /* USE_HTS221_TEMP */
+ tsensor_drv = &HTS221_T_Drv;
+ 800149e: 4b09 ldr r3, [pc, #36] @ (80014c4 )
+ 80014a0: 4a09 ldr r2, [pc, #36] @ (80014c8 )
+ 80014a2: 601a str r2, [r3, #0]
+#endif
+
+ /* Low level init */
+ SENSOR_IO_Init();
+ 80014a4: f7ff fe06 bl 80010b4
+
+ /* TSENSOR Init */
+ tsensor_drv->Init(TSENSOR_I2C_ADDRESS, NULL);
+ 80014a8: 4b06 ldr r3, [pc, #24] @ (80014c4 )
+ 80014aa: 681b ldr r3, [r3, #0]
+ 80014ac: 681b ldr r3, [r3, #0]
+ 80014ae: 2100 movs r1, #0
+ 80014b0: 20be movs r0, #190 @ 0xbe
+ 80014b2: 4798 blx r3
+
+ ret = TSENSOR_OK;
+ 80014b4: 2300 movs r3, #0
+ 80014b6: 71fb strb r3, [r7, #7]
+
+ return ret;
+ 80014b8: 79fb ldrb r3, [r7, #7]
+}
+ 80014ba: 4618 mov r0, r3
+ 80014bc: 3708 adds r7, #8
+ 80014be: 46bd mov sp, r7
+ 80014c0: bd80 pop {r7, pc}
+ 80014c2: bf00 nop
+ 80014c4: 2000031c .word 0x2000031c
+ 80014c8: 2000000c .word 0x2000000c
+
+080014cc :
+/**
+ * @brief Read Temperature register of TS751.
+ * @retval STTS751 measured temperature value.
+ */
+float BSP_TSENSOR_ReadTemp(void)
+{
+ 80014cc: b580 push {r7, lr}
+ 80014ce: af00 add r7, sp, #0
+ return tsensor_drv->ReadTemp(TSENSOR_I2C_ADDRESS);
+ 80014d0: 4b04 ldr r3, [pc, #16] @ (80014e4 )
+ 80014d2: 681b ldr r3, [r3, #0]
+ 80014d4: 68db ldr r3, [r3, #12]
+ 80014d6: 20be movs r0, #190 @ 0xbe
+ 80014d8: 4798 blx r3
+ 80014da: eef0 7a40 vmov.f32 s15, s0
+}
+ 80014de: eeb0 0a67 vmov.f32 s0, s15
+ 80014e2: bd80 pop {r7, pc}
+ 80014e4: 2000031c .word 0x2000031c
+
+080014e8 :
+ */
+/**
+ * @brief Set HTS221 humidity sensor Initialization.
+ */
+void HTS221_H_Init(uint16_t DeviceAddr)
+{
+ 80014e8: b580 push {r7, lr}
+ 80014ea: b084 sub sp, #16
+ 80014ec: af00 add r7, sp, #0
+ 80014ee: 4603 mov r3, r0
+ 80014f0: 80fb strh r3, [r7, #6]
+ uint8_t tmp;
+
+ /* Read CTRL_REG1 */
+ tmp = SENSOR_IO_Read(DeviceAddr, HTS221_CTRL_REG1);
+ 80014f2: 88fb ldrh r3, [r7, #6]
+ 80014f4: b2db uxtb r3, r3
+ 80014f6: 2120 movs r1, #32
+ 80014f8: 4618 mov r0, r3
+ 80014fa: f7ff fdff bl 80010fc
+ 80014fe: 4603 mov r3, r0
+ 8001500: 73fb strb r3, [r7, #15]
+
+ /* Enable BDU */
+ tmp &= ~HTS221_BDU_MASK;
+ 8001502: 7bfb ldrb r3, [r7, #15]
+ 8001504: f023 0304 bic.w r3, r3, #4
+ 8001508: 73fb strb r3, [r7, #15]
+ tmp |= (1 << HTS221_BDU_BIT);
+ 800150a: 7bfb ldrb r3, [r7, #15]
+ 800150c: f043 0304 orr.w r3, r3, #4
+ 8001510: 73fb strb r3, [r7, #15]
+
+ /* Set default ODR */
+ tmp &= ~HTS221_ODR_MASK;
+ 8001512: 7bfb ldrb r3, [r7, #15]
+ 8001514: f023 0303 bic.w r3, r3, #3
+ 8001518: 73fb strb r3, [r7, #15]
+ tmp |= (uint8_t)0x01; /* Set ODR to 1Hz */
+ 800151a: 7bfb ldrb r3, [r7, #15]
+ 800151c: f043 0301 orr.w r3, r3, #1
+ 8001520: 73fb strb r3, [r7, #15]
+
+ /* Activate the device */
+ tmp |= HTS221_PD_MASK;
+ 8001522: 7bfb ldrb r3, [r7, #15]
+ 8001524: f063 037f orn r3, r3, #127 @ 0x7f
+ 8001528: 73fb strb r3, [r7, #15]
+
+ /* Apply settings to CTRL_REG1 */
+ SENSOR_IO_Write(DeviceAddr, HTS221_CTRL_REG1, tmp);
+ 800152a: 88fb ldrh r3, [r7, #6]
+ 800152c: b2db uxtb r3, r3
+ 800152e: 7bfa ldrb r2, [r7, #15]
+ 8001530: 2120 movs r1, #32
+ 8001532: 4618 mov r0, r3
+ 8001534: f7ff fdc8 bl 80010c8
+}
+ 8001538: bf00 nop
+ 800153a: 3710 adds r7, #16
+ 800153c: 46bd mov sp, r7
+ 800153e: bd80 pop {r7, pc}
+
+08001540 :
+/**
+ * @brief Read HTS221 ID.
+ * @retval ID
+ */
+uint8_t HTS221_H_ReadID(uint16_t DeviceAddr)
+{
+ 8001540: b580 push {r7, lr}
+ 8001542: b084 sub sp, #16
+ 8001544: af00 add r7, sp, #0
+ 8001546: 4603 mov r3, r0
+ 8001548: 80fb strh r3, [r7, #6]
+ uint8_t ctrl = 0x00;
+ 800154a: 2300 movs r3, #0
+ 800154c: 73fb strb r3, [r7, #15]
+
+ /* IO interface initialization */
+ SENSOR_IO_Init();
+ 800154e: f7ff fdb1 bl 80010b4
+
+ /* Read value at Who am I register address */
+ ctrl = SENSOR_IO_Read(DeviceAddr, HTS221_WHO_AM_I_REG);
+ 8001552: 88fb ldrh r3, [r7, #6]
+ 8001554: b2db uxtb r3, r3
+ 8001556: 210f movs r1, #15
+ 8001558: 4618 mov r0, r3
+ 800155a: f7ff fdcf bl 80010fc
+ 800155e: 4603 mov r3, r0
+ 8001560: 73fb strb r3, [r7, #15]
+
+ return ctrl;
+ 8001562: 7bfb ldrb r3, [r7, #15]
+}
+ 8001564: 4618 mov r0, r3
+ 8001566: 3710 adds r7, #16
+ 8001568: 46bd mov sp, r7
+ 800156a: bd80 pop {r7, pc}
+
+0800156c :
+/**
+ * @brief Read humidity value of HTS221
+ * @retval humidity value;
+ */
+float HTS221_H_ReadHumidity(uint16_t DeviceAddr)
+{
+ 800156c: b580 push {r7, lr}
+ 800156e: b088 sub sp, #32
+ 8001570: af00 add r7, sp, #0
+ 8001572: 4603 mov r3, r0
+ 8001574: 80fb strh r3, [r7, #6]
+ int16_t H0_T0_out, H1_T0_out, H_T_out;
+ int16_t H0_rh, H1_rh;
+ uint8_t buffer[2];
+ float tmp_f;
+
+ SENSOR_IO_ReadMultiple(DeviceAddr, (HTS221_H0_RH_X2 | 0x80), buffer, 2);
+ 8001576: 88fb ldrh r3, [r7, #6]
+ 8001578: b2d8 uxtb r0, r3
+ 800157a: f107 020c add.w r2, r7, #12
+ 800157e: 2302 movs r3, #2
+ 8001580: 21b0 movs r1, #176 @ 0xb0
+ 8001582: f7ff fdd9 bl 8001138
+
+ H0_rh = buffer[0] >> 1;
+ 8001586: 7b3b ldrb r3, [r7, #12]
+ 8001588: 085b lsrs r3, r3, #1
+ 800158a: b2db uxtb r3, r3
+ 800158c: 83fb strh r3, [r7, #30]
+ H1_rh = buffer[1] >> 1;
+ 800158e: 7b7b ldrb r3, [r7, #13]
+ 8001590: 085b lsrs r3, r3, #1
+ 8001592: b2db uxtb r3, r3
+ 8001594: 83bb strh r3, [r7, #28]
+
+ SENSOR_IO_ReadMultiple(DeviceAddr, (HTS221_H0_T0_OUT_L | 0x80), buffer, 2);
+ 8001596: 88fb ldrh r3, [r7, #6]
+ 8001598: b2d8 uxtb r0, r3
+ 800159a: f107 020c add.w r2, r7, #12
+ 800159e: 2302 movs r3, #2
+ 80015a0: 21b6 movs r1, #182 @ 0xb6
+ 80015a2: f7ff fdc9 bl 8001138
+
+ H0_T0_out = (((uint16_t)buffer[1]) << 8) | (uint16_t)buffer[0];
+ 80015a6: 7b7b ldrb r3, [r7, #13]
+ 80015a8: b21b sxth r3, r3
+ 80015aa: 021b lsls r3, r3, #8
+ 80015ac: b21a sxth r2, r3
+ 80015ae: 7b3b ldrb r3, [r7, #12]
+ 80015b0: b21b sxth r3, r3
+ 80015b2: 4313 orrs r3, r2
+ 80015b4: 837b strh r3, [r7, #26]
+
+ SENSOR_IO_ReadMultiple(DeviceAddr, (HTS221_H1_T0_OUT_L | 0x80), buffer, 2);
+ 80015b6: 88fb ldrh r3, [r7, #6]
+ 80015b8: b2d8 uxtb r0, r3
+ 80015ba: f107 020c add.w r2, r7, #12
+ 80015be: 2302 movs r3, #2
+ 80015c0: 21ba movs r1, #186 @ 0xba
+ 80015c2: f7ff fdb9 bl 8001138
+
+ H1_T0_out = (((uint16_t)buffer[1]) << 8) | (uint16_t)buffer[0];
+ 80015c6: 7b7b ldrb r3, [r7, #13]
+ 80015c8: b21b sxth r3, r3
+ 80015ca: 021b lsls r3, r3, #8
+ 80015cc: b21a sxth r2, r3
+ 80015ce: 7b3b ldrb r3, [r7, #12]
+ 80015d0: b21b sxth r3, r3
+ 80015d2: 4313 orrs r3, r2
+ 80015d4: 833b strh r3, [r7, #24]
+
+ SENSOR_IO_ReadMultiple(DeviceAddr, (HTS221_HR_OUT_L_REG | 0x80), buffer, 2);
+ 80015d6: 88fb ldrh r3, [r7, #6]
+ 80015d8: b2d8 uxtb r0, r3
+ 80015da: f107 020c add.w r2, r7, #12
+ 80015de: 2302 movs r3, #2
+ 80015e0: 21a8 movs r1, #168 @ 0xa8
+ 80015e2: f7ff fda9 bl 8001138
+
+ H_T_out = (((uint16_t)buffer[1]) << 8) | (uint16_t)buffer[0];
+ 80015e6: 7b7b ldrb r3, [r7, #13]
+ 80015e8: b21b sxth r3, r3
+ 80015ea: 021b lsls r3, r3, #8
+ 80015ec: b21a sxth r2, r3
+ 80015ee: 7b3b ldrb r3, [r7, #12]
+ 80015f0: b21b sxth r3, r3
+ 80015f2: 4313 orrs r3, r2
+ 80015f4: 82fb strh r3, [r7, #22]
+
+ tmp_f = (float)(H_T_out - H0_T0_out) * (float)(H1_rh - H0_rh) / (float)(H1_T0_out - H0_T0_out) + H0_rh;
+ 80015f6: f9b7 2016 ldrsh.w r2, [r7, #22]
+ 80015fa: f9b7 301a ldrsh.w r3, [r7, #26]
+ 80015fe: 1ad3 subs r3, r2, r3
+ 8001600: ee07 3a90 vmov s15, r3
+ 8001604: eeb8 7ae7 vcvt.f32.s32 s14, s15
+ 8001608: f9b7 201c ldrsh.w r2, [r7, #28]
+ 800160c: f9b7 301e ldrsh.w r3, [r7, #30]
+ 8001610: 1ad3 subs r3, r2, r3
+ 8001612: ee07 3a90 vmov s15, r3
+ 8001616: eef8 7ae7 vcvt.f32.s32 s15, s15
+ 800161a: ee67 6a27 vmul.f32 s13, s14, s15
+ 800161e: f9b7 2018 ldrsh.w r2, [r7, #24]
+ 8001622: f9b7 301a ldrsh.w r3, [r7, #26]
+ 8001626: 1ad3 subs r3, r2, r3
+ 8001628: ee07 3a90 vmov s15, r3
+ 800162c: eef8 7ae7 vcvt.f32.s32 s15, s15
+ 8001630: ee86 7aa7 vdiv.f32 s14, s13, s15
+ 8001634: f9b7 301e ldrsh.w r3, [r7, #30]
+ 8001638: ee07 3a90 vmov s15, r3
+ 800163c: eef8 7ae7 vcvt.f32.s32 s15, s15
+ 8001640: ee77 7a27 vadd.f32 s15, s14, s15
+ 8001644: edc7 7a04 vstr s15, [r7, #16]
+ tmp_f *= 10.0f;
+ 8001648: edd7 7a04 vldr s15, [r7, #16]
+ 800164c: eeb2 7a04 vmov.f32 s14, #36 @ 0x41200000 10.0
+ 8001650: ee67 7a87 vmul.f32 s15, s15, s14
+ 8001654: edc7 7a04 vstr s15, [r7, #16]
+
+ tmp_f = ( tmp_f > 1000.0f ) ? 1000.0f
+ : ( tmp_f < 0.0f ) ? 0.0f
+ 8001658: edd7 7a04 vldr s15, [r7, #16]
+ 800165c: ed9f 7a10 vldr s14, [pc, #64] @ 80016a0
+ 8001660: eef4 7ac7 vcmpe.f32 s15, s14
+ 8001664: eef1 fa10 vmrs APSR_nzcv, fpscr
+ 8001668: dd01 ble.n 800166e
+ 800166a: 4b0e ldr r3, [pc, #56] @ (80016a4 )
+ 800166c: e00a b.n 8001684
+ : tmp_f;
+ 800166e: edd7 7a04 vldr s15, [r7, #16]
+ 8001672: eef5 7ac0 vcmpe.f32 s15, #0.0
+ 8001676: eef1 fa10 vmrs APSR_nzcv, fpscr
+ 800167a: d502 bpl.n 8001682
+ 800167c: f04f 0300 mov.w r3, #0
+ 8001680: e000 b.n 8001684
+ 8001682: 693b ldr r3, [r7, #16]
+ tmp_f = ( tmp_f > 1000.0f ) ? 1000.0f
+ 8001684: 613b str r3, [r7, #16]
+
+ return (tmp_f / 10.0f);
+ 8001686: edd7 7a04 vldr s15, [r7, #16]
+ 800168a: eeb2 7a04 vmov.f32 s14, #36 @ 0x41200000 10.0
+ 800168e: eec7 6a87 vdiv.f32 s13, s15, s14
+ 8001692: eef0 7a66 vmov.f32 s15, s13
+}
+ 8001696: eeb0 0a67 vmov.f32 s0, s15
+ 800169a: 3720 adds r7, #32
+ 800169c: 46bd mov sp, r7
+ 800169e: bd80 pop {r7, pc}
+ 80016a0: 447a0000 .word 0x447a0000
+ 80016a4: 447a0000 .word 0x447a0000
+
+080016a8 :
+ * @param DeviceAddr: I2C device address
+ * @param InitStruct: pointer to a TSENSOR_InitTypeDef structure
+ * that contains the configuration setting for the HTS221.
+ */
+void HTS221_T_Init(uint16_t DeviceAddr, TSENSOR_InitTypeDef *pInitStruct)
+{
+ 80016a8: b580 push {r7, lr}
+ 80016aa: b084 sub sp, #16
+ 80016ac: af00 add r7, sp, #0
+ 80016ae: 4603 mov r3, r0
+ 80016b0: 6039 str r1, [r7, #0]
+ 80016b2: 80fb strh r3, [r7, #6]
+ uint8_t tmp;
+
+ /* Read CTRL_REG1 */
+ tmp = SENSOR_IO_Read(DeviceAddr, HTS221_CTRL_REG1);
+ 80016b4: 88fb ldrh r3, [r7, #6]
+ 80016b6: b2db uxtb r3, r3
+ 80016b8: 2120 movs r1, #32
+ 80016ba: 4618 mov r0, r3
+ 80016bc: f7ff fd1e bl 80010fc
+ 80016c0: 4603 mov r3, r0
+ 80016c2: 73fb strb r3, [r7, #15]
+
+ /* Enable BDU */
+ tmp &= ~HTS221_BDU_MASK;
+ 80016c4: 7bfb ldrb r3, [r7, #15]
+ 80016c6: f023 0304 bic.w r3, r3, #4
+ 80016ca: 73fb strb r3, [r7, #15]
+ tmp |= (1 << HTS221_BDU_BIT);
+ 80016cc: 7bfb ldrb r3, [r7, #15]
+ 80016ce: f043 0304 orr.w r3, r3, #4
+ 80016d2: 73fb strb r3, [r7, #15]
+
+ /* Set default ODR */
+ tmp &= ~HTS221_ODR_MASK;
+ 80016d4: 7bfb ldrb r3, [r7, #15]
+ 80016d6: f023 0303 bic.w r3, r3, #3
+ 80016da: 73fb strb r3, [r7, #15]
+ tmp |= (uint8_t)0x01; /* Set ODR to 1Hz */
+ 80016dc: 7bfb ldrb r3, [r7, #15]
+ 80016de: f043 0301 orr.w r3, r3, #1
+ 80016e2: 73fb strb r3, [r7, #15]
+
+ /* Activate the device */
+ tmp |= HTS221_PD_MASK;
+ 80016e4: 7bfb ldrb r3, [r7, #15]
+ 80016e6: f063 037f orn r3, r3, #127 @ 0x7f
+ 80016ea: 73fb strb r3, [r7, #15]
+
+ /* Apply settings to CTRL_REG1 */
+ SENSOR_IO_Write(DeviceAddr, HTS221_CTRL_REG1, tmp);
+ 80016ec: 88fb ldrh r3, [r7, #6]
+ 80016ee: b2db uxtb r3, r3
+ 80016f0: 7bfa ldrb r2, [r7, #15]
+ 80016f2: 2120 movs r1, #32
+ 80016f4: 4618 mov r0, r3
+ 80016f6: f7ff fce7 bl 80010c8
+}
+ 80016fa: bf00 nop
+ 80016fc: 3710 adds r7, #16
+ 80016fe: 46bd mov sp, r7
+ 8001700: bd80 pop {r7, pc}
+
+08001702 :
+ * @brief Read temperature value of HTS221
+ * @param DeviceAddr: I2C device address
+ * @retval temperature value
+ */
+float HTS221_T_ReadTemp(uint16_t DeviceAddr)
+{
+ 8001702: b580 push {r7, lr}
+ 8001704: b088 sub sp, #32
+ 8001706: af00 add r7, sp, #0
+ 8001708: 4603 mov r3, r0
+ 800170a: 80fb strh r3, [r7, #6]
+ int16_t T0_out, T1_out, T_out, T0_degC_x8_u16, T1_degC_x8_u16;
+ int16_t T0_degC, T1_degC;
+ uint8_t buffer[4], tmp;
+ float tmp_f;
+
+ SENSOR_IO_ReadMultiple(DeviceAddr, (HTS221_T0_DEGC_X8 | 0x80), buffer, 2);
+ 800170c: 88fb ldrh r3, [r7, #6]
+ 800170e: b2d8 uxtb r0, r3
+ 8001710: f107 0208 add.w r2, r7, #8
+ 8001714: 2302 movs r3, #2
+ 8001716: 21b2 movs r1, #178 @ 0xb2
+ 8001718: f7ff fd0e bl 8001138
+ tmp = SENSOR_IO_Read(DeviceAddr, HTS221_T0_T1_DEGC_H2);
+ 800171c: 88fb ldrh r3, [r7, #6]
+ 800171e: b2db uxtb r3, r3
+ 8001720: 2135 movs r1, #53 @ 0x35
+ 8001722: 4618 mov r0, r3
+ 8001724: f7ff fcea bl 80010fc
+ 8001728: 4603 mov r3, r0
+ 800172a: 77fb strb r3, [r7, #31]
+
+ T0_degC_x8_u16 = (((uint16_t)(tmp & 0x03)) << 8) | ((uint16_t)buffer[0]);
+ 800172c: 7ffb ldrb r3, [r7, #31]
+ 800172e: b21b sxth r3, r3
+ 8001730: 021b lsls r3, r3, #8
+ 8001732: b21b sxth r3, r3
+ 8001734: f403 7340 and.w r3, r3, #768 @ 0x300
+ 8001738: b21a sxth r2, r3
+ 800173a: 7a3b ldrb r3, [r7, #8]
+ 800173c: b21b sxth r3, r3
+ 800173e: 4313 orrs r3, r2
+ 8001740: 83bb strh r3, [r7, #28]
+ T1_degC_x8_u16 = (((uint16_t)(tmp & 0x0C)) << 6) | ((uint16_t)buffer[1]);
+ 8001742: 7ffb ldrb r3, [r7, #31]
+ 8001744: b21b sxth r3, r3
+ 8001746: 019b lsls r3, r3, #6
+ 8001748: b21b sxth r3, r3
+ 800174a: f403 7340 and.w r3, r3, #768 @ 0x300
+ 800174e: b21a sxth r2, r3
+ 8001750: 7a7b ldrb r3, [r7, #9]
+ 8001752: b21b sxth r3, r3
+ 8001754: 4313 orrs r3, r2
+ 8001756: 837b strh r3, [r7, #26]
+ T0_degC = T0_degC_x8_u16 >> 3;
+ 8001758: f9b7 301c ldrsh.w r3, [r7, #28]
+ 800175c: 10db asrs r3, r3, #3
+ 800175e: 833b strh r3, [r7, #24]
+ T1_degC = T1_degC_x8_u16 >> 3;
+ 8001760: f9b7 301a ldrsh.w r3, [r7, #26]
+ 8001764: 10db asrs r3, r3, #3
+ 8001766: 82fb strh r3, [r7, #22]
+
+ SENSOR_IO_ReadMultiple(DeviceAddr, (HTS221_T0_OUT_L | 0x80), buffer, 4);
+ 8001768: 88fb ldrh r3, [r7, #6]
+ 800176a: b2d8 uxtb r0, r3
+ 800176c: f107 0208 add.w r2, r7, #8
+ 8001770: 2304 movs r3, #4
+ 8001772: 21bc movs r1, #188 @ 0xbc
+ 8001774: f7ff fce0 bl 8001138
+
+ T0_out = (((uint16_t)buffer[1]) << 8) | (uint16_t)buffer[0];
+ 8001778: 7a7b ldrb r3, [r7, #9]
+ 800177a: b21b sxth r3, r3
+ 800177c: 021b lsls r3, r3, #8
+ 800177e: b21a sxth r2, r3
+ 8001780: 7a3b ldrb r3, [r7, #8]
+ 8001782: b21b sxth r3, r3
+ 8001784: 4313 orrs r3, r2
+ 8001786: 82bb strh r3, [r7, #20]
+ T1_out = (((uint16_t)buffer[3]) << 8) | (uint16_t)buffer[2];
+ 8001788: 7afb ldrb r3, [r7, #11]
+ 800178a: b21b sxth r3, r3
+ 800178c: 021b lsls r3, r3, #8
+ 800178e: b21a sxth r2, r3
+ 8001790: 7abb ldrb r3, [r7, #10]
+ 8001792: b21b sxth r3, r3
+ 8001794: 4313 orrs r3, r2
+ 8001796: 827b strh r3, [r7, #18]
+
+ SENSOR_IO_ReadMultiple(DeviceAddr, (HTS221_TEMP_OUT_L_REG | 0x80), buffer, 2);
+ 8001798: 88fb ldrh r3, [r7, #6]
+ 800179a: b2d8 uxtb r0, r3
+ 800179c: f107 0208 add.w r2, r7, #8
+ 80017a0: 2302 movs r3, #2
+ 80017a2: 21aa movs r1, #170 @ 0xaa
+ 80017a4: f7ff fcc8 bl 8001138
+
+ T_out = (((uint16_t)buffer[1]) << 8) | (uint16_t)buffer[0];
+ 80017a8: 7a7b ldrb r3, [r7, #9]
+ 80017aa: b21b sxth r3, r3
+ 80017ac: 021b lsls r3, r3, #8
+ 80017ae: b21a sxth r2, r3
+ 80017b0: 7a3b ldrb r3, [r7, #8]
+ 80017b2: b21b sxth r3, r3
+ 80017b4: 4313 orrs r3, r2
+ 80017b6: 823b strh r3, [r7, #16]
+
+ tmp_f = (float)(T_out - T0_out) * (float)(T1_degC - T0_degC) / (float)(T1_out - T0_out) + T0_degC;
+ 80017b8: f9b7 2010 ldrsh.w r2, [r7, #16]
+ 80017bc: f9b7 3014 ldrsh.w r3, [r7, #20]
+ 80017c0: 1ad3 subs r3, r2, r3
+ 80017c2: ee07 3a90 vmov s15, r3
+ 80017c6: eeb8 7ae7 vcvt.f32.s32 s14, s15
+ 80017ca: f9b7 2016 ldrsh.w r2, [r7, #22]
+ 80017ce: f9b7 3018 ldrsh.w r3, [r7, #24]
+ 80017d2: 1ad3 subs r3, r2, r3
+ 80017d4: ee07 3a90 vmov s15, r3
+ 80017d8: eef8 7ae7 vcvt.f32.s32 s15, s15
+ 80017dc: ee67 6a27 vmul.f32 s13, s14, s15
+ 80017e0: f9b7 2012 ldrsh.w r2, [r7, #18]
+ 80017e4: f9b7 3014 ldrsh.w r3, [r7, #20]
+ 80017e8: 1ad3 subs r3, r2, r3
+ 80017ea: ee07 3a90 vmov s15, r3
+ 80017ee: eef8 7ae7 vcvt.f32.s32 s15, s15
+ 80017f2: ee86 7aa7 vdiv.f32 s14, s13, s15
+ 80017f6: f9b7 3018 ldrsh.w r3, [r7, #24]
+ 80017fa: ee07 3a90 vmov s15, r3
+ 80017fe: eef8 7ae7 vcvt.f32.s32 s15, s15
+ 8001802: ee77 7a27 vadd.f32 s15, s14, s15
+ 8001806: edc7 7a03 vstr s15, [r7, #12]
+
+ return tmp_f;
+ 800180a: 68fb ldr r3, [r7, #12]
+ 800180c: ee07 3a90 vmov s15, r3
+}
+ 8001810: eeb0 0a67 vmov.f32 s0, s15
+ 8001814: 3720 adds r7, #32
+ 8001816: 46bd mov sp, r7
+ 8001818: bd80 pop {r7, pc}
+
+0800181a :
+ * @brief Set LIS3MDL Magnetometer Initialization.
+ * @param LIS3MDL_InitStruct: pointer to a LIS3MDL_MagInitTypeDef structure
+ * that contains the configuration setting for the LIS3MDL.
+ */
+void LIS3MDL_MagInit(MAGNETO_InitTypeDef LIS3MDL_InitStruct)
+{
+ 800181a: b580 push {r7, lr}
+ 800181c: b082 sub sp, #8
+ 800181e: af00 add r7, sp, #0
+ 8001820: 463b mov r3, r7
+ 8001822: e883 0003 stmia.w r3, {r0, r1}
+ SENSOR_IO_Write(LIS3MDL_MAG_I2C_ADDRESS_HIGH, LIS3MDL_MAG_CTRL_REG1, LIS3MDL_InitStruct.Register1);
+ 8001826: 783b ldrb r3, [r7, #0]
+ 8001828: 461a mov r2, r3
+ 800182a: 2120 movs r1, #32
+ 800182c: 203c movs r0, #60 @ 0x3c
+ 800182e: f7ff fc4b bl 80010c8
+ SENSOR_IO_Write(LIS3MDL_MAG_I2C_ADDRESS_HIGH, LIS3MDL_MAG_CTRL_REG2, LIS3MDL_InitStruct.Register2);
+ 8001832: 787b ldrb r3, [r7, #1]
+ 8001834: 461a mov r2, r3
+ 8001836: 2121 movs r1, #33 @ 0x21
+ 8001838: 203c movs r0, #60 @ 0x3c
+ 800183a: f7ff fc45 bl 80010c8
+ SENSOR_IO_Write(LIS3MDL_MAG_I2C_ADDRESS_HIGH, LIS3MDL_MAG_CTRL_REG3, LIS3MDL_InitStruct.Register3);
+ 800183e: 78bb ldrb r3, [r7, #2]
+ 8001840: 461a mov r2, r3
+ 8001842: 2122 movs r1, #34 @ 0x22
+ 8001844: 203c movs r0, #60 @ 0x3c
+ 8001846: f7ff fc3f bl 80010c8
+ SENSOR_IO_Write(LIS3MDL_MAG_I2C_ADDRESS_HIGH, LIS3MDL_MAG_CTRL_REG4, LIS3MDL_InitStruct.Register4);
+ 800184a: 78fb ldrb r3, [r7, #3]
+ 800184c: 461a mov r2, r3
+ 800184e: 2123 movs r1, #35 @ 0x23
+ 8001850: 203c movs r0, #60 @ 0x3c
+ 8001852: f7ff fc39 bl 80010c8
+ SENSOR_IO_Write(LIS3MDL_MAG_I2C_ADDRESS_HIGH, LIS3MDL_MAG_CTRL_REG5, LIS3MDL_InitStruct.Register5);
+ 8001856: 793b ldrb r3, [r7, #4]
+ 8001858: 461a mov r2, r3
+ 800185a: 2124 movs r1, #36 @ 0x24
+ 800185c: 203c movs r0, #60 @ 0x3c
+ 800185e: f7ff fc33 bl 80010c8
+}
+ 8001862: bf00 nop
+ 8001864: 3708 adds r7, #8
+ 8001866: 46bd mov sp, r7
+ 8001868: bd80 pop {r7, pc}
+
+0800186a :
+
+/**
+ * @brief LIS3MDL Magnetometer De-initialization.
+ */
+void LIS3MDL_MagDeInit(void)
+{
+ 800186a: b580 push {r7, lr}
+ 800186c: b082 sub sp, #8
+ 800186e: af00 add r7, sp, #0
+ uint8_t ctrl = 0x00;
+ 8001870: 2300 movs r3, #0
+ 8001872: 71fb strb r3, [r7, #7]
+
+ /* Read control register 1 value */
+ ctrl = SENSOR_IO_Read(LIS3MDL_MAG_I2C_ADDRESS_HIGH, LIS3MDL_MAG_CTRL_REG3);
+ 8001874: 2122 movs r1, #34 @ 0x22
+ 8001876: 203c movs r0, #60 @ 0x3c
+ 8001878: f7ff fc40 bl 80010fc
+ 800187c: 4603 mov r3, r0
+ 800187e: 71fb strb r3, [r7, #7]
+
+ /* Clear Selection Mode bits */
+ ctrl &= ~(LIS3MDL_MAG_SELECTION_MODE);
+ 8001880: 79fb ldrb r3, [r7, #7]
+ 8001882: f023 0303 bic.w r3, r3, #3
+ 8001886: 71fb strb r3, [r7, #7]
+
+ /* Set Power down */
+ ctrl |= LIS3MDL_MAG_POWERDOWN2_MODE;
+ 8001888: 79fb ldrb r3, [r7, #7]
+ 800188a: f043 0303 orr.w r3, r3, #3
+ 800188e: 71fb strb r3, [r7, #7]
+
+ /* write back control register */
+ SENSOR_IO_Write(LIS3MDL_MAG_I2C_ADDRESS_HIGH, LIS3MDL_MAG_CTRL_REG3, ctrl);
+ 8001890: 79fb ldrb r3, [r7, #7]
+ 8001892: 461a mov r2, r3
+ 8001894: 2122 movs r1, #34 @ 0x22
+ 8001896: 203c movs r0, #60 @ 0x3c
+ 8001898: f7ff fc16 bl 80010c8
+}
+ 800189c: bf00 nop
+ 800189e: 3708 adds r7, #8
+ 80018a0: 46bd mov sp, r7
+ 80018a2: bd80 pop {r7, pc}
+
+080018a4 :
+/**
+ * @brief Read LIS3MDL ID.
+ * @retval ID
+ */
+uint8_t LIS3MDL_MagReadID(void)
+{
+ 80018a4: b580 push {r7, lr}
+ 80018a6: af00 add r7, sp, #0
+ /* IO interface initialization */
+ SENSOR_IO_Init();
+ 80018a8: f7ff fc04 bl 80010b4
+ /* Read value at Who am I register address */
+ return (SENSOR_IO_Read(LIS3MDL_MAG_I2C_ADDRESS_HIGH, LIS3MDL_MAG_WHO_AM_I_REG));
+ 80018ac: 210f movs r1, #15
+ 80018ae: 203c movs r0, #60 @ 0x3c
+ 80018b0: f7ff fc24 bl 80010fc
+ 80018b4: 4603 mov r3, r0
+}
+ 80018b6: 4618 mov r0, r3
+ 80018b8: bd80 pop {r7, pc}
+
+080018ba :
+/**
+ * @brief Set/Unset Magnetometer in low power mode.
+ * @param status 0 means disable Low Power Mode, otherwise Low Power Mode is enabled
+ */
+void LIS3MDL_MagLowPower(uint16_t status)
+{
+ 80018ba: b580 push {r7, lr}
+ 80018bc: b084 sub sp, #16
+ 80018be: af00 add r7, sp, #0
+ 80018c0: 4603 mov r3, r0
+ 80018c2: 80fb strh r3, [r7, #6]
+ uint8_t ctrl = 0;
+ 80018c4: 2300 movs r3, #0
+ 80018c6: 73fb strb r3, [r7, #15]
+
+ /* Read control register 1 value */
+ ctrl = SENSOR_IO_Read(LIS3MDL_MAG_I2C_ADDRESS_HIGH, LIS3MDL_MAG_CTRL_REG3);
+ 80018c8: 2122 movs r1, #34 @ 0x22
+ 80018ca: 203c movs r0, #60 @ 0x3c
+ 80018cc: f7ff fc16 bl 80010fc
+ 80018d0: 4603 mov r3, r0
+ 80018d2: 73fb strb r3, [r7, #15]
+
+ /* Clear Low Power Mode bit */
+ ctrl &= ~(0x20);
+ 80018d4: 7bfb ldrb r3, [r7, #15]
+ 80018d6: f023 0320 bic.w r3, r3, #32
+ 80018da: 73fb strb r3, [r7, #15]
+
+ /* Set Low Power Mode */
+ if(status)
+ 80018dc: 88fb ldrh r3, [r7, #6]
+ 80018de: 2b00 cmp r3, #0
+ 80018e0: d003 beq.n 80018ea
+ {
+ ctrl |= LIS3MDL_MAG_CONFIG_LOWPOWER_MODE;
+ 80018e2: 7bfb ldrb r3, [r7, #15]
+ 80018e4: f043 0320 orr.w r3, r3, #32
+ 80018e8: 73fb strb r3, [r7, #15]
+ {
+ ctrl |= LIS3MDL_MAG_CONFIG_NORMAL_MODE;
+ }
+
+ /* write back control register */
+ SENSOR_IO_Write(LIS3MDL_MAG_I2C_ADDRESS_HIGH, LIS3MDL_MAG_CTRL_REG3, ctrl);
+ 80018ea: 7bfb ldrb r3, [r7, #15]
+ 80018ec: 461a mov r2, r3
+ 80018ee: 2122 movs r1, #34 @ 0x22
+ 80018f0: 203c movs r0, #60 @ 0x3c
+ 80018f2: f7ff fbe9 bl 80010c8
+}
+ 80018f6: bf00 nop
+ 80018f8: 3710 adds r7, #16
+ 80018fa: 46bd mov sp, r7
+ 80018fc: bd80 pop {r7, pc}
+ ...
+
+08001900 :
+/**
+ * @brief Read X, Y & Z Magnetometer values
+ * @param pData: Data out pointer
+ */
+void LIS3MDL_MagReadXYZ(int16_t* pData)
+{
+ 8001900: b580 push {r7, lr}
+ 8001902: b088 sub sp, #32
+ 8001904: af00 add r7, sp, #0
+ 8001906: 6078 str r0, [r7, #4]
+ int16_t pnRawData[3];
+ uint8_t ctrlm= 0;
+ 8001908: 2300 movs r3, #0
+ 800190a: 75fb strb r3, [r7, #23]
+ uint8_t buffer[6];
+ uint8_t i = 0;
+ 800190c: 2300 movs r3, #0
+ 800190e: 77fb strb r3, [r7, #31]
+ float sensitivity = 0;
+ 8001910: f04f 0300 mov.w r3, #0
+ 8001914: 61bb str r3, [r7, #24]
+
+ /* Read the magnetometer control register content */
+ ctrlm = SENSOR_IO_Read(LIS3MDL_MAG_I2C_ADDRESS_HIGH, LIS3MDL_MAG_CTRL_REG2);
+ 8001916: 2121 movs r1, #33 @ 0x21
+ 8001918: 203c movs r0, #60 @ 0x3c
+ 800191a: f7ff fbef bl 80010fc
+ 800191e: 4603 mov r3, r0
+ 8001920: 75fb strb r3, [r7, #23]
+
+ /* Read output register X, Y & Z acceleration */
+ SENSOR_IO_ReadMultiple(LIS3MDL_MAG_I2C_ADDRESS_HIGH, (LIS3MDL_MAG_OUTX_L | 0x80), buffer, 6);
+ 8001922: f107 0208 add.w r2, r7, #8
+ 8001926: 2306 movs r3, #6
+ 8001928: 21a8 movs r1, #168 @ 0xa8
+ 800192a: 203c movs r0, #60 @ 0x3c
+ 800192c: f7ff fc04 bl 8001138
+
+ for(i=0; i<3; i++)
+ 8001930: 2300 movs r3, #0
+ 8001932: 77fb strb r3, [r7, #31]
+ 8001934: e01a b.n 800196c
+ {
+ pnRawData[i]=((((uint16_t)buffer[2*i+1]) << 8) + (uint16_t)buffer[2*i]);
+ 8001936: 7ffb ldrb r3, [r7, #31]
+ 8001938: 005b lsls r3, r3, #1
+ 800193a: 3301 adds r3, #1
+ 800193c: 3320 adds r3, #32
+ 800193e: 443b add r3, r7
+ 8001940: f813 3c18 ldrb.w r3, [r3, #-24]
+ 8001944: 021b lsls r3, r3, #8
+ 8001946: b29b uxth r3, r3
+ 8001948: 7ffa ldrb r2, [r7, #31]
+ 800194a: 0052 lsls r2, r2, #1
+ 800194c: 3220 adds r2, #32
+ 800194e: 443a add r2, r7
+ 8001950: f812 2c18 ldrb.w r2, [r2, #-24]
+ 8001954: 4413 add r3, r2
+ 8001956: b29a uxth r2, r3
+ 8001958: 7ffb ldrb r3, [r7, #31]
+ 800195a: b212 sxth r2, r2
+ 800195c: 005b lsls r3, r3, #1
+ 800195e: 3320 adds r3, #32
+ 8001960: 443b add r3, r7
+ 8001962: f823 2c10 strh.w r2, [r3, #-16]
+ for(i=0; i<3; i++)
+ 8001966: 7ffb ldrb r3, [r7, #31]
+ 8001968: 3301 adds r3, #1
+ 800196a: 77fb strb r3, [r7, #31]
+ 800196c: 7ffb ldrb r3, [r7, #31]
+ 800196e: 2b02 cmp r3, #2
+ 8001970: d9e1 bls.n 8001936
+ }
+
+ /* Normal mode */
+ /* Switch the sensitivity value set in the CRTL_REG2 */
+ switch(ctrlm & 0x60)
+ 8001972: 7dfb ldrb r3, [r7, #23]
+ 8001974: f003 0360 and.w r3, r3, #96 @ 0x60
+ 8001978: 2b60 cmp r3, #96 @ 0x60
+ 800197a: d013 beq.n 80019a4
+ 800197c: 2b60 cmp r3, #96 @ 0x60
+ 800197e: dc14 bgt.n 80019aa
+ 8001980: 2b40 cmp r3, #64 @ 0x40
+ 8001982: d00c beq.n 800199e
+ 8001984: 2b40 cmp r3, #64 @ 0x40
+ 8001986: dc10 bgt.n 80019aa
+ 8001988: 2b00 cmp r3, #0
+ 800198a: d002 beq.n 8001992
+ 800198c: 2b20 cmp r3, #32
+ 800198e: d003 beq.n 8001998
+ 8001990: e00b b.n 80019aa
+ {
+ case LIS3MDL_MAG_FS_4_GA:
+ sensitivity = LIS3MDL_MAG_SENSITIVITY_FOR_FS_4GA;
+ 8001992: 4b19 ldr r3, [pc, #100] @ (80019f8 )
+ 8001994: 61bb str r3, [r7, #24]
+ break;
+ 8001996: e008 b.n 80019aa
+ case LIS3MDL_MAG_FS_8_GA:
+ sensitivity = LIS3MDL_MAG_SENSITIVITY_FOR_FS_8GA;
+ 8001998: 4b18 ldr r3, [pc, #96] @ (80019fc )
+ 800199a: 61bb str r3, [r7, #24]
+ break;
+ 800199c: e005 b.n 80019aa
+ case LIS3MDL_MAG_FS_12_GA:
+ sensitivity = LIS3MDL_MAG_SENSITIVITY_FOR_FS_12GA;
+ 800199e: 4b18 ldr r3, [pc, #96] @ (8001a00 )
+ 80019a0: 61bb str r3, [r7, #24]
+ break;
+ 80019a2: e002 b.n 80019aa
+ case LIS3MDL_MAG_FS_16_GA:
+ sensitivity = LIS3MDL_MAG_SENSITIVITY_FOR_FS_16GA;
+ 80019a4: 4b17 ldr r3, [pc, #92] @ (8001a04 )
+ 80019a6: 61bb str r3, [r7, #24]
+ break;
+ 80019a8: bf00 nop
+ }
+
+ /* Obtain the mGauss value for the three axis */
+ for(i=0; i<3; i++)
+ 80019aa: 2300 movs r3, #0
+ 80019ac: 77fb strb r3, [r7, #31]
+ 80019ae: e01a b.n 80019e6
+ {
+ pData[i]=( int16_t )(pnRawData[i] * sensitivity);
+ 80019b0: 7ffb ldrb r3, [r7, #31]
+ 80019b2: 005b lsls r3, r3, #1
+ 80019b4: 3320 adds r3, #32
+ 80019b6: 443b add r3, r7
+ 80019b8: f933 3c10 ldrsh.w r3, [r3, #-16]
+ 80019bc: ee07 3a90 vmov s15, r3
+ 80019c0: eeb8 7ae7 vcvt.f32.s32 s14, s15
+ 80019c4: edd7 7a06 vldr s15, [r7, #24]
+ 80019c8: ee67 7a27 vmul.f32 s15, s14, s15
+ 80019cc: 7ffb ldrb r3, [r7, #31]
+ 80019ce: 005b lsls r3, r3, #1
+ 80019d0: 687a ldr r2, [r7, #4]
+ 80019d2: 4413 add r3, r2
+ 80019d4: eefd 7ae7 vcvt.s32.f32 s15, s15
+ 80019d8: ee17 2a90 vmov r2, s15
+ 80019dc: b212 sxth r2, r2
+ 80019de: 801a strh r2, [r3, #0]
+ for(i=0; i<3; i++)
+ 80019e0: 7ffb ldrb r3, [r7, #31]
+ 80019e2: 3301 adds r3, #1
+ 80019e4: 77fb strb r3, [r7, #31]
+ 80019e6: 7ffb ldrb r3, [r7, #31]
+ 80019e8: 2b02 cmp r3, #2
+ 80019ea: d9e1 bls.n 80019b0
+ }
+}
+ 80019ec: bf00 nop
+ 80019ee: bf00 nop
+ 80019f0: 3720 adds r7, #32
+ 80019f2: 46bd mov sp, r7
+ 80019f4: bd80 pop {r7, pc}
+ 80019f6: bf00 nop
+ 80019f8: 3e0f5c29 .word 0x3e0f5c29
+ 80019fc: 3e947ae1 .word 0x3e947ae1
+ 8001a00: 3edc28f6 .word 0x3edc28f6
+ 8001a04: 3f147ae1 .word 0x3f147ae1
+
+08001a08 :
+ */
+/**
+ * @brief Set LPS22HB pressure sensor Initialization.
+ */
+void LPS22HB_P_Init(uint16_t DeviceAddr)
+{
+ 8001a08: b580 push {r7, lr}
+ 8001a0a: b082 sub sp, #8
+ 8001a0c: af00 add r7, sp, #0
+ 8001a0e: 4603 mov r3, r0
+ 8001a10: 80fb strh r3, [r7, #6]
+ LPS22HB_Init(DeviceAddr);
+ 8001a12: 88fb ldrh r3, [r7, #6]
+ 8001a14: 4618 mov r0, r3
+ 8001a16: f000 f879 bl 8001b0c
+}
+ 8001a1a: bf00 nop
+ 8001a1c: 3708 adds r7, #8
+ 8001a1e: 46bd mov sp, r7
+ 8001a20: bd80 pop {r7, pc}
+
+08001a22 :
+/**
+ * @brief Read LPS22HB ID.
+ * @retval ID
+ */
+uint8_t LPS22HB_P_ReadID(uint16_t DeviceAddr)
+{
+ 8001a22: b580 push {r7, lr}
+ 8001a24: b084 sub sp, #16
+ 8001a26: af00 add r7, sp, #0
+ 8001a28: 4603 mov r3, r0
+ 8001a2a: 80fb strh r3, [r7, #6]
+ uint8_t ctrl = 0x00;
+ 8001a2c: 2300 movs r3, #0
+ 8001a2e: 73fb strb r3, [r7, #15]
+
+ /* IO interface initialization */
+ SENSOR_IO_Init();
+ 8001a30: f7ff fb40 bl 80010b4
+
+ /* Read value at Who am I register address */
+ ctrl = SENSOR_IO_Read(DeviceAddr, LPS22HB_WHO_AM_I_REG);
+ 8001a34: 88fb ldrh r3, [r7, #6]
+ 8001a36: b2db uxtb r3, r3
+ 8001a38: 210f movs r1, #15
+ 8001a3a: 4618 mov r0, r3
+ 8001a3c: f7ff fb5e bl 80010fc
+ 8001a40: 4603 mov r3, r0
+ 8001a42: 73fb strb r3, [r7, #15]
+
+ return ctrl;
+ 8001a44: 7bfb ldrb r3, [r7, #15]
+}
+ 8001a46: 4618 mov r0, r3
+ 8001a48: 3710 adds r7, #16
+ 8001a4a: 46bd mov sp, r7
+ 8001a4c: bd80 pop {r7, pc}
+ ...
+
+08001a50 :
+/**
+ * @brief Read pressure value of LPS22HB
+ * @retval pressure value
+ */
+float LPS22HB_P_ReadPressure(uint16_t DeviceAddr)
+{
+ 8001a50: b590 push {r4, r7, lr}
+ 8001a52: b087 sub sp, #28
+ 8001a54: af00 add r7, sp, #0
+ 8001a56: 4603 mov r3, r0
+ 8001a58: 80fb strh r3, [r7, #6]
+ int32_t raw_press;
+ uint8_t buffer[3];
+ uint32_t tmp = 0;
+ 8001a5a: 2300 movs r3, #0
+ 8001a5c: 617b str r3, [r7, #20]
+ uint8_t i;
+
+ for(i = 0; i < 3; i++)
+ 8001a5e: 2300 movs r3, #0
+ 8001a60: 74fb strb r3, [r7, #19]
+ 8001a62: e013 b.n 8001a8c
+ {
+ buffer[i] = SENSOR_IO_Read(DeviceAddr, (LPS22HB_PRESS_OUT_XL_REG + i));
+ 8001a64: 88fb ldrh r3, [r7, #6]
+ 8001a66: b2da uxtb r2, r3
+ 8001a68: 7cfb ldrb r3, [r7, #19]
+ 8001a6a: 3328 adds r3, #40 @ 0x28
+ 8001a6c: b2db uxtb r3, r3
+ 8001a6e: 7cfc ldrb r4, [r7, #19]
+ 8001a70: 4619 mov r1, r3
+ 8001a72: 4610 mov r0, r2
+ 8001a74: f7ff fb42 bl 80010fc