: /** * @brief The application entry point. * @retval int */ int main(void) { 8001958: b5f0 push {r4, r5, r6, r7, lr} 800195a: b091 sub sp, #68 @ 0x44 800195c: af04 add r7, sp, #16 /* USER CODE END 1 */ /* MCU Configuration--------------------------------------------------------*/ /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ HAL_Init(); 800195e: f000 fd14 bl 800238a /* USER CODE BEGIN Init */ /* USER CODE END Init */ /* Configure the system clock */ SystemClock_Config(); 8001962: f000 f9d1 bl 8001d08 /* USER CODE BEGIN SysInit */ /* USER CODE END SysInit */ /* Initialize all configured peripherals */ MX_GPIO_Init(); 8001966: f000 fa91 bl 8001e8c MX_I2C2_Init(); 800196a: f000 fa1f bl 8001dac MX_USART1_UART_Init(); 800196e: f000 fa5d bl 8001e2c /* USER CODE BEGIN 2 */ // LCD44780 INIT lcd_reset(); 8001972: f7ff fd47 bl 8001404 lcd_display_settings(1,0,0); 8001976: 2200 movs r2, #0 8001978: 2100 movs r1, #0 800197a: 2001 movs r0, #1 800197c: f7ff fe52 bl 8001624 lcd_clear(); 8001980: f7ff fe3e bl 8001600 // LPS22 INIT LPS22_Init(); 8001984: f7ff fcde bl 8001344 // HTS221 INIT HTS221_Init(); 8001988: f7ff fc64 bl 8001254 // USART INTERRUPTIONS HAL_UART_Receive_IT(&huart1, &rxByte, 1); 800198c: 2201 movs r2, #1 800198e: 49a4 ldr r1, [pc, #656] @ (8001c20 ) 8001990: 48a4 ldr r0, [pc, #656] @ (8001c24 ) 8001992: f003 fb01 bl 8004f98 /* Infinite loop */ /* USER CODE BEGIN WHILE */ while (1) { uint8_t str[20]; float pressure = LPS22_ReadPress(); 8001996: f7ff fced bl 8001374 800199a: ed87 0a0b vstr s0, [r7, #44] @ 0x2c THSample ths = HTS221_Read(); 800199e: f7ff fc73 bl 8001288 80019a2: eeb0 7a40 vmov.f32 s14, s0 80019a6: eef0 7a60 vmov.f32 s15, s1 80019aa: ed87 7a00 vstr s14, [r7] 80019ae: edc7 7a01 vstr s15, [r7, #4] if (ths.temp > maxTemp) maxTemp = ths.temp; 80019b2: ed97 7a00 vldr s14, [r7] 80019b6: 4b9c ldr r3, [pc, #624] @ (8001c28 ) 80019b8: edd3 7a00 vldr s15, [r3] 80019bc: eeb4 7ae7 vcmpe.f32 s14, s15 80019c0: eef1 fa10 vmrs APSR_nzcv, fpscr 80019c4: dd02 ble.n 80019cc 80019c6: 683b ldr r3, [r7, #0] 80019c8: 4a97 ldr r2, [pc, #604] @ (8001c28 ) 80019ca: 6013 str r3, [r2, #0] if (ths.temp < minTemp) minTemp = ths.temp; 80019cc: ed97 7a00 vldr s14, [r7] 80019d0: 4b96 ldr r3, [pc, #600] @ (8001c2c ) 80019d2: edd3 7a00 vldr s15, [r3] 80019d6: eeb4 7ae7 vcmpe.f32 s14, s15 80019da: eef1 fa10 vmrs APSR_nzcv, fpscr 80019de: d502 bpl.n 80019e6 80019e0: 683b ldr r3, [r7, #0] 80019e2: 4a92 ldr r2, [pc, #584] @ (8001c2c ) 80019e4: 6013 str r3, [r2, #0] if (ths.hum > maxHum) maxHum = ths.hum; 80019e6: ed97 7a01 vldr s14, [r7, #4] 80019ea: 4b91 ldr r3, [pc, #580] @ (8001c30 ) 80019ec: edd3 7a00 vldr s15, [r3] 80019f0: eeb4 7ae7 vcmpe.f32 s14, s15 80019f4: eef1 fa10 vmrs APSR_nzcv, fpscr 80019f8: dd02 ble.n 8001a00 80019fa: 687b ldr r3, [r7, #4] 80019fc: 4a8c ldr r2, [pc, #560] @ (8001c30 ) 80019fe: 6013 str r3, [r2, #0] if (ths.hum < minHum) minHum = ths.hum; 8001a00: ed97 7a01 vldr s14, [r7, #4] 8001a04: 4b8b ldr r3, [pc, #556] @ (8001c34 ) 8001a06: edd3 7a00 vldr s15, [r3] 8001a0a: eeb4 7ae7 vcmpe.f32 s14, s15 8001a0e: eef1 fa10 vmrs APSR_nzcv, fpscr 8001a12: d502 bpl.n 8001a1a 8001a14: 687b ldr r3, [r7, #4] 8001a16: 4a87 ldr r2, [pc, #540] @ (8001c34 ) 8001a18: 6013 str r3, [r2, #0] if (pressure > maxPress) maxPress = pressure; 8001a1a: 4b87 ldr r3, [pc, #540] @ (8001c38 ) 8001a1c: edd3 7a00 vldr s15, [r3] 8001a20: ed97 7a0b vldr s14, [r7, #44] @ 0x2c 8001a24: eeb4 7ae7 vcmpe.f32 s14, s15 8001a28: eef1 fa10 vmrs APSR_nzcv, fpscr 8001a2c: dd02 ble.n 8001a34 8001a2e: 4a82 ldr r2, [pc, #520] @ (8001c38 ) 8001a30: 6afb ldr r3, [r7, #44] @ 0x2c 8001a32: 6013 str r3, [r2, #0] if (pressure < minPress) minPress = pressure; 8001a34: 4b81 ldr r3, [pc, #516] @ (8001c3c ) 8001a36: edd3 7a00 vldr s15, [r3] 8001a3a: ed97 7a0b vldr s14, [r7, #44] @ 0x2c 8001a3e: eeb4 7ae7 vcmpe.f32 s14, s15 8001a42: eef1 fa10 vmrs APSR_nzcv, fpscr 8001a46: d502 bpl.n 8001a4e 8001a48: 4a7c ldr r2, [pc, #496] @ (8001c3c ) 8001a4a: 6afb ldr r3, [r7, #44] @ 0x2c 8001a4c: 6013 str r3, [r2, #0] float tempToShow = useFahrenheit ? (ths.temp * 9.0 / 5.0) + 32 : ths.temp; // convertir a ºF si es necesario 8001a4e: 4b7c ldr r3, [pc, #496] @ (8001c40 ) 8001a50: 681b ldr r3, [r3, #0] 8001a52: 2b00 cmp r3, #0 8001a54: d022 beq.n 8001a9c 8001a56: 683b ldr r3, [r7, #0] 8001a58: 4618 mov r0, r3 8001a5a: f7fe fd75 bl 8000548 <__aeabi_f2d> 8001a5e: f04f 0200 mov.w r2, #0 8001a62: 4b78 ldr r3, [pc, #480] @ (8001c44 ) 8001a64: f7fe fdc8 bl 80005f8 <__aeabi_dmul> 8001a68: 4602 mov r2, r0 8001a6a: 460b mov r3, r1 8001a6c: 4610 mov r0, r2 8001a6e: 4619 mov r1, r3 8001a70: f04f 0200 mov.w r2, #0 8001a74: 4b74 ldr r3, [pc, #464] @ (8001c48 ) 8001a76: f7fe fee9 bl 800084c <__aeabi_ddiv> 8001a7a: 4602 mov r2, r0 8001a7c: 460b mov r3, r1 8001a7e: 4610 mov r0, r2 8001a80: 4619 mov r1, r3 8001a82: f04f 0200 mov.w r2, #0 8001a86: 4b71 ldr r3, [pc, #452] @ (8001c4c ) 8001a88: f7fe fc00 bl 800028c <__adddf3> 8001a8c: 4602 mov r2, r0 8001a8e: 460b mov r3, r1 8001a90: 4610 mov r0, r2 8001a92: 4619 mov r1, r3 8001a94: f7ff f888 bl 8000ba8 <__aeabi_d2f> 8001a98: 4603 mov r3, r0 8001a9a: e000 b.n 8001a9e 8001a9c: 683b ldr r3, [r7, #0] 8001a9e: 62bb str r3, [r7, #40] @ 0x28 float pressureToShow = useFahrenheit ? pressure * 0.75006 : pressure; // convertir a mmHg si es necesario 8001aa0: 4b67 ldr r3, [pc, #412] @ (8001c40 ) 8001aa2: 681b ldr r3, [r3, #0] 8001aa4: 2b00 cmp r3, #0 8001aa6: d00f beq.n 8001ac8 8001aa8: 6af8 ldr r0, [r7, #44] @ 0x2c 8001aaa: f7fe fd4d bl 8000548 <__aeabi_f2d> 8001aae: a35a add r3, pc, #360 @ (adr r3, 8001c18 ) 8001ab0: e9d3 2300 ldrd r2, r3, [r3] 8001ab4: f7fe fda0 bl 80005f8 <__aeabi_dmul> 8001ab8: 4602 mov r2, r0 8001aba: 460b mov r3, r1 8001abc: 4610 mov r0, r2 8001abe: 4619 mov r1, r3 8001ac0: f7ff f872 bl 8000ba8 <__aeabi_d2f> 8001ac4: 4603 mov r3, r0 8001ac6: e000 b.n 8001aca 8001ac8: 6afb ldr r3, [r7, #44] @ 0x2c 8001aca: 627b str r3, [r7, #36] @ 0x24 char tempUnit = useFahrenheit ? 'F' : 'C'; 8001acc: 4b5c ldr r3, [pc, #368] @ (8001c40 ) 8001ace: 681b ldr r3, [r3, #0] 8001ad0: 2b00 cmp r3, #0 8001ad2: d001 beq.n 8001ad8 8001ad4: 2346 movs r3, #70 @ 0x46 8001ad6: e000 b.n 8001ada 8001ad8: 2343 movs r3, #67 @ 0x43 8001ada: f887 3023 strb.w r3, [r7, #35] @ 0x23 const char *pressUnit = useFahrenheit ? "mmHg" : "hPa"; 8001ade: 4b58 ldr r3, [pc, #352] @ (8001c40 ) 8001ae0: 681b ldr r3, [r3, #0] 8001ae2: 2b00 cmp r3, #0 8001ae4: d001 beq.n 8001aea 8001ae6: 4b5a ldr r3, [pc, #360] @ (8001c50 ) 8001ae8: e000 b.n 8001aec 8001aea: 4b5a ldr r3, [pc, #360] @ (8001c54 ) 8001aec: 61fb str r3, [r7, #28] switch (displayMode) { 8001aee: 4b5a ldr r3, [pc, #360] @ (8001c58 ) 8001af0: 781b ldrb r3, [r3, #0] 8001af2: 2b6d cmp r3, #109 @ 0x6d 8001af4: d002 beq.n 8001afc 8001af6: 2b6e cmp r3, #110 @ 0x6e 8001af8: d047 beq.n 8001b8a 8001afa: e0b7 b.n 8001c6c case 'm': sprintf(str, "Max: %.1f%c %.1f%%", maxTemp, tempUnit, maxHum); 8001afc: 4b4a ldr r3, [pc, #296] @ (8001c28 ) 8001afe: 681b ldr r3, [r3, #0] 8001b00: 4618 mov r0, r3 8001b02: f7fe fd21 bl 8000548 <__aeabi_f2d> 8001b06: 4604 mov r4, r0 8001b08: 460d mov r5, r1 8001b0a: f897 6023 ldrb.w r6, [r7, #35] @ 0x23 8001b0e: 4b48 ldr r3, [pc, #288] @ (8001c30 ) 8001b10: 681b ldr r3, [r3, #0] 8001b12: 4618 mov r0, r3 8001b14: f7fe fd18 bl 8000548 <__aeabi_f2d> 8001b18: 4602 mov r2, r0 8001b1a: 460b mov r3, r1 8001b1c: f107 0008 add.w r0, r7, #8 8001b20: e9cd 2302 strd r2, r3, [sp, #8] 8001b24: 9600 str r6, [sp, #0] 8001b26: 4622 mov r2, r4 8001b28: 462b mov r3, r5 8001b2a: 494c ldr r1, [pc, #304] @ (8001c5c ) 8001b2c: f005 fa70 bl 8007010 moveToXY(0, 0); 8001b30: 2100 movs r1, #0 8001b32: 2000 movs r0, #0 8001b34: f7ff fe1c bl 8001770 lcd_print(str); 8001b38: f107 0308 add.w r3, r7, #8 8001b3c: 4618 mov r0, r3 8001b3e: f7ff fda5 bl 800168c printf("%s\n\r", str); // Enviar a consola UART 8001b42: f107 0308 add.w r3, r7, #8 8001b46: 4619 mov r1, r3 8001b48: 4845 ldr r0, [pc, #276] @ (8001c60 ) 8001b4a: f005 fa4f bl 8006fec sprintf(str, "Pres: %.1f%s", maxPress, pressUnit); 8001b4e: 4b3a ldr r3, [pc, #232] @ (8001c38 ) 8001b50: 681b ldr r3, [r3, #0] 8001b52: 4618 mov r0, r3 8001b54: f7fe fcf8 bl 8000548 <__aeabi_f2d> 8001b58: 4602 mov r2, r0 8001b5a: 460b mov r3, r1 8001b5c: f107 0008 add.w r0, r7, #8 8001b60: 69f9 ldr r1, [r7, #28] 8001b62: 9100 str r1, [sp, #0] 8001b64: 493f ldr r1, [pc, #252] @ (8001c64 ) 8001b66: f005 fa53 bl 8007010 moveToXY(1, 1); 8001b6a: 2101 movs r1, #1 8001b6c: 2001 movs r0, #1 8001b6e: f7ff fdff bl 8001770 lcd_print(str); 8001b72: f107 0308 add.w r3, r7, #8 8001b76: 4618 mov r0, r3 8001b78: f7ff fd88 bl 800168c printf("%s\n\r", str); // Enviar a consola UART 8001b7c: f107 0308 add.w r3, r7, #8 8001b80: 4619 mov r1, r3 8001b82: 4837 ldr r0, [pc, #220] @ (8001c60 ) 8001b84: f005 fa32 bl 8006fec break; 8001b88: e0b2 b.n 8001cf0 case 'n': sprintf(str, "Min: %.1f%c %.1f%%", minTemp, tempUnit, minHum); 8001b8a: 4b28 ldr r3, [pc, #160] @ (8001c2c ) 8001b8c: 681b ldr r3, [r3, #0] 8001b8e: 4618 mov r0, r3 8001b90: f7fe fcda bl 8000548 <__aeabi_f2d> 8001b94: 4604 mov r4, r0 8001b96: 460d mov r5, r1 8001b98: f897 6023 ldrb.w r6, [r7, #35] @ 0x23 8001b9c: 4b25 ldr r3, [pc, #148] @ (8001c34 ) 8001b9e: 681b ldr r3, [r3, #0] 8001ba0: 4618 mov r0, r3 8001ba2: f7fe fcd1 bl 8000548 <__aeabi_f2d> 8001ba6: 4602 mov r2, r0 8001ba8: 460b mov r3, r1 8001baa: f107 0008 add.w r0, r7, #8 8001bae: e9cd 2302 strd r2, r3, [sp, #8] 8001bb2: 9600 str r6, [sp, #0] 8001bb4: 4622 mov r2, r4 8001bb6: 462b mov r3, r5 8001bb8: 492b ldr r1, [pc, #172] @ (8001c68 ) 8001bba: f005 fa29 bl 8007010 moveToXY(0, 0); 8001bbe: 2100 movs r1, #0 8001bc0: 2000 movs r0, #0 8001bc2: f7ff fdd5 bl 8001770 lcd_print(str); 8001bc6: f107 0308 add.w r3, r7, #8 8001bca: 4618 mov r0, r3 8001bcc: f7ff fd5e bl 800168c printf("%s\n\r", str); // Enviar a consola UART 8001bd0: f107 0308 add.w r3, r7, #8 8001bd4: 4619 mov r1, r3 8001bd6: 4822 ldr r0, [pc, #136] @ (8001c60 ) 8001bd8: f005 fa08 bl 8006fec sprintf(str, "Pres: %.1f%s", minPress, pressUnit); 8001bdc: 4b17 ldr r3, [pc, #92] @ (8001c3c ) 8001bde: 681b ldr r3, [r3, #0] 8001be0: 4618 mov r0, r3 8001be2: f7fe fcb1 bl 8000548 <__aeabi_f2d> 8001be6: 4602 mov r2, r0 8001be8: 460b mov r3, r1 8001bea: f107 0008 add.w r0, r7, #8 8001bee: 69f9 ldr r1, [r7, #28] 8001bf0: 9100 str r1, [sp, #0] 8001bf2: 491c ldr r1, [pc, #112] @ (8001c64 ) 8001bf4: f005 fa0c bl 8007010 moveToXY(1, 1); 8001bf8: 2101 movs r1, #1 8001bfa: 2001 movs r0, #1 8001bfc: f7ff fdb8 bl 8001770 lcd_print(str); 8001c00: f107 0308 add.w r3, r7, #8 8001c04: 4618 mov r0, r3 8001c06: f7ff fd41 bl 800168c printf("%s\n\r", str); // Enviar a consola UART 8001c0a: f107 0308 add.w r3, r7, #8 8001c0e: 4619 mov r1, r3 8001c10: 4813 ldr r0, [pc, #76] @ (8001c60 ) 8001c12: f005 f9eb bl 8006fec break; 8001c16: e06b b.n 8001cf0 8001c18: d4413554 .word 0xd4413554 8001c1c: 3fe8007d .word 0x3fe8007d 8001c20: 20000314 .word 0x20000314 8001c24: 2000028c .word 0x2000028c 8001c28: 20000004 .word 0x20000004 8001c2c: 20000008 .word 0x20000008 8001c30: 2000031c .word 0x2000031c 8001c34: 2000000c .word 0x2000000c 8001c38: 20000320 .word 0x20000320 8001c3c: 20000010 .word 0x20000010 8001c40: 20000318 .word 0x20000318 8001c44: 40220000 .word 0x40220000 8001c48: 40140000 .word 0x40140000 8001c4c: 40400000 .word 0x40400000 8001c50: 08009298 .word 0x08009298 8001c54: 080092a0 .word 0x080092a0 8001c58: 20000000 .word 0x20000000 8001c5c: 080092a4 .word 0x080092a4 8001c60: 080092b8 .word 0x080092b8 8001c64: 080092c0 .word 0x080092c0 8001c68: 080092d0 .word 0x080092d0 default: sprintf(str, "T:%.1f%c H:%.1f%%", tempToShow, tempUnit, ths.hum); 8001c6c: 6ab8 ldr r0, [r7, #40] @ 0x28 8001c6e: f7fe fc6b bl 8000548 <__aeabi_f2d> 8001c72: 4604 mov r4, r0 8001c74: 460d mov r5, r1 8001c76: f897 6023 ldrb.w r6, [r7, #35] @ 0x23 8001c7a: 687b ldr r3, [r7, #4] 8001c7c: 4618 mov r0, r3 8001c7e: f7fe fc63 bl 8000548 <__aeabi_f2d> 8001c82: 4602 mov r2, r0 8001c84: 460b mov r3, r1 8001c86: f107 0008 add.w r0, r7, #8 8001c8a: e9cd 2302 strd r2, r3, [sp, #8] 8001c8e: 9600 str r6, [sp, #0] 8001c90: 4622 mov r2, r4 8001c92: 462b mov r3, r5 8001c94: 4919 ldr r1, [pc, #100] @ (8001cfc ) 8001c96: f005 f9bb bl 8007010 moveToXY(0, 0); 8001c9a: 2100 movs r1, #0 8001c9c: 2000 movs r0, #0 8001c9e: f7ff fd67 bl 8001770 lcd_print(str); 8001ca2: f107 0308 add.w r3, r7, #8 8001ca6: 4618 mov r0, r3 8001ca8: f7ff fcf0 bl 800168c printf("%s\n\r", str); // Enviar a consola UART 8001cac: f107 0308 add.w r3, r7, #8 8001cb0: 4619 mov r1, r3 8001cb2: 4813 ldr r0, [pc, #76] @ (8001d00 ) 8001cb4: f005 f99a bl 8006fec sprintf(str, "Pres: %.1f%s", pressureToShow, pressUnit); 8001cb8: 6a78 ldr r0, [r7, #36] @ 0x24 8001cba: f7fe fc45 bl 8000548 <__aeabi_f2d> 8001cbe: 4602 mov r2, r0 8001cc0: 460b mov r3, r1 8001cc2: f107 0008 add.w r0, r7, #8 8001cc6: 69f9 ldr r1, [r7, #28] 8001cc8: 9100 str r1, [sp, #0] 8001cca: 490e ldr r1, [pc, #56] @ (8001d04 ) 8001ccc: f005 f9a0 bl 8007010 moveToXY(1, 1); 8001cd0: 2101 movs r1, #1 8001cd2: 2001 movs r0, #1 8001cd4: f7ff fd4c bl 8001770 lcd_print(str); 8001cd8: f107 0308 add.w r3, r7, #8 8001cdc: 4618 mov r0, r3 8001cde: f7ff fcd5 bl 800168c printf("%s\n\r", str); // Enviar a consola UART 8001ce2: f107 0308 add.w r3, r7, #8 8001ce6: 4619 mov r1, r3 8001ce8: 4805 ldr r0, [pc, #20] @ (8001d00 ) 8001cea: f005 f97f bl 8006fec break; 8001cee: bf00 nop } HAL_Delay(500); 8001cf0: f44f 70fa mov.w r0, #500 @ 0x1f4 8001cf4: f000 fbbe bl 8002474 { 8001cf8: e64d b.n 8001996 8001cfa: bf00 nop 8001cfc: 080092e4 .word 0x080092e4 8001d00: 080092b8 .word 0x080092b8 8001d04: 080092c0 .word 0x080092c0 08001d08 : /** * @brief System Clock Configuration * @retval None */ void SystemClock_Config(void) { 8001d08: b580 push {r7, lr} 8001d0a: b096 sub sp, #88 @ 0x58 8001d0c: af00 add r7, sp, #0 RCC_OscInitTypeDef RCC_OscInitStruct = {0}; 8001d0e: f107 0314 add.w r3, r7, #20 8001d12: 2244 movs r2, #68 @ 0x44 8001d14: 2100 movs r1, #0 8001d16: 4618 mov r0, r3 8001d18: f005 f9df bl 80070da RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; 8001d1c: 463b mov r3, r7 8001d1e: 2200 movs r2, #0 8001d20: 601a str r2, [r3, #0] 8001d22: 605a str r2, [r3, #4] 8001d24: 609a str r2, [r3, #8] 8001d26: 60da str r2, [r3, #12] 8001d28: 611a str r2, [r3, #16] /** Configure the main internal regulator output voltage */ if (HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1) != HAL_OK) 8001d2a: f44f 7000 mov.w r0, #512 @ 0x200 8001d2e: f001 fd49 bl 80037c4 8001d32: 4603 mov r3, r0 8001d34: 2b00 cmp r3, #0 8001d36: d001 beq.n 8001d3c { Error_Handler(); 8001d38: f000 f8fe bl 8001f38 } /** Initializes the RCC Oscillators according to the specified parameters * in the RCC_OscInitTypeDef structure. */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI; 8001d3c: 2310 movs r3, #16 8001d3e: 617b str r3, [r7, #20] RCC_OscInitStruct.MSIState = RCC_MSI_ON; 8001d40: 2301 movs r3, #1 8001d42: 62fb str r3, [r7, #44] @ 0x2c RCC_OscInitStruct.MSICalibrationValue = 0; 8001d44: 2300 movs r3, #0 8001d46: 633b str r3, [r7, #48] @ 0x30 RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_6; 8001d48: 2360 movs r3, #96 @ 0x60 8001d4a: 637b str r3, [r7, #52] @ 0x34 RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; 8001d4c: 2302 movs r3, #2 8001d4e: 63fb str r3, [r7, #60] @ 0x3c RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_MSI; 8001d50: 2301 movs r3, #1 8001d52: 643b str r3, [r7, #64] @ 0x40 RCC_OscInitStruct.PLL.PLLM = 1; 8001d54: 2301 movs r3, #1 8001d56: 647b str r3, [r7, #68] @ 0x44 RCC_OscInitStruct.PLL.PLLN = 40; 8001d58: 2328 movs r3, #40 @ 0x28 8001d5a: 64bb str r3, [r7, #72] @ 0x48 RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV7; 8001d5c: 2307 movs r3, #7 8001d5e: 64fb str r3, [r7, #76] @ 0x4c RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2; 8001d60: 2302 movs r3, #2 8001d62: 653b str r3, [r7, #80] @ 0x50 RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2; 8001d64: 2302 movs r3, #2 8001d66: 657b str r3, [r7, #84] @ 0x54 if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) 8001d68: f107 0314 add.w r3, r7, #20 8001d6c: 4618 mov r0, r3 8001d6e: f001 fd7f bl 8003870 8001d72: 4603 mov r3, r0 8001d74: 2b00 cmp r3, #0 8001d76: d001 beq.n 8001d7c { Error_Handler(); 8001d78: f000 f8de bl 8001f38 } /** Initializes the CPU, AHB and APB buses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK 8001d7c: 230f movs r3, #15 8001d7e: 603b str r3, [r7, #0] |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; 8001d80: 2303 movs r3, #3 8001d82: 607b str r3, [r7, #4] RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; 8001d84: 2300 movs r3, #0 8001d86: 60bb str r3, [r7, #8] RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; 8001d88: 2300 movs r3, #0 8001d8a: 60fb str r3, [r7, #12] RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; 8001d8c: 2300 movs r3, #0 8001d8e: 613b str r3, [r7, #16] if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK) 8001d90: 463b mov r3, r7 8001d92: 2104 movs r1, #4 8001d94: 4618 mov r0, r3 8001d96: f002 f947 bl 8004028 8001d9a: 4603 mov r3, r0 8001d9c: 2b00 cmp r3, #0 8001d9e: d001 beq.n 8001da4 { Error_Handler(); 8001da0: f000 f8ca bl 8001f38 } } 8001da4: bf00 nop 8001da6: 3758 adds r7, #88 @ 0x58 8001da8: 46bd mov sp, r7 8001daa: bd80 pop {r7, pc} 08001dac : * @brief I2C2 Initialization Function * @param None * @retval None */ static void MX_I2C2_Init(void) { 8001dac: b580 push {r7, lr} 8001dae: af00 add r7, sp, #0 /* USER CODE END I2C2_Init 0 */ /* USER CODE BEGIN I2C2_Init 1 */ /* USER CODE END I2C2_Init 1 */ hi2c2.Instance = I2C2; 8001db0: 4b1b ldr r3, [pc, #108] @ (8001e20 ) 8001db2: 4a1c ldr r2, [pc, #112] @ (8001e24 ) 8001db4: 601a str r2, [r3, #0] hi2c2.Init.Timing = 0x10D19CE4; 8001db6: 4b1a ldr r3, [pc, #104] @ (8001e20 ) 8001db8: 4a1b ldr r2, [pc, #108] @ (8001e28 ) 8001dba: 605a str r2, [r3, #4] hi2c2.Init.OwnAddress1 = 0; 8001dbc: 4b18 ldr r3, [pc, #96] @ (8001e20 ) 8001dbe: 2200 movs r2, #0 8001dc0: 609a str r2, [r3, #8] hi2c2.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT; 8001dc2: 4b17 ldr r3, [pc, #92] @ (8001e20 ) 8001dc4: 2201 movs r2, #1 8001dc6: 60da str r2, [r3, #12] hi2c2.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE; 8001dc8: 4b15 ldr r3, [pc, #84] @ (8001e20 ) 8001dca: 2200 movs r2, #0 8001dcc: 611a str r2, [r3, #16] hi2c2.Init.OwnAddress2 = 0; 8001dce: 4b14 ldr r3, [pc, #80] @ (8001e20 ) 8001dd0: 2200 movs r2, #0 8001dd2: 615a str r2, [r3, #20] hi2c2.Init.OwnAddress2Masks = I2C_OA2_NOMASK; 8001dd4: 4b12 ldr r3, [pc, #72] @ (8001e20 ) 8001dd6: 2200 movs r2, #0 8001dd8: 619a str r2, [r3, #24] hi2c2.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE; 8001dda: 4b11 ldr r3, [pc, #68] @ (8001e20 ) 8001ddc: 2200 movs r2, #0 8001dde: 61da str r2, [r3, #28] hi2c2.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE; 8001de0: 4b0f ldr r3, [pc, #60] @ (8001e20 ) 8001de2: 2200 movs r2, #0 8001de4: 621a str r2, [r3, #32] if (HAL_I2C_Init(&hi2c2) != HAL_OK) 8001de6: 480e ldr r0, [pc, #56] @ (8001e20 ) 8001de8: f000 feba bl 8002b60 8001dec: 4603 mov r3, r0 8001dee: 2b00 cmp r3, #0 8001df0: d001 beq.n 8001df6 { Error_Handler(); 8001df2: f000 f8a1 bl 8001f38 } /** Configure Analogue filter */ if (HAL_I2CEx_ConfigAnalogFilter(&hi2c2, I2C_ANALOGFILTER_ENABLE) != HAL_OK) 8001df6: 2100 movs r1, #0 8001df8: 4809 ldr r0, [pc, #36] @ (8001e20 ) 8001dfa: f001 fc3d bl 8003678 8001dfe: 4603 mov r3, r0 8001e00: 2b00 cmp r3, #0 8001e02: d001 beq.n 8001e08 { Error_Handler(); 8001e04: f000 f898 bl 8001f38 } /** Configure Digital filter */ if (HAL_I2CEx_ConfigDigitalFilter(&hi2c2, 0) != HAL_OK) 8001e08: 2100 movs r1, #0 8001e0a: 4805 ldr r0, [pc, #20] @ (8001e20 ) 8001e0c: f001 fc7f bl 800370e 8001e10: 4603 mov r3, r0 8001e12: 2b00 cmp r3, #0 8001e14: d001 beq.n 8001e1a { Error_Handler(); 8001e16: f000 f88f bl 8001f38 } /* USER CODE BEGIN I2C2_Init 2 */ /* USER CODE END I2C2_Init 2 */ } 8001e1a: bf00 nop 8001e1c: bd80 pop {r7, pc} 8001e1e: bf00 nop 8001e20: 20000238 .word 0x20000238 8001e24: 40005800 .word 0x40005800 8001e28: 10d19ce4 .word 0x10d19ce4 08001e2c : * @brief USART1 Initialization Function * @param None * @retval None */ static void MX_USART1_UART_Init(void) { 8001e2c: b580 push {r7, lr} 8001e2e: af00 add r7, sp, #0 /* USER CODE END USART1_Init 0 */ /* USER CODE BEGIN USART1_Init 1 */ /* USER CODE END USART1_Init 1 */ huart1.Instance = USART1; 8001e30: 4b14 ldr r3, [pc, #80] @ (8001e84 ) 8001e32: 4a15 ldr r2, [pc, #84] @ (8001e88 ) 8001e34: 601a str r2, [r3, #0] huart1.Init.BaudRate = 115200; 8001e36: 4b13 ldr r3, [pc, #76] @ (8001e84 ) 8001e38: f44f 32e1 mov.w r2, #115200 @ 0x1c200 8001e3c: 605a str r2, [r3, #4] huart1.Init.WordLength = UART_WORDLENGTH_8B; 8001e3e: 4b11 ldr r3, [pc, #68] @ (8001e84 ) 8001e40: 2200 movs r2, #0 8001e42: 609a str r2, [r3, #8] huart1.Init.StopBits = UART_STOPBITS_1; 8001e44: 4b0f ldr r3, [pc, #60] @ (8001e84 ) 8001e46: 2200 movs r2, #0 8001e48: 60da str r2, [r3, #12] huart1.Init.Parity = UART_PARITY_NONE; 8001e4a: 4b0e ldr r3, [pc, #56] @ (8001e84 ) 8001e4c: 2200 movs r2, #0 8001e4e: 611a str r2, [r3, #16] huart1.Init.Mode = UART_MODE_TX_RX; 8001e50: 4b0c ldr r3, [pc, #48] @ (8001e84 ) 8001e52: 220c movs r2, #12 8001e54: 615a str r2, [r3, #20] huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE; 8001e56: 4b0b ldr r3, [pc, #44] @ (8001e84 ) 8001e58: 2200 movs r2, #0 8001e5a: 619a str r2, [r3, #24] huart1.Init.OverSampling = UART_OVERSAMPLING_16; 8001e5c: 4b09 ldr r3, [pc, #36] @ (8001e84 ) 8001e5e: 2200 movs r2, #0 8001e60: 61da str r2, [r3, #28] huart1.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; 8001e62: 4b08 ldr r3, [pc, #32] @ (8001e84 ) 8001e64: 2200 movs r2, #0 8001e66: 621a str r2, [r3, #32] huart1.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT; 8001e68: 4b06 ldr r3, [pc, #24] @ (8001e84 ) 8001e6a: 2200 movs r2, #0 8001e6c: 625a str r2, [r3, #36] @ 0x24 if (HAL_UART_Init(&huart1) != HAL_OK) 8001e6e: 4805 ldr r0, [pc, #20] @ (8001e84 ) 8001e70: f002 ffba bl 8004de8 8001e74: 4603 mov r3, r0 8001e76: 2b00 cmp r3, #0 8001e78: d001 beq.n 8001e7e { Error_Handler(); 8001e7a: f000 f85d bl 8001f38 } /* USER CODE BEGIN USART1_Init 2 */ /* USER CODE END USART1_Init 2 */ } 8001e7e: bf00 nop 8001e80: bd80 pop {r7, pc} 8001e82: bf00 nop 8001e84: 2000028c .word 0x2000028c 8001e88: 40013800 .word 0x40013800 08001e8c : * @brief GPIO Initialization Function * @param None * @retval None */ static void MX_GPIO_Init(void) { 8001e8c: b580 push {r7, lr} 8001e8e: b088 sub sp, #32 8001e90: af00 add r7, sp, #0 GPIO_InitTypeDef GPIO_InitStruct = {0}; 8001e92: f107 030c add.w r3, r7, #12 8001e96: 2200 movs r2, #0 8001e98: 601a str r2, [r3, #0] 8001e9a: 605a str r2, [r3, #4] 8001e9c: 609a str r2, [r3, #8] 8001e9e: 60da str r2, [r3, #12] 8001ea0: 611a str r2, [r3, #16] /* USER CODE BEGIN MX_GPIO_Init_1 */ /* USER CODE END MX_GPIO_Init_1 */ /* GPIO Ports Clock Enable */ __HAL_RCC_GPIOA_CLK_ENABLE(); 8001ea2: 4b23 ldr r3, [pc, #140] @ (8001f30 ) 8001ea4: 6cdb ldr r3, [r3, #76] @ 0x4c 8001ea6: 4a22 ldr r2, [pc, #136] @ (8001f30 ) 8001ea8: f043 0301 orr.w r3, r3, #1 8001eac: 64d3 str r3, [r2, #76] @ 0x4c 8001eae: 4b20 ldr r3, [pc, #128] @ (8001f30 ) 8001eb0: 6cdb ldr r3, [r3, #76] @ 0x4c 8001eb2: f003 0301 and.w r3, r3, #1 8001eb6: 60bb str r3, [r7, #8] 8001eb8: 68bb ldr r3, [r7, #8] __HAL_RCC_GPIOB_CLK_ENABLE(); 8001eba: 4b1d ldr r3, [pc, #116] @ (8001f30 ) 8001ebc: 6cdb ldr r3, [r3, #76] @ 0x4c 8001ebe: 4a1c ldr r2, [pc, #112] @ (8001f30 ) 8001ec0: f043 0302 orr.w r3, r3, #2 8001ec4: 64d3 str r3, [r2, #76] @ 0x4c 8001ec6: 4b1a ldr r3, [pc, #104] @ (8001f30 ) 8001ec8: 6cdb ldr r3, [r3, #76] @ 0x4c 8001eca: f003 0302 and.w r3, r3, #2 8001ece: 607b str r3, [r7, #4] 8001ed0: 687b ldr r3, [r7, #4] /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOA, Led_LCD_Pin|D4_LCD_Pin|D7_LCD_Pin|E_LCD_Pin, GPIO_PIN_RESET); 8001ed2: 2200 movs r2, #0 8001ed4: f248 011c movw r1, #32796 @ 0x801c 8001ed8: f04f 4090 mov.w r0, #1207959552 @ 0x48000000 8001edc: f000 fe28 bl 8002b30 /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOB, D6_LCD_Pin|RS_LCD_Pin|D5_LCD_Pin, GPIO_PIN_RESET); 8001ee0: 2200 movs r2, #0 8001ee2: 2116 movs r1, #22 8001ee4: 4813 ldr r0, [pc, #76] @ (8001f34 ) 8001ee6: f000 fe23 bl 8002b30 /*Configure GPIO pins : Led_LCD_Pin D4_LCD_Pin D7_LCD_Pin E_LCD_Pin */ GPIO_InitStruct.Pin = Led_LCD_Pin|D4_LCD_Pin|D7_LCD_Pin|E_LCD_Pin; 8001eea: f248 031c movw r3, #32796 @ 0x801c 8001eee: 60fb str r3, [r7, #12] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 8001ef0: 2301 movs r3, #1 8001ef2: 613b str r3, [r7, #16] GPIO_InitStruct.Pull = GPIO_NOPULL; 8001ef4: 2300 movs r3, #0 8001ef6: 617b str r3, [r7, #20] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8001ef8: 2300 movs r3, #0 8001efa: 61bb str r3, [r7, #24] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8001efc: f107 030c add.w r3, r7, #12 8001f00: 4619 mov r1, r3 8001f02: f04f 4090 mov.w r0, #1207959552 @ 0x48000000 8001f06: f000 fc69 bl 80027dc /*Configure GPIO pins : D6_LCD_Pin RS_LCD_Pin D5_LCD_Pin */ GPIO_InitStruct.Pin = D6_LCD_Pin|RS_LCD_Pin|D5_LCD_Pin; 8001f0a: 2316 movs r3, #22 8001f0c: 60fb str r3, [r7, #12] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 8001f0e: 2301 movs r3, #1 8001f10: 613b str r3, [r7, #16] GPIO_InitStruct.Pull = GPIO_NOPULL; 8001f12: 2300 movs r3, #0 8001f14: 617b str r3, [r7, #20] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8001f16: 2300 movs r3, #0 8001f18: 61bb str r3, [r7, #24] HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 8001f1a: f107 030c add.w r3, r7, #12 8001f1e: 4619 mov r1, r3 8001f20: 4804 ldr r0, [pc, #16] @ (8001f34 ) 8001f22: f000 fc5b bl 80027dc /* USER CODE BEGIN MX_GPIO_Init_2 */ /* USER CODE END MX_GPIO_Init_2 */ } 8001f26: bf00 nop 8001f28: 3720 adds r7, #32 8001f2a: 46bd mov sp, r7 8001f2c: bd80 pop {r7, pc} 8001f2e: bf00 nop 8001f30: 40021000 .word 0x40021000 8001f34: 48000400 .word 0x48000400 08001f38 : /** * @brief This function is executed in case of error occurrence. * @retval None */ void Error_Handler(void) { 8001f38: b480 push {r7} 8001f3a: af00 add r7, sp, #0 \details Disables IRQ interrupts by setting the I-bit in the CPSR. Can only be executed in Privileged modes. */ __STATIC_FORCEINLINE void __disable_irq(void) { __ASM volatile ("cpsid i" : : : "memory"); 8001f3c: b672 cpsid i } 8001f3e: bf00 nop /* USER CODE BEGIN Error_Handler_Debug */ /* User can add his own implementation to report the HAL error return state */ __disable_irq(); while (1) 8001f40: bf00 nop 8001f42: e7fd b.n 8001f40 08001f44 : /* USER CODE END 0 */ /** * Initializes the Global MSP. */ void HAL_MspInit(void) { 8001f44: b480 push {r7} 8001f46: b083 sub sp, #12 8001f48: af00 add r7, sp, #0 /* USER CODE BEGIN MspInit 0 */ /* USER CODE END MspInit 0 */ __HAL_RCC_SYSCFG_CLK_ENABLE(); 8001f4a: 4b0f ldr r3, [pc, #60] @ (8001f88 ) 8001f4c: 6e1b ldr r3, [r3, #96] @ 0x60 8001f4e: 4a0e ldr r2, [pc, #56] @ (8001f88 ) 8001f50: f043 0301 orr.w r3, r3, #1 8001f54: 6613 str r3, [r2, #96] @ 0x60 8001f56: 4b0c ldr r3, [pc, #48] @ (8001f88 ) 8001f58: 6e1b ldr r3, [r3, #96] @ 0x60 8001f5a: f003 0301 and.w r3, r3, #1 8001f5e: 607b str r3, [r7, #4] 8001f60: 687b ldr r3, [r7, #4] __HAL_RCC_PWR_CLK_ENABLE(); 8001f62: 4b09 ldr r3, [pc, #36] @ (8001f88 ) 8001f64: 6d9b ldr r3, [r3, #88] @ 0x58 8001f66: 4a08 ldr r2, [pc, #32] @ (8001f88 ) 8001f68: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 8001f6c: 6593 str r3, [r2, #88] @ 0x58 8001f6e: 4b06 ldr r3, [pc, #24] @ (8001f88 ) 8001f70: 6d9b ldr r3, [r3, #88] @ 0x58 8001f72: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 8001f76: 603b str r3, [r7, #0] 8001f78: 683b ldr r3, [r7, #0] /* System interrupt init*/ /* USER CODE BEGIN MspInit 1 */ /* USER CODE END MspInit 1 */ } 8001f7a: bf00 nop 8001f7c: 370c adds r7, #12 8001f7e: 46bd mov sp, r7 8001f80: f85d 7b04 ldr.w r7, [sp], #4 8001f84: 4770 bx lr 8001f86: bf00 nop 8001f88: 40021000 .word 0x40021000 08001f8c : * This function configures the hardware resources used in this example * @param hi2c: I2C handle pointer * @retval None */ void HAL_I2C_MspInit(I2C_HandleTypeDef* hi2c) { 8001f8c: b580 push {r7, lr} 8001f8e: b0ac sub sp, #176 @ 0xb0 8001f90: af00 add r7, sp, #0 8001f92: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; 8001f94: f107 039c add.w r3, r7, #156 @ 0x9c 8001f98: 2200 movs r2, #0 8001f9a: 601a str r2, [r3, #0] 8001f9c: 605a str r2, [r3, #4] 8001f9e: 609a str r2, [r3, #8] 8001fa0: 60da str r2, [r3, #12] 8001fa2: 611a str r2, [r3, #16] RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; 8001fa4: f107 0314 add.w r3, r7, #20 8001fa8: 2288 movs r2, #136 @ 0x88 8001faa: 2100 movs r1, #0 8001fac: 4618 mov r0, r3 8001fae: f005 f894 bl 80070da if(hi2c->Instance==I2C2) 8001fb2: 687b ldr r3, [r7, #4] 8001fb4: 681b ldr r3, [r3, #0] 8001fb6: 4a21 ldr r2, [pc, #132] @ (800203c ) 8001fb8: 4293 cmp r3, r2 8001fba: d13b bne.n 8002034 /* USER CODE END I2C2_MspInit 0 */ /** Initializes the peripherals clock */ PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_I2C2; 8001fbc: 2380 movs r3, #128 @ 0x80 8001fbe: 617b str r3, [r7, #20] PeriphClkInit.I2c2ClockSelection = RCC_I2C2CLKSOURCE_PCLK1; 8001fc0: 2300 movs r3, #0 8001fc2: 66bb str r3, [r7, #104] @ 0x68 if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) 8001fc4: f107 0314 add.w r3, r7, #20 8001fc8: 4618 mov r0, r3 8001fca: f002 fa51 bl 8004470 8001fce: 4603 mov r3, r0 8001fd0: 2b00 cmp r3, #0 8001fd2: d001 beq.n 8001fd8 { Error_Handler(); 8001fd4: f7ff ffb0 bl 8001f38 } __HAL_RCC_GPIOB_CLK_ENABLE(); 8001fd8: 4b19 ldr r3, [pc, #100] @ (8002040 ) 8001fda: 6cdb ldr r3, [r3, #76] @ 0x4c 8001fdc: 4a18 ldr r2, [pc, #96] @ (8002040 ) 8001fde: f043 0302 orr.w r3, r3, #2 8001fe2: 64d3 str r3, [r2, #76] @ 0x4c 8001fe4: 4b16 ldr r3, [pc, #88] @ (8002040 ) 8001fe6: 6cdb ldr r3, [r3, #76] @ 0x4c 8001fe8: f003 0302 and.w r3, r3, #2 8001fec: 613b str r3, [r7, #16] 8001fee: 693b ldr r3, [r7, #16] /**I2C2 GPIO Configuration PB10 ------> I2C2_SCL PB11 ------> I2C2_SDA */ GPIO_InitStruct.Pin = GPIO_PIN_10|GPIO_PIN_11; 8001ff0: f44f 6340 mov.w r3, #3072 @ 0xc00 8001ff4: f8c7 309c str.w r3, [r7, #156] @ 0x9c GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; 8001ff8: 2312 movs r3, #18 8001ffa: f8c7 30a0 str.w r3, [r7, #160] @ 0xa0 GPIO_InitStruct.Pull = GPIO_NOPULL; 8001ffe: 2300 movs r3, #0 8002000: f8c7 30a4 str.w r3, [r7, #164] @ 0xa4 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; 8002004: 2303 movs r3, #3 8002006: f8c7 30a8 str.w r3, [r7, #168] @ 0xa8 GPIO_InitStruct.Alternate = GPIO_AF4_I2C2; 800200a: 2304 movs r3, #4 800200c: f8c7 30ac str.w r3, [r7, #172] @ 0xac HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 8002010: f107 039c add.w r3, r7, #156 @ 0x9c 8002014: 4619 mov r1, r3 8002016: 480b ldr r0, [pc, #44] @ (8002044 ) 8002018: f000 fbe0 bl 80027dc /* Peripheral clock enable */ __HAL_RCC_I2C2_CLK_ENABLE(); 800201c: 4b08 ldr r3, [pc, #32] @ (8002040 ) 800201e: 6d9b ldr r3, [r3, #88] @ 0x58 8002020: 4a07 ldr r2, [pc, #28] @ (8002040 ) 8002022: f443 0380 orr.w r3, r3, #4194304 @ 0x400000 8002026: 6593 str r3, [r2, #88] @ 0x58 8002028: 4b05 ldr r3, [pc, #20] @ (8002040 ) 800202a: 6d9b ldr r3, [r3, #88] @ 0x58 800202c: f403 0380 and.w r3, r3, #4194304 @ 0x400000 8002030: 60fb str r3, [r7, #12] 8002032: 68fb ldr r3, [r7, #12] /* USER CODE END I2C2_MspInit 1 */ } } 8002034: bf00 nop 8002036: 37b0 adds r7, #176 @ 0xb0 8002038: 46bd mov sp, r7 800203a: bd80 pop {r7, pc} 800203c: 40005800 .word 0x40005800 8002040: 40021000 .word 0x40021000 8002044: 48000400 .word 0x48000400 08002048 : * This function configures the hardware resources used in this example * @param huart: UART handle pointer * @retval None */ void HAL_UART_MspInit(UART_HandleTypeDef* huart) { 8002048: b580 push {r7, lr} 800204a: b0ac sub sp, #176 @ 0xb0 800204c: af00 add r7, sp, #0 800204e: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; 8002050: f107 039c add.w r3, r7, #156 @ 0x9c 8002054: 2200 movs r2, #0 8002056: 601a str r2, [r3, #0] 8002058: 605a str r2, [r3, #4] 800205a: 609a str r2, [r3, #8] 800205c: 60da str r2, [r3, #12] 800205e: 611a str r2, [r3, #16] RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; 8002060: f107 0314 add.w r3, r7, #20 8002064: 2288 movs r2, #136 @ 0x88 8002066: 2100 movs r1, #0 8002068: 4618 mov r0, r3 800206a: f005 f836 bl 80070da if(huart->Instance==USART1) 800206e: 687b ldr r3, [r7, #4] 8002070: 681b ldr r3, [r3, #0] 8002072: 4a25 ldr r2, [pc, #148] @ (8002108 ) 8002074: 4293 cmp r3, r2 8002076: d142 bne.n 80020fe /* USER CODE END USART1_MspInit 0 */ /** Initializes the peripherals clock */ PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART1; 8002078: 2301 movs r3, #1 800207a: 617b str r3, [r7, #20] PeriphClkInit.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2; 800207c: 2300 movs r3, #0 800207e: 64fb str r3, [r7, #76] @ 0x4c if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) 8002080: f107 0314 add.w r3, r7, #20 8002084: 4618 mov r0, r3 8002086: f002 f9f3 bl 8004470 800208a: 4603 mov r3, r0 800208c: 2b00 cmp r3, #0 800208e: d001 beq.n 8002094 { Error_Handler(); 8002090: f7ff ff52 bl 8001f38 } /* Peripheral clock enable */ __HAL_RCC_USART1_CLK_ENABLE(); 8002094: 4b1d ldr r3, [pc, #116] @ (800210c ) 8002096: 6e1b ldr r3, [r3, #96] @ 0x60 8002098: 4a1c ldr r2, [pc, #112] @ (800210c ) 800209a: f443 4380 orr.w r3, r3, #16384 @ 0x4000 800209e: 6613 str r3, [r2, #96] @ 0x60 80020a0: 4b1a ldr r3, [pc, #104] @ (800210c ) 80020a2: 6e1b ldr r3, [r3, #96] @ 0x60 80020a4: f403 4380 and.w r3, r3, #16384 @ 0x4000 80020a8: 613b str r3, [r7, #16] 80020aa: 693b ldr r3, [r7, #16] __HAL_RCC_GPIOB_CLK_ENABLE(); 80020ac: 4b17 ldr r3, [pc, #92] @ (800210c ) 80020ae: 6cdb ldr r3, [r3, #76] @ 0x4c 80020b0: 4a16 ldr r2, [pc, #88] @ (800210c ) 80020b2: f043 0302 orr.w r3, r3, #2 80020b6: 64d3 str r3, [r2, #76] @ 0x4c 80020b8: 4b14 ldr r3, [pc, #80] @ (800210c ) 80020ba: 6cdb ldr r3, [r3, #76] @ 0x4c 80020bc: f003 0302 and.w r3, r3, #2 80020c0: 60fb str r3, [r7, #12] 80020c2: 68fb ldr r3, [r7, #12] /**USART1 GPIO Configuration PB6 ------> USART1_TX PB7 ------> USART1_RX */ GPIO_InitStruct.Pin = GPIO_PIN_6|GPIO_PIN_7; 80020c4: 23c0 movs r3, #192 @ 0xc0 80020c6: f8c7 309c str.w r3, [r7, #156] @ 0x9c GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 80020ca: 2302 movs r3, #2 80020cc: f8c7 30a0 str.w r3, [r7, #160] @ 0xa0 GPIO_InitStruct.Pull = GPIO_NOPULL; 80020d0: 2300 movs r3, #0 80020d2: f8c7 30a4 str.w r3, [r7, #164] @ 0xa4 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; 80020d6: 2303 movs r3, #3 80020d8: f8c7 30a8 str.w r3, [r7, #168] @ 0xa8 GPIO_InitStruct.Alternate = GPIO_AF7_USART1; 80020dc: 2307 movs r3, #7 80020de: f8c7 30ac str.w r3, [r7, #172] @ 0xac HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 80020e2: f107 039c add.w r3, r7, #156 @ 0x9c 80020e6: 4619 mov r1, r3 80020e8: 4809 ldr r0, [pc, #36] @ (8002110 ) 80020ea: f000 fb77 bl 80027dc /* USART1 interrupt Init */ HAL_NVIC_SetPriority(USART1_IRQn, 0, 0); 80020ee: 2200 movs r2, #0 80020f0: 2100 movs r1, #0 80020f2: 2025 movs r0, #37 @ 0x25 80020f4: f000 fabd bl 8002672 HAL_NVIC_EnableIRQ(USART1_IRQn); 80020f8: 2025 movs r0, #37 @ 0x25 80020fa: f000 fad6 bl 80026aa /* USER CODE END USART1_MspInit 1 */ } } 80020fe: bf00 nop 8002100: 37b0 adds r7, #176 @ 0xb0 8002102: 46bd mov sp, r7 8002104: bd80 pop {r7, pc} 8002106: bf00 nop 8002108: 40013800 .word 0x40013800 800210c: 40021000 .word 0x40021000 8002110: 48000400 .word 0x48000400 08002114 : /******************************************************************************/ /** * @brief This function handles Non maskable interrupt. */ void NMI_Handler(void) { 8002114: b480 push {r7} 8002116: af00 add r7, sp, #0 /* USER CODE BEGIN NonMaskableInt_IRQn 0 */ /* USER CODE END NonMaskableInt_IRQn 0 */ /* USER CODE BEGIN NonMaskableInt_IRQn 1 */ while (1) 8002118: bf00 nop 800211a: e7fd b.n 8002118 0800211c : /** * @brief This function handles Hard fault interrupt. */ void HardFault_Handler(void) { 800211c: b480 push {r7} 800211e: af00 add r7, sp, #0 /* USER CODE BEGIN HardFault_IRQn 0 */ /* USER CODE END HardFault_IRQn 0 */ while (1) 8002120: bf00 nop 8002122: e7fd b.n 8002120 08002124 : /** * @brief This function handles Memory management fault. */ void MemManage_Handler(void) { 8002124: b480 push {r7} 8002126: af00 add r7, sp, #0 /* USER CODE BEGIN MemoryManagement_IRQn 0 */ /* USER CODE END MemoryManagement_IRQn 0 */ while (1) 8002128: bf00 nop 800212a: e7fd b.n 8002128 0800212c : /** * @brief This function handles Prefetch fault, memory access fault. */ void BusFault_Handler(void) { 800212c: b480 push {r7} 800212e: af00 add r7, sp, #0 /* USER CODE BEGIN BusFault_IRQn 0 */ /* USER CODE END BusFault_IRQn 0 */ while (1) 8002130: bf00 nop 8002132: e7fd b.n 8002130 08002134 : /** * @brief This function handles Undefined instruction or illegal state. */ void UsageFault_Handler(void) { 8002134: b480 push {r7} 8002136: af00 add r7, sp, #0 /* USER CODE BEGIN UsageFault_IRQn 0 */ /* USER CODE END UsageFault_IRQn 0 */ while (1) 8002138: bf00 nop 800213a: e7fd b.n 8002138 0800213c : /** * @brief This function handles System service call via SWI instruction. */ void SVC_Handler(void) { 800213c: b480 push {r7} 800213e: af00 add r7, sp, #0 /* USER CODE END SVCall_IRQn 0 */ /* USER CODE BEGIN SVCall_IRQn 1 */ /* USER CODE END SVCall_IRQn 1 */ } 8002140: bf00 nop 8002142: 46bd mov sp, r7 8002144: f85d 7b04 ldr.w r7, [sp], #4 8002148: 4770 bx lr 0800214a : /** * @brief This function handles Debug monitor. */ void DebugMon_Handler(void) { 800214a: b480 push {r7} 800214c: af00 add r7, sp, #0 /* USER CODE END DebugMonitor_IRQn 0 */ /* USER CODE BEGIN DebugMonitor_IRQn 1 */ /* USER CODE END DebugMonitor_IRQn 1 */ } 800214e: bf00 nop 8002150: 46bd mov sp, r7 8002152: f85d 7b04 ldr.w r7, [sp], #4 8002156: 4770 bx lr 08002158 : /** * @brief This function handles Pendable request for system service. */ void PendSV_Handler(void) { 8002158: b480 push {r7} 800215a: af00 add r7, sp, #0 /* USER CODE END PendSV_IRQn 0 */ /* USER CODE BEGIN PendSV_IRQn 1 */ /* USER CODE END PendSV_IRQn 1 */ } 800215c: bf00 nop 800215e: 46bd mov sp, r7 8002160: f85d 7b04 ldr.w r7, [sp], #4 8002164: 4770 bx lr 08002166 : /** * @brief This function handles System tick timer. */ void SysTick_Handler(void) { 8002166: b580 push {r7, lr} 8002168: af00 add r7, sp, #0 /* USER CODE BEGIN SysTick_IRQn 0 */ /* USER CODE END SysTick_IRQn 0 */ HAL_IncTick(); 800216a: f000 f963 bl 8002434 /* USER CODE BEGIN SysTick_IRQn 1 */ /* USER CODE END SysTick_IRQn 1 */ } 800216e: bf00 nop 8002170: bd80 pop {r7, pc} ... 08002174 : /** * @brief This function handles USART1 global interrupt. */ void USART1_IRQHandler(void) { 8002174: b580 push {r7, lr} 8002176: af00 add r7, sp, #0 /* USER CODE BEGIN USART1_IRQn 0 */ /* USER CODE END USART1_IRQn 0 */ HAL_UART_IRQHandler(&huart1); 8002178: 4802 ldr r0, [pc, #8] @ (8002184 ) 800217a: f002 ff59 bl 8005030 /* USER CODE BEGIN USART1_IRQn 1 */ /* USER CODE END USART1_IRQn 1 */ } 800217e: bf00 nop 8002180: bd80 pop {r7, pc} 8002182: bf00 nop 8002184: 2000028c .word 0x2000028c 08002188 <_getpid>: void initialise_monitor_handles() { } int _getpid(void) { 8002188: b480 push {r7} 800218a: af00 add r7, sp, #0 return 1; 800218c: 2301 movs r3, #1 } 800218e: 4618 mov r0, r3 8002190: 46bd mov sp, r7 8002192: f85d 7b04 ldr.w r7, [sp], #4 8002196: 4770 bx lr 08002198 <_kill>: int _kill(int pid, int sig) { 8002198: b580 push {r7, lr} 800219a: b082 sub sp, #8 800219c: af00 add r7, sp, #0 800219e: 6078 str r0, [r7, #4] 80021a0: 6039 str r1, [r7, #0] (void)pid; (void)sig; errno = EINVAL; 80021a2: f004 ffed bl 8007180 <__errno> 80021a6: 4603 mov r3, r0 80021a8: 2216 movs r2, #22 80021aa: 601a str r2, [r3, #0] return -1; 80021ac: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff } 80021b0: 4618 mov r0, r3 80021b2: 3708 adds r7, #8 80021b4: 46bd mov sp, r7 80021b6: bd80 pop {r7, pc} 080021b8 <_exit>: void _exit (int status) { 80021b8: b580 push {r7, lr} 80021ba: b082 sub sp, #8 80021bc: af00 add r7, sp, #0 80021be: 6078 str r0, [r7, #4] _kill(status, -1); 80021c0: f04f 31ff mov.w r1, #4294967295 @ 0xffffffff 80021c4: 6878 ldr r0, [r7, #4] 80021c6: f7ff ffe7 bl 8002198 <_kill> while (1) {} /* Make sure we hang here */ 80021ca: bf00 nop 80021cc: e7fd b.n 80021ca <_exit+0x12> 080021ce <_read>: } __attribute__((weak)) int _read(int file, char *ptr, int len) { 80021ce: b580 push {r7, lr} 80021d0: b086 sub sp, #24 80021d2: af00 add r7, sp, #0 80021d4: 60f8 str r0, [r7, #12] 80021d6: 60b9 str r1, [r7, #8] 80021d8: 607a str r2, [r7, #4] (void)file; int DataIdx; for (DataIdx = 0; DataIdx < len; DataIdx++) 80021da: 2300 movs r3, #0 80021dc: 617b str r3, [r7, #20] 80021de: e00a b.n 80021f6 <_read+0x28> { *ptr++ = __io_getchar(); 80021e0: f3af 8000 nop.w 80021e4: 4601 mov r1, r0 80021e6: 68bb ldr r3, [r7, #8] 80021e8: 1c5a adds r2, r3, #1 80021ea: 60ba str r2, [r7, #8] 80021ec: b2ca uxtb r2, r1 80021ee: 701a strb r2, [r3, #0] for (DataIdx = 0; DataIdx < len; DataIdx++) 80021f0: 697b ldr r3, [r7, #20] 80021f2: 3301 adds r3, #1 80021f4: 617b str r3, [r7, #20] 80021f6: 697a ldr r2, [r7, #20] 80021f8: 687b ldr r3, [r7, #4] 80021fa: 429a cmp r2, r3 80021fc: dbf0 blt.n 80021e0 <_read+0x12> } return len; 80021fe: 687b ldr r3, [r7, #4] } 8002200: 4618 mov r0, r3 8002202: 3718 adds r7, #24 8002204: 46bd mov sp, r7 8002206: bd80 pop {r7, pc} 08002208 <_write>: __attribute__((weak)) int _write(int file, char *ptr, int len) { 8002208: b580 push {r7, lr} 800220a: b086 sub sp, #24 800220c: af00 add r7, sp, #0 800220e: 60f8 str r0, [r7, #12] 8002210: 60b9 str r1, [r7, #8] 8002212: 607a str r2, [r7, #4] (void)file; int DataIdx; for (DataIdx = 0; DataIdx < len; DataIdx++) 8002214: 2300 movs r3, #0 8002216: 617b str r3, [r7, #20] 8002218: e009 b.n 800222e <_write+0x26> { __io_putchar(*ptr++); 800221a: 68bb ldr r3, [r7, #8] 800221c: 1c5a adds r2, r3, #1 800221e: 60ba str r2, [r7, #8] 8002220: 781b ldrb r3, [r3, #0] 8002222: 4618 mov r0, r3 8002224: f7ff fb22 bl 800186c <__io_putchar> for (DataIdx = 0; DataIdx < len; DataIdx++) 8002228: 697b ldr r3, [r7, #20] 800222a: 3301 adds r3, #1 800222c: 617b str r3, [r7, #20] 800222e: 697a ldr r2, [r7, #20] 8002230: 687b ldr r3, [r7, #4] 8002232: 429a cmp r2, r3 8002234: dbf1 blt.n 800221a <_write+0x12> } return len; 8002236: 687b ldr r3, [r7, #4] } 8002238: 4618 mov r0, r3 800223a: 3718 adds r7, #24 800223c: 46bd mov sp, r7 800223e: bd80 pop {r7, pc} 08002240 <_close>: int _close(int file) { 8002240: b480 push {r7} 8002242: b083 sub sp, #12 8002244: af00 add r7, sp, #0 8002246: 6078 str r0, [r7, #4] (void)file; return -1; 8002248: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff } 800224c: 4618 mov r0, r3 800224e: 370c adds r7, #12 8002250: 46bd mov sp, r7 8002252: f85d 7b04 ldr.w r7, [sp], #4 8002256: 4770 bx lr 08002258 <_fstat>: int _fstat(int file, struct stat *st) { 8002258: b480 push {r7} 800225a: b083 sub sp, #12 800225c: af00 add r7, sp, #0 800225e: 6078 str r0, [r7, #4] 8002260: 6039 str r1, [r7, #0] (void)file; st->st_mode = S_IFCHR; 8002262: 683b ldr r3, [r7, #0] 8002264: f44f 5200 mov.w r2, #8192 @ 0x2000 8002268: 605a str r2, [r3, #4] return 0; 800226a: 2300 movs r3, #0 } 800226c: 4618 mov r0, r3 800226e: 370c adds r7, #12 8002270: 46bd mov sp, r7 8002272: f85d 7b04 ldr.w r7, [sp], #4 8002276: 4770 bx lr 08002278 <_isatty>: int _isatty(int file) { 8002278: b480 push {r7} 800227a: b083 sub sp, #12 800227c: af00 add r7, sp, #0 800227e: 6078 str r0, [r7, #4] (void)file; return 1; 8002280: 2301 movs r3, #1 } 8002282: 4618 mov r0, r3 8002284: 370c adds r7, #12 8002286: 46bd mov sp, r7 8002288: f85d 7b04 ldr.w r7, [sp], #4 800228c: 4770 bx lr 0800228e <_lseek>: int _lseek(int file, int ptr, int dir) { 800228e: b480 push {r7} 8002290: b085 sub sp, #20 8002292: af00 add r7, sp, #0 8002294: 60f8 str r0, [r7, #12] 8002296: 60b9 str r1, [r7, #8] 8002298: 607a str r2, [r7, #4] (void)file; (void)ptr; (void)dir; return 0; 800229a: 2300 movs r3, #0 } 800229c: 4618 mov r0, r3 800229e: 3714 adds r7, #20 80022a0: 46bd mov sp, r7 80022a2: f85d 7b04 ldr.w r7, [sp], #4 80022a6: 4770 bx lr 080022a8 <_sbrk>: * * @param incr Memory size * @return Pointer to allocated memory */ void *_sbrk(ptrdiff_t incr) { 80022a8: b580 push {r7, lr} 80022aa: b086 sub sp, #24 80022ac: af00 add r7, sp, #0 80022ae: 6078 str r0, [r7, #4] extern uint8_t _end; /* Symbol defined in the linker script */ extern uint8_t _estack; /* Symbol defined in the linker script */ extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */ const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size; 80022b0: 4a14 ldr r2, [pc, #80] @ (8002304 <_sbrk+0x5c>) 80022b2: 4b15 ldr r3, [pc, #84] @ (8002308 <_sbrk+0x60>) 80022b4: 1ad3 subs r3, r2, r3 80022b6: 617b str r3, [r7, #20] const uint8_t *max_heap = (uint8_t *)stack_limit; 80022b8: 697b ldr r3, [r7, #20] 80022ba: 613b str r3, [r7, #16] uint8_t *prev_heap_end; /* Initialize heap end at first call */ if (NULL == __sbrk_heap_end) 80022bc: 4b13 ldr r3, [pc, #76] @ (800230c <_sbrk+0x64>) 80022be: 681b ldr r3, [r3, #0] 80022c0: 2b00 cmp r3, #0 80022c2: d102 bne.n 80022ca <_sbrk+0x22> { __sbrk_heap_end = &_end; 80022c4: 4b11 ldr r3, [pc, #68] @ (800230c <_sbrk+0x64>) 80022c6: 4a12 ldr r2, [pc, #72] @ (8002310 <_sbrk+0x68>) 80022c8: 601a str r2, [r3, #0] } /* Protect heap from growing into the reserved MSP stack */ if (__sbrk_heap_end + incr > max_heap) 80022ca: 4b10 ldr r3, [pc, #64] @ (800230c <_sbrk+0x64>) 80022cc: 681a ldr r2, [r3, #0] 80022ce: 687b ldr r3, [r7, #4] 80022d0: 4413 add r3, r2 80022d2: 693a ldr r2, [r7, #16] 80022d4: 429a cmp r2, r3 80022d6: d207 bcs.n 80022e8 <_sbrk+0x40> { errno = ENOMEM; 80022d8: f004 ff52 bl 8007180 <__errno> 80022dc: 4603 mov r3, r0 80022de: 220c movs r2, #12 80022e0: 601a str r2, [r3, #0] return (void *)-1; 80022e2: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff 80022e6: e009 b.n 80022fc <_sbrk+0x54> } prev_heap_end = __sbrk_heap_end; 80022e8: 4b08 ldr r3, [pc, #32] @ (800230c <_sbrk+0x64>) 80022ea: 681b ldr r3, [r3, #0] 80022ec: 60fb str r3, [r7, #12] __sbrk_heap_end += incr; 80022ee: 4b07 ldr r3, [pc, #28] @ (800230c <_sbrk+0x64>) 80022f0: 681a ldr r2, [r3, #0] 80022f2: 687b ldr r3, [r7, #4] 80022f4: 4413 add r3, r2 80022f6: 4a05 ldr r2, [pc, #20] @ (800230c <_sbrk+0x64>) 80022f8: 6013 str r3, [r2, #0] return (void *)prev_heap_end; 80022fa: 68fb ldr r3, [r7, #12] } 80022fc: 4618 mov r0, r3 80022fe: 3718 adds r7, #24 8002300: 46bd mov sp, r7 8002302: bd80 pop {r7, pc} 8002304: 20018000 .word 0x20018000 8002308: 00000400 .word 0x00000400 800230c: 20000324 .word 0x20000324 8002310: 20000478 .word 0x20000478 08002314 : * @brief Setup the microcontroller system. * @retval None */ void SystemInit(void) { 8002314: b480 push {r7} 8002316: af00 add r7, sp, #0 SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; #endif /* FPU settings ------------------------------------------------------------*/ #if (__FPU_PRESENT == 1) && (__FPU_USED == 1) SCB->CPACR |= ((3UL << 20U)|(3UL << 22U)); /* set CP10 and CP11 Full Access */ 8002318: 4b06 ldr r3, [pc, #24] @ (8002334 ) 800231a: f8d3 3088 ldr.w r3, [r3, #136] @ 0x88 800231e: 4a05 ldr r2, [pc, #20] @ (8002334 ) 8002320: f443 0370 orr.w r3, r3, #15728640 @ 0xf00000 8002324: f8c2 3088 str.w r3, [r2, #136] @ 0x88 #endif } 8002328: bf00 nop 800232a: 46bd mov sp, r7 800232c: f85d 7b04 ldr.w r7, [sp], #4 8002330: 4770 bx lr 8002332: bf00 nop 8002334: e000ed00 .word 0xe000ed00 08002338 : .section .text.Reset_Handler .weak Reset_Handler .type Reset_Handler, %function Reset_Handler: ldr sp, =_estack /* Set stack pointer */ 8002338: f8df d034 ldr.w sp, [pc, #52] @ 8002370 /* Call the clock system initialization function.*/ bl SystemInit 800233c: f7ff ffea bl 8002314 /* Copy the data segment initializers from flash to SRAM */ ldr r0, =_sdata 8002340: 480c ldr r0, [pc, #48] @ (8002374 ) ldr r1, =_edata 8002342: 490d ldr r1, [pc, #52] @ (8002378 ) ldr r2, =_sidata 8002344: 4a0d ldr r2, [pc, #52] @ (800237c ) movs r3, #0 8002346: 2300 movs r3, #0 b LoopCopyDataInit 8002348: e002 b.n 8002350 0800234a : CopyDataInit: ldr r4, [r2, r3] 800234a: 58d4 ldr r4, [r2, r3] str r4, [r0, r3] 800234c: 50c4 str r4, [r0, r3] adds r3, r3, #4 800234e: 3304 adds r3, #4 08002350 : LoopCopyDataInit: adds r4, r0, r3 8002350: 18c4 adds r4, r0, r3 cmp r4, r1 8002352: 428c cmp r4, r1 bcc CopyDataInit 8002354: d3f9 bcc.n 800234a /* Zero fill the bss segment. */ ldr r2, =_sbss 8002356: 4a0a ldr r2, [pc, #40] @ (8002380 ) ldr r4, =_ebss 8002358: 4c0a ldr r4, [pc, #40] @ (8002384 ) movs r3, #0 800235a: 2300 movs r3, #0 b LoopFillZerobss 800235c: e001 b.n 8002362 0800235e : FillZerobss: str r3, [r2] 800235e: 6013 str r3, [r2, #0] adds r2, r2, #4 8002360: 3204 adds r2, #4 08002362 : LoopFillZerobss: cmp r2, r4 8002362: 42a2 cmp r2, r4 bcc FillZerobss 8002364: d3fb bcc.n 800235e /* Call static constructors */ bl __libc_init_array 8002366: f004 ff11 bl 800718c <__libc_init_array> /* Call the application's entry point.*/ bl main 800236a: f7ff faf5 bl 8001958

0800236e : LoopForever: b LoopForever 800236e: e7fe b.n 800236e ldr sp, =_estack /* Set stack pointer */ 8002370: 20018000 .word 0x20018000 ldr r0, =_sdata 8002374: 20000000 .word 0x20000000 ldr r1, =_edata 8002378: 200001e8 .word 0x200001e8 ldr r2, =_sidata 800237c: 080096c4 .word 0x080096c4 ldr r2, =_sbss 8002380: 200001e8 .word 0x200001e8 ldr r4, =_ebss 8002384: 20000478 .word 0x20000478 08002388 : * @retval : None */ .section .text.Default_Handler,"ax",%progbits Default_Handler: Infinite_Loop: b Infinite_Loop 8002388: e7fe b.n 8002388 0800238a : * each 1ms in the SysTick_Handler() interrupt handler. * * @retval HAL status */ HAL_StatusTypeDef HAL_Init(void) { 800238a: b580 push {r7, lr} 800238c: b082 sub sp, #8 800238e: af00 add r7, sp, #0 HAL_StatusTypeDef status = HAL_OK; 8002390: 2300 movs r3, #0 8002392: 71fb strb r3, [r7, #7] #if (PREFETCH_ENABLE != 0) __HAL_FLASH_PREFETCH_BUFFER_ENABLE(); #endif /* PREFETCH_ENABLE */ /* Set Interrupt Group Priority */ HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); 8002394: 2003 movs r0, #3 8002396: f000 f961 bl 800265c /* Use SysTick as time base source and configure 1ms tick (default clock after Reset is MSI) */ if (HAL_InitTick(TICK_INT_PRIORITY) != HAL_OK) 800239a: 200f movs r0, #15 800239c: f000 f80e bl 80023bc 80023a0: 4603 mov r3, r0 80023a2: 2b00 cmp r3, #0 80023a4: d002 beq.n 80023ac { status = HAL_ERROR; 80023a6: 2301 movs r3, #1 80023a8: 71fb strb r3, [r7, #7] 80023aa: e001 b.n 80023b0 } else { /* Init the low level hardware */ HAL_MspInit(); 80023ac: f7ff fdca bl 8001f44 } /* Return function status */ return status; 80023b0: 79fb ldrb r3, [r7, #7] } 80023b2: 4618 mov r0, r3 80023b4: 3708 adds r7, #8 80023b6: 46bd mov sp, r7 80023b8: bd80 pop {r7, pc} ... 080023bc : * implementation in user file. * @param TickPriority Tick interrupt priority. * @retval HAL status */ __weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority) { 80023bc: b580 push {r7, lr} 80023be: b084 sub sp, #16 80023c0: af00 add r7, sp, #0 80023c2: 6078 str r0, [r7, #4] HAL_StatusTypeDef status = HAL_OK; 80023c4: 2300 movs r3, #0 80023c6: 73fb strb r3, [r7, #15] /* Check uwTickFreq for MisraC 2012 (even if uwTickFreq is a enum type that doesn't take the value zero)*/ if ((uint32_t)uwTickFreq != 0U) 80023c8: 4b17 ldr r3, [pc, #92] @ (8002428 ) 80023ca: 781b ldrb r3, [r3, #0] 80023cc: 2b00 cmp r3, #0 80023ce: d023 beq.n 8002418 { /*Configure the SysTick to have interrupt in 1ms time basis*/ if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / (uint32_t)uwTickFreq)) == 0U) 80023d0: 4b16 ldr r3, [pc, #88] @ (800242c ) 80023d2: 681a ldr r2, [r3, #0] 80023d4: 4b14 ldr r3, [pc, #80] @ (8002428 ) 80023d6: 781b ldrb r3, [r3, #0] 80023d8: 4619 mov r1, r3 80023da: f44f 737a mov.w r3, #1000 @ 0x3e8 80023de: fbb3 f3f1 udiv r3, r3, r1 80023e2: fbb2 f3f3 udiv r3, r2, r3 80023e6: 4618 mov r0, r3 80023e8: f000 f96d bl 80026c6 80023ec: 4603 mov r3, r0 80023ee: 2b00 cmp r3, #0 80023f0: d10f bne.n 8002412 { /* Configure the SysTick IRQ priority */ if (TickPriority < (1UL << __NVIC_PRIO_BITS)) 80023f2: 687b ldr r3, [r7, #4] 80023f4: 2b0f cmp r3, #15 80023f6: d809 bhi.n 800240c { HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U); 80023f8: 2200 movs r2, #0 80023fa: 6879 ldr r1, [r7, #4] 80023fc: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff 8002400: f000 f937 bl 8002672 uwTickPrio = TickPriority; 8002404: 4a0a ldr r2, [pc, #40] @ (8002430 ) 8002406: 687b ldr r3, [r7, #4] 8002408: 6013 str r3, [r2, #0] 800240a: e007 b.n 800241c } else { status = HAL_ERROR; 800240c: 2301 movs r3, #1 800240e: 73fb strb r3, [r7, #15] 8002410: e004 b.n 800241c } } else { status = HAL_ERROR; 8002412: 2301 movs r3, #1 8002414: 73fb strb r3, [r7, #15] 8002416: e001 b.n 800241c } } else { status = HAL_ERROR; 8002418: 2301 movs r3, #1 800241a: 73fb strb r3, [r7, #15] } /* Return function status */ return status; 800241c: 7bfb ldrb r3, [r7, #15] } 800241e: 4618 mov r0, r3 8002420: 3710 adds r7, #16 8002422: 46bd mov sp, r7 8002424: bd80 pop {r7, pc} 8002426: bf00 nop 8002428: 2000001c .word 0x2000001c 800242c: 20000014 .word 0x20000014 8002430: 20000018 .word 0x20000018 08002434 : * @note This function is declared as __weak to be overwritten in case of other * implementations in user file. * @retval None */ __weak void HAL_IncTick(void) { 8002434: b480 push {r7} 8002436: af00 add r7, sp, #0 uwTick += (uint32_t)uwTickFreq; 8002438: 4b06 ldr r3, [pc, #24] @ (8002454 ) 800243a: 781b ldrb r3, [r3, #0] 800243c: 461a mov r2, r3 800243e: 4b06 ldr r3, [pc, #24] @ (8002458 ) 8002440: 681b ldr r3, [r3, #0] 8002442: 4413 add r3, r2 8002444: 4a04 ldr r2, [pc, #16] @ (8002458 ) 8002446: 6013 str r3, [r2, #0] } 8002448: bf00 nop 800244a: 46bd mov sp, r7 800244c: f85d 7b04 ldr.w r7, [sp], #4 8002450: 4770 bx lr 8002452: bf00 nop 8002454: 2000001c .word 0x2000001c 8002458: 20000328 .word 0x20000328 0800245c : * @note This function is declared as __weak to be overwritten in case of other * implementations in user file. * @retval tick value */ __weak uint32_t HAL_GetTick(void) { 800245c: b480 push {r7} 800245e: af00 add r7, sp, #0 return uwTick; 8002460: 4b03 ldr r3, [pc, #12] @ (8002470 ) 8002462: 681b ldr r3, [r3, #0] } 8002464: 4618 mov r0, r3 8002466: 46bd mov sp, r7 8002468: f85d 7b04 ldr.w r7, [sp], #4 800246c: 4770 bx lr 800246e: bf00 nop 8002470: 20000328 .word 0x20000328 08002474 : * implementations in user file. * @param Delay specifies the delay time length, in milliseconds. * @retval None */ __weak void HAL_Delay(uint32_t Delay) { 8002474: b580 push {r7, lr} 8002476: b084 sub sp, #16 8002478: af00 add r7, sp, #0 800247a: 6078 str r0, [r7, #4] uint32_t tickstart = HAL_GetTick(); 800247c: f7ff ffee bl 800245c 8002480: 60b8 str r0, [r7, #8] uint32_t wait = Delay; 8002482: 687b ldr r3, [r7, #4] 8002484: 60fb str r3, [r7, #12] /* Add a period to guaranty minimum wait */ if (wait < HAL_MAX_DELAY) 8002486: 68fb ldr r3, [r7, #12] 8002488: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff 800248c: d005 beq.n 800249a { wait += (uint32_t)uwTickFreq; 800248e: 4b0a ldr r3, [pc, #40] @ (80024b8 ) 8002490: 781b ldrb r3, [r3, #0] 8002492: 461a mov r2, r3 8002494: 68fb ldr r3, [r7, #12] 8002496: 4413 add r3, r2 8002498: 60fb str r3, [r7, #12] } while ((HAL_GetTick() - tickstart) < wait) 800249a: bf00 nop 800249c: f7ff ffde bl 800245c 80024a0: 4602 mov r2, r0 80024a2: 68bb ldr r3, [r7, #8] 80024a4: 1ad3 subs r3, r2, r3 80024a6: 68fa ldr r2, [r7, #12] 80024a8: 429a cmp r2, r3 80024aa: d8f7 bhi.n 800249c { } } 80024ac: bf00 nop 80024ae: bf00 nop 80024b0: 3710 adds r7, #16 80024b2: 46bd mov sp, r7 80024b4: bd80 pop {r7, pc} 80024b6: bf00 nop 80024b8: 2000001c .word 0x2000001c 080024bc <__NVIC_SetPriorityGrouping>: In case of a conflict between priority grouping and available priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. \param [in] PriorityGroup Priority grouping field. */ __STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup) { 80024bc: b480 push {r7} 80024be: b085 sub sp, #20 80024c0: af00 add r7, sp, #0 80024c2: 6078 str r0, [r7, #4] uint32_t reg_value; uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ 80024c4: 687b ldr r3, [r7, #4] 80024c6: f003 0307 and.w r3, r3, #7 80024ca: 60fb str r3, [r7, #12] reg_value = SCB->AIRCR; /* read old register configuration */ 80024cc: 4b0c ldr r3, [pc, #48] @ (8002500 <__NVIC_SetPriorityGrouping+0x44>) 80024ce: 68db ldr r3, [r3, #12] 80024d0: 60bb str r3, [r7, #8] reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ 80024d2: 68ba ldr r2, [r7, #8] 80024d4: f64f 03ff movw r3, #63743 @ 0xf8ff 80024d8: 4013 ands r3, r2 80024da: 60bb str r3, [r7, #8] reg_value = (reg_value | ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */ 80024dc: 68fb ldr r3, [r7, #12] 80024de: 021a lsls r2, r3, #8 ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | 80024e0: 68bb ldr r3, [r7, #8] 80024e2: 4313 orrs r3, r2 reg_value = (reg_value | 80024e4: f043 63bf orr.w r3, r3, #100139008 @ 0x5f80000 80024e8: f443 3300 orr.w r3, r3, #131072 @ 0x20000 80024ec: 60bb str r3, [r7, #8] SCB->AIRCR = reg_value; 80024ee: 4a04 ldr r2, [pc, #16] @ (8002500 <__NVIC_SetPriorityGrouping+0x44>) 80024f0: 68bb ldr r3, [r7, #8] 80024f2: 60d3 str r3, [r2, #12] } 80024f4: bf00 nop 80024f6: 3714 adds r7, #20 80024f8: 46bd mov sp, r7 80024fa: f85d 7b04 ldr.w r7, [sp], #4 80024fe: 4770 bx lr 8002500: e000ed00 .word 0xe000ed00 08002504 <__NVIC_GetPriorityGrouping>: \brief Get Priority Grouping \details Reads the priority grouping field from the NVIC Interrupt Controller. \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field). */ __STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void) { 8002504: b480 push {r7} 8002506: af00 add r7, sp, #0 return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); 8002508: 4b04 ldr r3, [pc, #16] @ (800251c <__NVIC_GetPriorityGrouping+0x18>) 800250a: 68db ldr r3, [r3, #12] 800250c: 0a1b lsrs r3, r3, #8 800250e: f003 0307 and.w r3, r3, #7 } 8002512: 4618 mov r0, r3 8002514: 46bd mov sp, r7 8002516: f85d 7b04 ldr.w r7, [sp], #4 800251a: 4770 bx lr 800251c: e000ed00 .word 0xe000ed00 08002520 <__NVIC_EnableIRQ>: \details Enables a device specific interrupt in the NVIC interrupt controller. \param [in] IRQn Device specific interrupt number. \note IRQn must not be negative. */ __STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn) { 8002520: b480 push {r7} 8002522: b083 sub sp, #12 8002524: af00 add r7, sp, #0 8002526: 4603 mov r3, r0 8002528: 71fb strb r3, [r7, #7] if ((int32_t)(IRQn) >= 0) 800252a: f997 3007 ldrsb.w r3, [r7, #7] 800252e: 2b00 cmp r3, #0 8002530: db0b blt.n 800254a <__NVIC_EnableIRQ+0x2a> { __COMPILER_BARRIER(); NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); 8002532: 79fb ldrb r3, [r7, #7] 8002534: f003 021f and.w r2, r3, #31 8002538: 4907 ldr r1, [pc, #28] @ (8002558 <__NVIC_EnableIRQ+0x38>) 800253a: f997 3007 ldrsb.w r3, [r7, #7] 800253e: 095b lsrs r3, r3, #5 8002540: 2001 movs r0, #1 8002542: fa00 f202 lsl.w r2, r0, r2 8002546: f841 2023 str.w r2, [r1, r3, lsl #2] __COMPILER_BARRIER(); } } 800254a: bf00 nop 800254c: 370c adds r7, #12 800254e: 46bd mov sp, r7 8002550: f85d 7b04 ldr.w r7, [sp], #4 8002554: 4770 bx lr 8002556: bf00 nop 8002558: e000e100 .word 0xe000e100 0800255c <__NVIC_SetPriority>: \param [in] IRQn Interrupt number. \param [in] priority Priority to set. \note The priority cannot be set for every processor exception. */ __STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) { 800255c: b480 push {r7} 800255e: b083 sub sp, #12 8002560: af00 add r7, sp, #0 8002562: 4603 mov r3, r0 8002564: 6039 str r1, [r7, #0] 8002566: 71fb strb r3, [r7, #7] if ((int32_t)(IRQn) >= 0) 8002568: f997 3007 ldrsb.w r3, [r7, #7] 800256c: 2b00 cmp r3, #0 800256e: db0a blt.n 8002586 <__NVIC_SetPriority+0x2a> { NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 8002570: 683b ldr r3, [r7, #0] 8002572: b2da uxtb r2, r3 8002574: 490c ldr r1, [pc, #48] @ (80025a8 <__NVIC_SetPriority+0x4c>) 8002576: f997 3007 ldrsb.w r3, [r7, #7] 800257a: 0112 lsls r2, r2, #4 800257c: b2d2 uxtb r2, r2 800257e: 440b add r3, r1 8002580: f883 2300 strb.w r2, [r3, #768] @ 0x300 } else { SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); } } 8002584: e00a b.n 800259c <__NVIC_SetPriority+0x40> SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 8002586: 683b ldr r3, [r7, #0] 8002588: b2da uxtb r2, r3 800258a: 4908 ldr r1, [pc, #32] @ (80025ac <__NVIC_SetPriority+0x50>) 800258c: 79fb ldrb r3, [r7, #7] 800258e: f003 030f and.w r3, r3, #15 8002592: 3b04 subs r3, #4 8002594: 0112 lsls r2, r2, #4 8002596: b2d2 uxtb r2, r2 8002598: 440b add r3, r1 800259a: 761a strb r2, [r3, #24] } 800259c: bf00 nop 800259e: 370c adds r7, #12 80025a0: 46bd mov sp, r7 80025a2: f85d 7b04 ldr.w r7, [sp], #4 80025a6: 4770 bx lr 80025a8: e000e100 .word 0xe000e100 80025ac: e000ed00 .word 0xe000ed00 080025b0 : \param [in] PreemptPriority Preemptive priority value (starting from 0). \param [in] SubPriority Subpriority value (starting from 0). \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority(). */ __STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority) { 80025b0: b480 push {r7} 80025b2: b089 sub sp, #36 @ 0x24 80025b4: af00 add r7, sp, #0 80025b6: 60f8 str r0, [r7, #12] 80025b8: 60b9 str r1, [r7, #8] 80025ba: 607a str r2, [r7, #4] uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ 80025bc: 68fb ldr r3, [r7, #12] 80025be: f003 0307 and.w r3, r3, #7 80025c2: 61fb str r3, [r7, #28] uint32_t PreemptPriorityBits; uint32_t SubPriorityBits; PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); 80025c4: 69fb ldr r3, [r7, #28] 80025c6: f1c3 0307 rsb r3, r3, #7 80025ca: 2b04 cmp r3, #4 80025cc: bf28 it cs 80025ce: 2304 movcs r3, #4 80025d0: 61bb str r3, [r7, #24] SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); 80025d2: 69fb ldr r3, [r7, #28] 80025d4: 3304 adds r3, #4 80025d6: 2b06 cmp r3, #6 80025d8: d902 bls.n 80025e0 80025da: 69fb ldr r3, [r7, #28] 80025dc: 3b03 subs r3, #3 80025de: e000 b.n 80025e2 80025e0: 2300 movs r3, #0 80025e2: 617b str r3, [r7, #20] return ( ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | 80025e4: f04f 32ff mov.w r2, #4294967295 @ 0xffffffff 80025e8: 69bb ldr r3, [r7, #24] 80025ea: fa02 f303 lsl.w r3, r2, r3 80025ee: 43da mvns r2, r3 80025f0: 68bb ldr r3, [r7, #8] 80025f2: 401a ands r2, r3 80025f4: 697b ldr r3, [r7, #20] 80025f6: 409a lsls r2, r3 ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) 80025f8: f04f 31ff mov.w r1, #4294967295 @ 0xffffffff 80025fc: 697b ldr r3, [r7, #20] 80025fe: fa01 f303 lsl.w r3, r1, r3 8002602: 43d9 mvns r1, r3 8002604: 687b ldr r3, [r7, #4] 8002606: 400b ands r3, r1 ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | 8002608: 4313 orrs r3, r2 ); } 800260a: 4618 mov r0, r3 800260c: 3724 adds r7, #36 @ 0x24 800260e: 46bd mov sp, r7 8002610: f85d 7b04 ldr.w r7, [sp], #4 8002614: 4770 bx lr ... 08002618 : \note When the variable __Vendor_SysTickConfig is set to 1, then the function SysTick_Config is not included. In this case, the file device.h must contain a vendor-specific implementation of this function. */ __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) { 8002618: b580 push {r7, lr} 800261a: b082 sub sp, #8 800261c: af00 add r7, sp, #0 800261e: 6078 str r0, [r7, #4] if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) 8002620: 687b ldr r3, [r7, #4] 8002622: 3b01 subs r3, #1 8002624: f1b3 7f80 cmp.w r3, #16777216 @ 0x1000000 8002628: d301 bcc.n 800262e { return (1UL); /* Reload value impossible */ 800262a: 2301 movs r3, #1 800262c: e00f b.n 800264e } SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ 800262e: 4a0a ldr r2, [pc, #40] @ (8002658 ) 8002630: 687b ldr r3, [r7, #4] 8002632: 3b01 subs r3, #1 8002634: 6053 str r3, [r2, #4] NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ 8002636: 210f movs r1, #15 8002638: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff 800263c: f7ff ff8e bl 800255c <__NVIC_SetPriority> SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ 8002640: 4b05 ldr r3, [pc, #20] @ (8002658 ) 8002642: 2200 movs r2, #0 8002644: 609a str r2, [r3, #8] SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | 8002646: 4b04 ldr r3, [pc, #16] @ (8002658 ) 8002648: 2207 movs r2, #7 800264a: 601a str r2, [r3, #0] SysTick_CTRL_TICKINT_Msk | SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ return (0UL); /* Function successful */ 800264c: 2300 movs r3, #0 } 800264e: 4618 mov r0, r3 8002650: 3708 adds r7, #8 8002652: 46bd mov sp, r7 8002654: bd80 pop {r7, pc} 8002656: bf00 nop 8002658: e000e010 .word 0xe000e010 0800265c : * @note When the NVIC_PriorityGroup_0 is selected, IRQ pre-emption is no more possible. * The pending IRQ priority will be managed only by the subpriority. * @retval None */ void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup) { 800265c: b580 push {r7, lr} 800265e: b082 sub sp, #8 8002660: af00 add r7, sp, #0 8002662: 6078 str r0, [r7, #4] /* Check the parameters */ assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup)); /* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */ NVIC_SetPriorityGrouping(PriorityGroup); 8002664: 6878 ldr r0, [r7, #4] 8002666: f7ff ff29 bl 80024bc <__NVIC_SetPriorityGrouping> } 800266a: bf00 nop 800266c: 3708 adds r7, #8 800266e: 46bd mov sp, r7 8002670: bd80 pop {r7, pc} 08002672 : * This parameter can be a value between 0 and 15 * A lower priority value indicates a higher priority. * @retval None */ void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority) { 8002672: b580 push {r7, lr} 8002674: b086 sub sp, #24 8002676: af00 add r7, sp, #0 8002678: 4603 mov r3, r0 800267a: 60b9 str r1, [r7, #8] 800267c: 607a str r2, [r7, #4] 800267e: 73fb strb r3, [r7, #15] uint32_t prioritygroup = 0x00; 8002680: 2300 movs r3, #0 8002682: 617b str r3, [r7, #20] /* Check the parameters */ assert_param(IS_NVIC_SUB_PRIORITY(SubPriority)); assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority)); prioritygroup = NVIC_GetPriorityGrouping(); 8002684: f7ff ff3e bl 8002504 <__NVIC_GetPriorityGrouping> 8002688: 6178 str r0, [r7, #20] NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority)); 800268a: 687a ldr r2, [r7, #4] 800268c: 68b9 ldr r1, [r7, #8] 800268e: 6978 ldr r0, [r7, #20] 8002690: f7ff ff8e bl 80025b0 8002694: 4602 mov r2, r0 8002696: f997 300f ldrsb.w r3, [r7, #15] 800269a: 4611 mov r1, r2 800269c: 4618 mov r0, r3 800269e: f7ff ff5d bl 800255c <__NVIC_SetPriority> } 80026a2: bf00 nop 80026a4: 3718 adds r7, #24 80026a6: 46bd mov sp, r7 80026a8: bd80 pop {r7, pc} 080026aa : * This parameter can be an enumerator of IRQn_Type enumeration * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32l4xxxx.h)) * @retval None */ void HAL_NVIC_EnableIRQ(IRQn_Type IRQn) { 80026aa: b580 push {r7, lr} 80026ac: b082 sub sp, #8 80026ae: af00 add r7, sp, #0 80026b0: 4603 mov r3, r0 80026b2: 71fb strb r3, [r7, #7] /* Check the parameters */ assert_param(IS_NVIC_DEVICE_IRQ(IRQn)); /* Enable interrupt */ NVIC_EnableIRQ(IRQn); 80026b4: f997 3007 ldrsb.w r3, [r7, #7] 80026b8: 4618 mov r0, r3 80026ba: f7ff ff31 bl 8002520 <__NVIC_EnableIRQ> } 80026be: bf00 nop 80026c0: 3708 adds r7, #8 80026c2: 46bd mov sp, r7 80026c4: bd80 pop {r7, pc} 080026c6 : * @param TicksNumb: Specifies the ticks Number of ticks between two interrupts. * @retval status: - 0 Function succeeded. * - 1 Function failed. */ uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb) { 80026c6: b580 push {r7, lr} 80026c8: b082 sub sp, #8 80026ca: af00 add r7, sp, #0 80026cc: 6078 str r0, [r7, #4] return SysTick_Config(TicksNumb); 80026ce: 6878 ldr r0, [r7, #4] 80026d0: f7ff ffa2 bl 8002618 80026d4: 4603 mov r3, r0 } 80026d6: 4618 mov r0, r3 80026d8: 3708 adds r7, #8 80026da: 46bd mov sp, r7 80026dc: bd80 pop {r7, pc} 080026de : * @param hdma pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA Channel. * @retval HAL status */ HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma) { 80026de: b480 push {r7} 80026e0: b085 sub sp, #20 80026e2: af00 add r7, sp, #0 80026e4: 6078 str r0, [r7, #4] HAL_StatusTypeDef status = HAL_OK; 80026e6: 2300 movs r3, #0 80026e8: 73fb strb r3, [r7, #15] /* Check the DMA peripheral state */ if (hdma->State != HAL_DMA_STATE_BUSY) 80026ea: 687b ldr r3, [r7, #4] 80026ec: f893 3025 ldrb.w r3, [r3, #37] @ 0x25 80026f0: b2db uxtb r3, r3 80026f2: 2b02 cmp r3, #2 80026f4: d008 beq.n 8002708 { hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER; 80026f6: 687b ldr r3, [r7, #4] 80026f8: 2204 movs r2, #4 80026fa: 63da str r2, [r3, #60] @ 0x3c /* Process Unlocked */ __HAL_UNLOCK(hdma); 80026fc: 687b ldr r3, [r7, #4] 80026fe: 2200 movs r2, #0 8002700: f883 2024 strb.w r2, [r3, #36] @ 0x24 return HAL_ERROR; 8002704: 2301 movs r3, #1 8002706: e022 b.n 800274e } else { /* Disable DMA IT */ __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); 8002708: 687b ldr r3, [r7, #4] 800270a: 681b ldr r3, [r3, #0] 800270c: 681a ldr r2, [r3, #0] 800270e: 687b ldr r3, [r7, #4] 8002710: 681b ldr r3, [r3, #0] 8002712: f022 020e bic.w r2, r2, #14 8002716: 601a str r2, [r3, #0] /* disable the DMAMUX sync overrun IT*/ hdma->DMAmuxChannel->CCR &= ~DMAMUX_CxCR_SOIE; #endif /* DMAMUX1 */ /* Disable the channel */ __HAL_DMA_DISABLE(hdma); 8002718: 687b ldr r3, [r7, #4] 800271a: 681b ldr r3, [r3, #0] 800271c: 681a ldr r2, [r3, #0] 800271e: 687b ldr r3, [r7, #4] 8002720: 681b ldr r3, [r3, #0] 8002722: f022 0201 bic.w r2, r2, #1 8002726: 601a str r2, [r3, #0] /* Clear all flags */ hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1CU)); 8002728: 687b ldr r3, [r7, #4] 800272a: 6c5b ldr r3, [r3, #68] @ 0x44 800272c: f003 021c and.w r2, r3, #28 8002730: 687b ldr r3, [r7, #4] 8002732: 6c1b ldr r3, [r3, #64] @ 0x40 8002734: 2101 movs r1, #1 8002736: fa01 f202 lsl.w r2, r1, r2 800273a: 605a str r2, [r3, #4] } #endif /* DMAMUX1 */ /* Change the DMA state */ hdma->State = HAL_DMA_STATE_READY; 800273c: 687b ldr r3, [r7, #4] 800273e: 2201 movs r2, #1 8002740: f883 2025 strb.w r2, [r3, #37] @ 0x25 /* Process Unlocked */ __HAL_UNLOCK(hdma); 8002744: 687b ldr r3, [r7, #4] 8002746: 2200 movs r2, #0 8002748: f883 2024 strb.w r2, [r3, #36] @ 0x24 return status; 800274c: 7bfb ldrb r3, [r7, #15] } } 800274e: 4618 mov r0, r3 8002750: 3714 adds r7, #20 8002752: 46bd mov sp, r7 8002754: f85d 7b04 ldr.w r7, [sp], #4 8002758: 4770 bx lr 0800275a : * @param hdma pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA Channel. * @retval HAL status */ HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma) { 800275a: b580 push {r7, lr} 800275c: b084 sub sp, #16 800275e: af00 add r7, sp, #0 8002760: 6078 str r0, [r7, #4] HAL_StatusTypeDef status = HAL_OK; 8002762: 2300 movs r3, #0 8002764: 73fb strb r3, [r7, #15] if (HAL_DMA_STATE_BUSY != hdma->State) 8002766: 687b ldr r3, [r7, #4] 8002768: f893 3025 ldrb.w r3, [r3, #37] @ 0x25 800276c: b2db uxtb r3, r3 800276e: 2b02 cmp r3, #2 8002770: d005 beq.n 800277e { /* no transfer ongoing */ hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER; 8002772: 687b ldr r3, [r7, #4] 8002774: 2204 movs r2, #4 8002776: 63da str r2, [r3, #60] @ 0x3c status = HAL_ERROR; 8002778: 2301 movs r3, #1 800277a: 73fb strb r3, [r7, #15] 800277c: e029 b.n 80027d2 } else { /* Disable DMA IT */ __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); 800277e: 687b ldr r3, [r7, #4] 8002780: 681b ldr r3, [r3, #0] 8002782: 681a ldr r2, [r3, #0] 8002784: 687b ldr r3, [r7, #4] 8002786: 681b ldr r3, [r3, #0] 8002788: f022 020e bic.w r2, r2, #14 800278c: 601a str r2, [r3, #0] /* Disable the channel */ __HAL_DMA_DISABLE(hdma); 800278e: 687b ldr r3, [r7, #4] 8002790: 681b ldr r3, [r3, #0] 8002792: 681a ldr r2, [r3, #0] 8002794: 687b ldr r3, [r7, #4] 8002796: 681b ldr r3, [r3, #0] 8002798: f022 0201 bic.w r2, r2, #1 800279c: 601a str r2, [r3, #0] hdma->DMAmuxRequestGenStatus->RGCFR = hdma->DMAmuxRequestGenStatusMask; } #else /* Clear all flags */ hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1CU)); 800279e: 687b ldr r3, [r7, #4] 80027a0: 6c5b ldr r3, [r3, #68] @ 0x44 80027a2: f003 021c and.w r2, r3, #28 80027a6: 687b ldr r3, [r7, #4] 80027a8: 6c1b ldr r3, [r3, #64] @ 0x40 80027aa: 2101 movs r1, #1 80027ac: fa01 f202 lsl.w r2, r1, r2 80027b0: 605a str r2, [r3, #4] #endif /* DMAMUX1 */ /* Change the DMA state */ hdma->State = HAL_DMA_STATE_READY; 80027b2: 687b ldr r3, [r7, #4] 80027b4: 2201 movs r2, #1 80027b6: f883 2025 strb.w r2, [r3, #37] @ 0x25 /* Process Unlocked */ __HAL_UNLOCK(hdma); 80027ba: 687b ldr r3, [r7, #4] 80027bc: 2200 movs r2, #0 80027be: f883 2024 strb.w r2, [r3, #36] @ 0x24 /* Call User Abort callback */ if (hdma->XferAbortCallback != NULL) 80027c2: 687b ldr r3, [r7, #4] 80027c4: 6b9b ldr r3, [r3, #56] @ 0x38 80027c6: 2b00 cmp r3, #0 80027c8: d003 beq.n 80027d2 { hdma->XferAbortCallback(hdma); 80027ca: 687b ldr r3, [r7, #4] 80027cc: 6b9b ldr r3, [r3, #56] @ 0x38 80027ce: 6878 ldr r0, [r7, #4] 80027d0: 4798 blx r3 } } return status; 80027d2: 7bfb ldrb r3, [r7, #15] } 80027d4: 4618 mov r0, r3 80027d6: 3710 adds r7, #16 80027d8: 46bd mov sp, r7 80027da: bd80 pop {r7, pc} 080027dc : * @param GPIO_Init pointer to a GPIO_InitTypeDef structure that contains * the configuration information for the specified GPIO peripheral. * @retval None */ void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init) { 80027dc: b480 push {r7} 80027de: b087 sub sp, #28 80027e0: af00 add r7, sp, #0 80027e2: 6078 str r0, [r7, #4] 80027e4: 6039 str r1, [r7, #0] uint32_t position = 0x00u; 80027e6: 2300 movs r3, #0 80027e8: 617b str r3, [r7, #20] assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); assert_param(IS_GPIO_PIN(GPIO_Init->Pin)); assert_param(IS_GPIO_MODE(GPIO_Init->Mode)); /* Configure the port pins */ while (((GPIO_Init->Pin) >> position) != 0x00u) 80027ea: e17f b.n 8002aec { /* Get current io position */ iocurrent = (GPIO_Init->Pin) & (1uL << position); 80027ec: 683b ldr r3, [r7, #0] 80027ee: 681a ldr r2, [r3, #0] 80027f0: 2101 movs r1, #1 80027f2: 697b ldr r3, [r7, #20] 80027f4: fa01 f303 lsl.w r3, r1, r3 80027f8: 4013 ands r3, r2 80027fa: 60fb str r3, [r7, #12] if (iocurrent != 0x00u) 80027fc: 68fb ldr r3, [r7, #12] 80027fe: 2b00 cmp r3, #0 8002800: f000 8171 beq.w 8002ae6 { /*--------------------- GPIO Mode Configuration ------------------------*/ /* In case of Output or Alternate function mode selection */ if (((GPIO_Init->Mode & GPIO_MODE) == MODE_OUTPUT) || ((GPIO_Init->Mode & GPIO_MODE) == MODE_AF)) 8002804: 683b ldr r3, [r7, #0] 8002806: 685b ldr r3, [r3, #4] 8002808: f003 0303 and.w r3, r3, #3 800280c: 2b01 cmp r3, #1 800280e: d005 beq.n 800281c 8002810: 683b ldr r3, [r7, #0] 8002812: 685b ldr r3, [r3, #4] 8002814: f003 0303 and.w r3, r3, #3 8002818: 2b02 cmp r3, #2 800281a: d130 bne.n 800287e { /* Check the Speed parameter */ assert_param(IS_GPIO_SPEED(GPIO_Init->Speed)); /* Configure the IO Speed */ temp = GPIOx->OSPEEDR; 800281c: 687b ldr r3, [r7, #4] 800281e: 689b ldr r3, [r3, #8] 8002820: 613b str r3, [r7, #16] temp &= ~(GPIO_OSPEEDR_OSPEED0 << (position * 2u)); 8002822: 697b ldr r3, [r7, #20] 8002824: 005b lsls r3, r3, #1 8002826: 2203 movs r2, #3 8002828: fa02 f303 lsl.w r3, r2, r3 800282c: 43db mvns r3, r3 800282e: 693a ldr r2, [r7, #16] 8002830: 4013 ands r3, r2 8002832: 613b str r3, [r7, #16] temp |= (GPIO_Init->Speed << (position * 2u)); 8002834: 683b ldr r3, [r7, #0] 8002836: 68da ldr r2, [r3, #12] 8002838: 697b ldr r3, [r7, #20] 800283a: 005b lsls r3, r3, #1 800283c: fa02 f303 lsl.w r3, r2, r3 8002840: 693a ldr r2, [r7, #16] 8002842: 4313 orrs r3, r2 8002844: 613b str r3, [r7, #16] GPIOx->OSPEEDR = temp; 8002846: 687b ldr r3, [r7, #4] 8002848: 693a ldr r2, [r7, #16] 800284a: 609a str r2, [r3, #8] /* Configure the IO Output Type */ temp = GPIOx->OTYPER; 800284c: 687b ldr r3, [r7, #4] 800284e: 685b ldr r3, [r3, #4] 8002850: 613b str r3, [r7, #16] temp &= ~(GPIO_OTYPER_OT0 << position) ; 8002852: 2201 movs r2, #1 8002854: 697b ldr r3, [r7, #20] 8002856: fa02 f303 lsl.w r3, r2, r3 800285a: 43db mvns r3, r3 800285c: 693a ldr r2, [r7, #16] 800285e: 4013 ands r3, r2 8002860: 613b str r3, [r7, #16] temp |= (((GPIO_Init->Mode & OUTPUT_TYPE) >> OUTPUT_TYPE_Pos) << position); 8002862: 683b ldr r3, [r7, #0] 8002864: 685b ldr r3, [r3, #4] 8002866: 091b lsrs r3, r3, #4 8002868: f003 0201 and.w r2, r3, #1 800286c: 697b ldr r3, [r7, #20] 800286e: fa02 f303 lsl.w r3, r2, r3 8002872: 693a ldr r2, [r7, #16] 8002874: 4313 orrs r3, r2 8002876: 613b str r3, [r7, #16] GPIOx->OTYPER = temp; 8002878: 687b ldr r3, [r7, #4] 800287a: 693a ldr r2, [r7, #16] 800287c: 605a str r2, [r3, #4] } #if defined(STM32L471xx) || defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) /* In case of Analog mode, check if ADC control mode is selected */ if((GPIO_Init->Mode & GPIO_MODE_ANALOG) == GPIO_MODE_ANALOG) 800287e: 683b ldr r3, [r7, #0] 8002880: 685b ldr r3, [r3, #4] 8002882: f003 0303 and.w r3, r3, #3 8002886: 2b03 cmp r3, #3 8002888: d118 bne.n 80028bc { /* Configure the IO Output Type */ temp = GPIOx->ASCR; 800288a: 687b ldr r3, [r7, #4] 800288c: 6adb ldr r3, [r3, #44] @ 0x2c 800288e: 613b str r3, [r7, #16] temp &= ~(GPIO_ASCR_ASC0 << position) ; 8002890: 2201 movs r2, #1 8002892: 697b ldr r3, [r7, #20] 8002894: fa02 f303 lsl.w r3, r2, r3 8002898: 43db mvns r3, r3 800289a: 693a ldr r2, [r7, #16] 800289c: 4013 ands r3, r2 800289e: 613b str r3, [r7, #16] temp |= (((GPIO_Init->Mode & GPIO_MODE_ANALOG_ADC_CONTROL) >> 3) << position); 80028a0: 683b ldr r3, [r7, #0] 80028a2: 685b ldr r3, [r3, #4] 80028a4: 08db lsrs r3, r3, #3 80028a6: f003 0201 and.w r2, r3, #1 80028aa: 697b ldr r3, [r7, #20] 80028ac: fa02 f303 lsl.w r3, r2, r3 80028b0: 693a ldr r2, [r7, #16] 80028b2: 4313 orrs r3, r2 80028b4: 613b str r3, [r7, #16] GPIOx->ASCR = temp; 80028b6: 687b ldr r3, [r7, #4] 80028b8: 693a ldr r2, [r7, #16] 80028ba: 62da str r2, [r3, #44] @ 0x2c } #endif /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx */ /* Activate the Pull-up or Pull down resistor for the current IO */ if ((GPIO_Init->Mode & GPIO_MODE) != MODE_ANALOG) 80028bc: 683b ldr r3, [r7, #0] 80028be: 685b ldr r3, [r3, #4] 80028c0: f003 0303 and.w r3, r3, #3 80028c4: 2b03 cmp r3, #3 80028c6: d017 beq.n 80028f8 { /* Check the Pull parameter */ assert_param(IS_GPIO_PULL(GPIO_Init->Pull)); temp = GPIOx->PUPDR; 80028c8: 687b ldr r3, [r7, #4] 80028ca: 68db ldr r3, [r3, #12] 80028cc: 613b str r3, [r7, #16] temp &= ~(GPIO_PUPDR_PUPD0 << (position * 2U)); 80028ce: 697b ldr r3, [r7, #20] 80028d0: 005b lsls r3, r3, #1 80028d2: 2203 movs r2, #3 80028d4: fa02 f303 lsl.w r3, r2, r3 80028d8: 43db mvns r3, r3 80028da: 693a ldr r2, [r7, #16] 80028dc: 4013 ands r3, r2 80028de: 613b str r3, [r7, #16] temp |= ((GPIO_Init->Pull) << (position * 2U)); 80028e0: 683b ldr r3, [r7, #0] 80028e2: 689a ldr r2, [r3, #8] 80028e4: 697b ldr r3, [r7, #20] 80028e6: 005b lsls r3, r3, #1 80028e8: fa02 f303 lsl.w r3, r2, r3 80028ec: 693a ldr r2, [r7, #16] 80028ee: 4313 orrs r3, r2 80028f0: 613b str r3, [r7, #16] GPIOx->PUPDR = temp; 80028f2: 687b ldr r3, [r7, #4] 80028f4: 693a ldr r2, [r7, #16] 80028f6: 60da str r2, [r3, #12] } /* In case of Alternate function mode selection */ if ((GPIO_Init->Mode & GPIO_MODE) == MODE_AF) 80028f8: 683b ldr r3, [r7, #0] 80028fa: 685b ldr r3, [r3, #4] 80028fc: f003 0303 and.w r3, r3, #3 8002900: 2b02 cmp r3, #2 8002902: d123 bne.n 800294c /* Check the Alternate function parameters */ assert_param(IS_GPIO_AF_INSTANCE(GPIOx)); assert_param(IS_GPIO_AF(GPIO_Init->Alternate)); /* Configure Alternate function mapped with the current IO */ temp = GPIOx->AFR[position >> 3u]; 8002904: 697b ldr r3, [r7, #20] 8002906: 08da lsrs r2, r3, #3 8002908: 687b ldr r3, [r7, #4] 800290a: 3208 adds r2, #8 800290c: f853 3022 ldr.w r3, [r3, r2, lsl #2] 8002910: 613b str r3, [r7, #16] temp &= ~(0xFu << ((position & 0x07u) * 4u)); 8002912: 697b ldr r3, [r7, #20] 8002914: f003 0307 and.w r3, r3, #7 8002918: 009b lsls r3, r3, #2 800291a: 220f movs r2, #15 800291c: fa02 f303 lsl.w r3, r2, r3 8002920: 43db mvns r3, r3 8002922: 693a ldr r2, [r7, #16] 8002924: 4013 ands r3, r2 8002926: 613b str r3, [r7, #16] temp |= ((GPIO_Init->Alternate) << ((position & 0x07u) * 4u)); 8002928: 683b ldr r3, [r7, #0] 800292a: 691a ldr r2, [r3, #16] 800292c: 697b ldr r3, [r7, #20] 800292e: f003 0307 and.w r3, r3, #7 8002932: 009b lsls r3, r3, #2 8002934: fa02 f303 lsl.w r3, r2, r3 8002938: 693a ldr r2, [r7, #16] 800293a: 4313 orrs r3, r2 800293c: 613b str r3, [r7, #16] GPIOx->AFR[position >> 3u] = temp; 800293e: 697b ldr r3, [r7, #20] 8002940: 08da lsrs r2, r3, #3 8002942: 687b ldr r3, [r7, #4] 8002944: 3208 adds r2, #8 8002946: 6939 ldr r1, [r7, #16] 8002948: f843 1022 str.w r1, [r3, r2, lsl #2] } /* Configure IO Direction mode (Input, Output, Alternate or Analog) */ temp = GPIOx->MODER; 800294c: 687b ldr r3, [r7, #4] 800294e: 681b ldr r3, [r3, #0] 8002950: 613b str r3, [r7, #16] temp &= ~(GPIO_MODER_MODE0 << (position * 2u)); 8002952: 697b ldr r3, [r7, #20] 8002954: 005b lsls r3, r3, #1 8002956: 2203 movs r2, #3 8002958: fa02 f303 lsl.w r3, r2, r3 800295c: 43db mvns r3, r3 800295e: 693a ldr r2, [r7, #16] 8002960: 4013 ands r3, r2 8002962: 613b str r3, [r7, #16] temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2u)); 8002964: 683b ldr r3, [r7, #0] 8002966: 685b ldr r3, [r3, #4] 8002968: f003 0203 and.w r2, r3, #3 800296c: 697b ldr r3, [r7, #20] 800296e: 005b lsls r3, r3, #1 8002970: fa02 f303 lsl.w r3, r2, r3 8002974: 693a ldr r2, [r7, #16] 8002976: 4313 orrs r3, r2 8002978: 613b str r3, [r7, #16] GPIOx->MODER = temp; 800297a: 687b ldr r3, [r7, #4] 800297c: 693a ldr r2, [r7, #16] 800297e: 601a str r2, [r3, #0] /*--------------------- EXTI Mode Configuration ------------------------*/ /* Configure the External Interrupt or event for the current IO */ if ((GPIO_Init->Mode & EXTI_MODE) != 0x00u) 8002980: 683b ldr r3, [r7, #0] 8002982: 685b ldr r3, [r3, #4] 8002984: f403 3340 and.w r3, r3, #196608 @ 0x30000 8002988: 2b00 cmp r3, #0 800298a: f000 80ac beq.w 8002ae6 { /* Enable SYSCFG Clock */ __HAL_RCC_SYSCFG_CLK_ENABLE(); 800298e: 4b5f ldr r3, [pc, #380] @ (8002b0c ) 8002990: 6e1b ldr r3, [r3, #96] @ 0x60 8002992: 4a5e ldr r2, [pc, #376] @ (8002b0c ) 8002994: f043 0301 orr.w r3, r3, #1 8002998: 6613 str r3, [r2, #96] @ 0x60 800299a: 4b5c ldr r3, [pc, #368] @ (8002b0c ) 800299c: 6e1b ldr r3, [r3, #96] @ 0x60 800299e: f003 0301 and.w r3, r3, #1 80029a2: 60bb str r3, [r7, #8] 80029a4: 68bb ldr r3, [r7, #8] temp = SYSCFG->EXTICR[position >> 2u]; 80029a6: 4a5a ldr r2, [pc, #360] @ (8002b10 ) 80029a8: 697b ldr r3, [r7, #20] 80029aa: 089b lsrs r3, r3, #2 80029ac: 3302 adds r3, #2 80029ae: f852 3023 ldr.w r3, [r2, r3, lsl #2] 80029b2: 613b str r3, [r7, #16] temp &= ~(0x0FuL << (4u * (position & 0x03u))); 80029b4: 697b ldr r3, [r7, #20] 80029b6: f003 0303 and.w r3, r3, #3 80029ba: 009b lsls r3, r3, #2 80029bc: 220f movs r2, #15 80029be: fa02 f303 lsl.w r3, r2, r3 80029c2: 43db mvns r3, r3 80029c4: 693a ldr r2, [r7, #16] 80029c6: 4013 ands r3, r2 80029c8: 613b str r3, [r7, #16] temp |= (GPIO_GET_INDEX(GPIOx) << (4u * (position & 0x03u))); 80029ca: 687b ldr r3, [r7, #4] 80029cc: f1b3 4f90 cmp.w r3, #1207959552 @ 0x48000000 80029d0: d025 beq.n 8002a1e 80029d2: 687b ldr r3, [r7, #4] 80029d4: 4a4f ldr r2, [pc, #316] @ (8002b14 ) 80029d6: 4293 cmp r3, r2 80029d8: d01f beq.n 8002a1a 80029da: 687b ldr r3, [r7, #4] 80029dc: 4a4e ldr r2, [pc, #312] @ (8002b18 ) 80029de: 4293 cmp r3, r2 80029e0: d019 beq.n 8002a16 80029e2: 687b ldr r3, [r7, #4] 80029e4: 4a4d ldr r2, [pc, #308] @ (8002b1c ) 80029e6: 4293 cmp r3, r2 80029e8: d013 beq.n 8002a12 80029ea: 687b ldr r3, [r7, #4] 80029ec: 4a4c ldr r2, [pc, #304] @ (8002b20 ) 80029ee: 4293 cmp r3, r2 80029f0: d00d beq.n 8002a0e 80029f2: 687b ldr r3, [r7, #4] 80029f4: 4a4b ldr r2, [pc, #300] @ (8002b24 ) 80029f6: 4293 cmp r3, r2 80029f8: d007 beq.n 8002a0a 80029fa: 687b ldr r3, [r7, #4] 80029fc: 4a4a ldr r2, [pc, #296] @ (8002b28 ) 80029fe: 4293 cmp r3, r2 8002a00: d101 bne.n 8002a06 8002a02: 2306 movs r3, #6 8002a04: e00c b.n 8002a20 8002a06: 2307 movs r3, #7 8002a08: e00a b.n 8002a20 8002a0a: 2305 movs r3, #5 8002a0c: e008 b.n 8002a20 8002a0e: 2304 movs r3, #4 8002a10: e006 b.n 8002a20 8002a12: 2303 movs r3, #3 8002a14: e004 b.n 8002a20 8002a16: 2302 movs r3, #2 8002a18: e002 b.n 8002a20 8002a1a: 2301 movs r3, #1 8002a1c: e000 b.n 8002a20 8002a1e: 2300 movs r3, #0 8002a20: 697a ldr r2, [r7, #20] 8002a22: f002 0203 and.w r2, r2, #3 8002a26: 0092 lsls r2, r2, #2 8002a28: 4093 lsls r3, r2 8002a2a: 693a ldr r2, [r7, #16] 8002a2c: 4313 orrs r3, r2 8002a2e: 613b str r3, [r7, #16] SYSCFG->EXTICR[position >> 2u] = temp; 8002a30: 4937 ldr r1, [pc, #220] @ (8002b10 ) 8002a32: 697b ldr r3, [r7, #20] 8002a34: 089b lsrs r3, r3, #2 8002a36: 3302 adds r3, #2 8002a38: 693a ldr r2, [r7, #16] 8002a3a: f841 2023 str.w r2, [r1, r3, lsl #2] /* Clear Rising Falling edge configuration */ temp = EXTI->RTSR1; 8002a3e: 4b3b ldr r3, [pc, #236] @ (8002b2c ) 8002a40: 689b ldr r3, [r3, #8] 8002a42: 613b str r3, [r7, #16] temp &= ~(iocurrent); 8002a44: 68fb ldr r3, [r7, #12] 8002a46: 43db mvns r3, r3 8002a48: 693a ldr r2, [r7, #16] 8002a4a: 4013 ands r3, r2 8002a4c: 613b str r3, [r7, #16] if ((GPIO_Init->Mode & TRIGGER_RISING) != 0x00u) 8002a4e: 683b ldr r3, [r7, #0] 8002a50: 685b ldr r3, [r3, #4] 8002a52: f403 1380 and.w r3, r3, #1048576 @ 0x100000 8002a56: 2b00 cmp r3, #0 8002a58: d003 beq.n 8002a62 { temp |= iocurrent; 8002a5a: 693a ldr r2, [r7, #16] 8002a5c: 68fb ldr r3, [r7, #12] 8002a5e: 4313 orrs r3, r2 8002a60: 613b str r3, [r7, #16] } EXTI->RTSR1 = temp; 8002a62: 4a32 ldr r2, [pc, #200] @ (8002b2c ) 8002a64: 693b ldr r3, [r7, #16] 8002a66: 6093 str r3, [r2, #8] temp = EXTI->FTSR1; 8002a68: 4b30 ldr r3, [pc, #192] @ (8002b2c ) 8002a6a: 68db ldr r3, [r3, #12] 8002a6c: 613b str r3, [r7, #16] temp &= ~(iocurrent); 8002a6e: 68fb ldr r3, [r7, #12] 8002a70: 43db mvns r3, r3 8002a72: 693a ldr r2, [r7, #16] 8002a74: 4013 ands r3, r2 8002a76: 613b str r3, [r7, #16] if ((GPIO_Init->Mode & TRIGGER_FALLING) != 0x00u) 8002a78: 683b ldr r3, [r7, #0] 8002a7a: 685b ldr r3, [r3, #4] 8002a7c: f403 1300 and.w r3, r3, #2097152 @ 0x200000 8002a80: 2b00 cmp r3, #0 8002a82: d003 beq.n 8002a8c { temp |= iocurrent; 8002a84: 693a ldr r2, [r7, #16] 8002a86: 68fb ldr r3, [r7, #12] 8002a88: 4313 orrs r3, r2 8002a8a: 613b str r3, [r7, #16] } EXTI->FTSR1 = temp; 8002a8c: 4a27 ldr r2, [pc, #156] @ (8002b2c ) 8002a8e: 693b ldr r3, [r7, #16] 8002a90: 60d3 str r3, [r2, #12] /* Clear EXTI line configuration */ temp = EXTI->EMR1; 8002a92: 4b26 ldr r3, [pc, #152] @ (8002b2c ) 8002a94: 685b ldr r3, [r3, #4] 8002a96: 613b str r3, [r7, #16] temp &= ~(iocurrent); 8002a98: 68fb ldr r3, [r7, #12] 8002a9a: 43db mvns r3, r3 8002a9c: 693a ldr r2, [r7, #16] 8002a9e: 4013 ands r3, r2 8002aa0: 613b str r3, [r7, #16] if ((GPIO_Init->Mode & EXTI_EVT) != 0x00u) 8002aa2: 683b ldr r3, [r7, #0] 8002aa4: 685b ldr r3, [r3, #4] 8002aa6: f403 3300 and.w r3, r3, #131072 @ 0x20000 8002aaa: 2b00 cmp r3, #0 8002aac: d003 beq.n 8002ab6 { temp |= iocurrent; 8002aae: 693a ldr r2, [r7, #16] 8002ab0: 68fb ldr r3, [r7, #12] 8002ab2: 4313 orrs r3, r2 8002ab4: 613b str r3, [r7, #16] } EXTI->EMR1 = temp; 8002ab6: 4a1d ldr r2, [pc, #116] @ (8002b2c ) 8002ab8: 693b ldr r3, [r7, #16] 8002aba: 6053 str r3, [r2, #4] temp = EXTI->IMR1; 8002abc: 4b1b ldr r3, [pc, #108] @ (8002b2c ) 8002abe: 681b ldr r3, [r3, #0] 8002ac0: 613b str r3, [r7, #16] temp &= ~(iocurrent); 8002ac2: 68fb ldr r3, [r7, #12] 8002ac4: 43db mvns r3, r3 8002ac6: 693a ldr r2, [r7, #16] 8002ac8: 4013 ands r3, r2 8002aca: 613b str r3, [r7, #16] if ((GPIO_Init->Mode & EXTI_IT) != 0x00u) 8002acc: 683b ldr r3, [r7, #0] 8002ace: 685b ldr r3, [r3, #4] 8002ad0: f403 3380 and.w r3, r3, #65536 @ 0x10000 8002ad4: 2b00 cmp r3, #0 8002ad6: d003 beq.n 8002ae0 { temp |= iocurrent; 8002ad8: 693a ldr r2, [r7, #16] 8002ada: 68fb ldr r3, [r7, #12] 8002adc: 4313 orrs r3, r2 8002ade: 613b str r3, [r7, #16] } EXTI->IMR1 = temp; 8002ae0: 4a12 ldr r2, [pc, #72] @ (8002b2c ) 8002ae2: 693b ldr r3, [r7, #16] 8002ae4: 6013 str r3, [r2, #0] } } position++; 8002ae6: 697b ldr r3, [r7, #20] 8002ae8: 3301 adds r3, #1 8002aea: 617b str r3, [r7, #20] while (((GPIO_Init->Pin) >> position) != 0x00u) 8002aec: 683b ldr r3, [r7, #0] 8002aee: 681a ldr r2, [r3, #0] 8002af0: 697b ldr r3, [r7, #20] 8002af2: fa22 f303 lsr.w r3, r2, r3 8002af6: 2b00 cmp r3, #0 8002af8: f47f ae78 bne.w 80027ec } } 8002afc: bf00 nop 8002afe: bf00 nop 8002b00: 371c adds r7, #28 8002b02: 46bd mov sp, r7 8002b04: f85d 7b04 ldr.w r7, [sp], #4 8002b08: 4770 bx lr 8002b0a: bf00 nop 8002b0c: 40021000 .word 0x40021000 8002b10: 40010000 .word 0x40010000 8002b14: 48000400 .word 0x48000400 8002b18: 48000800 .word 0x48000800 8002b1c: 48000c00 .word 0x48000c00 8002b20: 48001000 .word 0x48001000 8002b24: 48001400 .word 0x48001400 8002b28: 48001800 .word 0x48001800 8002b2c: 40010400 .word 0x40010400 08002b30 : * @arg GPIO_PIN_RESET: to clear the port pin * @arg GPIO_PIN_SET: to set the port pin * @retval None */ void HAL_GPIO_WritePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState) { 8002b30: b480 push {r7} 8002b32: b083 sub sp, #12 8002b34: af00 add r7, sp, #0 8002b36: 6078 str r0, [r7, #4] 8002b38: 460b mov r3, r1 8002b3a: 807b strh r3, [r7, #2] 8002b3c: 4613 mov r3, r2 8002b3e: 707b strb r3, [r7, #1] /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); assert_param(IS_GPIO_PIN_ACTION(PinState)); if(PinState != GPIO_PIN_RESET) 8002b40: 787b ldrb r3, [r7, #1] 8002b42: 2b00 cmp r3, #0 8002b44: d003 beq.n 8002b4e { GPIOx->BSRR = (uint32_t)GPIO_Pin; 8002b46: 887a ldrh r2, [r7, #2] 8002b48: 687b ldr r3, [r7, #4] 8002b4a: 619a str r2, [r3, #24] } else { GPIOx->BRR = (uint32_t)GPIO_Pin; } } 8002b4c: e002 b.n 8002b54 GPIOx->BRR = (uint32_t)GPIO_Pin; 8002b4e: 887a ldrh r2, [r7, #2] 8002b50: 687b ldr r3, [r7, #4] 8002b52: 629a str r2, [r3, #40] @ 0x28 } 8002b54: bf00 nop 8002b56: 370c adds r7, #12 8002b58: 46bd mov sp, r7 8002b5a: f85d 7b04 ldr.w r7, [sp], #4 8002b5e: 4770 bx lr 08002b60 : * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains * the configuration information for the specified I2C. * @retval HAL status */ HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c) { 8002b60: b580 push {r7, lr} 8002b62: b082 sub sp, #8 8002b64: af00 add r7, sp, #0 8002b66: 6078 str r0, [r7, #4] /* Check the I2C handle allocation */ if (hi2c == NULL) 8002b68: 687b ldr r3, [r7, #4] 8002b6a: 2b00 cmp r3, #0 8002b6c: d101 bne.n 8002b72 { return HAL_ERROR; 8002b6e: 2301 movs r3, #1 8002b70: e08d b.n 8002c8e assert_param(IS_I2C_OWN_ADDRESS2(hi2c->Init.OwnAddress2)); assert_param(IS_I2C_OWN_ADDRESS2_MASK(hi2c->Init.OwnAddress2Masks)); assert_param(IS_I2C_GENERAL_CALL(hi2c->Init.GeneralCallMode)); assert_param(IS_I2C_NO_STRETCH(hi2c->Init.NoStretchMode)); if (hi2c->State == HAL_I2C_STATE_RESET) 8002b72: 687b ldr r3, [r7, #4] 8002b74: f893 3041 ldrb.w r3, [r3, #65] @ 0x41 8002b78: b2db uxtb r3, r3 8002b7a: 2b00 cmp r3, #0 8002b7c: d106 bne.n 8002b8c { /* Allocate lock resource and initialize it */ hi2c->Lock = HAL_UNLOCKED; 8002b7e: 687b ldr r3, [r7, #4] 8002b80: 2200 movs r2, #0 8002b82: f883 2040 strb.w r2, [r3, #64] @ 0x40 /* Init the low level hardware : GPIO, CLOCK, CORTEX...etc */ hi2c->MspInitCallback(hi2c); #else /* Init the low level hardware : GPIO, CLOCK, CORTEX...etc */ HAL_I2C_MspInit(hi2c); 8002b86: 6878 ldr r0, [r7, #4] 8002b88: f7ff fa00 bl 8001f8c #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ } hi2c->State = HAL_I2C_STATE_BUSY; 8002b8c: 687b ldr r3, [r7, #4] 8002b8e: 2224 movs r2, #36 @ 0x24 8002b90: f883 2041 strb.w r2, [r3, #65] @ 0x41 /* Disable the selected I2C peripheral */ __HAL_I2C_DISABLE(hi2c); 8002b94: 687b ldr r3, [r7, #4] 8002b96: 681b ldr r3, [r3, #0] 8002b98: 681a ldr r2, [r3, #0] 8002b9a: 687b ldr r3, [r7, #4] 8002b9c: 681b ldr r3, [r3, #0] 8002b9e: f022 0201 bic.w r2, r2, #1 8002ba2: 601a str r2, [r3, #0] /*---------------------------- I2Cx TIMINGR Configuration ------------------*/ /* Configure I2Cx: Frequency range */ hi2c->Instance->TIMINGR = hi2c->Init.Timing & TIMING_CLEAR_MASK; 8002ba4: 687b ldr r3, [r7, #4] 8002ba6: 685a ldr r2, [r3, #4] 8002ba8: 687b ldr r3, [r7, #4] 8002baa: 681b ldr r3, [r3, #0] 8002bac: f022 6270 bic.w r2, r2, #251658240 @ 0xf000000 8002bb0: 611a str r2, [r3, #16] /*---------------------------- I2Cx OAR1 Configuration ---------------------*/ /* Disable Own Address1 before set the Own Address1 configuration */ hi2c->Instance->OAR1 &= ~I2C_OAR1_OA1EN; 8002bb2: 687b ldr r3, [r7, #4] 8002bb4: 681b ldr r3, [r3, #0] 8002bb6: 689a ldr r2, [r3, #8] 8002bb8: 687b ldr r3, [r7, #4] 8002bba: 681b ldr r3, [r3, #0] 8002bbc: f422 4200 bic.w r2, r2, #32768 @ 0x8000 8002bc0: 609a str r2, [r3, #8] /* Configure I2Cx: Own Address1 and ack own address1 mode */ if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT) 8002bc2: 687b ldr r3, [r7, #4] 8002bc4: 68db ldr r3, [r3, #12] 8002bc6: 2b01 cmp r3, #1 8002bc8: d107 bne.n 8002bda { hi2c->Instance->OAR1 = (I2C_OAR1_OA1EN | hi2c->Init.OwnAddress1); 8002bca: 687b ldr r3, [r7, #4] 8002bcc: 689a ldr r2, [r3, #8] 8002bce: 687b ldr r3, [r7, #4] 8002bd0: 681b ldr r3, [r3, #0] 8002bd2: f442 4200 orr.w r2, r2, #32768 @ 0x8000 8002bd6: 609a str r2, [r3, #8] 8002bd8: e006 b.n 8002be8 } else /* I2C_ADDRESSINGMODE_10BIT */ { hi2c->Instance->OAR1 = (I2C_OAR1_OA1EN | I2C_OAR1_OA1MODE | hi2c->Init.OwnAddress1); 8002bda: 687b ldr r3, [r7, #4] 8002bdc: 689a ldr r2, [r3, #8] 8002bde: 687b ldr r3, [r7, #4] 8002be0: 681b ldr r3, [r3, #0] 8002be2: f442 4204 orr.w r2, r2, #33792 @ 0x8400 8002be6: 609a str r2, [r3, #8] } /*---------------------------- I2Cx CR2 Configuration ----------------------*/ /* Configure I2Cx: Addressing Master mode */ if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT) 8002be8: 687b ldr r3, [r7, #4] 8002bea: 68db ldr r3, [r3, #12] 8002bec: 2b02 cmp r3, #2 8002bee: d108 bne.n 8002c02 { SET_BIT(hi2c->Instance->CR2, I2C_CR2_ADD10); 8002bf0: 687b ldr r3, [r7, #4] 8002bf2: 681b ldr r3, [r3, #0] 8002bf4: 685a ldr r2, [r3, #4] 8002bf6: 687b ldr r3, [r7, #4] 8002bf8: 681b ldr r3, [r3, #0] 8002bfa: f442 6200 orr.w r2, r2, #2048 @ 0x800 8002bfe: 605a str r2, [r3, #4] 8002c00: e007 b.n 8002c12 } else { /* Clear the I2C ADD10 bit */ CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_ADD10); 8002c02: 687b ldr r3, [r7, #4] 8002c04: 681b ldr r3, [r3, #0] 8002c06: 685a ldr r2, [r3, #4] 8002c08: 687b ldr r3, [r7, #4] 8002c0a: 681b ldr r3, [r3, #0] 8002c0c: f422 6200 bic.w r2, r2, #2048 @ 0x800 8002c10: 605a str r2, [r3, #4] } /* Enable the AUTOEND by default, and enable NACK (should be disable only during Slave process */ hi2c->Instance->CR2 |= (I2C_CR2_AUTOEND | I2C_CR2_NACK); 8002c12: 687b ldr r3, [r7, #4] 8002c14: 681b ldr r3, [r3, #0] 8002c16: 685b ldr r3, [r3, #4] 8002c18: 687a ldr r2, [r7, #4] 8002c1a: 6812 ldr r2, [r2, #0] 8002c1c: f043 7300 orr.w r3, r3, #33554432 @ 0x2000000 8002c20: f443 4300 orr.w r3, r3, #32768 @ 0x8000 8002c24: 6053 str r3, [r2, #4] /*---------------------------- I2Cx OAR2 Configuration ---------------------*/ /* Disable Own Address2 before set the Own Address2 configuration */ hi2c->Instance->OAR2 &= ~I2C_DUALADDRESS_ENABLE; 8002c26: 687b ldr r3, [r7, #4] 8002c28: 681b ldr r3, [r3, #0] 8002c2a: 68da ldr r2, [r3, #12] 8002c2c: 687b ldr r3, [r7, #4] 8002c2e: 681b ldr r3, [r3, #0] 8002c30: f422 4200 bic.w r2, r2, #32768 @ 0x8000 8002c34: 60da str r2, [r3, #12] /* Configure I2Cx: Dual mode and Own Address2 */ hi2c->Instance->OAR2 = (hi2c->Init.DualAddressMode | hi2c->Init.OwnAddress2 | \ 8002c36: 687b ldr r3, [r7, #4] 8002c38: 691a ldr r2, [r3, #16] 8002c3a: 687b ldr r3, [r7, #4] 8002c3c: 695b ldr r3, [r3, #20] 8002c3e: ea42 0103 orr.w r1, r2, r3 (hi2c->Init.OwnAddress2Masks << 8)); 8002c42: 687b ldr r3, [r7, #4] 8002c44: 699b ldr r3, [r3, #24] 8002c46: 021a lsls r2, r3, #8 hi2c->Instance->OAR2 = (hi2c->Init.DualAddressMode | hi2c->Init.OwnAddress2 | \ 8002c48: 687b ldr r3, [r7, #4] 8002c4a: 681b ldr r3, [r3, #0] 8002c4c: 430a orrs r2, r1 8002c4e: 60da str r2, [r3, #12] /*---------------------------- I2Cx CR1 Configuration ----------------------*/ /* Configure I2Cx: Generalcall and NoStretch mode */ hi2c->Instance->CR1 = (hi2c->Init.GeneralCallMode | hi2c->Init.NoStretchMode); 8002c50: 687b ldr r3, [r7, #4] 8002c52: 69d9 ldr r1, [r3, #28] 8002c54: 687b ldr r3, [r7, #4] 8002c56: 6a1a ldr r2, [r3, #32] 8002c58: 687b ldr r3, [r7, #4] 8002c5a: 681b ldr r3, [r3, #0] 8002c5c: 430a orrs r2, r1 8002c5e: 601a str r2, [r3, #0] /* Enable the selected I2C peripheral */ __HAL_I2C_ENABLE(hi2c); 8002c60: 687b ldr r3, [r7, #4] 8002c62: 681b ldr r3, [r3, #0] 8002c64: 681a ldr r2, [r3, #0] 8002c66: 687b ldr r3, [r7, #4] 8002c68: 681b ldr r3, [r3, #0] 8002c6a: f042 0201 orr.w r2, r2, #1 8002c6e: 601a str r2, [r3, #0] hi2c->ErrorCode = HAL_I2C_ERROR_NONE; 8002c70: 687b ldr r3, [r7, #4] 8002c72: 2200 movs r2, #0 8002c74: 645a str r2, [r3, #68] @ 0x44 hi2c->State = HAL_I2C_STATE_READY; 8002c76: 687b ldr r3, [r7, #4] 8002c78: 2220 movs r2, #32 8002c7a: f883 2041 strb.w r2, [r3, #65] @ 0x41 hi2c->PreviousState = I2C_STATE_NONE; 8002c7e: 687b ldr r3, [r7, #4] 8002c80: 2200 movs r2, #0 8002c82: 631a str r2, [r3, #48] @ 0x30 hi2c->Mode = HAL_I2C_MODE_NONE; 8002c84: 687b ldr r3, [r7, #4] 8002c86: 2200 movs r2, #0 8002c88: f883 2042 strb.w r2, [r3, #66] @ 0x42 return HAL_OK; 8002c8c: 2300 movs r3, #0 } 8002c8e: 4618 mov r0, r3 8002c90: 3708 adds r7, #8 8002c92: 46bd mov sp, r7 8002c94: bd80 pop {r7, pc} ... 08002c98 : * @param Timeout Timeout duration * @retval HAL status */ HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout) { 8002c98: b580 push {r7, lr} 8002c9a: b088 sub sp, #32 8002c9c: af02 add r7, sp, #8 8002c9e: 60f8 str r0, [r7, #12] 8002ca0: 4608 mov r0, r1 8002ca2: 4611 mov r1, r2 8002ca4: 461a mov r2, r3 8002ca6: 4603 mov r3, r0 8002ca8: 817b strh r3, [r7, #10] 8002caa: 460b mov r3, r1 8002cac: 813b strh r3, [r7, #8] 8002cae: 4613 mov r3, r2 8002cb0: 80fb strh r3, [r7, #6] uint32_t tickstart; /* Check the parameters */ assert_param(IS_I2C_MEMADD_SIZE(MemAddSize)); if (hi2c->State == HAL_I2C_STATE_READY) 8002cb2: 68fb ldr r3, [r7, #12] 8002cb4: f893 3041 ldrb.w r3, [r3, #65] @ 0x41 8002cb8: b2db uxtb r3, r3 8002cba: 2b20 cmp r3, #32 8002cbc: f040 80f9 bne.w 8002eb2 { if ((pData == NULL) || (Size == 0U)) 8002cc0: 6a3b ldr r3, [r7, #32] 8002cc2: 2b00 cmp r3, #0 8002cc4: d002 beq.n 8002ccc 8002cc6: 8cbb ldrh r3, [r7, #36] @ 0x24 8002cc8: 2b00 cmp r3, #0 8002cca: d105 bne.n 8002cd8 { hi2c->ErrorCode = HAL_I2C_ERROR_INVALID_PARAM; 8002ccc: 68fb ldr r3, [r7, #12] 8002cce: f44f 7200 mov.w r2, #512 @ 0x200 8002cd2: 645a str r2, [r3, #68] @ 0x44 return HAL_ERROR; 8002cd4: 2301 movs r3, #1 8002cd6: e0ed b.n 8002eb4 } /* Process Locked */ __HAL_LOCK(hi2c); 8002cd8: 68fb ldr r3, [r7, #12] 8002cda: f893 3040 ldrb.w r3, [r3, #64] @ 0x40 8002cde: 2b01 cmp r3, #1 8002ce0: d101 bne.n 8002ce6 8002ce2: 2302 movs r3, #2 8002ce4: e0e6 b.n 8002eb4 8002ce6: 68fb ldr r3, [r7, #12] 8002ce8: 2201 movs r2, #1 8002cea: f883 2040 strb.w r2, [r3, #64] @ 0x40 /* Init tickstart for timeout management*/ tickstart = HAL_GetTick(); 8002cee: f7ff fbb5 bl 800245c 8002cf2: 6178 str r0, [r7, #20] if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY, tickstart) != HAL_OK) 8002cf4: 697b ldr r3, [r7, #20] 8002cf6: 9300 str r3, [sp, #0] 8002cf8: 2319 movs r3, #25 8002cfa: 2201 movs r2, #1 8002cfc: f44f 4100 mov.w r1, #32768 @ 0x8000 8002d00: 68f8 ldr r0, [r7, #12] 8002d02: f000 fac3 bl 800328c 8002d06: 4603 mov r3, r0 8002d08: 2b00 cmp r3, #0 8002d0a: d001 beq.n 8002d10 { return HAL_ERROR; 8002d0c: 2301 movs r3, #1 8002d0e: e0d1 b.n 8002eb4 } hi2c->State = HAL_I2C_STATE_BUSY_TX; 8002d10: 68fb ldr r3, [r7, #12] 8002d12: 2221 movs r2, #33 @ 0x21 8002d14: f883 2041 strb.w r2, [r3, #65] @ 0x41 hi2c->Mode = HAL_I2C_MODE_MEM; 8002d18: 68fb ldr r3, [r7, #12] 8002d1a: 2240 movs r2, #64 @ 0x40 8002d1c: f883 2042 strb.w r2, [r3, #66] @ 0x42 hi2c->ErrorCode = HAL_I2C_ERROR_NONE; 8002d20: 68fb ldr r3, [r7, #12] 8002d22: 2200 movs r2, #0 8002d24: 645a str r2, [r3, #68] @ 0x44 /* Prepare transfer parameters */ hi2c->pBuffPtr = pData; 8002d26: 68fb ldr r3, [r7, #12] 8002d28: 6a3a ldr r2, [r7, #32] 8002d2a: 625a str r2, [r3, #36] @ 0x24 hi2c->XferCount = Size; 8002d2c: 68fb ldr r3, [r7, #12] 8002d2e: 8cba ldrh r2, [r7, #36] @ 0x24 8002d30: 855a strh r2, [r3, #42] @ 0x2a hi2c->XferISR = NULL; 8002d32: 68fb ldr r3, [r7, #12] 8002d34: 2200 movs r2, #0 8002d36: 635a str r2, [r3, #52] @ 0x34 /* Send Slave Address and Memory Address */ if (I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK) 8002d38: 88f8 ldrh r0, [r7, #6] 8002d3a: 893a ldrh r2, [r7, #8] 8002d3c: 8979 ldrh r1, [r7, #10] 8002d3e: 697b ldr r3, [r7, #20] 8002d40: 9301 str r3, [sp, #4] 8002d42: 6abb ldr r3, [r7, #40] @ 0x28 8002d44: 9300 str r3, [sp, #0] 8002d46: 4603 mov r3, r0 8002d48: 68f8 ldr r0, [r7, #12] 8002d4a: f000 f9d3 bl 80030f4 8002d4e: 4603 mov r3, r0 8002d50: 2b00 cmp r3, #0 8002d52: d005 beq.n 8002d60 { /* Process Unlocked */ __HAL_UNLOCK(hi2c); 8002d54: 68fb ldr r3, [r7, #12] 8002d56: 2200 movs r2, #0 8002d58: f883 2040 strb.w r2, [r3, #64] @ 0x40 return HAL_ERROR; 8002d5c: 2301 movs r3, #1 8002d5e: e0a9 b.n 8002eb4 } /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE */ if (hi2c->XferCount > MAX_NBYTE_SIZE) 8002d60: 68fb ldr r3, [r7, #12] 8002d62: 8d5b ldrh r3, [r3, #42] @ 0x2a 8002d64: b29b uxth r3, r3 8002d66: 2bff cmp r3, #255 @ 0xff 8002d68: d90e bls.n 8002d88 { hi2c->XferSize = MAX_NBYTE_SIZE; 8002d6a: 68fb ldr r3, [r7, #12] 8002d6c: 22ff movs r2, #255 @ 0xff 8002d6e: 851a strh r2, [r3, #40] @ 0x28 I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP); 8002d70: 68fb ldr r3, [r7, #12] 8002d72: 8d1b ldrh r3, [r3, #40] @ 0x28 8002d74: b2da uxtb r2, r3 8002d76: 8979 ldrh r1, [r7, #10] 8002d78: 2300 movs r3, #0 8002d7a: 9300 str r3, [sp, #0] 8002d7c: f04f 7380 mov.w r3, #16777216 @ 0x1000000 8002d80: 68f8 ldr r0, [r7, #12] 8002d82: f000 fc47 bl 8003614 8002d86: e00f b.n 8002da8 } else { hi2c->XferSize = hi2c->XferCount; 8002d88: 68fb ldr r3, [r7, #12] 8002d8a: 8d5b ldrh r3, [r3, #42] @ 0x2a 8002d8c: b29a uxth r2, r3 8002d8e: 68fb ldr r3, [r7, #12] 8002d90: 851a strh r2, [r3, #40] @ 0x28 I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP); 8002d92: 68fb ldr r3, [r7, #12] 8002d94: 8d1b ldrh r3, [r3, #40] @ 0x28 8002d96: b2da uxtb r2, r3 8002d98: 8979 ldrh r1, [r7, #10] 8002d9a: 2300 movs r3, #0 8002d9c: 9300 str r3, [sp, #0] 8002d9e: f04f 7300 mov.w r3, #33554432 @ 0x2000000 8002da2: 68f8 ldr r0, [r7, #12] 8002da4: f000 fc36 bl 8003614 } do { /* Wait until TXIS flag is set */ if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) 8002da8: 697a ldr r2, [r7, #20] 8002daa: 6ab9 ldr r1, [r7, #40] @ 0x28 8002dac: 68f8 ldr r0, [r7, #12] 8002dae: f000 fac6 bl 800333e 8002db2: 4603 mov r3, r0 8002db4: 2b00 cmp r3, #0 8002db6: d001 beq.n 8002dbc { return HAL_ERROR; 8002db8: 2301 movs r3, #1 8002dba: e07b b.n 8002eb4 } /* Write data to TXDR */ hi2c->Instance->TXDR = *hi2c->pBuffPtr; 8002dbc: 68fb ldr r3, [r7, #12] 8002dbe: 6a5b ldr r3, [r3, #36] @ 0x24 8002dc0: 781a ldrb r2, [r3, #0] 8002dc2: 68fb ldr r3, [r7, #12] 8002dc4: 681b ldr r3, [r3, #0] 8002dc6: 629a str r2, [r3, #40] @ 0x28 /* Increment Buffer pointer */ hi2c->pBuffPtr++; 8002dc8: 68fb ldr r3, [r7, #12] 8002dca: 6a5b ldr r3, [r3, #36] @ 0x24 8002dcc: 1c5a adds r2, r3, #1 8002dce: 68fb ldr r3, [r7, #12] 8002dd0: 625a str r2, [r3, #36] @ 0x24 hi2c->XferCount--; 8002dd2: 68fb ldr r3, [r7, #12] 8002dd4: 8d5b ldrh r3, [r3, #42] @ 0x2a 8002dd6: b29b uxth r3, r3 8002dd8: 3b01 subs r3, #1 8002dda: b29a uxth r2, r3 8002ddc: 68fb ldr r3, [r7, #12] 8002dde: 855a strh r2, [r3, #42] @ 0x2a hi2c->XferSize--; 8002de0: 68fb ldr r3, [r7, #12] 8002de2: 8d1b ldrh r3, [r3, #40] @ 0x28 8002de4: 3b01 subs r3, #1 8002de6: b29a uxth r2, r3 8002de8: 68fb ldr r3, [r7, #12] 8002dea: 851a strh r2, [r3, #40] @ 0x28 if ((hi2c->XferCount != 0U) && (hi2c->XferSize == 0U)) 8002dec: 68fb ldr r3, [r7, #12] 8002dee: 8d5b ldrh r3, [r3, #42] @ 0x2a 8002df0: b29b uxth r3, r3 8002df2: 2b00 cmp r3, #0 8002df4: d034 beq.n 8002e60 8002df6: 68fb ldr r3, [r7, #12] 8002df8: 8d1b ldrh r3, [r3, #40] @ 0x28 8002dfa: 2b00 cmp r3, #0 8002dfc: d130 bne.n 8002e60 { /* Wait until TCR flag is set */ if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout, tickstart) != HAL_OK) 8002dfe: 697b ldr r3, [r7, #20] 8002e00: 9300 str r3, [sp, #0] 8002e02: 6abb ldr r3, [r7, #40] @ 0x28 8002e04: 2200 movs r2, #0 8002e06: 2180 movs r1, #128 @ 0x80 8002e08: 68f8 ldr r0, [r7, #12] 8002e0a: f000 fa3f bl 800328c 8002e0e: 4603 mov r3, r0 8002e10: 2b00 cmp r3, #0 8002e12: d001 beq.n 8002e18 { return HAL_ERROR; 8002e14: 2301 movs r3, #1 8002e16: e04d b.n 8002eb4 } if (hi2c->XferCount > MAX_NBYTE_SIZE) 8002e18: 68fb ldr r3, [r7, #12] 8002e1a: 8d5b ldrh r3, [r3, #42] @ 0x2a 8002e1c: b29b uxth r3, r3 8002e1e: 2bff cmp r3, #255 @ 0xff 8002e20: d90e bls.n 8002e40 { hi2c->XferSize = MAX_NBYTE_SIZE; 8002e22: 68fb ldr r3, [r7, #12] 8002e24: 22ff movs r2, #255 @ 0xff 8002e26: 851a strh r2, [r3, #40] @ 0x28 I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, 8002e28: 68fb ldr r3, [r7, #12] 8002e2a: 8d1b ldrh r3, [r3, #40] @ 0x28 8002e2c: b2da uxtb r2, r3 8002e2e: 8979 ldrh r1, [r7, #10] 8002e30: 2300 movs r3, #0 8002e32: 9300 str r3, [sp, #0] 8002e34: f04f 7380 mov.w r3, #16777216 @ 0x1000000 8002e38: 68f8 ldr r0, [r7, #12] 8002e3a: f000 fbeb bl 8003614 8002e3e: e00f b.n 8002e60 I2C_NO_STARTSTOP); } else { hi2c->XferSize = hi2c->XferCount; 8002e40: 68fb ldr r3, [r7, #12] 8002e42: 8d5b ldrh r3, [r3, #42] @ 0x2a 8002e44: b29a uxth r2, r3 8002e46: 68fb ldr r3, [r7, #12] 8002e48: 851a strh r2, [r3, #40] @ 0x28 I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, 8002e4a: 68fb ldr r3, [r7, #12] 8002e4c: 8d1b ldrh r3, [r3, #40] @ 0x28 8002e4e: b2da uxtb r2, r3 8002e50: 8979 ldrh r1, [r7, #10] 8002e52: 2300 movs r3, #0 8002e54: 9300 str r3, [sp, #0] 8002e56: f04f 7300 mov.w r3, #33554432 @ 0x2000000 8002e5a: 68f8 ldr r0, [r7, #12] 8002e5c: f000 fbda bl 8003614 I2C_NO_STARTSTOP); } } } while (hi2c->XferCount > 0U); 8002e60: 68fb ldr r3, [r7, #12] 8002e62: 8d5b ldrh r3, [r3, #42] @ 0x2a 8002e64: b29b uxth r3, r3 8002e66: 2b00 cmp r3, #0 8002e68: d19e bne.n 8002da8 /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */ /* Wait until STOPF flag is reset */ if (I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) 8002e6a: 697a ldr r2, [r7, #20] 8002e6c: 6ab9 ldr r1, [r7, #40] @ 0x28 8002e6e: 68f8 ldr r0, [r7, #12] 8002e70: f000 faac bl 80033cc 8002e74: 4603 mov r3, r0 8002e76: 2b00 cmp r3, #0 8002e78: d001 beq.n 8002e7e { return HAL_ERROR; 8002e7a: 2301 movs r3, #1 8002e7c: e01a b.n 8002eb4 } /* Clear STOP Flag */ __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); 8002e7e: 68fb ldr r3, [r7, #12] 8002e80: 681b ldr r3, [r3, #0] 8002e82: 2220 movs r2, #32 8002e84: 61da str r2, [r3, #28] /* Clear Configuration Register 2 */ I2C_RESET_CR2(hi2c); 8002e86: 68fb ldr r3, [r7, #12] 8002e88: 681b ldr r3, [r3, #0] 8002e8a: 6859 ldr r1, [r3, #4] 8002e8c: 68fb ldr r3, [r7, #12] 8002e8e: 681a ldr r2, [r3, #0] 8002e90: 4b0a ldr r3, [pc, #40] @ (8002ebc ) 8002e92: 400b ands r3, r1 8002e94: 6053 str r3, [r2, #4] hi2c->State = HAL_I2C_STATE_READY; 8002e96: 68fb ldr r3, [r7, #12] 8002e98: 2220 movs r2, #32 8002e9a: f883 2041 strb.w r2, [r3, #65] @ 0x41 hi2c->Mode = HAL_I2C_MODE_NONE; 8002e9e: 68fb ldr r3, [r7, #12] 8002ea0: 2200 movs r2, #0 8002ea2: f883 2042 strb.w r2, [r3, #66] @ 0x42 /* Process Unlocked */ __HAL_UNLOCK(hi2c); 8002ea6: 68fb ldr r3, [r7, #12] 8002ea8: 2200 movs r2, #0 8002eaa: f883 2040 strb.w r2, [r3, #64] @ 0x40 return HAL_OK; 8002eae: 2300 movs r3, #0 8002eb0: e000 b.n 8002eb4 } else { return HAL_BUSY; 8002eb2: 2302 movs r3, #2 } } 8002eb4: 4618 mov r0, r3 8002eb6: 3718 adds r7, #24 8002eb8: 46bd mov sp, r7 8002eba: bd80 pop {r7, pc} 8002ebc: fe00e800 .word 0xfe00e800 08002ec0 : * @param Timeout Timeout duration * @retval HAL status */ HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout) { 8002ec0: b580 push {r7, lr} 8002ec2: b088 sub sp, #32 8002ec4: af02 add r7, sp, #8 8002ec6: 60f8 str r0, [r7, #12] 8002ec8: 4608 mov r0, r1 8002eca: 4611 mov r1, r2 8002ecc: 461a mov r2, r3 8002ece: 4603 mov r3, r0 8002ed0: 817b strh r3, [r7, #10] 8002ed2: 460b mov r3, r1 8002ed4: 813b strh r3, [r7, #8] 8002ed6: 4613 mov r3, r2 8002ed8: 80fb strh r3, [r7, #6] uint32_t tickstart; /* Check the parameters */ assert_param(IS_I2C_MEMADD_SIZE(MemAddSize)); if (hi2c->State == HAL_I2C_STATE_READY) 8002eda: 68fb ldr r3, [r7, #12] 8002edc: f893 3041 ldrb.w r3, [r3, #65] @ 0x41 8002ee0: b2db uxtb r3, r3 8002ee2: 2b20 cmp r3, #32 8002ee4: f040 80fd bne.w 80030e2 { if ((pData == NULL) || (Size == 0U)) 8002ee8: 6a3b ldr r3, [r7, #32] 8002eea: 2b00 cmp r3, #0 8002eec: d002 beq.n 8002ef4 8002eee: 8cbb ldrh r3, [r7, #36] @ 0x24 8002ef0: 2b00 cmp r3, #0 8002ef2: d105 bne.n 8002f00 { hi2c->ErrorCode = HAL_I2C_ERROR_INVALID_PARAM; 8002ef4: 68fb ldr r3, [r7, #12] 8002ef6: f44f 7200 mov.w r2, #512 @ 0x200 8002efa: 645a str r2, [r3, #68] @ 0x44 return HAL_ERROR; 8002efc: 2301 movs r3, #1 8002efe: e0f1 b.n 80030e4